NSC 93L14DMQB Datasheet

93L14 Quad Latch

93L14 Quad Latch

June 1989

General Description

The 93L14 is a multifunctional 4-bit latch designed for gen­eral purpose storage applications in high speed digital sys­tems. All outputs have active pull-up circuitry to provide high
capacitance drive and to provide low impedance in both
logic states for good noise immunity.

Connection Diagram

Dual-In-Line Package

Order Number 93L14DMQB or 93L14FMQB

See NS Package Number J16A or W16A

Pin Names Description

E Enable Input (Active LOW)
D0–D3 Data Inputs
S

0–S3 Set Inputs (Active LOW)
MR
Q0–Q3 Latch Outputs

TL/F/9612– 1

Master Reset Input (Active LOW)

Features

Y

Can be used as single input D latches or set/reset
latches

Y

Active low enable gate input

Y

Overriding master reset

Logic Symbol

V

CC

GND

e

e

Pin 16

Pin 8

TL/F/9612– 2

C

1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

TL/F/9612

Absolute Maximum Ratings (Note)

Note:

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Supply Voltage 7V

Input Voltage 5.5V

Operating Free Air Temperature Range

MIL

Storage Temperature Range

b

55§Ctoa125§C

b

65§Ctoa150§C

The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran­teed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.

Recommended Operating Conditions

Symbol Parameter

Min Nom Max

V

CC

V

IH

V

IL

I

OH

I

OL

T

A

Supply Voltage 4.5 5 5.5 V

High Level Input Voltage 2 V

Low Level Input Voltage 0.7 V

High Level Output Voltage

Low Level Output Current 4.8 mA

Free Air Operating Temperature

b

55 125

ts(H) Setup Time HIGH or LOW 10
t

(L) Dnto E 20

s

th(H) Hold Time HIGH or LOW 0
th(L) Dnto E 10

ts(H) Setup Time HIGH, Dnto S

th(L) Hold Time LOW, Dnto S

t

(L) E Pulse Width LOW 30 ns

w

n

n

15 ns

5ns

tw(L) MR Pulse Width LOW 25 ns

t

rec

Recovery Time, MR to E 5ns

93L14 (MIL)

b

400 mA

Units

C

§

ns

ns

2

Electrical Characteristics

Over recommended operating free air temperature range (unless otherwise noted)

Symbol Parameter Conditions Min

e

V

I

V

OH

V

OL

I

I

I

IH

I

IL

I

OS

I

CC

Note 1: All typicals are at V

Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.

Note 3: I

Switching Characteristics

V

CC

Input Clamp Voltage V

High Level Output Voltage V

Low Level Output Voltage V

Input Current@Max V
Input Voltage

High Level Input Current V

Low Level Input Current V

Short Circuit V
Output Current (Note 2)

Supply Current V

e

e

5V, T

CC

is measured with all outputs open and all inputs grounded.

CC

ea

5.0V, T

ea

25§C (See Section 1 for waveforms and load configurations)

A

25§C.

A

CC

CC

e

V

IL

CC

e

V

IH

CC

CC

CC

CC

CC

Symbol Parameter

t
t

t
t

t

t

PLH

PHL

PLH

PHL

PLH

PHL

Propagation Delay 45
E to Q

n

Propagation Delay 30
Dnto Q

n

Propagation Delay, MR to Q

Propagation Delay, Snto Q

eb

Min, I

e

Min, I

Max, V

e

Min, I

Min, V

e

Max, V

e

Max, V

e

Max, V

e

Max

e

Max (Note 3) 16.5 mA

10 mA

I

e

Max, 2.4

OH

e

Min

IH

e

Max,

OL

e

Max

IL

e

5.5V

I

e

2.4V Inputs 20

I

D

n

e

0.3V Inputs

I

D

n

b

e

C

L

Min Max

n

n

Typ

(Note 1)

2.5

15 pF

36

30

30 ns

33 ns

Max Units

b

1.5 V

V

0.3 V

1mA

mA

30

b

400

b

600

b

25 mA

mA

Units

ns

ns

3

Functional Description

The 93L14 consists of four latches with a common active
LOW Enable input and active LOW Master Reset input.
When the Enable goes HIGH, data present in the latches is
stored and the state of the latch is no longer affected by the
S

and Dninputs. The Master Reset when activated over-

n

rides all other input conditions forcing all latch outputs LOW.
Each of the four latches can be operated in one of two
modes:

D-TYPE-LATCHÐFor D-type operation the S

input of a
latch is held LOW. While the common Enable is active the
latch output follows the D input. Information present at the
latch output is stored in the latch when the Enable goes
HIGH.

SET/RESET LATCHÐDuring set/reset operation when the
common Enable is LOW a latch is reset by a LOW on the D
input, and can be set by a LOW on the S
is HIGH. If both S

and D inputs are LOW, the D input will

input if the D input

dominate and the latch wil be reset. When the Enable goes
HIGH, the latch remains in the last state prior to disable­ment. The two modes of latch operation are shown in the
Truth Table.

Logic Diagram

Truth Table

MR E DS QnOperation

H L L L L D Mode
HLHL L
HHXXQ

H L L L L R/S Mode
HLHLH
HLLH L
H LHHQ
HHXXQ

L X X X L RESET

HeHIGH Voltage Level

e

LOW Voltage Level

L

e

Immaterial

X

e

Previous Output State

Q

nb1

e

Present Output State

Q

n

b

n

1

nb1

b

n

1

TL/F/9612– 3

4

Physical Dimensions inches (millimeters)

16-Lead Ceramic Dual-In-Line Package (J)

Order Number 93L14DMQB

NS Package Number J16A

5

Physical Dimensions inches (millimeters) (Continued)

93L14 Quad Latch

16-Lead Ceramic Flat Package (W)

Order Number 93L14FMQB
NS Package Number W16A

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into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.

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