NSC 5962-8955701SA, 5962-8955701RA, 5962-89557012A Datasheet
54ACT564
Octal D-Type Flip-Flop with TRI-STATE
®
Outputs
General Description
The ’ACT564 is a high-speed, low power octal flip-flop with a
buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs
is stored in the flip-flops on the LOW-to-HIGH Clock (CP)
transition.
The ’ACT564 is functionally identical to the ’ACT574, but
with inverted outputs.
Features
n ICCand IOZreduced by 50
%
n Inputs and outputs on opposite sides of package
allowing easy interface with microprocessors
n Useful as input or output port for microprocessors
n Functionally identical to ’ACT574 but with inverted
outputs
n TRI-STATE outputs for bus-oriented applications
n Outputs source/sink 24 mA
n ’ACT564 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD) 5962-89557
Logic Symbols
Pin Names Description
D
0–D7
Data Inputs
CP Clock Pulse Input
OE
TRI-STATE Output Enable Input
O
0–O7
TRI-STATE Outputs
TRI-STATE®is a registeredtrademark of National Semiconductor Corporation.
FACT
™
is a trademark of Fairchild Semiconductor Corporation.
DS100994-1
IEEE/IEC
DS100994-2
September 1998
54ACT564 Octal D-Type Flip-Flop with TRI-STATE Outputs
© 1998 National Semiconductor Corporation DS100994 www.national.com
Connection Diagrams
Functional Description
The’ACT564 consists of eight edge-triggered flip-flops with
individual D-type inputs and TRI-STATE complement outputs. The buffered clock and buffered Output Enable are
common to all flip-flops. The eight flip-flops will store the
state of their individual D inputs that meet the setup and hold
time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the complement of
the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the
state of the flip-flops.
Function Table
Inputs Internal Outputs Function
OE
CP D Q O
N
H H L NC Z Hold
H H H NC Z Hold
H N L L Z Load
H N H H Z Load
L N L L H Data Available
L N H H L Data Available
L H L NC NC No Change in Data
L H H NC NC No Change in Data
H=HIGH Voltage Level
L=LOW Voltage Level
X=Immaterial
Z=High Impedance
N=LOW-to-HIGH Transition
NC=No Change
Pin Assignment for DIP,
and Flatpak
DS100994-3
Pin Assignment
for LCC
DS100994-4
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
=
−0.5V −20 mA
V
I
=
V
CC
+0.5V +20 mA
DC Input Voltage (V
I
) −0.5V to VCC+0.5V
DC Output Diode Current (I
OK
)
V
O
=
−0.5V −20 mA
V
O
=
V
CC
+0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to VCC+0.5V
DC Output Source or Sink Current
(I
O
)
±
50 mA
DC V
CC
or Ground Current
Per Output Pin (I
CC
or I
GND
)
±
50 mA
Storage Temperature (T
STG
) −65˚C to +150˚C
Junction Temperature (T
J
)
CDIP 175˚C
Recommended Operating
Conditions
Supply Voltage (VCC)
(Unless Otherwise Specified) (ACT) 4.5V to 5.5V
Input Voltage (V
I
) 0VtoV
CC
Output Voltage (VO) 0VtoV
CC
Operating Temperature (TA)
ACT −55˚C to +125˚C
Minimum Input Edge Rate (∆V/∆t)
’ACT Devices
V
IN
from 0.8V to 2.0V
V
CC
@
4.5V, 5.5V 125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recommend operation of FACT
™
circuits outside databook specifications.
DC Characteristics for ’ACT Family Devices
54ACT
Symbol Parameter V
CC
T
A
=
Units Conditions
(V) −55˚C to +125˚C
Guaranteed Limits
V
IH
Minimum High
Level Input
Voltage
4.5 2.0
V
V
OUT
=
0.1V
5.5 2.0 or V
CC
− 0.1V
V
IL
Maximum Low
Level Input
Voltage
4.5 0.8
V
V
OUT
=
0.1V
5.5 0.8 or V
CC
− 0.1V
V
OH
Minimum High
Level
4.5 4.4 V I
OUT
=
−50 µA
5.5 5.4
(Note 2)
V
IN
=
V
IL
or V
IH
4.5 3.70 V I
OH
−24 mA
5.5 4.70 −24 mA
V
OL
Maximum Low
Level Output
Voltage
4.5 0.1 V I
OUT
=
50 µA
5.5 0.1
(Note 2)
V
IN
=
V
IL
or V
IH
4.5 0.50 V I
OL
24 mA
5.5 0.50 24 mA
I
IN
Maximum Input 5.5
±
1.0 µA V
I
=
V
CC
, GND
Leakage Current
I
OZ
Maximum
TRI-STATE
Leakage Current
5.5
±
10.0 µA
V
I
=
V
IL,VIH
V
O
=
V
CC
, GND
I
CCT
Maximum ICC/Input 5.5 1.6 mA V
I
=
V
CC
− 2.1V
I
OLD
(Note 3) Minimum
Dynamic Output
Current
5.5 50 mA V
OLD
=
1.65V
I
OHD
5.5 −50 mA V
OHD
=
3.85V
I
CC
Maximum Quiescent 5.5 80.0 µA V
IN
=
V
CC
Supply Current or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
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