Nokia Ringo3 Baseband Block 02
PAMS Technical Documentation
NHX-7 Transceiver
Chapter 2
Baseband Module JP3
Original 10/98
NHX-7
PAMS
Baseband Module JP3
AMENDMENT RECORD SHEET
Amendment
Number
Date Inserted By Comments
10/98 Original
Technical Documentation
Page 2 – 2
Original 10/98
PAMS
NHX-7
Technical Documentation
CONTENTS
System Module JP3: Introduction 2 – 6. . . . . . . . . . . . . . . . . . . . . . . .
Baseband Sub-module 2 – 6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagram of baseband 2 – 7. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technical summary 2 – 8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Modes of Operation 2 – 8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CTRLU Circuit 2 – 10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Description 2 – 10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Extended standby mode for power saving 2 – 11. . . . . . . . . . .
Main Components 2 – 11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MCU 2 – 11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EEPROM 2 – 14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PWRU Circuit 2 – 14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Distribution 2 – 14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery charging 2 – 16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Startup charging 2 – 16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery overvoltage protection 2 – 17. . . . . . . . . . . . . . . . . . . . .
Battery removal during charging 2 – 18. . . . . . . . . . . . . . . . . . .
Different PWM frequencies ( 1Hz and 32 Hz) 2 – 19. . . . . . . .
Charger Current measurement 2 – 20. . . . . . . . . . . . . . . . . . . .
Battery identification 2 – 21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery voltage measurement, VBATSW 2 – 22. . . . . . . . . . . .
Charger voltage measurement, VCHARG 2 – 23. . . . . . . . . . .
Charger current measurement 2 – 23. . . . . . . . . . . . . . . . . . . . .
Battery temperature 2 – 23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Vibra alerting device 2 – 24. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage regulators and controlling 2 – 25. . . . . . . . . . .
Operation modes 2 – 27. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operation modes 2 – 28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power–Off Mode 2 – 28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Entering Power–Off Mode 2 – 28. . . . . . . . . . . . . . . . . . . . . . . . .
Charging in Power–Off 2 – 29. . . . . . . . . . . . . . . . . . . . . . . . . . .
Reset Mode 2 – 29. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power–On Mode 2 – 30. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sleep Mode 2 – 30. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AUDIO 2 – 31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Audio Control 2 – 31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal microphone 2 – 31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal earphone 2 – 31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Buzzer 2 – 31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Headset detection 2 – 31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Headset Switch detection 2 – 31. . . . . . . . . . . . . . . . . . . . . . . . . . .
Baseband Module JP3
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Baseband Module JP3
NASTA ASIC 2 – 32. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Main features 2 – 32. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmit (TX) audio signal path 2 – 34. . . . . . . . . . . . . . . . . . . .
RECEIVE (RX) AUDIO SIGNAL PATH 2 – 36. . . . . . . . . . . . . .
Transmitting data path 2 – 37. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiving data path 2 – 37. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IF 2 – 37. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AFC 2 – 38. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ST signalling tone generator 2 – 38. . . . . . . . . . . . . . . . . . . . . . .
Standby Modes for Power Saving 2 – 38. . . . . . . . . . . . . . . . . .
RF Section 2 – 39. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technical Summary 2 – 39. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Basic Specification 2 – 39. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RF Module Characteristics 2 – 40. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum ratings 2 – 40. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Characteristics 2 – 40. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Regulator 2 – 40. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Battery Save at Reception Mode 2 – 40. . . . . . . . . . . . . . . . . . .
Control Signals 2 – 40. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Distribution Diagram 2 – 41. . . . . . . . . . . . . . . . . . . . . . .
Connections 2 – 42. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connections to Baseband module 2 – 42. . . . . . . . . . . . . . . . . .
Antenna 2 – 45. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional description of radio sub–module 2 – 46. . . . . . . . . . . . . .
Block diagram 2 – 46. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RF components 2 – 47. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver 2 – 47. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RX Synthesizer 2 – 47. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RX loop filter 2 – 48. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TX Synthesizer 2 – 48. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TX Loop Filter 2 – 48. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmitter 2 – 48. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RF Characteristics 2 – 49. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duplexer 2 – 49. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RX submodule 2 – 49. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Preamplifier 2 – 50. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SAW–filter 2 – 51. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1st mixer 2 – 51. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1st IF–filter 2 – 52. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IF–amplifier 2 – 52. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2nd if–filter 2 – 52. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IF–circuit 2 – 53. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TX submodule 2 – 53. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power amplifier 2 – 54. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power control circuit 2 – 55. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technical Documentation
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Synthesizer submodule 2 – 55. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PLL circuit for RX local oscillator signal and TX injection 2 – 55
RX local oscillator signal 2 – 55. . . . . . . . . . . . . . . . . . . . . . . . . .
TX VCO 2 – 56. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TX buffers 2 – 57. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VCTCXO 2 – 57. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parts list of JP3 (EDMS Issue 4.3) Code: 0201185 2 – 58. . . . . . . . . .
Baseband Module JP3
Schematic Diagrams
Block Diagram (Version 07 Edit 128) for layout version 08 3/A3–1. . .
Circuit Diagram of PWRU + CONNECTOR (Version 08 Edit 224)
for layout version 08 3/A3–2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Page No
Circuit Diagram of CTRLU Block (Version 08 Edit 21)
for layout version 08 3/A3–3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Circuit Diagram of Audio (Version 08 Edit 308)
for layout version 08 3/A3–4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Circuit Diagram of Transmitter (Version 07 Edit 125)
for layout version 08 3/A3–5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Circuit Diagram of Receiver (Version 07 Edit 166)
for layout version 08 3/A3–6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Circuit Diagram of Synthesizer (Version 07 Edit 168)
for layout version 08 3/A3–7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Layout Diagram of US4U (Layout version 08) 3/A3–8. . . . . . . . . . . . . .
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NHX-7
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Baseband Module JP3
System Module JP3: Introduction
This document specifices the System module JP3 of the NHX–7 ETACS
cellular phone.
The JP3 System Module comprises the baseband and the RF functions of
the phone.
Baseband Sub-module
The Baseband submodule controls the internal operation of the phone. It
controls the user interface, i.e. LCD driver, keyboard and audio interface
functions. The module performs all signalling towards the system and carries out audio–frequency signal processing. In addition, it controls the operation of the transceiver and stores tuning data for the phone.
The baseband architecture is basically similar to the previous generation.
However, the system specified logical voltage level used is 2.82V and
new features include a improved charging circuit CHAPS and a new power supply circuit PSA.
Technical Documentation
The baseband architecture supports a power saving function called ”extended standby mode”. This sleep mode shuts off the Receiver and part
of the NASTA blocks. The phone is woken up at every FOCC:s first word
and it is ”sleeping” the rest of the time.
The nominal battery voltage in NHX–7 is 3.6V. The actual battery voltage
varies between 3.0 to 4.2V/5.3V depending on the used cell type (Li-Ion
or NiMH) and whether the phone is connected to a charger (limit on 5.3V
with NiMH battery in idle).
Battery charging is controlled by a PWM signal from the MCU. The PWM
duty cycle is determined by a charging software. The PWM signal is fed
to the CHAPS charging switch and through the charging pins to an external charger. There can be two types of chargers connected to the phone.
Standard chargers (two wires) provide coarse supply power, which is
switched by the CHAPS for suitable charging voltage and current.
Advanced chargers (three wires) are equipped with a control input,
through which the phone gives PWM charging control signal to the charger.
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Block Diagram of baseband
Rf power
supply
EEPROM
4k byte
32 byte
OTP
Rf control Mod/Daf Ref
Clock
VCTCXO
System
14.85 MHz
Baseband Module JP3
Clock
UI
MCU
H8 3093
4kx8 RAM
192k ROM
8 ADC
I/O Ports
Serial ports
PWM
outputs
PSA
Power
Supply
Asic
Data
NASTA
Audio/
Audio
control
McuClk
Rows, Cols, Disp data, Lights, Buzz
Power supply VL,VA
Signalling
BSI, BTEMP
BaseBand
Asic
LcdClk
CHAPS
Charger
Asic
Vbat
Earp
Earn
Ichar
Current
Shunt
Connector
UI Board
Display/
Driver
Keypads
Earphone
Buzzer
Lights
Battery
Battery
Connector
Original 10/98
System Connector:
Mbus,Xmic,Xear ,Mic
Bottom connector
Charger Connector:
Vcharg, Charger cntl, Gnd
Figure 1.
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NHX-7
PAMS
Baseband Module JP3
Technical summary
The baseband module consists of VCTCXO module and four ASIC circuits, PSA, CHAPS, NASTA 4.5, EEPROM, and some standard circuits,
DUAL BILATERAL SWITCH (TC7W66F), AUDIO POWER AMPLIFIER
(LM4862) and a Hitachi H8 series controller (H8/3093 MCU).
The MCU includes memories, 192 kbytes ROM and 4 kbytes RAM. It
controls all transceiver functions.
The EEPROM type is 4 kbytes with 32 bytes. The OTP memory is a seri-
2
C–bus type.
al I
The baseband is running from a 2.8 V power rail, which is supplied by a
power controlling asic. In the PSA asic there are two separate power supplies for BaseBand ( VA,VL ) and two externally controllable power supplies for RF (VRX, VTX).
The CHAPS is a charging control ASIC. It is essentially
power switch for controlling charging current, in a mobile phone. CHAPS
is designed for 3 cell Nickel or 1 cell Lithium battery packs.
Technical Documentation
an integrated
The NASTA circuit integrates the Audio and Modem operations. Because
the NASTA supports only one microphone, there are two bilateral
switches to connect the internal microphone or the headset microphone
to the NASTA MIC input. There is an audio power amplifier for EAR and
XEAR lines each. The internal earphone amplifier is a dual ended type
output which is in EAR line and there is transistor buffer in XEAR line.
The VCTCXO module is a voltage and temperature controlled oscillator
which operates as system clock for RF and BaseBand.
All functional blocks of the baseband are mounted on a single multi layer
printed circuit board. All components of the baseband are surface mountable. This board contains also the RF–parts. The B–cover side ( battery
side ) EMC shielding is implemented by using a metallic RF–shields on
the RF–blocks. On the other side the engine is shielded with a aluminium
frame, which makes a contact to a ground ring of the engine board and a
ground plane of the UI–board.
The connections from BaseBand to UI board are fed through a 28–way
2–row board to board spring connector.
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Technical Documentation
Modes of Operation
Power off, Standby, Listening and Conversation modes.
– In Power off mode only the circuits needed for power up are supplied.
– In Standby mode the MCU and needed blocks of the NASTA are ac-
tive.
– In Listening mode the receiver and some blocks of the NASTA are ac-
tive.
– In Conversation mode all ICs are active.
Baseband Module JP3
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Baseband Module JP3
CTRLU Circuit
The Control block CTRLU controls all functions of the phone.
Block Description
– CTRLU – PWRU
CTRLU controls the watchdog timer in PSA. It sends a negative pulse at
approximately 0,1 s to XPWROFF pin of the PSA to keep the power on. If
CTRLU fails to deliver this pulse, the PSA will remove power from the
system. When power off is requested CTRLU leaves PSA watchdog without reset. After the watchdog has elapsed PSA cuts off the supply voltages from the phone. CTRLU controls also the charger on/off switching in
the PWRU block. Battery charging is controlled by CSW line, which is
PWM–controlled output port.
Technical Documentation
– CTRLU – AUDIO
Interface between microcontroller and the NASTA circuit is bidirectional
8–bit data bus with 4 address lines. Address, data and control lines are
used in microcontroller as I/O–port pins. Data lines direction must be controlled with microcontroller data direction register. Interface includes address outputs NA0–3, data inputs (read) / outputs (write) ND0–7, chip select control output XNCS , read control output XNRD, write control output
XNWR and interrupt input XINT. To minimize power consumption, control
signals XRD and XCS should be in ’0’ state and address output NA0–3
and NWR in ’1’ state and data lines ND0–7 should be inputs .Buzzer is
controlled by BUZZ_DRV PWM signal. Headset adapter is detected by
HSCONN input.
– CTRLU – UIF and DISPLAY
Keyboard is connected directly to the controller. COL 0:3 are output lines
and ROW 0:3 are input lines. Watchdog is updated same time with keyboard scanning (XPWROFF). Keyboard scanning is done by driving one
COL to 0 V at time and ROWs are used to read which key is pressed.
Keyboards lights are controlled by KEYBLIGHT signal and LCD lights by
LCDBLIGHT signal.
LCD controller interface to microcontroller is a bidirectional data line
LCDDA, data serial clock line SCLK output, chip select control LCDENX
output, command or display data control LCDDC output and reset control
LCDRES output.
– CTRLU – RECEIVER
Received signal strength is measured over the RSSI line and intermediate frequency is measured over the IF line.
RX synthesizer and receiver are powered on/off by PSBS_EN line.
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– CTRLU – SYNTHESIZER
Frequency is controlled by the AFC signal. The synthesizer is controlled
via the synchronous serial bus SDAT/SCLK. The data is latched to the
synthesizer by the positive edge of the SLE line. The TX synthesizers
power on/off is controlled by VTX_ENA signal.
– CTRLU – TRANSMITTER
The transmitter on/off state is detected over the TXI line. The TXE line activates the power module. The power is controlled via the TXC line which
is a PWM–controlled output port (frequency about 9.4 kHz).
Extended standby mode for power saving
The extended standby mode is automatically activated when the phone is
working in the control channel (FOCC). The NASTA runs this function,
switching on/off the receiver’s power supply.
PSPS_EN signal:
– The signal connects the RX regulator on via the PSA when it is in ”1”
state, in ”0” state the RX regulator is off.
Baseband Module JP3
HPD_EN signal:
– The signal controls the RX synthesizers hardware power down function.
When it is in ”1” state the RX synthesizer is powered up, in ”0” state the
RX synthesizer is powered down.
Main Components
MCU
The H8/3093 is a CMOS microcontroller. All the memory needed 192kB
ROM, 4kB RAM) except the EEPROM, is located in the controller. The
MCU operating clock (2.4 MHz) is generated on the NASTA and the
VCTCXO. The H8/3093 is operating in single–chip normal mode (mode
3) 192kbyte address space, so all input/output pins are used as I/O–ports.
Pin Number Port Signal Description
1 PB0 SDAT
2 PB1 RSSI_READY RSSI readings synchronization
3 PB2 VIBRA_CONTROL Vibra alerting device on/off
4 PB3 RXD
Synthesizer data line
M2BUS net free timer input
5 PB4 EAREN
6 PB5 XPWROFF
7 PB6 PWRON
8 PB7 SLE
9 P90 TXD
Original 10/98
Earphone amplifier enable
Power off control
Power button state
Synthesizer latch enable
Serial interface (M2BUS)
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NHX-7
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Baseband Module JP3
10 P92 RXD
11 P94 ECLK
12 VSS GND
13 – 20 P30 – P37 ND0 – ND7
21 VCC VL
22 P10 NA0
23 P11 NA1
24 P12 NA2
25 P13 NA3
26 P14 XNCS
27 P15 XNWR
28 P16 XNRD
Technical Documentation
DescriptionSignalPortPin Number
Serial interface (M2BUS)
Serial data clock for EEPROM
Parallel data bus for NASTA
Address line for NASTA
Address line for NASTA
Address line for NASTA
Address line for NASTA
NASTA chip select
Write control to NASTA
Read control to NASTA
29 P17 LIGHTS
30 VSS GND
31 – 34 P20 – P23 COL0–COL3
35 – 38 P24 – P27 ROW0 – ROW3
39 P50 SCLK
40 P51 LCDENX
41 P52 LCDDC
42 P53 LCDSDA
43 P60 VTX_ENA
44 – 45 MD0 – MD1
46 NC NC
47 STBY VL
48 RES XRES
49 NMI NC
50 VSS GND
Keypad backlight control
Keypad outputs
Keypad inputs (Input pullup used)
Serial data clock for lcd driver
Chip select signal for lcd driver
Display or Command data
Data line for lcd driver
TX synthesizer enable. Active
high
Mode selection
Reset from PSA
51 EXTAL CLKMCU
52 XTAL NC
53 VCC VL
54 P63 TXE
55 P64 LIM
Page 2 – 12
External system clock from
NASTA
Transmitter on/off
Battery cut off limit selection
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Technical Documentation
56 P65 XEAR_EN
57 RESO NC
58 AVSS GND
59 P70 VBATSW
60 P71 VCHARG
61 P72 ICHAR
62 P73 BTEMP
63 P74 RSSI
64 P75 TXI
65 P76 HSCON
66 P77 BSI
67 VREF VA
Baseband Module JP3
DescriptionSignalPortPin Number
Headset earpiece amplifier control
Battery voltage
Charger voltage
Charging current measurement
Battery temperature
Received signal strength
Transmitter state monitor
Headset detecting voltage
Battery size indicator
68 AVCC VA
69 P80 XINT
70 P81 LCDRES
71 P82 LCDBLIGHT
72 P83 HEADSW
73 PA0 MIC_EN
74 PA1 LCDCLK
75 PA2 BUZZ_DRV
76 PA3 SCLK
77 PA4 CSW
78 PA5 EDATA
79 PA6 TXC
80 PA7 XMIC_EN
Interrupt request from NASTA
LCD reset signal
LCD backlight control
Headset switch indicator
Internal microphone control
LCD clock from NASTA
PWM output for buzzer
Serial clock for synthesizer
Charging control PWM
Eeprom data line
Transmitter power control
Headset microphone control
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NHX-7
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Baseband Module JP3
EEPROM
There is one 4kbyte EEPROM with 32byte OTP memory in the phone.
The EEPROM is a nonvolatile memory in which the tuning data for the
phone is stored. In addition, it contains the short code memory locations
to retain user selectable phone numbers. The OTP memory is ROM area
for identification and security purposes.
Table 1. EEPROM signals:
Pin No Signal Description
5 SDA
6 SCL
I2C bus data
I2C bus clock
PWRU Circuit
Technical Documentation
Power Distribution
The main components of the Power Unit are the PSA ( Power Supply
Asic) and the CHAPS ( Charger Power Switch ).
In normal operation the baseband is powered from the phone‘s battery.
The battery consists of three Nickel Metal Hydride cells. There is also a
possibility to use batteries consisting of one Lithium–Ion cell. An external
charger is used for recharging the battery and supplying power to the
phone. The charger can be either a standard charger that can deliver
around 400 mA or a so called performance charger, which can deliver
supply current up to 850 mA.
The baseband contains components that control the power distribution to
the whole phone excluding those parts that use continuous battery supply. The battery feeds power directly to three parts of the system: PSA,
RF–power amplifier, and UI (buzzer and display and keyboard lights).
The power management circuit CHAPS provides protection against overvoltages, charger failures and pirate chargers etc. that could otherwise
cause damage to the phone.
Signal
name
VBATT Battery
From
To
RF/UIF
Table 2. DC Characteristics of PWRU signals
Parameter Mini-
mum
Voltage 3.0 3.6 5.0/5.3 V
Current 3500 mA
Typi-
cal
Maxi-
mum
Unit Function
Supply voltage for RF
and UIF
XRES PSA
MCU,NAST A,UIF
Page 2 – 14
Logic high ”1” 0.7*VL VL V PSA is Power On
Mode
Logic low ”0” 0 0.3*VL V PSA is Power Off or
Reset Mode
Original 10/98
PAMS
CHAPS
S
d
NHX-7
Technical Documentation
Table 2. DC Characteristics of PWRU signals (continued)
Signal
PSA
MCU
PSA
MCU
To
Logic high ”1” VL–0.5 VL V Cutoff limit 5.0 V
Logic low ”0” 0 0.4 V Cutoff limit 4.6 V
Logic high ”1” 0.7*
Logic low ”0” 0 1.2 V Power On switch
Logic high ”1” VL–0.5 VL V Watchdog counter not
Logic low ”0” 0 0.4 V Watchdog counter re-
Logic high ”1” 0.7*VL VL V PSA is in Power On
Logic low ”0” 0 0.3*VL V PSA is in Power Off or
name
LIM MCU
XPWRON UIF
XPWR
OFF
PWRON PSA
Baseband Module JP3
ParameterFrom
Minimum
VBAT
Typi-
cal
mum
VBAT V Power On switch
open
closed
reset
set ”1” –> ”0”
Mode
Reset mode
FunctionUnitMaxi-
PSBS_EN
(Phone
upporte
Battery
Save)
HPD_EN NAST A
VTX_ENA MCU
VBATSW PSA
VCHARG PSA
ICHAR AMPLIFI-
NASTA
PSA
PLL circuit
PSA
MCU
MCU
ER
MCU
Logic high ”1” 2.0 2.90 V VRX Enabled
Logic low ”0” 0 0.5 V VRX Disabled
Logic high ”1” 2.0 2.90 V Harware power down
disabled on PLL circuit
Logic low ”0” 0 0.4 V Hardware power down
enabled on PLL circuit
Logic high ”1” VL–0.5 VL V TX VCO and synthe-
sizer powered on
Logic low ”0” 0 0.4 V TX VCO and synthe-
sizer powered off
Voltage 0 2.45 V
VBATSW/VBAT di-
vision ratio
Voltage 0 2.8 V
VCHRSW switch
resistance
Voltage 0 2.90 V Charger Current Mea-
0.436 0.45 0.464
0 0.25 1.0 Kohm
Switched internally di-
vited VBA T voltage
Switched Charger volt-
age
surement over the
shunt resistor.
TXD MCU
PSA
Original 10/98
Logic high ”1” VL–0.5 VL V M2BUS data output,
PSA M2BUS output is
in high–Z state.
Logic low ”0” 0 0.4 V M2BUS data output,
PSA M2BUS output is
LOW
Page 2 – 15
NHX-7
MCU
PSA
ACP–9
l
PAMS
Baseband Module JP3
Table 2. DC Characteristics of PWRU signals (continued)
Signal
name
To
RXD PSA
CSW MCU
Battery charging
Acceptable chargers are detected by the software. The absolute maximum input voltage is 30V due to the transient suppressor that is protecting the charger input. At the phone end there is no difference between a
plug–in charger or a desktop charger. The DC–jack pins and bottom connector charging pads are connected together inside the phone. The
charging block diagram is below.
Technical Documentation
ParameterFrom
Minimum
Logic high ”1” 2.0 2.90 V
Logic low ”0” 0 0.5 V
Logic high ”1” 2.0 2.90 V
Logic low ”0” 0 0.5 V
PWM frequency 1 32 Hz
PWM duty cycle 0 100 %
Typi-
cal
mum
FunctionUnitMaxi-
M2BUS data input
Charger switch and
control signa
LIM
CSW
MCU
MCU
0R22
VBAT
VBATSW
VCHARGSW
PSA
GND
VCHAR
LIM
VOUT
RSENSE
PWM
10k
27p
CHAPS
VCH
GND
TRANSCEIVER
1u
50.3k
10k
10k
Figure 2. Charging block diagram
30V
2A
VIN
CHRG_CTRL
L_GND
CHARGER
NOT IN
ACP–7
Startup charging
When a charger is connected, the CHAPS is supplying a startup current
minimum of 130mA to the phone. The startup current provides initial
Page 2 – 16
Original 10/98
PAMS
NHX-7
Technical Documentation
Baseband Module JP3
charging to a phone with an empty battery. The startup circuit charges
the battery until the battery voltage level reaches 3.0V (+/– 0.1V) and the
PSA releases the PURX reset signal and program execution starts.
Charging mode is changed from startup charging to PWM charging that is
controlled by the MCU software. If the battery voltage reaches 3.55V
(3.75V maximum) before the program has taken control over the charging, the startup current is switched off. The startup current is switched on
again when the battery voltage has decreased to 100mV (nominal).
Table 3. Startup characteristics
Parameter Symbol Min Typ Max Unit
VOUT Start– up mode cutoff limit Vstart 3.45 3.55 3.75 V
VOUT Start– up mode hysteresis
NOTE: Cout = 4.7 uF
Start–up regulator output current
VOUT = 0V ... Vstart
Vstarthys 80 100 200 mV
Istart 130 165 200 mA
Battery overvoltage protection
Output overvoltage protection is used to protect phone from damage.
This function is also used to define the protection cutoff voltage for different battery types (Li or Ni). The power switch is immediately turned OFF if
the voltage in VOUT rises above the selected limit VLIM1 or VLIM2.
Table 4. VLIM characteristics
Parameter Symbol LIM input Min Typ Max Unit
Output voltage cutoff limit (dur-
ing transmission or Li–battery)
Output voltage cutoff limit (no
transmission or Ni–battery)
VLIM1 LOW 4.4 4.6 4.8 V
VLIM2 HIGH 4.8 5.0 5.2 V
The voltage limit (VLIM1 or VLIM2) is selected by logic LOW or logic
HIGH on the CHAPS (N101) LIM– input pin. Default value is lower limit
VLIM1.
When the switch in output overvoltage situation has once turned OFF, it
stays OFF until the the battery voltage falls below VLIM1 (or VLIM2) and
PWM = LOW is detected. The switch can be turned on again by setting
PWM = HIGH.
Original 10/98
Page 2 – 17
NHX-7
PAMS
Baseband Module JP3
VCH
VCH<VOUT
VOUT
VLIM1 or VLIM2
SWITCH
ON OFF
Technical Documentation
t
t
ON
PWM (32Hz)
Figure above: Battery overvoltage protection
Battery removal during charging
Output overvoltage protection is also needed in case the main battery is
removed when a charger connected or a charger is connected before the
battery is connected to the phone.
With a charger connected, if VOUT exceeds VLIM1 (or VLIM2), the
CHAPS turns switch OFF until the charger input has decreased below
Vpor (nominal 3.0V, maximum 3.4V). The MCU software stops the charging (turn off PWM) when it detects that the battery has been removed.
The CHAPS remains in protection state as long as the PWM stays HIGH
after the output overvoltage situation has occurred.
Page 2 – 18
Original 10/98
PAMS
NHX-7
Technical Documentation
VCH
(Standard
Charger)
VOUT
PWM
Vpor
VLIM
4V
Vstart
”1”
”0”
Droop depends on load
& C in phone
Baseband Module JP3
Istart off due to VCH<Vpor
Vstarthys
t
t
SWITCH
1.1Battery removed, (standard) charger connected, VOUT rises (follows charger voltage)
2. VOUT exceeds limit VLIM(X), switch is turned immediately OFF
3.3VOUT falls (because no battery) , also VCH<Vpor (standard chargers full–rectified
4. Software sets PWM = LOW –> CHAPS does not enter PWM mode
5. PWM low –> Startup mode, startup current flows until Vstart limit reached
6. VOUT exceeds limit Vstart, Istart is turned off
7. VCH falls below Vpor
ON
OFF
2
output). When VCH > Vpor and VOUT < VLIM(X) –> switch turned on again (also PWM
is still HIGH) and VOUT again exceeds VLIM(X).
5
4
Figure above: Battery removal during charging
Different PWM frequencies ( 2Hz and 32 Hz)
When a travel charger (2– wire charger) is used, the power switch is
turned ON and OFF by the PWM input when the PWM rate is 2Hz. When
the PWM is HIGH, the switch is ON and the output current Iout = charger
current – CHAPS supply current. When PWM is LOW, the switch is OFF
and the output current Iout = 0. To prevent the switching transients inducing noise in audio circuitry of the phone soft switching is used.
6
7
t
The performance travel charger (3– wire charger) is controlled with PWM
at a frequency of 32Hz. When the PWM rate is 32Hz CHAPS keeps the
power switch continuously in the ON state.
Original 10/98
Page 2 – 19
NHX-7
PAMS
Baseband Module JP3
SWITCH
PWM (2Hz)
SWITCH
Technical Documentation
ON ONON OFF OFF
ON
PWM (32Hz)
Figure 3. Switch control with 2Hz and 32 Hz frequencies (in this case 50% duty cycle)
Charger Current measurement
The charging current measurement is based on the reading of differential
voltages over the shunt resistor at the CHAPS output lines. The voltage is
measured and amplified by a differential amplifier and it is carried to the
MCU A/D converter. Measurement area is up to 1400 mA and 1 A/D bit
equals 1.85 mA. The charging current calibration is done with 0 mA and
500 mA in production test line. When charger is connected the current
measurement connection is activated. The A/D–conversion result and
charging current can be calculated from equations :
A/D readout = 1024 * V
Charging current:
I=(V
ICHAR
– V
(0mA)) * (500mA/(V
ICHAR
ICHAR
/ VREF
(500mA) – V
ICHAR
ICHAR
(0mA))
where VREF=2.82 V
Page 2 – 20
V
ICHAR
= voltage in ICHAR line
Original 10/98
PAMS
ICHAR
NHX-7
Technical Documentation
Name Min Typ Max Unit Notes
V
ICHAR
From Charger input line
0.46 0.69 0.92 V
163 250 334 A/D
1.22 1.44 1.65 V
443 522 598 A/D
1.98 2.19 2.39 V
718 795 867 A/D
Baseband Module JP3
Table 5. Charger current measurement
Charging current is 0 mA. ( Calibration point )
Charging current is 500 mA. ( Calibration point )
Charging current is 1000 mA.
680k
100k
0R22
CHAPS
Ichar
Battery identification
Different battery types are identified by a pull-down resistor inside the battery pack. The BSI line inside transceiver has a 22k pull-up to VA. The
MCU can identify a battery by reading the BSI line DC–voltage level with
a MCU (D201) A/D–converter.
22k
100k
680k
3k9
12k
+VA
Figure 4. Charger current measurement
1u
Ichar
A/D
conv.
MCU
Original 10/98
Page 2 – 21
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