Page 1
Nokia Customer Care
Service Manual
RM-469; RM-481; RM-482; RM-483 (Nokia E52;
Nokia E55; L3&4)
Schematics
Part No: (Issue 1)
COMPANY CONFIDENTIAL
Copyright © 2009 Nokia. All rights reserved.
Page 2
MODE
CUSTOMERS NOT USING PA BLANKING
MODE
(PREVENTS FLOATING
INPUT)
C
A
1)TRACK INDUCTANCE FROM VDD_DIG, N6200-H5 TO C6212 MUST BE 1nH MAX.
2)TRACK INDUCTANCE FROM VCC_XXX, N6200 TO DECOUPLING CAPS MUST BE 1nH MAX.
SEE NOTE 2
1
4 6
65
C
5
B B
4
2
D
A
32
D
31
GPS COST 4.0
REF RANGE = 6200-6299
N6200 (PIN)
PLACE CLOSE
TO PIN H5
PLACE CLOSE
TO PIN A2
IO_PA_EN
GND
CONNECT
TO
100n
SEE NOTE 1
NOTES
Name
GPS COST 4.0
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
C6206
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
C6202
100n
J6201
J6202
J6200
GND
OUT+Vcc
GNDGND
VCC_TCXO
GND
VDD_DIG
H5
H6
IO_PA_EN
VSS_DIG
H7
H8
VSS_DIG
-16.368M
G6200 16.368MHz
KT21F-CCW25A
VDDS
G5
G6
U2TX
G7
PG_PULSE_EN
VDD_DIG
G8
H1
VBAT1
GPS_EN_RESET
H2
AGPS_CLK_REQ
H3
VSS_DIG
H4
F5
F6
BYPASS
F7
VSS_DIG
F8
VDDS
G1
VSS_IF
G2
VCC_IF
TEST_IF_P
G3
G4
SLEEPXN
TDI
E5
E6
I2C_SDA_U1RX
VSS_DIG
E7
E8
IO_TIMESTAMP_DATARDY
VSS_ANALOG
F1
F2
VCC_TCXO
TEST_IF_M
F3
VBAT1
F4
I2C_UART_N
IFORCE
D6
TCK
RTC_CLK
D7
TMS
D8
E1
VBAT2
E2
VCC_MIX
E3
VSS_MIX
CONFIG_MODE
E4
C5
TDO
NTRST
C6
C7
IO_INT_U1CLK
C8
IO_RF_LNA_EN
LNA_IN
D1
D2
VSS_LNA
VSS_MIX
D3
VPP
D4
D5
XTAL_OUT
B4
DBGEN
B5
B6
I2C_SCL_U1TX
B7
VDD_DIG
B8
VSS_DIG
VCC_LNA
C3
C4
VPP
A3
VCC_PLL
A4
GPS_CLK
VSENSE
A5
REF_CLK
A6
A7
VDDS
VSS_DIG
A8
B2
VSS_LNA
VSS_PLL
B3
GND
N6200
GPS5350_ROM3.0
A1
VCC_LNA
VBAT3
A2
C6209
100n
GND
100n
C6212
C6205
100n
GND
GND
GND
GND
C6211
3p3
1575.42MHz
B39162B9080L310
Z6200
IN OUT
C6201
33p
VCC_TCXO
3n9H
L6200
6n8H
L6201
6
GND
C6200
33p
100n 100n
C6203
GND
C6204
GND3GND
100n
C6210
4
7
1
0
5
2
C6207
100n
GND
VIO_GPS
VBATT_1_3_GPS
GPS(15:0)
VIO_GPS
GND GND
VBATT_2_GPS
VIO_GPS
ANT_GPS
VIO_GPS
VBATT_2_GPS
REFCLK_I
VBATT_1_3_GPS
Page 3
RFBusClk
RFBusDa
RFBusEn1X
RXQP
7000-9999
RXQN
VREF
TXC
4
VBATRF
AFC
RFTEMP
WTXDET
RFClkP
6
1 2 3
4 5
A
5 6
C
3
VXO
D
1 2
B
A
VCP1
VREFRF01
TXResetX
0
6
3
0
RXIP
D
C
TXQP
TXQn
TXIP
TXIN
IREF
RFClkN
RXIN
WLAN(15:0)
7
8
1
1
0
3
4
0
0
RFEXT
schematic
ANT
BT(23:0)
OSC_IN
PUSL(15:0)
RFC10
RFC11
RFCLKEXT_BT
RFCLKEXT_GPS
RFCLKEXT_IN
VXO
Vbat
Vcp1
VrefRF01
2
6
7
9
1
0
1
RFbusClk
RFbusDat
RFbusEna
RXIN
RXIP
RXQN
RXQP
TXC
TXIN
TXIP
TXQN
TXQP
TXresetX
VREFCM
VXO
Vbat
Smashed
R6RF
R6RF
AFC
ANT
Aux_cntrl1
Aux_cntrl2
Aux_cntrl3
Aux_cntrl4
DAC_REF1
RFCLKEXT
RFCLKN
RFCLKP
PUSL(15:0)
PWRONX
REFCLK_I
RFCLK(1:0)
RFCONF(20:0)
RFCTRL(11:0)
RFClkExt
RFClkExt_GPS
RFPWR(5:0)
SLOWAD(6:0)
SSI(7:0)
TXCCONV(4:0)
WLAN(15:0)
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
BB
BT(23:0)
COMP_VIDEO
DVB_H(15:0)
FMANT
FMRADIO(20:0)
GAZOOIO(3:0)
5
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
CMT ENGINE
Name
REFCLK_I
RFCTRL(11:0)
TXCCONV(4:0)
PWRONX
SSI(7:0)
BT(23:0)
SLOWAD(6:0)
FMRADIO(20:0)
FMANT
GAZOOIO(3:0)
COMP_VIDEO
PUSL(15:0)
WLAN(15:0)
DVB_H(15:0)
RFPWR(5:0)
RFCONV(20:0)
RFCLK(1:0)
BT(23:0)
WLAN(15:0)
1
8
4
Page 4
1 2 3 4 5 6
D
C
B
A
D
2200-2399
2900-2999
C
B
A
1 2 3 4 5 6
Name
BB TOP LEVEL
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
MMC(15:0)
MMC2(15:0)
PUSL(15:0)
REFCLK_I
RFCLK(1:0)
RFCONV(20:0)
RFCTRL(11:0)
RFID(4:0)
SENSORS(15:0)
SSI(7:0)
TXC(2:0)
USB(20:0)
WLAN(15:0)
XAUDIO(7:0)
XENA(10:0)
DVB_H(15:0)
EMINT(3:0)
ETM(20:0)
FMRADIO(20:0)
FMTX(15:0)
GPS(15:0)
I2C0(1:0)
I2C1(1:0)
I2C2(1:0)
INT_MMC(13:0)
INT_SIM(5:0)
IRDA(2:0)
JTAG(6:0)
KEYB(15:0)
LCD(99:0)
LED(10:0)
PWRONX
RFPWR(5:0)
SIM(6:0)
SLOWAD(6:0)
TXC(2:0)
TXC_CONV(4:0)
USB(20:0)
XAUDIO(7:0)
DIGI
ACI(7:0)
AUDIO(13:0)
AUDIOTEST(5:0)
AV(5:0)
BT(23:0)
CBUS(3:0)
CCP(30:0)
DIG_AUDIO(20:0)
POWER
ACI(7:0)
AUDIO(13:0)
CBUS(3:0)
CHARGER
DIG_AUDIO(20:0)
EMINT(3:0)
GAZOOIO(3:0)
H_BRIDGE(5:0)
INT_MMC(13:0)
INT_SIM(5:0)
LED(10:0)
MMC(15:0)
PUSL(15:0)
REFCLK_I
RFID(4:0)
SENSORS(15:0)
SIM(6:0)
SLOWAD(6:0)
USB(20:0)
WLAN(15:0)
XAUDIO(7:0)
XENA(10:0)
GAZOOIO(3:0)
GPS(15:0)
H_BRIDGE(5:0)
I2C0(1:0)
I2C1(1:0)
I2C2(1:0)
IRDA(2:0)
JTAG(6:0)
KEYB(15:0)
LCD(99:0)
LED(10:0)
MMC(15:0)
MMC2(15:0)
PUSL(15:0)
PWRONX
REFCLK_GPS
CMT_IF
ACI(7:0)
AUDIO(13:0)
AUDIOTEST(5:0)
AV(5:0)
BT(23:0)
CCP(30:0)
CHARGER
COMP_VIDEO
DIG_AUDIO(20:0)
DVB_H(15:0)
ETM(20:0)
FMANT
FMRADIO(20:0)
FMTX(15:0)
RF_BB
LPRFCLK
RFClkExt
PWRONX
RFClkExt
RFCONF(20:0)
RFCLK(1:0)
RFCTRL(11:0)
GAZOOIO(3:0)
SSI(7:0)
BT(23:0)
PUSL(15:0)
TXCCONV(4:0)
SLOWAD(6:0)
FMRADIO(20:0)
FMANT
COMP_VIDEO
WLAN(15:0)
LPRFCLK
DVB_H(15:0)
REFCLK_I
RFClkExt_GPS
RFPWR(5:0)
Page 5
6
1 2 3 4
D
5 6
3 4 5
C
TOP SHEET
CBB5X
B
A
D
C
B
A
1 2
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
LPRFCLK RFClkExt
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
RF_BB
Name Appr
Page 6
schematic
5
2100-2199
4
A
GPS
D
B
1
1 32
3300-3399
6300-6399
6000-6199
2000-2099
2400-2599
2700-2799
3100-3199
Combined WLAN/BT/GPS antenna contact
1400-1499
5
6200-6299
3
D
2
C
3200-3299
4
B
6
C
A
SIM(6:0)
SLOWAD(6:0)
XAUDIO(7:0)
6
UI
UI
AV(5:0)
CCP(30:0)
GAZOOIO(3:0)
H_BRIDGE(5:0)
I2C0(1:0)
I2C1(1:0)
I2C2(1:0)
KEYB(15:0)
LCD(99:0)
LED(10:0)
MMC(15:0)
PUSL(15:0)
PWRONX
SENSORS(15:0)
GND
CAMERA
edof+senna
CCP(30:0)
COMP_VIDEO
I2C1(1:0)
XENA(10:0)
VIO
MMC
empty
MMC(15:0)
MMC2(15:0)
DIPLEXER
Z6400
GND
P1 P3
P2
X6401
GND
VBAT
schematic
WLAN
ANT_WLAN
BT_RF
BT_WLAN(6:0)
REFCLK_I
VIO_WLAN
WLAN(15:0)
GND
e-anc
AUDIO
AUDIO(13:0)
DIG_AUDIO(20:0)
H_BRIDGE(5:0)
XAUDIO(7:0)
SENSORS
sv09
SENSORS(15:0)
GND
VIO
5420002
X6400
IN1
OUT2
GND
A2800
POWER_SHIELD
VIO
VIO
schematic
BT_FM
ANT_BT
BT(23:0)
BT_WLAN(6:0)
FMANT
FMRADIO(20:0)
REFCLK_I
VBAT_BT
VDD1V8_BT
VIO_BT
cost4.0
ANT_GPS
GPS(15:0)
REFCLK_I
VBATT_1_3_GPS
VBATT_2_GPS
VIO_GPS
VIO
VIO
hs_usb_charging
HS_USB
I2C2(1:0)
PUSL(15:0)
SLOWAD(6:0)
USB(20:0)
SIM
empty
SIM(6:0)
Z6401
W=0.40
L=
GPS-SHIELD
A6200
040-049701
EMU_RAP
schematic
AUDIOTEST(5:0)
ETM(20:0)
JTAG(6:0)
schematic
CONN
ACI(7:0)
AUDIO(13:0)
AV(5:0)
CHARGER
COMP_VIDEO
ETM(20:0)
FMANT
JTAG(6:0)
SLOWAD(6:0)
XAUDIO(7:0)
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
IF Top Level
Name Appr
PUSL(15:0)
FMANT
H_BRIDGE(5:0)
SENSORS(15:0)
MMC2(15:0)
SENSORS(15:0)
PUSL(15:0)
CCP(30:0)
XAUDIO(7:0)
FMRADIO(20:0)
GPS(15:0)
XAUDIO(7:0)
H_BRIDGE(5:0)
DIG_AUDIO(20:0)
AUDIO(13:0)
IRDA(2:0)
I2C1(1:0)
CCP(30:0)
GPS(15:0)
REFCLK_GPS
SLOWAD(6:0)
COMP_VIDEO
REFCLK_I
BT(23:0)
FMRADIO(20:0)
WLAN(15:0)
MMC(15:0)
MMC2(15:0)
SIM(6:0)
SIM(6:0)
XAUDIO(7:0)
SLOWAD(6:0)
CHARGER
JTAG(6:0)
ETM(20:0)
RFID(4:0)
USB(20:0)
DVB_H(15:0)
SLOWAD(6:0)
SIM(6:0)
PWRONX
MMC(15:0)
LCD(99:0)
KEYB(15:0)
I2C2(1:0)
I2C1(1:0)
I2C0(1:0)
LED(10:0)
AV(5:0)
GAZOOIO(3:0)
AV(5:0)
AUDIOTEST(5:0)
ACI(7:0)
AUDIO(13:0)
FMTX(15:0)
XENA(10:0)
JTAG(6:0)
ETM(20:0)
COMP_VIDEO
I2C2(1:0)
Page 7
B
4
C
6
3
5
A
1
C
1
D
2 3
2000-2059
CHARGER
COMP_VIDEO
FMANT
SLOWAD(6:0)
XAUDIO(7:0)
2060-2069
B
4
2
2070-2099
5
A
6
D
SYS_CONN
avconn35_novideo
ACI(7:0)
AUDIO(13:0)
AV(5:0)
BATTERY_CONN
tabby
SLOWAD(6:0)
PROD_TEST_PATTERN
7pin
ACI(7:0)
ETM(20:0)
JTAG(6:0)
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
JTAG(6:0)
ETM(20:0)
XAUDIO(7:0)
SLOWAD(6:0)
FMANT
COMP_VIDEO
CHARGER
AV(5:0)
AUDIO(13:0)
ACI(7:0)
ACI(7:0)
System and battery connector
Name
Page 8
4
BTEMP NTC
6
NOTE !! BYPASS CAP connected to GND!!!
3
A
1 4
5
3
Tabby
2
J2071
6
B
D
1
2
C
5
PLACE R2070 NEAR BATTERY CONNECTOR !!!
NOTE !! R2070 IS NEEDED IF GAZOO IS FAR FROM BATTERY CONNECTOR !!!
B
A
D
C
V2070
IP4302CX2LF
GND
J2072
J2070
1 +
GND2
BSI3
150u_6V3
2611822
C2071
2
X2070
1820051
R2071
-t
VBAT
GND
GND
47k
Name
Battery Connector
3
BGND
SLOWAD(6:0)
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
Page 9
64
BB5.44 have defined 6-pin test pad pattern
CLK
TXD
RXD0
RXD1
2
B
Traceability pad
32
C
1
2
3
4
5
1
6
GND
C
D
5
CLK2 (MBUS)
VBUS pad moved near to X3300 (USB connector)
A
61
D
B
5
3
A
4
V2061
IP4302CX2LF
GND
4
GND
J2060
7
4129311
ESDA14V2-4BF3
R2060
A1
A3
GNDB2
C1
C3
This document is property of Nokia Corporation
6
6
5
Production test pad
Name Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
JTAG(6:0)
ETM(20:0)
ACI(7:0)
GND
X2060
1
Page 10
D
a differential pair from
21
6
XEARL
For production testing
SCL
HS_EAR_R
HS_MIC
HS_GND
PLUG_DET
XEARR
6
4
3
XEARLC
XEARRC
3
2710203
These components near AV connector
2
MicB2
place near Gazoo
5
B
place near N2037
A
ASIC when video switch is not use
3.5mm AV CONNECTOR
C
(this side of green barrier)
MIC2N
4
(ESD)
5
HS_EAR_L
C
USB charging only
B
HeadDet
HookDet
18p
2320604
C2008
4
AVPaEn
2320783
MIC2P
D
1
ROUTE HS_MIC and HS_GND as
A
ECI: 10R needed between ASIP and
SDA
AV connector to ASIP
2710203
2C2004 2710203/2 1u5
220R
GND
C2004 1 /2 1u5
Z2001
W=0.10
L=
R2044
2k2
2k0
A2 ECIMicBias A3
Mic2pB1
GND
B2
B3
to ASIC C1 Mic2n
C2
C3
GND
2
8
4129320
N2037
EMIF03-MIC06F3
C=1n0
2k2
1k0
GND
C2005
2u2
/2 1u51
C2030
6
3
RIGHTINM
C4
HPRIGHT
D1
D2
SCL
SDA
D3
_SD
D4
VBAT
GND
HPLEFT
CPVSS
B2
LEFTINP
B3
B4
LEFTINM
VDD
C1
C2
GND
C3
RIGHTINP
34
N2000
4342145
TPA6130A2YZHR
A1
CPN
CPP
A2
GND
A3
A4
VDD
B1
B2
C1 C2
EXC24CN601X
L2002
3200012
1 2
GND
R
C
C
Z2000
IP5311CX5_LF
R
4129307
A1 A2
18p
27p
2320546
C2002
J2004
C2009
2320604
1
GND
7
68nH
3646081
L2003
2u2
C2006
GND
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
2351104
1
4
5
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
AV-CONNECTOR
Name
1
2
3
4
5
6
Shield
Shield
GND
C2007
2351104
5469661
X2001
2u2
2
GND
R2037
10R
C2034
33n
C2033
33n
J2003
J2002
GND
220n
2320143
4129313
V2002
C2040
5
L2001
3203855
120R/100MHz
COMP_VIDEO
SLOWAD(6:0)
FMANT
ACI(7:0)
AUDIO(13:0)
AV(5:0)
XAUDIO(7:0)
CHARGER
/2 1u52C2030
Page 11
TMS
TDI
4
5
1 3
D
C
found J2060 pad 7
found J2060 pad 2
A
B
found J3106
found J3105
4
found J2060 pad 3
Stack JTAG/
JTAG
TMS
TRST
TDI
TDO
TCLK
EMU0
EMU1
TCLKret
TMS/
TDO/
TRST/
TDI/
TCK/
XTI
Stack JTAG
TDO
TCK
TRST
J3100
C
A
XTI_TX3
3
XTI_CLK
XTI_TX0
XTI_RX
XTI_TX1
XTI_TX2
5 6
61
D
2
2
B
1
J3101
J3102
J3103
0
16
3
2
Appr
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
6
5
5
Test Interface
Name
20
7
6
5
0
5
6
J3107
J3105
GND
J3114
3
1
2
4
J3112
J3113
J3106
J3108
J3109
J3110
J3111
JTAG(6:0)
ETM(20:0)
AUDIOTEST(5:0)
ETM(20:0)
ETM(20:0)
JTAG(6:0)
JTAG(6:0)
J3104
Page 12
GAZOO LS A/D CONVERTER
VBUS PIN
The tolerance has to be 1%
Place R3304 as close to Rapu as possible
2
SDA
1
Pins E4 and E2 must be connected to the battery with separate wires
SCL
(this side of green barrier)
3
1
CSIN, CSOUT, SW and DCIN traces must withstand 1.25A
6
These components near USB connector
D
preferable routing layers are 4 and 5 with minimum trace width in order to achieve 90ohm differential impedance
maintain symmetry in routing and match trace lengths between signals and also pairs
PUT THESE CAPACITORS CLOSE TO N3301
A
so that the length of the traces is minimized
For production testing
USE THE SECOND PCB GEOMETRY SYMBOL FOR R3367
D
2
B
A
4
C
43
B
4129015
5
INSTRUCTIONS FOR LAYOUT:
USB interface: Differential interface, place ESD protection as close connector as possible
C
5 6
GND
GND
VIO
GND
ULPI interface: It is recommended to place ULPI transceiver as close to RAPU as possible,
CONNECTED TO GAZOO
C3310
2320778
10n
1
0
GND GND
8
C3306
2351017
100n
12k
1430848
R3300
1445348
R3367
ERJ2BWFR068X
SENSE
CURRENT1
2 3
4
5
4u7
2351050
C3301
VBAT
C3304
2351050
4u7
A
VIO
GND
2351075
C3307
N3300
IP4387CX4_LF
K
GND
100n
GND
X3300
VBUS
D-
D+
ID
GND
C3322
2351176
4u7
GND
GND
GND
14
15
3203845
Z3301
4129279
A1
A2
B1
B2
GND
16
VBAT
GND
USBULC6-2F3
Z3300
GND
2u2
2351104
C3313 C3315
2351104
2u2
GND
4u7
2351176
C3312
7
GND
100n
2351017
C3318
100n
2351017
C3300
10u
2351061
C3365
C3303
2351017
100n
R3304
GND
GND
47R
GND
GND
GND
5119045
F3300
2.0A
C3314
GND
1
0
J3300
GND
3200015
1430754
R3302
GND
7
6
5
4
3
2
i.c.
GND
1k0
REG3V3
E3
DIR
E5
REG1V8
E6
CHRG_DET_POL
F1
F2
CHRG_DET
VCC
F3
F4
VBUS
F5
XTAL1
F6
DATA7
DP
D1
D3
ID
PSW
D4
NXT
D5
D6
STP
CHRG_DET_EN_N
E1
E2
FAULT
B3
CFG1
B4
B5
VCC(IO)
B6
DATA6
DM
C1
C2
RREF
C3
CHIP_SEL_N
C4
TEST_N
C6
A1
A2
DATA2
A3
DATA3
CLOCK
A4
DATA4
A5
DATA5
A6
DATA0
B1
B2
VCC(IO)
CHIP_SEL
GND
J3301
D3300
ISP1707AET
GNDC5,D2,E4=
4342135
DATA1
11
10
9
12
VIO
GND
Appr
Copyright (C) Nokia Corporation. All rights reserved.
L3305
1uH3640284
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
HS USB
Name
D4
CSIN
E1
E2
AUXPWR
VREF
E3
E4
CSOUT
VBUS
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
B4
SW
C1
C2
SW
SW
C3
C4
STAT
D1
PGND
PGNDD2PGND
D3
OTG
VBUS
A1
A2
VBUS
BOOT
A3
A4
SCL
B1
PMID
PMID
B2
B3
PMID
SDA
4110064
BQ24151YFFR
N3301
4342417
SLOWAD(6:0)
"Note!"
"Note!"
"Note!"
PUSL(15:0)
VBAT
MAZA062029JN
V3301
"Note"
"Note"
"Note!"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note"
USB(20:0)
"Note"
USB(20:0)
I2C2(1:0)
Page 13
Reset
Da
4
1
C
B
A
D
C
B
A
11
62
5
3
6
1
2 3 4
D
5
CLK
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
1
3
2
SIM(6:0)
SIM interface
Name Appr
Page 14
52
1 54
FM_AUDIO_LP
FM_INTX
UART_WAKE
SLEEPCLK
ANT_FM
(6) For 3.6V supply voltage connect VBAT_BT input to VBAT 3.6V supply, VDD1V8_BT input must be Not Connected
For 1.8V supply voltage connect VDD1V8_BT and VBAT_BT inputs to 1.8V supply
Do not connect VDD1V8_BT if VBAT 3.6V supply is used
C C
I2S/PCM_IN
I2S/PCM_OUT
UART_WAKE
Notes
BLUETOOTH & FM RADIO MODULE WITHOUT RF FILTER
BT_RESETX
BT_WAKEUP
I2C_SDA
I2C_SCL
Place R6000 close to Rapu
(5) Pull-down is required on BTH_CLK_REQ signal (see release note)
See Note (5)
A
I2S_SDO
I2S_WS
I2S_CLK
I2S_WS
6
FM_AUDIO_RN
FM_AUDIO_LP
FM_AUDIO_LN
I2S_SDO
See Note (6)
I2S/PCM_OUT
I2S/PCM_SYNC
BT_RF_ACTIVE
BT_STATUS
BTH_CLK_REQ
(3) D6000 BTHFMRDS2.1M_WLAN module includes an internal dc blocking capacitor between BT_ANT (pin 15) and ASIC BT_ANT RF terminal.
(4) Additional components for phone wing boards are given in BTHFMRDS2.1_TEST release
ANT_BT
SYSCLK
ANT_BT
BTH_CLK_REQ
BT_STATUS
BTH_CLK_REQ
BT_TX_CONFX
BT_RF_ACTIVE
BT_RESETX
3
1
(2) C6001 and C6002 should be placed in the Bluetooth area, so that the differential audio lines to Retu ASIC are equal length.
2
A
UART_TX
UART_RX
UART_CTS
I2S/PCM_CLK
D
B
FM_AUDIO_RP
Remove J6007 before
mass production
FM_INTX
I2C_SCL
UART_RTS
I2S/PCM_CLK
I2S/PCM_SYNC
(1) 3k3 Pull-up Resistors are required on I2C_SCL, I2C_SDA.
See Note (1)
I2C_SDA
FM_AUDIO_RP
3
SYSCLK
SLEEPCLK
FM_AUDIO_RN
BTH_CLK_REQ
6
ANT_FM
UART_TX
See Note (2)
BT_TX_CONFX
B
4
D
I2S_CLK
UART_RX
UART_CTS
BT_WAKEUP
UART_RTS
FM_AUDIO_LN
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
Bluetooth - FM
Name
Right and left channels of FM Radio swapped in the 71.32 configuration
due to "FM Radio crackles when ECI headset is used with Gazoo" issue.
This fix is valid with >Gazoo3.4 and >Pearl4.0.
I2S/PCM_IN
2
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
GND
1
0
220n
2320143
C6002
9
7
GND
220n
2320143
C6001
1
4
5
4
BT_UART_RTS
BT_UART_CTS
5
6
BT_UART_RX
BT_UART_TX
7
8
VIO(1.8V)
9
VAFR
0
3
BT_PCM_SYNC/I2S_WS
UART_WAKEUP
30
31
BT_WAKEUP
INTX
32
VReg.1.8
33
I2S_WS
34
I2S_SCK
35
I2S_SDO
36
22
BT_RESETX
23
SLEEPCLK
GND
24
VBAT
25
BT_PCM_OUT/I2S_DO
26
27
TX_CONFX
28
RF_ACTIVE
STATUS
29
15
BT_ANT
GND
16
SCL
17
SDA
18
19
GND
2
BT_PCM_CLK/I2S_CLK
20
FMANTENNA
GND
21
4390051
1
BT_PCM
10
VAFL
11
GND
REF_CLK
12
CLK_REQ
13
14
GND
2
21
J6007
11
BTHFMRDS2.2M_ES1.5
D6000
13
0
12
11
9
8
7
6
2
1
11
6
3
2
1
12
11
13
0
6
8
9
8
7
6
5
4
3
2
6
2
1
0
33R
R6000
10
1
0
GND
21
2
7
10
8
9
J6004
J6005
J6006
J6001
J6002
J6003
BT(23:0)
BT(23:0)
VIO_BT
ANT_BT
FMRADIO(20:0)
FMANT
VBAT_BT
BT_WLAN(6:0)
VDD1V8_BT
REFCLK_I
J6000
Page 15
2351017
EARN
EARP
D
C
B
Knopfler
6
IHFSpLP
Primary mic (This is the main microphone of the phone)
11x15mm IHF speaker
5
C
B
Knopfler
A
Secondary mic
INSTRUCTIONS FOR LAYOUT:
If AudioClk is shared from RAPU to both Gazoo and DigiMic then it is recommended to put termination
2-mic noise cancellation (uplink)
AudioClk/DigiMicClk: Shield AudioClk trace from every direction in order to avoid crosstalk injected to it.
4
2351017
6
D
4
Geometry of 4 pads used!!!
resistors in the beginning of both traces (Values have to be defined case by case with simulations)
Digi Mic
R2104
2
IHFSpLN
2351017
Petra earpiece
A
3
2 3
1
Digi Mic
1
2320744
5
27p
2R2
C2103
5140002
B2101
NOT_ASSEMBLED
1
+
2-
27p
C2104
GND
GND
GND
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
C2115
100n
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
ApprName
AUDIO
This document is property of Nokia Corporation
VDigimic
120R/100MHz
3203855
L2101
2R2
GND
GND GND
R2105
18V/30V
R2102
R2103
18V/30V
C2107
6
CLK
23
DATA
VDD
4
5GND
1n0
VDigimic
0
1
B2104
MAB-03A-T-D
1
L/R
R2101
56R
GND
L2104
3203855
120R/100MHz
J2100
7
GND
GND
C2106
1n0
C2105
1n0
MAB-03A-T-D
B2100
L/R
1
2
CLKDATA
3
4
VDD
GND 5
0
1
5149037|ALT
B2102
NOT_ASSEMBLED
+
-
7
VDigimic
6
V2101
A1 A2
B1
B2
C2116
100n
DLM11GN601SZ2D
1 2
34
GND GND
ESDA14V2-2BF3
XAUDIO(7:0)
DIG_AUDIO(20:0)
"Note"
AUDIO(13:0)
H_BRIDGE(5:0)
"Note!"
L2100
3203805
Page 16
B
C
Digital Ambient Light Sensor
ACCINT2
AGUMON
I2C0SCL
I2C2SDA
I2C2SCL
Entry 3D Magnetometer
I2C0SDA
INT
DRDY
D
A
B
C
A
1 2 3 4 5 6
1 2 3 4 5 6
D
Accelerometer
I2C0SDA
ACCINT1
I2C0SCL
3
AVDD
AVSS
4
5
TEST1
TEST2
6
TEST3
7
8
TEST4
TEST5
9
GND
DVDD
1
10
SLV0
11
SLV1
12
TEST6
13
INT
14
DRDY
SCL
15
SDA
16
2
DVSS
2
3
AMI305
N1103
4600007
INT2
9
VIO
VAUX2
GNDGNDGND
Res
12
SDO
13
SDA/SDI/SDO
SCL/SPC
14
GND
2
3
Res
4
GND
5
GND
VDD
6
7
CS
INT1
8
1
6
GND
LIS302DL
N1102
4605987
1
Vdd_IO
10
GND
11
Vdd
1
GND
2
ADR_SEL
3
SCL
4
5
SDA
6
INT
100n
5
4860012
N1100
TSL2563CL
2351017
C1103
GND
9
GND
VAUX2
100n
C1100
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
100n
C1104
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
SENSORS HW71
Name
GND
3
2
VIO
VAUX1
13
GND
10
VAUX2
C1105
0u47
J1102
J1103
VIO
GND
J1101
SENSORS(15:0)
C1106
10n
Page 17
A
5
Place J6304 close to Rapu
RECOMMENDED FOR CUSTOMER CARE.
B
6
HOWEVER THE FOLLOWING ARE
41
NOTE:- ALL TEST POINTS ARE OPTIONAL
Place R6300 close to N6300
Place J6302 close to N6300
Place R6301 close to Rapu
J6301, J6302, J6306 & J6307
D
5
2
C
31
REFS 6300-6399
2
WLAN SIZE 4.0
4
C
33R
R6301
B
6
D
A
3
J6307
J6300
R6300
56R
J6302
J6303
J6304
8
VBAT
J6305
0
1
3
6
4
5
F2
F3
CLK
NC
F4
F5
GND42
VIO
F6
SLEEP_CLK
F7
RS232_TXF8
F9 RS232_RX
2
E4
GND34
E5
GND35
E6
GND36
GND37
E7
E8
GND38
E9
GND39
GND40
F1
UART_TX
F10
F11
GND43
GND41
GND26
D5
D6
GND27
D7
GND28
D8
GND29
GND30
D9
E1
ANT
E10
VBATT3
E11
VBATT
GND32
E2
E3
GND33
C6
GND17
C7
GND18
GND19
C8
GND20
C9
D1
GND22
GND31
D10
VBATT2
D11
GND23
D2
GND24
D3
GND25
D4
GND8
GND9
B7
B8
GND10
GND11
B9
C1
BT_PRIORITY
C10
GND21
C11
PMEN
C2
GND13
GND14
C3
GND15
C4
C5
GND16
SPI_DOUT
A7
A8
SPI_DIN
SPI_CLK
A9
BT_RF
B1
B10
GND12
CLK_REQ
B11
B2
GND4
GND5
B3
B4
GND6
GND7
B5
B6
GND
8
GND
9
A1
GND1WLAN_IRQ
A10
GND3
A11
GND2
A2
A3
BT_TX_CONFX
BT_FREQ
A4
BT_RF_ACTIVE
A5
SPI_CSX
A6
11
GND
12
GND
GND
13
14
GND
GND
2
GND
3
4
GND
5
GND
GND
6
7
GND
N6300
ENW49701N_LGA80
1
GND
GND
10
Name
WLAN
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
GND
6
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
ANT_WLAN
VIO_WLAN
BT_RF
WLAN(15:0)
BT_WLAN(6:0)
REFCLK_I
GND
3
2
1
0
Page 18
Place C1420 close to pin C1!
VCAP
Flash led
I2C SCL
4
Place J1405 close to ACME Lite
D
CCPDaP
The GND of the components C1420, C1421, C1422 and N1420
need to be connected together
CCPDaN
VANA
5
maintain symmetry in routing and match trace lengths between signals and also pairs
B
5 6
Place capacitors close to VANA pin!!!
2
SENNA
C
4
Place capacitors close to VDIG pin!!!
D
I2C_SCL
1
3.2MPIX SMIA65 CAMERA (EDOF) + SENNA + POLARIS 2 FLASH
Cam Clks: Shield Cam Clk traces from every direction in order to avoid crosstalk problems
GND
A
CCP_CLKN
CCP interfaces: Differential interface, termination resistors as close to RAPU as possible without any stubs,
Strobe
I2C_SDA
Cam_Reg_2V8
CCP_DATAN
6
4341999 is a Master code of the Senna
CCP_CLKP
A
CCPClkN
Place R1400 as close to Rapu as possible
Place R1401 as close to Rapu as possible
Cam_Reg_1V8
CCPClkP
XSHUTDOWN
Place C1421 close to pin A3!
2
SMIA65 SOCKET
preferable routing layers are 4 and 5 with minimum trace width in order to achieve 100ohm differential impedance
CAMCLK
1
C
B
3
I2C_SCL
ACME LITE
I2C_SDA
I2C SDA
INSTRUCTIONS FOR LAYOUT:
CAM1CLK
Place J1404 close to X1400
CCP_DATAP
3
VDIG
J1405
C1454
1u
J1403
N1401
GND
STBY
VOUTVIN
120R/100MHz
L1450
GNDGND
12
GND
BH28SA2WGUT
4341871
Appr
Copyright (C) Nokia Corporation. All rights reserved.
/2 1u51
C1408
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
CAMERA HW71 RAPU1.1
Name
5
GND
GND
GND
11
VCAM_1V8
0
C1409
2351050
GND
C1410
2351017
100n
9
DATA+
GND
4u7
30
GND
GND
31
32
GND
CLK+
4
CLK-
5
6
GND
GND
7
8
VANA
DGND
23
GND
24
GND
25
26
GND
GND
27
28
GND
GND
29
GND
3
16
SDA
17
NC
18
NC
19
GND
2
DATA-
20
VCAP
GND
21
22
EXTCLK
4858138
N1450
TCM8330MD
GND
1
10
VDIG
NC
11
12
NC AGND
13
XSHUTDOWN
14
SCL
15
GND
4
13
GND
27p0
C1453
20
VBAT
J1404
NOT_ASSEMBLED
R1401
27R
15
10
12
R1400
27R
A2
VIN
B1
VOUTVIN
B2
C1
GNDON
C2
VIO VCAM_1V8
VIO
GND
12
4342045
N1402
FPF1003A
A1
VOUT
13
GND
19
GND
6
13
C1422
10u
C1451
J1402
VCAM_2V8
100n
4860046
LUVC9AP
V1420
VCAM_2V8
VCAM_1V8
7
C1404
2351095
1u
100n
2351017
C1457
C1423
27p
GND
2710203
C1408
2 /2 1u5
GND
NOT_ASSEMBLED
GND
GND
GND
GND
C1403
2320546
27p
C1425
27p
100n
GND
VCAM_2V8
GND
VBAT
GND
C1421
14
L1420
3640327
2u2H
GND
1
C1455
2320143
220n
10u
J1420
B3
IND_OUT
VOUT
C1
C2
STROBE
C3
I2C/EN
LED_OUT
D1
SDA/EN2
D2
SCL/EN1
D3
C1420
AS3645A-ZWLT
N1420
4341999|ALT
PGND
A1
A2
SGND
A3
VIN
SW
B1
TORCH
B2
C1450
2351017
100n
9
NOT_ASSEMBLED
27p
2320546
C1411
2
3
4
5
6
7
8
Part is not suitable for dual pass SMD process
GND
X1400
5407315
1
10
11
12
2u2
2351104
C1401
GND
2
GND
8
120R/100MHz
3203855
L1421
C1452
27p0
CCP(30:0)
CCP(30:0)
3
GND
GND
NOT_ASSEMBLED
CCP(30:0)
CCP(30:0)
I2C1(1:0)
CCP(30:0)
CCP(30:0)
XENA(10:0)
COMP_VIDEO
Page 19
2450- 2469
RFBIDa1
RFBIDa2
WRX
ui_connectors
1
C
B
3
GND
GND
VLED2-
RFBIDa0
LCDRSTX
D4
D6
D
5
ui_connectors
NOTE:
RFBIA0
RFBIDa4
C
4
21
5
D1
VLED1+
VLED1-
VDDI
RFBIDa5
4
2
2400- 2449
3
pins to GND
VLED2+
LED input
SetCurrD
RFBIWRX
D0
D2
VDD
Display connector for Brixton
6
GND
RSTX
Connect unused ASIP
RFBIDa6
RFBIDa7
RFBIRDX
D
RFBITE0
RFBIDa3
6
GND
D/CX
RDX
AA
B
TE
D7
D5
D3
D1
In6
D3
GND
C5
Out7
D4
Out6
GND
12
D5
Out2
B5
Out1
A2
In3
GND
B3
A5
Out3
A1
In5
C1
In4
C3
GND
A4
Out5
C4
Out4
C2
In7
1
2
27
EMIF07-LCD02F3
Z2451
4129287
D2
In2
B1
In1
GND
A3
9
2
30
3
28
6
26
VIO
GND
VAUX1
3
GND
6
1
0
8
4
0
11
GND
8
11
9
27p0
2322019
C2453
C2454
2322019
27p0
120R/100MHz
3203855
L2451
0
3
4
5
6
7
8
9
13
14
15
16
17
18
19
2
20
21
22
23
24
GND
LED(10:0)
MMC(15:0)
PUSL(15:0)
PWRONX
SIM(6:0)
SLOWAD(6:0)
XAUDIO(7:0)
5469499
X2450
1
10
11
12
In7
D2
In6
A2
GND
D3
Out7
D5
A5
Out6
KEYBOARD
CCP(30:0)
H_BRIDGE(5:0)
I2C2(1:0)
KEYB(15:0)
LCD(99:0)
A3
GND
Out2
A4
Out1
D4
In3
B1
GND
B3
B5
Out3
In5
C2
In4
C1
GND
C3
Out5
C5
Out4
C4
1
7
5
4129287
Z2450
EMIF07-LCD02F3
A1
In2
In1
D1
5
26
10
7
3
4
5
16
C2455
2351017
100n
Name
UI
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
GND
Copyright (C) Nokia Corporation. All rights reserved.
Appr
L2450
3203855
120R/100MHz
1
C2452
2351017
100n
GND
GND
GND
GND
0
4
rfbi(15:0)
H_BRIDGE(5:0)
DISPCDataLCD4
DISPCDataLCD7
DISPCDataLCD6
LCDTE
DISPCDataLCD5
LCDReset
DISPCDataLCD3
DISPCDataLCD2
DISPCDataLCD1
DISPCVSYNC
DISPCPCLK
DISPCHSYNC
LCD(99:0)
DISPCDataLCD0
7
10
12
PWRONX
SLOWAD(6:0)
KEYB(15:0) LCD(99:0)
SIM(6:0)
MMC(15:0)
I2C0(1:0)
I2C1(1:0)
I2C2(1:0)
GAZOOIO(3:0)
AV(5:0)
LED(6:0)
SENSORS(15:0)
KEYB(15:0)
PUSL(15:0)
XAUDIO(7:0)
SLOWAD(6:0)
LCD(99:0)
KEYB(15:0)
LED(10:0)
CCP(30:0)
PWRONX
MMC(15:0)
SIM(6:0)
LED(10:0)
LED(10:0)
Page 20
kbr_1
4
kbr_5
6
2
kbc_3
2-piece B2B connector for Card reader module
D
kbr_0
kbr_2
EMC issues on the main board !!!
D
Power key
kbc_1
kbc_5
3
Breathing Led
SIMRST
kbc_3
1
S60 Cluster Leds
Volume Key Leds
5
kbc_1
REFERENCE AREA FOR THIS SHEET 2400-2449
MMCDat3
SCL
MMCClk
S60 Cluster Leds
kbr_0
kbr_6
MMCDet_Presence / Prewarning
kbc_2
Place C2411, C2412 and C2413 close to X2400
A
MMCDat1
MMCDat0
4
Test points J2400 - J2407 for production testing purposes
C2005 needs to be located near pin C5 of LP5523
SIMCLK
VIBRAN
kbc_0
Camera Key Led
MMCCmd
kbc_4
MMCDat2
VSIM
kbr_2
kbc_4
Place C2410 close to X2400
kbr_5
VIBRAP
VMEM
kbc_2
UI-flex connector in order to minimize
kbr_4
3
kbr_6
2
B
kbc_5
B
SDA
kbr_4
kbr_1
ESD CRITICAL LINES!
5
Camera Key Led
Hybrid Qwerty/ T9 Leds
2-piece B2B connector for UI module
Hybrid Qwerty/ T9 Leds
NOTE:
Breathing Led
C
SleepClk
A
Place EMIFs Z2400 and Z2401 near
1
kbr_3
kbr_3
Volume Key Leds
6
Place V2401 near pin 11
Hybrid Qwerty/ T9 Leds
kbc_0
SIMDATA
of X2400
Place these components close to Gazoo
Hybrid Qwerty/ T9 Leds
27p
2320546
C2407
GND
3
C2408
27p
2
11
GND
D4
Out7
D5
Out6
0
3
6
1
B3
GND
B5
Out3
C1
In5
C2
In4
C3
GND
C4
Out5
C5
Out4
D1
In7
D2
In6
D3
GND
J2407
EMIF07-LCD02F3
Z2400
4129287
A1
In2
A2
In1
GND
A3
A4
Out2
A5
Out1
B1
In3
10
J2403
2
2u2
2351104
C2403
0
0
27p
C2409
1
4
4
J2402
GND
7
12
22
23
24
GND
3
4
5
6
7
8
9
1
10
11
12
13
14
15
16
17
18
19
2
20
21
J2406
5
9
X2400
5469236
2u2
VBAT
GND
4
GND
5
1
2351104
C2405
Out3
B5
In5
C1
In4
C2
GND
C3
Out5
C4
Out4
C5
In7
D1
In6
D2
GND
D3
Out7
D4
Out6
D5
4129287
Z2401
EMIF07-LCD02F3
In2
A1
In1
A2
A3
GND
Out2
A4
Out1
A5
In3
B1
GND
B3
0
C2410
2351017
100n
3203855
L2401
C2406
2351104
2u2
120R/100MHz
1
GND
12
3
GND
GND
VMEM
1
GND
C2413
2322019
27p
27p
2322019
C2412
VSIM
GND
5200114
S2401
NOT_ASSEMBLED
A
1
2
B
5
J2405
J2400
2
C2411
2322019
27p
2320546
27p
8
3
X2403
1
5
3
4
C2400
D3
D4
CLK
E1
D9
GPO
E2
E3
TRIG
E4
SDA
E5
SCL
C1-
C1+
B5
C1
D5
D6
C2
ASEL0
C3
C4
EN
D1
D7
D8
D2
INT
D1
A2
D2
VOUT
A3
A4
C2-
C2+
A5
B1
D3
B2
D4
B3
ASEL1
B4
1
1
GND
LP5523TMX_NOPB
N2400
4341795
C5= VBAT
D5= GND
A1
2u2
GND
GND
X2402
2
C2404
2351104
21
22
23
24
GND
3
4
5
6
7
8
9
GND
X2401
1
10
11
12
13
14
15
16
17
18
19
2
20
GND
0
5469236
VIO
1
J2404
V2401
4129313
L2400
3203855
120R/100MHz
J2401
KEYBOARD
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
GND
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
ApprName
PWRONX
5
2
GND
4
GND
XAUDIO(7:0)
CCP(30:0)
SLOWAD(6:0)
LCD(99:0)
PUSL(15:0)
LED(10:0)
I2C2(1:0)
H_BRIDGE(5:0)
MMC(15:0)
LED(10:0)
SIM(6:0)
UI_Leds(5:0)
KEYB(15:0)
Page 21
Lines must be connected
directly to resistor pads
connect to ClassDKelvin N6
10kOhm pull-up resistor is
needed for empty battery
3
5
4
D
B
regulator in/output traces.
Minimize trace lenght Crl and CrO
Symmetrical layout!
Place Vcore and VIO coils
Due to Digital Mic, no MICB1 cap is needed
SleepClk: Shield SleepClk trace from every direction in order to avoid crosstalk injected to it.
nearby ASIC. Minimize ground
looåp from capasitor to ASIC
With SleepClk line should be used Near-End Star Cluster topology,
MemCard Interface A-side (RAPU-Gazoo): Traces should be as short as possible and have good ground reference
If AudioClk is shared from RAPU to both Gazoo and DigiMic then it is recommended to put termination
A
1 5
1
- Capacitor should be located as rigid place as possible on PWB, also places near large can or otherside of large can are possible
- Solder mask + 1st layer copper opening under capacitor
- It is recommended to use equal amount of LEDs in both branches (display&keyboard)
- Also it is possible to use combination 2+4, 2+3 or 3+4 but then there is possibility that 1uF ceramic capacitor in LED driver starts ringing
A
C
and de-coupling capasitors
C
B
2 4
CURRENT SENSE RESISTOR
which means that every component has own branch so they are not chained.
it is very important these branches are equal lenght and the star point
is near SleepClk sourse.
ESD CRITICAL LINES!
ADVICE FOR PHONE PROGRAMS USING GAZOO/PEARL INTEGRATED LED DRIVER
- Capacitor can be divided to two smaller caps and those can be placed other side of the PWB
start up and ESD protection
for PWRONX pin
6
6
D
resistors in the beginning of both traces (Values have to be defined case by case with simulations)
VBAT should form a wide distribution plane
underneath ASIC to ensure proper power supply
Route Memory/SIM signals isolated from other
signals if possibility to apply ESD to card holder
(when device is powered). Also avoid routing nearby
3
If Gazoov2.0 is used then it is recommended to use T-filter (47R, 33pF, 47ohm) in Gazoo end
before dividing lines to different components.
AudioClk: Shield AudioClk trace from every direction in order to avoid crosstalk injected to it.
connect to TestNet3 T1
2
- Ringing can be compensated by using following methods:
4
VBAT8
VR1
8
PMEG3002AEL
V2300
VBAT3
VBAT
1
GND
VBAT
GND
1u0
C2314
GND
10u
C2211
C2230
22u
1uH
L2310
C2231
GND
L2340
1uH
22u
2.6V
4700003
CP3225A
G2200
-
+
VBAT8
GND
VBACK
VBAT11
C2232
10u
10k
VBAT
VBAT1
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
VAUX1
R2399
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
GAZOO
Name
1
BGND GND
VBAT12
0
GND
VCORE
VIO
VBAT1
2u2
C2249
VBACK
VBAT10
GND
C2247
2u2
120R/100MHz
VBAT
GND
VBAT12
L2203
2
GND
3
5
6
VBAT10
2
0
VBAT
2u2
0
1
2
VBAT5
GND
GND
C2280
2u2
C2269
GND
GND
GNDGND
GND
GNDGNDGND
VRCP1VMEM VSIM VDigimic
0
VBAT
VOUTVR1VRFC
2
120R/100MHz
L2205
GND
0
2
VBAT4
6
6
7
8
9
10
11
1
2
4 5
0
1
2
3
4
5
2
4
5
0 1 2 3
2u2
C2266
0
1
0
7
3
C2214
2u2
12
13
VBAT
GND
0
1
0
0
1
4
5
6
7
10
11
2
4
5
3
1
0
5
1
VBAT
GND
VANA
1
VAUX2
GND
GND
3
0
GND
3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
IHFSpRN
VCharIn1
T7
3
GND
GND
GND
GND
VCharOut2
T10
GndUSB
T11
VCore
T13
T14
GndVCore
GndVCore
T15
T16
GndVCore
T2
TestNet2
T3
VBatIHFLN
GndIHFLP
T4
T6
GenOut2
R2
R3
IHFSpLN
R4
GndIHFLN
R5
IHFSpRP
GndIHFRP
R6
VBatIHFRN
R7
VCharOut1
R8
VCharIn2
R9
TestNet3
T1
P7
GndINFRN
P8
CBusSelX
VBUS
P9
TestNet1
R1
VUSB
R10
VBUSCoil
R11
DM
R12
DP
R13
R14
GndVCore
GndVCore
R15
GndVCore
R16
USBCharDis
P13
P14
VPROGID
VCoreCoil
P15
VCoreCoil
P16
RSTX
P2
P3
EarDataR
P4
IHFSpLP
VBatIHFLP
P5
P6
VBatIHFRP
N5
ClassDKelvin
N6
N7
CBusClk
N8
CBusData
N9
ChInd
P1
GenOut1
VBUSSMPSOut
P10
VBatUSB
P11
P12
BTemp
SMPSClk
N11
N12
GndPVSS2
N13
RFTemp
VBack
N14
N15
VBatVCore
VBatVCore
N16
MicData
N2
AudClk
N3
PMARN
N4
EarDataL
L9
GndCHInd
VCoreDef
M13
CMDDir
M14
LedOut
M15
Speed
M2
VDDAudRx3
M3
M4
VBUSCtrl
N1
PMARP
N10
VBatChacon
L13
VBatLED
L14
SIMClkC
GndLED
L15
L16
SIMDaC
LineInRN
L2
XEarR
L3
L4
XEarRC
L7
GndChacon
VCharInTest
L8
K2
XEarLC
XEarL
K3
K4
EarN
Mic1P
K6
K7
GndAudRx
GndAVSS2
K8
USBCharDetX
K9
L1
LineInRP
ID
L10
J7
GndAVSS1
J8
J9
LST
VDDAudRx
K1
SetCurrD
K10
K11
GndLED2
GndPVSS3
K13
ClkB
K14
K15
VBatVSIM
K16
VSIM
Data4Dir
J11
Data4B
J13
J14
Data3B
VBatVAux
J15
SlaveSW
J2
J3
MicB2
J4
Mic3RN
LineInLN
J6
Suspend
H15
VBatVAux
H2
VDDAudRx2
MicB1
H3
H4
MicSub
H6
LineInLP
H7
WTxDet
VOut
H8
ExtPWMOut
H9
SetCurrKB
J10
G4
Mic3RP
G6
HeadDet
VRef
G7
G8
VDIGI
MBus
G9
OVVLed
H10
SIMRstC
H11
VAux1
H13
Data2B
H14
G1
EarP
G10
Data1A
G11
GndLDO2
G13
VAux2
Data1B
G14
G15
CMDB
G16
GndVMEM
Mic2P
G2
G3
Mic3LP
F13
F14
GndPVSS5
VBatVMEM
F15
F16
VMEM
VDDAudTx
F2
F3
Mic2N
F4
Mic3LN
GndRef
F7
VBatVDigi
F8
F9
SIMDetX
ClkA
Data3Dir
E14
CMDA
E15
GndVibra
E2
E3
SleepX
E4
SenseM
E5
VR1
GndAudTx
F1
F10
VDD18
ClkFB
D16
GndVIO
D2
VibraN
TxCData
D3
D4
TxCOut
D5
VBatVR1
D6
GndXTAL
VBatVAna
D7
D8
VDigiMic
D9
VCP
E13
C8
FlyHigh
C9
FlyLow
D1
VBatVibra
D10
HookDet
MBusRx
D11 D12
Data2Dir
D13
Data1Dir
Data4A
D14
GndVIO
D15
C14
Data2A
VIOCoil
C15
VIOCoil
C16
C2
TxCClk
AFCOut
C3
SleepClk
C4
WDDis
C5
VRFC
C6
C7
VRTC
GndLDO1
CrO
B6
B7
VAna
GndCPump
B8
VBatVCP
B9
C1
VibraP
BSI
C10
GndPVSS6
C11
C12
SIMDa
C13
Data3A
B11
B12
MBusTx
B13
SIMIOC
B14
SIMClk
B15
VBatVIO
VBatVIO
B16
B2
TxCCtrl
SenseP
B3
GndLDO1
B4
B5
A15
VBatVIO
A16
VBatVIO
A2
ATM
A3
EMInt
A4
PURX
A6
CrI
VBg
A7
B1
VBatVibra
PwrOnX
B10
UserResetX
1
N2200
GAZOO_V3.4
4376047
VBatVibra
A1
GndPVSS7
A10
A11
VRCP1
VIO
A13
VBatVIO
A14
C2285
2u2
220R/100MHz
L2207
VREF
2
VREF
J2200
2u2
C2268
GND
GND
GND
GND
GND
C2317
GND
GND
GND
GND
C2319
2u2
GND
2u2
2u2
C2316
CURRENT
SENSE
PMR03EZPJU10L
R2200
1
2 3
4
2
L2300
2u2H
1
0
8
GND
0
0 1
3
J2201
2
5
J2236
2u2
C2265
2u2
C2315
GND
J2221
0 1 3 4
B2200
32.768kHz
GND
VBAT
VBAT5
2u2
C2228
L2202
120R/100MHz
VIO
J2243
J2244
3
14
15
GND
2u2
GND
C2229
GND
C2296
J2202
1
2u2
L2206
220R/100MHz
VDDAUDTX
GND
VRCP1
J2223
C2281
VDDAUDRX
VBAT3
GND
2u2
4
VBAT
VBAT
GND
VBAT
2u2
GND
VDDAUDTX
VDDAUDRX
C2245
VBAT13
C2282
2u2
GND
VBAT11
VBAT13
GND
2u2
C2326
C2294
2u2
C2267
2u2
VBAT4
GND
VBUS
2
J2217
J2218
J2219
J2212
J2214
VBAT9
VBAT9
J2227
J2220
J2211
J2225
J2207
J2208
J2209
J2213
J2204
J2205
J2206
VANA
J2203
C2213
2u2
C2271
2u22u2
C2222
PWRONX
GND
VBAT
VBAT
SLOWAD(6:0)
kelvin
LED(10:0)
USB(20:0)
RFPWR(5:0)
LED(10:0)
GAZOOIO(3:0)
"Note"
"Note"
"Note"
"Note!"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note!"
kelvin
SIM(6:0)
XAUDIO(7:0)
AUDIO(13:0)
H_BRIDGE(5:0)
SLOWAD(6:0)
CBUS(3:0)
TXC(2:0)
INT_SIM(5:0)
DIG_AUDIO(20:0)
ACI(7:0)
EMINT(3:0)
TXC_CONV(4:0)
PUSL(15:0)
INT_MMC(13:0)
MMC(15:0)
CHARGER
Page 22
A
D
C
B
A
1 2 3 4 5 6
1 2 3
2800-2849
2850-2899
3000-3099
4 5 6
D
C
B
RFID(4:0)
SDRAMCTRL(17:0)
SDRAM_AD(15:0)
SENSORS(15:0)
SSI(7:0)
TXC(2:0)
TXP
USB(20:0)
VISSI(27:0)
WLAN(15:0)
XAUDIO(7:0)
XENA(10:0)
I2C0(1:0)
I2C1(1:0)
I2C2(1:0)
INT_MMC(13:0)
INT_SIM(5:0)
IRDA(2:0)
KEYB(15:0)
LCD(99:0)
LED(10:0)
MEMCONT(9:0)
MMC(15:0)
MMC2(15:0)
PUSL(15:0)
REFCLK_i
RFCONV(20:0)
RFCTRL(11:0)
AUDIO(13:0)
AUDIOTEST(5:0)
AV(5:0)
BT(23:0)
CBUS(3:0)
CCP(30:0)
DIG_AUDIO(20:0)
DVB_H(15:0)
EMINT(3:0)
ETM(20:0)
EXTADDA(31:0)
FMRADIO(20:0)
FMTX(15:0)
GENIO(99:0)
GPS(15:0)
HISSI(8:0)
SDRAM_CTRL(17:0)
SDRAM_DA(31:0)
TXC(2:0)
TXP
USB(20:0)
VISSI(27:0)
2G1GDDRPOP
MEM
EXTADDA(31:0)
MEMCONT(9:0)
NAND(15:0)
SDRAM_AD(15:0)
SDRAM_BA(1:0)
SDRAM_CTRL(17:0)
SDRAM_DA(31:0)
hw71_1.1
MUX
ACI(7:0)
ETM(20:0)
EXTADDA(31:0)
GENIO(99:0)
HISSI(8:0)
I2C0(1:0)
I2C2(1:0)
INT_MMC(13:0)
INT_SIM(5:0)
JTAG(6:0) MEMCONT(9:0)
PUSL(15:0)
RFCLK(1:0)
RFCONV(20:0)
RFCTRL(11:0) SDRAM_AD(15:0)
SDRAM_BA(1:0)
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
CPU
rapu_yama_pop1.11
CBUS(3:0)
CCP(30:0)
DIG_AUDIO(20:0)
EMINT(3:0)
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
DIGI
Name
MMC2(15:0)
I2C0(1:0)
SENSORS(15:0)
REFCLK_I
RFCONV(20:0)
TXC(2:0)
WLAN(15:0)
LED(10:0)
XAUDIO(7:0)
INT_SIM(5:0)
RFCONV(20:0)
AUDIOTEST(5:0)
AV(5:0)
FMRADIO(20:0)
XENA(10:0)
KEYB(15:0)
MMC(15:0)
FMTX(15:0)
RFID(4:0)
RFCTRL(11:0)
RFCLK(1:0)
JTAG(6:0)
I2C1(1:0)
ETM(20:0)
PUSL(15:0)
CBUS(3:0)
EMINT(3:0)
I2C2(1:0)
USB(20:0)
RFCTRL(11:0)
ACI(7:0)
LCD(99:0)
DVB_H(15:0)
IRDA(2:0)
INT_MMC(13:0)
DIG_AUDIO(20:0)
CCP(30:0)
SSI(7:0)
AUDIO(13:0)
GPS(15:0)
BT(23:0)
Page 23
Place R2807 close to Rapu
Bypass for CPU
3
D
ETM interface: In order to quarantee relaible tracing, traces should be as short as possible and have steady impedance,
2710205
SleepClk: Shield SleepClk trace from every direction in order to avoid crosstalk injected to it.
If Gazoov2.0 is used then it is recommended to use T-filter (47R, 33pF, 47ohm) in Gazoo end
DISPC_PCLK Shield PClk trace from every direction in order to avoid crosstalk problems
shield signals in order to prevent crosstalk
100n
B
MMC Clk: Shield MMC Clk trace from every direction in order to avoid crosstalk problems
RAPUYAMA1.11 POP
PULL UP’S ONLY FOR
resistors in the beginning of both traces (Values have to be defined case by case with simulations)
If SysClk192 is shared or even used only for one user,
C
INSTRUCTIONS FOR PRODUCT DESIGNS:
SOME GENIOS AND DEDICATED CLOCKS HAS VERY HIGH SLEW RATES WHICH CAN CAUSE SIGNAL INTEGRITY PROBLEMS
SIGNAL INTEGRITY SIMULATIONS AND MEASUREMENTS SHOULD BE DONE TO FOLLOWING SIGNALS:
SYSCLK192
CBUSCLK
AUDIOCLK
SIMCLK’
GENIO72 = DIGIMICCLK
GENIO74 = WLAN_SPI_CLK
INSTRUCTIONS FOR LAYOUT:
it is recommended to use termination in order to avoid signal integrity problems
31 2 6
SysClk192: Shield SysClk192 trace from every direction in order to avoid crosstalk problems
2
HISSI interface: Differential interface, termination resistors (if those are not integrated to display itself)l
100n
5
1
maintain symmetry in routing and match trace lengths between signals and also pairs
6
D
C
B
A
GENIO82 = BT_PCM_CLK
GENIO86&87 = CAMCLK’S
IF PROBLEMS IS SEEN TERMINATION RESISTORS MUST BE ADDED. TERMINATION VALUES CAN VARY FROM 10ohm TO 100ohm
4
2710205 is a master code for 100n x 2 capacitors
4
preferable routing layers are 4 and 5 with minimum trace width in order to achieve 100ohm differential impedance
2710205
RAPU 1.01 AND 1.1
before dividing lines to different components.
5
ULPI interface: It is recommended to place ULPI transceiver as close to RAPU as possible,
Bypass for CPU
Place R2806 close to Rapu
C2809
2 /2 100n
RAPU1.1 Cap
preferable routing layers are 4 and 5 with minimum trace width in order to achieve 100ohm differential impedance
maintain symmetry in routing
A
CCP interfaces: Differential interface, termination resistors as close to RAPU as possible without any stubs,
so that the length of the traces is minimized
If AudioClk is shared from RAPU to both Gazoo and DigiMic then it is recommended to put termination
as close to Display as possible without any stubs,
AudioClk: Shield AudioClk trace from every direction in order to avoid crosstalk injected to it.
C2809
2X100n
1 /2 100n
2X100n
C2813
2X100n
2 /2 100n
15
VCORE
C2830
GND
7
86
9
0
0
7
2u2
VIO
J2804
1
59
41
60
Name
RAPU YAMA POP 1.11
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
2
80
GND
12
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
10
16
34
VRFC
J2816
5
2 /2 100n
C2814
49
10
27
2X100n
2 /2 100n
15
2X100n
12
2
0
GND
3
5
C2811
2X100n
C2822
VRFC
18
12
C2822
2X100n
1 /2 100n /2 100n2
1
0
3
2
VRFC
VIO
68
82
1
9
8
17
J2801
0
53
54
2
22
0
16
8
1
2
52
14
50
7
GND
56R
R2807
R2806
33R
9
2
VIO
2
VIO
16
2
3
4
17
4
VIO
5
7
6
14
61
14
1
21
7
0
14
1
8
47
4
2
20
5
4
16
4
35
6
13
69
3
GND
VCORE
Y4
DISPC_VSYNC
GenIO23
Y5
GenIO22
Y6
DISPC_DATA_LCD7
Y7
Y8
DISPC_DATA_LCD14
DISPC_DATA_LCD0
Y9
33
3
CBusClk
Y15
ETMDa7
Y16
Y17
ETMDa5
ETMCtrl
Y18
GenIO69
Y19
GenIO75
Y20
Y21
GenIO13
GenIO25
Y3
W21
GenIO46
W22
GenIO5
W3
DISPC_DATA_LCD13
DISPC_DATA_LCD16
W4
GenIO3
Y10
GenIO0
Y11
Y13
CCPStrbP1
Y14
CCPStrbN1
U8
DISPC_DATA_LCD10
DISPC_DATA_LCD15
U9
V20
GenIO39
V21
GenIO37
GenIO74
V22
V3
DISPC_DATA_LCD17
V4
DISPC_DATA_LCD11
GenIO11
W20
I2C2SCL
U16
U17
GenIO1
GenIO65
U20U21
EarDataR
GenIO71
U22
U3
DISPC_DATA_LCD5
U4
GenIO8
U7
DISPC_DATA_LCD4
T4
GenIO7
T7
GenIO17
GenIO2
U10
GenIO86
U11
U12
GenIO43
CCPStrbN0
U13
CCPStrbP0
U14
I2C2SDA
U15
R7
GenIO18
T13
GenIO87
GenIO31
T17
EarDataL
T20
PMARP
T21
MicData
T22
T23
GenIO12
T3
GenIO26
GenIO33
R17
GenIO9
R2
GenIO47
R20
PMARN
R21
R22
GenIO48
EMInt1
R23
R3
GenIO14
GenIO20
R4
P17
GenIO76
P21
SleepX
AudioClk0
P22
GenIO35
P23
GenIO10
P3
P4
RFBusClk
P7
GenIO82
GenIO16
R1
N17
GenIO38
N20
PURX
GenIO73
N22
GenIO40
N23
RFBusEn1X
N3
RFBusDa
N4
N7
GenIO79
N9
GenIO50
M2
DRXIN
SIMIOCtrl1
M20
SIMIODa1
M21
ULPIData2
M22
DRXIP
M3
M4
GenIO84
M7
GenIO85
N1
GenIO81
SIMClk1
L20
L21
ULPIData4
L22
GenIO60
L23
GenIO6
VREFP
L3
L4
VREFN
L7
GenIO83
M17
GenIO45
GenIO41
K17
ULPIClock
K20
K21
ULPIDir
K23
GenIO57
RXIP
K3
K4
RXQP
K7
DRXQP
L17
GenIO58
J17
GenIO55
J2
RXIN
ULPIData1
J20
ULPIData0
J21
J22
GenIO34
TXQN
J3
RXQN
J4
DRXQN
J7
GenIO78
G7
RX2
G9
GenIO42
H12
GenIO62
H17
H20
ULPIData3
ULPINxt
H21
H3
TXQP
IREF
H4
G15
GenIO36
G17
GenIO56
RFClkN
G2
ULPIStp
G20
G21
GenIO61
G23
GenIO52
G3
RFClkP
TXIN
G4
E4
HissiData0N
ULPIData6
F20
ULPIData5
F21
F4
TXIP
GenIO51
G11
G12
TxCClk
G13
GenIO29
G14
GenIO64
D3
HissiClkP
D4
HissiData0P
HissiData1P
D5
EMU1
D6
SleepClk
D7
E20
ULPIData7
SMPSClk
E21
E22
GenIO59
ExtSysClkReq
D10
D11
GenIO49
D13
GenIO32
TMAct
D14
GenIO27
D15
D16
GenIO28
D19
GenIO53
D20
GenIO54
C14
TxCDa
C2
HissiClkN
HissiData2N
C3
HissiData2P
C4
HissiData1N
C5
C6
EMU0
TXA
C7
C8
RXDa0
GenIO63
B14
RXDATAClk
B2
GenIO67
B21
SysClk384
B6
GenIO68
B9
C1
TXP
C11
GenIO80
GenIO30
C13
AC10
GenIO72
AC16
SysClk192
AC17
ETMDa6
AC18
ETMClk
AC3
DISPC_ACBIAS
AC9
GenIO21
JTDI
B1
B13
GenIO4
AB18
ETMDa1
AB22
GenIO77
AB3
DISPC_DATA_LCD1
DISPC_DATA_LCD6
AB4
DISPC_DATA_LCD9
AB6
AB7
DISPC_DATA_LCD3
AB9
INT0
JTMS
AC1
AA7
DISPC_PCLK
AA8
GenIO15
AA9
DISPC_DATA_LCD2
AB1
JTDO
CCPDaP1
AB14
CCPDaN1
AB15
ETMDa4
AB16
CBusEn1X
AB17
AA17
ETMDa2
ETMDa3
AA18
ETMDa0
AA19
GenIO70
AA21
DISPC_DATA_LCD12
AA3
AA4
GenIO19
AA5
DISPC_HSYNC
DISPC_DATA_LCD8
AA6
A20
RX1
TXReset
A3
TxCDaCtrl
A8
GenIO24
AA10
AA11
GenIO44
CCPDaP0
AA12
CCPDaN0
AA13
AA16
CBusDa
RAPUYAMA_V1.11_PR_RITSA_BGA401
D2800
JTRSTn
A1
GenIO66
A19
A2
JTClk
56
5
4
51
J2805
J2815
39
38
0
5
4
37
GND
75
0
VIO
1
32
0
1
0
C2808
2X100n
1 /2 100n
62
2
VIO
6
15
0
72
3
6
4
J2800
78
6
13
VCORE
24
9
2
2X100n
1 /2 100n
6
79
7
3k3
C2814
T8
VDDSTACK
T9
VDD5
VCCQ_POP2
U1
VSS
U2
VSS
U23
V23
VDDS3
Y12
VSS
VDD_POP12
Y23
R2805
VDD
VDDSRAMOUT
R8
R9
VDD5
T1
VDDS_1_4
T10
VDDRAM
VSS
T11
T12
VDDSTACK
VSS
T14
VDD
T15
T16
VSS
T2
VDDS1
P2
VSS
P20
VSS
VDD5
P8
VSS
P9
VSS
R10
R11
VDD
VDD
R12
VDD
R13
R14
VDD
VDD
R15
R16
VDD3
M16
M8
VDDSTACK
VDD5
M9
N15
VDD3
VSS
N16
VDDS_1_1
N2
VDDS8
N21
N8
VDD5
P1
VCCQ_POP1
VSS
P15
VSS
P16
K22
VDDSTACK
K8
K9
VSS
L1
VCC_POP3
L15
VSS
L16
VDD3
VSS
L2
VDD5
L8
VSS
L9
M1
VSSASUB
VDD3
M15
VSS
J13
J14
VSS
J15
VDD3
J16
VDD3
VDD4
J8
VDDSTACK
J9
VDD_POP11
K1
K15
VSS
K16
VSS
VSS
K2
VSS
H16
VSS
H2
VSS
H22
H23
VDD_POP10
H7
VDDARX
H8
VSS
VDDA18V1
H9
J1
VDDATX
J10
VDD2
VDDSTACK
J11
VDD2
J12
F3
VSS
G1
VDDS9
G10
G16
VSS
VSS
G8
H1
VDD_POP13
VSS
H10
H11
VSS
VDDRAM
H13
VDD3
H14
VDD3
H15
VSS
VDDS9
D9
E1
VDD_POP9
VSSAPLLStack
E2
VDDS12
E23
VDDAPLLStack
E3
E5
VSSARX
F1
VDDA_ACS
VSSA_ACS
F2
VSS
F22
F23
VDD_POP8
VSSATX
C22
C23
VDD_POP7
VSS
C9
VDDS_1_3
D1
VDDA18V2
D12
D17
VSS
D18
VDDS5
D21
VSS
D22
VSENSE
D23
VDDS12
VDDS9
D8
B5
B7
VSS
VSS
B8
VSS
C10
C12
VDDS10
VSS
C15
VSS
C16
VSS
C17
VDDS5
C18
C19
VSS
C21
VSS
VSS
VCC_POP2
AC8
B10
VSS
VSS
B12
VSS
B15
VSS
B18
VDDS6
B19
VSS
B22
IFORCE
B23
B3
VDDA
VSS
B4
VSSA
VSS
VSS
AB5
VSS
AB8
AC11
VPP_POP
AC12
VSSRX2
AC13
VCC_POP1
AC15
VDDS7
AC4
VSS
AC5
VCCQ_POP4
AC6
VDDS2
AC7
VDDS2
A7
A9
VDDS_1_2
VCCQ_POP3
AA1
VSSRX1
AA14
AA15
VDDS7
VSS
AA2
VSS
AA20
VSS
AA22
VDD_POP12
AA23
VSS
AB10
VSS
AB13
AB2
VSS
A13
VDD_POP5
A15
A16
VDDS6
A17
VDDS6
A18
VDD_POP6
A21
VDDS6
VPP2
A22
A23
VPP1
A4
VDD_POP1
A5
VDDS4
VDD_POP2
70
6
0
0
D2800
RAPUYAMA_V1.11_PR_RITSA_BGA401
VDD_POP3
A10
A12
VDD_POP4
VCORE
2X100n
C2820
1 /2 100n
25
4
VIO
1
1
5
6
57
29
76
40
58
4
77
8
36
44
74
W2
W23
SDRAD13
Y1
CE1MMX
FlsCS0X
Y2
SDRAD14
Y22
/2 100n2
C2806
2X100n
C20
D2
SDRLDQS
G22
NC
J23
SDRCKE2
SDRXCS2
M23
V1
FlsWEX
FlsOEX
V2
FlsADVX
W1
FlsClk
AC20
MMCDa0
AC21AC22
NC
NC
AC23
B11
SDRCLKX
B16
NC
SDRLDQS2
B17
B20
SDRUDQS2
NC
AB12
MMCDa1
AB19
AB20
MMCClk
AB21
MMCCmd
AB23
NC
SDRAM_TEMP_SENSE
AC14
AC19
MMCDa2
AC2
NC
MMCDa3
RAPUYAMA_V1.11_PR_RITSA_BGA401
D2800
SDRCLK
A11
A14
NC
SDRUDQS
A6
FlsRstX
AB11
FlsWaitX
55
3
VIO
28
7
2X100n
2 /2 100n
C2808
63
1 /2 100n
C2810
2X100n
2 /2 100n 1 /2 100n
2X100n
C2810
11
2
8
45
46
2X100n
C2813
1
GND
9
17
13
11
87
13
19
30
5
4
0
1
73
0
2X100n
C2821
VIO
26
5
2X100n
2 /2 100n
84
83
/2 100n1
GND
15
3
C2819
66
67
0
/2 100n1
2X100n
C2819
C2800
100n
/2 100n2
C2803
2X100n
5
31
4
20
/2 100n1
2X100n
C2803
81
0
6
3
/2 100n1
2X100n
C2806
64
GND
10
3k3 R2804
1 /2 100n
1
2
1
19
10
1
65
3
6
21
2X100n
C2811
100n
C2802
C2821
2X100n
2 /2 100n
8
10
C2801
100n
11
85
4
GND
VIO
GND
6
71
GND
1
23
5
7
VIO
48
43
42
18
7
11
2
16
/2 100n2
C2820
2X100n
"Note"
"Note"
"Note"
"Note"
"Note!"
"Note"
"Note"
"Note!"
SDRAM_CTRL(17:0)
SDRAM_AD(15:0)
MEMCONT(9:0)
"Note!"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note""Note"
I2C2(1:0)
DIG_AUDIO(20:0)
"Note!"
INT_SIM(5:0)
JTAG(6:0)
PUSL(15:0)
"Note!"
CBUS(3:0)
RFCTRL(11:0)
RFCONV(20:0)
TXC(2:0)
TXP
"Note!"
INT_MMC(13:0)
SDRAM_CTRL(17:0)
I2C0(1:0)
EMINT(3:0)
VISSI(27:0)
ETM(20:0)
GENIO(99:0)
"Note"
"Note"
"Note"
SDRAM_AD(15:0)
SDRAM_DA(31:0)
EXTADDA(31:0)
SDRAM_CTRL(17:0)
SDRAM_BA(1:0)
MEMCONT(9:0)
INT_MMC(13:0)
RFCLK(1:0)
HISSI(8:0)
"Note!"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note"
CCP(30:0)
"Note"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note"
"Note!"
USB(20:0)
"Note"
"Note"
"Note"
"Note"
Page 24
5 6
D
C
B
A
D
C
B
A
128Mx16 M3
43470S2|NONET
D3000
K5W2G1GACI-AL60
COMBO 32Mx32 DDR
A1
4
1 2 3 4 5 6
1 2 3
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
SDRAM_BA(1:0)
SDRAM_DA(31:0)
SDRAM_CTRL(17:0)
SDRAM_AD(15:0)
MEMCONT(9:0)
EXTADDA(31:0)
NAND(15:0)
SDRAM_AD(15:0)
SDRAM_CTRL(17:0)
SDRAM_DA(31:0)
SDRAM_BA(1:0)
MEMCONT(9:0)
EXTADDA(31:0)
NAND(15:0)
NAND(15:0)
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
MEMORY 2G+1GDDR POP
Name
Page 25
MESSI
I2C0SCL
I2C1SDA
I2C1SCL
LOSSI
Not use with I2C
Not use with I2C
Not use with I2C
MemCard interface A-side (MMC): Refer to Gazoo sheet
LCD Clk, RDX and WRX: Shield those traces from every direction in order to avoid crosstalk problems
ETM interface: In order to quarantee reliable tracing, traces should be as short as possible and have steady impedance,
MESSI
MESSI
5 6
A
1 2
MESSI
MESSI
LOSSI
3 4 5 6
D
RAPU1.0
RAPU1.0
C
Not use with GAZOO
1
LOSSI
MESSI
LOSSI
MESSI2
C
B
ULPI interface: It is recommended to place ULPI transceiver as close to RAPU as possible,
so that the length of the traces is minimized
A
D
I2C PULL UP RESISTORS
CCP interface: Refer to RAPU sheet
HISSI interface: Refer to RAPU sheet
MESSI2
MESSI
MESSI
MESSI
MESSI
2
Not use with I2C
LOSSI
MESSI2
MESSI
3
MESSI
MESSI
MESSI2
Not use with I2C
4
Cam Clks: Shield Cam Clk traces from every direction in order to avoid crosstalk problems
I2C0SDA
B
DISPC_PCLK Shield PClk trace from every direction in order to avoid crosstalk problems
SleepClk: Refer to RAPU sheet
AudioClk/DigiMicClk: Refer to RAPU sheet
SysClk192: Refer to RAPU sheet
INSTRUCTIONS FOR LAYOUT:
MESSI
MESSI2
MESSI2
SPI Clocks: Shield SPI Clks trace from every direction in order to avoid crosstalk problems
3
4
9
15
16
17
4
0
16
7
1
40
30
86
11
53
0
26
13
2
2
12
34
35
36
37
14
1
14
9
37
38
9
1
35
36
31
32
33
7
22
1
14
20
22
23
24
21
10
10
11
1
9
21
1
10
11
1
0
14
2
3
0
20
4
Copyright (C) Nokia Corporation. All rights reserved.
4
6
3
2
2
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
RAPU1.1 MUX HW71
Name Appr
20
13
8
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
16
8
52
21
22
3
9
13
1
0
2
3
39
1
0
15
12
2
3
1
2 4
11
3
10
11
16
0
0
15
5
6
13
9
1
19
18
0
6
4
1
11
21
8
50
51
12
6
5
12
13
6
7
38
10
1
4
40
14
8
0
8
4
12
5
16
17
18
49
4
7
0
27
28
29
6
7
15
16
12
5
14
69
70
5
15
3
7
6
0
2
5
1
8
3
0
11
71
0
73
20
9
19
66
67
68
6
7
13
18
27
10
11
46
47
5
9
72
5
6
47
48
49
2
10
30
7
13
2
28
29
2
15
76
R28503k3
12
4
5
15
16
17
10
75
31
13
48
4
5
7
8
44
45
10
3
4
5
6
55
23
22
6
46
83
84
1
54
2
1
9
10
62
32
33
43
64
0
1
58
59
60
61
42
1
2
0
57
19
20
23
24
25
20
21
7
1
7
44
45
9
63
80
12
10
9
56
8
25
1
3
3
39
11
15
13
74
34
65
6
7
8
R28523k3
VIO
5
87
R2851
VIO
20
19
8
VIO
3k3
85
6
7
21
12
1
77
78
79
81
82
13
2
3
12
18
19
3
26
1
2
6
13
14
15
41
20
15
10
7
3
VIO
16
13
3k3 R2853
8
41
42
18
98
7
8
9
10
52
5
12
11
10
0
6
4
5
2
3
5
4
9
8
53
99
11
16
17
3
2
4
5
14
15
5
4
8
1
2
3
4
6
19
3
17
0
1
14
13
12
0
7
16
17
21
14
9
11
11
0
24
25
54
43
0
15
0
1
6
7
50
51
genio81
genout104
genout105 TXP2
SysClk384 MCLK
I2C2SDA
I2C2SCL
DIG_AUDIO(20:0)
REFCLK_I
genio26
genio119
genio35
genio24
genio120
genio121
genio38
genio61
genio60
genio59
genio58
genio62
genio57
IRDA(2:0)
FMTX(15:0)
genio44 AccInt2
genio5
LED(10:0)
4
DISPC_DATA_LCD15
DISPC_DATA_LCD14
DISPC_DATA_LCD13
DISPC_DATA_LCD12
DISPC_DATA_LCD11
DISPC_DATA_LCD10
DISPC_DATA_LCD9
DISPC_DATA_LCD8
DISPC_DATA_LCD7
DISPC_DATA_LCD6
DISPC_DATA_LCD5
DISPC_DATA_LCD4
DISPC_DATA_LCD3
DISPC_DATA_LCD2
DISPC_DATA_LCD1
DISPC_DATA_LCD0
I2C0SDA
I2C0SCL
genio22
genio23
mm_drdy
mm_int
genio40
genio41
EANC_CLK
EANC_SYNC
RAPU_EANC_OUT
RAPU_EANC_IN
EANC_RST
genio78
genio79
genio80
DIF0A0
DIF0LCDTE
DIF1LCDTE1
DIF1WRX
genio9
genio7
genio8
genio10
genio63
DIF1RDX
DIF1LCDTE0
DIF1CS0X
SysClk192
AVVideoCTRLgenio14
DIF1A0
genio33
genio36
genio38
genio45
genio55
LCD(99:0)
genio72
TxCClk
TXC(2:0)
RXDATAClk
RXDa0
RFCONV(20:0)
genout105
genout104
DISPC_DATA_LCD17
DISPC_DATA_LCD16
"Note!"
ULPIStp genio128
genio129
genio130
genio131
genio132
genio133
genio134
genio135
genio136
PURX
LCDRstX
"Note!"LCDClk
LCDCS0X
LCDCS1X
LCDData
DIF0CS0X
DIF0CS1X
DIF0Da0
DIF0Da1
DIF0Da2
DIF0Da3
DIF0Da4
DIF0Da5
DIF0Da6
DIF0Da7
"Note"DIF0WRX
"Note"DIF0RDX
genio118
genio119
genio120
genio121
genio122
genio123
"Note!" DISPC_PCLK genio124
DISPC_HSYNC genio125
DISPCVSYNC genio126
DISPC_ACBIAS genio127
USB(20:0)
"Note"
ULPIData0
"Note"
ULPIData1
"Note"
ULPIData2
"Note"
ULPIData3
"Note"
ULPIData4
"Note"
ULPIData5
"Note"
ULPIData6
"Note"
ULPIData7
genout93
genout92
genout91
genout90
genout89
genout88
TXP
TxCDa
TxCDaCtrl
genout96
genout97
genout98
genout99
genout100
genout101
genout102
genout103
GlobalRstXgenio42
VISSI(27:0)
genio106
genio107
genio108
genio109
genio110
genio111
genio112
genio113
genio114
genio115
genio116
genio117
genio19
XAUDIO(7:0)
XEarL
XEarR
Mic3Rn
Mic3RP
Mic3LN
Mic3LP
Mic3LN
Mic3LP
Mic3RN
Mic3RP
SDRAMxCS2
CCP(30:0)
CCPStrbN1
"Note"
CCPStrbP1
"Note"
CCPDaN1
"Note"
CCPDaP1
"Note"
CCPStrbN0
"Note"
CCPSrtbP0
"Note"
CCPDaN0
"Note"
CCPDaP0
"Note"
genout95
genout94
MRInt_HallInt
AccInt1
I2C0SDA
I2C0SCL
genio12
I2C2SDA
I2C2SCL
ALSINT
LedFlashIntgenio1
HACPAEngenio120
ProxEnable
ProxInt
DIG_AUDIO(20:0)
EarDataL
EarDataR
RFCTRL(11:0)
TXA
RX1
RX2
TXReset
SysClk192 "Note!"
"Note"
TCLKretgenout104
genio48
genio47
Cam_Reg_1V8
Cam_Reg_2V8
genio18
SleepClk
CLK_REQ
SQCLKIP
"Note"SleepClk
A_GPS_CLK_REQ
SleepClk "Note!"
SleepX
genout97
genio21
ROW6
COL0
SDRAd14
MMC2(15:0)
I2C2SDA
I2C2SCL
FlashINT
I2C2SDA
I2C2SCL
"Note!"Cam1Clkgenio87
USBChargeINTgenio4
ExpanderInt
I2C0SDA
I2C0SCL
FMTxRstX
ReferenceClkSysClk192
SENSORS(15:0)
DISPCDataLCD18
DISPCDataLCD19
DISPCDataLCD20
DISPCDataLCD21
DISPCDataLCD22
DISPCDataLCD23
RFID(4:0)
DVB_H(15:0) AUDIOTEST(5:0)
MMCCardDetgenio25
MMC(15:0)
GPSBlanking
USBSyncClk
SSI(7:0)
HostWakeUp
PURX
SleepClk
SleepX
genio20
CBUSENX_IN
BUSMODE
"Note!"SLEEPCLK
FM_AUDIO_PR
FM_AUDIO_NR
FM_AUDIO_PL
FM_AUDIO_NL
I2SMOSI
I2SMISO
I2SSCLK
I2SWS
HissiData0P
HissiData0N
HissiData1P
HissiData1N
HissiClkP
HissiClkN
HissiData2P
HissiData2N
VISSI(27:0)
DISPCDataLCD0
DISPCDataLCD1
DISPCDataLCD2
DISPCDataLCD3
DISPCDataLCD4
DISPCDataLCD5
DISPCDataLCD6
DISPCDataLCD7
DISPCDataLCD8
DISPCDataLCD9
DISPCDataLCD10
DISPCDataLCD11
DISPCDataLCD12
DISPCDataLCD13
DISPCDataLCD14
DISPCDataLCD15
DISPCDataLCD16
DISPCDataLCD17
DISPCPCLK
DISPCHSYNC
DISPCVSYNC
DISPCACBIAS
LCD(99:0)
ROW3
ROW4
ROW5
COL1
COL2
COL3
COL4
COL5
SDRAM_AD(15:0)
SDRAMCTRL(17:0)
SDRAMxCS2
SDRCKE2
SDRAd13
genio6
genio34
FMRADIO(20:0)
I2C2SDA
I2C2SCL
FMIRQ
ACI(7:0)
ACIRX
ACITX
genio31
genio32
AV(5:0)
ConnDet
AVPAEn
BufferSleep
AVVideoCTRL
genio37
genio14
HISSI(8:0)
genio6
DigiMICData
"Note!"DigiMICClk
genio39
INT_SIM(5:0)
SimDataClk
ETM(20:0)
"Note!"
ETMDa8
"Note"
ETMDa9
"Note"
ETMDa10
"Note"
ETMDa11
"Note"
ETMDa12
"Note"
ETMDa13
"Note"
ETMDa14
"Note"
ETMDa15
EMINT(3:0)
Emint0
BootModeSel
LDOPowerDown
KEYB(15:0)
ROW0
ROW1
ROW2
BTUARTIn
BTUARTOut
BTWakeUp
BTH_Clk_Req
BTResetX
BTPCMClk
BTPCMSync
BTPCMIn
BTPCMout
genio85
genio49
genio50
genio53
genio54
genio82
genio83
genio84
EXTADDA(31:0)
ExtAdDa16
ExtAdDa17
ExtAdDa18
ExtAdDa19
ExtAdDa20
ExtAdDa21
ExtAdDa22
ExtAdDa23
ExtAdDa24
ExtAdDa25
CBUS(3:0)
CBusEn2X
RFCTRL(11:0)
RFBusEn2X
"Note"
MMCDaDir0genio69
SDMMCLSSHutDn
MMCCmdDir
"Note"
genio70
genout98
I2C1SDA
I2C1SCL
CamResetShutdowngenio16
"Note!"Cam0Clkgenio86
WLAN(15:0)
"Note!"SPI_Clk
SPI_CSX
SPI_MOSI
SPI_MISO
WLANENABLE
WLAN_IRQ
genio74
genio75
genio76
genio77
genout100
genio73
BT(23:0)
BTRTS
BTCTS
USB(20:0)
ULPICS
INT_MMC(13:0)
"Note!"MMCFbClk
MMCDaDir3
"Note"
MMCDaDir2
"Note"
MMCDaDir1
"Note"
genio11
genio71
genio52
TimeStamp
GPSInt
FlsCS1X
genio51
genio11
genio11
GPS(15:0)
GPSResetX
CCP(30:0)
LedFlashEn
CamResetShutdown2
LedFlashStrobegenio43
genio56
genio17
MEMCONT(9:0)
XENA(10:0)
VPPLock
genio76
genio72genio72
I2C0(1:0)
I2C1(1:0)
I2C0SDA
I2C0SCL
I2C1SDA
I2C1SCL
genio27
genio28
genio29
genio30
I2C2SDA
I2C2SCL
I2C2(1:0)
TXP
PUSL(15:0)
PURX
SleepClk "Note!"
SleepX
AUDIO(13:0)
LineInLP
LineInLN
LineInRP
LineInRN
CBUS(3:0)
CBusClk
CBusDa
CBusEn1X
SysClk384
genio63
genio64genio64
genio65genio65
genio66genio66
genio67genio67
genio68genio68
genio69genio69
genio70genio70
genio71genio71
genio73genio73
genio77
genio78
genio79
genio80
genio81
genio82
genio83
genio84
genio85
genio86
genio87
genio74
genio75
genio47
genio48genio48
genio49genio49
genio50genio50
genio51genio51
genio52genio52
genio53genio53
genio54genio54
genio55genio55
genio56genio56
genio57genio57
genio58genio58
genio59genio59
genio60genio60
genio61genio61
genio62genio62
genio63
genio31
genio32genio32
genio33genio33
genio34genio34
genio35genio35
genio36genio36
genio37genio37
genio38genio38
genio39genio39
genio40genio40
genio41genio41
genio42genio42
genio43genio43
genio44genio44
genio45genio45
genio46genio46
genio47
genio15
genio16genio16
genio17genio17
genio18genio18
genio19genio19
genio20genio20
genio21genio21
genio22genio22
genio23genio23
genio24genio24
genio25genio25
genio26genio26
genio27genio27
genio28genio28
genio29genio29
genio30genio30
genio31
GENIO(99:0)
genio0genio0
genio1genio1
genio2genio2
genio3genio3
genio4genio4
genio5genio5
genio6genio6
genio7genio7
genio8genio8
genio9genio9
genio10genio10
genio11genio11
genio12genio12
genio13genio13
genio14genio14
genio15
Page 26
US version identification component
F
4 8
RFMD
C
TRX3=High band 2/3
5
B
E
Renesas
10k
15k
4
Ampl3=Low band 5/8
1430841
Ampl1=High band 2/3
6
33k
6 7
1430121
8
Skyworks
A
Band 2/3/4/9
XXX
3
RFMD
RFMD
TRX1=Low band 5/8
1430851
D
22k
6k8
4k7
TRX2=High band 1/2
N.C.
1430690
7
Skyworks
B
R7504 value TX FEM WCDMA PA
RFMD
tol 1%
C
Renesas
Skyworks
E
RFMD
3k3
Band 5/8
Band 1/2
A
1430803
1
Ampl2=High band 1/2
D
1430917
Skyworks
2
2
Skyworks
Renesas
1430909
0r0
3
1430911
1
F
XXX
Skyworks
5
XXX
RFMD
C7565
3p3
C7535
2u2
C7568
10n
4k7
R7500
R7510
10k
18p
C7578
10n
C7546
C7511
33p
4000004
Z7523
850/900MHz
In(F2)
Out(F2)
Out(F1)
6
Vcc1_amp2
7
9
In1
4511791:US
4511124
869-894/1805-1880MHz
Z7521
In(F1)
21
Vcc2_amp3
23
Out3
25
27
GND
29
Out2
31
Vcc2_amp2
Out1
33
Vbat
4
GND
5
Icntrl1
11
In2
13
Vcc1_amp2
14
Icntrl2
In3
1618
Vcc1_amp3
19
GND
Vcc_amp1
2
Icntrl3
20
Vbat
100p
C7571
N7540
RF6278
2u2
C7576
22nHL7542
RFout
ISO
GND
CPLD
EU, US
LMCP2HAA-657
L7500
4580004|ALT
RFin
22k
NC
4
VC3
5
VC2
6
7
VC1
8
GND
9
Icont_h
R7502
21
22
GND
GND
23
24
Vcc1
25
GND
Vsw
26
TX_1
27
28
Icont_I
29
GND
Vpd
3
14
Vcc2
GND
15
TRX2
16
17
RX2
RX1
18
TRX3
19
Vgain
2
20
GND
Ant
RF6283B
N7520
GND
1
10
TX_2
11
Vcc3
12
GND
TRX1
13
3p3
C7520
NOT_ASSEMBLED
R7504
39R
R7524
18p
C7529
2u2
C7570
120R/100MHz
L7563
T7520
DEA201810BT-7090C1
4580006
18p
C7521
10u
C7569
REFG
L9
R7923
VBAT_TX
L1
HV
L10
GNDREFBUF
VBAT_BAT
L11
L2
NC
L3
GNDCP
GND_PRE
L4
L5
RXOUT_PQ
GNDDIG
L6
L7
NC
GNDDIG3
L8
J9
K1
VCP
K10
GNDBB_TX
K11
DAC_REF1
RFC10
K2
K3
RFC11
K4
RXOUT_PI
K5
RXOUT_NQ
VDIG
K6
K7
GNDDIG2K8REFP
K9
GND_VCO_SUB
J1
TXQ_180
J10
TXQ_0
J11
J2
RFC5
J3
VREF_CM
J4
RXOUT_NI
J5
SCLK
SDATA
J6
GNDCP_TX
J7
J8
REFM
TXI_180
H1
VBAT_VCO
H10
DAC201
H11
TXI_0
GND_VCO
H2
H3
GNDBB_RX
PRG
H4
H5
XENA
XRESET
H6
GNDPRE_TX
H7
OSCIN
H8
NC
H9
F8
GNDRF_TX
F9
C1NI
G1
G10
P_OUTP
G11
G_OUTP
C1PI
G2
C2NI
G3
G4
VBAT_RX
G7
DAC101
G8
VDAC
G9
DAC202
E2
CLKONX
VBEXT
E3
C1PQ
E4
E9
VBAT_WTX
F1
C2NQ
P_OUTM
F10
F11
G_OUTM
C2PI
F2
C2PQ
F3
C1NQ
F4
GND_RF_TX2
TXC
C9
GNDVCO
D1
D10
W_OUTN_L
W_OUTN_H2
D11
D2
WTRP2
RFC4
D3
RFC9
D7
D9
DET
NC
E1
W_OUTM_L
E10
W_OUTP_H2
E11
RFC8
WDET
B9
GNDMIX
C1
W_OUTP_H
C10
GND_TX_SUB
C11
C2
DAC102
DAC203
C3
C4
RFC3
TRP2
C6
C7
RFC7
C8
MUX_IN
INM_900
A9
WTRP1
B1
W_OUTN_H
B10
B11
GNDVGA
B2
MUX_OUT
RFC1
B3
B4
RFC2
B5
GNDLNA
B6
SHLD_GND
RFC6
B7
B8
TRP1
A1
INP_850
A10
INM_850
A11
INP_2150
A2
INM_2150
A3
INP_1900
A4
A5
INM_1900
A6
INP_1800
A7
INM_1800
A8
INP_900
4380116
N7500
VAPAUS5.1
L7525
120R/100MHz
R7921
10n
C7501
R7505
27R
Z7541
4512306
10n
C7533
C7532
18p
4512072|RITSA6A
Z7542
4512068:US
4511799
Z7543
1920-1980/1850-1910MHz
C7544
2u2
22nH
L7522
18p
C7547
1uH
L7560
47R
R7506
18p
C7531
100p
C7534
C7530
18p
100n
C7500
Z7540
4512321
10u
C7563
R7924
C7575
100p
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
RF
Name
C7560
10u
10R
R7501
C7506 100n
R7525
not_assembled
56R
C7574
2u2
L7540 8n2H
C7507
10n
C7567
2u2
J7538
C7566
10n
C7514
10n
100n
100n
C7503
C7504
C7545
100p
C7508
L7521
15nH
10n
28R/100MHz
L7501
8p2
C7526
R7520
470R
C7528
2u2
2u2
C7509
IND_SMPS
G7
G8
IND_SMPS
H1
FB_SMPS
VHI
H2
H3
VBB_VRX
VREG50S
H4
H5
CB_SMPS
H6
GND_SMPS
GND_SMPS
H7
H8
GND_SMPS
F5
GND_VREG50_d
F6
INPUT_SMPS
F7
INPUT_SMPS
INPUT_SMPS
F8
SCLK
G1
G2
SMPS_CNTRL
G3
GND_DIG
GND_VREG50S
G4
G5
MUX2
IND_SMPS
G6
GND_DIG
E2
E3
GND_DIG
E4
XRESET
OUT_BOOST
E5
E6
OUT_BOOST
OUT_BOOST
E7
OUT_BOOST
E8
DATA
F1
F2
ENABLE
GND_DIG
F3
F4
HV
C8
GND_BOOST
VREF
D1
VXO
D2
D3
GND_DIG
GND_DIG
D4
D5
IND_BOOST
IND_BOOST
D6
D7
IND_BOOST
IND_BOOST
D8
E1
GND_DIG
B5
GND_DCDC
GND_DCDC
B6
B7
IND_DCDC
B8
VBATT
C1
PA_DAC
ANT_T1
C2
GND_DIG
C3
C4
MUX1
C5
GND_BOOST
C6
GND_BOOST
C7
GND_BOOST
GND_DIG
A2
VBB_VRX1
A3
A4
VREG50BD
GND_VREG50BD
A5
A6
CB_BOOST
A7
IND_DCDC
A8
VBATT
FB_BOOST
B1
B2
ANT_T2
B3
GND_DIG
CB_DCDC
B4
18p
C7548
AURA
N7560
4380050
FB_DCDC
A1
10n
C7502
4520105
G7500
J7536
Vb
C7542
1n0
L7502
120R/100MHz
10n
47k
C7573
R7560
L7562
120R/100MHz
L7575
2u2
C7572
60R/100MHz
L7561
A7501
RF_SHIELDRF_SHIELD
A7500
1n0
C7541
C7561
10n
US
18p
C7510
R7575
330k
C7577
2u2
100nC7505
C7543
1n0
0R
R7522
10u
C7562
R7521
not_assembled
470R
470R
R7523
not_assembled
R7922
4511797:US
880-915MHz
Z7544
4511798
C7527
18p
2u2
Vcc_PA
C7512
DAC102
Vbat
REFL_MEAS
TXC
TXC_in
TXFEM_Vpd
Vbat_PA
Vcp1
Vcc_Vapaus
Vcc_WPA
Vcc_WPA
Vcc_PA
VrefRF01
VXO
Vcc_WPA
FWD_MEAS
ANT
TXFEM_Vpd
TXFEM_Vgain
Band_sel
Aux_cntrl1
Band_sel
Aux_cntrl2
RXQN
DAC203
DAC202
FWD_MEAS
REFL_MEAS
TXC_in
HW_id
Aux_cntrl4
Vcc_Vapaus
TXFEM_VC3
TXFEM_VC2
TXFEM_VC1
Vcc_WPA
Aux_cntrl3
Aux_cntrl2
Aux_cntrl2
Aux_cntrl1
Aux_cntrl1
Vcc_PA
Vcc_Vapaus
RFCLKN
TXIN
RFCLKEXT
Vcp1
Vbat_PA
TXFEM_Vpd
Band_sel
DAC203
DAC201
Vcc_WPA
Vbat_PA
TXFEM_VC3
TXFEM_VC2
TXFEM_VC1
TXFEM_Vgain
DAC202
Vcc_WPA
Vcc_WPA
Vbat_PA
Vcc_WPA
DAC203
DAC102
Vcc_WPA
Vbat_PA
Vcc_WPA
Vbat
Vb
RFbusDat
RFbusEna
RFbusClk
TXresetX
Vb
Vcc_Vapaus
DAC202
Aux_cntrl4
Aux_cntrl4
Aux_cntrl3
Aux_cntrl3
TXFEM_Vpd
TXFEM_VC1
HW_id
TXFEM_Vgain
DAC201
Vbat_PA
TXFEM_VC2
TXFEM_VC3
VrefRF01
VrefRF01
VrefRF01
Vcp1
Vcp1
DAC_REF1
Vbat
Vbat
Vcc_PA
Vcc_PA
RXIP
RXIN
RXQP
VREFCM
TXresetX TXresetX
TXresetX
AFC
VXO
VXO
VXO
VXO
DAC201
TXQN
TXQP
TXIP
RFCLKP
RFbusClk RFbusClk
RFbusClk
RFbusDat RFbusDat
RFbusDat
RFbusEna RFbusEna
RFbusEna
Page 27
2 3
1
C CLIPS FOR ANTENNA
5
D
C
B
A
D
C
2 4
Clock buffer for WLAN/BT
4
5 6
1 6
B
A
3
2p7
GND
not_assembled
C7594
not_assembled
C7593
2p7
1p8
C7591
1p5
C7590
12p
C7592
KT21P-UCW28N
38.4MHz
4520089
G3390
-38.400M-T
GND
OUT+Vcc
6n8H
L7599
This document is property of Nokia Corporation
RF EXT
Name Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
L=
W=0.50
Z7593
Z7591
W=0.50
L=
Z7592
W=0.50
L=
L=
W=0.50
Z7590
X7550
X7551
2
1u0
C3390
GNDGND
6
6p8
C3392
GND GNDGND
100k
R3390
GND
X7505
1 IN
2 OUT
C3391
1u0
BH28SA2WGUT
4341871
N3390
GND
STBY
VOUTVIN
RFC10
RFC11
OSC_IN
RFCLKEXT_IN
RFCLKEXT_GPS
VXO
Vbat
RFC11
RFC10
ANT
BT(23:0)
RFCLKEXT_IN
RFCLKEXT_BT
WLAN(15:0)
PUSL(15:0)
Page 28
2rq_06e_asmdrw_t.pdf
Page 29
2rq_06e_asmdrw_b.pdf
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