66D10UnusedNot connected
67CD2#UnusedoutDirectly grounded in RPE–1
68GNDGND
Original 02/98
Page 3–11
RPE–1
PAMS
System Module
Technical Documentation
Antenna Connector
PinLine
Symbol
X71RFOUTImpedance50Ω at 890...960 MHz
ParameterMini-
mum
Typical
/ Nomi-
nal
Maxi-
mum
Unit / Notes
SIM Connector Electrical Specifications
PinNameParameterMinTypMaxUnitNotes
4GND GND00VGround
3, 5VSIM5V SIM Card4.85.05.2VSupply voltage
6SIMDA-TA5V Vin/Vout4.0
0
2SIMRST5V SIM Card4.0HIGHVSIMVSIM reset
HIGH
LOW
VSIM
0.5
VSIM data
Trise/Tfall max 1us
1SIMCLKFrequency
Trise/Tfall
3.25
25
MHz
ns
SIM clock
Page 3–12
Original 02/98
PAMS
RPE–1
Technical Documentation
Baseband Block
Introduction
This document specifies the BB section of the GX8 RF/system module for
RPE–1 Transceiver Card The BB section of the GX8 employs the MAD2 ASIC
from DCT–3, RFI2 (RF/BB interface ASIC) from DCT–2, and a new ASIC
named as SMART to interface to a PCMCIA slot, and to a GSM phase I SIM
reader. The main guideline for the baseband block is the PC Card ’95 release,
which contains considerable hardware and software enhancements compared
to the earlier versions of the PCMCIA standard. Another important set of proposals is included in the ExCA specification that provides a more narrow definition of PC Card technology for PC architecture machines. The current revision
of the ExCA standard is Release 1.50 .
Modes of Operation
The Baseband in RPE–1 operates in one of the several operating modes. All
modes except one are normal PCMCIA modes. One mode is for use in non–
PCMCIA environments. The diagram below presents both physical operating
and logical sub operating modes.
System Module
RPE–1 can be used in systems where standard PCMCIA host controller is not
available. In non–PCMCIA mode the PCMCIA interface is bypassed inside the
interface ASIC so that the MBUS, FBUS and PCM speech data signals are
brought directly to the PCMCIA connector.
Operating modes and interface signals of the RPE–1
RPE–1
PCMCIA MODENon–PCMCIA MODE
NORMAL MODE
–Memory mode: CIS
–I/O mode:
–PCM speech
–FBUS
FLASH PRG MODEDAI MODE
–MBUS (Flash clk)
–FBUS
–FBUS (to DAI box)
–PCM speech
NOKIA PROPRIETARY MODE
–FBUS
–PCM speech
–MBUS
–RESET
–Flow control signals
Original 02/98
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RPE–1
PAMS
System Module
Normal operation mode
In the normal operating mode the RPE–1 acts as a cellular telephone without
built–in UI. After power–up the PCMCIA interface is first in memory mode, during which the host computer reads the PC CARD standard CIS information
from the RPE–1 card. The CIS is stored in the internal ROM of the SMART
interface ASIC. After reading the CIS the interface goes into I/O mode for runtime operation. One bit in the SMART operation control register determines
which mode is being used.
In normal operation the card looks like a modem card to the host computer. The
operation interface emulates a 16C550 UART. Control data for the RPE –1
goes through the UART to the internal FBUS of system ASIC MAD2. In addition there is an USRT through which speech data flows. It has its own control
and data registers in the interface ASIC. All this is implemented in the SMART
ASIC.
Flash programming mode
The Flash programming mode is used in updating the card software. The host
computer and the RPE–1 control software in it control the Flash download procedure.
Technical Documentation
During Flash programming the FBUS operates in synchronous mode with the
MBUS signal acting as a clock. The data to be downloaded to the RPE–1 goes
through the FBUS. The SMART ASIC generates the clock. The Flash mode is
selected with a bit in SMART operation mode control register.
Non–PCMCIA mode
RPE–1 can be used in applications where standard PCMCIA interface is not
available. Non–PCMCIA mode offers a simple interface for controlling it. The
controller thus does not have to be a personal computer but a simple microcontroller is enough.
Non–PCMCIA mode is activated by connecting pin ”BVD2/SPKR#” to the
ground on the host side of the PCMCIA connector. When this signal is 0 the
interface ASIC enters the non–PCMCIA mode and routes FBUS, flow control
signals and PCM speech data bus directly to the PCMCIA connector. Also A8
should be pulled down with 100k resistor to enable SMART ASIC sleep clock
feature. Internal registers of the interface ASIC are not accessible, so the ASIC
takes care of proper startup of the card. The external system must give a proper RESET signal.
In the non–PCMCIA mode MBUS is routed via a bidirectional switch directly to
the PCMCIA connector pin 29 A0. This switch is controlled by BVD2/SPKR#.
This allows user to control MAD2 with MBUS.
Page 3–14
Original 02/98
PAMS
RPE–1
Technical Documentation
Electrical Characteristics
Introduction
The RPE–1 supply voltage must be in the range of 3.0 V to 5.25V. There is a
special undervoltage sensing supervisor circuit for stopping the Card if VCC
goes below the nominal 2.93V ( 2.92– 2.96V for the whole temperature range).
If the voltage goes below this value, SimCardDetX is driven LOW and power–
down sequence starts.
Maximum Ratings
SymbolParameterRatingsUnitComments
V
V
V
I
I
CC
I
o
IK
OK
Supply voltage –0.5 to 5.5Vsee the next table below.
Input voltage range –0.5 to VCC+0.5V
Output voltage range –0.5 to VCC+0.5V
Input clamp current 20mA
Output clamp current 20mA
Operating temperature range–25 to +70°C
Storage temperature range–40 to +85°C
System Module
Supply Voltages and Power Consumption
Pin / Conn.Line SymbolMinimumTypical / Nomi-
nal
17PCMCIA connector supply
voltage VCC
51PCMCIA connector supply
voltage VCC
17PCMCIA connector supply
current VCC
51PCMCIA connector supply
current VCC
3.0V3.3V5.25V
3.0V3.3V5.25V
Operating Current (average values)
Operating voltage (V)Operating modeTotal (mA)
3.3idle32
3.3call301
3.3reset5
Maximum
500mA
500mA
Original 02/98
Page 3–15
RPE–1
PAMS
System Module
Block Diagram of RPE–1
RX
Modified HD843 RF block
RXIP, RXIN
AFC
RFI2
CRFRT
TXQP , TXQN
TXIP , TXIN,
Technical Documentation
Duplex filter
TX
VCTCXO
CRFRT cntrl
SIM
SIM data, 5V
RFI cntrl
CLK 13MHz
MBUS
SIM data
FBUS
MAD2
PCM speech
SleepCLK
SMART
PURX
Delay
SIMCardDetX
System clock 13MHz clipped sinevawe
Memory bus
SRAM
FLASH
EEPROM
Page 3–16
SPKR#/BVD2
A0 pin 29
Pin 62
PCMCIA bus
RESET
PCMCIA connector
Original 02/98
PAMS
RPE–1
Technical Documentation
Interface specification
RPE–1 interfaces
SIM
SIM interface
PCMCIA
PCMCIA interface
PCMCIA conn. 68 pin
Interface
ASIC
SMART
MAD2–RFI2 interface
System ASIC
MAD2
System Module
RF block
RFI2
BB–RF interface
SMART–MAD2 interface
PCMCIA interface
All digital activity to external hosts go through the PCMCIA interface. This interface is handled by the SMART ASIC. In the SMART ASIC the PCMCIA interface section VCC is the PCMCIA connector VCC. The SMART ASIC uses
three independent supply voltages:
– for SIM interface VSIM supply,
– for PCMCIA interface VCC supply and
– for SMART ASIC core VCCARD supply.
The interface has two operating modes: one for PCMCIA compliant computer
hosts and one for non–PCMCIA hosts. Pin definitions depend on the mode.
The PCMCIA interface has two different pinouts. The first is the normal
PCMCIA pinout which conforms to the PC Card ’95 standard. The second
mode is the Nokia proprietary mode in which FBUS and PCM SIO buses are
connected directly to the PCMCIA connector. Also flow control signals, RESET,
and MBUS are routed to the connector. MBUS is used for synchronizing the
FBUS during data transfer in FLASH–mode. The PCMCIA connector pinouts
and corresponding electrical characteristics are listed in the next table.
Memory interface
SRAM
EEPROM
Flash
Original 02/98
Page 3–17
RPE–1
Explanation
Explanation
PAMS
System Module
Technical Documentation
SIM Interface
The SIM card connector is located in the baseband section. The system ASIC
MAD2 controls the SIM card. All signals go through the interface ASIC SMART
for level conversion.
While the baseband block operates on 3.0 V supply, phase I SIM cards require
a 5 V operating voltage. Level conversion for the signals is done in the interface
ASIC SMART. The I/O cells of the SMART for the SIM signals have a separate
5 V power supply. SIM signals are listed in the table below. All SIM signals
must be able to withstand short circuit to ground without damage.
Signals between the system ASIC MAD2 and RFI2 ASIC are digital signals and
thus are not in the scope of the RF specification. Signals in the MAD2–RFI2 interface are listed in the following table.
Signals in MAD2 – RFI2 interface
MAD2RFI2
Pin nameDirectionPin nameDirection
COBBAClkOUTRFICLKINSystem clock for RFI2.
VCXOPwrOUT
COBBADa0RFIDA0
COBBADa1RFIDA1
COBBADa2RFIDA2
COBBADa3RFIDA3
RFI2. analog power control. Connected to
RFI2 regulator.
INRFIDAAUXOUTRFI2 auxiliary data available acknowledge.
DSPGENOUT5OUTSYSRESETXINRFI2 reset.
RFIDA5
.
RFIDA6
RFIAD1
.
RFIAD2
Original 02/98
Page 3–19
RPE–1
Explanation
PAMS
System Module
Technical Documentation
SMART – MAD2 interface
The interface between the SMART and MAD2 ASICs is basically an asynchronous FBUS and a synchronous PCM bus. These serial buses are common for
all DCT3 phones. FBUS is there for transferring the control data between the
host computer and the system ASIC MAD2. The PCM bus transfers only
speech samples during a voice call. In normal phone speech samples would
go to speech codec.
The interface contains also the system RESET. The SIM interface is another
part of SMART–MAD2 interface.
SMART – MAD2 Interface Signals
SMARTMAD2
Pin nameDirectionPin nameDirection
FBusTxDOUTAccRxDataINFBUS data from SMART to MAD2.
FBusRxDINAccTxDataOUTFBUS data from MAD2 to SMART.
CTSINMCUGenOut3OUTFBUS CTS (clear to send).
RTSOUTMCUGenIO0INFBUS RTS (ready to send).
DTROUTMCUGenIO4INFBUS DTR (data terminal ready).
DCDINMCUGenOut4OUTFBUS DCD (carrier detect).
RIINMCUGenOut5OUTFBUS RI (ring indicator).
MBusOUTMBUSINFBUS clock during Flash download.
PURXOUTPURXINSystem RESET.
SleepClkOUTClk32kIN32 kHz sleep clock.
PCMRxDataINPCMTxDataOUTPCM speech data from MAD2 to SMART.
PCMTxDataOUTPCMRxDataINPCM speech data from SMART to MAD2
PCMDClkOUTPCMDClkINPCM bit clock.
PCMSClkOUTPCMSClkINPCM byte sync signal.
DSPXFXINDSPXFOUTBlock sync for PCM SIO bus.
SMARTGeninINDSPGenOut0OUTSleep Note from MAD2 to SMAR T
MBUS interface
In PCMCIA modes the MBUS is generated by the SMART ASIC and used as
clock for FLASH downloading.
Page 3–20
In non–PCMCIA mode the MBUS is routed directly from the PCMCIA connector
pin 29 to the MAD2 MBUS pin 112 (SMART ASIC is bypassed). In this mode
the MBUS is bidirectional.
NOTE: MBUS logic levels must not exceed MAD2 VCC 3.0V.
Original 02/98
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