Nokia 6730 classic, RM-547, RM-566 Schema
Nokia Customer Care
Service Manual
RM-547; RM-566 (Nokia 6730 classic; L3&4)
Schematics
Part No: (Issue 1)
COMPANY CONFIDENTIAL
Copyright © 2009 Nokia. All rights reserved.
TXIP
TXIN
IREF
RFClkN
RXIN
RXQP
VCP1
7000-9999
RXQN
VREF
TXC
AFC
RFTEMP
WTXDET
TXQn
4
VBATRF
3 4 5 6
1 2 3
1
A
1 2
RFClkP
6
D
C
B
A
D
C
B
VXO
RXIP
5
VREFRF01
TXResetX
RFBusClk
RFBusDa
RFBusEn1X
TXQP
Vcp1
VrefRF01
7
9
1
0
1
0
0
RFbusClk
RFbusDat
RFbusEna
RXIN
RXIP
RXQN
RXQP
TXC
TXIN
TXIP
TXQN
TXQP
TXresetX
VREFCM
VXO
Vbat
SSI(7:0)
TXCCONV(4:0)
WLAN(15:0)
R6RF
R6RF
SMASHED
AFC
ANT
Aux_cntrl1
Aux_cntrl2
DAC_REF1
RFCLKEXT
RFCLKN
RFCLKP
BT(23:0)
COMP_VIDEO
DVB_H(15:0)
FMANT
FMRADIO(20:0)
GAZOOIO(3:0)
PUSL(15:0)
PWRONX
REFCLK_I
RFCLK(1:0)
RFCONF(20:0)
RFCTRL(11:0)
RFClkExt
RFClkExt_GPS
RFPWR(5:0)
SLOWAD(6:0)
dd-mmm-yy
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
BB
1
2
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
CMT ENGINE
Name
6
4
5
VCTCXO_in
VCTCXO_out
VXO
7
8
3
0
1
8
0
3
4
0
6
RFEXT
ANT
PUSL(15:0)
RFCLKEXT_BT
RFCLKEXT_GPS_BT
RFCLKEXT_in
RXIP RXIP
RXIN RXIN
XENA RFBUSENA
SDATA RFBUSDA
SCLK RFBUSCLK
DACREF1 DACREF1
AFC AFC
VCP VCP
RFPWR(5:0)
RFCONV(20:0)
RFCLK(1:0)
RFCLKPREFCLKP
RFCLKNREFCLKN
VXO VXO
RXQN RXQN
VREFCM
VREFCM
RFCLKEXT_GPS_BT
RFCLKEXTRFCLKEXT
REFCLK_I
RFCTRL(11:0)
TXCCONV(4:0)
PWRONX
SSI(7:0)
BT(23:0)
SLOWAD(6:0)
FMRADIO(20:0)
FMANT
GAZOOIO(3:0)
COMP_VIDEO
PUSL(15:0)
WLAN(15:0)
DVB_H(15:0)
VREFRF01 VREFRF01
XRESET
TXRESETX
TXQP TXQP
TXQN TXQN
TXIP TXIP
TXIN TXIN
TXC TXCTXC TXC
RXQP RXQP
2 3 4 5 6
D
C
B
A
D
2200-2399
2900-2999
C
B
A
1 2 3 4 5 6
1
MMC2(15:0)
PUSL(15:0)
PWRONX
REFCLK_GPS
REFCLK_I
RFID(4:0)
SENSORS(15:0)
SIM(6:0)
SLOWAD(6:0)
USB(20:0)
WLAN(15:0)
XAUDIO(7:0)
XENA(10:0)
ETM(20:0)
FMANT
FMRADIO(20:0)
FMTX(15:0)
GAZOOIO(3:0)
GPS(15:0)
H_BRIDGE(5:0)
I2C0(1:0)
I2C1(1:0)
I2C2(1:0)
IRDA(2:0)
JTAG(6:0)
KEYB(15:0)
LCD(99:0)
LED(6:0)
MMC(15:0)
CMT_IF
ACI(7:0)
AUDIO(13:0)
AUDIOTEST(5:0)
AV(5:0)
BT(23:0)
CCP(20:0)
CHARGER
COMP_VIDEO
DIG_AUDIO(8:0)
DVB_H(15:0)
RFCTRL(11:0)
RFID(4:0)
SENSORS(15:0)
SSI(7:0)
TXC(2:0)
USB(20:0)
WLAN(15:0)
XENA(10:0)
GPS(15:0)
I2C0(1:0)
I2C1(1:0)
I2C2(1:0)
INT_MMC(13:0)
INT_SIM(5:0)
IRDA(2:0)
JTAG(6:0)
KEYB(15:0)
LCD(99:0)
MMC(15:0)
MMC2(15:0)
PUSL(15:0)
REFCLK_I
RFCLK(1:0)
RFCONV(20:0)
USB(20:0)
XAUDIO(7:0)
DIGI
ACI(7:0)
AUDIO(13:0)
AUDIOTEST(5:0)
AV(5:0)
BT(23:0)
CBUS(3:0)
CCP(20:0)
DIG_AUDIO(8:0)
DVB_H(15:0)
EMINT(3:0)
ETM(20:0)
FMRADIO(20:0)
FMTX(15:0)
CBUS(3:0)
CHARGER
DIG_AUDIO(8:0)
EMINT(3:0)
GAZOOIO(3:0)
H_BRIDGE(5:0)
INT_MMC(13:0)
INT_SIM(5:0)
LED(6:0)
MMC(15:0)
PUSL(15:0)
PWRONX
SIM(6:0)
SLOWAD(6:0)
TXC(2:0)
TXC_CONV(4:0)
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
POWER
ACI(7:0)
AUDIO(13:0)
Copyright (C) Nokia Corporation. All rights reserved.
Appr
dd-mmm-yy
Name
BB TOP LEVEL
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
LPRFCLK
RFClkExt
RFPWR(5:0)
PWRONX
RFPWR(5:0)
RFClkExt
RFCONF(20:0)
RFCLK(1:0)
RFCTRL(11:0)
GAZOOIO(3:0)
SSI(7:0)
BT(23:0)
PUSL(15:0)
TXCCONV(4:0)
SLOWAD(6:0)
FMRADIO(20:0)
FMANT
COMP_VIDEO
WLAN(15:0)
DVB_H(15:0)
REFCLK_I
RFClkExt_GPS
RF_BB
Use VBAT distripution plane underneath ASIC for proper power supply
AudioClk: Shield audioClk trace from every direction in order to avoid crosstalk injected to it.
Sleepclock: Shield Sleepclock trace from evey direction in order to avoid crosstalk injected to it.
2u2/6V3
B
1
Resistor values to be defined with simulations.
VAUX 1 and 2 not close to VMEM!
Shared audioClk (Rapu-Gazoo-digimic) needs termination resistors in the beginning of each trace.
A
directly to resistor pads
1
connect to TestNet3 T1
Layout instructions:
3
6
B
2 6
D
4
C
2u2/6V3
2 4
C
Lines must be connected
Signal integrity instructions:
connect to ClassDKelvin N6
D
5
A
Gazoo 2.0 sleepClk: Place T-filter (47R-33pF-47R) near Gazoo before dividing traces to other components.
2u2/6V3
VRCP1
2
GND
VBAT1
Digimic, no need for MICB1 capacitor
3
MemCard IF between Rapu-Gazoo: Traces should as short as possible and have good ground reference.
VBUS SMPS components are not needed if USB charging supported!
5
120R/100MHz
VIO
GND
GND
L2206
3203855
2 3
4
1
GND
GND
VDigimic
2
1445345
R2200
PMR03EZPJU10L
SENSE
CURRENT1
GND
1
2u2
2351104
C2294
GND
3
2u2
Near to L2300
2351104
C2245
EMInt
VBAT13
2351104
C2317
5
2
GND
11
2u2
2351104
C2271
GND
VREF
VBatLED
3
0
2
Near RAPU
5
GND
GND
GND
0
C2251
2320546
27p
J2205
1
GND
VIO
0
GND
SIMDa
VBAT
3
GND
GND
GND
2
VSIM
3
0
2u2
C2280
VMEM
2351104
VDDAUDTX
7
22u
2351044
C2230
2351048
C2319
2u2
C2266
2351104
2u2
10u
GND
1
GND
GND
2351033
C2211
GND
GND
GND
VRFC
2u2
2351104
C2247
4
VBAT
GND
GND
C2281
2351104
C2265
2u2
2351104
GND
8
VOUT
11
GND
4
0
7
GND
1
VBAT
GND
VBAT12
EarDataR
CbusData
13
0
1
C2231
2351044
22u
2u2
GND
VBAT11
5
GND
VAUX1
2351104
C2326
2
3
2
VBAT10
VCORE
GND
CbusSelX
GND
CbusClk
BGND
VBAT
GND
1
2
5
1u0
GND
GND
1
GND
VBAT12
2
C2314
2351029
PMARN
SleepClk
0
5
2u2
2351104
C2267
VBAT4
VCharIn1
0
GND
0
T11
GndUSB
T13
VCore
GndVCore
T14
T15
GndVCore
GndVCore
T16
TestNet2
T2
VBatIHFLN
T3
T4
GndIHFLP
IHFSpRN
T6
T7
IHFSpLN
R3
GndIHFLN
R4
IHFSpRP
R5
R6
GndIHFRP
R7
VBatIHFRN
R8
VCharOut1
R9
VCharIn2
T1
TestNet3
T10
VCharOut2
CBusSelX
P8
P9
VBUS
R1
TestNet1
R10
VUSB
R11
VBUSCoil
R12
DM
R13
DP
GndVCore
R14
R15
GndVCore
R16
GndVCore
R2
GenOut2
VPROGID
P14
P15
VCoreCoil
P16
VCoreCoil
P2
RSTX
EarDataR
P3
IHFSpLP
P4
P5
VBatIHFLP
VBatIHFRP
P6
GndINFRN
P7
N6
ClassDKelvin
CBusClk
N7
CBusData
N8
ChInd
N9
GenOut1
P1
P10
VBUSSMPSOut
P11
VBatUSB
BTemp
P12
P13
USBCharDis
N12
RFTemp
N13
N14
VBack
VBatVCore
N15
N16
VBatVCore
N2
MicData
N3
AudClk
N4
PMARN
N5
EarDataL
M13
VCoreDef
M14
CMDDir
M15
LedOut
M2
Speed
M3
VDDAudRx3
VBUSCtrl
M4
PMARP
N1
VBatChacon
N10
N11
SMPSClk
GndPVSS2
SIMClkC
L14
L15
GndLED
SIMDaC
L16
L2
LineInRN
L3
XEarR
XEarRC
L4
GndChacon
L7
L8
VCharInTest
GndCHInd
L9
EarN
K4
K6
Mic1P
GndAudRx
K7
K8
GndAVSS2
K9
USBCharDetX
LineInRP
L1
L10
ID
VBatLED
L13
LST
J9
K1
VDDAudRx
K10
SetCurrD
GndLED2
K11
K13
GndPVSS3
K14
ClkB
VBatVSIM
K15
VSIM
K16
XEarLC
K2
K3
XEarL
Data4B
Data3B
J14
J15
VBatVAux
J2
SlaveSW
MicB2
J3
Mic3RN
J4
J6
LineInLN
J7
Suspend
J8
GndAVSS1
H2
H3
MicB1
MicSub
H4
LineInLP
H6
WTxDet
H7
H8
VOut
H9
ExtPWMOut
J10
SetCurrKB
J11
Data4Dir
J13
HeadDet
G6
G7
VRef
VDIGI
G8
G9
MBus
H10
OVVLed
H11
SIMRstC
H13
VAux1
H14
Data2B
VBatVAux
H15
VDDAudRx2
Data1A
G10
GndLDO2
G11
VAux2
G13
G14
Data1B
CMDB
G15
GndVMEM
G16
G2
Mic2P
Mic3LP
G3
Mic3RP
G4
F15
VBatVMEM
VMEM
F16
F2
VDDAudTx
Mic2N
F3
Mic3LN
F4
F7
GndRef
F8
VBatVDigi
SIMDetX
F9
EarP
G1
Data3Dir
E15
CMDA
E2
GndVibra
SleepX
E3
SenseM
E4
VR1
E5
F1
GndAudTx
VDD18
F10
F13
ClkFB
GndPVSS5
F14
VibraN
D2
D3
TxCData
TxCOut
D4
VBatVR1
D5
GndXTAL
D6
D7
VBatVAna
VDigiMic
D8
VCP
D9
ClkA
E13
E14
FlyLow
C9
VBatVibra
D1
HookDet
D10
D11
MBusRx Data2Dir
D12
Data1Dir
D13
D14
Data4A
D15
GndVIO
GndVIO
D16
C15
VIOCoil
C16
VIOCoil
TxCClk
C2
C3
AFCOut
C4
SleepClk
C5
WDDis
C6
VRFC
VRTC
C7
FlyHigh
C8
VAna
B7
B8
GndCPump
B9
VBatVCP
VibraP
C1
C10
BSI
C11
GndPVSS6
SIMDa
C12
Data3A
C13
Data2A
C14
B12
SIMIOC
B13
SIMClk
B14
VBatVIO
B15
B16
VBatVIO
TxCCtrl
B2
B3
SenseP
B4
GndLDO1
GndLDO1
B5
B6
CrO
ATM
A2
EMInt
A3
PURX
A4
CrI
A6
A7
VBg
VBatVibra
B1
B10
PwrOnX
B11
UserResetX
MBusTx
10
GAZOO_V3.4
N2200
A1
VBatVibra
A10
GndPVSS7
VRCP1
A11
A13
VIO
A14
VBatVIO
VBatVIO
A15
VBatVIO
A16
VBAT1
V2300
PMEG3002AEL
4111107
56p
2320554
C2252
PMARP
VBAT10
3
GND
VBAT
0
EarDataL
120R/100MHz
3203855
L2204
3203855
L2205
120R/100MHz
GND
1
VBAT8
VDDAUDRX
15
2351104
C2282
VBACK
MbusTx
3
10
2u2H
3649179
L2300
C2296
2351104
GND
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
GND
GND
2u2
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
dd-mmm-yy
Name
GAZOO
3203855
L2203
VANA
GND
4
VBAT9
120R/100MHz
VBAT3
VBAT
VBAT13
GND
SIMIOC
8
32.768kHz
4530069
B2200
GND
C2315
2351104
2u2
J2203
1
GND
2
2351104
2u2
C2214
0
4
GND
C2229
2351104
2u2
SDClkA
2351104
2u2
C2213
10U
2310037
C2232
GND
VBAT
0
4
5
2351104
C2222
2u2
GND
GND
0
Rstx
2
GND
GND
VDDAUDRX
4
1
2.6V
4700003
G2200
-
+
2
VBAT11
GND
L2310
3649176
1uH
VBAT
GND
VBACK
12
3
VBAT9
2
VBAT
SleepX
3
GND
VBAT
VBAT5
GND
1
VBAT5
GND
GND
120R/100MHz
0
VBAT8
GND
1
8
L2202
3203855
2u2
6
5
0R
R2201
C2269
2351104
GND
5
0
NA
14
Purx
2
VR1
GND
VAUX2
9
GND
GND
GND
VBatLED
1
0
MicData
1uH
3649176
L2340
GND
6
VBAT4
GND
GND
C2285
2351104
2u2
MbusRx
GND
1
VDDAUDTX
6
VBAT
7
6
68p
2320556
C2227
GND
GND
VBAT3
1
3
C2253
2320556
68p
GND
VANA
GND
4
GND
2u2
2351104
C2228
C2268
2351104
2u2
2351104
2u2
C2316
2351104
2u2
C2249
VBUS
0
SleepCLK
VBAT_VIO_SMPS
VBAT_VCORE_SMPS
CBusCLK
CHARGER
TXCCtrl
CbusSelX
TXCDa
RSTX
SleepX
PURX
kelvin
INT_SIM(5:0)
FBCLK
LED(6:0)
USB(20:0)
Vchar_det
audclk0
mic_data
PWRONX
kelvin
TXCCLK
LED(6:0)
SLOWAD(6:0)
SenseN
GAZOOIO(3:0)
SenseP
SMPSCLK
CbusData
"VBAT plane underneath Gazoo intput"
XAUDIO(7:0)
AUDIO(13:0)
H_BRIDGE(5:0)
SLOWAD(6:0)
CBUS(3:0)
TXC(2:0)
DIG_AUDIO(8:0)
ACI(7:0)
EMINT(3:0)
TXC_CONV(4:0)
PUSL(15:0)
INT_MMC(13:0)
MMC(15:0)
SIM(6:0)
A
1 2 3 4 5 6
1 2 3
2800-2849
2850-2899
3000-3099
4 5 6
D
C
B
A
D
C
B
USB(20:0)
VISSI(27:0)
WLAN(15:0)
XENA(10:0)
IRDA(2:0)
KEYB(15:0)
LCD(99:0)
MEMCONT(9:0)
MMC(15:0)
MMC2(15:0)
PUSL(15:0)
REFCLK_i
RFCONV(20:0)
RFCTRL(11:0)
RFID(4:0)
SDRAMCTRL(17:0)
SDRAM_AD(15:0)
SENSORS(15:0)
SSI(7:0)
TXP
CCP(20:0)
DIG_AUDIO(8:0)
DVB_H(15:0)
EMINT(3:0)
ETM(20:0)
EXTADDA(31:0)
FMRADIO(20:0)
FMTX(15:0)
GENIO(99:0)
GPS(15:0)
HISSI(8:0)
I2C0(1:0)
I2C1(1:0)
I2C2(1:0)
INT_MMC(13:0)
INT_SIM(5:0)
USB(20:0)
VISSI(27:0)
MEM
EXTADDA(31:0)
MEMCONT(9:0)
NAND(15:0)
SDRAM_AD(15:0)
SDRAM_BA(1:0)
SDRAM_CTRL(17:0)
SDRAM_DA(31:0)
MUX
ACI(7:0)
AUDIO(13:0)
AUDIOTEST(5:0)
AV(5:0)
BT(23:0)
CBUS(3:0)
I2C0(1:0)
I2C2(1:0)
INT_MMC(13:0)
INT_SIM(5:0)
JTAG(6:0) MEMCONT(9:0)
PUSL(15:0)
RFCLK(1:0)
RFCONV(20:0)
RFCTRL(11:0) SDRAM_AD(15:0)
SDRAM_BA(1:0)
SDRAM_CTRL(17:0)
SDRAM_DA(31:0)
TXC(2:0)
TXP
Name
DIGI
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
rapu_yama_V1_1
CPU
CBUS(3:0)
CCP(20:0)
DIG_AUDIO(8:0)
EMINT(3:0)
ETM(20:0)
EXTADDA(31:0)
GENIO(99:0)
HISSI(8:0)
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
dd-mmm-yy
GPS(15:0)
BT(23:0)
MMC2(15:0)
I2C0(1:0)
SENSORS(15:0)
REFCLK_I
RFCONV(20:0)
INT_SIM(5:0)
RFCONV(20:0)
TXC(2:0)
AUDIOTEST(5:0)
AV(5:0)
FMRADIO(20:0)
XENA(10:0)
KEYB(15:0)
MMC(15:0)
FMTX(15:0)
RFID(4:0)
WLAN(15:0)
RFCTRL(11:0)
RFCLK(1:0)
JTAG(6:0)
I2C1(1:0)
ETM(20:0)
PUSL(15:0)
CBUS(3:0)
EMINT(3:0)
I2C2(1:0)
USB(20:0)
RFCTRL(11:0)
ACI(7:0)
LCD(99:0)
DVB_H(15:0)
IRDA(2:0)
INT_MMC(13:0)
DIG_AUDIO(8:0)
CCP(20:0)
SSI(7:0)
AUDIO(13:0)
100n
C
Bypass for CPU
0402
6
C2806 and C2807 combined to one 0203
0402
0402
Shared audioClk (Rapu-Gazoo-digimic) needs termination resistors in the beginning of each trace.
A
0203/2
6
100n
Bypass for CPU
100n
Shield DISPC_PCLK trace from every direction in order to avoid crosstalk injected to it.
Shield MMC Clk trace from every direction in order to avoid crosstalk injected to it.
0201
D
Termination place close to RAPU
Termination place close to RAPU
0203/2
0203/1
5
100n
A
Shield Sleepclock trace from evey direction in order to avoid crosstalk injected to it.
Resistor values to be defined with simulations.
0203/2
0203/1
B
1
REMOVE RAPU 2.0
100n
Bypass for CPU
0203/1
CCP IF: Differential interface -> match lenghts and maintain symmetry even with clk and data..
B
3
Signal integrity instructions:
C
2
5
D
Gazoo 2.0 sleepClk: Place T-filter (47R-33pF-47R) near Gazoo before dividing traces to other components.
0203/2
Bypass for CPU
Termination place close to RAPU
Internal LDO
Bypass for CPU
100n
C2841 and C2803 combined to one 0203
MemCard IF between Rapu-Gazoo: Traces should as short as possible and have good ground reference.
Preferred routing layers, 4 and 5. No stubs allowed. Minimum trace widht for achiving 100Ohm impedance.
Layout instructions:
0203/1
0201
32
4
41
Shield audioClk trace from every direction in order to avoid crosstalk injected to it.
Bypass for CPU
Shield SysClk192 trace from every direction in order to avoid crosstalk injected to it.
SysClk192: termination needed if is used or shared in design.
ETM Interface: traces should be as short as possible and have steady impedance, shield signal for preventing crosstalk.
47R
R2802
100R
R2803
VIO
59
VIO
7
26
GND
7
39
RFClkP
RFClkN
VIO
2u2
2351104
C2830
73
3
4
5
VIO
4
5
14
65
34
7
Name
RAPU_YAMA
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
GND
VIO
Copyright (C) Nokia Corporation. All rights reserved.
Appr
dd-mmm-yy
/2 100n1
C2820
2710205
36
17
GND
0
1
2
5
6
8
GND
10
VIO
49
64
54
VIO
6
VIO
1
5
6
18
16
17
0
1
0
VIO
2
20
5
77
32
VIO
GND
0
1
3
4
5
VIO
29
24
2
66
67
6
60
61
62
30
2710205
C2824
1 /2 100n
0
2
3
13
45
VIO
1
0
9
37
GND
28
4
R2804
1430006
3k3
9
6
50
51
57
56
GND
GND
22
3
7
5
0
GND
2
47
VIO
2
0
1
6
GND
6
GND
80
4
8
3
VRFC
VIO
1
35
5
76
3
4
VIO
GND
2
31
0
7
19
GND
4
/2 100n
27
44
86
87
82
2710205
C2810
1 /2 100n 2
C2810
2710205
0
11
VCORE
3
7
4
5
2
C2818
2710205
/2 100n
16
1
2710205
C2818
1 /2 100n
1
55
58
21
/2 100n
2710205
C2817
2
2u2
2351104
C2823
3
VIO
8
2
0
46
0
41
VIO
12
2
8
GND GND
47R
1419079
R2801
25
69
68
2710205
C2825
1 /2 100n
2
C2825
2 /2 100n
3
GND GND
0
GND
/2 100n
2710205
C2821
2
70
4
10
2
74
75
VIO
4
GND
3k3
1430006
R2805
11
11
10
2X100n
C2806
2710205
2 /2 100n
40
78
79
6
VIO
13
18p
2351107
C2826
GND
GND
VCORE
15
17
33
VIO
100n
1
2
GND
GND
2
VCORE
C2801
2351017
0
1
/2 100n
2710205
C2814
2
1
15
16
GND GND
3
VIO
4
/2 100n1
C2814
2710205
9
C2824
2 /2 100n
1
1
10
/2 100n
2710205
C2811
2
0
VIO
7
8
42
11
VIO
20
GND
71
72
81
63
19
2X100n
2710205
C2806
1 /2 100n
2
6
2 /2 100n
C2841
2710205
2X100n
4
0
7
6
15
12
100n
16
2710205
7
VIO
9
2351017
C2800
T9
VDD5
VCCQ_POP2
U1
VSS
U2
VSS
U23
V23
VDDS3
Y12
VSS
VDD_POP12
Y23
/2 100n1
C2817
R8
R9
VDD5
T1
VDDS_1_4
T10
VDDRAM
VSS
T11
T12
VDDSTACK
VSS
T14
VDD
T15
T16
VSS
T2
VDDS1
VDDSTACK
T8
P2
P20
VSS
VDD5
P8
VSS
P9
VSS
R10
R11
VDD
VDD
R12
VDD
R13
R14
VDD
VDD
R15
R16
VDD
VDDSRAMOUT
M8
VDDSTACK
VDD5
M9
N15
VDD3
VSS
N16
VDDS_1_1
N2
VDDS8
N21
N8
VDD5
P1
VCCQ_POP1
VSS
P15
VSS
P16
VSS
K8
K9
VSS
L1
VCC_POP3
L15
VSS
L16
VDD3
VSS
L2
VDD5
L8
VSS
L9
M1
VSSASUB
VDD3
M15
M16
VDD3
VSS
J14
VSS
J15
VDD3
J16
VDD3
VDD4
J8
VDDSTACK
J9
VDD_POP11
K1
K15
VSS
K16
VSS
VSS
K2
VSS
K22
VDDSTACK
VSS
H2
VSS
H22
H23
VDD_POP10
H7
VDDARX
H8
VSS
VDDA18V1
H9
J1
VDDATX
J10
VDD2
VDDSTACK
J11
VDD2
J12
J13
G1
VDDS9
G10
G16
VSS
VSS
G8
H1
VDD_POP13
VSS
H10
H11
VSS
VDDRAM
H13
VDD3
H14
VDD3
H15
VSS
H16
VDDS9
E1
VDD_POP9
VSSAPLLStack
E2
VDDS12
E23
VDDAPLLStack
E3
E5
VSSARX
F1
VDDA_ACS
VSSA_ACS
F2
VSS
F22
F23
VDD_POP8
VSSATX
F3
VSS
VDD_POP7
C23
VSS
C9
VDDS_1_3
D1
VDDA18V2
D12
D17
VSS
D18
VDDS5
D21
VSS
D22
VSENSE
D23
VDDS12
VDDS9
D8
D9
B7
VSS
B8
VSS
C10
C12
VDDS10
VSS
C15
VSS
C16
VSS
C17
VDDS5
C18
C19
VSS
C21
VSS
VSS
C22
AC8
VSS
B10
VSS
B12
VSS
B15
VSS
B18
VDDS6
B19
VSS
B22
IFORCE
B23
B3
VDDA
VSS
B4
VSSA
B5
VSS
VSS
AB5
VSS
AB8
AC11
VPP_POP
AC12
VSSRX2
AC13
VCC_POP1
AC15
VDDS7
AC4
VSS
AC5
VCCQ_POP4
AC6
VDDS2
AC7
VDDS2
VCC_POP2
VDDS_1_2
VCCQ_POP3
AA1
VSSRX1
AA14
AA15
VDDS7
VSS
AA2
VSS
AA20
VSS
AA22
VDD_POP12
AA23
VSS
AB10
VSS
AB13
AB2
VSS
VDD_POP5
A15
A16
VDDS6
VDDS6
A17
A18
VDD_POP6
A21
VDDS6
VPP2
A22
A23
VPP1
A4
VDD_POP1
A5
VDDS4
VDD_POP2
A7
A9
/2 100n
D2800
RAPUYAMA_V1.11_PR_RITSA_BGA401
VDD_POP3
A10
A12
VDD_POP4
VSS
A13
GND
2
C2816
2710205
040-056208
A2800
BASEBAND SHIELD
ASSEMBLY
1
VIO
1 /2 100n
2X100n
C2841
2710205
38
0
52
53
GND
VCORE
10
48
4
5
0
85
83
100n
2351017
C2802
GND
VRFC
2710205
C2820
221/2 100n
R2806
27R
CE1MMX
FlsCS0X
Y2
SDRAD14
Y22
9
6
1
R2807
100R
G22
J23
SDRCKE2
SDRXCS2
M23
V1
FlsWEX
FlsOEX
V2
FlsADVX
W1
FlsClk
W2
W23
SDRAD13
Y1
NC
NC
AC23
B11
SDRCLKX
B16
NC
SDRLDQS2
B17
B20
SDRUDQS2
NC
C20
D2
SDRLDQS
NC
MMCClk
AB21
MMCCmd
NC
AB23
SDRAM_TEMP_SENSE
AC14
AC19
MMCDa2
AC2
NC
MMCDa3
AC20
MMCDa0
AC21AC22
D2800
RAPUYAMA_V1.11_PR_RITSA_BGA401
SDRCLK
A11
A14
NC
SDRUDQS
A6
FlsRstX
AB11
FlsWaitX
AB12
MMCDa1
AB19
AB20
R2808
84
14
GND
Y7
Y8
DISPC_DATA_LCD14
DISPC_DATA_LCD0
Y9
47R
Y18
GenIO69
Y19
GenIO75
Y20
Y21
GenIO13
GenIO25
Y3
Y4
DISPC_VSYNC
GenIO23
Y5
GenIO22
Y6
DISPC_DATA_LCD7
W4
GenIO3
Y10
GenIO0
Y11
Y13
CCPStrbP1
Y14
CCPStrbN1
CBusClk
Y15
ETMDa7
Y16
Y17
ETMDa5
ETMCtrl
V21
GenIO37
GenIO74
V22
V3
DISPC_DATA_LCD17
V4
DISPC_DATA_LCD11
GenIO11
W20
W21
GenIO46
W22
GenIO5
W3
DISPC_DATA_LCD13
DISPC_DATA_LCD16
U21
EarDataR
GenIO71
U22
U3
DISPC_DATA_LCD5
U4
GenIO8
U7
DISPC_DATA_LCD4
U8
DISPC_DATA_LCD10
DISPC_DATA_LCD15
U9
V20
GenIO39
U11
U12
GenIO43
CCPStrbN0
U13
CCPStrbP0
U14
I2C2SDA
U15
I2C2SCL
U16
U17
GenIO1
GenIO65
U20
T20
PMARP
T21
MicData
T22
T23
GenIO12
T3
GenIO26
T4
GenIO7
T7
GenIO17
GenIO2
U10
GenIO86
PMARN
R21
R22
GenIO48
EMInt1
R23
R3
GenIO14
GenIO20
R4
R7
GenIO18
T13
GenIO87
GenIO31
T17
EarDataL
GenIO35
P23
GenIO10
P3
P4
RFBusClk
P7
GenIO82
GenIO16
R1
GenIO33
R17
GenIO9
R2
GenIO47
R20
GenIO40
N23
RFBusEn1X
N3
RFBusDa
N4
N7
GenIO79
N9
GenIO50
P17
GenIO76
P21
SleepX
AudioClk0
P22
M22
DRXIP
M3
M4
GenIO84
M7
GenIO85
N1
GenIO81
N17
GenIO38
N20
PURX
GenIO73
N22
GenIO6
VREFP
L3
L4
VREFN
L7
GenIO83
M17
GenIO45
M2
DRXIN
SIMIOCtrl1
M20
SIMIODa1
M21
ULPIData2
GenIO57
RXIP
K3
K4
RXQP
K7
DRXQP
L17
GenIO58
SIMClk1
L20
L21
ULPIData4
L22
GenIO60
L23
J21
J22
GenIO34
TXQN
J3
RXQN
J4
DRXQN
J7
GenIO41
K17
ULPIClock
K20
K21
ULPIDir
K23
H17
H20
ULPIData3
ULPINxt
H21
H3
TXQP
IREF
H4
J17
GenIO55
J2
RXIN
ULPIData1
J20
ULPIData0
G20
G21
GenIO61
G23
GenIO52
G3
RFClkP
TXIN
G4
GenIO78
G7
RX2
G9
GenIO42
H12
GenIO62
TXIP
GenIO51
G11
G12
TxCClk
G13
GenIO29
G14
GenIO64
G15
GenIO36
G17
GenIO56
RFClkN
G2
ULPIStp
D6
SleepClk
D7
E20
ULPIData7
SMPSClk
E21
E22
GenIO59
E4
HissiData0N
ULPIData6
F20
ULPIData5
F21
F4
D14
GenIO27
D15
D16
GenIO28
D19
GenIO53
D20
GenIO54
D3
HissiClkP
D4
HissiData0P
HissiData1P
D5
EMU1
HissiData2P
C4
HissiData1N
C5
C6
EMU0
TXA
C7
C8
RXDa0
ExtSysClkReq
D10
D11
GenIO49
D13
GenIO32
TMAct
B6
GenIO68
B9
C1
TXP
C11
GenIO80
GenIO30
C13
C14
TxCDa
C2
HissiClkN
HissiData2N
C3
ETMClk
AC3
DISPC_ACBIAS
AC9
GenIO21
JTDI
B1
B13
GenIO4
GenIO63
B14
RXDATAClk
B2
GenIO67
B21
SysClk384
AB4
DISPC_DATA_LCD9
AB6
AB7
DISPC_DATA_LCD3
AB9
INT0
JTMS
AC1
AC10
GenIO72
AC16
SysClk192
AC17
ETMDa6
AC18
JTDO
CCPDaP1
AB14
CCPDaN1
AB15
ETMDa4
AB16
CBusEn1X
AB17
AB18
ETMDa1
AB22
GenIO77
AB3
DISPC_DATA_LCD1
DISPC_DATA_LCD6
AA21
DISPC_DATA_LCD12
AA3
AA4
GenIO19
AA5
DISPC_HSYNC
DISPC_DATA_LCD8
AA6
AA7
DISPC_PCLK
AA8
GenIO15
AA9
DISPC_DATA_LCD2
AB1
AA10
AA11
GenIO44
CCPDaP0
AA12
CCPDaN0
AA13
AA16
CBusDa
AA17
ETMDa2
ETMDa3
AA18
ETMDa0
AA19
GenIO70
D2800
RAPUYAMA_V1.11_PR_RITSA_BGA401
JTRSTn
A1
GenIO66
A19
A2
JTClk
A20
RX1
TXReset
A3
TxCDaCtrl
A8
GenIO24
1 /2 100n
13
12
8
GND GND
VRFC
2710205
C2816
18
5
GND
/2 100n1
C2811
2710205
VIOVIO
14
43
VIO
23
CCP0_DP
CCP0_DN
CCP1_DP
SDA2
CCP1_SN
CCP1_SP
CCP1_DN
Flash_Int
/2 100n1
C2821
2710205
I2C0(1:0)
CCP0_SN
SCL2
CCP0_SP
GENIO(99:0)
ETM(20:0)
VISSI(27:0)
EMINT(3:0)
SDRAM_AD(15:0)
SDRAM_DA(31:0)
EXTADDA(31:0)
SDRAM_CTRL(17:0)
SDRAM_BA(1:0)
MEMCONT(9:0)
INT_MMC(13:0)
RFCLK(1:0)
HISSI(8:0)
CCP(20:0)
USB(20:0)
I2C2(1:0)
DIG_AUDIO(8:0)
INT_SIM(5:0)
JTAG(6:0)
PUSL(15:0)
CBUS(3:0)
RFCTRL(11:0)
RFCONV(20:0)
TXC(2:0)
TXP
INT_MMC(13:0)
MEMCONT(9:0)
SDRAM_CTRL(17:0)
4
1
DDR
Data I/O
NAND
Ad
D3000
Addr/ Data Bus
K5W2G1GACI-AL60
A12,H23,K1,Y23,AA23=
VCC1A4,A7,A10,A15,A18,C23,E1,F23,H1=
NC
_CE1o
Y1
Y2
_CE0o
NC
Y22
B
3
A
B
65
V1
_WEo
_OEo
V2
V22
V23
W1
_AVDo
W2
CLKo
W22
2 3
Memory on the top of the Rapu_yama
4 5
D
C
A
1 2
6
D
C
VCC3
COMBO 32Mx32 DDR
DDR
128Mx16 M3
43471B0
NAND
CKEd
J22
NC
J23
_WEd
K23
L22
_CASd
L23
_RASd
M22
_CSd
M23
VCC2L1,AC8,AC13=
N22
N23
P22
P23
R22
R23
T22
T23
U22
U23
DM3d
C1
C2
DQS3d
D1
D2
D22
D23
12
W23
E23
F1
F2
G1
G2
G22
G23
J1
J2
NC
_CKd
B11
B13
B14
B16
DQS1d
B17
B19
NC
0
B20
DQS0d
B21
NC
B22
B23
NC
B3
B5
B6
DQS2d
B8
B9
M2
M1
AB4
AC4
AB6
AC6
AB7
E22
N2
N1
R2
R1
T2
T1
AB3
AC3
B1
AC1
NC
RDY1o
AC10
NC
AC11
AC12
NC
NC
AC14
AC15
NC
NC
NC
B2
AC17
AC18
NC
NC
AC19
NC
AC2
AC20
NC
AC21
BA1d
NC
AC22
AC23
NC
INT1o
AC9
AB1
NC
AB10
NC
_RPo
AB11
AB12
RDY0o
NC
AB14
NC
AB15
NC
AC7
NC
AB18
NC
NC
AB19
NC
AB2
AB20
NC
AB21
BA0d
NC
AB22
NC
AB23
INT0o
AB9
A11
CKd
A13
A14
A16
DM1d
A17
A19
NC
AC16
NC
A20
A21
A22
NC
A23
NC
A3
A5
A6
DM2d
A8
A9
COMBO 32Mx32 DDR
A1
A2
DM0d
AB16
AB17
GNDB12,H22,K2,K22,AA22=
GND1B4,B7,B10,B15,B18,C22,E2,F22,H2=
GND2L2,P2,U2,AA2,AB5,AB8,AB13=
P1,U1,AA1,AC5=
VCC
A1
NC
M39B0RB0A0N1P2N5
D3000
43471B0|NONET
128Mx16 M3
dd-mmm-yy
Name
MEMORY
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
SDRAM_AD(15:0)
SDRAM_DA(31:0)
MEMCONT(9:0)
NAND(15:0)
NAND(15:0)
EXTADDA(31:0)
SDRAM_BA(1:0)
SDRAM_CTRL(17:0)
EXTADDA(31:0)
SDRAM_BA(1:0)
SDRAM_CTRL(17:0)
MEMCONT(9:0)
NAND(15:0)
SDRAM_AD(15:0)
SDRAM_DA(31:0)
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
MMCCmdDir
ROW3
Vissi rippers 19-21: Shield traces from every direction to avoid crosstalk problems,
SDRAM AD13
A
LCD_TE
Cam_ShutdownX
Cam0Clk
LCD_RESX
COL0
B
Shlied Camera clocks from every direction for avoiding crosstalk problems.
LedFlashStrobe
ROW5
MESSI6
MESSI7
MESSI8
MMCDaDir1-3
ROW1
MESSI1
MESSI2
BTCTS
D
COL2
4
Layout instructions:
BTUARTIn
1
USBChargeINT
FMIRQ
COL1
BTUARTOut
2
Not use if I2C is in use
ACITX
RDX
LCD_D/CX
Reserved for SDRAM AD14 or SDRCKE2
Reserved for SDRAMxCS2
I2C0SDA
SOS
4
Not used (stacked memory)
2 6
LCDReset
Not use if I2C is in use
Not use if I2C is in use
ULPICS
Refer to Gazoo and RAPU_YAMA sheets for more instructions.
MMCFbClk
1
GlobalRstX
MESSI4
Not use if I2C is in use
3
ROW2
0201
ROW4
FlashInt
3
MMCCardDet
Route SPI interface carefully! Shieding in every direction is recommended.
LCD_CS
0201
6
Cam_Reg_1V8
COL4
C
BTResetX
5
BTPCMSync
WRX
B
MESSI5
D
2nd_Cam_ShutdownX
BTPCMClk
I2C1SCL
BTWakeUp
MESSI3
Clock request on RF-ext sheet!
Not use if I2C is in use
Cam1Clk
0201
0201
0201
MMCDaDir0
AVPAEN
ROW1
to GPS
A_GPS_CLK_REQ
GPS_TimeStamp
GPS_ResetX
GPS_Blanking
BTPCMIn
I2C0SCL
BT_HostWakeUp
I2C1SDA
A
DigiMICData
BTRTS
5
to GPS
ACIRX
Cam_Reg_2V8
ALSINT
ROW4
ROW5
COL3
ROW0
DigiMICClk
C
31
5
7
15
I2C PULL UP RESISTORS
Not use with GAZOO
BTPCMOut
4
0
6
7
1
15
25
3
6
10
7
29
24
0
47R
1419079
R2857
Near RAPU
12
4
53
19
8
10
17
52
28
28
10p0
NA
8
26
GND
C2850
2320121
13
49
66
3
1
6
1
1
2
1
6
11
19
62
25
26
5
15
22
1
1
12
13
10
3
2
13
9
3
7
9
16
23
0
R2854
1419079
47R
NA
6
4
11
10p0
2320121
C2851
47R
1419079
R2855
7
6
1
63
6
6
VIO
R2853
16
7
70
1430006
3k3
10
2
3
14
1
35
34
3k3
0
65
14
12
1
1430006
R2852
0
5
15
0
3
4
VIO
4
12
33
3k3
R2851
VIO
3k3
4
GND
8
R2850
0
12
2
1
0
7
4
78
2
2
10
64
5
48
22
10
19
18
8
83
16
1
47
17
2
1
20
11
5
67
13
22
49
30
2
5
41
11
11
7
5
2
71
16
17
20
27
11
20
57
7
8
0
11
45
46
54
25
37
14
7
10
21
5
21
85
3
11
47R
1419079
R2856
29
9
1
55
Place near RAPU
14
0
68
75
6
39
0
16
15
6
0
42
8
9
13
9
14
20
51
21
15
dd-mmm-yy
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
MUX
Name
36
2
2
13
84
15
19
8
13
21
9
9
43
16
30
24
27
3
6
2
5
4
18
15
74
5
3
69
19
10
87
23
15
12
12
44
16
81
3
58
16
56
2
10
3
80
0
3
22
73
17
18
14
12
79
14
21
60
5
32
24
20
17
1
18
4
40
5
38
11
0
1
8
9
20
23
2
0
8
11
0
77
76
1
13
13
1
3
0
8
7
4
20
10
50
4
8
1
2
59
72
4
13
0
82
VIO
BTH_CLK_REQ
61
6
3
12
1
7
1
5
86
8
3
12
7
genio25genio25
genio72
WLAN(15:0)
TimeStamp
A_GPS_CLK_REQ
genio51genio51
genio21
GPS(15:0)
GPSResetXTXA
I2C1SDA
I2C1SCL
GPSBlanking
GPSInt
SleepClk
SleepX
TXP
genio29genio29
TXP
genio5genio5
Mic3LN
Mic3LP
Mic3RN
Mic3RP
9
genio58
genio62genio62
genio30genio30
SSI(7:0)
DVB_H(15:0)
MMC2(15:0)
GPS(15:0)
FMTX(15:0)
INT_SIM(5:0)
LCD(99:0)
LedFlashInt
genio87
TxMask
"Cam1Clock -> noisy signal "
Cam1Clk
Mic3Rn
Mic3RP
Mic3LN
Mic3LP
genio18
genio19
CCP(20:0)
Cam_Reg_1V8
Cam_Reg_2V8
LedFlashStrobe
genio72
ExtSysClkReq
RX2
RX1
TXA
RFCTRL(11:0)
TXReset
SysClk192
HACPAEn
PUSL(15:0)
ProxEnable
ProxInt
SENSORS(15:0)
TCLKretRXDa0
DIG_AUDIO(8:0)
EarDataL
EarDataR
REFCLK_I
genio26genio26
genio35genio35
genio24genio24
genio61genio61
genio60genio60
genio59genio59
genio58
COL0
SDRAd14
I2C2SDA
I2C2SCL
FlashINT
I2C2SDA
I2C2SCL
USBChargeINTgenio4
ExpanderInt
I2C0SDA
I2C0SCL
ReferenceClkSysClk192
MRInt
AccInt1
I2C0SDA
I2C0SCL
MMCDaDir3
MMCDaDir2
RXDATAClk
RXDa0
RFCONV(20:0)
DIG_AUDIO(8:0)
genio39
DigiMICClk
DigiMIC_Data
I2C2SDA
I2C2SCL
ALSINTgenio68
genio72
CLK
FrameSync
DOUT
DIN
genio82
genio83
genio84
genio85
MMCCardDet
MMC(15:0)
USBSyncClk
HostWakeUp
PURX
SleepClk
SleepX
genio20
PURX
SleepClk
SleepX
CBUSENX_IN
BUSMODE
SLEEPCLK
FM_AUDIO_PR
FM_AUDIO_NR
FM_AUDIO_PL
FM_AUDIO_NL
I2SMOSI
I2SMISO
I2SSCLK
I2SWS
SleepClk
ROW6
genio23
ACI(7:0)
ACIRX
ACITX
genio31
genio32
AV(5:0)
ConnDet
AVPAEn
BufferSleep
AVVideoCTRL
genio37
HISSI(8:0)
VISSI(27:0)
DISPCDataLCD0
DISPCDataLCD1
DISPCDataLCD2
DISPCDataLCD3
DISPCDataLCD4
DISPCDataLCD5
DISPCDataLCD6
DISPCDataLCD7
DISPCDataLCD16
DISPCPCLK
DISPCHSYNC
DISPCVSYNC
DISPCACBIAS
RFID(4:0)
AUDIOTEST(5:0)
ETMDa9
ETMDa10
ETMDa11
ETMDa12
ETMDa13
ETMDa14
ETMDa15
EMINT(3:0)
Emint0
BootModeSel
LDOPowerDown
KEYB(15:0)
ROW0
ROW1
ROW2
ROW3
ROW4
ROW5
COL1
COL2
COL3
COL4
COL5
SDRAM_AD(15:0)
SDRAMCTRL(17:0)
SDRAMxCS2
SDRCKE2
SDRAd13
FMRADIO(20:0)
I2C2SDA
I2C2SCL
FMIRQ
BTWakeUp
BTH_Clk_Req
BTResetX
BTPCMClk
BTPCMSync
BTPCMIn
BTPCMout
genio85
genio47
genio48
genio49
genio50
genio53
genio54
genio82
genio83
genio84
EXTADDA(31:0)
ExtAdDa16
ExtAdDa17
ExtAdDa18
ExtAdDa19
ExtAdDa20
ExtAdDa21
ExtAdDa22
ExtAdDa23
ExtAdDa24
ExtAdDa25
LCDResetgenio9
ETM(20:0)
ETMDa8
genio71genio71
genio52
FlsCS1X
LedFlashEn
2nd_Cam_ShutdownX
I2C0SCLgenio28genio28
genio43
genio17genio17
MEMCONT(9:0)
XENA(10:0)
VPPLock
MMCDaDir0genio69
SDMMCLSSHutDn
MMCCmdDirgenio70
Cam_ShutdownXgenio16
I2C0SDAgenio27
"Cam0Clock -> noisy signal "
Cam0Clkgenio86
BT(23:0)
BTCTS
BTRTS
BTUARTIn
BTUARTOut
I2C0SCL
I2C1SDA
I2C1SCL
genio27
genio28
genio29
genio30
I2C2SDA
I2C2SCL
I2C2(1:0)
TXP
PURX
SleepClk
SleepX
AUDIO(13:0)
LineInLP
LineInLN
LineInRP
LineInRN
CBUS(3:0)
CBusClk
BusDa
CBusEn1X
SysClk384
USB(20:0)
ULPICS
INT_MMC(13:0)
MMCFbClk
MMCDaDir1
IRDA(2:0)
genio11genio11
genio65
genio66genio66
genio67genio67
genio68genio68
genio69genio69
genio70genio70
genio71genio71
genio73genio73
genio77
genio78
genio79
genio80
genio81
genio82
genio83
genio84
genio85
genio86
genio87
genio74
genio75
genio76
I2C0(1:0)
I2C1(1:0)
I2C0SDA
genio49
genio50genio50
genio51genio51
genio52genio52
genio53genio53
genio54genio54
genio55genio55
genio56genio56
genio57genio57
genio58genio58
genio59genio59
genio60genio60
genio61genio61
genio62genio62
genio63genio63
genio64genio64
genio65
genio33
genio34genio34
genio35genio35
genio36genio36
genio37genio37
genio38genio38
genio39genio39
genio40genio40
genio41genio41
genio42genio42
genio43genio43
genio44genio44
genio45genio45
genio46genio46
genio47genio47
genio48genio48
genio49
genio15
genio16genio16
genio17genio17
genio18genio18
genio19genio19
genio20genio20
genio21genio21
genio22genio22
genio23genio23
genio24genio24
genio25genio25
genio26genio26
genio27genio27
genio28genio28
genio31genio31
genio32genio32
genio33
GENIO(99:0)
genio0genio0
genio1genio1
genio2genio2
genio3genio3
genio4genio4
genio5genio5
genio6genio6
genio7genio7
genio8genio8
genio9genio9
genio10genio10
genio11genio11
genio12genio12
genio13genio13
genio14genio14
genio15
3
3100-3199
2700-2799
GPS switch / antenna
1400-1499
5
C
3200-3299
6
D
3
6
2400-2599
C
3300-3399
1
1
X6400
9900504
2000-2099
4
B
BT antenna
A
6000-6199
5
2100-2199
42
A
D
B
1 2
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
dd-mmm-yy
1 IN
2 OUT
3 4
VIO
Name
IF Top Level
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
5420002
X6200
VIO
SENSORS
SENSORS(15:0)
GND
1nH
L6203
L6202
1n2H
0R
R6215
VIO
sdcard
MMC
ETM(20:0)
MMC(15:0)
REFCLK_I
VBATT_1_3_GPS
VBATT_2_GPS
VIO_GPS
I2C1(1:0)
GPS
schematic
ANT_GPS
GPS(15:0)
PUSL(15:0)
SLOWAD(6:0)
USB(20:0)
GND
schematic
CAMERA
CCP(20:0)
X6202
9900505
HS_USB
hs_usb_charging
I2C2(1:0)
VIO_BT
GND
VBAT
MMC(15:0)
PUSL(15:0)
PWRONX
SENSORS(15:0)
SIM(6:0)
SLOWAD(6:0)
XAUDIO(7:0)
BT_FM
bthfmrds23m
ANT_BT
BT(23:0)
BT_WLAN(6:0)
FMANT
FMRADIO(20:0)
REFCLK_I
VBAT_BT
VDD1V8_BT
UI
UI
AV(5:0)
CCP(20:0)
GAZOOIO(3:0)
I2C0(1:0)
I2C1(1:0)
I2C2(1:0)
KEYB(15:0)
LCD(99:0)
LED(6:0)
AUDIO
schematic
AUDIO(13:0)
DIG_AUDIO(8:0)
H_BRIDGE(5:0)
XAUDIO(7:0)
C6216
5p6
FMANT
JTAG(6:0)
SLOWAD(6:0)
XAUDIO(7:0)
schematic
SIM
SIM(6:0)
WLAN(15:0)REFCLK_I
schematic
EMU_RAP
AUDIOTEST(5:0)
ETM(20:0)
JTAG(6:0)
CONN
schematic
ACI(7:0)
AUDIO(13:0)
AV(5:0)
CHARGER
COMP_VIDEO
ETM(20:0)
I2C2(1:0)
SENSORS(15:0)
MMC2(15:0)
SENSORS(15:0)
PUSL(15:0)
CCP(20:0)
XAUDIO(7:0)
MMC(15:0)
ETM(20:0)
REFCLK_GPSFMRADIO(20:0)
GPS(15:0)
FMRADIO(20:0)
BT(23:0)
XAUDIO(7:0)
H_BRIDGE(5:0)
DIG_AUDIO(8:0)
AUDIO(13:0)
IRDA(2:0)
REFCLK_GPS
FMANT
I2C1(1:0)
CCP(20:0)
SLOWAD(6:0)
GPS(15:0)
SIM(6:0)
SIM(6:0)
XAUDIO(7:0)
SLOWAD(6:0)
CHARGER
JTAG(6:0)
ETM(20:0)
RFID(4:0)
PUSL(15:0)
USB(20:0)
DVB_H(15:0)
SLOWAD(6:0)
SIM(6:0)
PWRONX
MMC(15:0)
LCD(99:0)
KEYB(15:0)
I2C2(1:0)
I2C1(1:0)
I2C0(1:0)
LED(6:0)
AV(5:0)
GAZOOIO(3:0)
AV(5:0)
AUDIOTEST(5:0)
ACI(7:0)
AUDIO(13:0)
FMTX(15:0)XENA(10:0)
JTAG(6:0)
ETM(20:0)
COMP_VIDEO
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