Page 1
Nokia Customer Care
Service Manual
RM-325 (Nokia 6600 fold)
Schematics
Part No: (Issue 1)
COMPANY CONFIDENTIAL
Copyright © 2008 Nokia. All rights reserved.
Page 2
6000-6099
3300-3399
2700-2799
4800-4899
3100-3199
C-cover
2
B
A
1 4
C
B
2000-2059
A
Grounding spring
3 6
1
C
Keypad
5
6
D D
2 3 4
2100-2169
2070-2079
2400-2499
2900-2999
2060-2069
2200-2399
2800-2899
3500-3549
7500-7599
SIM frame SIM frame
SIM frame
7800-7899
5
Double Grounding spring
EMA
E2005
9902888
GND GND GND
9902887
E2004
9902885
E2003
GND
9901956
X2011
E2002
9902886
X2012 X2013
6400184
GNDGND
USB_CTRL_CMT(2:0)
XAUDIO(5:0)
X2010
6400183
GND
6400184
E2006
9903139
GND
schematic
SYS_CONN
CHARGER
FM_ANT
I2C(1:0)
PUSL(7:0)
SLOWAD(6:0)
USB_ACI(7:0)
schematic
CAMERA
CAMERA_BTB(8:0)
CAM_CTRL_CMT(6:0)
CCP_CMT(3:0)
FLASH_CONN(2:1)
GEN_CTRL_CMT(20:0)
I2C(1:0)
MAIN_CAMERA_CONN(16:1)
SPI_CMT(3:0)
USB_ACI(7:0)
USB_CTRL_CMT(2:0)
XAUDIO(5:0)
7pin_dct5
PROD_TEST_PATTERN
USB_ACI(7:0)
schematic
UI
DISPLAY_BTB(25:0)
GEN_CTRL_CMT(20:0)
I2C(1:0)
KEYB_CMT(20:0)
MESSI_CMT(25:0)
PUSL(7:0)
PwrOnx
UI_BTB(5:0)
MMC-SD-card
schematic
MMC_CMT(15:0)
ETM(16:0)
GEN_CTRL_CMT(20:0)
H_BRIDGE(3:0)
I2C(1:0)
JTAG(6:0)
KEYB_CMT(20:0)
LPRFCLK
LPRF_CMT(6:0)
MESSI_CMT(25:0)
MMC_CMT(15:0)
PCM(3:0)
PUSL(7:0)
PwrOnX
SIM(6:0)
SLOWAD(6:0)
SPI_CMT(3:0)
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
BATTERY_CONN
schematic
SLOWAD(6:0)
Engine
schematic
AUDIO(6:0)
CAM_CTRL_CMT(6:0)
CCP_CMT(3:0)
CHARGER
DIG_AUDIO(5:0)
PCM(3:0)
PUSL(7:0)
dd-mmm-yy
Name
Top Sheet
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
UI_BTB(5:0)
schematic
EMU_RAP
ETM(16:0)
JTAG(6:0)
SIM
schematic
SIMIF(6:0)
schematic
LPRF
AUDIO(6:0)
FM_ANT
GEN_CTRL_CMT(20:0)
I2C(1:0)
LPRFCLK_I
LPRF_CMT(6:0)
AUDIO_BTB(8:0)
DIG_AUDIO(5:0)
GEN_CTRL_CMT(20:0)
H_BRIDGE(3:0)
IHF_CONN(2:1)
XAUDIO(5:0)
schematic
TOP_FLEX_CONN
AUDIO_BTB(8:0)
CAMERA_BTB(8:0)
DISPLAY_BTB(25:0)
GEN_CTRL_CMT(20:0)
I2C(1:0)
TOP_FLEX_CONN(52:1)
FLASH_CONN(2:1)
MAIN_CAMERA_CONN(16:1)
IHF_CONN(2:1)
TOP_FLEX_CONN(52:1)
GND
schematic
Audio
AUDIO(6:0)
Page 3
(GenIO43)
USB_GND
2351029
Internal VBUS
Place near DM_TXD traces
DC/DC CONV SMB138C 19WLCSP DC/DC CONV Bq24150 WLCSP20
CHIPCAP X5R 4U7 K 6V3 0603 CHIPCAP X5R 1U K 25V 0603
CHIPCAP X5R 10UF K 6V3 0603
CHIPCAP X5R 4U7 K 6V3 0603
C20xx
PCB: Max current 1A
PCB: route signals together
C2910
share footprint with C2010
D+
2320125
and keep same length
share footprint with C2014
PCB: Max current 1A
A
C2014
Not used in Shelby
2351050
3
Not Assembled
1445348
D+
5
ID
ID
Production Test
USBOTGIntN
I2C0_SCL
PCB: Max current 1A
2351050
Assemble if EMC problem
B
I2C0_SCL
Production Test
External VBUS
uUSB Connector (AB type)
Not used in Shelby
1u0
Add an extra CAP if R2004
is far away from C2010
LST
2351061
8-pin Tigger for space reserve on PCB
ID
GND
2351029
2351029
3
Do NOT use 2320505 for 2351050
CHIPRES 0W125 0R068 F 0402
CHIPCAP X5R 1U K 25V 0603 CHIPCAP X5R 10UF K 6V3 0603
TI USB BOM
ID
4
(GenIO44)
4
B
Dynamo DC-Charger (2mm)
D
Slave_PU
6
Over-Voltage Protection
4341803
1
External_VBUS
I2C0_SDA
Pick and place pads
R2004
(For carbon TP: 2 pcs)
PURX
CHIPCAP X5R 1U K 25V 0603
DP_RXD
ID
MUST place very near E2 pad
PCB: Max current 1A
C2914
100nF
6
PCB: Max current 1A
1
100nF
Place near DP_RXD traces
(For carbon TP: 2 pcs)
DM_TXD
VBUS connect from here to Betty
External VBUS
USBChargStatus
I2C0_SDA
Wake-up Logic
D-
D-
C
A
Slave_PU
4341805
C2010
2351061
Not AssembledC2012
2
0
GND
D
C
share footprint with C2016
C2016
N2001
2
Summit USB BOM
PCB: Max current 1A
C2916
5
R2008
1419107
100k
100n
2351075
C2020
C2002
2351053
470n
VBAT
F2000
GND
C2008
10n
2.0A
5119045
L2000
3649176
VIO
0
2351032
1uH
GND
1u0
C2015
2351009
4u7
2351050
C2016
TI_USB_BOM
C2010
2351061
10u
J2006 900X910|1.3_CARBON
2.0A
TI_USB_BOM
220n
2320143
C2003
F2001
5119045
1430014
R2001
1M
VBAT
GND
0
C2022
2320143
220n
DP
D5
DM
E1
CPGND
C_B
E2
E3
C_A
VCC
E4
E5
VBUS
GND
VBAT
SE0/VM
B4
B5
DAT/VP
C1
ADR/PSW
RESET_N
C2
C3
AGND
CR_INT
C4
C5
ID
D1
VCC(I/O)
SDA
D2
SCL
D3
D4
ISP1302UK
A1
SERVICE_N
VREG
A2
A3
SPKR_L
/MIC
A4
SPKR_R
A5
RCV
INT_N
B1
DGND
B2
OE_N/INT_N
B3
220R/100MHz
3203771
L2099
900X910|1.3_CARBONJ2004
N2002
4346975
VBAT
33R
100n
C2019
2351075
R2013
1419117
4u7
2351050
C2914
SMB_USB_BOM
GND
9900505
E2001
R2020
1430014
1M
10u
2351061
VIO
GND
J2005 900X910|1.3_CARBON
SMB_USB_BOM
C2012
4111187
MA26111009JN
4
GND
GND
GND
0
GND
V2001
2320546
C2001
NOT_ASSEMBLED
27p
1M
1430014
R2002
J2003 900X910|1.3_CARBON
900X910|1.3_CARBONJ2002
GND
2u2
2351104
C2025
GND
VIO
GND
VBUS
USB OTG and Charging Interface
Name
GND
INH
B2
GND
C1C2
VCC
0
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
6
4341716|ALT
N2006
STM1066
A1
VIN
OUT
A2
EN
B1
220k
1410024
R2021
GND
4129328
R2005
IP4385CX4LF
A1
A2
B1
B2
TI_USB_BOM
1u0
2351029
C2014
C2005
2351075
NOT_ASSEMBLED
GND
100n
2351075
GND
33R
1419117
R2012
1
2 3
4
100n
C2021
0R068
CURRENT
SENSE
1445348|1.5A
R2004
TI_USB_BOM
R2007
1419087
1k
1
100n
2351075
C2011
2u2
C2006
2316001
GND
GND
GND
GND
NOT_ASSEMBLED
2322019
C2013
27p
J2001 900X910|1.3_CARBON
VCC
C2
PKX
D1 D2
POX
GND
C2004
2316001
2u2
NOT_ASSEMBLED
SN0703023
N2005
4341919
VIN
A1
A2
OUT
B1
EN
B2
INH
C1
GND
1u0
2351029
C2916
SMB_USB_BOM
VIO
GND
NOT_ASSEMBLED
5469849
X2000
1
2
1u0
2351029
C2910
SMB_USB_BOM
GND
2351075
100n
GND
D2
E1E3
GND
C2018
R2
R3
EMIF02-USB01F2
R2011
R1
4129001
A1
A3
B2
C1
GND
C3
1419087
R2003
1k
100k
1
VIO
Z2000
3200015
R2010
1419107
100k
1419107
R2009
R2015
1410024
220k
1
900X910|1.3_CARBONJ2000
X2001
5407332
1
10
11
2
3
4
5
6
GND
7
8
9
E2000
9900505
1
Z2009
3200015
1n
C2023
2322231
GND
B1
VIN
B3
VOUTC1C2+
C2
C2-
C3
GND
GND
GND
4341629
N2000
FAN5665UCX
C1-
A1
GND
A2
ENA3C1+
R2000
ESDA18-1F2
4129259
A1
A2
B1
B2
GND
PGND
D2 D3
SGND
OTG
D4
E1
CSIN
E2
AUXPWR
VDDCAP
E3
CSOUT
E4
B1
MID
B2
MID
B3
SDA
B4
SW
C1
C2
SW
SW
C3
C4
STAT
D1
PGND
BQ24150
N2001
4341805
DCIN
A1
A2
DCIN
BOOT
A3
A4
SCL
MID
SLOWAD(6:0)
dangle dangle
CHARGER
dangle
dangle
USB_ACI(7:0)
PUSL(7:0)
USB_CTRL_CMT(2:0)
FM_ANT
XAUDIO(5:0)
I2C(1:0)
dangle
dangle
Page 4
1
42
A
Mbus_CLK
D
RXD2
C
4
A
5
32 5
C
6
6
B B
D
Traceability pad
3
BB5.0 have defined 7-pin test pad pattern
DM_TXD
DP_RXD
1
5.6V/15V/0.05J
1825127
R2068
NOT_ASSEMBLED
R2064
ESDA14V2-4BF3
4129311
A1A3
B2
GND
C1C3
GND
5409309
X2060
10R
1419077
R2062
R2063
1419077
10R
GND
GND
R2061
1419077
10R
VPP
800X488|LINE_CARBON
J2061
1
2
3
4
6
7
8
1
3
0
GND
2
R2060
1419077
10R
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
USB_ACI(7:0)
VBUS
Production test pattern
Name
Page 5
6
C
BTemp
BSI
A
Change from 1825133 (14V/50V)
A
B
3
2
1 2
NOTE !! R2070 IS NEEDED IF VILMA IS FAR FROM BATTERY CONNECTOR !!!
54
D
C
6
B
Battery inferface
BTEMP NTC
1
PLACE R2070 NEAR BATTERY CONNECTOR !!!
5
2320546
GND
4
Tabby
Test Pads for charger cal.
3
D
GND
27p
C2074
2320121
C2073
10p
10p
C2072
2320121
9900600
J2073
GND
GND
GND
R2070
1825127
5.6V/15V/0.05J
10p
GND
J2072 900X910|1.9_CARBON
GND
2320121
C2071
Battery Connector Interface
Name Appr
J2070
9900600
BGND
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
R2071
1820061
47k
GND
2
3
X2070
5469741
1
+
2 GND
3 BSI
-t
150u_6V3
2611822
C2070
SLOWAD(6:0)
9900600
J2071
VBAT
Page 6
AuxMic_Data
VDD
(not Used)
VIBRA+
A
Test Pads
2
Vibra placed on top board
1
HFSPN
6
5
VibraEn
6
32
B
C
EARN
NOTE:
To be placed close to IHF
EARP
5140034 (alt)
3
Earpiece
IHF
D
5
B
AuxMicData
B2100
NC
AudioClk
EarP
EarN
1
A
Audio_Clk
MIC2P
MIC2N
C
D
XEARL
4
Microphone Interface
4
XEARLC
DMIC_En
HFSPP
Vibra
To be placed close to Cebbo2S
IHF lines must be wide and low impedance
on top board
GND
6443309
X2101
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
900X910|1.0_CARBONJ2110
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
Audio Interface
Name
2351009
C2102
R2100
1419087
1k
3
1u0
900X910|1.9_CARBON
0
GND
900X910|1.9_CARBONJ2101
8
GND
2
2
3
0
J2102
GND
1
9
0
1
J2100 900X910|1.9_CARBON
900X910|1.9_CARBONJ2103
L2105
3649003
68nH
2322019
0
GND
1
27p0
C2104
100n
2351075
C2100
5140044
B2100
31100-3008062
1
GND
2
L/R
VDD
34
OUT
5
CLK
GND
6
GND
0
1
2
10
GND
27p0
2322019
C2103
-3.0_NOPB
N2100
4341715
LP3985ITLX
BYPASS
A3
GNDB2
VEN
A1 VINC3
VOUT
C1
1u0
2351009
C2101
J2111 900X910|1.0_CARBON
VBAT
L2103
1
68nH
3649003
220R/100MHz
3203771
L2104
GND
220R/100MHz
3203771
L2102
DIG_AUDIO(5:0)
H_BRIDGE(3:0)
AUDIO(6:0)
XAUDIO(5:0)
dangle
GEN_CTRL_CMT(20:0)
dangle
AUDIO_BTB(8:0)
IHF_CONN(2:1)
X2102
6443309
Page 7
9
A
#
D0
PWX
2
D5
2
Left
D5
D6
I2C Address b’1000 011x
6
B
D
HALL_INT
PURX
43
Input capacitor shares with C2006 (USB sheet)
5
7
!CS Sub
D/!C
!Reset
TE Sub
Key_Navigation_Down
#
7
0
3
A
HALL SENSOR
6
TE Main
Display
C
2
Top Light
6
B
!Reset
D6
8
9
4
5
3
2
D4
D
0
#
7
6
3
41 4
A
5
!WR
9
C2406
*
D7
Select
TE Sub
D2
1
3
1
EM Switch
D0
6
!CS Main
C
EXT_IOEINT
In that case connect D2 to GND.
Send Up
!CS Main
Key_EM_Switch
Key_Navigation_Select
Key_Navigation_Right
3
D4
2351009
1
Key_Navigation_Up
I2C0_SCL
Key_Send
Key_Navigation_Left
Key_Soft_Left
I2C0_SDA
A
*
1
Light
Key_Soft_Right
TE Main
0
NOTE: SleepClk is not needed in FW3 version.
GND
VBAT
1u0
D2
D3
6
1
D/!C
2
Soft Left
End
5
C
4
5
8
6
D7
5
B
D1
C
KEYBOARD (Single ended)
SleepClk
!WR
Soft Right
D3
8
!CS Sub
I2C0_SCL
*
D
4
Down
1
I2C0_SDA
!RD !RD
2 4
D
Right
32
D1
5
Alive Light
B
2
GND
2
6
S2407
800X155|CARBON
S2401
6
3
GND
7
14
J2407
S2402
800X155|CARBON800X155|CARBON
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
12
11
8
900X910|04S
GND
7
ApprName
UI Interface
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
0
1
3
1
11
2
2
KPX3
F2
IRQN
F3
F4
VCC
F5
PWM1
KPY11
F6
S2405
800X155|CARBON
D5
KPY9
D6
EXTIO0
E1
SCL
SDA
E2
KPY8
E3
PWM0
E4
E5
PWM2
E6
KPY10
KPX2
F1
RESETN
C1
C2
KPY7
C3
GND
GND
C4
KPY1
C5
C6
KPY0
XTAL2
D1
D2
XTAL1
D3
GND
GND
D4
A3
KPX6
VCC
A4
A5
KPX1
A6
KPX0
KPY6
B1
KPY4
B2
KPX5
B3
KPX7
B4
KPY3
B5
B6
KPY2
800X155|CARBON
4
TC35892XBG
4340748
N2402
KPY5
A1
A2
KPX4
2351025
C2402
GND
S2425
2
0
15
0u47
S2403
800X155|CARBON
GND
4
GNDGND
800X155|CARBON
GND
GND
5
GND GND
0
10
S2400
1430718
R2404
47R
R2403
1430718
S2420
GND
1
9
47R
Output3GND
0
S2421
800X155|CARBON800X155|CARBON
E5
Output9
4
6
4605953
N2400
HED54XXU11
1
VDD
2
C4
Output6
C5
Output5
D1
Input8
D2
Input7
D3
GND
D4
Output8
D5
Output7
Input10
E1
E2
Input9
E3
GND
E4
Output10
GND
A3
A4
Output2
A5
Output1
B1
Input4
B2
Input3
B4
Output4
B5
Output3
C1
Input6
C2
Input5
C3
GND
1
VIO
EMIF10-LCD02F3
Z2401
4129289
A1
Input2
A2
Input1
9
S2417
800X155|CARBON
GND
GND
D3
Output8
D4
Output7
D5
E1
Input10
Input9
E2
GND
E3
Output10
E4
Output9
E5
VBAT
Input4
B1
Input3
B2
Output4
B4
Output3
B5
Input6
C1
Input5
C2
GND
C3
Output6
C4
Output5
C5
Input8
D1
Input7
D2
4129289
Z2400
EMIF10-LCD02F3
Input2
A1
Input1
A2
A3
GND
Output2
A4
Output1
A5
GND
0
10
GND
S2411
1
2
GND
4860039
CL-435
V2401
D3
D4
GND
SDA
E1
E2
EN
INT
E3
TRIG
E4
0
5
800X155|CARBON
B3
CFLY1P
B4
R
C1
C2
ADDR_SEL0
GND
C3
VDD
C4
D1
SCL
D2
GPO
CLK_32K
N2401
4348448
B
A1
VOUT
A2
A3
CFLY2N
CFLY2P
A4
B1
G
B2
ADDR_SEL1
CFLY1N
GND
GND
7
GND
LP5521TMX_NOPB
1
9
10
GND
10
1
GND
6
1
0
12
3
GND
800X155|CARBON
0
GND
5
6
GND
27p
2320546
C2400
1
S2426
S2416
800X155|CARBON
4
S2422
800X155|CARBON
GND
11
VIO
VIO
8
GND
4
0
C2404
2351009
1u0
GND
3
800X155|CARBON
S2418
7
122
GND
GND
GND
1
100n
GND
5200064
S2409
1
C2401
2351075
15
GND
R2401
1419107
100k
R2400
1430014
1M
GND
5
7
9
VAUX
S2404
800X155|CARBON
8
8
7
GND
13
14
GND
GND
10
S2413
800X155|CARBON
GND
5
GND
8
L3502
3203755
600R/100MHz
13
3
800X155|CARBON
S2412
11
800X155|CARBON
S2424
GND
S2414
800X155|CARBON
0u47
S2406
800X155|CARBON
GND
C2403
2351025
Internal_key_bus(13:0)
dangle
dangle
dangle
UI_BTB(5:0)
4860039
V2400
CL-435
dangle
dangle
PwrOnX
I2C(1:0)
dangle
dangle
dangle dangle
dangle
dangle
dangle
dangle
dangle
dangle
MESSI_CMT(25:0)
DISPLAY_BTB(25:0)
dangle
dangle
dangle
dangle
GEN_CTRL_CMT(20:0)
dangle
KEYB_CMT(20:0)
PUSL(7:0)
dangle
Page 8
XSHUTDOWN_HIRES
LORES_CCPCLKN
FLASH_INT
CAM-TO-HOST_INT
CCPCLKP_HIRES
XSHUTDOWN_LORES
LORES_CCPDATAP
CCPdaP
54
I2C0_SDA
CLK_HIRES
SDA_LORES
LORES_CCPDATAP
VDig
LORES_CCPCLKP
SPI_CS
LORES_CCPDATAN
CLK_LORES
SCL_HIRES
SCL
SPI_DAO
FLASH_INT
GND
HIRES_CCPDATAN
SDA_LORES
CCPClkP
CCPClkN
CAM_VCTRL_1V8
HOST-TO-CAM_INT (WAKE UP)
SDA
LORES_CCPCLKP
FLASH_INT
XSHUTDOWN_HIRES
FLASH_LED_Anode
A
C
FLASH_EN
FLASH_INT
MAGNET_STROBE (Coil)
MAGNET_ENABLE (Coil)
Ok but not required
A
JULIE
LORES_CCPDATAN
B
Place Pin 2 near board edge
6
FLASH_INT
XSHUTDOWN_LORES
MAGNET_STROBE (Coil)
VDig
D
1
HIRES_CCPCLKP
MAGNET_STROBE (Coil)
FLASH_SYNC
CCPDATAN_HIRES
SDA_HIRES
GND
D
FLASH_INT
GND
2
SCL_LORES
LORES_CCPCLKP
4
JULIE-TO-HOST INT
FLASH_EN
SCL_HIRES
SCL
FLASH_SYNC
SDA
Removed coils in the supply lines TXVDDA, TXVDDA1, ...(as in Hammer)
SDA_LORES
CCPdaN
CCPDATAN_HIRES
SDA_HIRES
VCAP/NC
CCPCLKN_HIRES
XSHUTDOWN_HIRES
SCL_HIRES
CLK_LORES
If possible then add solder jumper for current measurements
SDA_HIRES
FLASH_EN
CLK_LORES
XSHUTDOWN_LORES
J3315 & J3316: Pads for ACF Bonding
J3399 & J3396: Pads for Repair Flex
J3395 & J3394: Pads for measurement
Connect to common GND only under C3300
LORES_CCPDATAP
LORES_CCPDATAN
SCL_LORES
VCAP
Down sized components
FLASH_SYNC
2
XSHUTDOWN_HIRES
3
6
CLK_LORES
N
XSHUTDOWN_HIRES
CAM_RESET
C
GND
CCPCLKN_HIRES
CCPCLKP_HIRES CCPCLKP_HIRES
FLASH_EN
SCL_LORES
Cut-out GND for switch power supplier
SPI_CLK
S
SDA_HIRES
5
5900015 (Purple)
JTAG
I2C0_SCL
CAMCLK
CCPDATAP_HIRES
CCPCLKN_HIRES
SPI_DAIN
CLK_HIRES
HIRES_CCPCLKN
FLASH_SYNC
CCPDATAP_HIRES
GND
XSHUTDOWN_LORES
VAna
LORES_CCPCLKN
1
SCL_HIRES
4342492: DM500
CLK_HIRES
4341751: DM5011
VAna
place near RAP
FLASH_LED_Cathode
CLK_HIRES
GND
CCPDATAN_HIRES
FLASH_SYNC
CCPDATAP_HIRES
B
LORES_CCPCLKN
CLK_HIRES
MA21D34001JN
4111149
V3300
HIRES_CCPDATAP
5900008 (Black)
3
Added R3411 to Clk Lores
0
0
GND
2351075
100n
11
220R/100MHz
L3307
3203771
C1
EN
FB
C3
C3309
R3307
N3301
4348537
LM3677TLX-1.82_NOPB
U//U
A1
Vin
GND
A3
SW
B2
GND
1419081
100R
1
C3328
2322019
27p0
900X910|0_6
J3415
1
GND
C3303
2351075
100n
C3314
3
10p
2320121
C3330
GND
100n
2351075
600R/100MHz
3203755
L3304
VCAM_1V3
27p0
2322019
C3322
2351009
1u0
C3320
3649178
2u2H
4
3
0
GND
1u0
C3321
L3306
2351075
100n
2351009
J3395 900X910|0.7
C2333
C3304
GND
1
1
9
3
2316001
2u2
GND
VBAT
GND
4
GND
1
3
2
GND
3
GND
100n
C3302
C3306
2u2
2351104
2351075
1u0
VCAM_1V3
VCAM_1V8
2351009
C3316
HPLED
9
L3301
3203855
120R/100MHz
16
STR
2
SETF
3
SCL/CTRL1
SDA/CTRL0
4
5
SETI
ILED
6
7
OUT
8
GNDSETT
1
10
INTF
_INT
11
PGND
12
LX
13
14
VDD
15
EN
GND
VCAM_1V8
12
N3304
GND17=
ADP1653ACPZ-R7
4348519
C3300
2351061
10u
C3339
VCAM_1V8
-2.85-NOPB
4341561
N3303
LP3987ITLX
A1
VEN
A3
MODE
B2 GND
C1
VOUT
C3 VIN
100n
2351017
GND
900X910|0_6J3413
900X910|0_6J3307
4210073
G
D D
S
10
Z3304
3203845
SI8413DB-T1-E1
V3303
C3340
2351017
100n
2
5
0
2
GND
L3303
3649176
1uH
GND
2351015
27p0
2322019
C3327
0
2
6
5
C3318
4u7
900X910|0_6J3305
1
VCAM_1V8
VCAM_1V3
4210073
V3302
SI8413DB-T1-E1
G
D D
S
VCAM_1V3
1
IN
2 GND
3 OUT
3
GND
VCAM_1V8
V3305
4210497
4k7
R1
R2 47k
3
0
1
VCAM_1V8
0
900X910|0.7J3394
MA21D34001JN
4111149
V3301
4
10k
R3396
1430040
1430006
R3397
3k3
1
0
0
0
1
0
NOT_ASSEMBLED
C3331
2351032
10n
1410013
2k
100n
R3305
C3311
2
C3310
2351075
J3396
VBAT
0
2351075
100n
2
900X910|0.8
R3302
2k
1410013
GND
1
1
Z3301
3203845
3203845
Z3302
GND
10n
2351032
C3329
1
GND
GND
100n
2351075
C3312
10u
C3301
2
GND
2
900X910|1.8J3315
2351061
3
SCL/CTRL1
4
SDA/CTRL0
SETI
5
6
ILED
7
OUT
GND
8
HPLED
9
INTF
10
11
_INT
12
PGND
13
LX
VDD
14
EN
15
16
STR
2
SETF
VCAM_1V8
GND
N3305
17= GND
4348519
ADP1653ACPZ-R7
SETT
1
GND
0
33R
L3300
3203755
600R/100MHz
0
1
R3310
1419117
C3326
2320143
220n
0
R1
4k7
4210497
V3304
IN
1
GND2
OUT3
GND
GND
47kR2
GND
1
1
VBAT
2351061
C3319
10u
0
C3315
2316001
2u2
1
2
3
4
GND
GND
VBAT
470k
E3300
9901543
J3316
8
VCAM_1V8
VBAT
R3393
1430084
L3302
GND
1
900X910|1.8
P7
GIO17
P8
GIO16
P9
600R/100MHz
3203755
GIO11
N9
GIO29
P11
GIO28/INT1
P12
COIN7
P3
VD0
P4
COIN3
P5
PCLK0
P6
GIO4/INT2
N11
N12
GIO27
N2
COIN8
COIN6
N3
COIN5
N4
COIN2
N5
GIO23
N6
GIO7/INT3
N7
GIO8
N8
M14
COIN9
M2
CLK_TX_THRU0
M3
HD0
M4
COIN1
M5
GIO22
M7
M8
GIO9
GIO10
M9
GIO30
L3
L4
COIN4
L5
COIN0
M1
SYSCLK
GIO12
M10
M11
SCL0
SDA0
M12
NC
M13
NC
J4
HSSIX_SN
K1
NC
K13
DNC
K14
HSSIX_SP
K2
K3
VSSA
NC
L13
L14
DNC
CLK_TX_THRU1
TXVSSA1
TXVDDA1
G5
DNC
H13
H14
DNC
H4
TXVSSA
J1
HSSIX_DN
J2
HSSIX_DP
TXVDDA
J3
VDDA
RXVSSA
F5
RXVDDA
G1
HSSIR_DN1
G10
VDDDLL
DNC
G13
G14
DNC
G2
HSSIR_DP1
HSSIX_IREF
G3
G4
HSSIR_SP0
E2
F1
HSSIR_SN1
F10
VSSDLL
DNC
F13
DNC
F14
HSSIR_SP1
F2
F3
HSSIR_IREF
F4
C8
DNC
DNC
C9
HSSIR_DN0
D1
D14
DNC
HSSIR_DP0
D2
TDO
D3
D4
TDI
HSSIR_SN0
E1
DNC
C12
C13
DNC
C14
DNC
TMS
C2
WAKEUPX/INT0
C4
C5
SDI0
GIO2
C6
DNC
C7
B2
TCK
B3
BTSEL
B4
B5
SDO0
RSTNX
B6
DNC
B8
DNC
B9
C10
DNC
DNC
C11
GIO0
A6
A8
DNC
A9
DNC
B10
DNC
DNC
B12
DNC
B13
DNC
B14
TRSTN
A1,A2,D5,H5=
L9,L10,L11,L12,P10,P13=
GNDB7,B11,E9,E10,E11,E13,D13,F11,G11,H10,H11,J11,J13,N14=
VCAM_1V8L6,L7,M6,P2=
DNC
A10
A12
DNC
DNC
A13
DNC
A14
TEST
A3
A4
SCLK0
SDEN0
A5
N3300
GNDB1,C1,L1,N1,P1,L2,E4,K4,E5,J5,K5,E6,K6,E7,K7,K8,L8,K9,N10,P14,E3,H3,D6,D7=
VCAM_1V3F6,F7,F8,F9,G6,G7,G8,G9,H6,H7,H8,H9,J6,J7,J8,J9,H1,H2=
VCAM_1V8
VCAM_1V8
VCAM_1V8
VCAM_1V8
4342492
OMAP-DM500
D8,D9,E8,J10=
A7,A11,D10,D11,D12,E12,E14,F12,G12,H12,J12,J14,K10,K11,K12,N13=
1419081
R3304
100R
GND
100R
R3306
1419081
R3312
1410023
47k
-1.3
4346967
LP5952TLX
A1
VIN
A3
VOUT
B2 GND
VBATT
C1
C3
EN
GND
1419083
4k7
1
N3302
100n
R3300
C3307
2351075
4k7
R3309
1419083
2
GND
C3313
2351104
2u2
R3301
4k7
1419083
1430040
R3314
10k
0
7
6
900X910|0_6J3414
100n
2351075
C3308
R3311
33R
1419117
15R
1430056
R3394
J3399 900X910|0.8
VCAM_2V8
GND
GND
3203771
220R/100MHz
L3308
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
Camera Interface
Name
GND
Appr
1
3
R3395
1430056
15R
1419081
100R
R3303
3203845
Z3303
1419083
VCAM_1V8
R3398
2
4k7
R3308
5
1
GND
1430084
470k
3
3
0
VCAM_2V8
GND
6
47k
1410023
R3315
470k
R3392
1430084
7
18
SH PLATE
19
2
20
LOCK PIN
21
3
4
5
6
7
8
9
X3399
5400094
1
10
11
12
13
14
15
16
GND
17
dangle
GEN_CTRL_CMT(20:0)
dangle
dangle
dangle
VBAT
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
I2C(1:0)
CAMERA_BTB(8:0)
LORESCAM_CTRL(1:0)LORESCAM_CTRL(1:0)
MAIN_CAMERA_CONN(16:1)
HIRESCAM_CTRL(3:0)
HIRESCAM_I2C(1:0) HIRESCAM_I2C(1:0)
HIRESCAM_CCP(3:0)HIRESCAM_CCP(3:0)
HIRESCAM_CCP(3:0)
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
CCP_CMT(3:0)
LORESCAM_I2C(1:0)
LORESCAM_I2C(1:0)
LORESCAM_I2C(1:0)
LORESCAM_CCP(3:0)
LORESCAM_CCP(3:0)
LORESCAM_CCP(3:0)
SPI_CMT(3:0)
CAM_CTRL_CMT(6:0)
CAM_CTRL_CMT(6:0)
FLASH_CONN(2:1)
dangle
dangle
dangle
Page 9
C
ANT_FM
BTRTS
BTWake
Notes
A
I2SSD2
I2C0_SDA
BT_RESETX
CURRENT MEASUREMENTS
NC
BTHostWake
NC
ANT_BT
BTRstX
UART_RTS
NC
FM_INTX
BTDaIn
D
1
BT_WAKEUP
(5) 3k3 Pull-up Resistors are required on I2C_SCL, I2C_SDA.
4
BTH_CLK_REQ
1
I2C0_SCL
I2S/PCM_OUT
4
FM_AUDIO_PR
5
C
(7) Pins marked NC should be Not Connected.
SLEEPCLK
A
UART_TX
2
NC
I2S/PCM_SYNC
6
3 5 6
BTDaOut
BTCTS
UART_CTS
I2SWS
I2SSD1I2S/PCM_IN
BLUETOOTH & FM RADIO MODULE INCLUDING RF FILTER
D
B
RFCLK
NC
I2S/PCM_CLK
See Note (5)
NC
B
UART_RX
3
2
FM_AUDIO_PL
UART_WAKE
SLEEPCLK
I2SClk
6
BT_UART_RX
BT_UART_TX
7
8
VIO(1.8V)
9
VAFR
1
4
31
BT_WAKEUP
INTX
32
VReg.1.8
33
I2S_WS
34
I2S_SCK
35
I2S_SDO
36
4
BT_UART_RTS
5
BT_UART_CTS
GND
24
VBAT
25
BT_PCM_OUT/I2S_DO
26
27
TX_CONFX
28
RF_ACTIVE
STATUS
29
3
BT_PCM_SYNC/I2S_WS
UART_WAKEUP
30
SCL
17
SDA
18
19
GND
2
BT_PCM_CLK/I2S_CLK
20
FMANTENNA
GND
21
22
BT_RESETX
23
SLEEPCLK
1
BT_PCM
10
VAFL
11
GND
REF_CLK
12
CLK_REQ
13
14
GND
15
BT_ANT
GND
16
4390024
BTHFMRDS2.1M_ES5
D6000
GND
VIO
L6000
3648993
47nH
900X910|0_6J6005
900X910|0_6J6003
0
2
1
J6004 900X910|0_6
1
J6006 900X910|0_6
2p7
2320151
C6001
J6000 900X910|0_6
0R
800X716|0402_R
R6000
3
2
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
900X910|0_6J6007
Copyright (C) Nokia Corporation. All rights reserved.
ApprName
BTHFMRDS
C6000
2320151
6443403
X6000
3
J6002
900X910|0_6
2p7
5
1
GND
GND
6
0
900X910|0_6J6001
PCM(3:0)
PUSL(7:0)
LPRFCLK_I
FM_ANT
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
LPRF_CMT(6:0)
GEN_CTRL_CMT(20:0)
AUDIO(6:0)
I2C(1:0)
Page 10
4
GND
GND
SDA_LORES
!Reset
D4
!WR
1
6
VCAM_2V8
!CS Sub
D3
GND
GND
5
VCAM_1V8
Top Light
ACC_INT
432
3
TE Sub
!Reset
SDA_LORES
CLK_LORES
Place under RAP
!RD
!CS Main
TE Main
!WR
GND
ACC_INT
CLK_LORES
D5
Top Light
25
D1
Alive Light
D0
VIO
XSHUTDOWN_LORES
EarN
EarP
LORES_CCPCLKN
LORES_CCPCLKP
SCL_LORES
EarN
EarP
I2C0_SCL
!CS Sub
VBAT
D6
50
GND
GND
LORES_CCPDATAN
LORES_CCPDATAPLORES_CCPDATAP
LORES_CCPDATAN
GND
GND
VIBRA+
26
NOTE:
GND
I2C0_SCL
D2
Earpiece lines must be wide and low impedance
AA
6
LORES_CCPCLKN
D
D4
D/!C
VAUX
B
1
D7
D6
D5
B
CC
D
LORES_CCPCLKP
SCL_LORES
5
1
N.C. on B2
VIO
XSHUTDOWN_LORES
D3
D2
D7
2
!RD
!CS Main
TE Main
D/!C
Alive Light
D1
D0
GND
48
10
9
8
7
GND
VBAT
ViBRA+
I2C0_SDA I2C0_SDA
TE Sub
VBAT
VAUX
VIO
13
12
11
2
1
7
11
46
47900X910|0_6J3300
0.75A
5119050
F3300
16
24
4
2
6
32
33
43
GND
VIO
4
13
3
26
VCAM_1V8
1
5
9
22
14
GND
17
7
0
0
C3359
2351017
100n
35
5
4
3
E3500
9901956
1
Name
Main board to top flex Interface
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
19
10
6
36
31
30
6
5
14
2
1
0
6
3
38
39
15
45
41
0
20
0
2
1
18
49
29
25
44
45
46
47
48
49
5
50
GND
51
52
6
7
8
9
3
30
31
32
33
34
35
36
37
38
39
4
40
41
42
43
15
16
17
18
19
2
20
21
22
23
24
25
26
27
28
29
VCAM_2V8
X3300
5469064
1
10
11
12
13
14
CAMERA_BTB(8:0)
GEN_CTRL_CMT(20:0)
AUDIO_BTB(8:0)
I2C(1:0)
TOP_FLEX_CONN(52:1)
1
15
GND
dangleUI_BTB(5:0)
DISPLAY_BTB(25:0)
Page 11
GND
I/O
2
C
B
A
D
Route SIM_CLK and SIM_IO signals as striplines (EMC)
1
(Not Used)
SIMClk1
Use gnd to protect other signals (ESD)
C
B
A
SIMRst1
543
NC
CLK
SIMDa1
5
6
C6
C7
7
SIMCARDDETECT
SIM card Reader is rotated
Use together with Vilma
Check routing near Pin 6 to avoid ESD problem
6
1 2 3 4 5 6
D
RST
VSIM
X2701
C707_10M006_194_2
5469046
C1
1
C2
2
C3
3
C5
GND
C2703
2320546
27p
27p
27p
2320546
C2704
C2705
2320546
L2701
3646097
39nH
39nH
3646097
L2702
Name
SIM Interface
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
27p
C2701
2320546
39nH
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
dd-mmm-yy
6
2
0
1
3646097
L2700
C2700
GNDGND GNDGND
2351017
100n
SIMIF(6:0)
dangle
dangle
VSIM1
GND
Page 12
CS/DAT3
DAT0
A
B
D
CLK and DATA lines must be placed in strip-line layer
CMD
DAT1
GND
GND
CS/DAT3
GND at the inner layer
1 5
GND
6
Cold swap uSD reader
R4805 is to discharge VSD.
Alternative is 4340380
MMCLSShutDn
MMCFb_clk
after previous usage.
D
2
C
MMC_HotSwap
MMC WP(Not Used)
DAT1
MMCDa1
MMCDa2
MMCDaDir1
MMCDa3
DAT2
and routed with GND on all sides (transmission line)
to GND on top layer
Connect to massive
4
GND
6
MMCDet(Not Used)
CMD
A
MMCDaDir
MMCCmd
MMCCmdDir
Only connect to VSS pin
2
CLK
GND
CMD
DAT0
DAT1
DAT2
CS/DAT3
GND
DAT2
MMCDa0
3
ALL LINES MUST BE SEPARATED AND SURROUNDED BY GND
CLK
CLK
5
Don’t connect direct
GND
PIN 3 GND MUST NOT BE CONNECTED TO TOP LAYER GND
MMCClk
(Not Used)
4
C
GND
VDD
1
If SD regulator far away from connector
bigger capacitor (C3205) may be needed.
Cards may not start properly,
3
DAT0
GND
GND
B
if they are not discharged
100k
1419107
R4805
GND
GND
VBAT
GND
GND
GND GND
2322019
C4807
C4804
2322019
27p
GND
27p
GND
C4809
2322019
27p
1u0
2351009
C4800
11
0
7
10
VSD
CMD_ACDCMD_B
D0_B
D1_A
fCLK_A
DIR_1-3
WP
D1_B
D2_B
D3_A
VDDA
VDDB
D3_B
CLK_A
EN
GND
GND
CLK_B
D0_A
GND
N4802
LP3929TMEX-AACQ_NOPB
4346715
D2_A
CMD_DIR
DIR_0
VBAT
L4800
3646065
12nH
C4811
2320544
22p
2320544
22p
2u2
2351104
C4808
VSD
C4810
GND
6
GND
2u2
2351104
C4806
Name
SD-Card Interface
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
12
9
8
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
4
2
1
13
DAT0
7
DAT1
8
GND
9
5
VIO
3
DAT2
1
10
11
12
13
14
15
16
CD/DAT3
2
CMD
3
VDD
4
CLK
5
VSS
6
dangle
dangle
MMC_CMT(15:0)
dangle
dangle
dangle
5469172
X4800
Page 13
EMU1
XTI_TX1
XTI_RX
5 6
JTDI
5
XTI_TX2
4
B
A
2
1
C
D
XTI_CLK
C
A
2
1
EMU0
JTDO
JTAG Interface
J3103 900X910
ETM Interface
3
3
XTI_TX3
JTMS
JTRst
6
JTClk
B
JTClkRet
D
4
XTI_TX0
J3115 900X910
4
0
5
3
1
3
900X910J3118
ApprName
Test Interface
J3113 900X910
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
900X910J3120
4
J3100 900X910
900X910J3112
VIO
J3119 900X910
J3117 900X910
2
VBAT
1
14
2
900X910J3111
900X910J3116
900X910J3110
J3104 900X910
15
900X910J3114
5
GND
900X910J3101
900X910J3105
0
C3100
2322019
27p0
ETM(16:0)
JTAG(6:0)
J3102 900X910
GND
Page 14
A
TxQN
RxIP
(empty)
C
D
RxIN
RxQP
RxQN
Iref1
VrefP
AFC
TxC1
LPRFCLK
RFCLKN
RFCLKP
VBAT
VRCP1
VR1
VREF
VCP1
1 3 4
RFBusClk
RFBusDa
RFBusEn1X
TXresetX
TXPWRDET
RFTEMP
AUXDAC1
AFCOUT
7500-7599
7800-7899
(Not Connected)
APE
TxIP
TxIN
TxQP
43
C
6
5
B
D
5
A
1
2
B
62
MMC_CMT(15:0)
PCM(3:0)
PUSL(7:0)
PWRONX
RFCLK(1:0)
RFCONV(11:0)
RFCTRL(8:0)
RFPWR(4:0)
SIM(6:0)
SLOWAD(6:0)
SPI_CMT(3:0)
TXCCONV(1:0)
USB_ACI(7:0)
USB_CTRL_CMT(2:0)
XAUDIO(5:0)
AUDIOCTRL(5:0)
CAM_CTRL_CMT(6:0)
CCP_CMT(3:0)
CHARGER
DIG_AUDIO(5:0)
ETM(16:0)
FCI_CMT(3:0)
GEN_CTRL_CMT(20:0)
H_BRIDGE(3:0)
I2C(1:0)
INTUSB(8:0)
JTAG(6:0)
KEYB_CMT(20:0)
LPRFCLK
LPRFCLK_I
LPRF_CMT(6:0)
MESSI_CMT(25:0)
Name
BB-RF Engine Top Sheet
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
CMT_ENGINE
schematic
AUDIO(6:0)
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
9
TXIN
TXIP
TXQN
TXQP
TXRESETX
VBAT
VCP1
VCP2
VREFCM
VREFRF01
VXO
WTXDET
schematic
RF
AFC
DAC_REF1
RFBUSCLK
RFBUSDAT
RFBUSENA
RFCLKEXT
RFCLKEXT_GPS
RFCLKN
RFCLKP
RFTEMP
RXIN
RXIP
RXQN
RXQP
TXC
1
8
0
3
4
5
1
0
1
2
6
J7501
900X910|0_6
900X910|0_6
J7500
0
0
8
7
GND
A2000
9591828
MOUNTED SHIELDING
040-041927
3
1
2
1
1
0
0
GEN_CTRL_CMT(20:0)
MESSI_CMT(25:0)
SLOWAD(6:0)
SLOWAD(6:0)
7
6
USB_ACI(7:0)
SIM(6:0)
PwrOnX
H_BRIDGE(3:0)
CCP_CMT(3:0)
AUDIO(6:0)
CHARGER
KEYB_CMT(20:0)
ETM(16:0)
JTAG(6:0) MMC_CMT(15:0)
LPRF_CMT(6:0)
dangle
CAM_CTRL_CMT(6:0)
dangle
SPI_CMT(3:0)
LPRFCLK
LPRFCLK
dangle
dangle
I2C(1:0)
USB_CTRL_CMT(2:0)DIG_AUDIO(5:0)
RFPWR(4:0)
RFCTRL(8:0)
TXCCONV(1:0)
RFCONV(11:0)
RFCLK(1:0)
PCM(3:0)
PUSL(7:0)
dangle
XAUDIO(5:0)
Page 15
D
5 6
With WG3.2 BB VCP1 and VCP2 pins are connected together
C
B
A
D
L7503, L7506, L7550, L7591: 3203769 -> 3203855
(Not Used)
A
2
R7543: 1430778 (5%) -> 1430911 (1%)
VREFRF01
VXO
WTXDET
C7521: 2351009 -> 2320540
Z7503: 4000084 -> 4000118C7543: 2320505 -> 2351050
3 4 5
1 2 3 4
C
B
Place closed to ant.
7800-7899
EXT_COMP
7500-7599
R50-22 with no shield
1 6
RFTEMP
RXIN
RXIP
RXQN
RXQP
TXC
TXIN
TXIP
TXQN
TXQP
TXRESETX
VBAT
VBAT_PA
VBAT_WPA
VCP1
VREFCM
800X211|4
schematic
smashed
RF
AFC
ANT
DAC_REF1
RFBUSCLK
RFBUSDAT
RFBUSENA
RFC10
RFC11
RFC6
RFCLKEXT
RFCLKN
RFCLKP
E7623
E7609
800X211|4
E7608
800X211|4
800X211|1
E7607
E7621
800X211|4
800X211
E7616
E7619
800X211|1
GND
Ritsa RF schematics
Name
dd-mmm-yy
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
5429037
X7800
12
3
4
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
800X211|2
X7801
6442573
800X211|1
E7602
800X211|4
E7600
X7802
6442573
GND
E7627
800X211|1
E7612
E7615
800X211|1
E7626
800X211|1
GND
800X211|4
E7610
800X211|4
800X211|2
E7605
E7611
E7603
800X211|4
E7606
800X211|1
800X211|1
E7601
800X211|2
E7624
E7628
800X211|2
800X211|1
E7629
E7620
800X211|4
800X211|2
800X211|4
E7622
E7625
800X211|2
12nH
E7604
800X211|2
E7613
dangle
dangle
800X211|4
E7614
3646423
L7800
RFCLKEXT_GPS
WTXDET
VCP1
VCP2
RFCLKP
RFCLKN
RFCLKEXT
TXC
VREFRF01
VXO
AFC
TXQN
TXQP
TXIP
TXIN
DAC_REF1
RFBUSCLK
RXQN
RFBUSDAT
RXQP
RFTEMP
RFBUSENA
VREFCM
TXRESETX
RXIP
RXIN
VBAT
Page 16
3 4 5 6 7 8
F
E
D
C
B
L7503, L7506, L7550, L7591: 3203769 -> 3203855
A
F
E
D
C
B
A
1% TOLERANCE
R50_22
1 2 3 4
R7543: 1430778 (5%) -> 1430911 (1%)
C7543: 2320505 -> 2351050
5 6 7 8
1 2
E7568 800X211|2
C7521: 2351009 -> 2320540
Z7503: 4000084 -> 4000118
GND
C7524
2320560
100p
100n
GND
GND
E7556 800X211|4
C7518
2351017
E7572 800X211|1
In
GND
Out
OutIn
C7548
2320766
8n2
GND
2140MHz
4511819
Z7580
B39212B9424M510
GNDCP_TX
M2
VCP
TXVCO_SUB
M3
M4
RXOUT_NI
M5
SCLK
XRESET
M6
VVCO_CAP
M7
M8
LO_IN
M9
REFP
TXLOOP_SUB
VBAT_TX
L12
L2
VREF_CM
L3
RFC11
RXOUT_PQ
L4
L5
RXOUT_NQ
SDATA
L6
L7
VDIG
VCO_CTRL
L8
OSCIN
L9
REFG
M10M11
GNDCP
K2
GNDVCO
K3
K4
RXOUT_PI
K5
XENA
GNDDIG
K6
K7
GNDDIG_TX
K8
GNDPRE_TX
K9
REFN
L1
RFC10
CBUF_CAP
L10
L11
C1IN
J1
GNDBB_RX2
J10
GNDBB_TX
TXQ_0
J11
TXQ_180
J12
J2
GNDBB_RX
J3
GNDPRE_RX
K1
GNDPRE_RX2
DAC_REF1
K10
K11
RFC5
K12
VDAC
G10
DAC2O2
G11
DAC2O3
P_OUTN
G12
C2IP
G2
C1IP
G3
RBEXT_RX
H1
H10
DAC2O1
TXI_180
H11
H12
TXI_0
H2
VBAT_RX
H3
DAC1O2
E11
E12
G_OUTN
E2
VBEXT
C1QP
E3
F1
C2QP
F10
GNDRF_TX
F11
TX_SUB
P_OUTP
F12
C2QN
F2
C1QN
F3
C2IN
G1
RFC6
C8
RFC7
MUX_IN
C9
INP_MIX_H
D1
D10
W_OUTP_L
D11
W_OUTN_L
D12
G_OUTP
D2
RFC4
GNDMIX
D3
INN_MIX_H
E1
E10
DAC1O1
RFC8
RFC9
B9
OUTN_FDD
C1
ENV_DET
C10
GNDVGA
C11
C12
W_OUTN_H
C2
INN_MIX_L
GNDVCO_RX
C3
C4
RFC1
C5
GNDLNA
C6
GNDLNA2
C7
OUTP_FDD
B1
TXC
B10
B11
DET
W_OUTP_H
B12
B2
INP_MIX_L
MUX_OUT
B3
B4
RFC2
B5
RFC3
B6
OUTN_850
OUTP_850
B7
B8
INP_850
A10
INN_850
A11
INP_2150
A2
INN_2150
A3
INP_1900
A4
A5
INN_1900
A6
INP_1800
A7
INN_1800
A8
INP_900
INN_900
A9
GNDD4,D5,D6,D7,D8,D9,E4,E5,E6,E7,E8,E9,F4,F5,F6,F7,F8,F9,G4,G5,G6,G7,G8,G9,H4,H5,H6,H7,H8,H9,J4,J5,J6,J7,J8,J9=
4380206
N7505
AHNEUS204A
800X211|3E7530
10k
1430911
R7502
18k
GND
not_assembled
R7522
1430786
800X211|4E7546
not_assembled
C7560
2320635
0p5
GND
RFC10
In2
In1
In1
220R/100MHz
3203771
L7502
Out1
GND
Out2
In2
A2
A3
PGND VDD
B1
SGND
B3 C1
EN
NC
C2C3
FB
4511826
Z7582
824-849/1920-1980MHZ
GND
DAC203
LM3206TLX_NOPB
N7590
4348579
U//U
A1
PVINSW
C7553
2320584
1n0
1
VCON
G 2
OUT
3
4VCC
GND
NOT_ASSEMBLED
1k0
1430754
R7524
G7501
38.4MHz
4520008
800X211|2E7574
GND
E7564 800X211|1
1430754
R7523
L7503
3203855
120R/100MHz
1k0
10u
2351061
C7590
GND
L7591
3203855
120R/100MHz
IN
GND
OUT
OUT
GND
Z7504
4511755
942.5MHz
L7510
E7560 800X211|1
GND
800X211|2E51
RFC6
28R/100MHz
3203775
R7529
3646091
6n8H
GND
3
VPD
4
VDET
5
VC_3
6
VC_2
7
VC_1
ICONT_H
9
not_assembled
18
Rx_2
19
Rx_1
2
VGAIN
21
ANT
23
VCC_1
IDENT
25
27
Tx_1
ICONT_L
28
4355040
GND1,8,11,12,15,20,22,24,26,29,30=
N7520
SKY77514-20
Tx_2
10
13
GND/Rx_5
VCC_2
1416
Rx_4
Rx_3
17
15p
2320540
C7521
GND
DAC201
GND
10R
GND
800X211|2
800X211|4E7524
R7501
1430700
C3
FB
GND
GND
GND
E7528
4346537
U//U
A1
PVIN SW
A2
A3
PGNDVDD
B1
SGND
B3C1
EN
VCON
C2
120R/100MHz
3203855
L7506
GND
GND
LM3202TLX_NOPB
N7541
800X211|2E7562
10u
GND
C7591
2351061
4p7
2320602
C7525
C7545
2320536
10p
3203771
220R/100MHz
E52 800X211|2
RFC11
GND
GND
GND
L7592
6p8
GND
DAC101
GND
R7560
2320532
3646065
12nH
L7500
RFC10
RFTEMP
TXC
DAC202
GND
RX TX
ANT
800X211|1E7558
FILTER
DUPLEX
4512076
Z7541
C7519
2351104
2u2
2351050
C7543
4u7
RFC6
2321007
22n
E7540 800X211|1
GND
C7544
1k0
1430754
R7527
R7503
1430770
100R
1430726
R7525
4k7
GND
GND
E7506 800X211|1
E7526 800X211|1
GND
R7526
1430754
1k0
GND
800X211|1
DAC202
RFC11
C7561
3646069
33nH
GND
TXC
E7010
not_assembled
470R
R7530
1430744
15p
C7523
2320540
R7544
3646179
47nH
1
2
3
4
5
GND
GND
DAC201
GND
4580070|RITSA5_BOM1
T7502
2320584
1n0
GND
GND
800X211|2E7566
C7520
E7544 800X211|4
800X211|1E7570
dd-mmm-yy
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
r50_engine
Name
800X211|3E50
GND
not_assembled
12nH
3646065
L7580
E53
800X211
GND
GND
1n2H
3646103
L7587
3646103
1n2H
TX
ANT
RX
L7586
GND
DUPLEX
4512325
Z7540
FILTER
RX
GND
DAC203
RFTEMP
GND
10u
2351061
C7500
GND GND
GND
33p
2320548
C7549
1n0
NOT_ASSEMBLED
800X211|4E7550
GND
C7550
2320584
L7501
3646065
12nH
120R/100MHz
Tx_Out
Vc
GND
L7550
3203855
850/900MHz
Z7503
4000118
Tx_In
GND
Tx_In
C7513
2320760
4n7
10nH
3646009
GND
C7580
2351017
L7588
GND
100n
C7592
2320564
150p
800X211|4E7542
GND
GND
10n
2320778
C7507
3p3
2320524
C7508
GND
OUT
NOT_ASSEMBLED
GND
GND
Z7521
4551080
2400-2480MHz
IN
GND
GND
L7590
3649181
3u3H
2351017
C7581
E7548 800X211|4
E7552 800X211|4
800X211|4E7554
100n
1k2
1430913
R7541 C7547
800X211|2E7814
GND
10u
2351061
1430911
10k
1n0
GND
R7543
DAC101
GND
GND
C7540
2320584
GND
GND
GND
R7528
2320520
2p2
100n
2351017
C7583 C7582
2351017
100n
GND
800X211|4E7534
E7536 800X211|2
L7540
3649045
3u3H
LDM182G1410LB002
T7580
Unbal
1
GND
2
Bal
3
Bal
4
5
NC
6
R7509
GND
4580022
BAL_OUT
GND
22k
1430788
UNBAL_IN
GND
UNBAL_IN BAL_OUT
BAL_OUT
BAL_OUT
28 3
NC/GND
Vbat
5
6
VID
Icont_l
7
9
In_1
1800/1900MHz
4511597
Z7501
16
Icont_h
18
Vbat
NC/GND
2
20
Vreg
Vdet
21
23
Out_2
VCC
25
VCC
26
Out_1
GND
GND1,4,8,10,13,15,17,19,22,24,27,29=
N7540
SKY77421-20
4355057
VCC
11
VCC
12
14
In_2
AFC
RFCLKP
RFCLKEXT
WTXDET
DAC102
RFTEMP
TXC
RFC10
RFC11
RFC6
VBAT
VBAT_PA
VREFRF01
TXIN
RXIP
TXIP
RXIN
TXQP
RXQP
RXQN
TXQN
ANT
VXO
VBAT_WPA
TXRESETX
RFBUSENA
RFBUSCLK
RFCLKN
VREFCM
RFBUSDAT
DAC_REF1
VCP1
Page 17
2 53 4 6
1 2 3 4 5 6
D
REF: $eng_rel_db/master/releases/bb_cebbo2s/rapstack200_av105c_b210/a2.0_2006_wk26
C
B
A
D
C
B
A
1
USB_CONN
no_ape
INTUSB(8:0)
PUSL(7:0)
USB_CMT(8:0)
Name
CMT_Engine Top level
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
dd-mmm-yy
SPI_CMT(3:0)
TXC(2:0)
USB_CMT(8:0)
USB_CTRL_CMT(2:0)
ETM(16:0)
FCI_CMT(3:0)
GEN_CTRL_CMT(20:0)
I2C(1:0)
INT_SIM(5:0)
JTAG(6:0)
KEYB_CMT(20:0)
LPRF_CMT(6:0)
MESSI_CMT(25:0)
MMC_CMT(15:0)
NAND(15:0)
PCM(3:0)
PUSL(7:0)
RFCLK_I(1:0)
RFCONV_I(11:0)
RFCTRL_I(8:0)
RAP
rapstack
ACI(1:0)
AUDIOCTRL(5:0)
CAM_CTRL_CMT(6:0)
CBUS(3:0)
CCP_CMT(3:0)
DIG_AUDIO(5:0)
EMINT(1:0)
AUDIO(6:0)
CBUS(3:0)
CHARGER
DIG_AUDIO(5:0)
EMINT(1:0)
H_BRIDGE(3:0)
INTUSB(8:0)
INT_SIM(5:0)
PUSL(7:0)
PWRONX
SIM(6:0)
SLOWAD(6:0)
TXC(2:0)
TXC_CONV(1:0)
USB_ACI(7:0)
XAUDIO(5:0)
LPRFCLK_I
RFCLK(1:0)RFCLK_I(1:0)
RFCONV(11:0)
RFCONV_I(11:0) RFCTRL(8:0)
RFCTRL_I(8:0)
RFPWR(4:0)
TXCCONV(1:0)TXCCONV_I(1:0)
POWER
basic
ACI(1:0)
JTAG(6:0)
JTAG(6:0)
KEYB_CMT(20:0)
KEYB_CMT(20:0)
LPRF_CMT(6:0)
LPRF_CMT(6:0)
MESSI_CMT(25:0)
MESSI_CMT(25:0)
MMC_CMT(15:0)
MMC_CMT(15:0)
PCM(3:0)
PUSL(7:0)
PUSL(7:0)
PUSL(7:0)
RFCLK_I(1:0)
RFCONV_I(11:0)
RFCTRL_I(8:0)
SPI_CMT(3:0)
SPI_CMT(3:0)
TXC(2:0)
dangle
AUDIOCTRL(5:0)
USB_CTRL_CMT(2:0)
I2C(1:0)
INTUSB(8:0)
DIG_AUDIO(5:0)
DIG_AUDIO(5:0)
schematic
RF_BB
GPSCLK
LPRFCLK
TXC_CONV_I(1:0)
dangle
RFPWR(4:0)
TXCCONV(1:0)
RFCONV(11:0)
RFCTRL(8:0)
RFCLK(1:0)
LPRFCLK
PWRONX
AUDIO(6:0)
H_BRIDGE(3:0)
SIM(6:0)
XAUDIO(5:0)
USB_ACI(7:0)
CHARGER
SLOWAD(6:0)
LPRFCLK_I
LPRFCLK_I
ACI(1:0)
CAM_CTRL_CMT(6:0)
CAM_CTRL_CMT(6:0)
CBUS(3:0)
CCP_CMT(3:0)
CCP_CMT(3:0)
EMINT(1:0)
ETM(16:0)
ETM(16:0)
FCI_CMT(3:0)
FCI_CMT(3:0)
GEN_CTRL_CMT(20:0)
GEN_CTRL_CMT(20:0)
INT_SIM(5:0)
Page 18
1
B
A
31
C
2
2 3 4 5 6
C
B
D D
2200-2299
2300-2399
A
BETTY
basic
CBUS(3:0)
CHARGER
CHSWSTAT
EMINT(1:0)
INTUSB(8:0)
PUSL(7:0)
SLOWAD(6:0)
USB_ACI(7:0)
4 5 6
Name
Energy management
TXC_CONV(1:0)
USB_ACI(7:0)
XAUDIO(5:0)
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
dd-mmm-yy
basic
VILMA
ACI(1:0)
AUDIO(6:0)
CBUS(3:0) CHSWSTAT
DIG_AUDIO(5:0)
EMINT(1:0)
H_BRIDGE(3:0)
INT_SIM(5:0)
PUSL(7:0)
PWRONX
SIM(6:0)
SLOWAD(6:0)
TXC(2:0)
ACI(1:0)
XAUDIO(5:0)
TXC(2:0)
INT_SIM(5:0)
INTUSB(8:0)
PWRONX
CHARGER
AUDIO(6:0)
H_BRIDGE(3:0)
SIM(6:0)
TXC_CONV(1:0)
DIG_AUDIO(5:0)
CBUS(3:0)
EMINT(1:0)
PUSL(7:0)SLOWAD(6:0)
USB_ACI(7:0)
Page 19
SleepX
SleepX
1
Warning to copy projects: copy the schematic and also the layout !
TxDaCtrl
TxCDa
AudioClk
EarDataL
MicData
ACIRx
ACITx
LST
XEARL
EARN
SIMClk2
SIMRst2
(Not Used)
MIC1P
CBusData
ACITx
CBusEn1X
4
VCHAR
XEARR
5
(Not Used)
Removed C2203
VilmaInt
XEARRC
6
WATCHDOG ENABLE
B
VIBRANRFTEMP
(Not Used)
SIMCARDDETECT
6
(Not Used)
D
WTXDET
ACI
(Not Used)
ACI
ACI
ACI
ACI
SleepClk
PURX
(Not Used)
SleepX
SIMCARDDETECT
5
MicData
(Not Used)
(Not Used)
MIC2P
PMARN
CBusClk
EarDataR
MicData
MicData
MicData
BTEMP
Mic3N
Mic3P
SIMDa2
1
Used for VBUS
(Not Used)
VIBRAP
AFCOUT
C
HFSPP
PURX
SleepClk
SIMCARDDETECT
BSI
Mbus_CLK
Reduced de-coupling capacitors requires the special power layout design
(Not Used)
It is very important these branches are equal lenght and the star point
D
2 4
(Not Used)
(Not Used)
(Not Used)
(Not Used)
(Not Used externally)
Note: With SleepClk line should be used Near-End Star Cluster topology,
MIC2N
(Not Used)
(Not Used)
RstX
SIMDa1
XEARLC
LS
RstX
SIMRst1
(Not Used)
(Not Used)
ACITx
A
C
A
EARP
3
INT_SIMDa1
TxCClk
(dividing point) is near Vilma
which means that every conponent has own branch so they are not chained.
(Not Used)
GND
(Not Used)
SIMClk1
C2231 between pins VBATH and GNDH
Mic3PR
Mic3NR
(Not Used)
AUXDAC1
ACIRxACIRx
PMARP
2
SIMCARDDETECT
INT_SIMClk1
(Not Used)
3
B
SIMCARDDETECT
ACI
SleepX
INT_SIMIOCtrl1
HFSPN
MIC2P
MIC2N
4
1
0
4
VBACK
C2211
2312249
4u7
VANAVAUX
5
VR1
GND
GND
GND
3
GND
0
GND
0
C2201
2351104
VBACK
GND
3
4
1
2u2
GND
L5
Gnd4
L6
TxCClk
L7
L8
CrI
CrO
L9
VSIM2
2351104
2u2
C2215
SerData
K6
VilmaInt
K7
TxCDa
K8
TM
HV
K9
LST
L1
L10
VDRAM
L11
BSI
MicData
L2
L3
AudClk
SerClk
L4
SlClk
ChSwS
J6
J7
TxC1
J8
VBack
J9
Gnd2
RFTemp
K1
K10
Gnd6
K11
VBat2
K2
SIMDetX
PURX
K3
MBusTx
K4
K5
VR1
H2
Gnd5
MicB1
H3
H9
MBus
MicSub
J1
J10
HeadDet
AFC
J11
J2
LS
J3
WTxDet
J4
MBusRx
J5
SerSelX
Mic2N
G10
VBG
G11
VIO
G2
MicB2
G3
Mic2P
SleepX
G5
G6
TxCCtrl
WDDis
G7
VRef
G9
H1
Mic1P
H10
VRFC
H11
E9
BTemp
XEarRC
F1
F10
VBat4
VBat1
F11
VSATx
F2
F3
XEarR
Mic3PR
F5
GndTH
F6
Gnd1
F7
F9
RstX
G1
D2
D3
EarN
PwrOnX
D9
E1
VAna
E10
VAux
VBat6
E11
E2
XEarLC
XEarL
E3
Mic3NR
E5
E6
SIMIOC1
E7
SIMIOC2
EarP
C3
HFSpN
C4
PMARN
C5
SIMRstC2
SIMDa2
C6
SIMDaC1
C7
C8
SIMDaC2
C9
VRCP1
Mic3P
D1
D10
VChar
D11
VBat5
Mic3N
VBatH
B3
EarDaL
B4
B5
SIMRstC1
SIMDa1
B6
B7
SIMClkC1
B8
Gnd3
B9
VSIM2
VSARx
C1
GndCP
C10
VBatCP
C11
C2
A3
PMARP
A4
EarDaR
SIMClk1
A5
A6
SIMClk2
A7
VSIM1
A8
VBat3
SIMClkC2
A9
B1
GndH
B10
FlyHigh
Gnd7
B11
B2
HFSpP
0
4396299
N2200
AVILMA_1.05C
VibraN
A1
A10
VCP
A11
FlyLow
VibraP
A2
C2205
VIO
1
1
2
GND
2322231
1n0
C2219
3
3
2351104
2u2
4707575
G2200
NOT_ASSEMBLED
2u2
C2202
2351104
2351009
C2222
0
R2200
0
VRFC
1u0
NOT_ASSEMBLED
2k2
1419106
10u
GND
0
0
C2231
2351061
0
2u2
2351104
C2220
3
2
GND
10u
2351061
C2227
2
5
1
2 1
4
0
VREF
4
5
GND
1
6
GND
VRCP1
32.768kHz
4530069
B2200
1
GND
GND
VBAT
C2218
2u2
2351104
800X716|0402_R
R9999
0R
VBAT
0
3
2
7
6
0
GND
VBAT
GND
3
GND
0
GNDGND
1
1
5
3
GND
GND
VDRAM
1u0
2351009
C2228
2
GND GND
Name
AVilma
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
10-Aug-00
3203855
L2202
3203855
120R/100MHz
120R/100MHz
2
1
5
6
L2205
VSIM1
2351009
C2232
1u0
GND
NOT_ASSEMBLED
2u2
C2221
2351104
2
2
2u2
2351104
C2216
2
2351104
2u2
C2217
2351104
C2213
1
ACI(1:0)
DIG_AUDIO(5:0)
TXC(2:0)
PUSL(7:0)
H_BRIDGE(3:0)
EMINT(1:0)
SIM(6:0)
USB_ACI(7:0)
XAUDIO(5:0)
SLOWAD(6:0)
dangle
AUDIO(6:0)
TXC_CONV(1:0)
INT_SIM(5:0)
dangle
2u2
CBUS(3:0)
CHSWSTAT
PWRONX
Page 20
DM_TXD
(Not Used)
(Not Used)
SleepX
BettyInt
SleepClk
SMPSClk
2 6
5
5
OEX
FSE0
VO
RCV_FRX2
B
Changed from 10nF to 1nF
Warning to copy projects: copy the schematic and also the layout !
Reduced de-coupling capacitors requires the special power layout design
VP_FRX
VM_CLK
FTX
SlaveSWSet
RstX
PURX
A
1 3
change to v2.2 (4376582) ???
CBusData
CBusEn1X
CBusClk
Clk600
Sense-
Sense+
SMPSClk
3
D
B
6
C
4
D
2
C
Slave_PU
1 4
A
Master_PD1
Master_PD2
Mbus_CLK
VCHAR
RXD2
DP_RXD
J2398 900X910|0_6
2
1
GND
1n0
3
4
0
5
1
C2300
2322231
10uH
3649117
L2302
2
0
GND
C2302
2351037
22u
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
VIO
6
0
0
2
Betty
Name
10-Aug-00
SENSE
CURRENT
PMR03EZPJU10L
R2300
1445345
1
2 3
4
VBUS
GND
1
VCORE
4
6
1
5
C2312
2351009
1u0
900X910|0_6J2399
J2307
900X910|0_6
7
1u0
2351009
C2303
3
5
GND
7
VBAT
GND
DM_TXD
H6
VCC
H7
H8
Master_PD1
3
VBAT
4
VOUT
G6
GND3
Master_PD2
G7
Slave_PU
G8
GenOut1
H1
H2
VM_CLK
H3
VO
CLK
H4
H5
DP_RXD
F6
VCCint
F7
VBAT3
VOUT
F8
G1
SenseM
RCV_FRX2
G2
VP_FRX
G3
G4
FTX
G5
RXD2
E6
VCharADC
VCharOut2
E7
E8
VCharOut1
SenseP
F1
PWM300
F2
F3
GenOut2
OEX
F4
FSE0
F5
VCharOutK
D6
VCharIn2
D7
VCharIn1
D8
SMPSClk
E1
GND4
E2
E3
SleepClk
E4
ChSwS
SlaveSWSet
E5
VCoreDef
C6
C7
VCharInK
LedOut
C8
D1
PurX
SleepX
D2
BettyInt
D3
Clk600
D4
RstX
D5
B5
SetCurr
B6
B7
GND5
B8
LedCoil
C1
CbusData
C2
CbusClk
CbusSelX
C3
C4
VCore
TestMode
C5
A5
VcoreDis
A6
TestOut
A7
GND5
A8
LedCoil
B1
VIO
VPP_VIO
B2
GND1
B3
VCoreCoil
B4
VBAT1
4376535
N2300
BETTY_V2.1_V2.2_LFA
A1
FlashM
GND1
A2
A3
VCoreCoil
A4
VBAT1
BGNDGND
GND
2
22u
2351037
C2301
GND
VBAT
1
NOT_ASSEMBLED
C2309
2351061
10u
2351104
C2313
2u2
120R/100MHz
3203855
L2301
CBUS(3:0)
SLOWAD(6:0)
EMINT(1:0)
CHSWSTAT
CHARGER
USB_ACI(7:0)
INTUSB(8:0)
dangle
dangle
dangle
dangle
dangle
dangle
dangle
PUSL(7:0)
dangle
GND
Page 21
Out,L
D3
Key_Soft_Right
Key_Navigation_Right
BTDaIn
Key_EM_Switch
(Not Used)
I2SSD1
PMARN
For CAD-file and partlist. Do not route!
DSP SW (Vesper RF func)
TxIP
VibraEn
MMCCClk
MMCFb_Clk
BTH_CLK_REQ
BTWAKE
PURX
MMCCmdDir
XTICLK
TESub
MMCCmd
MMCDaDir
EXT_IOEINT
ACC_INT
XTITxD_2
XTITxD_3
MMCDaDir1
SPI CLK
CCP Clk+
CBusClk
CBusData
CBusEN1X
SMPSClk
MMCLSShutDn
MMCCmdDir
!CS Main
TE Main
FUNCTION
A
JTMS
CAM_RESET
(Not Used)
TE Main
!CS Main
RAP_USB_RCV_FRX2
RAP_USB_VO
21
4
BTDaOut
!RD
Key_Navigation_Down
Reduced de-coupling capacitors requires the special power layout design
BTHostWake
Key_Send
BTRstX
Key_Soft_Right
D
MAGNET_STROBE
MMCDa2
MMCDaDir
MMCCmd
1
BTDaIn
I2SClk
CCP Clk-
AuxMicData
MAGNET_ENABLE
I2SSD2
SPI CS
MMCLSShutDn
2
D0
(MMC_WP)
PUEN
JTClk
JTClkRet
EMU1
MAGNET_ENABLE
(Not Used)
(Not Used)
(Not Used)
BTRstX
XTITxD_0
BTRTS
Key_Navigation_Left
Key_Send
RAP_USB_VM_Clk
BettyInt
DMIC_EN
RxIP
RxIN
RxQP
Rx1
Rx2
VrefP
TxCDa
TxCDaCtrl
MMCDa0
INT_SIMIOCtrl1
INT_SIMIODa1
INT_SIMClk1
VilmaInt
(MMC_WP)
D0
EarDataL
Warning to copy projects: copy the schematic and also the layout !
MicData
AudioClk
PMARP
Iref1
!WR
Key_Soft_Left
Key_Navigation_Left
SPI DATA OUT
D/!C
I2SWS
Key_Soft_Left
BTCTS
Key_Navigation_Right
SPI CLK
5
Bypass for CPU
BTWAKE
D/!C
USBChargStatus
RFClkP
RFClkN
SleepX
SleepClk
I2C0_SCL
(Not Used)
D1
6
C
VibraEn
HALL_INT
JTDO
EMU0
4 5
Bypass for memory
RAP_USB_OEX
C
VPPLOCK
TxQP
In,H
(Not Used)
!CSSub
!Reset
CAM-TO-HOST_INT
D
MMCDa1
MMCDa0
(Not Used)
MMCDet (Not Used)
MMCHotSwap
NOTE! D3000 must have same coordinates and rotation than D2800
(Not Used)
CCP Data+
CCP Data-
TxCClk
MMCDa1
MMCDa2
MMCDa3
MMCDaDir1
ACIRx
ACITx
4347128 SPANSION
EarDataR
SPI DATA OUT
RAP_USB_VP_FRX
RAP_USB_FSE0_FTX
In,H
In,H
B
!RD
In,L
In,H
XTIRxD
XTITxD_1
Key_Navigation_Select
CAM-TO-HOST_INT
Key_Navigation_Select
Key_EM_Switch
DMIC_EN
HOST-TO-CAM_INT
TESub
!CSSub
!Reset
B
3
MMCDa3
PURX
D4
3
A
USBOTGIntN
TxA
JTDI
JTRst
6
MAGNET_STROBE
CAMCLK
CAM_VCTRL_1V8
In,H
In,H
D2
SPI DATA IN
In,H
In,H
I2C0_SDA
I2C0_SCL
Key_Navigation_Up
HOST-TO-CAM_INT
SPI CS
Key_Navigation_Down
BTRTS
(Not Used)
DSP SW
RXRESET (Not Used)
GenIO66: WPX (internal)
WPX (internal)
RxQN
D2
SysClk
APESleepX
TxReset
TxP
D7
D6
ACC_INT
BTH_CLK_REQ
In,H
In,H
In,L
In,H
In,H
In,H
Out,L
In,H
In,H
Key_Navigation_Up
AuxMicData
VPPLOCK
RFBusClk
(Not Used)
CAMCLK
USBOTGIntN
In,H
In,H
In,L
In,L
In,L
Out,L
Out,L
(Not Used)
I2C0_SDA
SPI DATA IN
MMCFb_Clk
MMCCClk
In,H
In,H
In,H
Pin Reset State
In,H
In,H
Out,L
In,H
In,H
Out,L
In,L
In,H
D7
D4
D5
D6
BTDaOut
EXT_IOEINT
USBChargStatus
CAM_RESET
In,H
In,L
Out,L
In,H
In,H
In,H
In,H
D3
D1
D5
(Not Used)
!WR
In,H
In,H
In,H
In,H
In,H
BTCTS
In,H
In,H
In,H
In,H
In,L
Out,L
In,L
HALL_INT
(Not Used)
In,L
TxQN
RFBusDa
RFBusEn1X
In,H
In,L
In,L
Out,H
Out,H
In,H
Out,L
In,H
Out,L
In,L
In,H
In,H
In,H
4347003 SAMSUNG
In,H
In,H
In,H
Out,H
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
TxIN
CAM_VCTRL_1V8
BTHostWake
4
1
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
RAPStack
Name
dd-mmm-yy
GND
0
2
4
3
1
100n
2351075
C2811
0
57
1
0
2351075
C2802
4k7
1419083
R2803
100n
C2803
2351075
100n
1
10
5
9
2
C2813
2351075
100n
GND
6
VCORE
GND
20
6
4
5
3
17
VIO
2
5
33
32 15
12
5
0
28
27
31
30
51
44
43
47
1
25
GND
2
2
7
41
VCORE
54
0
VPP
2351075
C2816
2
5
4
8
GND
2
100n
GND
6
100n
R2809
1430014
1M
65
C2815
2351017
1419083
R2801
6
2
3
42
11
13
4k7
GND
3
R2802
1419083
4k7
1
0
GND
R2808
1419081
100R
3
6
4
GND
0
53
52
55
8
31
11
69
68
VIO
11
50
11
67
72
70
TOP_Vssq5
Y22
Y23
TOP_Vssq4
VCORE
1
GND
0
U1
TOP_VCCnor1
U2
U22
0
U23
SDRLDQS
U3
19
V1
TOP_VCCnor0
W23
TOP_Vddq0
17
Y1
Y2
22
SDRDQML
P23
6
R23
3
T1
21
16
T2
T21
4
T22
2
1
T23
TOP_Vpp
M2
23
M21
SDRCLK
7
M22
N1
FlsCSX
N23
5
20
P1
18
P2
P22
K1
K2
TOP_Vss4
9
K21
10
K23
L1
TOP_Vss5
TOP_Vss6
L2
8
L21
L22
SDRDQMU
SDRCLKX
L23
G2
TOP_Vss0
13
G22
14
G23
TOP_Vss2
H1
H2
TOP_Vss1
12
H23
11
J23
TOP_Vss3
D1
FlsOEX
D2
D23
TOP_Vssq3
FlsWaitX
E2
SDRUDQS
E21
15
E23
TOP_Vccq0
F1
F2
FlsWEX
G1
TOP_Vccq1
B6
3
B7
4
B8
FlsADVX
C1
C2
0
TOP_Vssq2
C22
TOP_Vssq1
C23
C7
2
FlsRSTX
TOP_Vssd5
B14
B16
TOP_Vssd3
B18
TOP_Vddq4
B20
TOP_Vdd0
B22
TOP_Vssq0
8
B4
B5
9
1
SDRRASX
AC21
6
TOP_VCCmm0
AC3
AC5
TOP_VCCmm1
AC6
TOP_Vdd5
TOP_Vdd4
AC7
AC8
2
5
B11
B13
7
AC10
0
AC11
14
AC12
13
TOP_Vssd0
AC14
AC16
TOP_Vssd1
AC17
TOP_SDRAdres
AC18
8
AC20
GenIO66
SDRCASX
AB20AB21
5
AB22
4
AB3
TOP_/CEmm
AB5
TOP_INT
TOP_/CEd
AB6
AB7
3
AB9
1
AA23
AB10
10
SDRCKE
AB11
AB12
12
AB14
11
AB15
SDRWEX
AB17
9
AB18
7
AB2
TOP_Vdd1
A21
A6
10
A8
11
A9
12
FlsCS2X
AA1
AA2
24
AA22
TOP_Vssd2
TOP_Vdd3
A12
15
A13
A14
FlsClk
TOP_Vssd4
A15
A16
TOP_Vddq3
TOP_Vddq5
A17
A18
TOP_Vddq2
TOP_Vddq1
A19
A20
TOP_Vdd2
4377156
SDRDa
SDRAd
RAP3GS_V3.02-PA
D2800
ExtAdDa
13
A10
A11
14
6
8
1
12
13
0
9
3
2
6
4
0
8
15
GND
3
9
10
0
14
2
3
45
2
26
1
3
5
0
6
7
Y20
Y21
GenIO9
USBVP_FRX
Y3
Y4
SysClk
Y5
GenIO25
Y6
GenIO23
USBVO
Y7
VSSCORE6
Y8
GenIO18
Y9
GenIO65
Y13
GenIO31
Y14
CBusClk
Y15
GenIO44
GenIO39
Y16
Y17
VDDSIO4
GenIO34
Y18
GenIO13
Y19
GenIO8
W2
USBRCV_FRX2
GenIO5
W20
GenIO4
W21
GenIO6
W22
W3
USBFSE0_FTX
VDDCORE4
W4
PMARN
Y10
Y11
VDDSIO3
Y12
USBDSyncClk
V2
V20
GenIO33
GenIO1
V21
V22
GenIO3
GenIO7
V23
VSSCORE5
V3
V4
USBOEX
W1
GenIO62
U15
U16
VDDDSP2
U17
VSSDSP2
U20
GenIO2
U21
GenIO0
U4
GenIO69
U7
GenIO73
VDDCORE5
U8
GenIO19
U9
GenIO64
T3
GenIO58
T4
T7
GenIO70
U10
AudioClk
U11
VDD2
U12
CBusDa
U13
VDDDSP1
U14
VSSDSP1
GenIO43
R2
R20
VDDDSP3
GenIO15
R21
GenIO32
R22
RX2
R3
GenIO57
R4
R7
GenIO71
GenIO37
T17
T20
VDDSIO5
P17P20
VSSDSP3
GenIO38
P21
P3
TXA
GenIO59
P4
GenIO60
P7
GenIO52
R1
R17
VDDSIO6
GenIO56
N17
GenIO47
RX1
N2
I2SSCLK
N20
N21
GenIO36
N22
GenIO41
RFBusDa
N3
TXReset
N4
N7
TXP
VDDCORE7
TxIN
VDDCORE3
L7
M1
RFBusEn1X
I2SWS
M17
VSSCORE9
M20
M23
GenIO42
M3
VSSATX
M4
VDDCORE2
M7
VDDSIO1
VDDCORE8
K20
K22
VDD1
VDDATX
K3
K4
TxIP
RxQP
K7
GenIO46
L17
VSSCORE10
L20
VSSASUB
L3
L4
J17
VDDMCU1
RxIN
J2
GenIO49
J20
GenIO48
J21
J22
GenIO68
RxIP
J3
J4
VSSCORE3
J7
RxQN
K17
GenIO67
H17
VDDSIO7
H20
GenIO51
H21
GenIO16
H22
TahvoInt
JTDO
H3
H4
RFClkN
H7
VSSA
J1
VSSCORE2
G15
GenIO72
G16
VSSMCU2
G17
ACIRx
G20
SIMIODa1
VSSMCU1
G21
G3
VDDA
RFClkP
G4
VrefN
G8
G9
VrefP
F22
EarDataR
F23
F3
JTrst
F4
JTClk
G10
Iref1
G11
TXQP
G12
TXQN
VDDCORE11
G13
G14
VSSCORE14
D9
VDDCORE1
E1
VDDARX
E20
GenIO54
E22
E3
TMAct
E4
EMU0
VSSARX
F20
GenIO17
F21
SIMIOCtrl1
D20
GenIO55
D21
D22
VSSCORE11
APESleepX
D3
D4
VDDSIO10
JTDI
D5
ETMPipeB1
D6
D7
SleepClk
JTMS
D8
ETMPipe2
VDDSIO9
D13
VDDCORE9
ETMPkt5
D14
SpecialIO3
D15
D16
SpecialIO2
D17
GenIO61
TxCClk
D18
D19
TxCDa
RetuInt
VSSCORE1
C3
C4
PURX
ETMPkt4
C5
ETMPkt7
C6
ETMSyncB
C8
C9
ETMPkt0
D10
ETMSync
VDDCORE10
D11
D12
C13
VSSCORE4
C14
C15
ETMPkt3
SIMClk1
C16
C17
GenIO63
VDDCORE12
C18
SpecialIO1
C19
SpecialIO0
C20
C21
VDDSIO8
GenIO53
B21
NC_BGA
B23
B3
SleepX
ETMClk
B9
ETMPipe0
C10
C11
VSSCORE13
C12
RFBusClk
VDDMCU2
AC4
AC9
GenIO22
B1
NC_BGA
B10
ETMPipe1
B12
ETMPkt6
B15
VSSCORE12
ACITx
B17
B19
TxCDaCtrl
B2
NC_BGA
AB8
AC1
NC_BGA
MicData
AC13
AC15
SMPSClk
VSSCORE8
AC19
AC2
NC_BGA
NC_BGA
AC22
AC23
NC_BGA
GenIO26
AA8
GenIO20
AA9
GenIO50
NC_BGA
AB1
AB13
I2SSD1
AB16
GenIO35
VDDCORE6
AB19
NC_BGA
AB23
AB4
VDDSIO2
GenIO24
AA19
GenIO11
GenIO12
AA20
AA21
GenIO10
USBVM_Clk
AA3
GenIO28
AA4
AA5
GenIO27
GenIO29
AA6
GenIO21
AA7
VSSCORE7
AA11
PMARP
AA12
AA13
GenIO30
CBusEn1X
AA14
GenIO45
AA15
AA16
I2SSD2
AA17
GenIO40
GenIO14
AA18
NC_BGA
A2
A22
NC_BGA
A23
NC_BGA
A3
ETMPipeB2
A4
ETMPipeB0
ETMPkt2
A5
ETMPkt1
A7
AA10
EarDataL
1
D2800
4377156
RAP3GS_V3.02-PA
A1
NC_BGA
GND
GND
1
5
3
100n
2351075
C2805
35
34
37
46
36
40
39
42
32
52
1
8
58
37
2351075
C2808
1430006
3k3
100n
49
9
R2805
100n
2351075
C2818
C2817
2351075
100n
62
65
64
1
6
57
60
59
63
1
GND
4
8
1
5
69
68
73
71
21
11
24
23
17
8
16
19
18
22
35
34
38
13
22
21
29
24
23
36
16
19
18
30
33
5
12
1
2
55
59
63
62
61
54
53
VCORE
56
45
VRFC
48
51
50
5
2
67
72
70
1
0
3
10
6
61
0
4
VRFC
2
14
6
VDRAM
C2810
2351075
100n
15
14
4
100n
2351075
C2812
10
9
13
12
0
25
29
4
4
7
0
20
26
C2809
2351075
100n
6
C2806
2351075
100n
VPP
R2804
1419087
1k
8
0
0
R2800
1419077
10R
GND
1
0
1
3
71
100n
2351075
C2814
2351075
100n
9
73
VIO
C2804
5
2
GND
5
0
3
GND
GND
7 5
7
VCORE
C2823
2322231
1n0
14
VIO
16
1
6
S72NS512PE0KJFLG
D3000
4347128|NONET
16Mx16 DDR DRAM
COMBO 32Mx16 NOR
A1
1
15
2
7
6
0
VCORE
GND
GND
GND
5
0
4
VIO
C2800
2351075
100n
47
28
27
58
VIO
43
46
3
3
48
1
1
7
10
40
44
2
0
4
3
1
3
GND
38
4
41
R2807
1419081
100R
VIO
56
60
39
VIO
0
2
10
8
1
3
0
VDRAM
2
64
7
100n
2351075
C2801
7
10
9
12
3k3
R2806
1430006
VIO
GND
GND
13
GND
dangle
dangle
GEN_CTRL_CMT(20:0)
dangle
dangle
dangle
dangle
dangle
GenIO(73:0)
USB_CTRL_CMT(2:0)
dangle
CCP_CMT(3:0)
49
VIO
INT_SIM(5:0)
dangle
KEYB_CMT(20:0)
NAND(15:0)
MESSI_CMT(25:0)
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
AUDIOCTRL(5:0)
LPRF_CMT(6:0)
SPI_CMT(3:0)
CAM_CTRL_CMT(6:0)
MMC_CMT(15:0)
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangledangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangle
dangledangle
RFCLK_I(1:0)
RFCONV_I(11:0)
ACI(1:0)
DIG_AUDIO(5:0)
CBUS(3:0)
ETM(16:0)
dangle
PCM(3:0)
EMINT(1:0)
JTAG(6:0)
RFCTRL_I(8:0)
TXC(2:0)
FCI_CMT(3:0)
USB_CMT(8:0)
I2C(1:0)
PUSL(7:0)
Page 22
APESleepX
1 2 3 4 5 6
1 2 3 4
D
VM_CLK
VP_FRX
RCV_FRX2
VO
FSE0
OEX
FTX
SlaveSWSet
RAP_USB_VM_Clk
RAP_USB_VP_FRX
RAP_USB_RCV_FRX2
RAP_USB_VO
RAP_USB_FSE0_FTX
RAP_USB_OEX
PUEN
RAP_USB_FSE0_FTX
B
A A
C
B
C
D
65
dd-mmm-yy
Appr
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
4
4
6
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation
USB Connections without APE
Name
1
2
3
4
55
6
7
00
1
2
3
4
INTUSB(8:0) USB_CMT(8:0)
PUSL(7:0)
GND
Page 23
5: TxA
6: RFBusClk
4: RxIP
5: RxIN
0: AFC
1: TxC1
D
C
(Not Used)
(Not Used)
0: TxReset
1: Rx1
(Not Used)
(Not Used)
3 4
D
C
B
A
0: TxIP
1: TxIN
B
A
(Not Used)
(Not Used)
CBB5X TOP SHEET
8: Iref1
9: VrefP
5 6
0: RFClkP
1: RFClkN
3 4
2: TxQP
3: TxQN
1 2
6: RxQP
7: RxQN
3: RXRESET ?
(Not Used)
10: DRXIP
11: DRXIN
1 2
2: Rx2
4: TxP
VR1VBAT VRCP1
5 6
7: RFBusDa
8: RFBusEn1X
Name
RF IF
This document is property of Nokia Corporation
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
Copyright (C) Nokia Corporation. All rights reserved.
Appr
dd-mmm-yy
0 1 2 3
RFCONV(11:0)
RFCTRL(8:0)
TXCCONV_I(1:0) TXCCONV(1:0)
RFCONV_I(11:0)
RFCTRL_I(8:0)
LPRFCLK_I
GPSCLK
RFCLK_I(1:0) RFCLK(1:0)
LPRFCLK
RFPWR(4:0)
VREF
Page 24
Page 25
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