The MC-4532CD646 is a 33,554,432 words by 64 bits synchronous dynamic RAM module on which 16 pieces of
128M SDRAM: µPD45128841 are assembled.
This module provides high density and large quantities of memory in a small space without utilizing the surfacemounting technology on the printed circuit board.
Decoupling capacitors are mounted on power supply line for noise reduction.
Features
• 33,554,432 words by 64 bits organization
• Clock frequency and access time from CLK
Part number/CAS latencyClock frequency
(MAX.)
MC-4532CD646EF-A80CL = 3125 MHz6 ns
CL = 2100 MHz6 ns
MC-4532CD646EF-A10CL = 3100 MHz6 ns
CL = 277 MHz7 ns
★
★
MC-4532CD646PF-A80CL = 3125 MHz6 ns
CL = 2100 MHz6 ns
MC-4532CD646PF-A10CL = 3100 MHz6 ns
CL = 277 MHz7 ns
• Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
• Pulsed interface
• Possible to assert random column address in every cycle
• Quad internal banks controlled by BA0 and BA1 (Bank Select)
• Programmable burst-length (1, 2, 4, 8 and full page)
Address Input for EEPROM
SDA: Serial Data I/O for PD
SCL: Clock Input for PD
CC
V
SS
V
: Power Supply
: Ground
WP: Write Protect
NC: No Connection
/xxx indica tes active low signal.
Data Sheet M13681EJ4V0DS00
3
Block Diagram
★
/WE
/CS0
DQMB0
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQMB1
DQ 8
DQ 9
DQ 10
DQ 11
DQ 12
DQ 13
DQ 14
DQ 15
DQMB4
DQ 32
DQ 33
DQ 34
DQ 35
DQ 36
DQ 37
DQ 38
DQ 39
DQMB5
DQ 40
DQ 41
DQ 42
DQ 43
DQ 44
DQ 45
DQ 46
DQ 47
DQ 7
DQ 6
DQ 5
DQ 4
DQ 3
DQ 2
DQ 1
DQ 0
DQ 7
DQ 6
DQ 5
DQ 4
DQ 3
DQ 2
DQ 1
DQ 0
DQ 4
DQ 7
DQ 6
DQ 5
DQ 3
DQ 2
DQ 1
DQ 0
DQ 5
DQ 7
DQ 6
DQ 4
DQ 3
DQ 2
DQ 1
DQ 0
DQM
DQM
DQM
DQM
MC-4532CD646
/CS1
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQ 3
DQ 0
DQ 1
DQ 2
DQ 4
DQ 5
DQ 6
DQ 7
DQ 2
DQ 0
DQ 1
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQM
DQM
DQM
DQM
/CS
D8
/CS
D9
/CS
D12
/CS
D13
/WE
/CS
D0
/WE
/CS
D1
/WE
/CS
D4
/CS
/WE
D5
/CS2/CS3
DQMB2
/WE
/WE
/WE
/WE
DQ 16
DQ 17
DQ 18
DQ 19
DQ 20
DQ 21
DQ 22
DQ 23
DQMB3
DQ 24
DQ 25
DQ 26
DQ 27
DQ 28
DQ 29
DQ 30
DQ 31
DQMB6
DQ 48
DQ 49
DQ 50
DQ 51
DQ 52
DQ 53
DQ 54
DQ 55
DQMB7
DQ 56
DQ 57
DQ 58
DQ 59
DQ 60
DQ 61
DQ 62
DQ 63
DQM
DQ 7
DQ 6
DQ 5
DQ 4
DQ 3
DQ 2
DQ 1
DQ 0
DQM
DQ 4
DQ 7
DQ 6
DQ 5
DQ 3
DQ 2
DQ 1
DQ 0
DQM /CS /WE
DQ 7
DQ 6
DQ 5
DQ 4
DQ 3
DQ 2
DQ 1
DQ 0
DQM /CS /WE
DQ 7
DQ 6
DQ 5
DQ 4
DQ 3
DQ 2
DQ 1
DQ 0
/CS /WE
D2
/CS /WE
D3
D6
D7
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQ 3
DQ 0
DQ 1
DQ 2
DQ 4
DQ 5
DQ 6
DQ 7
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQM
DQM
DQM
DQM
D10
D11
D14
D15
/CS
/CS
/CS
/CS
/WE
/WE
/WE
/WE
SCL
A0 - A11
BA0, BA1
Remarks 1.
4
SERIAL PD
SDA
A1 A2
A0
SA1 SA2
SA0
A0 - A11: D0 - D15
A13, A12: D0 - D15
V
CC
V
SS
C
WP
47 kΩ
D0 - D15
D0 - D15
CLK0
3.3 pF
CLK1
3.3 pF
/RAS
/CAS
CKE0
The value of all resistors is 10 Ω except CKE1 and WP.
2.
D0 - D15:
µ
PD45128841 (4M words × 8 bits × 4 banks)
Data Sheet M13681EJ4V0DS00
CLK: D0, D1, D4, D5
CLK: D8, D9, D12, D13
/RAS: D0 - D15
/CAS: D0 - D15
CKE: D0 - D7
CLK2
CLK3
CKE1
CLK: D2, D3, D6, D7
3.3 pF
CLK: D10, D11, D14, D15
3.3 pF
10 kΩ
CKE: D8-D15
MC-4532CD646
Electrical Specifications
• All voltages are referenced to VSS (GND).
µ
• After power up, wait more than 100
device operation is achieved.
Absolute Maximum Ratings
ParameterSymbolConditionRatingUnit
Voltage on power supply pin relative to GNDV
Voltage on input pin relative to GNDV
Short circuit output c urrentI
Power dissipationP
Operating ambient tem peratureT
Storage temperatureT
Caution Exposing the device to stress above those listed in Absolute Maximum Ratings could cause
permanent damage. The device is not meant to be operated under conditions outside the limits
described in the operational section of this specification. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
s and then, execute power on sequence and CBR (Auto) refresh before proper
CC
T
O
D
A
stg
–0.5 to +4.6V
–0.5 to +4.6V
50mA
16W
0 to +70
–55 to +125
C
°
C
°
Recommended Operating Conditions
ParameterSymbolConditionMIN.TYP.MAX.Unit
Supply voltageV
High level input voltageV
Low level input voltageV
Operating ambient tem peratureT
0 to 3.6 V, All other pins not under test = 0 V– 16+ 16µA
is disabled, VO = 0 to 3.6 V–
ns.
MC-4532CD646
-A801,040 mA1
-A801,040
-A101,040
16
320mA
96
64
-A801,200 mA2
-A801,400
-A101,240
-A802,080 mA3
-A102,080
-A802,080
-A102,080
3+ 3µA
Notes 1.
6
CC1
I
depends on output loading and cycle rates. Specified values are obtained with the output open. In
CC1
addition to this, I
CC4
2
.I
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC5
3.
I
is measured on condition that addresses are changed only one time during t
is measured on condition that addresses are changed only one time during t
CC4
is measured on condition that addresses are changed only one time during t
CK (MIN.)
.
Data Sheet M13681EJ4V0DS00
CK (MIN.)
CK (MIN.)
.
.
AC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
Test Conditions
★
ParameterValueUnit
AC high level input voltage / low level input voltage2.4 / 0.4V
Input timing measurement ref erence level1.4V
Transition time (Input rise and fall time)1ns
Output timing measurement ref erence level1.4V
t
CK
t
CH
2.4 V
CLK
Input
1.4 V
0.4 V
2.4 V
1.4 V
0.4 V
t
SETUPtHOLD
t
AC
t
OH
MC-4532CD646
Notes
t
CL
Output
Data Sheet M13681EJ4V0DS00
7
Synchronous Characteristics
ParameterSymbol-A80-A10UnitNote
Clock cycle time/CAS latency = 3t
/CAS latency = 2t
Access time from CLK/CAS latency = 3t
/CAS latency = 2t
CLK high level widtht
CLK low level widtht
Data-out hold timet
Data-out low-impedance tim et
Data-out high-impedance time / CA S l atency = 3t
/CAS latency = 2t
Data-in setup timet
Data-in hold timet
Address setup timet
Address hold timet
CKE setup timet
CKE hold timet
CKE setup time (P ower down exit)t
Command (/CS0 - /CS 3, /RAS, /CAS, / WE,
DQMB0 - DQMB7) setup time
Command (/CS0 - /CS 3, /RAS, /CAS, / WE,
DQMB0 - DQMB7) hold time
These specifications are applied to the monolithic device.
8
Data Sheet M13681EJ4V0DS00
Asynchronous Characteristics
ParameterSymbol-A80-A10UnitNote
ACT to REF/ACT comm and peri od (Operat i on)t
REF to REF/ACT command period (Refresh)t
ACT to PRE command periodt
PRE to ACT command periodt
Delay time ACT to READ/WRITE commandt
ACT(one) to ACT(another) command periodt
Data-in to PRE command periodt
Data-in to ACT(REF) command period /CAS latency = 3t
(Auto precharge)/CAS latency = 2t
Mode register set cycle timet
Transition timet
Refresh time (4,096 refres h cycles)t
serial PD memory
1Total number of bytes of serial PD memory08H00001000256 bytes
2Fundament al memory type04H00000100SDRAM
3Number of rows0CH0000110012 rows
4Number of c ol umns0AH0000101010 columns
5Number of bank s02H000000102 banks
6Data width40H0100000064 bits
7Data width (continued)00H000000000
8Voltage interf ace01H00000001LVTTL
9CL = 3 Cycle time-A8080H100000008 ns
-A10A0H1010000010 ns
10CL = 3 Access ti me-A8060H011000006 ns
-A1060H011000006 ns
11DIMM configuration type00H00000000None
12Refresh rate/type80H10000000Normal
13SDRAM width08H00001000×8
14Error checking SDRA M width00H00000000None
15Minimum clock delay01H000000011 clock
16Burst length supported8FH100011111, 2, 4, 8, F
17Number of banks on each S DRAM04H000001004 banks
18/CAS latency support ed06H000001102, 3
19/CS latency supported01H000000010
20/WE l at ency supported01H000000010
21SDRAM module attribut es00H00000000
22SDRAM device attributes : General0EH00001110
23CL = 2 Cycle time-A80A0H1010000010 ns
-A10D0H1101000013 ns
24CL = 2 Access ti me-A8060H011000006 ns
-A1070H011100007 ns
25-2600H00000000
RP(MIN.)
27t
-A8014H0001010020 ns
-A1014H0001010020 ns
RRD(MIN.)
28t
-A8010H0001000016 ns
-A1014H0001010020 ns
RCD(MIN.)
29t
-A8014H0001010020 ns
-A1014H0001010020 ns
RAS(MIN.)
30t
-A8030H0011000048 ns
-A1032H0011001050 ns
31Module bank density20H00100000128M bytes
hold time
34Data signal input setup ti me20H001000002 ns
35Data signal input hold time10H000100001 ns
36-6100H00000000
62SPD revision12H000100101.2
63Checksum for bytes 0 - 62-A80F1H11110001
-A1057H01010111
64-71Manufacture’s JEDEC ID code
72Manufacturing location
73-90Manufacture’s P/N
91-92Revision code
93-94Manufacturing date
95-98Assembly serial number
99-125 Mfg specifi c
126Intel specification frequency64H01100100100 MHz
127Intel specificati on / CA S-A80FFH11111111
latency support-A10FDH11111101
20H001000002 ns
10H000100001 ns
Timing Chart
Refer to the
SYNCHORONOUS DRAM MODULE TIMING CHART Information (M13348E)
.
Data Sheet M13681EJ4V0DS00
11
★
Package Drawing
168 PIN DUAL IN-LINE MODULE (SOCKET TYPE)
A (AREA B)
Y1
R2
F1
Y2
Z1
Z2
MC-4532CD646
N
F2
Q
M
R1
M2 (AREA A)
M1 (AREA B)
L
A
J
H
K
CB
GI
B
S
(OPTIONAL HOLES)
E
U1
U2
T
D
A1 (AREA A)
ITEM MILLIMETERS
A
133.35
133.35±0.13
A1
11.43
B
C36.83
D6.35
D12.0
3.125
D2
E54.61
2.44
F1
F23.18
detail of A part
W
V
X
detail of B part
D2
P
D1
G6.35
H1.27 (T.P.)
I8.89
24.495
J
K42.18
17.78
L
34.93±0.13
M
15.15
M1
M219.78
N4.0 MAX.
1.0
P
QR2.0
R14.0±0.10
R29.53
φ
S
T
U14.0 MIN.
U2
V0.2±0.15
W1.0±0.05
X
Y13.0 MIN.
Y22.26
Z1
Z22.26
3.0
1.27±0.1
4.0 MIN.
2.54±0.10
3.0 MIN.
M168S-50A78
12
Data Sheet M13681EJ4V0DS00
[MEMO]
MC-4532CD646
Data Sheet M13681EJ4V0DS00
13
[MEMO]
MC-4532CD646
14
Data Sheet M13681EJ4V0DS00
MC-4532CD646
NOTES FOR CMOS DEVICES
1PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using
insulators that easily build static electricity. Semiconductor devices must be stored and transported
in an anti-static container, static shielding bag or conductive material. All test and measurement
tools including work bench and floor should be grounded. The operator should be grounded using
wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need
to be taken for PW boards with semiconductor devices on it.
2HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused
DD
pin should be connected to V
being an output pin. All handling related to the unused pins must be judged device by device and
related specifications governing the devices.
or GND with a resistor, if it is considered to have a possibility of
3STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the
reset signal is received. Reset operation must be executed immediately after power-on for devices
having reset function.
Data Sheet M13681EJ4V0DS00
15
MC-4532CD646
CAUTION FOR HANDLING MEMORY MODULES
When handling or inserting memory modules, be sure not to touch any components on the modules, such as
the memory IC, chip capacitors and chip resistors. It is necessary to avoid undue mechanical stress on these
components to prevent damaging them.
When re-packing memory modules, be sure the modules are NOT touching each other. Modules in contact
with other modules may cause excessive mechanical stress, which may damage the modules.
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8
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