NEC V850-SC1, V850-SC2, V850-SC3 User Manual

User’s Manual
IE-703089-MC-EM1
In-Circuit Emulator Option Board
Target Devices
V850/SC1™ V850/SC2™ V850/SC3™
Document No. U15776EJ1V0UM00 (1st edition) Date Published June 2002 N CP(K)
Printed in Japan
2002
[MEMO]
2
User’s Manual U15776EJ1V0UM
V850/SC1, V850/SC2, and V850/SC3 are trademarks of NEC Corporation.
Windows is either a registered trademark or a trademark of Microsoft Corporation in the United States
and/or other countries.
PC/AT is a trademark of International Business Machines Corporation.
Ethernet is a trademark of Xerox Corporation.
The information in this document is current as of May, 2002. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others.
Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information.
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NEC (as defined above).
M8E 00. 4
User’s Manual U15776EJ1V0UM
3
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC product in your application, pIease contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify:
Device availability
Ordering information
Product release schedule
Availability of related technical literature
Development environment specifications (for example, specifications for third-party tools and
components, host computers, power plugs, AC supply voltages, and so forth)
Network requirements
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country.
NEC Electronics Inc. (U.S.)
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Novena Square, Singapore Tel: 253-8311 Fax: 250-3583
J02.4
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Users Manual U15776EJ1V0UM

INTRODUCTION

Target Readers This manual is intended for users who design and develop application systems using
the V850/SC1, V850/SC2, and V850/SC3.
Purpose The purpose of this manual is to describe the proper operation of the IE-703089-MC-
EM1 and its basic specifications.
Organization This manual is divided into the following parts.
•Overview
• Names and functions of components
• Cautions
How to Read This Manual It is assumed that the reader of this manual has general knowledge in the fields of
electrical engineering, logic circuits, and microcontrollers.
The IE-703089-MC-EM1 is used connected to the IE-703002-MC in-circuit emulator.
This manual explains the basic setup procedure and switch settings of the IE-
703002-MC when it is connected to the IE-703089-MC-EM1. For the names and
functions of parts, and the connection of elements, refer to the IE-703002-MC User’s
Manual (U11595E).
To learn about the basic specifications and operation methods
Read this manual in the order of the CONTENTS.
To learn the operation methods and command functions, etc., of the IE-703002-MC
and IE-703089-MC-EM1
Read the user’s manual of the debugger (sold separately) that is used.
Conventions Note: Footnote for item marked with Note in the text
Caution: Information requiring particular attention
Remark: Supplementary information
Numeral representation: Binary … xxxx or xxxxB
Decimal … xxxx
Hexadecimal … xxxxH
Prefix indicating the power of 2 (address space, memory capacity):
10
K (kilo): 2
M (mega): 220 = 1024
= 1024
2
Terminology The meanings of terms used in this manual are listed below.
Emulation CPU The CPU that executes the program prepared by the user in the
emulator.
Target device The device that is targeted for emulation.
Target system The system (user-built system) that is targeted for debugging. This
includes the target program and user-configured hardware.
IE system The combination of the IE-703002-MC and IE-703089-MC-EM1
User’s Manual U15776EJ1V0UM
5
Related Documents When using this manual, refer to the following manuals.
The related documents indicated in this publication may include preliminary versions.
However, preliminary versions are not marked as such.
{ Documents related to development tools (user’s manuals)
Document Name Document
IE-703002-MC In-circuit emulator U11595E
IE-703089-MC-EM1 In-circuit emulator option board This manual
CA850 C Compiler package Ver. 2.40
ID850 Integrated debugger Ver.2.40 Operation WindowsTM based U15181E
SM850 System simulator Ver.2.40 Operation Windows based U15182E
SM850 System simulator Ver.2.00 or
later
RX850 Real-time OS Ver.3.13 or later
RX850 Pro Real-time OS Ver.3.13
RD850 Task debugger Ver.3.01 U13737E
RD850 Pro Task debugger Ver.3.01 U13916E
AZ850 System performance analyzer Ver.3.0 U14410E
PG-FP4 Flash Memory Programmer U15260E
Operation To be prepared
C Language U16054E
PM Plus To be prepared
Assembly Language U16042E
External Part User Open
Interface Specifications
Basics U13430E
Installation U13410E
Technical U13431E
Basics U13773E
Installation U13774E
Technical U13772E
Number
U14873E
6
User’s Manual U15776EJ1V0UM
CONTENTS
CHAPTER 1 OVERVIEW.........................................................................................................................10
1.1 Hardware Configuration............................................................................................................................... 10
1.2 Features (When Connected to IE-703002-MC) ...........................................................................................11
1.3 Function Specifications (When Connected to IE-703002-MC).................................................................. 11
1.4 System Configuration .................................................................................................................................. 12
1.5 Contents in Carton ....................................................................................................................................... 13
1.6 Connection Between IE-703002-MC and IE-703089-MC-EM1.................................................................... 15
CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS ...............................................................19
2.1 Component Names and Functions of IE-703089-MC-EM1 ........................................................................ 20
2.2 Clock Settings...............................................................................................................................................23
2.2.1 Main clock setting.............................................................................................................................23
2.2.2 Subclock setting ............................................................................................................................... 24
2.3 Illegal Access Detection ROM Setting ........................................................................................................ 25
2.4 CPU Operation Voltage Range Switching Setting .....................................................................................25
2.5 Address Output Setting of Separate Bus ................................................................................................... 26
CHAPTER 3 FACTORY SETTINGS........................................................................................................27
CHAPTER 4 CAUTIONS .........................................................................................................................28
4.1 VDD and PORTVDD of Target System............................................................................................................ 28
4.2 I/O Signal ....................................................................................................................................................... 29
4.3 VPP Signal ......................................................................................................................................................29
4.4 NMI Signal Mask Function ........................................................................................................................... 29
CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT.... 30
APPENDIX PACKAGE DRAWINGS ........................................................................................................ 33
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7
LIST OF FIGURES
Figure No. Title Page
1-1 System Configuration ........................................................................................................................................12
1-2 Contents in Carton.............................................................................................................................................13
1-3 Accessories .......................................................................................................................................................14
1-4 Connection Between IE-703002-MC and IE-703089-MC-EM1..........................................................................16
1-5 Connection of IE-703089-MC-EM1 and SWEX-144SD-1..................................................................................18
2-1 IE-703089-MC-EM1...........................................................................................................................................20
2-2 SW5...................................................................................................................................................................26
4-1 Schematic Diagram of Power Supply Acquisition..............................................................................................28
4-2 I/O Signal Flow Path..........................................................................................................................................29
5-1 Equivalent Circuit of Emulation Circuit...............................................................................................................31
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User’s Manual U15776EJ1V0UM
LIST OF TABLES
Table No. Title Page
2-1 Main Clock Setting.............................................................................................................................................23
2-2 Subclock Setting................................................................................................................................................24
2-3 JP1 Setting in IE-703002-MC............................................................................................................................25
2-4 JP3 and JP4 Setting in IE-703002-MC.............................................................................................................. 25
2-5 SW5 Setting.......................................................................................................................................................26
User’s Manual U15776EJ1V0UM
9

CHAPTER 1 OVERVIEW

The IE-703089-MC-EM1 is an option board for the IE-703002-MC in-circuit emulator. By connecting the IE-
703089-MC-EM1 and IE-703002-MC, hardware and software can be debugged efficiently in system development
using the V850/SC1, V850/SC2, and V850/SC3.
In this manual, the basic setup procedure and switch settings of the IE-703002-MC when the IE-703089-MC-EM1
is connected are described. For the names and functions of the parts of the IE-703002-MC, and for the connection of
elements, refer to the IE-703002-MC User’s Manual (U11595E).

1.1 Hardware Configuration

Optional hardware
Separately-sold hardware
In-circuit emulator (IE-703002-MC)
Option board
(IE-703089-MC-EM1)
By adding this board, the IE-703002-MC can be used as in-circuit
emulator for V850/SC1, V850/SC2, and V850/SC3.
Separately-sold hardware
Note 2
Note 2
Note 1
General-purpose probe made by TOKYO ELETECH CORPORATION
This board is used to connect the IE-703002-MC to a personal
computer. This board is inserted in the expansion slot of the
personal computer.
IE-70000-PC-IF-C: For IBM PC/AT
IE-70000-98-IF-C: For PC-9800 series C bus
Probe SWEX-144SD-1
PC interface board
IE-70000-PC-IF-C
IE-70000-98-IF-C
IE-70000-PCI-IF-A
IE-70000-CD-IF-A
IE-70000-PCI-IF-A: For PCI bus
IE-70000-CD-IF-A: For PCMCIA socket
Network module
(IE-70000-MC-SV3)
Power adapter
This module is used when a workstation controls the IE-703002-MC
via Ethernet™.
AC adapter for in-circuit emulator made by NEC Corporation.
(IE-70000-MC-PS-B)
Notes 1. For further information, contact Daimaru Kogyo Co., Ltd.
Tokyo Electronics Department (TEL +81-3-3820-7112)
Osaka Electronics Department (TEL +81-6-6244-6672)
2. Cannot be used for PC98-NX series
TM
compatible ISA bus
10
User’s Manual U15776EJ1V0UM
CHAPTER 1 OVERVIEW

1.2 Features (When Connected to IE-703002-MC)

{ Maximum operating frequency: 20 MHz (at 5.0 V operation)
{ The following pins can be masked.
RESET, NMI, WAIT, HLDRQ
{ External bus interface
{ Connected to target system via following method:
• Attach a probe (sold separately) to the pod tip for connection
{ The dimensions of the IE-703089-MC-EM1 are as follows.
Parameter Value
Power consumption (max. value at 5.0 V supply voltage) 2.5 W (at 20 MHz operation frequency)
External dimensions
(Refer to
DRAWINGS
Weight 300 g
APPENDIX PACKAGE
)
Note 12.5 W when the IE-703002-MC is connected to the IE-703089-MC-EM1
Height 50 mm
Length 180 mm
Width 250 mm
Note

1.3 Function Specifications (When Connected to IE-703002-MC)

Parameter Specification
Emulation memory capacity
Coverage memory capacity for
execution/pass detection
Coverage memory capacity for
memory access detection
Coverage memory capacity for
branching entry number counting
Trace memory capacity 150 bits × 32 K frames
Time measurement function Measurement possible by time tag or 3 timers
Break function
Internal ROM 512 KB
External memory
Internal ROM 512 KB
External memory
External memory 1 MB
Internal ROM 512 KB
External memory
In ROMless mode 2 MB
When using iROM 1 MB
In ROMless mode 2 MB
When using iROM 1 MB
In ROMless mode 2 MB
When using iROM 1 MB
4-bit external trace possibleExternal logic probe
Event setting of trace/break possible
Event break
Step execution break
Forcible break
Fail safe break
Illegal access to peripheral I/O
Access to guard space
Write to ROM space
Caution Some of the functions may not be supported, depending on the debugger used.
User’s Manual U15776EJ1V0UM
11
CHAPTER 1 OVERVIEW

1.4 System Configuration

The system configuration when connecting the IE-703002-MC to the IE-703089-MC-EM1 and a personal computer
is shown below.
Figure 1-1. System Configuration
<14>
<13>
<15>
<4>
<3>
<1>, <2>
<5>
<9>
<8>
<12>
<6>
<11>
<7>
[Magnified drawing: Example of use of connector for target connection]
<10>
<11>
<12>
Remark
<1> Personal computer
<2> Debugger (ID850: Sold separately)
<3> PC interface board
(IE-70000-98-IF-C/IE-70000-PC-IF-C, IE-70000-PCI-IF-A/IE-70000-CD-IF-A: Sold separately)
<4> PC interface cable (included with IE-703002-MC)
<5> In-circuit emulator (IE-703002-MC: Sold separately)
<6> In-circuit emulator option board (IE-703089-MC-EM1: This product)
<7> External logic probe (included with IE-703002-MC)
<8> Socket for target connection (YQSOCKET144SDN: Sold separately)
<9> Probe (SWEX-144SD-1)
<10> Guide screw (YQGUIDE: Included)
<11> Connector for emulator connection (YQPACK144SD: Included)
<12> Connector for target connection (NQPACK144SD: Included)
<13> Power adapter (IE-70000-MC-PS-B: Sold separately)
<14> AC100V power cable (sold separately: Included with IE-70000-MC-PS-B)
<15> AC220V power cable (sold separately: Included with IE-70000-MC-PS-B)
Target system
Target system
12
User’s Manual U15776EJ1V0UM
CHAPTER 1 OVERVIEW

1.5 Contents in Carton

The carton of the IE-703089-MC-EM1 contains the main unit, guarantee card, packing list, and accessory bag.
Make sure that the accessory bag contains this manual and the connector accessories. If there are missing or
damaged items, please contact an NEC sales representative or an NEC distributor.
Return the guarantee card included in the carton after filling in all the items.
Figure 1-2. Contents in Carton
<1> IE-703089-MC-EM1
<4> Packing list
<3> Guarantee card
<2> Accessory bag
<1> IE-703089-MC-EM1 × 1
<2> Accessory bag × 1
<3> Guarantee card × 1
<4> Packing list × 1
Users Manual U15776EJ1V0UM
13
CHAPTER 1 OVERVIEW
Check that the accessory bag contains this manual, an accessory list (× 1), and the following accessories.
(a) Spacers × 4
(b) SEMS screws × 4
Figure 1-3. Accessories
(a) Spacers (b) SEMS screws
14
Users Manual U15776EJ1V0UM
CHAPTER 1 OVERVIEW

1.6 Connection Between IE-703002-MC and IE-703089-MC-EM1

The procedure for connecting the IE-703002-MC and IE-703089-MC-EM1 is described below.
Caution Connect carefully so as not to break or bend connector pins.
<1> Remove the pod cover (lower) of the IE-703002-MC.
<2> Set the PGA socket lever of the IE-703089-MC-EM1 to the OPEN position as shown in Figure 1-4 (b).
<3> Connect the IE-703089-MC-EM1 to the PGA socket at the back of the IE-703002-MC pod (refer to Figure 1-4
(c)). When connecting, position the IE-703002-MC and IE-703089-MC-EM1 so that they are horizontal.
<4> Set the PGA socket lever of the IE-703089-MC-EM1 to the CLOSE position as shown in Figure 1-4 (b).
<5> When connecting the probe (SWEX-144SD-1) to the IE-703089-MC-EM1, attach it to CN1 on the rear of the
IE-703089-MC-EM1, aligning each pin 1 (refer to Figure 1-5).
<6> Place the supplied spacers in the four corner holes of the IE-703089-MC-EM1. Fix the spacers with the
supplied SEMS screws.
<7> Fix the IE-703002-MC pod cover (upper) with nylon rivets.
User’s Manual U15776EJ1V0UM
15
CHAPTER 1 OVERVIEW
Figure 1-4. Connection Between IE-703002-MC and IE-703089-MC-EM1 (1/2)
(a) Overview
Nylon rivets
Upper cover
Nylon rivets
IE-703002-MC
CLOSE
SEMS screw
IE-703089-MC-EM1
Spacer
(b) PGA socket lever of IE-703089-MC-EM1
OPEN
16
Users Manual U15776EJ1V0UM
CHAPTER 1 OVERVIEW
Figure 1-4. Connection Between IE-703002-MC and IE-703089-MC-EM1 (2/2)
(c) Connecting part (CN2 of IE-703089-MC-EM1)
Pin A1 position
: Insertion guide
: IE-703002-MC insertion area
User’s Manual U15776EJ1V0UM
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CHAPTER 1 OVERVIEW
Figure 1-5. Connection of IE-703089-MC-EM1 and SWEX-144SD-1
CN1
IE-703089-MC-EM1
1
Mount on the rear
1
SWEX-144SD-1
18
Users Manual U15776EJ1V0UM

CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS

This chapter describes the names, functions, and switch settings of components in the IE-703089-MC-EM1.
For the details of the pod, jumper, and switch positions, etc., refer to the IE-703002-MC User’s Manual
(U11595E).
User’s Manual U15776EJ1V0UM
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CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS

2.1 Component Names and Functions of IE-703089-MC-EM1

Figure 2-1. IE-703089-MC-EM1
<Top view>
Connector for target connection (rear)
Direction of pin 1 of connector for target connection
CN1
SW4
ADCV
PORTV
PORTV
PORTV
JP1 SW1
JP2 SW2
JP3 SW3
JP4
OSC1
JP5JP6SW5
DD
DD2
DD1
DD0
V
DD
LED5
LED4
LED3
LED2
LED1
OSC2
VER.1.
20
Connector for
IE-703002-MC
connection
User’s Manual U15776EJ1V0UM
CN2
IE-703089-MC-EM1
No.
CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
(1) OSC1
OSC1 is a socket for the main clock crystal oscillator and for mounting capacitors. (For details, refer to 2.2.1
Main clock setting).
(2) JP5
JP5 is a jumper to switch the main clock supply source. (For details, refer to 2.2.1 Main clock setting.)
(3) OSC2
OSC2 is a socket for the main clock crystal oscillator and for mounting capacitors. (For details, refer to 2.2.2
Subclock setting.)
(4) JP6
JP6 is a jumper to switch the subclock supply source. (For details, refer to 2.2.2 Subclock setting.)
(5) JP1
Reserved. Use this jumper with the factory setting (2-3 shorted).
(6) SW1
Reserved. Use this switch with the factory setting (3-6 side).
(7) JP2
Reserved. Use this jumper with the factory setting (2-3 shorted).
(8) SW2
Reserved. Use this switch with the factory setting (3-6 side).
(9) JP3
Reserved. Use this jumper with the factory setting (2-3 shorted).
(10) SW3
Reserved. Use this switch with the factory setting (3-6 side).
(11) JP4
Reserved. Use this jumper with the factory setting (2-3 shorted).
(12) SW4
Reserved. Use this switch with the factory setting (3-6 side).
(13) SW5
SW5 is a switch to output the addresses (A1 to A15) of the separate bus. (For details, refer to 2.5 Address
Output Setting of Separate Bus.)
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21
CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
(14) LED1 to LED5
Lit: Power is supplied by the target system.
Not lit: Power is supplied by the power supply inside the emulator.
LED1: VDD
LED2: PORTV
LED3: PORTV
LED4: PORTV
LED5: ADCV
DD0
DD1
DD2
DD
(15) Connector for IE-703002-MC connection (CN2)
CN2 is a connector to connect the IE-703089-MC-EM1 to the IE-703002-MC.
(16) Connector for target connection (CN1)
CN1 is a connector to connect the IE-703089-MC-EM1 to the probe.
22
User’s Manual U15776EJ1V0UM
CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS

2.2 Clock Settings

This section describes the clock settings.
For the position of OSC1 and JP5 in the IE-703089-MC-EM1, refer to Figure 2-1.
For the jumper and switch positions in the IE-703002-MC, refer to the IE-703002-MC User’s Manual (U11595E).

2.2.1 Main clock setting

Table 2-1. Main Clock Setting
IE-703089-MC-EM1 Setting IE-703002-MC SettingEmulator Usage
OSC1 JP5 SW1 SW2 JP2
ON OFF
1
2
17
(Oscillator mounted)
7
8
(3-4 shorted: Fixed)
Environment
When using
emulator as
standalone unit
When using
emulator with
Clock Supply
Method
Internal clock
Internal clock
target system
Caution Emulation cannot be performed by inputting a clock from the target system.
The specifications of OSC1 are as follows.
V850/SCx
I/O
chip
X1
1 M
GND
1
X2
GND
7
7
8
1
2
10 pF 20 MHz
User’s Manual U15776EJ1V0UM
10 pF
23

2.2.2 Subclock setting

CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS
Table 2-2. Subclock Setting
IE-703089-MC-EM1 SettingEmulator Usage
Note 2
Environment
When using emulator as
Clock Supply Method
Internal clock
Note 1
OSC2
standalone unit
When using emulator with
target system
Internal clock
Note 1
17
(Oscillator mounted)
Notes 1. A clock input by an oscillator cannot be used for the internal clock.
2. To use a subclock frequency other than 32.768 kHz, remove the resonator on OSC2 and mount an
oscillator.
The specifications of OSC2 are as follows.
V850/SCx
I/O chip
XT2 XT1
GND
1
27 pF 32.768 kHz727 pF
GND
JP6
7
8
(3-4 shorted: Fixed)
1
2
Caution Emulation cannot be performed by inputting a clock from the target system.
24
User’s Manual U15776EJ1V0UM
CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS

2.3 Illegal Access Detection ROM Setting

If using the IE-703002-MC for an in-circuit emulator for the V850/SCx by connecting the IE-703089-MC-EM1, set
JP1 of the IE-703002-MC as follows.
Table 2-3. JP1 Setting in IE-703002-MC
JP1 Description
Note
Open
Illegal access detection ROM (mounted on IE-703089-MC-EM1) for V850/SCx is
used.
Note When JP1 is set to open, keep the removed jumper contact attached to one
JP1
pin as shown in the drawing on the right.
Jumper contact

2.4 CPU Operation Voltage Range Switching Setting

If using the IE-703002-MC for an in-circuit emulator for the V850/SCx by connecting the IE-703089-MC-EM1, set
JP3 and JP4 of the IE-703002-MC as follows.
Table 2-4. JP3 and JP4 Setting in IE-703002-MC
JP3, JP4 Description
JP3
JP4
1
2
(Shorted)
1
2
3
(Open)
The operation voltage range of the IE-703002-MC is 3.0 to 5.5 V.
The power supply for PORTVDD is generated on the IE-703089-MC-EM1.
Users Manual U15776EJ1V0UM
25
CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS

2.5 Address Output Setting of Separate Bus

When using the separate bus function while debugging using the IE-703089-MC-EM1, switching to the separate
bus output function is not possible by setting the memory address output register (MAM) by software.
Use DIP switch SW5 to output the address of the separate bus function while debugging using the IE-703089-MC-
EM1.
The switches of SW5 and their corresponding ports are shown in Table 2-5.
Figure 2-2. SW5
163425
ON
OFF
Table 2-5. SW5 Setting
Switch Setting Selection of Alternate-Function Pin
ON P113 to P110 (port mode)1
OFF A4 to A1 output to P113 to P110 (memory address output function of separate bus)
ON P103 to P100 (port mode)2
OFF A8 to A5 output to P103 to P100 (memory address output function of separate bus)
ON P107 to P104 (port mode)3
OFF A12 to A9 output to P107 to P104 (memory address output function of separate bus)
ON P34 (port mode)4
OFF A13 output to P34 (memory address output function of separate bus)
ON P35 (port mode)5
OFF A14 output to P35 (memory address output function of separate bus)
ON P33 (port mode)6
OFF A15 output to P33 (memory address output function of separate bus)
26
User’s Manual U15776EJ1V0UM

CHAPTER 3 FACTORY SETTINGS

Item Description Remark
OSC1
OSC2
JP1 to JP4
GND
GND
V850/SCx
I/O chip
X1 X2
1 M
1
10 pF 20 MHz
V850/SCx
I/O chip
XT2 XT1
1
27 pF 32.768 kHz727 pF
123
(2-3 shorted)
10 pF
Pins 1 and 2: For mounting capacitor (10 pF)
Pins 6 and 7: For mounting capacitor (10 pF)
Pins 3 to 5: Crystal oscillator (20 MHz)
Pin 4: Open
20 MHz clock supplied for main clock
GND
7
Pins 1 and 2: For mounting capacitor (27 pF)
Pins 6 and 7: For mounting capacitor (27 pF)
Pins 3 to 5: Crystal oscillator (32.768 MHz)
Pin 4: Open
32.768 MHz clock supplied for subclock
GND
Pins 2 and 3: Short
Pin 1: Open
Use these jumpers with the factory settings.
JP5, JP6
SW1 to SW4
SW5
7
8
1
2
(3-4 shorted)
Pins 1 and 2: Open
Pins 3 and 4: Shorted
Pins 5 and 6: Open
Pins 7 and 8: Open
Use these jumpers with the factory settings.
1
3
3-6 side
Use these switches with the factory settings.
4
ON
OFF
6
(3-6 side)
163425
All bits ON (port mode)
User’s Manual U15776EJ1V0UM
27

CHAPTER 4 CAUTIONS

4.1 V
and PORTVDD of Target System
DD
(1) VDD in the target system is used to sense the level for target system power supply ON/OFF.
When VDD is lower than 3.5 V, it is judged that the target system is not connected, and mapping of the
target memory cannot be performed with a debugger (FCAN cannot be used).
When VDD is 3.5 V or higher, it is judged that the target system is connected, and mapping of the target
memory can be performed with a debugger (FCAN can be used).
(2) PORTV
(n = 0 to 2) in the target system is not supplied directly to the emulator chip; it is connected to the
DDn
target voltage emulation circuit.
When PORTV
When PORTV
is lower than 3.3 V, VCC (5 V) in the internal emulator is supplied to the emulator chip.
DDn
is 3.3 V or higher, a voltage of the same potential as PORTV
DDn
in the target system is
DDn
generated and supplied to the emulator chip.
Figure 4-1. Schematic Diagram of Power Supply Acquisition
IE-703089-MC-EM1 IE-703002-MC
ON/OFF?
Target system
DD0
V
PORTV
DDn
(n = 0 to 2)
Target voltage
emulation
VCC (5 V)
Relay
V850/SC3
I/O chip
Relay n
(n = 0 to 2)
VCC (5 V)
Target voltage emulation n
(n = 0 to 2)
Evaluation
chip
28
User’s Manual U15776EJ1V0UM
CHAPTER 4 CAUTIONS
(3) The V
(4) The following conditions must be satisfied when other than V
1. When FCAN is used, PORTV
signal from the target system is left open in the IE-703089-MC-EM1.
DD1
= V
DD0
DD1
PORTV
DD1
(restricted by the power supply voltage conditions of the in-
DD2
= ADCVDD = PORTV
= PORTV
DD1
DD2
.
circuit emulator)
2. When ADC is used, V
= ADCVDD = 4.5 to 5.5 V
DD0

4.2 I/O Signal

The input signal (NMI signal) from the target system, the I/O signals for ports 4, 5, 6, and 11, and the I/O signal for
port 9 are all delayed (tPD = 0.25 ns (typ.)) because they pass through Q switches QS3125, QS3384, and QS3244,
respectively, before being input to the emulator chip.
The DC characteristics also change. The input voltage becomes VIH = 2.0 V (MIN.), VIL = 0.8 V (MAX.), and the
input current becomes IIN = ±0.5 µA (MAX.).
Figure 4-2. I/O Signal Flow Path
IE-703089-MC-EM1
NMI signal
Target
system
Port signal
NMI pin QS3125
Port pin
QS3384/
QS3244
Emulator chip

4.3 VPP Signal

The VPP signal from the target system is left open in the emulator.

4.4 NMI Signal Mask Function

When using the P00/NMI pin in the port mode, do not mask the NMI signal.
User’s Manual U15776EJ1V0UM
29

CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT

Differences between the signal lines of the target device and the signal lines of the IE-703089-MC-EM1 target
interface circuit are described in this chapter.
The target device is a CMOS circuit, whereas the target interface circuit of the IE-703089-MC-EM1 is configured
with an emulation circuit such as a gate array TTL or CMOS-IC.
When debugging the IE system connected to the target system, the IE system emulates as if the real target device
is operating on the target system.
Small differences occur however, because the IE system is emulating actual operation.
(1) Signals input/output to/from the emulation gate array
P47 to P40
P57 to P50
P67 to P60
P97 to P90
P117 to P110
P133 to P130
(2) Other signals
P07 to P00
P17 to P10
P27 to P20
P37 to P30
P77 to P70
P83 to P80
P107 to P100
P127 to P120
P147 to P140
P157 to P150
P176 to P170
V
DD0
PORTVDD0
, PORTV
, PORTV
DD1
DD2
, ADCV
DD
CLKOUT
RESET
VDD1
MODE/VPP
CPUREG
X1, X2, XT1, XT2
GND0, GND1, GND2, PORTGND0, PORTGND1, ADCGND
Figure 5-1 shows the signals in (1) and (2) above in the circuit for the IE system.
30
User’s Manual U15776EJ1V0UM
CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
Figure 5-1. Equivalent Circuit of Emulation Circuit (1/2)
IE system sideProbe side
P00, P36 to P34
P07 to P01, P17 to P10, P27 to P20, P37 to P30, P77 to P70, P83 to P80, P127 to P120, P147 to P140, P157 to P150, P176 to P170
P107 to P100
QS3125
QS3257
PORTV
DD0
IN/OUT
IN/OUT
IN/OUT
µ
PD70F3089Y
emulation
CPU
P47 to P40, P57 to P50
P67 to P60
P96 to P90
P113 to P110
QS3244
VHC244
QS3244
QS3384
QS3257
QS3244
VHC125
PORTV
VHC125
PORTV
VHC125
PORTV
VHC125
PORTV
VHC125
PD703091
µ
DD0
DD0
DD1
DD1
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
OR3T125
(FPGA)
P117 to P114
P133 to P130
PORTV
DD2
VHC125
User’s Manual U15776EJ1V0UM
IN
OUT
IN
31
CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
Figure 5-1. Equivalent Circuit of Emulation Circuit (2/2)
V
PORTV
3.5 V
CC
100
V
DD0
100 F
µ
1 M
PC339
µ
Relay
V
3.3 V
CC
100
DD0
100 F
µ
1 M
PC393
µ
V
DD
IE system sideProbe side
LED
PD70F3089Y
µ
emulation CPU
LED
PORTV
DD1
PORTV
DD2
ADCV
CLKOUT, RESET
DD1
DD2
DD
Internal power
supply circuit
LED
PD70F3089Y
µ
emulation CPU
LED
PD70F3089Y
µ
emulation CPU
PD703091
µ
Relay
PC741
µ
V
3.3 V
CC
100
PC339
µ
100 F
µ
1 M
PORTV PORTV
3.3 V
Relay
V
CC
100
DD
100 F
µ
1 M
RELEY
PC393
µ
ADCV
emulation CPU
V
DD1
, MODE, CPUREG,
X1, X2, XT1, XT2
GND0, GND1, GND2, PORTGND0, PORTGND1, ADCGND
32
Open
Users Manual U15776EJ1V0UM

APPENDIX PACKAGE DRAWINGS

IE-703002-MC + IE-703089-MC-EM1 (Unit: mm)
571
103166
302
9027
IE-703002-MC
58.8
IE-703089-MC-EM1
Top view
Pin 1 direction
Side view
50
Bottom view
180
User’s Manual U15776EJ1V0UM
33.0
Top view
33.0
33
[MEMO]
34
Users Manual U15776EJ1V0UM
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