NEC UPD78P4916GF-3BA Datasheet
DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD78P4916
16-BIT SINGLE-CHIP MICROCONTROLLER
The µPD78P4916 is one of the µPD784915 subseries in the 78K/IV Series microcontrollers which incorporate
a high-speed and high-performance 16-bit CPU.
The µPD78P4916 replaces mask ROM with one-time PROM and increases on-chip ROM and RAM capacity
µ
compared to the
It is suitable for evaluation at system development and for small quantity production.
Detailed descriptions of functions are provided in the following user's manuals. Be sure to read these
documents when designing.
PD784915.
µ
PD784915 Subseries User’s Manual – Hardware : U10444E
78K/IV Series User's Manual – Instruction : U10905E
FEATURES
High-speed instruction execution using 16-bit CPU core
• Minimum instruction execution time: 250 ns (at 8-MHz internal clock)
On-chip high capacity memory
• PROM : 62 Kbytes
• RAM : 2048 bytes
Note It is possible to change the capacity of the internal PROM and the internal RAM by specifying the internal
memory capacity select (IMS) register.
ORDERING INFORMATION
Part Number Package
µ
PD78P4916GF-3BA 100-pin plastic QFP (14 × 20 mm)
Note
Note
The information in this document is subject to change without notice.
Document No. U11045EJ1V0DS00 (1st edition)
Date Published April 1996 P
Printed in Japan
The mark * shows major revised points.
©
1996
78K/IV Series Products
µ
PD78138
Subseries
78K/I Series
µ
PD78148
Subseries
Enhanced peripheral
hardware
78K/IV Series
µ
PD78P4916
PD784915
m
PD784915
µ
Subseries
Subseries
High-performance 16-bit CPU core
High-speed operation
On-chip analog circuit for VCR
2
µ
PD78P4916
Function List (1/2)
Item Function
Internal PROM capacity 62 Kbytes
Internal RAM capacity 2048 bytes
Operation clock 16 MHz (Internal clock: 8 MHz)
Low frequency oscillation mode: 8 MHz (Internal clock: 8 MHz)
Low power consumption mode: 32.768 kHz (Subsystem clock)
Minimum instruction execution time
I/O ports Total: 54 Input: 8
Real-time output port 11 (including 3 outputs each for Pseudo-VSYNC, Head amplifier switch, and Chromi-
Super Timer/counter Timer/counter Compare register Capture register Remark
timer
unit
Capture register Input signal Number of bits Measurement cycle Operation edge
Special circuit for VCR • VSYNC separator, HSYNC separator
General purpose timer Timer Compare register Capture register
PWM output • 16-bit precision: 3 channels (Carrier frequency: 62.5 kHz)
Serial interface 3-wire serial I/O: 2 channels
A/D converter 8-bit resolution × 12 channels, conversion time: 10 µs
250 ns (at 8-MHz internal clock)
nance rotate)
TM0 (16-bit) 3 –
TM1 (16-bit) 3 1
FRC (22-bit) – 6
TM3 (16-bit) 2 1
• VISS detector, Wide-aspect detector
• Field identifier
• Head amplifier switch/chrominance rotate output circuit
TM2 (16-bit) 1 –
TM4 (16-bit) 1 (Capture/compare) 1
TM5 (16-bit) 1 –
• 8-bit precision: 3 channels (Carrier frequency: 62.5 kHz)
• BUSY/STRB control available (only 1 channel)
Note
Note
I/O: 46
UDC (5-bit) 1 –
EC (8-bit) 4 –
EDV (8-bit) 1 –
CFG 22 125 ns to 524 ms ↑↓
DFG 22 125 ns to 524 ms ↑
HSW 16 1 µs to 65.5 ms ↑↓
VSYNC 22 125 ns to 524 ms ↑
CTL 16 1 µs to 65.5 ms ↑↓
TREEL 22 125 ns to 524 ms ↑↓
SREEL 22 125 ns to 524 ms ↑↓
Generates HSW signal
Divides CFG signal
Note It is possible to change the capacity of the internal PROM and the internal RAM by specifying the internal
memory capacity select (IMS) register.
3
Function List (2/2)
Item Function
Analog unit • CTL amplifier
• RECCTL driver (supports re-write operation)
• DFG amplifier, DPG comparator, CFG amplifier
• DPFG separator (Three-value)
• Reel FG comparator (2 channels)
• CSYNC comparator
Interrupt Programmable 4 levels, vectored interrupt, macro service, context switching
External 9 (including NMI)
Internal 19 (including software interrupt)
*
Standby function HALT mode/STOP mode
Low-power consumption mode: HALT mode
Release from STOP mode by NMI pin’s active edge, Watch interrupt (INTW), or
INTP1/INTP2/KEY0-KEY4 pins’ input.
Watch function 0.5-sec interval, capable of low-voltage operation (VDD = 2.7 V)
*
Power supply voltage VDD = 2.7 to 5.5 V
Package 100-pin plastic QFP (14 × 20 mm)
µ
PD78P4916
4
Pin Configuration (Top View)
(1) Normal Operation Mode
• 100-pin plastic QFP (14 × 20 mm)
µ
PD78P4916GF-3BA
µ
PD78P4916
P64
P65/HWIN
P66/PWM4
P67/PWM5
P60/STRB/CLO
P61/SCK1/BUZ
P62/SO1
P63/SI1
PWM0
PWM1
SCK2
SO2
SI2/BUSY
V
XT1
XT2
V
X2
X1
RESET
IC
PTO02
PTO01
PTO00
P87/PTO11
P86/PTO10
P85/PWM3
P84/PWM2
P83/ROTC
P82/HASW
DD1AVSS1
CSYNCIN
REEL0IN/INTP3
REEL1IN
DFGIN
DPGIN
CFGCPIN
CFGAMPO
CFGIN
AV
VREFC
CTLOUT2
CTLOUT1
CTLIN
RECTTL–
100
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DD
15
16
17
SS
18
19
20
21
22
23
24
25
26
27
28
29
30
SS2
RECTTL+
CTLDLY
AV
ANI11
ANI10
81828384858687888990919293949596979899
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
5049484746454443424140393837363534333231
ANI9
ANI8
P77/ANI7
P76/ANI6
P75/ANI5
P74/ANI4
P73/ANI3
P72/ANI2
P71/ANI1
P70/ANI0
REF
AV
AV
DD2
P96
P95/KEY4
P94/KEY3
P93/KEY2
P92/KEY1
P91/KEY0
P90/ENV
NMI
INTP0
INTP1
INTP2
P00
P01
P02
P03
P04
P05
P06
SS
DD
V
P80
P57
P56
P55
P54
P53
P52
P51
P50
V
P47
P46
Caution Connect the IC (Internally Connected) pin to V
P45
P44
P43
P42
SS directly.
P41
P40
P07
5
µ
PD78P4916
ANI0-ANI11 : Analog Input P00-P07 : Port0
AV
DD1, AVDD2 : Analog Power Supply P40-P47 : Port4
SS1, AVSS2 : Analog Ground P50-P57 : Port5
AV
REF : Analog Reference Voltage P60-P67 : Port6
AV
BUSY : Serial Busy P70-P77 : Port7
BUZ : Buzzer Output P80, P82-P87 : Port8
CFGAMPO : Capstan FG Amplifier Output P90-P96 : Port9
CFGCPIN : Capstan FG Capacitor Input PTO00-PTO02, : Programmable Timer Output
CFGIN : Analog Unit Input PTO10, PTO11
CLO : Clock Output
CSYNCIN : Analog Unit Input
CTLDLY : Control Delay Input
PWM0 - PWM5 : Pulse Width Modulation Output
RECCTL+, RECCTL–
REEL0IN, REEL1IN
: RECCTL Output/PBCLT Input
: Analog Unit Input
CTLIN : CTL Amplifier Input Capacitor RESET : Reset
CTLOUT1, CTLOUT2
: CTL Amplifier Output ROTC : Chrominance Rotate Output
DFGIN : Analog Unit Input SCK1, SCK2 : Serial Clock
DPGIN : Analog Unit Input SI1, SI2 : Serial Input
ENV : Envelope Input SO1, SO2 : Serial Output
HASW : Head Amplifier Switch Output STRB : Serial Strobe
HWIN : Hardware Timer External Input V
DD : Power Supply
IC : Internally Connected VREFC : Reference Amplifier Capacitor
INTP0-INTP3 : Interrupt From Peripherals Vss : Ground
KEY0-KEY4 : Key Return X1, X2 : Crystal (Main System Clock)
NMI : Nonmaskable Interrupt XT1, XT2 : Crystal (Subsystem Clock)
6
(2) PROM Programming Mode
• 100-pin plastic QFP (14 × 20 mm)
µ
PD78P4916GF-3BA
µ
PD78P4916
PGM
(L)
OPEN
(L)
V
OPEN
OPEN
RESET
IC/V
OPEN
(L)
OE
CE
V
V
V
SS
DD
(L)
100
99 9897 96959493 92919089 8887 86858483 8281
1
(L)
OPEN
(L)
OPEN
OPEN
V
V
2
3
4
5
6
7
8
9
10
11
12
13
14
DD
15
SS
16
17
SS
18
19
SS
20
21
PP
22
23
24
25
26
27
28
29
30
31 3233 34353637 3839 40 4142 4344 4546 4748 4950
(L)
SS
V
OPEN
(L)
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
V
D0
D1
D2
D3
D4
D5
D6
(L)
DD
(L)
A9
(L)
(L)
A15
A14
A13
A12
A11
A10
A16
A7A6A5A4A3A2A1
A8
V
V
A0
D7
SS
DD
Cautions (L) : Connect to VSS via pull-down resistors individually.
V
SS : Connect to ground.
OPEN : Leave this pin unconnected.
RESET : Apply low level.
A0 - A16 : Address Bus RESET : Reset
D0 - D7 : Data Bus V
CE : Chip Enable V
OE : Output Enable V
DD : Power Supply
PP : Programming Power Supply
SS : Ground
PGM : Program
7
Internal Block Diagram
µ
PD78P4916
NMI
INTP0 -
INTP3
PWM0 -
PWM5
PTO00 -
PTO02
PTO10,
PTO11
VREFC
REEL0IN
REEL1IN
CSYNCIN
DFGIN
DPGIN
CFGIN
CFGAMPO
CFGCPIN
CTLOUT1
CTLOUT2
CTLIN
RECCTL+
RECCTL–
CTLDLY
AV
DD1, AVDD2
AVSS1, AVSS2
AVREF
ANI0 - ANI11
Interrupt
Control
Super Timer
Unit
Analog Unit
&
A/D Converter
78K/IV
16-bit CPU Core
(RAM 512 bytes)
System
Control
Clock Output
Buzzer Output
Key Input
Real-Time
Output Port
VDD
VSS
X1
X2
XT1
XT2
RESET
D0 - D7
A0 - A16
CE
OE
PGM
VPP
CLO
BUZ
KEY0 - KEY4
P00 - P07
P80, P82, P83
Used in PROM
programming
mode
SI1
SO1
SCK1
SI2/BUSY
SO2
SCK2
STRB
Serial
Interface 1
Serial
Interface 2
RAM
1536
bytes
62
ROM
Kbytes
Port0
Port4
Port5
Port6
Port7
Port8
Port9
P00 - P07
P40 - P47
P50 - P57
P60 - P67
P70 - P77
P80, P82 - P87
P90 - P96
8
System Configuration Example
• Camcorder
Drum motor
Capstan motor
M
M
Driver
Driver
DFG
DPG
CFG
DFGIN
DPGIN
PWM0
CFGIN
PWM1
µ
PD78P4916
PORT
PORT
PORT
SCK1
SI1
SO1
INTP0
µ
PD78P4916
Key matrix
INTP0
Microcontroller
SCK
SO
SI
PORT
for camera
control
µ
PD78356
CTL head
Loading motor
Audio-video
signal
processor
Signals from
remote controller
Driver
Composite sync signal
Video head switch
Audio head switch
Pseudo-vertical sync signal
Remote control
receive signal
PC2800A
µ
RECCTL+
RECCTL–
PWM2M
PORT
CSYNCIN
PTO00
PTO01
P80
INTP2
X1 X2 XT1 XT2
16 MHz 32.768 kHz
PORT
SCK2
SO2
BUSY
PORT
STRB
PORT
Camera block
CS
CLK
DATA
BUSY
LCD display panel
CS
CLK
DATA
BUSY
STB
Mechanical block
LCD C/D
PD7225
µ
OSD
PD6456
µ
9
• Deck-type VCR
Drum
motor
µ
PD78P4916
PD78P4916
µ
DFG
DPG
M
Driver
DFGIN
DPGIN
PWM0
PORT
SCK1
SI1
SO1
STB
CLK
DOUT
DIN
TM
FIP C/D
PD16311
µ
Capstan
motor
CTL
head
Loading
motor
Reel
motors
CFG
M
M
M
M
Driver
Driver
Reel FG0
Driver
Driver
Reel FG1
CFGIN
PWM1
RECCTL+
RECCTL–
PWM2
REEL0IN
PWM3
PWM4
REEL1IN
Low-frequency
oscillation mode
X1 X2
PORT
SCK2
PORT
CSYNCIN
PTO00
PTO01
PWM5
PORT
PORT
INTP2
XT1
SO2
Composite
synchronous signal
Video head switch
Audio head switch
Pseudo-vertical
synchronous signal
P80
XT2
CS
CLK
DATA
Remote control
receive signal
FIP
Key matrix
OSD
PD6454
µ
PC2800A
µ
Audio-video
signal
processor unit
Tuner unit
Mechanical block
Signals from
remote controller
10
8 MHz 32.768 kHz
µ
PD78P4916
CONTENTS
1. DIFFERENCES BETWEEN µPD78P4916 AND µPD784915, µPD784916A ································· 12
2. PIN FUNCTION ································································································································· 13
2.1 Normal Operation Mode ····························································································································· 13
2.2 PROM Programming Mode (V
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins ························································· 16
3. INTERNAL MEMORY CAPACITY SELECT REGISTER (IMS) ··················································· 20
4. PROM PROGRAMMING ··················································································································· 21
4.1 Operation Mode ·········································································································································· 21
4.2 PROM Write Procedure ······························································································································ 23
4.3 PROM Read Procedure ······························································································································ 27
4.4 Screening One-time PROM Versions ······································································································· 27
PP ≥ 5 V, RESET = L) ·················································································· 15
*
5. ELECTRICAL SPECIFICATIONS ····································································································· 28
6. PACKAGE DRAWING ······················································································································ 46
7. RECOMMENDED SOLDERING CONDITIONS ················································································· 47
APPENDIX A. DEVELOPMENT TOOLS ····························································································· 48
APPENDIX B. SOCKET DRAWING AND RECOMMENDED FOOTPRINT ········································ 50
APPENDIX C. RELATED DOCUMENTS ···························································································· 52
*
*
*
11
µ
1. DIFFERENCES BETWEEN µPD78P4916 AND µPD784915, µPD784916A
*
Other than the memory types, their capacities, and memory-related points, the functions of the three devices are
µ
identical: the
784916A contain mask ROMs.
Table 1-1 shows the differences among these devices. Be sure to keep in mind these differences especially when
debugging and pre-producing the application system with the PROM version and then mass-producing it with the
mask-ROM version.
For the details about the CPU functions and on-chip hardware, refer to the
Manual—Hardware (U10444E).
PD78P4916 incorporates a one-time PROM that is rewritable by users, while the µPD784915 and
µ
PD784915 Subseries User’s
µ
Table 1-1. Differences among
PD784915 Subseries Devices
PD78P4916
Parameters
Internal ROM One-time PROM Mask ROM Mask ROM
Internal RAM 2048 bytes
Internal memory size select register (IMS) Provided Not provided Not provided
Pinouts Pins related to PROM writing and reading are provided on the µPD78P4916.
Other There are differences in noise immunity, noise radiation, and some electrical
Note The internal PROM and RAM capacities of the
size select register (IMS).
Caution There are differences in noise immunity and noise radiation between the PROM and mask-ROM
versions. When pre-producing the application set with the PROM version and then massproducing it with the mask-ROM version, be sure to conduct sufficient evaluations for the set
using consumer samples (not engineering samples) of the mask-ROM version.
µ
PD78P4916
62 Kbytes
specifications, because of the differences in circuit complexity and mask
layout.
Note
Note
µ
PD78P4916 can be changed through its internal memory
µ
PD784915
48 Kbytes 62 Kbytes
1280 bytes 1280 bytes
µ
PD784916A
12
2. PIN FUNCTION
2.1 Normal Operation Mode
(1) Port Pins
µ
PD78P4916
Pin Name Input/Output
P00 - P07 I/O Real-time 8-bit input/output port (Port0)
P40 - P47 I/O – 8-bit input/output port (Port4)
P50 - P57 I/O – 8-bit input/output port (Port5)
P60 I/O STRB/CLO 8-bit input/output port (Port6)
P61 SCK1/BUZ
P62 SO1
P63 SI1
P64 –
P65 HWIN
P66 PWM4
P67 PWM5
P70 - P77 Input ANI0 - ANI7 8-bit input port (Port7)
P80 I/O Real-time for Pseudo-VSYNC output 7-bit input/output port (Port8)
P82
P83 for ROTC output
P84 PWM2
P85 PWM3
P86 PTO10
P87 PTO11
P90 I/O ENV 7-bit input/output port (Port9)
P91 - P95 KEY0 - KEY4
P96 –
Alternate function
output port • Specifiable to input or output mode bitwise.
• With software-specifiable on-chip pull-up resistors
(P00 - P07).
• Specifiable to input or output mode bitwise.
• With software-specifiable on-chip pull-up resistors
(P40 - P47).
• Specifiable to input or output mode bitwise.
• With software-specifiable on-chip pull-up resistors
(P50 - P57).
• Specifiable to input or output mode bitwise.
• With software-specifiable on-chip pull-up resistors
(P60 - P67).
output port
for HASW output
• Specifiable to input or output mode bitwise.
• With software-specifiable on-chip pull-up resistors
(P90 - P96).
Description
• Specifiable to input or output
mode bitwise.
• With software-specifiable on-chip
pull-up resistors (P80, P82 - P87)
13
(2) Non-Port Pins (1/2)
µ
PD78P4916
Pin Name Input/Output
REEL0IN Input INTP3 Reel FG inputs
REEL1IN –
DFGIN – Drum FG, PFG input (Three-value)
DPGIN – Drum PG input
CFGIN – Capstan FG input
CSYNCIN – Composite SYNC input
CFGCPIN – CFG comparator input
CFGAMPO Output – CFG amplifier output
PTO00 Output – Programmable timer outputs of super timer unit
PTO01 –
PTO02 –
PTO10 P86
PTO11 P87
PWM0 Output – PWM outputs of super timer unit
PWM1 –
PWM2 P84
PWM3 P85
PWM4 P66
PWM5 P67
HASW Output P82 Head amplifier switch output
ROTC Output P83 Chrominance rotate output
ENV Input P90 Envelope input
SI1 Input P63 Serial data input (Serial interface channel 1)
SO1 Output P62 Serial data output (Serial interface channel 1)
SCK1 I/O P61/BUZ Serial clock input/output (Serial interface channel 1)
SI2 Input BUSY Serial data input (Serial interface channel 2)
SO2 Output – Serial data output (Serial interface channel 2)
SCK2 I/O – Serial clock input/output (Serial interface channel 2)
BUSY Input SI2 Serial busy input (Serial interface channel 2)
STRB Output P60/CLO Serial strobe output (Serial interface channel 2)
ANI0 - ANI7 Analog inputs P70 - P77 Analog inputs for A/D converter
ANI8 - ANI11 –
CTLIN – – CTL amplifier input capacitor
CTLOUT1 Output – CTL amplifier output
CTLOUT2 I/O – Logic input/CTL amplifier output
RECCTL+, RECCTL–
CTLDLY – – External time-constant connection (to rewrite RECCTL)
VREFC – – AC ground for VREF amplifier
NMI Input – Non-maskable interrupt request input
I/O – RECCTL output/PBCTL input
Alternate function
Description
14
(2) Non-Port Pins (2/2)
µ
PD78P4916
Pin Name Input/Output
INTP0 - INTP2 Input – External interrupt request input
INTP3 Input REEL0IN
KEY0 - KEY4 Input P91 - P95 Key input signal
CLO Output P60/STRB Clock output
BUZ Output P61/SCK1 Buzzer output
HWIN Input P65 Hardware timer external input
RESET Input – Reset input
X1 Input – Crystal resonator connection for main system clock oscillation
X2 –
XT1 Input – Crystal resonator connection for subsystem clock oscillation
XT2 –
AVDD1, AVDD2 – – Positive power supply for analog unit
AVSS1, AVSS2 – – GND for analog unit
AVREF – – Reference voltage input to A/D converter
VDD – – Positive power supply to digital unit
VSS – – GND of digital unit
IC – – Internally connected. Connect directly to V SS.
Alternate function
Description
Crystal resonator connection for clock oscillation of watch
2.2 PROM Programming Mode (VPP ≥ 5 V, RESET = L)
Pin name Input/output Function
VPP – Set PROM programming mode
High voltage applied at program write/verify operation
RESET Input Low level input for setting PROM programming mode
A0 - A16 Address input
D0 - D7 I/O Data input/output
PGM Input Program inhibit input in PROM programming mode
CE PROM enable input / programming pulse input
OE Read strobe input to PROM
VDD – Positive power supply
VSS GND potential
15
µ
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins
*
Table 2-1 shows the input/output circuit types of the device’s pins and the recommended connection
of the pins which are unnecessary to the user’s application. The circuit diagrams for the I/O circuits are
shown in Figure 2-1.
Table 2-1. Pin I/O Circuits and Recommended Connection of Unused Pins (1/2)
Pins I/O circuit types Direction Recommended connection of unused pins
P00-P07 5-A I/O Input mode: Connect to VDD.
P40-P47 Output mode: Leave unconnected.
P50-P57
P60/STRB/CLO
P61/SCK1/BUZ
P62/SO1 5-A
P63/SI1 8-A
P64 5-A
P65/HWIN 8-A
P66/PWM4 5-A
P67/PWM5
P70/ANI0-P77/ANI7 9 Input Connect to VSS.
P80 5-A I/O Input mode: Connect to VDD.
P82/HASW Output mode: Leave unconnected.
P83/ROTC
P84/PWM2
P85/PWM3
P86/PTO10
P87/PTO11
P90/ENV
P91/KEY0-P95/KEY4 8-A
P96 5-A
SI2/BUSY 2-A Input Connect to VDD.
SO2 4 Output High-impedance mode: Connect to VSS via a pull-down resistor.
SCK2
ANI8-ANI11 7 Input Connect to VSS.
RECCTL+, RECCTL– — I/O When ENCTL = 0 and ENREC = 0: Connect to VSS.
8-A
Otherwise: Leave unconnected.
8-A I/O Input mode: Connect to VDD.
Output mode: Leave unconnected.
PD78P4916
Remark ENCTL: Bit 1 of the amplifier control register (AMPC)
ENREC: Bit 7 of the amplifier mode register 0 (AMPM0)
16
µ
PD78P4916
Table 2-1. Pin I/O Circuits and Recommended Connection of Unused Pins (2/2)
Pins I/O circuit types Direction Recommended connection of unused pins
DFGIN — Input ENDRUM = 0: Connect to VSS.
DPGIN ENDRUM = 0, or ENDRUM = 1 and SELPGSEPA = 0:
Connect to VSS.
CFGIN, CFGCPIN ENCAP = 0: Connect to VSS.
CSYNCIN ENCSYN = 0: Connect to VSS.
REEL0IN/INTP3, REEL1IN
CTLOUT1 — Output Leave unconnected.
CTLOUT2 — I/O When ENCTL and ENCOMP = 0 and 0: Connect to VSS.
CFGAMPO — Output Leave unconnected.
CTLIN — — When ENCTL = 0: Leave unconnected.
VREFC When ENCTL, ENCAP, and ENCOMP = 0, 0, and 0:
CTLDLY Leave unconnected.
PWM0, PWM1 3 Output Leave unconnected.
PTO00-PTO02
NMI 2 Input Connect to VDD.
INTP0 Connect to VDD or VSS.
INTP1, INTP2 2-A Input Connect to VDD.
AVDD1, AVDD2 — — Connect to VDD.
AVREF, AVSS1, AVSS2 Connect to VSS.
RESET
XT1 — — Connect to VSS.
XT2 Leave unconnected.
IC Connect directly to VSS.
2——
ENREEL = 0: Connect to VSS.
ENCTL = 1: Leave unconnected.
Leave unconnected.
Remark ENDRUM: Bit 2 of the amplifier control register (AMPC)
SELPGSEPA: Bit 2 of the amplifier mode register 0 (AMPM0)
ENCAP: Bit 3 of the amplifier control register (AMPC)
ENCSYN: Bit 5 of the amplifier control register (AMPC)
ENREEL: Bit 6 of the amplifier control register (AMPC)
ENCTL: Bit 1 of the amplifier control register (AMPC)
ENCOMP: Bit 4 of the amplifier control register (AMPC)
17
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