The µPD16856 is a CD-ROM 3-phase spindle motor driver consisting of a CMOS controller and MOS bridge
outputs.
By employing 3-phase full-wave PWM as the drive method and MOS FETs at the output stage, it has been
possible to reduce the power consumption of the µPD16856 ever further than the conventional linear drive drivers
that use bipolar transistors.
By using a 30-pin shrink SOP package, a more compact-size has been achieved.
FEATURES
•Supply voltage for controller block: 5 V, supply voltage for output block: 12 V
3 V input available for the input interface
•Low on-state resistance (total on-state resistance of upper and lower MOS FETs) RON = 1.3 Ω (TYP.)
•Low power consumption due to 3-phase full-wave PWM drive method
•On-chip hole bias switch (linked with STB pin)
•On-chip IND (FG) pulse switching function, 1-phase output or 3-phase composite output
•START/STOP pin included, acting as a brake during STOP
•Standby pins included, turning off internal circuit in standby
•Low current consumption: IDD = 3 mA (Max.), IDD
•On-chip thermal shutdown circuit
•On-chip current limiting circuit; reference voltage can be set externally
•On-chip low voltage malfunction prevention circuit
•On-chip reverse rotation prevention circuit
•30-pin plastic shrink SOP (300 mil)
ORDERING INFORMATION
Part NumberPackage
µ
PD16856GS30-pin shrink SOP (0.8-mm pi t ch, 300 mil)
(ST)
= 1 µA (Max.)
Document No. S13447EJ1V0DS00 (1st edition)
Date Published April 1999 N CP(K)
Printed in Japan
The information in this document is subject to change without notice.
lower stage)
Leakage current during OFFIDR
Output turn-on timet
Output turn-off timet
R
ONH
OFFH
ON
(OFF)
IDR = 200 mA
A
T
= −20°C to +75°C
1.31.8
In standby10
RM = 5
Ω
Star connection
1.02.0
1.02.0
[Torque command]
Control reference input voltage rangeECR0.34.0V
Control input voltage rangeEC0.34.0V
Input currentI
Input voltage differenc eECR-EC
IN
Note
DUTY = 100%1.0V
3050
Dead zone (+)EC_d+1.5 V ≤ ECR ≤ 2.5 V050100mV
Dead zone (−)EC_d
1.5 V ≤ ECR ≤ 2.5 V0
−
50
−
100mV
−
[Overcurrent detection bl ock]
Input offset volt ageV
IO
15+15mV
−
A
µ
V
Ω
A
µ
Ω
A
µ
s
µ
s
µ
A
µ
Dead zone not included.
Note
Remarks 1.
The thermal shutdown circuit (T.S.D.) operates with T
The low-voltage malfunction prevention circuit (UVLO) operates with a voltage of 4 V