NEC UPC8131TA-E3, UPC8131TA, UPC8130TA-E3, UPC8130TA Datasheet
DATA SHEET
BIPOLAR ANALOG INTEGRATED CI RCUITS
µµµµ
PC8130TA,
µµµµ
PC8131TA
–15 dBm INPUT, VARIABLE GAIN AMPLIFIER SILICON MMIC
FOR TRANSMITTER AGC OF DIGITAL CELLULAR TELEPHONE
DESCRIPTION
The µPC8130TA and µPC8131TA are silicon monolithic integrated circuits designed as variable gain amplifier.
Due to 800 MHz to 1.5 GHz operation, these ICs are suitable for RF transmitter AGC stage of digital cellular
telephone. These ICs are lower distortion than conventional µPC8119T and µPC8120T so that –15 dBm input level
can be applied. These ICs also available in two types of gain control so you can choose either IC in accordance with
your system design. 3 V supply voltage and minimold package contribute to make your system lower voltage,
decreased space and fewer components.
The µPC8130TA and µPC8131TA are manufactured using NEC’s 20 GHz fT NESAT™III silicon bipolar process.
This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from
external pollution and prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.
FEATURES
• Recommended operating frequency: f = 800 MHz to 1.5 GHz
• Low distortion : P
• Supply voltage : VCC = 2.7 to 3.3 V
• Low current consumption : ICC = 11 mA TYP. @VCC = 3.0 V
• Gain control voltage : V
• Two types of gain control : µPC8130TA = V
• AGC control can be constructed by external control circuit.
• High-density surface mounting : 6 pin minimold package
adj
≤ –60 dBc MAX. @Pin = –15 dBm, ∆f = ±50 kHz, VCC = 3.0 V,
TA = +25 °C
AGC
= 0 to 2.4 V (recommended)
AGC
up vs. Gain up (Reverse control)
µPC8131TA = V
AGC
up vs. Gain down (Forward control)
APPLICATION
• 800 MHz to 900 MHz or 1.5 GHz Digital cellular telephone (PDC800M, PDC1.5G and so on)
ORDERING INFORMATION
Part Number Package Marking Supplying Form Gain Control Type
µ
PC8130TA-E3 C2Q Reverse control
µ
PC8131TA-E3 C2R Forward control
Remark
Document No. P11721EJ2V0DS00 (2nd edition)
Date Published October 1998 N CP(K)
Printed in Japan
To order evaluation samples, please contact your local NEC sales office.
(Part number for sample order:
6-pin minimold
Embossed tape 8 mm wide.
1, 2, 3 pins face to perforat i on side of the tape.
Qty 3 kp/reel.
PC8130TA, µPC8131TA)
µ
Caution Electro-static sensitive devices
The information in this document is subject to change without notice.
The mark shows major revised points.
.
1997©
PIN CONNECTIONS
µµµµ
PC8130TA,
µµµµ
PC8131TA
(Top View) (Bottom View)
3
2
16
4
5
4
5
61
C2Q
Marking is an example of µPC8130TA
3
2
Pin No. Pin Name
1 INPUT
2GND
3GND
4OUTPUT
5V
6V
CC
AGC
GAIN CONTROL AMPLIFIER PRODUCT LINE-UP
Part No. VCC (V) ICC (mA) V
µ
PC2723T 4.5 to 5.5 15 3.3 to 5.0 down up to 1.1 –4 –
µ
PC8119T 2.7 to 3.3 11 0.6 to 2.4 down 0.1 to 1.92 +3 ≤ –18 PHS, PDC
µ
PC8120T 2.7 to 3.3 11 0.6 to 2.4 up 0.1 to 1.92 +3 ≤ –18 PHS, PDC
µ
PC8130TA 2.7 to 3. 3 11 0.6 to 2.4 up 0.8 to 1.5 +5 ≤ –15 PDC 800 M, PDC 1.5 G
µ
PC8131TA 2.7 to 3. 3 11 0 to 2.4 down 0.8 to 1.5 +5 ≤ –15 PDC 800 M, PDC 1.5 G
Remark
Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail.
AGC
(V) V
To know the associated product, please refer to each latest data sheet.
AGC
vs.
up
Gain f (GHz) P
O (1 dB)Pin
(dBm) Features
SYSTEM APPLICATION EXAMPLE
This block diagram is an example of IF modulation digital cellular system.
The µPC8130TA and µPC8131TA are applicable for not only IF modulation system but also RF modulation
system. This diagram is intended to show the µPC8130TA and µPC8131TA location in the systems.
I
Q
I
Q
TX
RX
SW
PA
µ
PC8130TA
or
µ
PC8131TA
÷N
PLL
0 °
φ
90 °
DEMO
PLL
This document is to be specified for µPC8130TA and µPC8131TA only. For the other part number mentioned in
this document, please refer to the latest data sheet of each part number.
2
PIN EXPLANATION
µµµµ
PC8130TA,
µµµµ
PC8131TA
Pin
No.
Pin
Name
1 IN – 1.4 RF input pin. This pin should be
2
GND 0 − Ground pin. This pin should be
3
4 OUT voltage
5VCC2.7 to 3.3 – Supply voltage pin.
6V
AGC
Applied
Voltage
V
as same
CC
as V
through
external
inductor
0 to 3.3 − Gain control pin. The relation
Pin
Voltage
Note
V
− RF output pin. This pin is designed
Function and Applications Internal Equivalent Circ ui t
coupled with capacitor (eg 1000 pF)
for DC cut. Input return l o ss can be
improved with external impedance
matching circuit.
connected to system ground with
minimum inductance. Ground pattern on the board should be formed
as wide as possible. Ground pins
must be connected together wi th
wide ground pattern to decrease
impedance difference.
as open collector of high im pedance.
This pin must be externall y equipped
with matching circuits.
This pin must be equipped with
bypass capacitor (eg 1000 pF)
to minimize its RF i m pedance.
between product number and control
performance is shown below;
Part No. V
µ
PC8130TA up
µ
PC8131TA down
AGC
up vs. Gain
Control
circuit
6
5
4
1
Bias
circuit
2
3
GND
5
Control circuit
2
Pin voltage is measured at V
Note
CC
= 3.0 V.
3
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Conditions Ratings Unit
µµµµ
PC8130TA,
µµµµ
PC8131TA
Supply Voltage V
Total Circuit Current I
Input Power P
Gain Control Voltage V
Operating Ambient Temperature T
Storage Temperature T
CC
CC
AGC
stg
TA = +25 °C, Pin 4 and 5 3.6 V
TA = +25 °C, Pin 4 and 5 30 mA
in
TA = +25 °C +10 dBm
TA = +25 °C 3.6 V
A
–25 to +85 °C
–55 to +150 °C
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol MIN. TYP. MAX. Unit Remarks
Supply Voltage V
CC
2.7 3.0 3.3 V Same voltage should be applied to 4
and 5 pins.
Gain Control Voltage V
Input Level P
Operating Ambient Temperature T
AGC
0 – 2.4 V –0.5 ≤ I
in
A
– – –15 dBm
–25 +25 +85 °C
AGC
≤ 0.1 mA
adj
P
≤ –60 dBc @∆f = ±50 kHz
Operating Frequency f 800 – 1500 MHz With external output-matching
AGC Pin Drive Current I
Adjacent Channel Interference (P
Note
AGC
0.5 – – mA V
adj
) wave form condition: π/4DQPSK modulation signal, data rate = 42
AGC
≤ 3.3 V
kbps, rolloff ratio = 0.5, PN9 bits (pseudorandom pattern)
Note
4
µµµµ
PC8130TA,
µµµµ
PC8131TA
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, TA = +25 °C, VCC = V
External matched output port)
µ
PC8130TA
MIN. TYP. MAX. MIN. TYP. MAX.
G
CC
PMAX
No signal, ICC = I
f = 950 MHz, Pin = –20 dBm
f = 1440 MHz, P
GCR f = 950 MHz, Pin = –20 dBm
f = 1440 MHz, P
PMIN
G
f = 950 MHz, Pin = –20 dBm
f = 1440 MHz, P
adj
P
f = 950 MHz, Pin = –15 dBm
f = 1440 MHz, P
)
Circuit Current I
Maximum Power
Gain
Gain Control
Note1
Range
Minimum Power
Gain
Adjacent Channel
Interference
∆
f = ±50 kHz
(@
Note 2
Isolation ISL f = 950 MHz, G
f = 1440 MHz, G
1 dB Compression
Output Power
Input Return
Loss
O (1 dB)
P
RL
in
f = 950 MHz, G
f = 1440 MHz, G
f = 950 MHz, G
f = 1440 MHz, G
Noise Figure NF f = 950 MHz, G
f = 1440 MHz, G
Vcc
out
+ I
in
= –20 dBm
in
= –20 dBm4035
in
= –20 dBm
in
= –15 dBm
PMAX
PMAX
PMAX
PMAX
PMAX
PMAX
PMAX
PMAX
8.5 11 15 8.5 11 15 mA
10812.51115
9.5
14
17
20
+2
+2
3.5
6.5
–
–
–
–
–
–
50
41
–37
–30
–65
–65
20
25
+5
+5
6.5
10
11
8.51411.5
–
–
–
–
–60
–60
–
–
–
–
–
–
40
35
20
25
+2
+1
out
= 3.0 V, ZS = ZL = 50
µ
PC8131TA
121114.5
8
45
39
–
–33
–
–28
–
–65
–
–65
25
30
+5
+4
6
7
10.5
–
11
–
14
–
–
–
–
–60
–60
–
–
–
–
9
–
–
14
8
11
UnitTest ConditionsSymbolParameter
dB
dB
dB
dB
dB
dBm
dB
dB
,
ΩΩΩΩ
Notes 1.
2.
Remark
Gain Control Range (GCR) specification: GCR = G
ConditionsµPC8130TA: G
PC8131TA: G
µ
PMAX
PMAX
Adjacent Channel Interference (P
AGC
@ V
@ V
= VCC, G
AGC
= 0 V, G
adj
) wave form condition: π/4DQPSK modulation signal, data rate = 42
PMAX
PMIN
PMIN
@ V
kbps, rolloff ratio = 0.5, PN9 bits (pseudorandom pattern)
Measured on TEST CIRCUIT 1 and 2
– G
@ V
AGC
AGC
PMIN
= 0 V
= V
(dB)
CC
5
TEST CIRCUIT1 (f = 950 MHz, both products in common)
µµµµ
PC8130TA,
µµµµ
PC8131TA
1000 pF
C3
L2
L1
C5 C6
4
Output matching circuit
C2
V
AGC
IN
C1
C4
6
5
1
2, 3
ILLUSTRATION OF TEST CIRCUIT1 ASSEMBLED ON EVALUATION BOARD
PC8130/31TA
µ
L1
L2
C3
C4
C2
C5
C6
OUT
CC
V
OUT
OUT
IN
C1
IN
AGC
V
V
CC
AGC
COMPONENT LIST
Form Symbol Value Makers Product Name
C1, C3 to C6 1000 pF Murata Mfg. Co. , Ltd. GRM39 seriesChip capacitor
C2 1.5 pF Murata Mfg. Co. , Ltd. GRM39 series
L1 4.5 nH (10 nH, 8.2 nH, parallel) Toko Co., Ltd. LL1608-FChip inductor
L2 270 nH Toko Co., Ltd. LL2012-F
Caution Test circuit or print pattern in this sheet is for testing IC characteristics.
In the case of actual system application, external circuits including print pattern and matching
circuit constant of output port should be designed in accordance with IC’s S parameters and
environmental components.
6
TEST CIRCUIT2 (f = 1440 MHz, both products in common)
µµµµ
PC8130TA,
µµµµ
PC8131TA
1000 pF
C3
L2
L1
4
Output matching circuit
C5 C6
C2
V
AGC
IN
C1
C4
6
5
1
2, 3
ILLUSTRATION OF TEST CIRCUIT2 ASSEMBLED ON EVALUATION BOARD
PC8130/31TA
µ
L1
L2
C3
C4
C2
C5
C6
OUT
V
CC
OUT
OUT
IN
C1
IN
AGC
VCC
VAGC
COMPONENT LIST
Form S ymbol Value Makers Product Name
C1, C3 to C6 1000 pF Murata Mfg. Co. , Ltd. GRM39 seriesChip capacitor
C2 1.5 pF Murata Mfg. Co. , Ltd. GRM39 series
L1 1.2 nH Toko Co., Ltd. LL1608-FChip inductor
L2 270 nH Toko Co., Ltd. LL2012-F
Caution Test circuit or print pattern in this sheet is for testing IC characteristics.
In the case of actual system application, external circuits including print pattern and matching
circuit constant of output port should be designed in accordance with IC’s S parameters and
environmental components.
7
µµµµ
PC8130TA,
µµµµ
PC8131TA
APPLICATION EXPLANATION
The
PC8130TA and µPC8131TA has difference in internal circuit in order to reduce the number of external
µ
component with µPC8119T and µPC8120T. For this reason, they have difference in mechanism for determing
minimum gain and external suitable constant.
µ
PC8119T
µ
PC8120T
µ
PC8130TA
PC8131TA
µ
Determing Minimum Gain
High frequency negative feed bac k
between OUT, VCC and V
optimized by external choke
inductance.
Isolation of V
optimized by external choke
inductance.
CC
to OUT pin
AGC
pin
External Feedback Capacit or of
CC
AGC
to V
V
Necessary The impedance of inductance
Unnecessary The impedanc e of inductance
Pin
Optimize Choke Inductance of
Type Circuit on VCC Line
should be very low at high
frequency region.
should be very high at high
frequency region.
π
8
TYPICAL CHARACTERISTICS
PC8130TA
µµµµ
µµµµ
PC8130TA,
µµµµ
PC8131TA
CIRCUIT CURRENT vs. SUPPLY VOLTAGE
20
no signals no signals
18
16
14
(mA)
CC
12
(mA)
AGC
10
8
6
Circuit Current I
4
2
0
0 0.5 1 1.5 2
Supply Voltage V
2.5 3 3.5 4
CC
(V)
Gain Control Current I
CIRCUIT CURRENT vs. OPERATING AMBIENT TEMPERATURE
14
12
(mA)
10
(mA)
CC
8
6
VCC = 3.3 V
VCC = 3.0 V
VCC = 2.7 V
OUT
4
Circuit Current I
2
0
-40 -20 0 20 40
Operating Ambient Temperature T
no signals
60 80 100
A
(°C)
Current into Output pin I
GAIN CONTROL CURRENT vs. GAIN CONTROL VOLTAGE
0.2
0.18
0.16
0.14
0.12
0.1
VCC = 2.7 V
VCC = 3.0 V
0.08
0.06
VCC = 3.3 V
0.04
0.02
0
0 0.5 1 1.5 2
Gain Control Voltage V
2.5 3 3.5 4
AGC
(V)
CURRENT INTO OUTPUT PIN AND CURRENT
INTO V
CC
PIN vs. GAIN CONTROL VOLTAGE
16
VCC = 3.3 V
14
12
(mA)
VCC
10
pin I
8
CC
6
VCC = 2.7 V
4
2
Current into V
I
VCC
VCC = 3.0 V
I
out
VCC = 2.7 V
VCC = .3.3 V
VCC = 3.0 V
no signals
0
0 0.5 1 1.5 2
Gain Control Voltage V
2.5 3 3.5 4
AGC
(V)
S11 vs. FREQUENCY
V
CC
= V
AGC
S
11
: 950 MHz
1
69.594 Ω −8.9766 Ω
: 1.44 GHz
2
58.973 Ω −22.688 Ω
: 1.9 GHz
3
48.133 Ω −23.941 Ω
= 3.0 V (GPMAX), Pin = −20 dBm
1
2
3
START 100.000 000 MHz STOP 3 100.000 000 MHz
S22 vs. FREQUENCY
V
CC
= V
AGC
S
22
: 950 MHz
1
15.859 Ω −208.8 Ω
: 1.44 GHz
2
32.234 Ω −150.07 Ω
= 3.0 V (GPMAX), Pin = −20 dBm
: 1.9 GHz
24.711 Ω −131.8 Ω
1
2
3
START 800.000 000 MHz STOP 2 700.000 000 MHz
9
PC8130TA
µµµµ
Output port matching at f = 950 MHz
VCC = V
AGC
= 3.0 V(GPMAX), Pin = −20 dBm
S
11
vs. FREQUENCY 1: 65.098 Ω −56.266 Ω 2.9775 pF
950.000 000 MHz
µµµµ
PC8130TA,
VCC = V
AGC
= 3.0 V(GPMAX), Pin = −20 dBm
S
22
vs. FREQUENCY 1: 69.219 Ω 13.313 Ω 2.2303 nH
µµµµ
950.000 000 MHz
PC8131TA
MARKER 1
950 MHz
1
START 100.000 000 MHz STOP 3 100.000 000 MHz
S
11
vs. FREQUENCY
V
AGC
= V
CC
(G
P
MAX), Pin = −20 dBm
S
11
log MAG 1: −6.8118 dB
10
VCC = 3.0 V
0
5 dB/REF 0 dB
950.000 000 MHz
VCC = 3.3 V
−10
MARKER 1
950 MHz
1
START 100.000 000 MHz STOP 3 100.000 000 MHz
S
11
vs. FREQUENCY
V
CC
= V
AGC
= 3.0 V (GPMAX), Pin = −20 dBm
S
11
log MAG 1: −5.9537 dB
10
TA = −25 °C
0
5 dB/REF 0 dB
950.000 000 MHz
1
−10
−20
VCC = 2.7 V
−30
START 100.000 000 MHz STOP 3 100.000 000 MHz
22
vs. FREQUENCY
S
V
AGC
= VCC (GPMAX), Pin = −20 dBm
S
22
log MAG 1: −13.235 dB
10
5 dB/REF 0 dB
950.000 000 MHz
0
−10
VCC = 3.3 V
VCC = 3.0 V
−20
VCC = 2.7 V
−30
START 100.000 000 MHz STOP 3 100.000 000 MHz
10
−20
−30
TA = +25 °C
TA = +85 °C
START 100.000 000 MHz STOP 3 100.000 000 MHz
S
22
vs. FREQUENCY
V
CC
= V
AGC
= 3.0 V(GPMAX), Pin = −20 dBm
S
22
log MAG 1: −12.477 dB
10
5 dB/REF 0 dB
950.000 000 MHz
0
−10
TA = −25 °C
−20
TA = +85 °C
TA = +25 °C
−30
START 100.000 000 MHz STOP 3 100.000 000 MHz
PC8130TA
µµµµ
Output port matching at f = 950 MHz
µµµµ
PC8130TA,
µµµµ
PC8131TA
S21 vs. FREQUENCY
V
AGC
= VCC (GPMAX), Pin = −20 dBm
S
21
log MAG 1: 12.811 dB
16
1 dB/REF 7 dB
950.000 000 MHz
VCC = 3.3 V
VCC = 3.0 V
14
1
VCC = 2.7 V
12
10
8
START 100.000 000 MHz STOP 3 100.000 000 MHz
S
12
vs. FREQUENCY
V
AGC
= VCC (GPMAX), Pin = −20 dBm
S
12
log MAG 1: −20.189 dB
10
5 dB/REF 0 dB
950.000 000 MHz
0
21
vs. FREQUENCY
S
V
CC
= V
AGC
= 3.0 V (GPMAX), Pin = −20 dBm
S
21
log MAG 1: 12.714 dB
16
14
1 dB/REF 7 dB
950.000 000 MHz
1
12
TA = +25 °C
10
TA = −25 °C
TA = +85 °C
8
START 100.000 000 MHz STOP 3 100.000 000 MHz
12
vs. FREQUENCY
S
V
CC
= V
AGC
= 3.0 V (GPMAX), Pin = −20 dBm
S
12
log MAG 1: −20.255 dB
10
5 dB/REF 0 dB
950.000 000 MHz
0
−10
1
−20
VCC = 3.3 V
VCC = 3.0 V
VCC = 2.7 V
−30
START 100.000 000 MHz STOP 3 100.000 000 MHz
−10
TA = +85 °C
−20
1
TA = +25 °C
TA = −25 °C
−30
START 100.000 000 MHz STOP 3 100.000 000 MHz
11
PC8130TA
µµµµ
Output port matching at f = 950 MHz
µµµµ
PC8130TA,
µµµµ
PC8131TA
POWER GAIN vs. GAIN CONTROL VOLTAGE
20
15
10
VCC = 2.7 V
5
0
(dB)
P
−5
−10
−15
−20
Power Gain G
−25
VCC = 3.0 V
VCC = 3.3 V
−30
−35
−40
0 0.5 1 1.5 2
Gain Control Voltage V
2.5 3 3.5 4
AGC
(V)
S21 vs. FREQUENCY DEPENDENCE OF GAIN CONTROL VOLTAGE
VCC = 3.0 V, Pin = −20 dBm
S21 log MAG 1: −36.686 dB
40
20
V
AGC
V
AGC
V
AGC
= 1.0 V
V
10 dB/REF 0 dB
V
AGC
= 1.5 V
V
AGC
= 1.4 V
AGC
= 1.3 V
= 1.2 V
= 1.1 V
950.000 000 MHz
V
AGC
= 3.0 V
V
AGC
= 2.2 V
V
AGC
= 2.0 V
V
AGC
= 1.9 V
V
AGC
= 1.6 V
0
−20
1
−40
V
AGC
= 0.9 V
V
AGC
= 0.2 V
V
AGC
= 0 V
START 100.000 000 MHz STOP 3 100.000 000 MHz
POWER GAIN vs. GAIN CONTROL VOLTAGE
20
15
10
5
0
(dB)
P
−5
−10
TA = +85 °C
−15
−20
Power Gain G
−25
TA = −25 °C
TA = +25 °C
−30
−35
−40
0 0.5 1 1.5 2
Gain Control Voltage V
2.5 3 3.5 4
AGC
(V)
S12 vs. FREQUENCY DEPENDENCE OF GAIN CONTROL VOLTAGE
VCC = 3.0 V, Pin = −20 dBm
S12 log MAG 1: −20.344 dB
40
10 dB/REF 0 dB
950.000 000 MHz
20
0
V
AGC
= 3.0 V
V
AGC
1
= 0 V
−20
−40
V
AGC
= 1.55 V
START 100.000 000 MHz STOP 3 100.000 000 MHz
12
S11 vs. FREQUENCY DEPENDENCE OF GAIN CONTROL VOLTAGE
VCC = 3.0 V, Pin = -20 dBm
S11 log MAG 1: −6.9044 dB
40
20
0
−20
10 dB/REF 0 dB
V
AGC
= 3.0 V
V
AGC
1
V
AGC
= 1.6 V
V
AGC
= 0 to 1.0 V
950.000 000 MHz
= 2.0 V
−40
START 100.000 000 MHz STOP 3 100.000 000 MHz
S22 vs. FREQUENCY DEPENDENCE OF GAIN CONTROL VOLTAGE
VCC = 3.0 V, Pin = -20 dBm
S22 log MAG 1: −12.969 dB
40
10 dB/REF 0 dB
950.000 000 MHz
20
0
1
V
AGC
= 1.7 V
V
AGC
= 0 V
−20
V
AGC
= 2.05 V
V
AGC
= 3.0 V
−40
START 100.000 000 MHz STOP 3 100.000 000 MHz
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