TheNP3302MF01 is a 33-inch color plasma display module with a resolution of 640 (H) × 480 (V) pixels and
64 levels of gray scales per each RGB color. Furthermore, in order to improve the presentation of the deepest
shades of black, black stripes are laid over the ribs which separate the cells. The display offers vibrant colors we
reproduced in a thin and low profile package. This device uses AC plasma technology developed by NEC and
includes a 6-bit digital interface.
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DATA SHEET
COLOR PLASMA DISPLAY MODULE
NP3302MF01
FEATURES
™ Wide viewing angle
™ 262,144 colors
™ High resolution
™ High brightness
™ Slim profile
™ Light weight
™ Active contrast adjustment with PLE function
™ Excellent contrast ratio improved by the black stripe
APPLICATIONS
™ Large Screen TV
™ Public Information Display
™ Video Conferencing Systems
™ Retail
™ Education and Training Systems
The information in this document is subject to change without notice.
Document No. EA0432EJ1V0DS00
Date Published June 1999 M
Printed in Japan
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STRUCTURE AND PRINCIPLE OPERATION OF PLASMA DISPLAY
In a Plasma Display Panel, Row and Column electrodes are placed between 2 glass substrates. A rare gas is
then filled between these substrates. When a high voltage is applied to these electrodes, the gas is activated
resulting in the radiation of ultraviolet light, similar to the operation in fluorescent lamps. These ultraviolet rays
then activate phosphor that has been coated on the inside of the glass substrate, and visible light is emitted from
the panel.
ELECTRICAL INTERFACE OF PLASMA DISPLAY
NP3302MF01 requires 6-bit of digital video signals for each RGB color. In addition to the video signals, 10
kinds of digital control signals and 3 different DC voltages are required to operate the display. 4 digital signals
and 2 DC power outputs are provided by the display for use by external circuits.
In addition, a "PLE" (Peak Luminance Enhancement) function is provided so that images can be displayed with
the ideal contrast.
BASIC CONFIGURATION
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R5 to R0
G5 to G0
B5 to B0
ADCK
HSYNC
VSYNC
FRAME
M2 to M0
400 H
INTH
PSC3 to 0
BLKH
ALVP
HW, HV
PS3 to 0
ALARM
Input
IF
Circuit
Scan Driver
Logic
Controller
Memory
Memory
Controller
Driver
Controller
Data Driver
Color PDP
Data Driver
DC/DC
Converter
Various Voltages
Display Data
Scan Data
Timing Signal
Display panel
with Driver
Sustain
Driver
Vs (–160 to –180 V)
Vd (60 to 80 V)
Vcc (5 V)
V12 (12 V)
V05 (5 V)
2DATA SHEET EA0432EJ1V0DS00
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GENERAL SPECIFICATIONS
Display area672 (H) × 504 (V) mm
Outline dimensions756 (W) × 579 (H) × 53 (D) mm
Weight13 kg (typ.)
Aspect ratio4 : 3
Number of pixels640 (H) × 480 (V) (1 pixel = RGB cells)
Pixel pitch1.05 (H) × 1.05 (V) mm
Color arrangementRGB vertical stripes
Number of gradations64 gradations for each RGB
Peak brightness350 cd/m2 (typ.)
(VGA signal∗, PLE∗∗ mode set to the maximum.)
Contrast ratio350 : 1 (typ.)
(VGA signal∗, PLE∗∗ mode set to the maximum, measured in dark room )
Viewing angle160 degrees (typ.) vertical and horizontal directions
(angle at which brightness becomes 1/2 of front view brightness)
∗
Signal of fv = 59.94 Hz and fh = 31.47 kHz
∗∗
See PLE (Peak Luminance Enhancement) description.
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NP3302MF01
Common conditions: Ta = 25˚C
OPERATING ENVIRONMENTAL CONDITIONS
Temperature0 to 60˚C
Humidity20 to 80% RH (without condensation)
Atmospheric pressure800 to 1100 hPa
STORAGE ENVIRONMENTAL CONDITIONS
Temperature–20 to 60˚C
Humidity10 to 90% RH (without condensation)
Atmospheric pressure700 to 1100 hPa
MECHANICAL TEST CONDITIONS
Vibration (operating)0.5 G, 10 to 100 Hz, 3 directions, 10 minutes each
Vibration (non-operating)0.5 G, 10 to 100 Hz, 3 directions, 2 hours each
LIFE EXPECTANCY
More than 10,000 hours in continuous operations
(Time when the brightness decreased to 1/2 of the initial)
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NP3302MF01
ELECTRICAL CHARACTERISTICS
1) Interface signals absolute ratings
ItemParameterSymbolRatingsUnits
R5 to R0, G5 to G0
B5 to B0,
Input
Signals
Output
Signals
ADCK, HSYNC, VSYNC,
FRAME, INTH, BLKH,
M2 to M0, 400H,
PSC3 to PSC0, ALVP
HW, VW
PS3 to PS0
ALARM
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Common conditions: Ta=25˚C, Vcc=5V
Table 1. Absolute ratings
Input VoltageVi–1.5 to 6.5V
Input currentIi±20mA
Output voltageVo–0.5 to 5.5V
Output currentIo±35mA
Output voltageVo–0.5 to 5.5V
Output currentIo±25mA
2) Interface signals electrical characteristics
Common conditions: Ta=25˚C, Vcc=5V
Table 2. Electrical characteristics
ItemSymbolConditionsMin.Typ.Max.Unit
High Level Input VoltageVIH–2.0––V
Low Level Input CurrentVIL––-0.8V
Input CurrentIiV i=Vcc/GND––±60
High Level Output Voltage
Low Level Output Voltage
∗
∗
VOHIo=–20μA4.8––V
V
OLIo=20
μ
A––0.2V
μ
A
4DATA SHEET EA0432EJ1V0DS00
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SIGNAL FUNCTION
SymbolI/OFunction(Remarks)
R5 to R0I6-bit red video signal
G5 to G0I6-bit green video signal
B5 to B0I6-bit blue video signal
ADCKIClock signal which synchronized to video signal(positive edge)
HSYNCIHorizontal synchronous signal(negative pulse)
VSYNCIVertical synchronous signal(negative pulse)
FRAMEIField discriminate signal("L" in odd field)
M2 to M0IVideo mode selection(refer to Table 4.)
400HI400-line display mode signal("H" in 400 line mode)
INTHIInterlace mode signal("L" in interlace mode)
PSC3 to 0I4-bit PLE control signal(10 gradations, PSC3:MSB, PSC0:LSB)
BLKHIVideo blanking and Muting
ALVPIStops panel driving (“O”pen or “H” in normal operation)("L" in drive stop)
HWOH window display period indication signal("H" in display period)
VWOV window display period indication signal("H" in display period)
PS3 to 0O4-bit average brightness level signal(10 gradations, PS3:MSB, PS0:LSB)
ALARMOAlarm signal for panel broken.
LVPOAlarm signal
MSB: Most Significant Bit
LSB : Least Significant Bit
Notes 1. The RGB video signal should be compensated with inverse γ circuit before inputted to the color plasma
display module.
2. When BLKH input is H level, all RGB data is read as L level (black color data).
3. When ALARM output turns to H level, High voltage power input (Sustain power supply: Vs, and Data
power supply: Vd) should be switched off immediately.
When glass panel is broken, High voltage may appear at the electrode in glass cracked section and
become a cause of electric shock. Failure of internal power-source causes over -power status and gives
damage to the display panel and driver-circuits.
4. This alarm signal is output via the power supply connector.
It has the same function as ALARM except the polarity.
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NP3302MF01
VIDEO SIGNAL INPUT
Timing of the vertical and horizontal frequencies conform to the signals in table 4.
Table 4. Correspondence between Video Signal Input and Video Mode Signal
In NTSC Video Signal Input Mode, images are displayed by the "2-line simultaneous selection interlace scanning" method. In this method, the same image is displayed on adjacent two lines for each NTSC signal line data,
and displayed images are shifted one line between the odd and the even fields.
6DATA SHEET EA0432EJ1V0DS00
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SIGNAL TIMING
Table 5. Relation between Input video signal and Module RGB signal input
Notes 1. Input video signal format is determined by Video Mode Signal (refer to Table 4).
2. "1H" shows 1 cycle period of HSYNC (Horizontal synchronous signal).
"1V" shows 1 cycle period of VSYNC (Vertical synchronous signal).
3. Period between "leading-edge of the synchronous pulses" and "start timing of video data valid period"
4. Period between "leading-edge of the synchronous pulses" and "start timing of RGB data valid period"
5. 230 or 240 can be selected (factory set: 240). When 230 is selected, upper 5 lines and lower 5 lines are masked
with black pattern.
6. If synchronous signal delay values are set to above numbers, display position is set to the center of the
display area. Display position can be moved to up, down, right, and left by adjusting the numbers of the delay
values.
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NP3302MF01
SIGNAL TIMING
Progressive Scan 480 Line Mode
VSYNC
200 ns min.
PSC3-0
400 ns max.
PS3-0
HSYNC
23
4
tvs
(200 ns min.)
480
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1V (refer to the Vert. Freq. in Table 5)
34
48048012
123412341
VSYNC
HSYNC
RGB Data
VW Out
HSYNC
ADCK
RGB Data
5 ns min.
3479 4801
2
2
hs
t
(4 TADCK min.)
5 ns min.
TADCK, duty: 40 to 60 % (refer to the number of clock in 1H period in Table 5.)
01
Dh (refer to Table 5.)
Dv-1 Dv10
Ev (refer to Table 5.)Dv (refer to Table 5.)
213
Display period
1321
Dh-1Dh
15 ns min.
D1D2D3D4D639 D640D1D2D3
4639 64032
Eh (refer to Table 5)
1H (refer to the Horiz. Freq. in Table 5.)
479480
HW
BLKH
8DATA SHEET EA0432EJ1V0DS00
Display period
15 ns min.
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Blanking or Muting
period
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