NEC NL256204AM15-01 Specification
Global LCD Panel Exchange Center
TFT MONOCHROME LCD MODULE
NL256204AM15-01
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NL256204AM15-01A
51cm (20.1 Type)
QSXGA
LVDS Interface (4 ports)
DATA SHEET
DOD-PD-0887 (4th edition)
This DATA SHEET is updated document from
DOD-PD-0561(3).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PD-0887 (4th edition)
Published date: March 2005 CP(N)
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¤ NEC LCD Technologies, Ltd.
2003- 2005 All rights reserved.
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No part of this document shall be copied in any form or by any means without the prior written consent
of NEC LCD Technologies, Ltd. (hereinafter called "NEC").
NEC does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a product described herein or any other liability arising
from use of such application. No license, express, implied or otherwise, is granted under any patents,
copyrights or other intellectual property rights of NEC or of others.
While NEC has been making continuous effort to enhance the reliability of its products, the possibility
of failures cannot be eliminated entirely. To minimize risks of damage to property or injury to person
arising from a failure in an NEC product, customers must incorporate sufficient safety measures in their
design, such as redundancy, fire-containment and anti-failure features.
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NL256204AM15-01/01A
INTRODUCTION
NEC products are classified into the following three quality grades:
"Standard", "Special", "Specific"
The "Specific" quality grade applies only to applications developed based on a customer designated
"quality assurance program" for a specific application. The recommended applications of a product
depend on its quality grade, as indicated below. Customers must check the quality grade of each
application before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically
designed for life support)
Specific: Military systems, aircraft, aerospace equipment, submersible repeaters, nuclear reactor control
systems, life support systems (medical equipment, etc.) and any other equipment
The quality grade of this product is "Standard" unless otherwise specified in this document. If
customers intend to use this product for applications other than those specified for "Standard" quality
grade, they should contact NEC sales representative in advance.
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INTRODUCTION ..........................................................................................................................................2
1. OUTLINE....................................................................................................................................................4
1.1 STRUCTURE AND PRINCIPLE...........................................................................................................4
1.2 APPLICATION.......................................................................................................................................4
1.3 FEATURES.............................................................................................................................................4
2. GENERAL SPECIFICATIONS ................................................................................................................5
3. BLOCK DIAGRAM ................................................................................................................................... 6
4. DETAILED SPECIFICATIONS ............................................................................................................... 7
4.1 MECHANICAL SPECIFICATIONS......................................................................................................7
4.2 ABSOLUTE MAXIMUM RATINGS ....................................................................................................7
4.3 ELECTRICAL CHARACTERISTICS................................................................................................... 8
4.3.1 LCD panel signal processing board ............................................................................................... 8
4.3.2 Inverter........................................................................................................................................... 9
4.3.3 Inverter current wave ..................................................................................................................... 9
4.3.4 Power supply voltage ripple.........................................................................................................10
4.3.5 Fuse.............................................................................................................................................. 10
4.4 POWER SUPPLY VOLTAGE SEQUENCE ........................................................................................ 11
4.4.1 LCD panel signal processing board ............................................................................................. 11
4.4.2 Inverter......................................................................................................................................... 11
4.5 CONNECTIONS AND FUNCTIONS FOR INTERFACE PINS.........................................................12
4.5.1 LCD panel signal processing board ............................................................................................. 12
4.5.2 Inverter......................................................................................................................................... 15
4.5.3 Positions of socket .......................................................................................................................15
4.6 LUMINANCE CONTROL................................................................................................................... 16
4.6.1 Luminance control methods.........................................................................................................16
4.6.2 Detail of PWM timing ................................................................................................................. 17
4.7 METHOD OF CONNECTION FOR LVDS TRANSMITTER............................................................18
4.8 DISPLAY GRAY SCALE AND INPUT DATA SIGNALS .................................................................. 20
4.9 INPUT SIGNAL TIMINGS.......................................................................................................
iming characteristics..................................................................................................................21
4.9.1 T
4.9.2 Input signal timing chart ..............................................................................................................21
4.10 LVDS DATA TRANSMISSION MODE ............................................................................................ 22
4.11 DISPLAY POSITIONS.......................................................................................................................23
4.12 PIXEL ARRANGNMENT .................................................................................................................24
4.13 TEN-bit LOOK UP TABLE FOR GAMMA ADJUSTMENT............................................................25
4.14 LUT SERIAL COMMUNICATION TIMINGS .................................................................................28
4.15 OPTICS...............................................................................................................................................30
4.15.1 Optical characteristics................................................................................................................30
4.15.2 Definition of contrast ratio......................................................................................................... 32
4.15.3 Definition of luminance uniformity...........................................................................................32
4.15.4 Definition of response times ...................................................................................................... 32
4.15.5 Definition of viewing angles......................................................................................................32
5. RELIABILITY TESTS.............................................................................................................................33
6. PRECAUTIONS .......................................................................................................................................34
6.1 MEANING OF CAUTION SIGNS ...................................................................................................... 34
6.2 CAUTIONS ..........................................................................................................................................34
6.3 ATTENTIONS ......................................................................................................................................34
6.3.1 Handling of the product ............................................................................................................... 34
6.3.2 Environment.................................................................................................................................35
6.3.3 Characteristics..............................................................................................................................36
6.3.4 Other ............................................................................................................................................36
7. OUTLINE DRAWINGS ........................................................................................................................... 37
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NL256204AM15-01/01A
CONTENTS
...........21
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1. OUTLINE
1.1 STRUCTURE AND PRINCIPLE
Monochrome LCD module NL256204AM15-01 and NL256204AM15-01A are composed of the
amorphous silicon thin film transistor liquid crystal display (a-Si TFT LCD) panel structure with driver
LSIs for driving the TFT (Thin Film Transistor) array and a backlight.
The a-Si TFT LCD panel structure is injected liquid crystal material into a narrow gap between the TFT
array glass substrate and a monochrome-filter glass substrate.
Grayscale data signals from a host system (e.g. PC, signal generator, etc.) are modulated into best form
for active matrix system by a signal processing board, and sent to the driver LSIs which drive the
individual TFT arrays.
The TFT array as an electro-optical switch regulates the amount of transmitted light from the backlight
assembly, when it is controlled by data signals. Monochrome images are created by regulating the
amount of transmitted light through the TFT array.
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NL256204AM15-01/01A
1.2 APPLICATION
x Monochrome monitor system
1.3 FEATURES
x Ultra-wide viewing angle (Adoption of Super Advanced -Super Fine TFT (SA-SFT))
x High luminance
x High contrast
x Low reflection
x High resolution
x 256 gray scales per 1 sub-pixel
x LVDS interface
x Adjustable gamma characteristics by using built-in 10-bit LUT (look up table)
x Selectable LVDS data input map
x Selectable LVDS data transmission mode
x Small foot print
x Incorporated direct type backlight
x Replaceable backlight unit and inverter
x Differences between NL256204AM15-01 and NL256204AM15-01A
Item NL256204AM15-01 NL256204AM15-01A
White chromaticity Wx, Wy = (0.255, 0.310) (typ.) Wx, Wy = (0.280, 0.304) (typ.)
Backlight unit
(Replaceable part)
DATA SHEET DOD-PD-0887 (4th edition)
201LHS07 201LHS08
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2. GENERAL SPECIFICATIONS
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NL256204AM15-01/01A
Display area
Diagonal size of display
Drive system
Display gray scale
Pixel
Pixel arrangement
Sub-pixel pitch
Pixel pitch
Module size
Weig ht
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Response time
Luminance
White chromaticity
399.36 (H) u 319.488 (V) mm
51 cm (20.1 inches)
a-Si TFT active matrix
256 gray scales per 1 sub-pixel (8-bit) (766 gray scales per 1 pixel)
2,560 (H) u 2,048 (V) pixels (1 pixel consists of 3 sub pixels (LCR))
LCR Vertical stripe
0.052 (H) u 0.156 (V) mm
0.156 (H) u 0.156 (V) mm
423.4 (W) u 343.5 (H) u 43.5 (D) mm (typ.)
2,440 g (typ.)
600:1 (typ.)
t
At the contrast ratio
10:1
x Horizontal: Right side 85q (typ.), Left side 85q (typ.)
x Vertical: Up side 85q (typ.), Down side 85q (typ.)
Viewing angle with optimum grayscale (J=DICOM): normal axis Note1
Antiglare
2H (min.) [by JIS K5400]
Ton + Toff (10%
mo
90%)
30 ms (typ.)
At the maximum luminance control
850 cd/m
2
(typ.)
NL256204AM15-01 Wx, Wy = (0.255, 0.310) (typ.)
NL256204AM15-01A Wx, Wy = (0.280, 0.304) (typ.)
Signal system
Power supply voltage
4 ports LVDS interface
LCR 8-bit signals, Data enable signal (DE), Dot clock (CLK)
LCD panel signal processing board: 12.0V
Inverter: 12.0V
Direct light type: 12 cold cathode fluorescent lamps with an inverter
NL256204AM15-01
Backlight
NL256204AM15-01A
Power consumption
At checkered flag pattern and the maximum luminance control
49.2 W (typ.)
Note1: When the product luminance is 850cd/m
DATA SHEET DOD-PD-0887 (4th edition)
Replaceable parts
x Backlight unit: Type No.: 201LHS07
x Inverter: Type No.: 201PW121
Replaceable parts
x Backlight unit: Type No.: 201LHS08
x Inverter: Type No.: 201PW121
2
, the gamma characteristic is designed to J=DICOM.
5
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3. BLOCK DIAGRAM
Host LCD module (product)
DA0+/DA1+/DA2+/CKA+/DA3+/-
DB0+/DB1+/DB2+/CKB+/DB3+/-
DC0+/DC1+/DC2+/CKC+/DC3+/-
LVDS receiver
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Controller
V-driver
2,048 lines
NL256204AM15-01/01A
H-driver
7,680 lines
TFT LCD panel
H: 2,560 u 3 (L, C, R)
V: 2,048
V-driver
DD0+/DD1+/DD2+/CKD+/DD3+/-
MOD>0:1@
BSEL>0:1@
CSR, CSL
SCLK
SDAT
VDD
GND
Note1, Note2
FG
Note1, Note2
VDDB
BRTC
BRTH
BRTI
BRTP
PWSEL
GNDB
Note1, Note2
Fuse
Fuse
LVDS receiver
Converter
DC/DC
H-driver
Backlight (Direct light type)
Power
supply for
drivers
Inverter
Note1: Connections between GND (Signal ground), FG (Frame ground) and GNDB (Inverter ground) in the
LCD module
GND - FG Not connected
GND - GNDB Not connected
FG - GNDB Not connected
Note2: GND, FG and GNDB must be connected to customer equipment’s ground, and it is recommended that
these grounds are connected together in customer equipment.
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4. DETAILED SPECIFICATIONS
4.1 MECHANICAL SPECIFICATIONS
Parameter Specification Unit
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NL256204AM15-01/01A
Module size
Display area
Weight 2,440 (typ.), 2,600 (max.) g
423.4 r 1.0 (W) u 343.5 r 1.0 (H) u 43.5 r 1.0 (D)
Note1: See "7. OUTLINE DRAWINGS".
4.2 ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Rating Unit Remarks
LCD panel signal
Power supply voltage
LCD panel signal
processing board
Input voltage
for signals
Inverter
processing board
Display signals
Function signal 1
Function signal 2
PWSEL signal VPSL -0.3 to +5.5 V
399.36 (H) u 319.488 (V)
VDD -0.3 to +15.0 V
Inverter VDDB -0.3 to +15.0 V
Note1
Note2
Note3
BRTI signal VBI -0.3 to +1.5 V
BRTP signal VBP -0.3 to +5.5 V
BRTC signal VBC -0.3 to +5.5 V
VD -0.3 to +3.6
VF1
-0.3 to +3.9
VF2
V
Note1 mm
Note1 mm
Ta = 25qC
Ta = 25qC
VDD=12.0V
Ta = 25qC
VDDB = 12.0V
Storage temperature Tst -20 to +60
Operating temperature
Relative humidity
Absolute humidity
Note6
Note6
Front surface TopF 0 to +55
Rear surface TopR 0 to +55
d 95
RH
AH
d 85
d 70
d 73
Note7
qC
qC
qC
%
%
%
g/m
3
-
Note4
Note5
Ta d 40qC
40 < Ta d 50qC
50 < Ta d 55qC
Ta > 55qC
Note1: DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-, CKB+/-, DC0+/-,
DC1+/-, DC2+/-, DC3+/-, CKC+/-, DD0+/-, DD1+/-, DD2+/-, DD3+/-, CKD+/Note2: MOD0, MOD1, BSEL0, BSEL1
Note3: CSR, CSL, SCLK, SDAT
Note4: Measured at center of LCD panel surface (including self-heat)
Note5: Measured at center of LCD module's rear shield surface (including self-heat)
Note6: No condensation
Note7: Water amount at Ta = 55°C and RH = 70%
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4.3 ELECTRICAL CHARACTERISTICS
4.3.1 LCD panel signal processing board
Parameter Symbol min. typ. max. Unit Remarks
Power supply voltage VDD 10.8 12.0 13.2 V -
Power supply current IDD -
Differential input threshold
voltage for Display signals
Input voltage swing VI 0 - 2.4 V Note4
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NL256204AM15-01/01A
900
Note1
High VTH - - +100 mV
Low VTL -100 - - mV
1,800
Note2
mA
(Ta = 25qC)
at VDD = 12.0V,
Mode 0 is selected.
at VCM= 1.2V
Note3, Note4
Terminating resistance RT - 100 -
Input voltage for
Function signal 1
Input current for
Function signal 1
Input voltage for
Function signal 2
High VFH1 High must be Open. -
Low VFL1 0 - 0.8 V
Low IFL1 -10 - 10
High V+ - - 2.3 V
Low V- 0.5 - - V
Hysteresis VH 0.4 - - V
:
Note5
PA
Note6
Note1: Checkered flag pattern [by EIAJ ED-2522]
Note2: Pattern for maximum current
Note3: Common mode voltage for LVDS receiver
Note4: DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-, CKB+/-,
DC0+/-, DC1+/-, DC2+/-, DC3+/-, CKC+/-, DD0+/-, DD1+/-, DD2+/-, DD3+/-, CKD+/-.
Note5: MOD0, MOD1, BSEL0, BSEL1
Note6: CSR, CSL, SCLK, SDAT
-
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4.3.2 Inverter
Parameter Symbol min. typ. max. Unit Remarks
Power supply voltage VDDB 11.4 12.0 12.6 V -
Power supply current IDDB - 3,200 4,000
BRTI signal VBI 0 - 1.0 V
BRTP signal
Input voltage
for signals
Input current
for signals
BRTC signal
PWSEL signal
BRTI signal IBI -130 - -
BRTP signal
BRTC signal
PWSEL signal
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NL256204AM15-01/01A
VDDB = 12.0V,
At the maximum
m$
luminance control
High VBPH 2.0 - 5.25 V
Low VBPL 0 - 0.8 V
High VBCH 2.0 - 5.25 V
Low VBCL 0 - 0.8 V
High VPSLH 2.0 - 5.25 V
Low VPSLL 0 - 0.8 V
P$
High IBPH - - 3.5 mA
Low IBPL -1.6 - - mA
High IBCH - - 440
Low IBCL -610 - -
High IPSLH - - 440
Low IPSLL -610 - -
P$
P$
P$
P$
(Ta = 25qC)
-
4.3.3 Inverter current wave
3,200 (mA) typ.
0 (A)
Duty
Luminance control frequency
Maximum luminance control: 100%
Minimum luminance control: 20%
Luminance control frequency: 285Hz (typ.)
Note1: Luminance control frequency indicate the input pulse frequency, when select the external pulse
control. See "4.6.2 Detail of PWM timing".
Note2: The power supply lines (VDDB and GNDB) have large ripple voltage (See "4.3.4 Power
supply voltage ripple".) during luminance control. There is the possibility that the ripple
voltage produces acoustic noise and signal wave noise in audio circuit and so on. Put a
capacitor (5,000 to 6,000PF) between the power supply lines (VDDB and GNDB) to reduce the
noise, if the noise occurred in the circuit.
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4.3.4 Power supply voltage ripple
This product works, even if the ripple voltage levels are beyond the permissible values as following
the table, but there might be noise on the display image.
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NL256204AM15-01/01A
Power supply voltage
VDD 12.0 V
VDDB 12.0 V
Note1: The permissible ripple voltage includes spike noise.
Example of the power supply connection
a) Separate the power supply b) Put in the filter
Power
Power
VDD
VDDB
4.3.5 Fuse
Parameter
VDD
VDDB 0453007 Littelfuse Inc.
Type Supplier
FHC20 502AD
Note1: The power supply capacity should be more than the fusing current. If it is less than the fusing
current, the fuse may not blow in a short time, and then nasty smell, smoke and so on may
occur.
(Measure at input terminal of power supply)
Fuse
KAMAYA ELECTRIC
Co., Ltd.
Ripple voltage Note1
d 100
d 200
Power
Rating Fusing current Remarks
5A
24V
7A
125V
Filter
Filter
12.5A,
5s max.
14A,
5s max.
Unit
mVp-p
mVp-p
VDD
VDDB
Note1
ყ
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4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
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NL256204AM15-01/01A
VDD
Note1, Note2
0V
VDD ON
10.8V
9.6V
VDD dip < 20ms
5ms < Tr < 80ms
VDD OFF
10.8V
VDD ON
10.8V
Tof f > 50ms
LVDS Signals *1,*2
Note3
0V
CSR, CSL, SCLK, SDAT
Note3
0V
10ms < t < 35ms
VALID period
tt20ms Note4
VALID period
0ms < t < 35ms
*1: DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-, CKB+/-,
DC0+/-, DC1+/-, DC2+/-, DC3+/-, CKC+/-, DD0+/-, DD1+/-, DD2+/-, DD3+/-, CKD+/-
*2: LVDS signals should be measured at the terminal of 100: resistance.
Note1: In terms of voltage variation (voltage drop) while VDD rising edge is below 10.8V, a protection
circuit may work, and then this product may not work.
Note2: VDD should be 10.8V or more during VDD ON period.
Note3: LVDS signals and CSR, CSL, SCLK, SDAT must be Low or High-impedance, exclude the
VALID period (See above sequence diagram), in order to avoid that internal circuits is
damaged.
If some of signals are cut while this product is working, even if the signal input to it once again,
it might not work normally. If customer stops the display and function signals, they should be
cut VDD.
Note4: At the beginning of the serial communication mode, take 20ms or more after the LVDS signal
input.
4.4.2 Inverter
Voltage
12.0V
td800ms
BRTC
VDDB
11.4V
0<t
Note1: The inverter power supply voltage (VDDB) should be inputted within the valid period of LVDS
signals, in order to avoid unstable data display.
Note2: If tr is more than 800ms, the backlight will be turned off by a protection circuit for inverter.
Note3: When VDDB is 0V or BRTC is Low, PWSEL must be set to Low or Open.
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4.5 CONNECTIONS AND FUNCTIONS FOR INTERFACE PINS
4.5.1 LCD panel signal processing board
CN1 socket (LCD module side): FI-W41P-HF (Japan Aviation Electronics Industry Limited (JAE))
Adaptable plug: FI-W41S (Japan Aviation Electronics Industry Limited (JAE))
Pin No. Symbol Signal Remarks
1 GND Signal ground Note1
2 CSR Chip selection R
3 CSL Chip selection L
4 SCLK Serial Clock
5 SDAT Serial Data
6 MOD0
Selection of LVDS Data Transmission Mode
(Pull-up 25k:)
7 MOD1
8 BSEL0
Selection of LVDS data input map
(Pull-up 25k:)
9 BSEL1
10 RSVD Reserved Keep this pin Open.
11 GND Signal ground Note1
12 DB3+
13 DB314 GND Signal ground Note1
15 CKB+
16 CKB17 GND Signal ground Note1
18 DB2+
19 DB220 GND Signal ground Note1
21 DB1+
22 DB123 GND Signal ground Note1
24 DB0+
25 DB026 GND Signal ground Note1
27 DA3+
28 DA329 GND Signal ground Note1
30 CKA+
31 CKA32 GND Signal ground Note1
33 DA2+
34 DA235 GND Signal ground Note1
36 DA1+
37 DA138 GND Signal ground Note1
39 DA0+
40 DA041 GND Signal ground Note1
Pixel data B3 LVDS differential data input Note2
Pixel clock B LVDS differential clock input Note2
Pixel data B2 LVDS differential data input Note2
Pixel data B1 LVDS differential data input Note2
Pixel data B0 LVDS differential data input Note2
Pixel data A3 LVDS differential data input Note2
Pixel clock A LVDS differential clock input Note2
Pixel data A2 LVDS differential data input Note2
Pixel data A1 LVDS differential data input Note2
Pixel data A0 LVDS differential data input Note2
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NL256204AM15-01/01A
LUT communication control signal
See "4.13 TEN-bit LOOK UP TABLE FOR
GAMMA ADJUSTMENT".
See "4.10 LVDS DATA TRANSMISSION MODE".
MOD0 MOD1 Mode
Open Open 0
Open Low 1
Low Open Reserved
Low Low 0
See "4.7 METHOD OF CONNECTION FOR
LVDS TRANSMITTER".
BSEL0 BSEL1 Mode
Open Open A
Open Low B
Low Open C
Low Low A
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