NEC NL192120AC25-02 Specification
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TFT COLOR LCD MODULE
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NL192120AC25-02
57cm (22.5 Type)
WUXGA
LVDS Interface (4 port)
DATA SHEET
DOD-PP-0872 (2nd edition)
This DATA SHEET is updated document from
DOD-PP-0729(1).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PP-0872 (2nd edition)
Published date: October 2009 CP(N)
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¤ NEC LCD Technologies, Ltd.
2009 All rights reserved.
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The Copyright to this document belongs to NEC LCD Technologies, Ltd. (hereinafter called "NEC").
No part of this document will be used, reproduced or copied without prior written consent of NEC.
NEC does and will not assume any liability for infringement of patents, copyrights or other intellectual
property rights of any third party arising out of or in connection with application of the products
described herein except for that directly attributable to mechanisms and workmanship thereof. No license,
express or implied, is granted under any patent, copyright or other intellectual property right of NEC.
Some electronic parts/components would fail or malfunction at a certain rate. In spite of every effort to
enhance reliability of products by NEC, the possibility of failures and malfunction might not be avoided
entirely. To prevent the risks of damage to death, human bodily injury or other property arising out
thereof or in connection therewith, each customer is required to take sufficient measures in its safety
designs and plans including, but not limited to, redundant system, fire-containment and anti-failure.
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NL192120AC25-02
INTRODUCTION
The products are classified into three quality grades: "Standard", "Special", and "Specific" of the
highest grade of a quality assurance program at the choice of a customer. Each quality grade is designed
for applications described below. Any customer who intends to use a product for application other than
that of Standard quality grade is required to contact an NEC sales representative in advance.
The Standard quality grade applies to the products developed, designed and manufactured in
accordance with the NEC standard quality assurance program, which are designed for such application as
any failure or malfunction of the products (sets) or parts/components incorporated therein a customer
uses are, directly or indirectly, free of any damage to death, human bodily injury or other property, like
general electronic devices.
Examples: Computers, office automation equipment, communications equipment, test and measurement
equipment, audio and visual equipment, home electronic appliances, machine tools, personal
electronic equipment, industrial robots, etc.
The Special quality grade applies to the products developed, designed and manufactured in accordance
with an NEC quality assurance program stricter than the standard one, which are designed for such
application as any failure or malfunction of the products (sets) or parts/components incorporated therein a
customer uses might directly cause any damage to death, human bodily injury or other property, or such
application under more severe condition than that defined in the Standard quality grade without such
direct damage.
Examples: Control systems for transportation equipment (automobiles, trains, ships, etc.), traffic control
systems, anti-disaster systems, anti-crime systems, medical equipment not specifically
designed for life support, safety equipment, etc.
The Specific quality grade applies to the products developed, designed and manufactured in accordance
with the standards or quality assurance program designated by a customer who requires an extremely
higher level of reliability and quality for such products.
Examples: Military systems, aircraft control equipment, aerospace equipment, nuclear reactor control
systems, medical equipment/devices/systems for life support, etc.
The quality grade of this product is the "Standard" unless otherwise specified in this document.
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INTRODUCTION ..........................................................................................................................................2
1. OUTLINE....................................................................................................................................................4
1.1 STRUCTURE AND PRINCIPLE...........................................................................................................4
1.2 APPLICATION.......................................................................................................................................4
1.3 FEATURES.............................................................................................................................................4
2. GENERAL SPECIFICATIONS ................................................................................................................5
3. BLOCK DIAGRAM ................................................................................................................................... 6
4. DETAILED SPECIFICATIONS ............................................................................................................... 7
4.1 MECHANICAL SPECIFICATIONS......................................................................................................7
4.2 ABSOLUTE MAXIMUM RATINGS ....................................................................................................7
4.3 ELECTRICAL CHARACTERISTICS................................................................................................... 8
4.3.1 LCD panel signal processing board ............................................................................................... 8
4.3.2 Inverter........................................................................................................................................... 9
4.3.3 Inverter current wave ..................................................................................................................... 9
4.3.4 Power supply voltage ripple.........................................................................................................10
4.3.5 Fuse.............................................................................................................................................. 10
4.4 POWER SUPPLY VOLTAGE SEQUENCE ........................................................................................11
4.4.1 LCD panel signal processing board ............................................................................................. 11
4.4.2 Inverter......................................................................................................................................... 11
4.5 CONNECTIONS AND FUNCTIONS FOR INTERFACE PINS.........................................................12
4.5.1 LCD panel signal processing board ............................................................................................. 12
4.5.2 Inverter......................................................................................................................................... 15
4.5.3 Positions of socket .......................................................................................................................16
4.6 LUMINANCE CONTROL................................................................................................................... 17
4.6.1 Luminance control methods.........................................................................................................17
4.6.2 Detail of BRTP timing .................................................................................................................18
4.7 CONNECTION BETWEEN RECEIVER AND TRANSMITTER FOR LVDS..................................19
4.8 POLARITY REVERSING CONTROL................................................................................................21
4.8.1 Polarity reversing outside control ................................................................................................ 21
4.9 DISPLAY COLORS AND INPUT DATA SIGNALS ..........................................................................22
4.10 DISPLAY POSITIONS.......................................................................................................................23
4.11 LVDS DATA TRANSMISSION METHOD .......................................................................................23
4.12 INPUT
4.12.1 Timing characteristics................................................................................................................24
4.12.2 Input signal timing chart ............................................................................................................ 25
4.13 OPTICS...............................................................................................................................................26
4.13.1 Optical characteristics................................................................................................................26
4.13.2 Definition of contrast ratio......................................................................................................... 27
4.13.3 Definition of luminance uniformity...........................................................................................27
4.13.4 Definition of response times ...................................................................................................... 27
4.13.5 Definition of viewing angles......................................................................................................27
5. ESTIMATED LUMINANCE LIFETIME..............................................................................................28
6. RELIABILITY TESTS.............................................................................................................................29
7. PRECAUTIONS .......................................................................................................................................30
7.1 MEANING OF CAUTION SIGNS ...................................................................................................... 30
7.2 CAUTIONS ..........................................................................................................................................30
7.3 ATTENTIONS ......................................................................................................................................30
7.3.1 Handling of the product ............................................................................................................... 30
7.3.2 Environment.................................................................................................................................31
7.3.3 Characteristics..............................................................................................................................32
7.3.4 Other ............................................................................................................................................32
8. OUTLINE DRAWINGS ........................................................................................................................... 33
8.1 FRONT VIEW......................................................................................................................................33
8.2 REAR VIEW ........................................................................................................................................34
SIGNAL TIMINGS................................................................................................................24
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NL192120AC25-02
CONTENTS
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1. OUTLINE
1.1 STRUCTURE AND PRINCIPLE
Color LCD module NL192120AC25-02 are composed of the amorphous silicon thin film transistor
liquid crystal display (a-Si TFT LCD) panel structure with driver LSIs for driving the TFT (Thin Film
Transistor) array and a backlight.
The a-Si TFT LCD panel structure is injected liquid crystal material into a narrow gap between the
TFT array glass substrate and a color-filter glass substrate.
Grayscale data signals from a host system (e.g. signal generator, etc.) are modulated into best form for
active matrix system by a signal processing board, and sent to the driver LSIs which drive the individual
TFT arrays.
The TFT array as an electro-optical switch regulates the amount of transmitted light from the backlight
assembly, when it is controlled by data signals. Color images are created by regulating the amount of
transmitted light through the TFT array of red, green and blue dots.
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NL192120AC25-02
1.2 APPLICATION
x Color monitor system
1.3 FEATURES
x Ultra-wide viewing angle (Adoption of Ultra-Advanced Super Fine TFT (UA-SFT))
x Active matrix LCD
x LVDS interface (4port)
x Full - HD
x 1,024 gray scales per 1 sub-pixel (10-bit)
x Wide color gamut
x High contrast
x 120Hz frame driving
x Fast response time
x Incorporated direct light type backlight with an inverter
x Compliance with the European RoHS directive (2002/95/EC)
x Acquisition product for UL60950-1/CSA C22.2 No.60950-1-03 (File number: E170632)
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2. GENERAL SPECIFICATIONS
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NL192120AC25-02
Display area
Diagonal size of display
Drive system
Display gray scale
Pixel
Pixel arrangement
Sub-pixel pitch
Pixel pitch
Module size
Weig ht
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Response time
Luminance
Color gamut
Signal system
Power supply voltage
Backlight
Power consumption
483.84 (H) u302.4(V) mm
57.0 cm (22.5 inches)
a-Si TFT active matrix
1,073,741,824 colors (10-bit)
1,920 (H) u 1,200 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.084 (H) u 0.252 (V) mm
0.252 (H) u 0.252 (V) mm
542.0 (W) u 362.0 (H) u 40.0 (D) mm (typ.)
[Excluding projection]
3,450 g (typ.)
800:1 (typ.)
t
mo
10:1
90%)
At the contrast ratio
x Horizontal: Right side 88q (typ.), Left side 88q (typ.)
x Vertical: Up side 88q (typ.), Down side 88q (typ.)
Viewing angle with optimum grayscale (Jล 2.2): normal axis (perpendicular)
Antiglare
2H (min.) [by JIS K5400]
Ton + Toff (10%
12 ms (typ.)
At the maximum luminance
420 cd/m
At LCD panel center
97 % (typ.) [against Adobe RBG]
4 ports LVDS interface
[RGB 10-bit signals, Data enable signal (DE), Dot clock (CLK)]
LCD panel signal processing board: 12.0V
Inverter: 12.0V
Direct light type: 12 cold cathode fluorescent lamp with an inverter
At luminance maximum, Checkered flag pattern
63.6 W (typ.)
2
(typ.)
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N
r
N
3. BLOCK DIAGRAM
I/F LCD module (product)
DA0+/DA1+/DA2+/-
CKA+/-
DA3+/DA4+/-
DB0+/DB1+/DB2+/-
CKB+/-
DB3+/DB4+/-
DC0+/DC1+/-
DC2+/-
CKC+/-
DC3+/DC4+/-
DD0+/DD1+/-
DD2+/CKD+/-
DD3+/DD4+/-
Equivalent of
THC63LVD104S (THine)
Equivalent of
THC63LVD104S (THine)
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Controller
V- Driver
NL192120AC25-02
H - Driver
5760 Line
TFT LCD Panel
1200 Line
H: 1920×3 (R,G,B)
V: 1200
Backlight (Direct light type)
V- Driver
EXTPOL
DLPOUT
VSPOUT
VDD
GND
FG
ote1, Note2
VDDB
BRTC
BRTH
BRTL
BRTP
PWSEL
GNDB
ote1, Note2
External input terminal
External output terminal
DC/DC
Fuse
Fuse
Converter
Inverter
Power
supply for
d
ivers
Note1: Relations between GND (Signal ground), FG (Frame ground) and GNDB (Inverter ground) in
the LCD module are as follows.
GND - FG Connected
GND-GNDB Not connected
FG-GNDB Not connected
Note2: GND and FG must be connected to customer equipment’s ground, and it is recommended that
these grounds are connected together in customer equipment.
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4. DETAILED SPECIFICATIONS
4.1 MECHANICAL SPECIFICATIONS
Parameter Specification Unit
Module size
Display area
Weight 3,450 (typ.), 3,650 (max.) g
Note1: See "8. OUTLINE DRAWINGS".
4.2 ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Rating Unit Remarks
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542 ±0.5 (W) u 362 ±0.5 (H) u 40 ±1.0 (D)
55.5 (max., D)
483.84(H) u 302.4 (V)
NL192120AC25-02
Note1 mm
Note1 mm
Power supply
voltage
Input voltage
for signals
Operating temperature
LCD panel signal processing board VDD
-0.3 to +14.0
Inverter VDDB
LVDS signals
Note1
External input signal
Note2
BRTL signal VBL -0.3 to +1.5 V
BRTP signal VBP -0.3 to +5.5 V
Inverter
BRTC signal VBC -0.3 to +5.5 V
PWSEL signal VBS -0.3 to +5.5 V
Storage temperature Tst -20 to +60
Front surface1 0 to +50 Note3
Front surface2
Rear surface1 TopR 0 to +55
Relative humidity
Note6
Absolute humidity
Note6
Operating altitude
VD
VF
TopF
RH
AH
-
-0.3 to +3.3 V VDD= 12.0V
+60
d 95
d 85
d 70
Note7
d 4,850
V -
VDDB= 12.0 V
qC
qC
qC
%
%
g/m
m
40qC < Ta d 50qC
3
-
Note4
Note5
Ta d 40qC
Ta > 50qC
0qC d Ta d 50qC
Storage altitude
-
d 13,600
m
-20qC d Ta d 60qC
Note1: DA0+/-, DA1+/-, DA2+/-, DA3+/-, DA4+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-,
DB4+/-,CKB+/-, DC0+/-, DC1+/-, DC2+/-, DC3+/-, DC4+/-, CKC+/-, DD0+/-, DD1+/-,
DD2+/-, DD3+/-, DD4+/-, CKD+/Note2: EXTPOL
Note3: Measured at center of LCD panel surface (including self-heat)
Note4: Maximum measured in LCD panel surface side (including self-heat)
Note5: Measured at center of LCD module's rear shield surface (including self-heat)
Note6: No condensation
Note7: Water amount at Ta= 50°C and RH= 85%
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4.3 ELECTRICAL CHARACTERISTICS
4.3.1 LCD panel signal processing board
Parameter Symbol min. typ. max. Unit Remarks
Power supply voltage VDD 10.8 12.0 13.2 V -
Power supply current IDD -
Permissible ripple voltage VRP - - 100 mVp-p for VDD
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800
Note1
1,500
Note2
NL192120AC25-02
(Ta= 25qC)
mA at VDD= 12.0V
Differential input threshold
voltage for Display signals
Input voltage swing Vi 0 - 2.4 V Note4
Terminating resistance RT - 100 -
External input signal threshold
voltage
External input signal threshold
current
External output signal level
External output signal current
High ViTH - - +100 mV
Low ViTL -100 - - mV
:
High ViCH 2.0 - - V
Low ViCL - - 0.8 V
High IiCH -10 - 10 A
Low IiCL -10 - 10 A
High VoCH 2.4 - - V
Low VoCL - - 0.4 V
High IoCH -12 - - mA
Low IoCL - - 12 mA
at VCM= 1.2V
Note3, Note4
-
Note5
Note6
Note1: Checkered flag pattern [by EIAJ ED-2522]
Note2: Pattern for maximum current
Note3: Common mode voltage for LVDS receiver
Note4: DA0+/-, DA1+/-, DA2+/-, DA3+/-, DA4+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-,
DB4+/-, CKB+/-, DC0+/-, DC1+/-, DC2+/-, DC3+/-, DC4+/-, CKC+/-, DD0+/-, DD1+/-,
DD2+/-, DD3+/-, DD4+/-, CKD+/Note5: EXTPOL
Note6: DLPOUT, VSPOUT
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4.3.2 Inverter
Parameter Symbol min. typ. max. Unit Remarks
Power supply voltage VDDB 11.4 12.0 12.6 V -
Power supply current IDDB - 4,500 5,000 mA
BRTL signal VBL 0.2 - 1.0 V
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NL192120AC25-02
(Ta= 25qC)
VDDB= 12.0V,
At the maximum
luminance
BRTP signal
Input voltage for
signals
Input current for
signals
BRTC signal
PWSEL signal
BRTL signal IBI -130 - -
BRTP signal
BRTC signal
PWSEL signal
4.3.3 Inverter current wave
High VBPH 2.0 - 5.25 V
Low VBPL 0 - 0.8 V
High VBCH 2.0 - 5.25 V
Low VBCL 0 - 0.8 V
High VBSH 2.0 - 5.25 V
Low VBSL 0 - 0.8 V
P$
High IBPH - - 3,500
Low IBPL -1,580 - -
High IBCH - - 440
Low IBCL -610 - -
High IBSH - - 440
Low IBSL -610 - -
P$
P$
P$
P$
P$
P$
-
4,500 mA (typ.)
0mA
Duty
Luminance control frequency
At the maximum luminance control: 100%
At the minimum luminance control: 20%
Luminance control frequency: 255Hz (typ.)
Note1: Luminance control frequency indicate the input pulse frequency, when select the external pulse
control. See "4.6.2 Detail of BRTP timing".
Note2: The power supply lines (VDDB and GNDB) have large ripple voltage (See "4.3.4 Power
supply voltage ripple".) during luminance control. There is the possibility that the ripple
voltage produces acoustic noise and signal wave noise in audio circuit and so on. Put a
capacitor (5,000 to 6,000PF) between the power supply lines (VDDB and GNDB) to reduce
the noise, if the noise occurred in the circuit.
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4.3.4 Power supply voltage ripple
This product works, even if the ripple voltage levels are beyond the permissible values as following
the table, but there might be noise on the display image.
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NL192120AC25-02
Power supply voltage
VDD 12.0 V
VDDB 12.0 V
(Measure at input terminal of power supply)
Ripple voltage Note1
d 100
d 100
Note1: The permissible ripple voltage includes spike noise.
4.3.5 Fuse
Parameter
VDD
VDDB 11CT 10A SOC
Type Supplier
TF16AT5.00TTD KOA
Fuse
Rating Fusing current Remarks
5.0A
32V
10A
72V
10A,
5sec.max.
20A,
60sec.max.
Note1: The power supply capacity should be more than the fusing current. If it is less than the fusing
current, the fuse may not blow in a short time, and then nasty smell, smoke and so on may
occur.
Unit
mVp-p
mVp-p
Note1
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4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
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NL192120AC25-02
OFF
10.8V
High-impedance
VDD
Note1
LVDS Signals *1,*2
Note2
High-impedance
Control signals *3
0V
VCM
1.2V
0V
0V
ON
10.8V
9.6V
VDD dip < 20ms
0.1ms < Tr < 80ms
VALID period
t 20ms Note3
VALID period
Note2
10ms < t < 35ms
10ms < t < 35ms 0ms < t < 35ms
*1: DA0+/-, DA1+/-, DA2+/-, DA3+/-,DA4+/-, CLKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-, DB4+/-, CLKB+/-,
DC0+/-, DC1+/-, DC2+/-, DC3+/-, DC4+/-, CLKC+/-, DD0+/-, DD1+/-, DD2+/-, DD3+/-, DD4+/-, CLKD+/-
*2: LVDS signals should be measured at the terminal of 100: resistance.
*3: PCI, EXPOL
Note1: In terms of voltage variation (voltage drop) while VDD rising edge is below 10.8V, a
protection circuit may work, and then this product may not work.
Note2: LVDS signals must be Low or High-impedance, exclude the VALID period (See above
sequence diagram), in order to avoid that internal circuits is damaged.
If some of signals are cut while this product is working, even if the signal input to it once
again, it might not work normally. VDD should be cut when the display and function
signals are stopped.
Note3: The control signal is input since 20ms after the LVDS signal is input.
Note4: The backlight should be turned on within the valid period of LVDS signals, in order to
avoid unstable data display.
ON
10.8V
Toff > 200ms
4.4.2 Inverter
Voltage
12.0 V
tr d 1ms
BRTC
VDDB
11.4 V
0 V
Time
0ms<t
0ms<t
Note1: The backlight should be turned on within the valid period of LVDS signals, in order to
avoid unstable data display.
Note2: If tr is more than 1ms, the backlight will be turned off by a protection circuit for inverter.
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