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MM54C89/MM74C89 64-Bit TRI-STATE Random Access Read/Write Memory
March 1988
MM54C89/MM74C89 64-Bit TRI-STATE
Random Access Read/Write Memory
General Description
The MM54C89/MM74C89 is a 16-word by 4-bit random access read/write memory. Inputs to the memory consist of
four address lines, four data input lines, a write
and a memory
are decoded internally to select each of the 16 possible
word locations. An internal address register latches the address information on the positive to negative transition of
the memory enable input. The four TRI-STATE data output
lines working in conjunction with the memory enable input
provide for easy memory expansion.
Address Operation: Address inputs must be stable t
or to the positive to negative transition of memory
is thus not necessary to hold address information stable for
more than t
ative transition of memory
Note: The timing is different than the DM7489 in that a positive to negative
transition of the memory
selected.
Write Operation: Information present at the data inputs is
written into the memory at the selected address by bringing
write
enable line. The four binary address inputs
after the memory is enabled (positive to neg-
HA
enable and memory enable low.
enable).
enable must occur for the memory to be
enable line
SA
enable.It
Logic and Connection Diagrams
Read Operation: The complement of the information which
was written into the memory is non-destructively read out at
the four outputs. This is accomplished by selecting the desired address and bringing memory
enable high.
When the device is writing or disabled the output assumes a
TRI-STATE (Hi-z) condition.
Features
Y
Wide supply voltage range 3.0V to 15V
pri-
Y
Guaranteed noise margin 1.0V
Y
High noise immunity 0.45 VCC(typ.)
Y
Low power fan out of 2
TTL compatibility driving 74L
Y
Low power consumption 100 nW/package (typ.)
Y
Fast access time 130 ns (typ.) at V
Y
TRI-STATE output
É
enable low and write
CC
Dual-In-Line Package
e
10V
Top View
Order Number MM54C89
or MM74C89
TL/F/5888– 1
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
TL/F/5888
TL/F/5888– 2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at any Pin
Operating Temperature Range
MM54C89
MM74C89
Storage Temperature Range (TS)
b
0.3V to V
b
b
b
a
0.3V
CC
55§Ctoa125§C
40§Ctoa85§C
65§Ctoa150§C
Power Dissipation (P
Dual-In-Line 700 mW
)
D
Small Outline 500 mW
Operating V
Absolute Maximum V
Range 3.0V to 15V
CC
CC
Lead Temperature (TL)
(Soldering, 10 seconds) 260
18V
DC Electrical Characteristics Min/Max limits apply across temperature range, unless otherwise noted
Symbol Parameter Conditions Min Typ Max Units
CMOS TO CMOS
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
I
IN(1)
I
IN(0)
I
OZ
I
CC
Logical ‘‘1’’ Input Voltage V
Logical ‘‘0’’ Input Voltage V
Logical ‘‘1’’ Output Voltage V
Logical ‘‘0’’ Output Voltage V
Logical ‘‘1’’ Input Current V
Logical ‘‘0’’ Input Current V
Output Current in High V
Impedance State V
Supply Current V
CMOS/LPTTL INTERFACE
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
Logical ‘‘1’’ Input Voltage 54C, V
Logical ‘‘0’’ Input Voltage 54C, V
Logical ‘‘1’’ Output Voltage 54C, V
Logical ‘‘0’’ Output Voltage 54C, V
OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current)
I
SOURCE
I
SOURCE
I
SINK
I
SINK
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Range’’ they are not
meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation.
Output Source Current V
(P-Channel) T
Output Source Current V
(P-Channel) T
Output Sink Current V
(N-Channel) T
Output Sink Current V
(N-Channel) T
e
5.0V 3.5 V
CC
e
10V 8.0 V
V
CC
e
5.0V 1.5 V
CC
e
10V 2.0 V
V
CC
CC
V
CC
CC
V
CC
CC
CC
CC
CC
CC
74C, V
74C, V
74C, V
74C, V
CC
e
A
CC
e
A
CC
e
A
CC
e
A
e
e
e
e
e
e
e
e
e
e
e
e
e
25§C
25§C
25§C
25§C
eb
5.0V, I
10V, I
5.0V, I
10V, I
15V, V
15V, V
15V, Ve15V 0.005 1.0 mA
15V, V
10 mA 4.5 V
O
eb
10 mA 9.0 V
O
ea
10 mA 0.5 V
O
ea
10 mA 1.0 V
O
e
15V
IN
e
0V
IN
e
0V
O
b
1.0
b
1.0
b
0.005 1.0 mA
b
0.005 mA
b
0.005 mA
15V 0.05 300 mA
e
4.5V V
CC
e
4.75V V
CC
e
4.5V 0.8 V
CC
e
4.75V 0.8 V
CC
e
CC
e
CC
e
CC
e
CC
5.0V, V
10V, V
5.0V, V
10V, V
4.5V, I
4.75V, I
4.5V, I
4.75V, I
OUT
OUT
OUT
OUT
eb
360 mA 2.4 V
O
eb
360 mA 2.4 V
O
ea
360 mA 0.4 V
O
ea
360 mA 0.4 V
O
e
0V
e
0V
e
V
CC
e
V
CC
b
1.5 V
CC
b
1.5 V
CC
b
1.75
b
8.0
b
3.3 mA
b
15 mA
1.75 3.6 mA
8.0 16 mA
C
§
AC Electrical Characteristics* T
e
A
25§C, C
e
50 pF, unless otherwise noted
L
Symbol Parameter Conditions Min Typ Max Units
t
pd
t
ACC
t
SA
t
HA
t
ME
Propagation Delay from V
Memory Enable V
Access Time from V
Address Input V
Address Setup Time V
Address Hold Time V
Memory Enable Pulse Width V
e
5V 270 500 ns
CC
e
10V 100 220 ns
CC
e
5V 350 650 ns
CC
e
10V 130 280 ns
CC
e
5V 150 ns
CC
e
10V 60 ns
V
CC
e
5V 60 ns
CC
e
10V 40 ns
V
CC
e
5V 400 250 ns
CC
e
10V 150 90 ns
V
CC
2
AC Electrical Characteristics* T
e
A
25§C, C
e
50 pF, unless otherwise noted (Continued)
L
Symbol Parameter Conditions Min Typ Max Units
t
SR
t
WS
t
WE
t
HD
t
SD
t1H,t
t1H,t
C
IN
C
OUT
C
PD
*AC Parameters are guaranteed by DC correlated testing.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: C
AN-90.
Write Enable Setup V
Time for a Read V
Write Enable Setup V
Time for a Write V
Write Enable Pulse Width V
Data Input Hold Time V
Data Input Setup V
Propagation Delay from a Logical V
0H
‘‘1’’ or Logical ‘‘0’’ to the High V
Impedance State from
Memory Enable
Propagation Delay from a Logical V
0H
‘‘1’’ or Logical ‘‘0’’ to the High V
Impedance State from
Write Enable
Input Capacity Any Input (Note 2) 5 pF
Output Capacity Any Output (Note 2) 6.5 pF
Power Dissipation Capacity (Note 3) 230 pF
determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application note,
PD
e
5V 0 ns
CC
e
10V 0 ns
CC
e
5V t
CC
e
10V t
CC
e
CC
e
V
CC
e
CC
e
V
CC
e
CC
e
V
CC
e
CC
e
CC
e
CC
e
CC
e
5V, t
10V, t
5V 50 ns
10V 25 ns
5V 50 ns
10V 25 ns
5V, C
10V, C
50V, C
10V, C
0 300 160 ns
WS
e
0 100 60 ns
WS
e
L
e
L
e
L
e
L
5 pF, R
5 pF, R
5 pF, R
5 pF, R
e
10k 180 300 ns
L
e
10k
L
e
10k 180 300 ns
L
e
10k 85 120 ns
L
b
85 120 ns
ME
ME
ns
ns
AC Electrical Characteristics* Guaranteed across the specified temperature range, C
MM54C89 MM74C89
Parameter Conditions T
t
PD
t
ACC
t
SA
t
HA
t
ME
t
WE
t
HD
*AC Parameters are guaranteed by DC correlated testing.
e
V
5V 700 600 ns
CC
e
10V 310 265 ns
V
CC
e
15V 250 210 ns
V
CC
e
V
5V 910 780 ns
CC
e
V
10V 400 345 ns
CC
e
15V 320 270 ns
V
CC
e
V
5V 210 180 ns
CC
e
10V 90 80 ns
V
CC
e
15V 70 60 ns
V
CC
e
V
5V 80 70 ns
CC
e
10V 55 50 ns
V
CC
e
15V 45 40 ns
V
CC
e
V
5V 560 480 ns
CC
e
10V 210 180 ns
V
CC
e
V
15V 170 150 ns
CC
e
V
5V 420 360 ns
CC
e
10V 140 120 ns
V
CC
e
15V 110 100 ns
V
CC
e
V
5V 70 60 ns
CC
e
10V 35 30 ns
V
CC
e
V
15V 30 25 ns
CC
eb
55§Ctoa125§CT
A
Min Max Min Max
eb
40§Ctoa85§C Units
A
e
50 pF
L
3
AC Electrical Characteristics*
Guaranteed across the specified temperature range, C
Parameter Conditions T
t
SD
t1H,t
0H
*AC Parameters are guaranteed by DC correlated testing.
e
V
5V 70 60 ns
CC
e
10V 35 30 ns
V
CC
e
15V 30 25 ns
V
CC
e
V
5V 420 360 ns
CC
e
V
CC
e
V
CC
10V, C
15V, R
e
5 pF 170 145 ns
L
e
10 kX 135 115 ns
L
Truth Table
ME WE Operation Condition of Outputs
L L Write TRI-STATE
L H Read Complement of Selected Word
H L Inhibit, Storage TRI-STATE
H H Inhibit, Storage TRI-STATE
AC Test Circuits
t
0H
TL/F/5888– 4
e
50 pF (Continued)
L
MM54C89 MM74C89
eb
55§Ctoa125§CT
A
eb
40§Ctoa85§C Units
A
Min Max Min Max
t
1H
TL/F/5888– 3
Switching Time Waveforms
t
0H
Read Cycle
TL/F/5888– 5
TL/F/5888– 7
t
1H
TL/F/5888– 6
Write Cycle
TL/F/5888– 8
4
Switching Time Waveforms (Continued)
Read Modify Write Cycle
e
Note: t
60 ns
r
e
t
10 ns
f
TL/F/5888– 9
5
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54C89J or MM74C89J
NS Package Number J16A
Molded Dual-In-Line Package (N)
Order Number MM54C89N or MM74C89N
NS Package Number N16E
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
MM54C89/MM74C89 64-Bit TRI-STATE Random Access Read/Write Memory
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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