The MM5486 is a monolithic MOS integrated circuit utilizing
N-channel metal-gate low-threshold, enhancement mode
and ion-implanted depletion mode devices. It is available in
a 40-pin molded dual-in-line package. The MM5486 is designed to drive common anode-separate cathode LED displays. A single pin controls the LED display brightness by
setting a reference current through a variable resistor connected to V
Features
Y
Continuous brightness control
Y
Serial data input/outut
Block and Connection Diagrams
DD
.
Y
External load input
Y
Cascaded operation capability
Y
Wide power supply operation
Y
TTL compatibility
Y
33 outputs, 15 mA sink capability
Y
Alphanumeric capability
Applications
Y
COPSTMor microprocessor displays
Y
Industrial control indicator
Y
Relay driver
Y
Digital clock, thermometer, counter, voltmeter
Y
Instrumentation readouts
Dual-In-Line Package
MM5486 LED Display Driver
February 1995
FIGURE 1
TL/F/6142– 1
Top View
TL/F/6142– 2
Order Number MM5486N
See NS Package Number N40A
FIGURE 2
Order Number MM5486V
TL/F/6142– 13
See NS Package Number V44A
COPSTMis a trademark of National Semiconductor Corporation.
C
1995 National Semiconductor CorporationRRD-B30M105/Printed in U. S. A.
TL/F/6142
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any PinV
Operating Temperature
Storage Temperature
SS
b
b
65§Ctoa150§C
a
to V
12V
SS
25§Ctoa85§C
Power Dissipation at 25
Molded DIP Package, Board Mount2.5W*
C
§
Molded DIP Package, Socket Mount2.3W**
Junction Temperature
a
150§C
Lead Temperature (Soldering, 10 seconds)300§C
*Molded DIP Package, Board Mount, i
C.
above 25
§
**Molded DIP Package, Socket Mount, i
C.
above 25
§
e
49§C/W, Derate 20.4 mW/§C
JA
e
54§C/W, Derate 18.5 mW/§C
JA
Electrical Characteristics
TAwithin operating range, V
e
4.75V to 11.0V, V
DD
SymbolParameterConditionsMinTypMaxUnits
V
DD
I
DD
Power Supply4.7511V
Power Supply CurrentExcluding Output Loads7mA
Input Voltages
V
IL
V
IH
I
BR
Logic ‘‘0’’ Level
Logic ‘‘1’’ Level4.75sV
Brightness Input (Note 2)00.75mA
Output Sink Current (Note 3)
I
OH
I
OL
I
O
V
IBR
Segment OFFV
Segment ONV
Maximum Segment Current40mA
Brightness Input Voltage (Pin 19)Input Currente750 mA3.04.3V
OMOutput Matching (Note 1)
Data Output
V
OL
V
OH
Logical ‘‘0’’ LevelI
Logical ‘‘1’’ LevelI
Clock Input(Notes 5 and 6)
f
C
t
h
t
l
Frequency500kHz
High Time950ns
Low Time950ns
Data Input
t
DS
t
DH
Note 1: Output matching is calculated as the percent variation (I
Note 2: With a fixed resistor on the brightness input pin, some variation in brightness will occur from one device to another. Maximum brightness input current can
be 2 mA as long as Note 3 and junction temperature equation are complied with.
Note 3: Absolute maximum for each output should be limited to 40 mA.
Note 4: The V
Note 5: AC input waveform specification for test purpose: t
Note 6: Clock input rise and fall times must not exceed 300 ns.
Set-Up Time300ns
Hold Time300ns
voltage should be regulated by the user. See
OUT
e
0V, unless otherwise specified
SS
g
10 mA Input Bias
V
DD
OUT
OUT
Brightness Input
s
5.252.2V
DD
l
5.25V
e
3.0V10mA
e
1V (Note 4)
e
0 mA010mA
b
0.30.8V
b
2VDDV
DD
Brightness Inpute100 mA2.02.74mA
Brightness Input
OUT
OUT
MAX
Figures 6
s
20 ns, t
r
e
e
a
I
)/2.
MIN
and7for allowable V
s
20 ns, fe500 kHz, 50%g10% duty cycle.
f
e
750 mA1525mA
0.5 mAV
100 mA2.4V
vs I
OUT
OUT
SS
operation.
g
DD
20%
0.4V
DD
V
V
2
Functional Description
The MM5486 is specifically designed to operate four-digit
alphanumeric displays with minimal interface with the display and the data source. Serial data transfer from the data
source to the display driver is accomplished with 3 signals,
serial data, clock, and load. The data bits are latched by a
positive-level load signal, thus providing non-multiplexed, direct drive to the display. When load is high, the data in the
shift registers is displayed on the output drivers. Outputs
change only if the serial data bits differ from the previous
time. Display brightness is determined by control of the output current for LED displays. A 0.001 mF capacitor should
be connected to brightness control, pin 19, to prevent possible oscillations. The output current is typically 20 times
greater than the current into pin 19, which is set by an external variable resistor. There is an internal limiting resistor of
400X nominal value.
A block diagram is shown in
Figure 4
shows the input data format. Bit ‘‘1’’ is the first bit
into the data input pin and it will appear on pin 17. A logical
‘‘1’’ at the input will turn on the appropriate LED. The load
signal latches the 33 bits of the shift register into the latches. The data out pin allows for cascading the shift registers
for more than 33 output drivers.
Figure 1
.
When the chip first powers ON, an internal power ON reset
signal is generated which resets all registers and latches.
The leading clock returns the chip to its normal operation.
Figure 3
shows the timing relationship between data, clock
and data enable. A maximum clock frequency of 0.5 MHz is
assumed.
For applications where a lesser number of outputs are used,
it is possible to either increase the current per output, or
operate the part at higher than 1V V
equation can be used for calculations:
e
T
(V
)(I
J
OUT
) (No. of segments) (iJA)aT
LED
. The following
OUT
A
where:
e
T
junction temperature, 150§C max.
J
e
V
the voltage at the LED driver outputs
OUT
e
I
the LED current
LED
e
thermal coefficient of the package
i
JA
e
T
ambient temperature
A
iJA(Socket Mount)e54§C/W
iJA(Board Mount)e49§C/W
The above equation was used to plot
Figure 8
.
Figure 6, Figure 7,
and
*This leading clock is necessary only after power ON.
FIGURE 4. Input Data Format
FIGURE 3
TL/F/6142– 3
TL/F/6142– 4
TL/F/6142– 5
FIGURE 5
3
Typical Applications
FIGURE 6
TL/F/6142– 6
DV
e
I
19
1k
FIGURE 7
FIGURE 9. Constant Current Brightness Control
TL/F/6142– 7
FIGURE 8
TL/F/6142– 8
TL/F/6142– 9
FIGURE 10. Brightness Control Varying the Duty Cycle
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or2. A critical component is any component of a life
systems which, (a) are intended for surgical implantsupport device or system whose failure to perform can
into the body, or (b) support or sustain life, and whosebe reasonably expected to cause the failure of the life
failure to perform, when properly used in accordancesupport device or system, or to affect its safety or
with instructions for use provided in the labeling, caneffectiveness.
be reasonably expected to result in a significant injury
to the user.
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.