National Semiconductor LP2994 Technical data

LP2994 DDR Termination Regulator
LP2994 DDR Termination Regulator
June 2005

General Description

The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications (Se­ries Stub Termination Logic) for active termination of DDR­SDRAM. The device utilizes an internal operational amplifier to provide linear regulation of V expensive external components. The output stage prevents shoot through while delivering 1.5A continuous current and maintaining excellent load regulation. The LP2994 also in­corporates an active low shutdown pin to tri-state the output during Suspend To Ram (STR) states.
Patents Pending
TT

Typical Application Circuit

Features

n Source and sink current n Low external component count n Independent analog and power rails n Linear topology n Small package SO-8 n Low cost and easy to use n Shutdown pin

Applications

n SSTL-2 n SSTL-3 n DDR-SDRAM Termination n DDR-II Termination
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FIGURE 1. SSTL-2 VTTTermination

© 2005 National Semiconductor Corporation DS200459 www.national.com

Connection Diagram

LP2994
SO-8 (M08A) Package
Top View
20045902

Pin Descriptions

SO-8 Pin Name Function
1 NC No internal connection
2 GND Ground
3 VSENSE Feedback pin for regulating VTT
4SD
5 VDDQ Input for internal reference equal to VDDQ/2
6 AVIN Analog input pin
7 PVIN Power input pin
8 VTT Output voltage for connection to termination resistors
Active low shutdown pin

Ordering Information

Order Number Package Type
LP2994M SO-8 M08A 95 Units per Rail
LP2994MX SO-8 M08A 2500 Units Tape and Reel
NSC Package
Drawing
Supplied As
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LP2994

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
PVIN, AVIN, VTT, VDDQ, SD to GND −0.3V to +6V
Storage Temp. Range −65˚C to +150˚C
Junction Temperature 150˚C
PVIN Supply Voltage -0.3V to (AVIN +
0.3V)
SD Input Voltage -0.3V to (AVIN +
0.3V)
VTT Output Voltage -0.3V to (PVIN +
0.3V)
SO-8 Thermal Resistance (θ
) 151˚C/W
JA
Lead Temperature (Soldering, 10 sec) 260˚C
ESD Rating (Note 2) 2kV

Operating Range

Junction Temp. Range (Note 3) 0˚C to +125˚C
AVIN Supply Voltage 2.2V to 5.5V

Electrical Characteristics Specifications with standard typeface are for T

type apply over the full Operating Temperature Range (T
AVIN = PVIN = 2.5V, VDDQ = 2.5V (Note 4).
Symbol Parameter Conditions Min Typ Max Units
V
TT
VTTOutput Voltage
= 0A (Note 5)
I
OUT
VIN=VDDQ = 2.3V 1.108 1.138 1.168
VIN=VDDQ = 2.7V 1.305 1.334 1.360
I
q
Quiescent Current I
OUT
(Note 6)
Z
I
QSD
VDDQ
VDDQ Input Impedance 86 100 k
Quiescent current in shutdown
I
SD
V
IH
Shutdown Leakage Current
Minimum Shutdown High
SD=0V SD = 2.5V
Level
V
IL
Maximum Shutdown Low Level
V
TT/VTT
Load Regulation (Note 7)
I
SENSE
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating range indicates conditions for which the device is intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions see Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 2: The human body model is a 100pF capacitor discharged through a 1.5kresistor into each pin.
Note 3: At elevated temperatures, devices must be derated based on thermal resistance. The device in the SO-8 package must be derated at θ
junction to ambient with no heat sink.
Note 4: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 5: VIN is defined as the VIN = AVIN = PVIN
Note 6: Quiescent current defined as the current flow into AVIN.
Note 7: Load regulation is tested by using a 10ms current pulse and measuring V
SENSE Input Current 100 pA
I
I
OUT
OUT
= 0˚C to +125˚C). Unless otherwise specified,
J
=0A
1.9 V
= 0 to 1.5A -0.4 %
= 0 to −1.5A +0.4
.
TT
= 25˚C and limits in boldface
J
272 400 µA
21 45 µA
2
5 µA
2
0.8 V
= 151.2˚ C/W
JA
nA
VVIN=VDDQ = 2.5V 1.210 1.236 1.260
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Typical Performance Characteristics

LP2994
Iq vs Temperature ( VIN= 2.5V) ISDvs VIN(25˚C)
Iq vs VIN(25˚C) Iq vs VIN(0, 25, and 125˚C)
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ISDvs VIN(0, 25, and 125˚C) ISDvs Temperature ( VIN= 2.5V)
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20045917
20045919
Typical Performance Characteristics (Continued)
LP2994
V
and VIHvs AVIN(25˚C)
IL
Maximum Sourcing Current vs AV
(V
= 2.5V, PVIN= 2.5V)
DDQ
Maximum Sourcing Current vs AV
(V
= 2.5V, PVIN= 1.8V)
DDQ
20045920 20045921
IN
Maximum Sourcing Current vs AV
(V
= 2.5V, PVIN= 3.3V)
DDQ
IN
IN
Maximum Sinking Current vs AV
(V
= 2.5V)
DDQ
20045922 20045923
IN
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Maximum Sourcing Current vs AV
(V
= 1.8V, PVIN= 1.8V)
DDQ
IN
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