National Semiconductor LP265, LP365 Technical data

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LP265/LP365 Micropower Programmable
Quad Comparator

LP265/LP365 Micropower Programmable Quad Comparator

December 1994

General Description

The LP365 consists of four independent voltage compara­tors. The comparators can be programmed, four at the
same time, for various supply currents, input currents, re­sponse times and output current drives. This is accom­plished by connecting a single resistor between the V
and I

pins.

SET

CC

These comparators can be operated from split power sup­plies or from a single power supply over a wide range of
voltages. The input can sense signals at ground level even
with single supply operation. The unique output NPN tran­sistor stages are uncommitted to either power supply. They
can be connected directly to various logic system supplies
so that they are highly flexible to interface with various logic
families.

Application areas include battery power circuits, threshold
detectors, zero crossing detectors, simple serial A/D con­verters, VCO, multivibrators, voltage converters, power se­quencers, and high performance V/F converters, and RTD
linearization.

Typical Connection

Features

Y

Single programming resistor to tailor power consump­tion, input current, speed and output current drive
capability

Y

Wide single supply voltage range or dual supplies (4
V

to 36 VDCorg2.0 VDCtog18 VDC)

DC

Y

Low supply current drain (10 mA) and low power
consumption (10 mW/comparator)

e

V

5

CC

Y

Y

VDC

Uncommitted output stageÐselectable output levels
Output directly compatible with DTL, TTL, CMOS, MOS

@

e

I

SET

or other special logic families

Y

Input common-mode range includes ground

Y

Differential input voltage equal to the power supply
voltage

Connection Diagram

Dual-In-Line Package

0.5 mA

TL/H/5023– 1

Programming Equation

(Va)b(Vb)b1.3V

e

I

SET

I

SUPPLY

C

1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.

&

22

TL/H/5023

R

SET

c

I

SET

Order Number LP365M, LP365AN or LP365N

See NS Package Numbers M16A or N16A

TL/H/5023– 2

Absolute Maximum Ratings

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Supply Voltage 36 V

Differential Input Voltage

Input Voltage (Note 1)

Output Short Circuit to VE(Note 2) Continuous

V

with Respect to V

OUT

E

b

V

E

ESD Tolerance (Note 10) 2000V

DC

b

0.3V toa36 V

7VsV

OUT

org18 V

g

36 V

s

a

V

E

DC

DC

DC

36V

Power Dissipation (Note 3) 500 mW 500 mW

M Package N Package

T

Max 115§C 115§C

j

i

jA

Lead Temp.

(SolderingÐ10 sec.) 260
(Vapor PhaseÐ60 sec.) 215

(InfraredÐ15 sec.) 220
Operating Temp. Range LP365: 0
Storage Temp. Range

115§C/W 90§C/W

C

§

s

a

70§C

A

s

a

150§C

A

b

40§CsT

C

§

C

§

CsT

§

Electrical Characteristics (Note 4) Low power V

Symbol Parameter Conditions

V

OS

I

OS

I

B

A

VOL

V

CM

Input Offset V
Voltage R

Input Offset V
Current LP265

Input Bias V
Current LP265

Large Signal R
Voltage Gain (Min)

Input Common­Mode Voltage (Max)

e

OV,

CM

e

100 (Max)

S

e

0V 2 20 50 425 75

CM

e

0V 10 50 125 15 75 200

CM

e

100k

L

Range

CMRR Common-Mode 0sV

Rejection Ratio (Min)

PSRR Supply Voltage

Rejection Ratio

I

S

V

OH

V

OL

I

SINK

I

LEAK

t

R

Supply Current All Inputse0V,

Output Voltage V
High V

Output Voltage V
Low (Max)

Output Sink V
Current V

Output Leakage V
Current V

Response Time V

s

CM

g

2.5VsV

s

g

3.5V (Min)

e %

R

L

e

5V,

C

e

0V, 4.9 4.5 4.9 4.5

E

e

R

100k

L

e

0V

E

e

0V,

E

e

0.4V (Min)

O

e

5V,

C

e

0V (Max)

E

e

5V,

CC

e

V

0V,

E

e

R

5k, 4 4 ms

L

e

C

10 pF

L

(Note 7)

Typ Limit Limit Typ Limit Limit (Limit)

(Note 5) (Note 6) (Note 5) (Note 6)

13 636 9

500 50 50 300 25 25

3V

S

85 75 70 80 75 70

75 65 65 70 65

215 250 300 225 275 300

2.4 1.2 0.6 2.0 0.8 0.4

2505000 2 100 5000

e

S

5V, I

SET

e

10 mA

LP365A LP365

Tested Design Tested Design Units

mV

nA

425 150

(Max)

nA

15 75 300

(Max)

V/mV

0 0 0 0

3 3 3 3

V

V

(Min)

dB

65 dB

mA

(Max)

V

(Min)

0.4

0.4

0.4 0.4

V

mA

nA

2

Electrical Characteristics (Continued) (Note 8) High power V

e

g

S

15V, I

SET

e

100 mA

LP365A LP365

Symbol Parameter Conditions

Tested Design Tested Design

Typ Limit Limit Typ Limit Limit

Units

(Limit)

(Note 5) (Note 6) (Note 5) (Note 6)

V

OS

I

OS

I

B

A

VOL

V

CM

Input Offset V
Voltage R

Input Offset V
Current LP265

Input Bias V
Current LP265

Large Signal R
Voltage Gain (Min)

Input Common­Mode Voltage (Max)

e

0V,

CM

e

100 (Max)

S

e

0V 5 50 100 10 90 200

CM

13 636 9

10 90 500

e

0V 60 200 500 80 300 500

CM

80 300 800

e

15k

L

500 100 100 500 100 100

b

15

b

15

b

15

b

15

mV

(Max)

(Max)

V/mV

Range

13 13 13 13

CMRR Common-Mode

Rejection Ratio

PSRR Supply Voltage

Rejection Ratio

I

S

V

OH

V

OL

I

SINK

I

LEAK

t

R

Note 1: The input voltage is not allowed to go 0.3V above Vaorb0.3V below Vbas this will turn on a parasitic transistor causing large currents to flow through
the device.

Note 2: Short circuits from the output to V
allowed to exceed 30 mA. The output should not be shorted to V

Note 3: For operating at elevated temperatures, these devices must be derated based on a thermal resistance of i

Note 4: Boldface numbers apply at temperature extremes. All other numbers apply at T

V

C

Note 5: Guaranteed and 100% production tested.

Note 6: Guaranteed (but not 100% production tested) over the operating temperature and supply voltage ranges. These limits are not used to calculate out-going

quality levels.

Note 7: The response time specified is for a 100 mV input step with 5 mV overdrive.

Note 8: Boldface numbers apply at temperature extremes. All other numbers apply at T

V

C

Note 9: See AN-450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ for other methods of soldering surface mount devices.

Note 10: Human body model, 1.5 kX in series with 100 pF.

Supply Current All Inputse0V, 2.6 3 3.3 2.8 3.5 3.7

Output Voltage V
High V

Output Voltage V
Low (Max)

Output Sink V
Current V

Output Leakage V
Current V

Response Time V

e

5V as shown in the Typical Connection diagram.

e

5V as shown in the Typical Connection diagram.

b

15VsV

s

g
s

R

R

V
R
C
(Note 7)

CM

13V (Min)

10VsV

S

g

15V (Min)

e %

, LP265

L

e

5V,

C

e

0V, 4.9 4.5 4.9 4.5

E

e

100k

L

e

0V

E

e

0V,

E

e

0.4V (Min)

O

e

15V,

C

eb

15V (Max)

E

e

5V,

CC

e

0V,

E

e

5k, 1.0 1.0 ms

L

e

10 pF

L

a

may cause excessive heating and eventual destruction. The current in the output leads and the VElead should not be

85 75 70 80 75 70

80 70 70 75 70 70

2.8 3.5 4.3

0.4 0.4 0.4 0.4

10 8 5.5 7.5 6 4

5505000 5505000

b

s

if V

(Vb)a7V.

E

e

e

T

25§C. V

A

j

e

A

a

e

T

25§C. V

j

ea

a

15V, V

jA

e

and Tjmax. T

5V, V

b

eb

b

e

0V, I

15V, I

SET

j

SET

e

a

T

A

e

10 mA, R

e

100 mA, R

ijAPD.

e

L

e

L

(Min)

mA

(Max)

(Min)

mA

100k, and

100k, and

nA

nA

V

V

dB

dB

V

V

nA

3