LMX2377U PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal
Communications
PLLatinum
™
Ultra Low Power Dual Frequency
Synthesizer for RF Personal Communications
2.5 GHz/1.2 GHz
General Description
The LMX2377U device is a high performance frequency
synthesizer with integrated dual modulus prescalers. The
LMX2377U device is designed for use as a local oscillator for
the first and second RF of a dual conversion radio transceiver.
A 16/17 or a 32/33 prescale ratio can be selected for the
Main synthesizer. An 8/9 or a 16/17 prescale ratio can be
selected for the Aux synthesizer. Using a proprietary digital
phase lock technique, the LMX2377U device generates very
stable, low noise control signals for UHF and VHF voltage
controlled oscillators. Both the Main and Aux synthesizers
include a two-level programmable charge pump. The Main
synthesizer has dedicated Fastlock circuitry.
Serial data is transferred to the devices via a three-wire
interface (Data, LE, Clock). The low voltage logic interface
allows connection to 1.8V devices. Supply voltages from
2.7V to 5.5V are supported. The LMX2377U features ultra
low current consumption, typically 3.5 mA at 3.0V.
The LMX2377U devices are available in 20-Pin TSSOP,
24-Pin CSP, and 20-Pin UTCSP surface mount plastic packages.
Features
n Ultra Low Current Consumption
n Upgrade and Compatible to the LMX2370
n 2.7V to 5.5V Operation
n 1.8V to 5.0V MICROWIRE Logic Interface
n Selectable Synchronous or Asynchronous Powerdown
Mode:
I
CC-PWDN
n Selectable Dual Modulus Prescaler:
Main: 16/17 or 32/33
Aux: 8/9 or 16/17
n Selectable Charge Pump TRI-STATE
n Programmable Charge Pump Current Levels
Main and Aux: 0.95 or 3.8 mA
n Selectable Fastlock
n Open Drain Analog Lock Detect Output
n Available in 20-Pin TSSOP, 24-Pin CSP, and 20-Pin
UTCSP
= 1 µA typical
™
Mode for the Main Synthesizer
Applications
n Mobile Handsets
(GSM, GPRS, W-CDMA, CDMA, PCS, AMPS, PDC,
DCS)
n Cordless Handsets
(DECT, DCT)
n Wireless Data
n Cable TV Tuners
®
Mode
Thin Shrink Small Outline Package
(MTC20)Chip Scale Package (SLB24A)
20022680
PLLatinum™is a trademark of National Semiconductor Corporation.
Main122— Main PLL charge pump power supply. Must be ≥ VCC.
V
P
D
Main233O Main PLL charge pump output. The output is connected to the
o
Pin No.
20-Pin UTCSP
Pin No.
24-Pin CSP
20241— Power supply bias for the Main PLL analog and digital circuits. V
GND344— Ground for the Main PLL digital circuitry.
f
Main455IMain PLL prescaler input. Small signal input from the VCO.
IN
Pin No.
20-Pin
TSSOP
I/ODescription
may range from 2.7V to 5.5V. Bypass capacitors should be placed
as close as possible to this pin and be connected directly to the
ground plane.
external loop filter, which drives the input of the VCO.
CC
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Pin Descriptions (Continued)
Pin
LMX2377U
Name
Main566IMain prescaler complementary input. For single ended operation,
f
IN
Pin No.
20-Pin UTCSP
Pin No.
24-Pin CSP
Pin No.
20-Pin
TSSOP
I/ODescription
this pin should be AC grounded. The LMX2377U Main PLL can be
driven differentially when the bypass capacitor is omitted.
GND677— Ground for the Main PLL analog circuitry.
OSC
in
788IReference oscillator input. It has an approximate VCC/2 input
threshold and can be driven from an external CMOS or TTL logic
gate.
GND8109— Ground for the Aux PLL digital circuitry, MICROWIRE, F
oscillator circuits.
LD91110O Programmable multiplexed output pin. Functions as a general
F
o
purpose CMOS TRI-STATE output, Main/Aux PLL open drain
analog lock detect output, N and R divider output or Fastlock
output, which connects a parallel resistor to the external loop filter.
Clock101211IMICROWIRE Clock input. High impedance CMOS input. Data is
clocked into the 22-bit shift register on the rising edge of Clock.
Data111412IMICROWIRE Data input. High impedance CMOS input. Binary
serial data. The MSB of Data is shifted in first. The last two bits
are the control bits.
LE121513IMICROWIRE Latch Enable input. High impedance CMOS input.
When LE transitions HIGH, Data stored in the shift register is
loaded into one of 4 internal control registers.
Vµc131614— Power supply bias for the MICROWIRE circuitry. Must be ≤ V
Typically connected to the same supply level as the
microprocessor or baseband controller to enable programming at
low voltages.
GND141715— Ground for the Aux PLL analog circuitry.
Aux151816IAux PLL prescaler input. Small signal input from the VCO.
f
IN
GND161917— Ground for the Aux PLL digital circuitry, MICROWIRE, F
oscillator circuits.
Aux172018O Aux PLL charge pump output. the output is connected to an
D
o
external loop filter, which drives the input of the VCO.
VPAux182219— Aux PLL charge pump power supply. Must be ≥ VCC.
V
CC
192320— Power supply bias for the Aux PLL analog and digital circuits,
LD, and oscillator circuits. VCCmay range from 2.7V to 5.5V.
F
o
Bypass capacitors should be placed as close as possible to this
pin and be connected directly to the ground plane.
NC—1, 9, 13, 21—— No Connect
LD, and
o
LD, and
o
.
CC
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Ordering Information
ModelTemperature RangePackage DescriptionPackingNS Package Number
LMX2377USLEX−40˚C to +85˚CUltra Thin Chip Scale
Package (UTCSP)
Tape and Reel
LMX2377USLBX−40˚C to +85˚CChip Scale Package
(CSP) Tape and Reel
LMX2377UTM−40˚C to +85˚CThin Shrink Small
Outline Package
(TSSOP)
LMX2377UTMX−40˚C to +85˚CThin Shrink Small
Outline Package
(TSSOP) Tape and
Reel
LMX2377U
2500 Units Per ReelSLE20A
2500 Units Per ReelSLB24A
73 Units Per RailMTC20
2500 Units Per ReelMTC20
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Detailed Block Diagram
LMX2377U
Notes:
1. V
supplies power to the Main and Aux prescalers, Main and Aux feedback dividers, Main and Aux reference dividers, Main and Aux phase detectors, the OSC
CC
buffer, and FoLD circuitry.
2. Vµc supplies power to the MICROWIRE circuitry.
3. V
Main and VPAux supply power to the charge pumps. They can be run separately as long as VPMain ≥ VCCand VPAux ≥ VCC.
P
20022608
in
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LMX2377U
Absolute Maximum Ratings (Notes 1,
2, 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Power Supply Voltage
V
to GND−0.3V to +6.5V
CC
V
Main to GND−0.3V to +6.5V
P
V
Aux to GND−0.3V to +6.5V
P
Voltage on any pin to GND (V
V
must be<+6.5V−0.3V to VCC+0.3V
I
Storage Temperature Range (T
Lead Temperature (solder 4 s) (T
TSSOP θ
CSP θ
Thermal Impedance114.5˚C/W
JA
Thermal Impedance112˚C/W
JA
)
I
)−65˚C to +150˚C
S
)+260˚C
L
Recommended Operating
Conditions
Power Supply Voltage
V
to GND+2.7V to +5.5V
CC
V
Main to GNDVCCto +5.5V
P
V
Aux to GNDVCCto +5.5V
P
Operating Temperature (T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to
the device may occur. Recommended Operating Conditions indicate conditions for which the device is intended to be functional, but do not guarantee
specific performance limits. For guaranteed specifications and test conditions, refer to the Electrical Characteristics section. The guaranteed specifications apply only for the conditions listed.
Note 2: This device is a high performance RF integrated circuit with an ESD
<
rating
2 kV and is ESD sensitive. Handling and assembly of this device
should only be done at ESD protected work stations.
Note 4: Some of the values in this range are illegal divide ratios (B<A). To obtain continuous legal division, the Minimum Divide Ratio must be calculated. Use N
*
≥ P
(P−1), where P is the value of the prescaler selected.
Note 5: Refer to the LMX2377U f
Note 6: Refer to the LMX2377U Charge Pump Test Setup section
Note 7: Refer to the Charge Pump Current Specification Definitions for details on how these measurements are made.
Note 8: Refer to the LMX2377U OSC
Note 9: Refer to the LMX2377U Serial Data Input Timing section
Note 10: Normalized Phase Noise Contribution is defined as : L
measured at an offset frequency, f, ina1Hzbandwidth. The offset frequency, f, must be chosen sufficiently smaller than the PLL’s loop bandwidth, yet large enough
to avoid substantial phase noise contribution from the reference source. N is the value selected for the feedback divider and F
comparison frequency..
Note 11: The synthesizer phase noise is measured with the LMX2370TMEB/LMX2370SLBEB/LMX2370SLEEB Evaluation boards and the HP8566B Spectrum
Analyzer.
Sensitivity Test Setup section
IN
Sensitivity Test Setup section
in
(f) = L(f) − 20 log (N) − 10 log (Fφ), where L(f) is defined as the single side band phase noise
N
is the Main/Aux phase detector
φ
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Typical Performance Characteristics
Sensitivity
LMX2377U
LMX2377U fINMain Input Power Vs Frequency
V
CC=VP
Main = Vµc = 3.0V
LMX2330U fINMain Input Power Vs Frequency
V
CC=VP
Main = Vµc = 5.5V
20022642
20022643
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Typical Performance Characteristics
Sensitivity
(Continued)
LMX2377U
LMX2377U f
Aux Input Power Vs Frequency
IN
V
CC=VP
Aux = Vµc = 3.0V
LMX2377U fINAux Input Power Vs Frequency
V
CC=VP
Aux = Vµc = 5.5V
20022646
20022647
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Typical Performance Characteristics
Sensitivity
LMX2377U
(Continued)
LMX2377U OSC
Input Voltage Vs Frequency
in
= Vµc = 3.0V
V
CC
LMX2377U OSCinInput Voltage Vs Frequency
= Vµc = 5.5V
V
CC
20022652
20022653
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