LM5035
PWM Controller with Integrated Half-Bridge and SyncFET
Drivers
LM5035 PWM Controller with Integrated Half-Bridge and SyncFET Drivers
General Description
The LM5035 Half-Bridge Controller/Gate Driver contains all
of the features necessary to implement half-bridge topology
power converters using voltage mode control with line voltage
feed-forward. The floating high-side gate driver is capable of
operating with supply voltages up to 105V. Both the high-side
and low-side gate drivers are capable of 2A peak. An internal
high voltage startup regulator is included, along with programmable line undervoltage lockout (UVLO) and overvoltage protection (OVP). The oscillator is programmed with a
single resistor to frequencies up to 2MHz. The oscillator can
also be synchronized to an external clock. A current sense
input and a programmable timer provide cycle-by-cycle current limit and adjustable hiccup mode overload protection.
Simplified Application Diagram
Features
105V / 2A Half-Bridge Gate Drivers
■
Synchronous Rectifier Control Outputs with
■
Programmable Delays
High Voltage (105V) Start-up Regulator
■
Voltage mode Control with Line Feed-Forward and Volt •
■
Second Limiting
Resistor Programmed, 2MHz Capable Oscillator
■
Patent Pending Oscillator Synchronization
■
Programmable Line Under-Voltage Lockout
■
Line Over-Voltage Protection
■
Internal Thermal Shutdown Protection
■
Adjustable Soft-Start
■
Versatile Dual Mode Over-Current Protection with Hiccup
Order NumberPackage TypeNSC Package DrawingSupplied As
LM5035MHTSSOP-20EPMXA20A73 Units per Rail
LM5035MHXTSSOP-20EPMXA20A2500 Units on Tape and Reel
LM5035SQLLP-24SQA24B1000 Units on Tape and Reel
LM5035SQXLLP-24SQA24B4500 Units on Tape and Reel
Pin Descriptions
LM5035
TSSOP
PIN
LLP PINNameDescriptionApplication Information
123RAMPModulator ramp signalAn external RC circuit from VIN sets the ramp slope. This pin is
discharged at the conclusion of every cycle by an internal FET.
Discharge is initiated by either the internal clock or the Volt •
Second clamp comparator.
224UVLOLine Under-Voltage LockoutAn external voltage divider from the power source sets the
shutdown and standby comparator levels. When UVLO reaches
the 0.4V threshold the VCC and REF regulators are enabled.
When UVLO reaches the 1.25V threshold, the SS pin is released
and the device enters the active mode. Hysteresis is set by an
internal current sink that pulls 23µA from the external resistor
divider.
32OVPLine Over-Voltage ProtectionAn external voltage divider from the power source sets the
shutdown levels. The threshold is 1.25V. Hysteresis is set by an
internal current source that sources 23µA into the external
resistor divider.
43COMPInput to the Pulse Width Modulator An external opto-coupler connected to the COMP pin sources
current into an internal NPN current mirror. The PWM duty cycle
is maximum with zero input current, while 1mA reduces the duty
cycle to zero. The current mirror improves the frequency
response by reducing the AC voltage across the opto-coupler
detector.
54RTOscillator Frequency Control and
Sync Clock Input.
65AGNDAnalog GroundConnect directly to Power Ground.
76CSCurrent Sense input for current
limit
87SSSoft-start InputAn internal 55 µA current source charges an external capacitor
98DLYTiming programming pin for the
LO and HO to SR1 and SR2
outputs.
109RESRestart TimerIf cycle-by-cycle current limit is exceeded during any cycle, a
Normally biased at 2V. An external resistor connected between
RT and AGND sets the internal oscillator frequency. The internal
oscillator can be synchronized to an external clock with a
frequency higher than the free running frequency set by the RT
resistor.
If CS exceeds 0.25V the output pulse will be terminated, entering
cycle-by-cycle current limit. An internal switch holds CS low for
50ns after HO or LO switches high to blank leading edge
transients.
to set the soft-start rate. During a current limit restart sequence,
the internal current source is reduced to 1.2µA to increase the
delay before retry.
An external resistor to ground sets the timing for the non-overlap
time of HO to SR1 and LO to SR2.
22µA current is sourced to the RES pin capacitor. If the RES
capacitor voltage reaches 2.5V, the soft-start capacitor will be
fully discharged and then released with a pull-up current of 1.2µA.
After the first output pulse at LO (when SS > COMP offset,
typically 1V), the SS pin charging current will revert to 55µA.
3www.national.com
TSSOP
PIN
LM5035
LLP PINNameDescriptionApplication Information
1111HBBoost voltage for the HO driverAn external diode is required from VCC to HB and an external
capacitor is required from HS to HB to power the HO gate driver.
1212HSSwitch nodeConnection common to the transformer and both power switches.
Provides a return path for the HO gate driver.
1313HOHigh side gate drive output.Output of the high side PWM gate driver. Capable of sinking 2A
peak current.
1414LOLow side gate drive output.Output of the low side PWM gate driver. Capable of sinking 2A
peak current.
1515PGNDPower GroundConnect directly to Analog Ground.
1616VCCOutput of the high voltage start-up
regulator. The VCC voltage is
regulated to 7.6V.
1717SR2Synchronous rectifier driver
output.
1818SR1Synchronous rectifier driver
output.
1919REFOutput of 5V ReferenceMaximum output current is 20mA. Locally decoupled with a 0.1µF
2021VINInput voltage sourceInput to the Start-up Regulator. Operating input range is 13V to
EPEPEPExposed Pad, underside of
package
1NCNo connectionNo electrical contact.
10NCNo connectionNo electrical contact.
20NCNo connectionNo electrical contact.
22NCNo connectionNo electrical contact.
If an auxiliary winding raises the voltage on this pin above the
regulation setpoint, the Start-up Regulator will shutdown, thus
reducing the internal power dissipation.
Control output of the synchronous FET gate. Capable of 0.5A
peak current.
Control output of the synchronous FET gate. Capable of 0.5A
peak current.
capacitor.
100V with transient capability to 105V. For power sources outside
of this range, the LM5035 can be biased directly at VCC by an
external regulator.
No electrical contact. Connect to system ground plane for
reduced thermal resistance.
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LM5035
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VIN to GND-0.3V to 105V
HS to GND-1V to 105V
HB to GND-0.3V to 118V
HB to HS-0.3V to 18V
VCC to GND-0.3V to 16V
All other inputs to GND-0.3V to 7V
ESD Rating (Note 4)
Human Body Model2kV
Storage Temperature Range-65°C to 150°C
Junction Temperature150°C
Operating Ratings (Note 1)
VIN Voltage13V to 105V
External Voltage Applied to VCC8V to 15V
Operating Junction Temperature-40°C to +125°C
CS, RT, DLY to GND-0.3V to 5.5V
COMP Input Current10mA
Electrical Characteristics Specifications with standard typeface are for T
apply over full Operating Junction Temperature range. V
27.4kΩ, V
UVLO
= 3V, V
= 0V unless otherwise stated. See (Note 2) and (Note 3).
Under-voltage Shutdown Threshold UVLO voltage falling0.3V
Under-voltage Standby Enable
UVLO voltage rising0.4V
Threshold
Over-Voltage Protection (OVP pin)
V
I
OVP
OVP
Over-Voltage threshold1.2121.251.288V
Hysteresis currentOVP pin sourcing192327µA
Current Sense Input (CS Pin)
V
CS
CS delay to outputCS from zero to 1V. Time for HO and LO
Current Limit Threshold0.2280.250.272V
80ns
to fall to 90% of VCC. Output load = 0 pF.
Leading edge blanking time at CS50ns
CS sink impedance (clocked)Internal FET sink impedance3260
Current Limit Restart (RES Pin)
V
RES
Charge source currentV
Discharge sink currentV
RES Threshold2.42.52.6V
= 1.5V162228µA
RES
= 1V81216µA
RES
=
Ω
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SymbolParameterConditionsMinTypMaxUnits
Soft-Start (SS Pin)
LM5035
I
SS
Charging current in normal
VSS = 0405570µA
operation
Charging current during a hiccup
VSS = 00.61.21.8µA
mode restart
Soft-stop Current SinkVSS = 2.5V405570µA
Oscillator (RT Pin)
F
F
SW1
SW2
Frequency 1 (at HO, half oscillator
frequency)
Frequency 2 (at HO, half oscillator
RRT = 15 kΩ, TJ = 25°C
RRT = 15 kΩ, TJ = -40°C to 125°C
RRT = 5.49 kΩ
185200215kHz
180220
430500570kHz
frequency)
DC level2V
Input Sync threshold2.533.4V
PWM Controller (Comp Pin)
Delay to output80ns
V
PWM-OS
SS to RAMP offset0.711.2V
Minimum duty cycleSS = 0V0%
Small signal impedanceI
= 600µA, COMP current to PWM
COMP
5000
voltage
Main Output Drivers (HO and LO Pins)
Output high voltageI
Output low voltageI
Rise timeC
Fall timeC
Deadtime, HO to LO, LO to HOV
Peak source currentV
Peak sink currentV
= 50mA, VHB - VHO, V
OUT
= 100 mA0.20.5V
OUT
= 1 nF15ns
LOAD
= 1 nF13ns
LOAD
= V
, I
DLY
HO,LO
HO,LO
REF
= 0V, V
= 10V, V
= 0mA4570100ns
COMP
= 10V1.25A
VCC
= 10V2A
VCC
VCC
- V
LO
0.50.25V
Voltage Feed-Forward (RAMP Pin)
RAMP comparator thresholdCOMP current = 02.42.52.6V
Synchronous Rectifier Drivers (SR1, SR2)
Output high voltageI
Output low voltageI
Rise timeC
Fall timeC
Peak source currentVSR = 0, V
Peak sink currentVSR = V
T1Deadtime, SR1 falling to HO rising,
SR2 falling to LO rising
T2Deadtime, HO falling to SR1 rising,
LO falling to SR2 rising
= 10mA, V
OUT
= 20 mA (sink)0.080.2V
OUT
= 1 nF40ns
LOAD
= 1 nF20ns
LOAD
VCC
VCC
R
= 10k40ns
DLY
R
= 27.4k75100125ns
DLY
R
= 100k300ns
DLY
R
= 10k20ns
DLY
R
= 27.4k304565ns
DLY
R
= 100k140ns
DLY
- V
, V
VCC
SR1
VCC
- V
SR2
0.250.1V
= 10V0.5A
, V
= 10V0.5A
VCC
Ω
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SymbolParameterConditionsMinTypMaxUnits
Thermal Shutdown
T
SD
Shutdown temperature165°C
Hysteresis20°C
Thermal Resistance
θ
JA
Junction to ambient, 0 LFPM Air
TSSOP-20_EP package40°C/W
Flow
θ
JC
Junction to Case (EP)Thermal
TSSOP-20_EP package4°C/W
resistance
θ
JA
θ
JC
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: All limits are guaranteed. All electrical characteristics having room temperature limits are tested during production with TA = 25°C. All hot and cold limits
are guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
Note 3: Typical specifications represent the most likely parametric norm at 25°C operation
Note 4: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. 2kV for all pins except HB, HO and HS which are rated
at 1.5kV.
Junction to ambient, 0 LFM Air Flow LLP-24 (4 mm x 5 mm)40°C/W
Junction to Case Thermal resistance LLP-24 (4 mm x 5 mm)6°C/W
LM5035
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Typical Performance Characteristics
LM5035
V
VCC
and V
V
REF
REF
vs I
vs V
REF
VIN
20177505
V
vs I
VCC
VCC
Frequency vs RT
20177506
20177507
Oscillator Frequency vs Temperature
20177509
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20177508
Soft-Start & Stop Current vs Temperature
20177510
LM5035
Effective Comp Input Impedance
SR "T1" Parameter vs Temperature
20177511
R
vs Deadtime
DLY
SR "T2" Parameter vs Temperature
20177512
20177513
20177514
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