National Semiconductor LM4992 Technical data

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LM4992
420mW Stereo Cell Phone Audio Amplifier

LM4992 420mW Stereo Cell Phone Audio Amplifier

February 2004

General Description

The LM4992 is a stereo audio power amplifier primarily
designed for demanding applications in mobile phones and
other portable communication device applications. It is ca­pable of delivering 1 watt, per channel, of continuous aver­age power to an 8Ω BTL load with less than 1% distortion
(THD+N) from a 5V

Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. The LM4992 does not require output
coupling capacitors or bootstrap capacitors, and therefore is
ideally suited for mobile phone and other low voltage appli­cations where minimal power consumption is a primary re­quirement.

The LM4992 features independent shutdown control for
each channel and a low-power consumption shutdown
mode, which is achieved by driving both shutdown pins with
logic low. Additionally, the LM4992 features an internal ther­mal shutdown protection mechanism.

The LM4992 contains advanced pop & click circuitry which
eliminates noise which would otherwise occur during turn-on
and turn-off transitions.

The LM4992 is unity-gain stable and can be configured by
external gain-setting resistors.

power supply.

DC

Key Specifications

j

Improved PSRR at 217Hz & 1KHz 64dB (1KHz)

j

Stereo Output Power at 5.0V,

1% THD, 8Ω 1.07W (typ)

j

Stereo Output Power at 3.3V,

1% THD, 8Ω 420mW (typ)

j

Shutdown Current, Vdd= 3.3V 0.2µA (typ)

Features

n Available in space-saving LLP package
n Ultra low current shutdown mode
n BTL output can drive capacitive loads
n Improved pop & click circuitry eliminates noise during

turn-on and turn-off transitions

n 2.2 - 5.5V operation
n No output coupling capacitors, snubber networks or

bootstrap capacitors required

n Unity-gain stable
n External gain configuration capability

Applications

n Mobile Phones
n PDAs
n Portable electronic devices

Connection Diagram

SDA14A

Top View

Order Number LM4992SD

See NS Package Number SDA14A

Boomer®is a registered trademark of National Semiconductor Corporation.

© 2004 National Semiconductor Corporation DS200761 www.national.com

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Typical Application

LM4992

FIGURE 1. Typical Audio Amplifier Application Circuit

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LM4992

Absolute Maximum Ratings (Note 2)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Supply Voltage (Note 10) 6.0V

Junction Temperature 150˚C

Thermal Resistance

θ

(LLP) 103˚C/W

JA

Operating Ratings

Storage Temperature −65˚C to +150˚C

Input Voltage −0.3V to V

DD

+0.3V

Power Dissipation (Notes 3, 11) Internally Limited

ESD Susceptibility (Note 4) 2000V

Temperature Range

T

MIN

≤ TA≤ T

MAX

−40˚C ≤ TA≤ 85˚C

Supply Voltage 2.2V ≤ V

DD

≤ 5.5V

ESD Susceptibility (Note 5) 200V

Electrical Characteristics VDD=5V (Notes 1, 2)

The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for T

LM4992

Symbol Parameter Conditions

Typical Limit

(Note 6) (Notes 7, 8)

= 0V, Io= 0A, No Load 6 14 mA (max)

V

I

DD

I

SD

V

SDIH

V

SDIL

V

OS

P

o

Quiescent Power Supply Current

Shutdown Current VSD=V

Shutdown Voltage Input High 1.5 V

Shutdown Voltage Input Low 1.3 V

Output Offset Voltage 7 30 mV (max)

Output Power THD = 1% (max);f=1kHz, per

IN

V

= 0V, Io= 0A, 8Ω Load 7 18 mA (max)

IN

GND

1.4 3 µA (max)

1.07 0.9 W (min)

channel

T

WU

THD+N Total Harmonic Distortion+Noise P

Wake-up time 100 ms

= 0.5 Wrms; f = 1kHz 0.15 %

o

Xtalk Crosstalk 80 dB

V

PSRR Power Supply Rejection Ratio

= 200mV sine p-p

ripple

Input terminated with 10Ω

60 (f =
217Hz)

55 dB (min)

64 (f = 1kHz)

= 25˚C.

A

Units

(Limits)

Electrical Characteristics VDD= 3.3V (Notes 1, 2)

The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for T

LM4992

Symbol Parameter Conditions

Typical Limit

(Note 6) (Notes 7, 8)

= 0V, Io= 0A, No Load 4 12 mA (max)

V

I

DD

I

SD

V

SDIH

V

SDIL

V

OS

P

o

T

WU

Quiescent Power Supply Current

Shutdown Current VSD=V

Shutdown Voltage Input High 1.2 V

Shutdown Voltage Input Low 1.0 V

Output Offset Voltage 7 30 mV (max)

Output Power THD = 1% (max);f=1kHz, per

Wake-up time 75 ms

THD+N Total Harmonic Distortion+Noise P

IN

V

= 0V, Io= 0A, 8Ω Load 5 15 mA (max)

IN

GND

0.2 2.0 µA (max)

420 mW (min)

channel

= 0.25 Wrms; f = 1kHz 0.1 %

o

Xtalk Crosstalk 80 dB

V

PSRR Power Supply Rejection Ratio

= 200mV sine p-p

ripple

Input terminated with 10Ω

65 (f =
217Hz)

55 dB (min)

70 (f = 1kHz)

= 25˚C.

A

Units

(Limits)

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Electrical Characteristics VDD= 2.6V (Notes 1, 2)

The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for T

LM4992

LM4992

Symbol Parameter Conditions

Typical Limit

(Note 6) (Notes 7, 8)

= 0V, Io= 0A, No Load 4.0 mA (max)

V

I

DD

I

SD

V

SDIH

V

SDIL

V

OS

P

o

Quiescent Power Supply Current

Shutdown Current VSD=V

Shutdown Voltage Input High 1.2 V

Shutdown Voltage Input Low 1.0 V

Output Offset Voltage 5 30 mV (max)

Output Power THD = 1% (max);f=1kHz, per

IN

V

= 0V, Io= 0A, 8Ω Load 6.0 mA (max)

IN

GND

0.02 2.0 µA (max)

240

channel

T

WU

THD+N Total Harmonic Distortion+Noise P

Wake-up time 70 ms

= 0.15 Wrms; f = 1kHz 0.1 %

o

Xtalk Crosstalk 80 dB

V

PSRR Power Supply Rejection Ratio

= 200mV sine p-p

ripple

Input terminated with 10Ω

51 (f =
217Hz)
51 (f = 1kHz)

Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.

Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional, but do not guarantee specific performance limits. Electrical Characteristics state DC andAC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.

Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation is P

Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor.

Note 5: Machine Model, 220pF–240pF discharged through all pins.

Note 6: Typicals are measured at 25˚C and represent the parametric norm.

Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.

Note 9: R

Note 10: If the product is in Shutdown mode and V

If the source impedance limits the current to a max of 10mA, then the device will be protected. If the device is enabled when V

6.5V, no damage will occur, although operation life will be reduced. Operation above 6.5V with no current limit will result in permanent damage.

Note 11: Maximum power dissipation in the device (P
Equation 1 shown in the Application Information section. It may also be obtained from the power dissipation graphs.

is measured from the output pin to ground. This value represents the parallel combination of the 10kΩ output resistors and the two 20kΩ resistors.

OUT

DMAX

=(T

)/θJAor the number given in Absolute Maximum Ratings, whichever is lower.

JMAX–TA

exceeds 6V (to a max of 8V VDD), then most of the excess current will flow through the ESD protection circuits.

DD

) occurs at an output power level significantly below full output power. P

DMAX

, θJA, and the ambient temperature TA. The maximum

JMAX

is greater than 5.5V and less than

DD

DMAX

A

can be calculated using

= 25˚C.

Units

(Limits)

mW (min)

dB (min)

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External Components Description

(Figure 1)

Components Functional Description

1. R

2. C

3. R

4. C

Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a

i

high pass filter with C

Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a

i

highpass filter with R
for an explanation of how to determine the value of C

Feedback resistance which sets the closed-loop gain in conjunction with Ri.

f

Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing

S

at fC= 1/(2π RiCi).

i

at fc= 1/(2π RiCi). Refer to the section, Proper Selection of External Components,

i

.

i

section for information concerning proper placement and selection of the supply bypass capacitor.

5. C

Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External

B

Components, for information concerning proper placement and selection of C

Typical Performance Characteristics

LM4992

.

B

THD+N vs Frequency

= 5V, 8Ω RL,

at V

DD

and PWR = 500mW, per channel

THD+N vs Frequency

= 2.6V, 8Ω RL,

at V

DD

and PWR = 150mW, per channel

THD+N vs Frequency
at VDD= 3.3V, 8Ω RL,

and PWR = 250mW, per channel

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THD+N vs Power Out

at VDD= 5V, 8Ω RL,

1kHz, per channel

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