National Semiconductor LM4918 Technical data

LM4918
Stereo Audio Amp with AGC Control

LM4918 Stereo Audio Amp with AGC Control

February 2004

General Description

The LM4918 is a monolithic integrated circuit that provides a
automatic gain control (AGC), and stereo bridged audio
power amplifiers capable of producing 1W into 8Ω with less
than 1.0% THD.

®

Boomer
to provide high quality audio while requiring a minimum
amount of external components. The LM4918 incorporates a
AGC and stereo bridged audio power amplifiers making it
optimally suited for multimedia monitors, portable radios,
desktop and portable computer applications.

The LM4918 features an externally controlled, low-power
consumption shutdown mode, and a power amplifier mute
for maximum system flexibility and performance.

audio integrated circuits were designed specifically

Typical Application

Key Specifications

j

THD+N at 1kHz, 1W, 8Ω 0.3% (typ)

j

Total quiescent power supply current 18mA (typ)

j

Total shutdown power supply current 1µA (typ)

Features

n 0.75dB per step/32step AGC Control Interface
n Automatic Gain Control Circuitry
n Stereo Bridged power amplifiers
n “Click and pop” suppression circuitry
n Thermal shutdown protection circuitry
n Selectable Auto Detect Std-by mode and Logic control

Applications

n Portable Computers
n Desktop Computers
n Multimedia monitors

20091301

FIGURE 1. Typical Audio Amplifier Application Circuit

Boomer®is a registered trademark of National Semiconductor Corporation.

© 2004 National Semiconductor Corporation DS200913 www.national.com

Connection Diagrams

LM4918

LQ Package

Top View

Order Number LM4918LQ

See NS Package Number LQA32B

LQ Marking

200913H7

Top View

NS - Std NS Logo

U - Wafer Fab Code

Z - Assembly Plant Code

XY - 2 Digit Date Code

TT - Die Run Traceability

L4918LQ - LM4918LQ

20091302

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LM4918

Absolute Maximum Ratings (Note 2)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Thermal Resistance

θ

(LLP) 51˚C/W

JA

See AN-1187 ’Leadless
Leadframe Packaging (LLP).’

Supply Voltage 6.0V

Storage Temperature −65˚C to +150˚C

Input Voltage −0.3V to V

DD

+0.3V

Power Dissipation (Note 3) Internally Limited

ESD Susceptibility (Note 4) 2000V

ESD Susceptibility (Note 5) 200V

Operating Ratings

Temperature Range

T

≤ TA≤ T

MIN

MAX

Supply Voltage 2.7V ≤ V

−40˚C ≤ TA≤ +85˚C

DD

≤ 5.5V

Junction Temperature 150˚C

Electrical Characteristics Unless otherwise specified, all limits are guaranteed to T

Symbol Parameter Conditions

= 25˚C, VDD= 5.0V.

j

LM4918

Typical Limit

Units

(Limits)

Common Portion

V

I

DD

I

SDIH

I

std-by

V

V

DD

Supply Voltage

2.7

5.5

Quiescent Supply Current Vin= 0V, Io= 0A 18 25 mA (max)

Shutdown Current VSD=V

Stand-By Current V

ih

il

Logic High 0.8xVdd V (min)

Logic Low 0.2xVdd V (max)

DD

std-by=Vdd

1 2 µA (max)

1 2 mA (max)

V(min)

V(max)

AGC Volume

AGC Vol max Max gain

AGC Vol min Min gain

Vol control in ^ 4.5V 0

0

Vol control in % 0.5V -24 -22

0.5

-0.5

-26

db(max)
dB(min)

dB(max)

dB(min)

AGC Step Size .75 dB

AGC Control Block

Vdisch Voltage on Rdisch 1.2 V

Idisch Discharge Current on Chold 320 nA

Vos Offset Voltage V

Av Inv Inverting amp gain Vagcref = 4.5V 0

=0V 10 mV

IN

±

0.5 dB

Std-by Detect

Vin Input Sig Threshold Level

Twait Wait time C

14
50

= 10µF 10 sec

_STBY

mVpk
mVpk

Power Amp Block

Vos Output Offset Voltage Vin = 0V 10 40 mV(max)

Po Output Power THD = 1%, F = 1kHz, R

THD+N Total Harmonic Distortion+Noise

PSRR Power Supply Rejection Ratio

20Hz % f ^ 20kHz, Avd = 2,

=8Ω,Po=1W

R

l

Vdd = 5V, Vripple = 200mVrms,
Rl=8Ω, Cb = 1.0µF

=8Ω 1.1 1.0 W(min)

l

0.3

67

%

dB

Xtalk Channel Separation in SE F = 1kHz, Cb = 1.0µF 60 dB

Xtalk Channel Separation in BTL F = 1kHz, Cb = 1.0µF 76 dB

SNR Signal to Noise Ratio Vdd = 5V, Po= 1.1W, R

=8Ω 109 dB

l

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Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.

Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional, but do not guarantee specific performance limits. Electrical Characteristics state DC andAC electrical specifications under particular test conditions which

LM4918

guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.

Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation is P
curves for additional information.

DMAX

=(T

)/θJAor the number given inAbsolute Maximum Ratings, whichever is lower. For the LM4918, see power derating

JMAX–TA

, θJA, and the ambient temperature TA. The maximum

JMAX

Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor.

Note 5: Machine Model, 220pF– 240pF discharged through all pins.

Note 6: Typicals are measured at 25˚C and represent the parametric norm.

Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.

Note 9: R

Note 10: If the product is in Shutdown mode and V

If the source impedance limits the current to a max of 10mA, then the device will be protected. If the device is enabled when V

6.5V, no damage will occur, although operation life will be reduced. Operation above 6.5V with no current limit will result in permanent damage.

Note 11: Maximum power dissipation in the device (P
Equation 1 shown in the Application Information section. It may also be obtained from the power dissipation graphs.

Note 12: Data taken at VagcRef = V

is measured from the output pin to ground. This value represents the parallel combination of the 10kΩ output resistors and the two 20kΩ resistors.

OUT

and Power Amp Gain set to A = 2.

DD

exceeds 6V (to a max of 8V VDD), then most of the excess current will flow through the ESD protection circuits.

DD

) occurs at an output power level significantly below full output power. P

DMAX

is greater than 5.5V and less than

DD

can be calculated using

DMAX

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Typical Performance Characteristics (Note 12)

LM4918

THD+N vs Frequency

= 3V, RL=4Ω, BTL, PO= 225mW

V

DD

THD+N vs Frequency

= 5V, RL=8Ω, BTL, PO= 400mW

V

DD

THD+N vs Frequency

VDD= 3V, RL=8Ω, BTL, PO= 275mW

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THD+N vs Frequency

VDD= 5V, RL=32Ω, SE, PO= 40mW

THD+N vs Frequency

= 3V, RL=32Ω, SE, PO= 25mW

V

DD

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THD+N vs Output Power

VDD= 3V, RL=4Ω, BTL

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Typical Performance Characteristics (Note 12) (Continued)

LM4918

THD+N vs Output Power

V

= 3V, RL=8Ω, BTL

DD

THD+N vs Output Power

= 3V, RL=32Ω,SE

V

DD

THD+N vs Output Power

VDD= 5V, RL=8Ω, BTL

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THD+N vs Output Power

VDD= 5V, RL=32Ω,SE

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Output Power vs Load Resistance

BTL

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Output Power vs Load Resistance

SE