National Semiconductor CLINK3V28BT-85 User Manual
Channel Link Evaluation Kit User Manual
Channel Link Demonstration Kit
User Manual
P/N CLINK3V28BT-85
Rev 2.1
Interface Products
National Semiconductor Corporation
Interface Products
LIT# CLINK3V28BT-85-UM
Rev 2.1
Date: 10/12/2005
Page 1 of 28
Channel Link Evaluation Kit User Manual
Table of Contents
INTRODUCTION ............................................................................................................ 3
CONTENTS OF DEMO KIT............................................................................................ 4
APPLICATIONS ............................................................................................................. 4
FEATURES AND EXPLANATIONS.................................................................................
TRANSMITTER................................................................................................................ 6
RECEIVER ................................................................................................................... 11
HOW TO HOOK UP THE DEMO BOARDS (OVERVIEW) ............................................ 5
TRANSMITTER BOARD ................................................................................................ 6
SELECTABLE JUMPER SETTINGS FOR THE TX BOARD ........................................................ 6
LVDS MAPPING BY IDC CONNECTOR ............................................................................. 6
TX OPTIONAL: PARALLEL TERMINATION FOR TXIN........................................................... 9
BOM (BILL OF MATERIALS) .......................................................................................... 10
RECEIVER BOARD ..................................................................................................... 11
SELECTABLE JUMPER SETTINGS FOR THE RX BOARD ..................................................... 12
LVDS MAPPING BY IDC CONNECTOR ........................................................................... 13
RX OPTIONAL: SERIES TERMINATION FOR RXOUT ......................................................... 14
BOM (BILL OF MATERIALS) .......................................................................................... 15
TROUBLESHOOTING ................................................................................................. 19
ADDITIONAL INFORMATION...................................................................................... 20
PPLICATION NOTES .................................................................................................... 20
A
APPENDIX ................................................................................................................... 21
26-MINI D CABLE AND CONNECTOR ............................................................................... 21
T
RANSMITTER AND RECEIVER SCHEMATICS ................................................................... 28
National Semiconductor Corporation
Interface Products
LIT# CLINK3V28BT-85-UM
Rev 2.1
Date: 10/12/2005
Page 2 of 28
Channel Link Evaluation Kit User Manual
Introduction:
National Semiconductor - Interface Products Group Channel Link evaluation kit
contains a Transmitter (Tx) board, a Receiver (Rx) board along with interfacing
cables. This kit will demonstrate the Channel Link chipset transmitting data streams
using Low Voltage Differential Signaling (LVDS).
The Transmitter board accepts LVTTL/LVCMOS data signals from an incoming data
source along with the clock signal. The LVDS Transmitter converts the
LVTTL/LVCMOS parallel lines into four serialized LVDS data pairs plus a LVDS
clock. The serial data streams toggle at 3.5 times the clock rate.
The Receiver board accepts the LVDS serialized data streams plus clock and
converts the data back into parallel LVTTL/LVCMOS data signals and clock.
The user simply needs to provide the proper LVTTL/LVCMOS data input and clock
to the Transmitter and the chipset will serialize, transmit, and deserialize the data
converting it back into the LVTTL/LVCMOS parallel bus plus clock. A power down
feature is also provided that reduces current draw when the link is not required.
National Semiconductor Corporation
Interface Products
LIT# CLINK3V28BT-85-UM
Rev 2.1
Date: 10/12/2005
Page 3 of 28
Channel Link Evaluation Kit User Manual
Contents of the Evaluation Kit:
1) One Transmitter board with the DS90CR287MTD - 28 bit Transmitter
2) One Receiver board with the DS90CR288AMTD - 28 bit Receiver
3) One 2-meter Amphenol Spectra Strip Cable interface
4) One 60-pin IDC Flat Ribbon Cable
5) Evaluation Kit Documentation (this manual)
6) DS90CR287/288A Datasheet
7) Channel Link Application Notes AN-1041 and AN-1108
Channel Link Typical Application:
TxIN
LVCMOS/
LVTTL
25
26
27
/PD
TxCLK
TX
DS90CR287
0
1
2
PCB
LVDS Cable
(media dependent)
GND
SHIELD
RX
DS90CR288A
RxOUT
0
1
2
25
26
27
/PD
RxCLK
PCB
The diagram above illustrates the use of the Channel Link chipset (Tx/Rx). This
chipset is able to transmit 28 bits of LVTTL/LVCMOS data using four LVDS channels
for a total throughput of 2.38 Gbps (297.5 Mbytes/s).
Input clock rate is specified to be between 20 MHz to 85 MHz maximum. The
interconnect between the two devices may be a variety of media including: twisted
pair cables, twin-ax cables, and / or backplanes for example. Driving between the
two devices is a function of interconnect skew and clock rate. Distances up to ten
meters are possible at the lower clock rates and distances of 1 to 2 meters is
possible at the higher clock rates. Please refer to the chipset datasheet for more
information and parametric tables.
National Semiconductor Corporation
Interface Products
LIT# CLINK3V28BT-85-UM
Rev 2.1
Date: 10/12/2005
Page 4 of 28
Channel Link Evaluation Kit User Manual
How to set up the Evaluation Kit:
The PCB routing for the Tx input pins (TxIN) have been laid out to accept incoming
data from a 60-pin IDC connector. The TxOUT/RxIN interface uses the 3M MDR
connector and Spectra Strip cable. This typical cable provides minimal skew
between LVDS channels and can typically support longer lengths than atwisted pair
cable. Please follow these steps to set up the evaluation kit for bench testing and
performance measurements:
1) Connect one end of the Spectra Strip cable to the transmitter board and the other
end to the receiver board. This is a standard pinout cable, longer lengths are
available for purchase from Alliance Technology – see www.alliancet.com
2) Jumpers have been configured at the factory, they should not require any
changes for operation of the chipset. See text on Jumper settings for more
details.
3) For the incoming data, connect a flat (ribbon) cable to the transmitter board to a
data source (signal generator, pattern generator, BERT tester, etc). Connect the
60-pin flat cable from the receiver board to the receiver load (BERT or other
equipment). Scope probes may also be connected directly to the pins if desired.
Mini-coax cable with headers on one end may also be used. This type of cable is
supplied with some test equipment. The 60-pin IDC equipment interface cable is
supplied with this kit which can be used to build custom cables.
4) Power for the Tx and Rx boards must be supplied externally through TP1 (Vcc).
Grounds for both boards are connected through TP2 (GND) (see section below).
5) Data applied to the inputs is now serialized, transmitted, deserialized and redriven at the receiver outputs.
This evaluation kit can also be used to evaluate the performance of other National
Semiconductor’s 28-bit and 21-bit Channel Link Serdes chipset. Simply replace the
existing DS90CR287/288A devices with a different 28-bit or 21-bit device chipset
and follow the above procedure. For evaluation of 21-bit device chipset, user needs
to pull TxIN[21:27] high or low.
Power Connection:
The Transmitter and Receiver boards must be powered by supplying power
externally through TP1 (Vcc) and TP2 (GND) on EACH board. Information on
maximum supply voltage can be found on device datasheet’s Absolute Maximum
Ratings section. The maximum voltage that should ever be applied to the Channel
Link Transmitter (DS90CR287) or Receiver (DS90CR288A) Vcc terminal is +4V
MAXIMUM.
National Semiconductor Corporation
Interface Products
LIT# CLINK3V28BT-85-UM
Rev 2.1
Date: 10/12/2005
Page 5 of 28
Channel Link Evaluation Kit User Manual
Channel Link Transmitter Board Description:
J1 (60 position) accepts 28 bit LVTTL/LVCMOS data, clock and also the PD* control
signal.
The Channel Link Transmitter board is powered externally. For the transmitter to be
operational, the Power Down pin must be set HIGH with a jumper.
The 3M MDR connector (J2) provides the interface for LVDS signals for the
Receiver board.
60-pin IDC Connector
1 2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND
TXIN0
TXIN1
TXIN2
TXIN3
TXIN4
TXIN5
TXIN6
TXIN7
TXIN8
TXIN9
TXIN10
TXIN11
TXIN12
TXIN13
TXIN14
TXIN15
TXIN16
TXIN17
TXIN18
TXIN19
TXIN20
TXIN21
TXIN22
TXIN23
TXIN24
TXIN25
TXIN26
TXIN27
TXCLKIN
59 60
J1
Vcc and Gnd MUST be
applied externally here
/PD
TxOUT LVDS signals
3M MDR connector
Pin 1
NC OUT0-
GND OUT0+
NC NC
OUT1- GND
OUT1+ NC
OUT2- GND
OUT2+ NC
NC NC
NC CLK-
GND CLK+
NC NC
OUT3- GND
OUT3+ NC
Pin 13
Pin 14
Pin 26
J2
Note: JP1 is not used
National Semiconductor Corporation
Interface Products
LIT# CLINK3V28BT-85-UM
Rev 2.1
Date: 10/12/2005
Page 6 of 28
Channel Link Evaluation Kit User Manual
Jumper Settings for the Tx Board
Jumper Purpose Settings
/PD PowerDown = ON = OFF
(JP2) Vcc GND Vcc GND
(ON: Tx is operational; OFF: Tx powers down)
Default setting is JP2 set HIGH (to Vcc), operational mode.
National Semiconductor Corporation
Interface Products
LIT# CLINK3V28BT-85-UM
Rev 2.1
Date: 10/12/2005
Page 7 of 28
Channel Link Evaluation Kit User Manual
0
0
3
Tx LVDS Mapping by IDC Connector
The following two figures illustrate how the Tx inputs are mapped to the IDC
connector (J1) (Note – labels are also printed on the demo boards). The 26-pin
MDR connector pinout is also shown.
(Transmitter Board)
60-pin IDC Connector
Pin 1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND
TXIN0
TXIN1
TXIN2
TXIN3
TXIN4
TXIN5
TXIN6
TXIN7
TXIN8
TXIN9
TXIN10
TXIN11
TXIN12
TXIN13
TXIN14
TXIN15
TXIN16
TXIN17
TXIN18
TXIN19
TXIN20
TXIN21
TXIN22
TXIN23
TXIN24
TXIN25
TXIN26
TXIN27
TXCLKIN
J1
2
TXOUT
TXOUT
TXOUT1
TXOUT1
TXOUT1
TXOUT2
TXOUT2
60 59
TXOUT
TxOUT LVDS signals
3M MDR connector
PIN # NAME
1 NC
2
GND
3 NC
OUT1-
4
OUT1+
5
OUT2-
6
OUT2+
7
8 NC
9 NC
10
GND
11 NC
OUT3-
12
OUT3+
13
OUT0-
14
OUT0+
15
16 NC
17
GND
18 NC
19
GND
20 NC
21 NC
CLK-
22
CLK+
23
24 NC
25
GND
26 NC
J2
TXCLKOUT
Previous Cycle
TXOUT3
TXOUT2
TXOUT1
TXOUT0
Parallel LVTTL/LVCMOS Data Inputs Mapped to LVDS Outputs
TXIN23 TXIN17 TXIN16 TXIN11 TXIN10 TXIN5 TXIN27
TXIN26 TXIN25 TXIN24 TXIN22 TXIN21 TXIN20 TXIN19
TXIN18 TXIN15 TXIN14 TXIN13 TXIN12 TXIN9 TXIN8
TXIN7 TXIN6 TXIN4 TXIN3 TXIN2 TXIN1 TXIN0
Next Cycle
LIT# CLINK3V28BT-85-UM
National Semiconductor Corporation
Interface Products
Rev 2.1
Date: 10/12/2005
Page 8 of 28
Channel Link Evaluation Kit User Manual
Tx Board Options: 50 Ohm Termination for TxIN
On the Tx demo board, the 29 inputs have an option for 50 Ohm terminations.
There are 0402 pads for this purpose. One side is connected to the signal line and
the other side is tied to ground. These pads are unpopulated from the factory but
are provided if the user needs to install a 50 Ohm termination. R1 TO R28 are
associated with the Tx data input lines. R29 is associated with CLKIN. Some test
equipment may require a 50 Ohm load.
Mapping of Transmitter Inputs for the Optional Termination Resistors is shown
below:
Tx Pin
Names
TxIN0 51 R1
TxIN1 52 R2
TxIN2 54 R3
TxIN3 55 R4
TxIN4 56 R5
TxIN5 2 R6
TxIN6 3 R7
TxIN7 4 R8
TxIN8 6 R9
TxIN9 7 R10
TxIN10 8 R11
TxIN11 10 R12
TxIN12 11 R13
TxIN13 12 R14
TxIN14 14 R15
TxIN15 15 R16
TxIN16 16 R17
TxIN17 18 R18
TxIN18 19 R19
TxIN19 20 R20
TxIN20 22 R21
TxIN21 23 R22
TxIN22 24 R23
TxIN23 25 R24
TxIN24 27 R25
TxIN25 28 R26
TxIN26 30 R27
TxIN27 50 R28
TxCLKIN 31 R29
Tx Pin
Number
Termination
Resistor
TX
50 Ohm Termination
(Optional)
National Semiconductor Corporation
Interface Products
LIT# CLINK3V28BT-85-UM
Rev 2.1
Date: 10/12/2005
Page 9 of 28
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