National Semiconductor ADC14071 Instruction Manual

N

August 2000

Rev 1

Evaluation Board Instruction Manual

ADC14071
14-Bit, 7 MSPS, 390mW Analog-to-Digital Converter

© 1999 National Semiconductor Corporation http://www.national.com

[Blank]

2 http://www.national.com

Table of Contents

1.0 Introduction..............................................................................................................................................................................................5

2.0 Quick Start .............................................................................................................................................................................................. 5

3.0 Functional Description............................................................................................................................................................................5

3.1 Input signal conditioning.......................................................................................................................................................5

3.2 ADC reference circuitry........................................................................................................................................................5

3.3 Board Outputs...................................................................................................................................................................... 6

3.4 Board Control....................................................................................................................................................................... 6

3.5 Data Memory........................................................................................................................................................................6

3.6 Computer Interface............................................................................................................................................................... 6

3.7 Power requirements.............................................................................................................................................................6

4.0 Installing and using the ADC14071 Evaluation Board and WaveVision Software..................................................................................6

4.1 Software Installation.............................................................................................................................................................7

4.2 Setting up the ADC14071 Evaluation Board ........................................................................................................................7

4.2.1 Board Set-up................................................................................................................................................... 7

4.2.2 Quick Check of Analog Functions..................................................................................................................7

4.2.3 Quick Check of Software and Computer Interface Operation........................................................................ 7

4.2.4 Getting Consistent Readings..........................................................................................................................8

4.2.5 Jumper Information.........................................................................................................................................8

4.2.6 Troubleshooting..............................................................................................................................................8

5.0 Exploring the Waveform.......................................................................................................................................................................... 9

5.1 Signal Purity ......................................................................................................................................................................... 9

5.1.1 Evaluating a Sine Wave..................................................................................................................................9

5.1.2 Low Frequency Triangle Wave Input..............................................................................................................9

5.1.2.1 Monotonicity and Uncertainty....................................................................................................9

5.1.2.2 Rising / Falling Symmetry.........................................................................................................10

5.2 The FFT Plot........................................................................................................................................................................10

5.2.1 Dynamic Performance Estimates................................................................................................................... 10

5.2.2 Bandwidth Estimation.....................................................................................................................................10

6.0 Computer-Board Communications......................................................................................................................................................... 10

7.0 Circuit Description and Hardware Schematics....................................................................................................................................... 10

7.1 Input, Reference and Test Device Section........................................................................................................................... 10

7.2 Control, Memory, Communications and Power Supply Section ..........................................................................................10

7.3 The Reset Button ................................................................................................................................................................. 10

7.4 Hardware Schematics..........................................................................................................................................................12

8.0 Bill of Materials........................................................................................................................................................................................14

9.0 Saving and Retrieving Files .................................................................................................................................................................... 15

9.1 Binary Files........................................................................................................................................................................... 15

9.1 ASCII Files............................................................................................................................................................................15

10.0 Evaluation Board Specifications ...........................................................................................................................................................15

APPENDIX - WaveVision Screens ............................................................................................................................................................... 16

3 http://www.national.com

[Blank]

4 http://www.national.com

1.0 Introduction

The ADC14071EVAL Design Kit (consisting of the
ADC14071 Evaluation Board, National's WaveVision
software and this m anual) is designed to ease evaluation
and design-in of National's ADC14071 14-bit, 7MSPS
Analog-to-Digital Converter.

With the WaveVision software operating under Microsoft
Windows 3.1 or later, the signal at the Analog Input is
digitized and can be captured and displayed on the
computer monitor as a dynamic waveform. The digitized
output is also available at a pair of headers, HDR1 and
HDR2, for easy connection with ribbon cables.

The software can perform an FFT on the captured data
upon command and di splay a spectral plot. This spectral
plot also shows dynamic performance i n the form of SNR,
SINAD, THD and SFDR.

Both a socketed transform er and an op-amp-based si ngle­ended to differential conversion circuit are available with
jumpers to select which is used. A prototype area is
available for building customized input conditioning circuitry.

The on-board c lock oscillator is stated as being 14MHz in
this manual , but the popular 14.31818MHz crystal is qui te
acceptable and provided with the assembled board.

Because this board us es software that i s als o used for the

2.5 MSPS ADC16061, you will see references in this manual
to the ADC16061.EXE software. For the ADC14071, be s ur e
to use Version 2.1 or l ater of the ADC16061.EXE software
with the ADC14071 choice in the Configuration Menu.

2.0 Quick Start

1. Unless the ADC14071 Evaluation Board has been pre­assembled, it needs to be assembled before
operation. Refer to
components on the board. R efer to secti on 8.0 for the
bill of materials.

2. Connect a cable with DB-25 connectors between
connector P1 on the board and an available parallel
port on your PC.

3. Position jumper s JP4 and JP5 to thei r default posi tion
as indicated i n
and JP3 opposite to their default positions.

4. Connect voltage sources ( ±12V to ±15V) and gr ound
to Power Connector P2 and turn on the power.

5. Press the RESET button (S1).

6. Adjust VR2 for 2.0V at TP1. This s ets the ADC14071
reference voltage.

7. Adjust VR1 (Balance) for equal dc voltages at T P12
and TP13 (near JP2 and JP3).

8. Copy Version 1.1 or later of the W aveVision softw are
(ADC16061.EXE) to the desired c omputer hard drive
directory and

9. Connect a 50 Ohm s ignal generator to BNC J 1 and
adjust its output for a signal excursion between the
limits of -0.5V and +0.5V.

the ADC14071 input.

10. To use the op-am p-based si ngle ended to di fferential
conversion circ uit, place jumpers JP1, JP2 and JP3

Figure 1

RUN

Figure 1

for the location of major

. Position jumpers JP1, JP2

it.

Be careful not to overdrive

opposite to their default positions. To use the
transformer T1, place jumper s JP1, JP2 and JP3 to
their default positions. When using the transformer,
the signal level at BNC J1 should be about 2V

p-p

.

11. Adjust the signal level so that LEDs D34 and D4 ar e
not on.

12. Wi th the W aveVision softwar e, select the parallel port
(under the O

13. Capture data by pressing

ptions menu) that is to be used.

-X.

CTRL

14. Perform an FFT on the data that was acquired by
pressing

CTRL

-F.

Note that earlier versions of the ADC16061 softwar e m ay be
used with the ADC14071 evaluation board. However, the
following exceptions/c hanges should be noted. T he default
oscillator divider (Board to ADC Clock Ratio) shown when

+P is pressed is "8", which real ly causes a divide by 4

CTRL

for tha ADC14071 board. So with a 14.31818MHz crystal in
place, the ADC clock frequency would be 3.579545MHz.
The divide by ratio should be changed to "4", whi ch w ill yield
a divider of 2 and an ADC clock frequenc y of 7.15909MHz.
When per forming an FF T on the captured w aveform, it wil l
be necessary to change the indi cated Sam pl ing R ate for the
data if the horizontal axis of the display is changed to
frequency. You can make this change by double cl i cki ng the
left mouse button with the cursor over the FFT display.

3.0 Functional Description

Figure 7

shows the block diagram of the ADC14071
evaluation board, while
schematic. U4 is the ADC14071 under test.

3.1 Input signal conditioning.

The board contains a breadboard area to be used as
needed. The input signal to be digitized shoul d be appli ed to
BNC connector J1. F or sinusoi dal input s ignals you should
include an appropr iate bandpass filter i n the input circuitry
because the signal from any generator will usually contain
more distor ti on than that produc ed by a 14-bit ADC. Without
the input filter, the measured performance will not be as
good as the ADC14071 capability.

Note that the input signal to the ADC14071 should not swing
below ground, or go above the ADC14071 analog supply,
VA, to avoid damage to the device. To avoid si gnal c lippi ng
at the ADC output, the signal at the ADC i nput pins s hould
have a peak-to-peak value less than V
VREF/2.

To get the correc t differenti al 4V
the ADC14071 input, the transformer requires a 2 V
signal at J1, while the op-amp circuit requires a 1 V
signal centered at 0V to be applied at J1.

3.2 ADC reference circuitry.

The ADC14071 operates with a nominal reference voltage of

2.0V. The acceptable reference voltage range is

This board, if assembled, comes with a LM4041-ADJ
adjustable reference. The nominal range of adjus tment in
this circuit is 1.3V to 2.8V.

Figures 8

1.0V ≤ V

and 9 show the board

, centered around

REF

centered at VREF/2 at

P-P

≤ 2.7V.

REF

P-P
P-P

5 http://www.national.com

Signal

Input

J1

DRV

Select

JP1 & JP2

V

REF

Test

Point

Jumper
default
positions

JP1

JP2 &

JP3

Input

Select

JP1

JP4 &

JP6

VR1

U4

D3

Over

Range

MADE IN USA

VR2

U2U1

VREF

U3

L4

RP1

JP6

U9

D4

Under
Range

Reference

Adjust

VR2

TP8

TP6

TP7

+12V

+5V

-12V

L3
L2

DGND

RP2

HDR1
HDR2

TP2

TP9

OR

PLD CLK

JP4

CLK SEL

Y1

NATIONAL S EMICONDUCT OR

DATA CONVERSION SYSTEMS GROUP

Clock Source

Select

JP4

Balance

ADC14071 Eva luation Board

JP1

TP11

AGND

J1

JP3 JP2

TP13

T1

TP3

PD

ADC C LK

CLK

AGND

Breadboard

Area

VR1

TP12

TP4

D5

ADC14071

TP5
OE

DGND

Figure 1. Component and Test Point Locations

U8

U6

Power

Connector

P2

L1

R37

L5

S1

JP5

DGND

Termination

U7

D6

COMMO

EXT CL K

Clock

RP3

TP10

JP5

Parallel Port

Connector

P1

P1

S1

Reset

Button

J2

Ext. Clock

Input

J2

3.3 Board Outputs.

Uploading of data to a PC running WaveVision is
accomplished through Parallel Port connector P1.

The buffered digital data from the ADC14071 output, as wel l
as a clock si gnal for thi s data, is available at 20 pin header s
HDR1 and HDR2. These connectors have all the even
numbered pins grounded and are suitable for connecting
ribbon cables to the board.

LEDs provide visual indic ation of the condition of the board.
Red LED D5, when lit, indi c ates that a c l ock si gnal i s pr esent
at the clock input to the ADC14071. Yell ow LED D 6 indi c ates
the status of board-PC communications. The board is
sending data to the computer when this LED is on.

Two LEDs are provided as an indicator that the input to the
ADC is beyond the ADC's range. Yell ow LED D3 indic ates
when the input is beyond the maxim um positi ve range, whi le
Greed LED D4 indic ates w hen the input is beyond the low est
negative value allowable to avoid signal cl ipping. Input si gnal
levels that just prevent these LEDs from coming on will
provide maximum SNR performance.

3.4 Board Control.

PLD U6 is a state machine that performs the control functions
of the board. It also contains registers and logic used to move
data. The functions of this device are:

•

Write acquired data to RAM.

•

Accept and interpret commands from the computer.

•

Divide the clock input frequency per command.

•

Upload data in RAM to PC via parallel port.

3.5 Data Memory.

The data memory consists of a single 64k x 16 RAM chip, U7.
Data is written to RAM from the ADC14071 by way of PLD

U6. During data acquisi ti on, the RAM address i s inc rem ented
by U6. After the data is gathered and loaded into RAM, it is
read from RAM by U6 and sent over the computer-board
cable. The number of words sent is determined by the
instructions from the host computer.

3.6 Computer Interface.

The board communicates with a host computer through a
parallel interface. The data path is through the DB-25
connector P1, located at the right side of the board. The
parallel interfac e uses a PC parallel port that m ust support
either EPP mode or ECP mode.

3.7 Power requirements.

Power is supplied to thi s board through power c onnector P2
at the top right of the board. T he board requires 1 Amp at
+12V to +15V and 10mA at -12V to -15V. The board is
protected from ac cidental polari ty reversal with seri es diodes
in both the positive and negative supply lines.

4.0 Installing and using the ADC14071 Evaluation
Board and WaveVision Software

The evaluation board requires power as described in
paragraph 3.7. No input signals for evaluation are generated
on the board. An appropriate signal generator (such as
HP8662A) with a 50- to 75-Ohm source impedance should be
used to evaluate the performance of the ADC14071. The
generator output should be filter ed by a bandpass filter when
evaluating sinusoidal signals to eliminate unwanted
frequencies (harm onics and noise) from the generator. This
will provide dynamic readings that are a more accurate
assessment of the converter performance than you would
obtain without the filter. Thi s is because even the best si gnal

6 http://www.national.com

generators can not provide a level of dis torti on l ow enough to
evaluate high resolution ADCs.

4.1 Software Installation

The WaveVision software provided requires 300k bytes of
hard drive space and will run under Windows 3.1 or later.

1. Insert the disk into a 3.5" floppy drive.

2. Copy the program ADC16061.EXE to the desired
subdirectory on you computer's hard disk and

RUN

it.

4.2 Setting up the ADC14071 Evaluation Board

This evaluation package was designed to be easy and sim pl e
to use, and to provide a quick and sim pl e way to evaluate the
ADC14071. The procedures given here will help you to
properly set up the board.

4.2.1 Board Set-up

Refer to

Figure 1

for locations of connectors , test points and

jumpers on the board.

1. Set jumpers to their default position, or as desired.

Table 1

explains the function of the jumpers. J umpers
JP1, JP2 and JP3 should all be moved together. That is
all of these shoul d be ei ther i n thei r defaul t pos i tions or
all not in their default positions.

2. Connect power to the board per requirements of
paragraph 3.7.

3. Connect a cable with DB-25 connector between board
connector P1 and a parallel port on your computer.

4. Be sure a 14MHz (14.31818MHz is fine) clock osc illator
(Y1) is in pl ace, or c onnect an external cloc k source to
BNC J2, at the lower right corner of the board.

5. Be sure jumper JP4 is set to select the c lock source
used. The default position selects the on-board
oscillator, Y1.

6. If using an external cloc k source, place a shor ting bar
across the pins of JP5 to terminate the cl ock input, if
needed and connect a clock source to BNC J2.

7. Connect an appropriate signal source to J1.

8. Turn on the power and press reset button (S1). Confirm
that Red LED D5 is on, indicating the clock presence.

4.2.2 Quick Check of Analog Functions

Refer to Figure 1 for l ocations of connectors , test points and
jumpers on the board. If at any time the expected response i s
not obtained, see section 4.2.6 on Troubleshooting.

1. Perform steps 1 through 8 of Section 4.2.1. Adjust the
input signal at J1 for 1V

P-P

.

2. JP4 - Short left two pins to s elect the on-board clock
oscillator (Default position).

3. JP1 - Short upper two pins of JP1 and the right two pins
of JP2 and JP3 to use the op-amp circuitry (Default
positions).

4. Turn on the power to the board.

5. Adjust VR2 for a voltage of 2.0V at TP1.

6. Scope TP4 to confirm the presence of an ADC clock.

7. Scope the signals at TP12 and T P13 to be sure they
are present at a 2V

P-P

level.

8. JP1 - Remove the short on the upper two pins of JP1
and the right two pins of J P2 and JP3. Short l ower two
pins of JP1 and the left two pi ns of JP2 and J P3 to us e
the to use the transformer T1.

9. Adjust the signal sour ce at Analog Input J1 for a s ignal
amplitude of approximately 2V

, centered at ground.

P-P

10. Scope the signals at TP12 and T P13 to be sure they
are present at a 2V

level between ground and +2V.

P-P

11. Short right two pins of JP4 to s elect an external clock
source. Connect a clock source to BNC J2.

12. Scope TP4 to confirm the presence of an ADC clock.

This completes the testing of the analog portion of the
evaluation board.

4.2.3 Quick Check of Software and Computer Interface

Operation

1. Perform steps 1 through 5 of Paragraph 4.2.2, above.

2. Turn on the power to the board and pres s r eset button
(S1).

3. Supply a 1Vp-p sine wave of about 1MHz at Analog
Input BNC J1 and adjust it so that yellow and green
LEDs D3 and D4 are not on.

4. If only one of these LEDs is on, adjus t VR2 until they
are both off or both on, then go back to step 3.

5. Be sure there is an i nterconnecting cable between the
board and your computer parallel port.

6. Run program ADC16061.EXE.

7. Acquire data by clicking on the ACQUIRE icon or by
pressing

, P, X or

ALT

-X. Data transfer and

CTRL

calculations can take a few seconds.

8. When transfer is complete, the data window should
show many sine waves. The di s play may show a near ly
solid area of red, which is O.K.

Figure 2. The WaveVision captured display of a 1MHz sine wave
at 7MSPS. The input signal should be filtered to remove
harmonic distortion and should be stable to prevent averaging of
the data in the FFT process.

9. Note the max and min codes at the upper right of the
data window. These should be within the limits of
±8190. If the signal is outsi de of these l i m i ts, the si gnal
may be clipped (and dis tor ted). If this i s the c ase, l ower
the input level to the board and go back to step 7.

10. With the mouse, you may clilck and drag to select a
small portion of the displayed waveform for better
examination.

11. Click on the FFT icon or type

ALT

, P, F or

CTRL

-F.

The FFT data will provide a measurement of SINAD, SNR,
THD and SFDR (See

Figure 3

), easing the performance

verification of the ADC14071.

7 http://www.national.com

Figure 3. FFT display of the signal in Figure 2 showin

g

performance of the ADC14071. From this display, the noise floor
can be estimated and spurious signals can be identified. Note
the display of SINAD, SNR, THD and SFDR to the right of the
plot.

4.2.4 Getting Consistent Readings

Artifacts c an result when we perform an FFT on a di gitized
waveform, producing inconsistent results when testing
repeatedly. The presenc e of these artifacts means that the
ADC under test may perform better than our m easurements
would indicate.

We can eliminate the need for windowing and get more
consistent resul ts if we observe the proper ratios between the
input and sampling frequencies. This greatly increases the
spectral resolution of the FFT, allowing us to more accurately
evaluate the spectral respons e of the A/D converter. W hen
we do this, however, we must be sure that the input si gnal
has high spectr al purity and stability and that the sampling
clock si gnal is extremely stable wi th minim al jitter . Coherent
sampling of a periodic waveform occurs when an integer
number of cycles exists in the sample window. The
relationshi p between the num ber of cycles sam pl ed ( CY), the
number of samples taken (SS), the signal input frequency
(fin) and the sample rate (fs), for coherent sampling, is

f

CY

in

=

f

SS

s

CY, the number of cycles in the data record, must be an
integer number and SS, the number of samples i n the rec or d,
must be a factor of 2 integer. For optimum res ults , CY s hould
also be a prime number.

Further, fin (signal input frequency) and fs (sampling rate)
should be locked to eac h other. If they come from the same
generator, whatever frequency instability (jitter) is present in
the two signals will cancel each other.

Windowing (an FFT Option under WaveVision) should be
turned off for coherent sampling.

4.2.5 Jumper Information

indicates the func tion and use of the j umpers on the

Table 1

ADC14071 evaluation board.

JUMPER FUNCTION

JP1 Input Select

JP2 & JP3

JP4

JP5

4.2.6 Troubleshooting

"Error Transmitting", "Parallel Port Time Out Error" and/or
"Failed to communi cate with the boar d on LPT 1" err ors m ean
communication was unsuccessful. Try the following:

•

•

•

•

•

•

•

•

If there is no output from the ADC14071, perform the
following:

•

•

•

•

•

Select Input

to drive ADC
Select Clock

Source

Ext. Clock

Termination

Table 1. Jumper settings.

Be sure that the ADC14071 board is connected to a
parallel pri nter port supporti ng ECP or EPP m odes and
has power.
Be sure that a jumper is present on J4.
Ascertain that a 14MHz clock oscillator is properly
inserted into the socket at Y1, or that a TT L-l evel clock
signal is present at J2. Check to see that LED D5 is on.
Be sure cable connections are solid.
Be sure that the board to computer c able i s one wi th all
wires present
Be sure the correct parallel port is selected.
Reset the evaluation board by pressing button S1 and
try again.
Be sure that the parallel port jumper within the
computer or BIOS settings is set to enable bi-directional
EPP or ECP modes.

Be sure proper voltages and polarities are at the correct
pins of power connector P2. Chec k for corr ect voltages
at TP6, TP7 and TP8 at the top center of the board.

Look at the min/max code note at the upper right of the
data window. If the signal level is very low and does not
cross zero, it will be off the screen. If this is the case,
press

,-V, A and set the Y-axis min and m ax so that

ALT

the plot may be viewed. If you set the min higher than
the max, the program will abort.

Be sure clock signal is present at TP4.
Check for presence of jumpers on JP1, JP2 and JP3.
Reset the evaluation board by pressing button S1 and

try again.

PINS 1 & 2

SHORTED

Select

Transformer

Select

Transformer

External

Clock

50-Ohm

TerminationNoTermination

PINS 2 & 3
SHORTED

Select Op-

Amp Circuit

Select Op-

Amp Circuit

On-Board

Clock

8 http://www.national.com

If the displayed waveform appears to be garbage, or if the
FFT plot shows nothing but noise with no apparent signal,
reset the evaluation board by pressing button S1 and try
again.

If the performance is significantly better with the op-amp
circuit than it is with the transformer, the transformer may
need to be replaced. We have found that only one out of 10 of
these transformers perform satisfactorily.

5.0 Exploring the Waveform

WaveVision software and the ADC14071 Evaluation Board
add a new tool to the desi gner's toolbox. T he software and
evaluation board can be used to capture a signal. The
captured data can then be dis played on a computer monitor
and performance parameters can be estimated.

After the ADC14071 Evaluation Board has uploaded a
captured waveform to the PC, WaveVision displays this
waveform on the computer m onitor. You should realize that
any amplifier used before the ADC14071 can affect the
apparent performance of the ADC because most available
amplifi ers exhibit more distorti on than does the ADC14071.
The characteri stic s of any transform er you may use can also
affect the overall circuit performance.

See the Appendix for WaveVision screen drawings of
software operation.

5.1 Signal Purity

Most sine wave generators can not produce a signal pure
enough to adequately evaluate a 14-bit ADC. Since the
SINAD of a perfect 14 bit ADC is 86dB, any input signal
should be at least 6dB better than this, or have a SINAD of
92dB or better! Even very expensive, high-performance signal
generators, generally, can not produce such a clean signal.

To ensure that the i nput signal i s clean, you should insert a
low pass filter in s eries wi th the signal input. Com paring the
dynamic response wi th and without thi s fil ter i s an educati on
in itself.

The elliptic filter of
It has attenuation of about 3dB at 800 kHz, 32dB at 1MHz and
64 dB at 1.5 MHz.

Figure 4

is an example of a suitable fi lter.

5.1.1 Evaluating a Sine Wave

Set the ADC clock frequency to 7MSPS as follows:

1. Be sure that a 14MHz oscillator (Y1) is in its socket, or

use an external frequency source.

2. Select the P

Board sub menu, or type

rocedures pull-down menu and the Configure

P.

CTRL

3. Be sure that the lower left of the dialog box indicates your

oscillator frequency. Check this each tim e you enter this
dialog box.

4. Set the clock divide by number to 2 by typing

CTRL

-P and
changing the "Board to ADC Clock Ratio" to 2 (choices are
2 and 4 for the ADC14071).

5. Select the num ber of samples you wis h to take. It takes
longer for the com puter to oper ate on a very large number
samples, but FFT accuracy is better with more samples. If
you are performing an FFT on the data, take at least 4096
samples.

6. Click on OK.

7. Connect a signal generator to input BNC J1.

8. Adjust the gener ator to provide a 5kHz to 6kHz output.
Adjust the level so LEDs D3 and D4 do not come on.

9. Capture the si gnal (P

rocedure Execute or

CTRL

X) and

wait for it to be displayed on your monitor.

You may select a sm all portion of the waveform by clicking
and dragging across it.

5.1.2 Low Frequency Triangle Wave Input

A low frequency (about 1KHz) triangle wave will provide
general informati on on ADC performance. If you are looking
for triangle wave symmetry, compare the ADC output
symmetry with that of the generator output. Many triangle
wave generators do not produce a symmetrical output.

5.1.2.1 Monotonicity and Uncertainty

When a voltage ram p is digiti zed, the code sequence shows
increasi ng codes up to the peak level, or decreasi ng codes to
the minimum level, depending upon whether the slope is
positive or negative. A monotonic condi tion is one where the
code sequence does not show any reversals, as in Figure 5a.

220pF 560pF 470pF

22uH 22uH 22uH75

1500pF 1500pF4700pF 4700pF

75

a. Monotonic Signal b. Non-Monotonic Signal

Figure 5. Monotonicity means codes are continually increasing or
decreasing.

A converter that has one or more i nst ances of c odes goi ng i n
the wrong direction,

always at the same point(s)

non-monotonic. C ode progr ess i on reversal at spor adi c poi nts

Figure 4. This elliptic filter should be driven by a generator of 50 to
75 Ohms source impedanc e and terminated w ith 50 to 75 Ohms .
The input resistor shown here is normally included in the
generator.

in the waveform indic ates noi s e in the s ystem and not a non­monotonic condition.

When di gitizing si gnals with r ise and fall ti mes sl ow enough
to result in m ore than one conversion of the same code in
sequence, it is normal to have some code uncer tainty when
the input is at a code transition point. See Figure 6.

9 http://www.national.com

, is said to be

Figure 6. Code uncertaint y when the ADC input voltage
is near a code transition point.

5.1.2.2 Rising / Falling Symmetry

The ideal anal og-to-di gital c onverter will give the same code
when digitizing a gi ven input voltage whether that voltage is
approached from a lower voltage or from a higher voltage. If a
triangle wave is presented to the ADC, the falli ng side of the
waveform should be a mi rror im age of the ris ing si de at the
input and at the output. In practice, however, this m ay not be
the case. Noise anywhere in the system may cause the ri s i ng
and falling slopes to differ, as can the signal source itsel f.
Looking at the WaveVision data display of a digitized triangl e
wave will show how symmetrical the two slopes are with
respect to each other

symmetrical slopes

many triangle wave signal generators have non-symm etrical
slopes.

5.2 The FFT Plot

The readings of SINAD, SNR, THD and SFDR (Spurious­Free Dynamic Range) are only meaningful for a single
frequency sine wave input to the ADC and are only accurate
to the extent that the input waveform to the ADC14071 is
clean (contains a single frequency) and is stable.

5.2.1 Dynamic Performance Estimates

The dynamic performance as i ndi cated by SINAD, SNR, THD
and SFDR are estimates rather than absolute figures
because their accuracy depends upon how much of the
ADC14071's dynamic input range is used, how many
samples ar e taken and at what point i n the waveform the fi rs t
and last samples are taken.

If the input is reduced bel ow a full s cale swi ng suc h that the
minimum and maximum codes obtained at the output are
±6500 rather than the full scal e values of zero and - 8192 and
+8191, only about 80% of the code range i s used. T he resul t
is an apparent degradation of SNR. On the other hand, if the
input exceeds the input dynamic range s uch that the top or
bottom (or both) of the input signal is clipped at the
ADC14071's input, THD, SFDR and SINAD will be degraded.

Furthermore, apparent performance may be limited by the
purity of the input signal us ed, or by the non-l i neari ti es of any
op-amp, transformer, or other component(s) in the signal
conditioning circuitry.

5.2.2 Bandwidth Estimation

If a constant amplitude frequency sweep is applied at the
Analog Input (J1) and the signal at the ADC input i s digi tized
and displayed, the data display on your computer m oni tor wi l l
show any frequency dependent amplitude variation. If you
then perform an FFT on this data, you c an effecti vely see the
amplitude response in the form of a Bode plot.

provided the input signal has

. Choose your generator with care as

6.0 Computer-Board Communications

Communic ation between the board and com puter is through
a parallel port connection at connector P1. The board
responds to com mands from the c omputer and upl oads data
requested by the computer.

The RAM address is i ncremented by PLD U6, which cloc ks
the ADC14071 output data into RAM. The PLD counts the
number of words it clocks into RAM. Once the requested
number of words has been acquired and loaded into RAM,
the board uploads the data to the host computer.

7.0 Circuit Description and Hardware Schematics

Figure 7

shows the block diagram of the ADC14071
evaluation board. U6 (a program mable logi c device) contr ols
I/O and interprets instructions from a host PC that is
operating under WaveVision control. After receiving a
command from the host PC, the U6 interprets it, perfor m s the
operation requested and returns the results. The board
operates from supplies of ±12V to ±15V.

The hardware schematic is divided into two sections: The
Input, Reference and Test Device Section, and the Control,
Memory, Communications and Power Supply Section.

7.1 Input, Reference and Test Device Section

Figure 8

shows the input processing, reference and test
device circuitry. The Analog Input at J2 will be presented to
the converter through any signal conditioning circuitry that you
may build or use. No anti -aliasing filter is included with the
board. You should add such a filter, if needed.

Note that this board allows selection of a transformer or
operational amplifiers for single-ended to differential
conversion of the input signal to drive the ADC14071.
Because the transformer is a high frequency one and not
designed for low fr equency operation, we r ec om m ent that the
transformer be used only for input frequencies above 500kHz.

7.2 Control, Memory, Communications and Power Supply
Section

The Control, Memory, Communications and Power Supply
Section is s hown i n
of the evaluation board.

Output data from the ADC14071 is c locked dir ectly into RAM
(U7). The stored data is read from RAM and sent to the host
computer by U6.

Power is brought to the board at P2. T he board is protected
with series diodes in the power supply lines.

The ADC14071 will operate with c lock frequencies of 25kHz
to 8MHz. U6 will divide the on-board clock oscillator by either
2 or 4. For a board cl ock rate of 14MHz, U6 pr ovides ADC
clock rates of 7MHz or 3.5MHz. The board will function with
clock oscillators in the range of 50kHz to 32MHz, as long as
the ADC14071 clock frequency is i n the range of 25kHz to
8MHz. The ADC14071 is specified only for 7MSPS.

7.3 The Reset Button

The Reset button (S1) is used to reset U6. This button should
be pressed after applying power to the board and any time the
system does not appear to be working properly.

Figure 9

. The PLD control s the functions

10 http://www.national.com

Computer

to

Parallel Port

Controller Memory Power Suply

Analog

Input

Control, Memory and
Communications & Power
Supply (Figure 9)

Single-Ended

to

Differential

Input, Reference and
Test Device (Figure 8)

Figure 7. Block Diagram of the ADC14071 Evaluation Board

14

ADC Clock

14

ADC14071

Reference

Ref Adj

11 http://www.national.com

7.4 Hardware Schematics

D3

Red

R35

Under Range

λ

D

10uF

C102

D

TP2

+5V

OUT OF RA NGE

R107

1K

R33

1K

U5

NC7S504P5

RP1

13

16

1/2

CEXT

REXT/CEXT

U9A

14

15

33K

R103

1uF

C103

R34

1K

321

3635343332313029282726

U4

OR

DRGND

E4 E5 E6

A

C15

+5V

REF

TP1

V

A

R20

470

+5V

+ C101

C9

R21

499, 5%

R10

U2B

LM6172

5.11k, 5%

-

+

3 8

1

C105

C2

0.1uF

A

10uF

A

+ C1

10

R6

+12V

2

0.1uF

R8

5k, 5%

A

+

3 8

1

U1A

LM6172

R4

2.4k
R2

A

*

JP1

INPUT

SELECT

TP11

Sig In

N/C
N/C
N/C

A

0.1uF

V

AGND

REF IN

V

N/C

REF

BY

-

V

N/C

REF

BY

V

+

C14

0.1uF

N/C

BY1

0.1uF

R1

A

C4

Offset Bal

5k, 5%

51

VR21kVref Adj

U3

10pF

VR1

LM4040-ADJ

200

R3

5k, 5%

A

*

RM

V

123456789

C19

0.1uF

A

IN-

TP13

IN+

TP12

R22

33

32132

JP2

+ DRV

SELECT

U2A

LM6172

C106

0.1uF

A

R16

C3

10pF

C16

R11

470

10uF

A

A

0.1uF

R108

499, 5%

R9

5k, 5%

R7

5k, 5%

R5

-

2

5k, 5%

321

J1

ANALOG IN

74LS123

123

D13(MSB)

+
V

R12

U2A

330

A QBCLR Q

D12

-

IN

V

5.11k, 5%

5

5k, 5%

LM6172

R13

D4

Green

330

R36

Under Range

λ

4

8 x 47

C22

D11

D10

IN

AGND

V

A

+5V

C10

270pF

R23

33

+

7

+

5

2.4k

0.1uF

AVAVA

+

JP3

6 4

7

R14

R104

D

DR V

DRGND

ADC14071

C21

0.1uF

C20

TP3

1

- DRV
SELECT

-

R17

6 4

5k, 5%

CEXT

U9B

679

1uF

C104

33K

D

D9D8D8D6D5

AGND

AGNDPDCLK

101112

A

10uF

PD

10k

R25

D

R18

5k, 5%

5k, 5%

R15

-

A

*

5

12

8

D

1/2

74LS123

REXT/CEXT

A QBCLR Q

10

11

LD0

10k

R110

D

ADC(0..13)

47

R105

RP2

10uF

D

L4

Choke

+ C23

25

DRGND
D4
D3
D2
D1
D0 (LSB)
N/C

D

V
AGND
AGND
AGND
VA

C26

OE

R31

100

D

D

100

R26

C24

270pF

470

R28

A

C11

0.1uF
200

R24

C6

10pF

10

R19

C7

+ 10uF

A A

5k, 5%

C8

0.1uF

C5

10pF

8 x 47

LD1

10k

R109

D

0.1

A

C27

+5V

D

A

D

A

0.1uF

+5V

D5

RED

LED

CLOCK

λ

TP5

OE

330

R32

Q1

MMBT2222A

D

D

10k

R27

C25

0.1uF

TP4

ADC CLK

ADC CLK

A

T1

3 2 1

4 6

C12

0.1uF

Figure 8. Input Processing, Reference and Test Device Section of the ADC14071 Evaluation Board

-12V

connected to a common point in the analog ground plane.

* The ground connections indicated with an “ * ” should be

12 http://www.national.com

Figure 9. Control, Memory, Communications and Power Supply Section of the ADC14071 Evaluation Board

2

28

57

54
60
61

83

58

R50

47

+5V

D

4
3
2
1

P2
PWR

+5V

A

C31

10uF

1 3

2

+ C28

10uF

+ C30

10uF

C33

+ 10uF

LM340T-05

U8

-12V

POWER SUPPLY

D2

1N4001

D1
1N4001

L3

Choke

+13V
GND
GND

-13V

+ C32

10uF

R42
10k

+5V

D

R44

47

S1

RESET

R43

47

JP5

CLK

TERM

124

3

+5V

D

Y1

NC

GND

VCC

OUT

EXT CLK
INPUT

J2

TP10

EXT CLK

JP4
CLK
SELECT

TP9

PLD CLK

ADC[0..15]

12
81
76
70
80
39
40

1
69
68
16
84
51
77
67
37

ADC13
ADC12
ADC11
ADC10
ADC9
ADC8
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADC1
ADC0

ADCM7
ADCM6
ADCM5
ADCM4
ADCM3
ADCM2
ADCM1
ADCM0
ADCL7
ADCL6
ADCL5
ADCL4
ADCL3
ADCL2
ADCL1
ADCL0

U6

HDR2

HDR1

ADC13
ADC12
ADC11
ADC10
ADC9
ADC8
ADC7
ADC6
HDR CLK

ADC5
ADC4
ADC3
ADC2
ADC1
ADC0

HDR CLK

20
18
16
14
12
10

8
6
4
2

19
17
15
13
11
9
7
5
3
1

20
18
16
14
12
10

8
6
4
2

19
17
15
13
11
9
7
5
3
1

EPM7128ELC84-12

ADC CLK IN

ADC CLK OUT

COMMO

NC
NC
NC

CLK

RST

A15
A14
A13
A12
A11
A10

A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

WR

RD

P7
P6
P5
P4
P3
P2
P1
P0

BUSY

AUTOFD

52
35
6
10
4
44
41
8
55
56
5
11
9
31
24
25

50
36
21
22
18
48
34
33
71
64
65
63
15
14
17
20

45
49

29
30
27
23
73
74
79
75

62
46

RA15
RA14
RA13
RA12
RA11
RA10
RA9
RA8
RA7
RA6
RA5
RA4
RA3
RA2
RA1
RA0

WR
RD

P7
P6
P5
P4
P3
P2
P1
P0

BUSY
AUTOFD

RAMM7
RAMM6
RAMM5
RAMM4
RAMM3
RAMM2
RAMM1
RAMM0

RAML7
RAML6
RAML5
RAML4
RAML3
RAML2
RAML1
RAML0

18
19
20
21
24
25
26
27
42
43
44

1
2
3
4
5

17
41

6
39
40

D15
D14
D13
D12
D11
D10

D9
D8
D7
D6
D5
D4
D3
D2
D1
D0

NC
NC
NC

38
37
36
35
32
31
30
29
16
15
14
13
10
9
8
7

28
23
22

V V
C C
C C

+5V

D

G G
N N
D D

12 34

11 33

RA15
RA14
RA13
RA12
RA11
RA10
RA9
RA8
RA7
RA6
RA5
RA4
RA3
RA2
RA1
RA0

RD15
RD14
RD13
RD12
RD11
RD10
RD9
RD8
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0

U7

64k X 16
SRAM
TC551664 AJ-15

MEMORY

16
15
14
13
12
11
10
9

1
2
3
4
5
6
7
8

RP3

R45

47

R46

47

13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1

+

5V

D

R47

4.7K

P1

DB25
MALE

C48

0.001

R39
47

ADC CLK

λ

YELLOW

R41
330

Q2

MMBT2222 A

+5V

D

D6

COMMO

R40
47

C43

0.1uF

R38

47

+12V

C47

0.1uF

C46

0.1uF

C45

10uF +

TP6

+12V

TP7

+5V

D

TP8

-12V

3 13 26 38 43 53 66 78

C35

0.1uF
C36

0.1uF

C38

0.1uF

C37

0.1uF

C42

0.1uF

C41

0.1uF

C39

0.1uF

C40

0.1uF

L5

CHOKE

+5V

D

C44

0.1uF

3
2

1

8 x 47

+ C29

10uF

R37

12Ω, 10W

L2

Choke

L1

Choke

R49

47

R101

1k

R48
200

C49

47pF

+5V

D

R106

47

A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

WE
OE
CE
LB
UB

7 19 32 42 47 59 72 82

+ C34

68uF

A

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D

A

A

13 http://www.national.com

8.0 Bill of Materials

Item Qty Reference Part Source

1 12 C1, C7, C20, C23, C28, C29, C31, C32, C33,

2 31 C2, C8, C9, C11, C12, C13, C14, C15, C16, C17,

3 4 C3, C4, C5, C6 10pF Type 1206
4 2 C10, C24 270pF Type 1206
5 2 C30, C34 68uF, 6.3V Type 1206
6 1 C48 0.001uF Type 1206
7 1 C49 47pF Type 1206
8 2 C104, C103 1uF Type 1206

9 2 D1, D2 1N4001 Various
10 2 D3, D5 RED LEDs DigiKey # 160-1124-ND
11 1 D4 GREEN LED DigiKey # 160-1130-ND
12 1 D6 YELLOW LED DigiKey # 160-1133-ND
13 6 E1, E2, E3, E4, E5, E6 Future use n/a
14 2 HDR1 HDR2 10 x 2 Headers DigiKey # 2011-36-ND
15 5 JP1, JP2, JP3, JP4, JP6 3-Pin Post Headers DigiKey # A19351-ND
16 1 JP5 2-Pin Post Headers DigiKey # A19350-ND
17 6 -- Shorting Jumpers DigiKey #S9001-ND
18 2 J1, J2 BNC Connectors DigiKey # ARF1177-ND
19 5 L1, L2, L3, L4, L5 CHOKE DigiKey # M2204-ND
20 1 P1 Male Connector - DB25 DigiKey # A2098-ND
21 1 P2 Terminal Block DigiKey # ED1609-ND
22 2 Q1, Q2 MMBT2222A Various
23 3 RP1, RP2, RP3 Resistor Pack - 8x47 DigiKey # 766-163-R47-ND
24 1 R1 51 Type 1206
25 10 R2, R3, R5, R7, R8, R14, R15, R16, R17, R18 4.99k, 1% Type 1206
26 2 R4, R13 2.4k Type 1206
27 2 R6, R19 10 Type 1206
28 1 R9 5k, 1% Type 1206
29 2 R12, R10 5.11k, 1% Type 1206
30 3 R11, R20, R28 470 Type 1206
31 1 R21 464, 1% Type 1206
32 2 R22, R23 33 Type 1206
33 2 R24, R48 200 Type 1206
34 5 R25, R27, R42, R109, R110 10k Type 1206
35 2 R26, R31 100 Type 1206
36 4 R32, R35, R36, R41 330 Type 1206
37 4 R33, R34, R101, R107 1k Type 1206
38 1 R37 10, 10W DigiKey # ALSR1J-12-ND
39 1 0 R38, R39, R40, R43, R44, R45, R46, R49, R50,

40 1 R47 4.7k Type 1206
41 2 R103, R104 33k Type 1206
42 1 R108 511, 1% Type 1206
43 0 R106 not populated n/a
44 1 S1 Push Button Switch, SPST-N.O. DigiKey # CKN9016-ND or

45 13 TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8, TP9,

46 1 T1 Signal Transformer MiniCircuits type T4-6T
47 2 U1, U2 LM6172 National Semiconductor
48 1 U3 LM4041-ADJ National Semiconductor
49 1 U4 ADC14071 National Semiconductor
50 1 U5 NC7S04P5 Fairchild Semiconductor
51 1 U6 EPM7128ELC84-15 (Needs programming) Altera
52 1 U7 TC551664BJ-15 Toshiba
53 1 U8 LM340AT-5.0 National Semiconductor
54 1 U9 74LS123 Fairchild Semiconductor
55 1 VR1 200 DigiKey # 3386F-201-ND
56 1 VR2 1k DigiKey # 3386F-102-ND
57 1 Y1 14.31818MHz Oscillator DigiKey # CTX115-ND
58 1 -- 6-pin Socket for Transformer DigiKey # AE8906-ND
59 1 -- 4-Pin full-size oscillator socket DigiKey # A462-ND

C45, C101, C102

C18, C19, C21, C22, C25, C26, C27, C35, C36,
C37, C38, C39, C40, C41, C42, C43, C44, C46,
C47, C105, C106

R105

TP10, TP11, TP12, TP13

10uF, 6.3V Type 1206

0.1uF Type 1206

47 Type 1206

Breakable Headers DigiKey # S1012-36-ND

CKN9017-ND

14 http://www.national.com

9.0 Saving and Retrieving Files

g

g

g

WaveVisi on allows you to save data in two formats . One is a
binary file, the other is an ASCII file.

9.1 Binary Files

A binary file is intended for use only by WaveVision and
contains information as to program settings as well as the
raw waveform data.

To save a binary file for use l ater by WaveVision, you c an
click on the Save icon, enter
will be prompted for a file name the first time you save a given
set of data.

To save a file that has al ready been s aved, but to save it
under a different file tame, enter
prompted to enter the new file name.

To retrieve a binary file in WaveVision, you may clic k on the
Open File i con, enter

ALT

prompted for the name of the file you wish to retrieve.

, F, S or enter

ALT

ALT

, F, O or enter

-S. You

CTRL

, F, A. You will be

-O. You will be

CTRL

9.1 ASCII Files

To export (save) an ASCII file for use later by another
program, suc h as a spreadsheet, you must enter

ALT

, F, D.
You will be prompted for a file name. The ASCII file will
contain only raw data with one data point per line.

To import (retrieve) an ASCII file, whether created with
WaveVision or with any other program or utility, enter
I

. You will be prompted for the name of the file you wish to

ALT

, F,

retrieve. Remember that imported fi les must have one data
point per line.

10.0 Evaluation Board Specifications

Board Size: 4.5" x 6.5" (11.4 x 16.5 cm)
Power Requirements: +12V @ 1 Amp & -12V @ 10mA
Communications: Parallel Port
Modes Supported: Bi-Directional EPP & ECP
Board Clock Frequency: 50kHz to 32MHz
Analo

Input
Nominal Volta
Minimum Excursion: 0V
Maximum Excursion: 2.7V
Memory: 64k Words by 16 bits
Reference Volta

e: 1 V- (Amps), 2 V- Xfmr

e: 2.0V, nominal

15 http://www.national.com

APPENDIX - WaveVision Screens

ADC14071

WaveVision Menu & Icon Description

File Edit View Prodecure Options Window Help

CON
FIG

For Help, pre ss F1

ADC14061 / A DC14161 / ADC140 71 / ADC16061 Wav eVision Sample 1

FFT-----(same as
Acquire & Plot Data (same as
Setup-----(same as
Copy Graph---(same as
Save-----(same as
Open File ---(same as
New-----(same as

ADC14071

WaveVision Menu

File Edit View Prodecure Option s Window Help

CON

FIG

ADC14061 / A DC14161 / AD C14071 / ADC1 6061 Wave Vision Sample 1

, P, F or

ALT

, P, X or

ALT

, P, C or

ALT

, E, O )

ALT

, F, S or

ALT
ALT

, F, O or
, F, N or

ALT

CTRL
CTRL
CTRL

CTRL
CTRL
CTRL

-F)

-X)

-P)

-S)

-O)

-N)

About WaveVi s ion...

Zoom Full Rt Click

New Ctrl+N

pen... Ctrl+O

O

lose

C

ave Ctrl+S

S

s ...

Save A

mpor t D ata...

I

ata...

Export D

ecord Info... Ct rl+R

R

it

Ex

Recent File

For Help, press F1

Zoom Area... L ft Click+Drag
Display... Dbl Click

Copy Gr aph Ctrl+ C

New Input
Cascade
T ile
Arr ange Icons
1 No Data

16 http://www.national.com

ADC14071

y

WaveVision Procedure Menu

Tool Bar

Procedure

File Edit View Prodecure Options Window Help

CON
FIG

Exec ute Ct rl+X

Histog ram Ctrl+H

Configu re Board. ... C trl+P

end Config

S
FFT C trl+F

ADC14061/ADC14161 / ADC14071 ADC16061 WaveVision

Parallel P ort Time O ut Error.

The evaluation board should be reset.

!

This noti ce could be seen if

ou try to acquire data wi th

no board connected.

For H elp, pr ess F 1

ADC14061 / A DC14161 / AD C14071 / ADC1 6061 Wave Vision Sample 1

OK

ADC14071

WaveVision Options Menu

File Edit View Prodecure Option s Window Help

CON

FIG

ADC14061 / A DC14161 / AD C14071 / ADC1 6061 Wave Vision Sample 1

Optio ns

T oolbar
Status Bar

Auto FF T
Auto Cali brate

FFT Opt ions

Check Ports...
LPT1
LPT2

LPT3

4096

4096

4096

8192
16384
32768

1024

1024

1024

2048

4096

8192

Evaluation Board Configuration

ADC Part Num ber

ADC1606 1 AD C14061/A DC14161 ADC14071

Data Acquisition Limits
Number of Sample s
for Acquisition

Max. Hits per code
for Hyst ogram

On Board Clock Frequencies
Board Cl ock Board t o ADC

Frequenc y (MHz) Clock R atio

ADC Actions

4096

1024

14.318 2

Reset

Calibrate

Disable O utput

Power Down

Cancel

OK

FFT Options

Data Number of H armonic s

Status Bar

“No Windowing” should

only be used with

synchronous data.

For Help, press F1

Black man Har ris
Flat T op
Hammi ng
Hannin g
No Windowing

6
0
1
2

OK

OK

3
4

Cancel

5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

Defa u lt Values

are shown he re

(Flat Top, 6 Harmonics).

17 http://www.national.com

ADC14071

p

p

(Hz)

q

y

p

(Hz)

Sampled Data and FFT Data Display Options

Sampled Data display

Title:
X Axis Units Y Axis Units
Sam

les Converter Codes
Seconds Volts
Sam

ling Rate of Vmax V
this data
Vmin V

14318181.

2.

-2.

Title:
X Axis Units
Bin Numbers
Fre

uenc

OK

Cancel

FFT Data display

This dialog box isobtained by
double clicking on th e sampl ed
data plot.

It allows you to set a title for the
displa y ed wa ve form, to set X A xis
and Y Axis units and to set
min and max voltage levels.

Sam

ling Rate of

this data

14318181.

OK

Cancel

This dialog box iis obtained by
double clicking on the FFT plot.

It allows you to set a title for
the FFT and to set X /Axis units.

ADC14071

WaveVision Data Display Examples

18 http://www.national.com

[Blank]

19 http://www.national.com

The ADC14071 Evaluation Board is intended for product evaluation purposes only and is not intended for resale to end

N

consumers, is not authorized for such use and is not designed for compliance with European EMC Directive 89/336/EEC.
WaveVisi on is a tradem ark of National Semi conductor Corporati on. National does not as sume any responsibility for use of any

circuitry or software supplied or described. No circuit patent licenses are implied.

LIFE SUPPORT POLICY

NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENT S IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR
CORPORATION. As used herein:

1. Life support devices or system s ar e devices or s ystems
which, (a) are intended for surgical implant into the
body, or (b) support or sust ain l i fe, and whos e fai lur e to
perform, when properly used in accordance with
instructions for use provided in the labeling, can be

2. A critic al com ponent is any com ponent in a li fe suppor t
device or system whose failure to perform can be
reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.

reasonably expected to result in a significant injury to
the user.

National Semiconductor
Corporation

Americas
Tel: [phone]
Fax: [phone]
Email: [e-mail]

www.national.com

National does not assume any responsibility for any circuitry described, no circuit patent licenses are implied and Nati onal reserves the right at any
time without notice to change said circuitry and specifications.

National Semiconductor
Europe

Fax: [phone]
Email: [e-mail]
Deutsch Tel: [phone]
English Tel: [phone]

National Semiconductor
Asia Pacific Customer
Response Group

Tel: [phone]
Fax: [phone]
Email: [e-mail]

National Semiconductor
Japan Ltd.

Tel: [phone]
Fax: [phone]

20 http://www.national.com