National Semiconductor ADC121S625B User Manual
National Semiconductor
July 25, 2006
Rev - 2.1/CS
RoHS Compliant
Evaluation Board User's Guide
ADC121S625 12-Bit, 50 kSPS to 200 kSPS, Differential
Input, Micro-Power Sampling A/D Converter
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Table of Contents
1.0 Introduction 3
2.0 Board Assembly 3
3.0 Quick Start 4
3.1 Stand Alone Mode 4
3.2 Computer Mode 4
4.0 Functional Description 5
4.1 The Signal Input 5
4.2 ADC Reference Circuitry 5
4.3 ADC Clock Circuit 5
4.4 Digital Data Output 5
4.5 Power Supply Connections 5
5.0 Software Operation and Settin gs 6
6.0 Hardware Schematic 7
7.0 Evaluation Board Specifications 8
8.0 ADC121S625B Evaluat ion Bo ard Bi ll of Materials 8
9.0 Tables of Test Points, Jumpers and Connectors 9
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1.0 Introduction
The ADC121S625EVAL/RoHS Design Kit
(consisting of the ADC121S625B Evaluation
Board and this User's G uide) is designed to ease
evaluation and design-in of the National
Semiconductor ADC121S625 12-bit Analog-toDigital Converter, whic h ca n operate at speeds up
to 200 kSPS.
The evaluation boar d can be used in either of t wo
modes. In the Stand-Alone or Manual mode,
suitable test eq uipment, such as a logic analyzer ,
can be used with the board to evaluate the
ADC121S625’s performance.
In the Computer or Automatic mode, data capture
and evaluation is simplified by connecting this
board to National Semiconductor's Data Capture
Board (order number WAVEVSN BRD 4.0) with a
ribbon cable (order number WV4ADCIFCABLE),
which is connected to a personal computer
through a USB port and running WaveVision4
software. The WaveVision4 program can be
downloaded from the web at
http://www.national.com/adc
.
VREF
select
The WaveVision4 software operates under
Microsoft Windows. The signal at the Ana lo g In put
is digitized, captured, and displayed on a PC
monitor in the time and frequency domain.
The software will perform an FFT on the captured
data upon command. This FFT plot shows
dynamic perform ance in the form of SNR, SIN AD,
THD, SFDR and ENOB. A histogram of the
captured data is also available.
The differential si gnal at analog inp uts J2 or J3 is
digitized by U1, the ADC121S625.
The ADC121S625 uses an external oscillator that
is provided on this board by Y2 or J6.
2.0 Board Assembly
The ADC121S625B e valuation board comes fully
assembled and read y for use. Refer to the Bill of
Materials for a description of components, to
Figure 1 for major component placement and to
Figure 2 for the Evaluation Board schematic.
U1
DUT
WV4
connector
J2
VIN
JP5
5V
remote
CLK
select
J6
EXT
CLK
input
Y2
CLK
OSC
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