National Semiconductor ADC08100 Instruction Manual

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Page 1

December 2005

National Semiconductor

Evaluation Board Instruction Manual

ADC08100 8-Bit, 20 Msps to 130Msps, Analog-to-Digital

Converter with Internal Sample & Hold

Rev 5

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Table of Contents

1.0 Introduction.............................................................................................................................5

2.0 Board Assembly .....................................................................................................................5

3.0 Quick Start..............................................................................................................................5

4.0 Functional Description............................................................................................................6

4.1 Input (signal conditioning) circuitry............................................................................6

4.2 ADC reference circuitry .............................................................................................6

4.3 ADC clock circuit .......................................................................................................6

4.4 Digital Data Output....................................................................................................7

4.5 Power Supply Connections .......................................................................................7

4.6 Power Requirements.................................................................................................7

5.0 Installing and Using the ADC08100 Evaluation Board ...........................................................7

5.1 Software Installation..................................................................................................7

5.2 Setting up the ADC08100 Evaluation Board .............................................................7

5.2.1 Board Set-up .............................................................................................7

5.2.1.1 Computer Mode Operation........................................................7

5.2.1.2 Manual Mode Operation............................................................7

5.2.2 Quick Check of Analog Functions .............................................................7

5.2.3 Quick Check of Software and Computer Interface Operation...................8

5.2.4 Getting Consistent Readings.....................................................................8

5.2.5 Jumper Information ...................................................................................8

5.2.6 Troubleshooting.........................................................................................9

6.0 Evaluation Board Specifications.............................................................................................9

7.0 Hardware Schematic ..............................................................................................................10

8.0 Evaluation Board Bill of Materials...........................................................................................12

Summary Tables of Test Points and Connectors.........................................................................13

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1.0 Introduction 3.0 Quick Start

The ADC08100EVAL Design Kit (consisting of the ADC08100 Evaluation Board, National's WaveVision software and this manual) is designed to ease evaluation and design-in of Nationals ADC08100 8-bit Analog-toDigital Converter, which operate at sample rates up to 130 Msps.

The WaveVision software operates under Microsoft Windows. The signal at the Analog Input is digitized and can be captured and displayed on the computer monitor as dynamic waveforms. The digitized output is also available at Euro connector J3.

The software can perform an FFT on the captured data upon command. This FFT display also shows dynamic performance in the form of SNR, SINAD, THD and SFDR.

Evaluation with this system is simplified by connecting the board to the WaveVision Digital Interface Board (order number WAVEVSN BRD 3.0), which is connected to a personal computer through a serial communication port and running WaveVision software, operating under Microsoft Windows. Use program WAVEVSN2.EXE

The signal at the Analog Input to the board is digitized and is available at pins B16 through B19 and C16 through C19 of J3. Pins A16 through A21 of J3 are ground pins.

Provision is made for adjustment of the Reference Voltages, VRT and VRB with potentiometers VR1 and VR2, respectively. These voltages are not regulated and will vary with the input potential at pin 1 of Power Connector P1.

2.0 Board Assembly

The ADC08100 Evaluation Board may come preassembled or as a bare board that must be assembled. Refer to the Bill of Materials for a description of components, to Figure 1 for major component placement and to Figure 2 for the Evaluation Board schematic.

Refer to Figure 1 for locations of test points and major components.

1. Connect the evaluation board to the Digital Interface Board (order number W AVEVSN BRD 3.0). See the Digital Interface Board Manual for operation of that board.

1. Install a 100 MHz (or lower) crystal into socket Y1. While the oscillator may be soldered to the board, using a socket will allow you to easily change clock frequencies.

2. Connect a clean power supply to the terminals of connector P1. Adjust power supply to voltages of +4.75V to +5.25V and -5.2V to -5.3V before connecting it to the board. Turn on the power and confirm that there is 3 Volts at the pins of inductor L1.

3. Use VR1 to set the top reference voltage (VRT) for the ADC to 1.9V at TP2. Use VR2 to set the bottom reference voltage (VRB) for the ADC to 0.3V at TP4.

4. Connect the jumper at J4 to pins 1 and 2 (those farthest from oscillator Y1).

5. Connect a signal of 1.6V Ohm source to Analog Input BNC J2. The ADC input signal can be observed at TP7. Because of isolation resistor R17 and the scope probe capacitance, the input signal at TP7 will not have the same frequency response as the ADC input signal.

6. The Digital Interface Board should be set up for 40MHz operation with an 80MHz crystal installed. See the Digital Interface Board manual.

7. See the Digital Interface Board Manual for data gathering instructions.

NOTE: The FFT will not indicate the correct frequencies because this information is derived from the clock frequency selected on the Digital Interface Board. To show the correct frequency information on the FFT, double click on the FFT window to open the FFT Dialog Box, then click on "Frequency", then click on "OK". Alternatively, you may double click on the data capture window before performing the FFT and change the frequency at "Sampling Rate of This Data (MHz)" to 100 to indicate a 100MHz rate.

amplitude from a 50-

P-P

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Detail: Default is open

Detail:

Hard-wired

Default Position

Detail:

Default Position

CLK_SEL

DL0

DIV_EN

U8 U7

HP2

J4 CLK_SEL

TP3 AGND

TP7

NATIONAL SEMICONDUCTOR ADC08100/ADC08200 EVAL BOARD

NUM_MEM

INPUT

NUM_MEM

DL1

TP5

DGND

HP1

INPUT

TP9 +3V

TP4 VRB

VR2

DGND

TP8

AGND

TP9 +3V

POWER CONNECTOR

+5V GND +5V

TP3

-5.2V

TP1

Socket

TP1 PD

TP2

VRT

VR1

TP7

INPUT

TP2 VRT

Figure 1. Component and Test Point Locations

4.0 Functional Description

The ADC08100 Evaluation Board schematic is shown in Figure 2.

4.1 Input (signal conditioning) circuitry

The input signal to be digitized should be applied to BNC connector J2. This 50 Ohm input is intended to accept a low-noise sine wave signal of 1.5V peak-to-peak amplitude. To accurately evaluate the ADC08100 dynamic performance, the input test signal should be passed through a high-quality bandpass filter (60dB minimum stop-band attenuation) as even the best generators do not provide a pure enough sine wave to properly evaluate an ADC.

Resistors R15, R15A, R16 and R18 provide the needed input bias to the ADC08100. You can center the input signal to the ADC by adjusting reference voltages V and VRB with VR1 and VR2 or by making slight adjustments to voltage an Power Connector pin 1.

INPUT BNC

VR1

VRB ADJ

VR2

VRT ADJ

TP4 VRB

4.2 ADC reference circuitry

The provided reference circuitry will provide nominal reference voltage ranges of 1.3V to 2.6V for VRT and 0V to 1.3V for VRB, Providing for nominal input ranges of 0V to 2.6V peak-to-peak. Note that this is beyond the maximum specified 2.3V range of the ADC08100.

The reference voltages for the ADC08100 can be monitored at test points TP2 and TP4 and are set with VR1 and VR2. Signal offset can be provided by adjusting both of these potentiometers, or by minor adjustments to the +5 Volts at pin 1 of Power Connector P1.

4.3 ADC clock circuit

The clock signal applied to the ADC is selected with jumper J4. A standard ECL-level 100 MHz crystal oscillator should be installed at Y1 and the divide by 2 function selected by shorting pins 1 and 2 of jumper JP4.

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Caution: Be sure that the oscillator used has logic levels of -0.6V and -1.3V. We have found oscillators with levels that are too low to work properly in the circuit designed for this board.

the clock line. An 80MHz clock oscillator should be used on the Digital Interface Board with that board's clock divider set for 2. See the Digital Interface Board manual for details.

4.4 Digital Data Output.

The digital output data from the ADC08100 is available at the 96-pin Euro connector J3. The series resistors of RP1 isolate the ADC from the load circuit to reduce noise coupling into the ADC.

4.5 Power Supply Connections

Power to this board is supplied through power connector P1. The only Voltages needed for the ADC08100 evaluation board are +5V and -5.2V supplies.

When using the ADC08100 Evaluation Board with the Digital Interface Board, the 5V logic power supply for the interface board is passed through the ADC01800 evaluation board from pin 3 of Power Connector P1. The supply voltages are protected by shunt diodes D1, D2 and D3. The +3 Volts needed for the ADC08100 is provided with voltage regulator U6, an LM2931CT.

4.6 Power Requirements

Voltage and current requirements for the ADC08100 Evaluation Board are:

• Pin 1 of P1: +5.0V ±5% at 100 mA

• Pin 3 of P1: +5.0V ±5% at 750mA.

• Pin 4 of P1: - 5.2V ±0.1V at 250 mA.

Pin 2 of P1 is ground. The +5V supply at pin 3 of the Power Connector P1 provides the power to the Digital Interface Board, where most of the power through this pin is consumed.

5.0 Installing and Using the ADC08100 Evaluation Board

The evaluation board requires power supplies as described in Section 4.6. An appropriate signal generator (such as the HP3325B, HP8662A or the Tektronix TSG130A) with 50 Ohm source impedance should be connected to the Analog Input BNC, J2, through a bandpass filter. The generator output should be filtered by a bandpass filter when evaluating sinusoidal signals to be sure there are no unwanted frequencies (harmonics and noise) presented to the ADC. A cable with a DB-9 connector must be connected between the Digital

Interface Board and the host computer. See the Digital Interface Board manual for details.

5.1 Software Installation

The WaveVision software provided requires 300k bytes of hard drive space and will run under Windows.R4 and C1 are used for high frequency termination of

1. Insert the disk into a 3.5" floppy drive.

2. Copy the program WAVEVSN2.EXE to the desired subdirectory on you computer's hard disk and RUN it.

5.2 Setting up the ADC08100 Evaluation Board

This evaluation package was designed to be easy and simple to use, and to provide a quick and simple way to evaluate the ADC08100. The procedures given here will help you to properly set up the board.

5.2.1 Board Set-up

Refer to Figure 1 for locations of connectors, test points and jumpers on the board.

5.2.1.1 Computer Mode Operation

1. Be sure a 100MHz clock oscillator (Y1) is in place on the ADC08100 evaluation board and an 80MHz crystal is on the Digital Interface board.

2. Set jumper J4 to its default position, as shown in Figure 1 to divide the clock oscillator frequency by two for the ADC08100.

3. Connect power to the board per requirements of section 4.6 and confirm that Red LED D4 on the ADC08100 evaluation board and D1 on the Digital Interface board are on, indicating clock presence.

4. Connect The ADC08100 evaluation board to Digital Interface Board, WAVEVSN RD 3.0.

5. Connect a cable with DB-9 connector between the Digital Interface Board connector P1 and a serial port on your computer.

6. Be sure jumper JP4 is set to divide the 100MHz clock by 2. This is the default position as shown in Figure 1.

7. Connect an appropriate signal source to BNC connector J2 of the ADC08100 evaluation board.

5.2.1.2 Manual Mode Operation

1. Perform steps 1 and 2 of section 5.2.1.1, above

2. Connect power to the board per requirements of section 4.6 is on, indicating clock presence.

3. Monitor the ADC08100 output at 96-pin connector J3 pins B16 through B19 and C16 through C19 (see appendix for pin configuration).

4. Clock the data out with a TTL clock of any speed up to 100 MHz at pin B25 of 96-pin connector J3.

5.2.2 Quick Check of Analog Functions

Refer to Figure 1 for locations of connectors, test points and jumpers on the board. If at any time the expected response is not obtained, see section 5.2.6 on Troubleshooting.

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1. Perform steps 1 through 7 of Section 5.2.1.1. Adjust the input signal at J2 for 1.6V

P-P

2. JP4 - Short the two pins farthest from Y1 (pins 1 &

2) to divide the on-board clock oscillator by 2 (Default position).

3. Turn on the power to the board.

4. Adjust VR1 for a voltage of 1.9V at TP2.

5. Adjust VR2 for a voltage of 0.3V at TP4.

6. Scope TP7 to be sure the input signal is present.

7. Adjust the signal source at Analog Input J1 for a signal amplitude of approximately 1.6V

P-P

This completes the testing of the analog portion of the evaluation board.

5.2.3 Quick Check of Software and Computer

Interface Operation

1. Perform steps 1 through 7 of Section 5.2.1.1, above.

2. Supply a 1.6Vp-p sine wave of about 10 MHz at Analog Input BNC J2.

3. Be sure there is an interconnecting cable between the board and your computer serial port.

4. RUN program WAVEVSN2.EXE.

5. After turning on power, be sure to wait for yellow LED D4 on the Digital Interface Board to go out before trying to acquire data or the board will "freeze" and you will have to cycle the power.

6. Acquire data by clicking on the ACQUIRE icon or by pressing ALT, P, A or CTRL-X. Data transfer and calculations can take a few seconds.

7. When transfer is complete, the data window should show many sine waves. The display may show a nearly solid area of red, which is O.K.

8. Double click on the data window and change the "Sampling Rate of this data (MHz)" to 100. This must be done each time another data capture is done or the frequency information in the FFT will not be correct.

9. With the mouse, you may click and drag to select a portion of the displayed waveform for better examination.

10. Click on the FFT icon or type ALT, P, F or CTRL-F to calculate the FFT of the data and display a frequency domain plot.

The FFT data will provide a measurement of SINAD, SNR, THD and SFDR, easing the performance verification of the ADC08100.

We can eliminate the need for windowing and get more consistent results if we observe the proper ratios between the input and sampling frequencies. This greatly increases the spectral resolution of the FFT, allowing us to more accurately evaluate the spectral response of the A/D converter. When we do this, however, we must be sure that the input signal has high spectral purity and stability and that the sampling clock signal is extremely stable with minimal jitter. Coherent sampling of a periodic waveform occurs when an integer number of cycles exists in the sample window. The relationship between the number of cycles sampled (CY), the number of samples taken (SS), the signal input frequency (fin) and the sample rate (fs), for coherent sampling, is

CY, the number of cycles in the data record, must be an integer number and SS, the number of samples in the record, must be a factor of 2 integer. For optimum results, CY should also be a prime number.

Further, fin (signal input frequency) and fs (sampling rate) should be locked to each other. If they come from the same generator, whatever frequency instability (jitter) is present in the two signals will cancel each other.

Windowing (an FFT Option under WaveVision) should be turned off for coherent sampling.

5.2.5 Jumper Information

Table 1 indicates the function and use of the jumpers on the ADC08100 evaluation board. Note that which pins of J5 are shorted (or whether any are shorted) is a "don't care" when 1 memory chip is used, which is the normal case for this board.

JUMPER FUNCTION

(Hard wired)

No of Mem Chips 1 Mem Chip 2 Mem Chips

J2 Input BNC - -

J3 not used - -

Clock Select Divide Clock

DIV_EN

(No. of Mem Chips)

Table 1. Jumper settings.

PINS 1 & 2

SHORTED

by 2

2 Mem Chips 1 Mem Chip

PINS 2 & 3 SHORTED

Do not Divide

Clock

5.2.4 Getting Consistent Readings

Artifacts can result when we perform an FFT on a digitized waveform, producing inconsistent results when testing repeatedly. The presence of these artifacts means that the ADC under test may perform better than our measurements would indicate.

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5.2.6 Troubleshooting

"Comm Check Failed", "Error Transmitting", "Parallel Port Time Out Error" and/or "Failed to communicate with the board on LPT1" errors mean communication was unsuccessful. Try the following:

• Be sure to wait for yellow LED D4 on the Digital

Interface Board to go out after turning on power before trying to capture data.

• Be sure that the Digital Interface Board is connected

to a serial printer port and has power.

• Be sure the proper port is selected (type ALT-O).

• Ascertain that an 80MHz clock oscillator is properly

inserted into the socket at Y1 of the Digital Interface Board. Check to see that LEDs D1 and D3 of the Digital Interface Board are on. See the Digital Interface Board manual for their functions.

• Be sure cable connections are solid.

Null Modem one. If it is, swap the jumpers on Digital Interface Board J8 and J10.

• Reset the evaluation board by pressing button S1

and try again.

If there is no output from the ADC08100, perform the following:

• Be sure that the proper voltages and polarities are

present at Power Connector P1.

• Be sure +3 Volts is present at TP9.

• Be sure clock signal is present at J4 center pin.

• Be sure there is an input signal at TP7 and that the

signal generator and input filter are of compatible frequencies.

If the displayed waveform appears to be garbage, or if the FFT plot shows nothing but noise with no apparent signal:

• Reset the evaluation board by pressing button S1

and try again.

• Be sure clock Y1 is of the proper frequency

(100MHz) and type (ECL with output swing between

-0.6V and

-1.3V).

• Reset the board by pressing S1 and try again.

Problem Opening Comm Port" or "Error Setting Comm State" errors mean that the comm port selected is not the one to which the eval board is connected.

6.0 Evaluation Board Specifications

Board Size: 5" x 7" (12.7cm x 17.8 cm)• Be sure that the board to computer cable is not a Power Requirements: + 5V ±5% @ 100 mA

+ 5V ±5% @ 750mA (see

Section 4.6)

- 5.2V.0 ±0.1V @ 250 mA

Clock Frequency Range: 40 MHz to 250 MHz

(divided by 2 for the ADC)

Analog Input

Nominal Voltage: 1.6V Frequency Range 50 kHz to 150 MHz Impedance: 50 Ohms

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7.0 Hardware Schematic

+5V

Figure 2a. ADC 08100 Evaluation Board Schematic

+5VA

-5V

+5VA

-5V

LM833N

+3V

1 2

4 5

6 7

9 10

24 23

22 21

19 18

16 15

14 13

AGND VRT

AGND Vin

VinGND AGND

VRM

VRB AGND

CLK

PD D0

D2 D3

DR VD

DR GND

D5 D6

ADC08100

+3V

+5VA

RP1

8 X 47

+3V

16 15

13 12

10 9

2 3

5 6

7 8

ADC_CLK

CY7C4281

+5V

100MHz

D6 D5

RD1

RD0

RD0 RD1

RD2

RD3 RD4

RD5 RD6

RD7

RD6

RD5

RD4

RD3

RD2

D4D3D2D1D0

CY7C4281

_______ 100MHz

D6 D5

RD1

RD0

RP2

8 X 1k

16151413121110

1234567

D[0..7]

TP8

DGND

Power

Connector

+5V

GND

+5V

-5V

3 4

LM2931CT

425

ON/OFF

OUT

ADJ

CHOKE

1N4001

CHOKE

C22

47uF

6.3V

TP9

+3V

+5VA

+5V

-5V

C21

47uF

6.3V

C19

47uF

6.3V

C20

47uF

6.3V

R19

2.00k, 1%

R20

3.01k, 1%

U5A

74F74

7 1

CLK

CLGND

Vcc

14 4

1 2

NUM_MEM

7 13

CLK

CLGND

Vcc

14 10

1234567

10111213141516

8765432

16151413121110

+5V

U5B

74F74

D{0..7]

+5V

+5VA -5V

RP4

8 x 47 Ohms

RP3

8 x 47 Ohms

1.8k

R2 47

VR1

VRT

VR2

VRB

+5VA

C3 1uF

R3 10k

R5 100

R8A

R8 1k

C8 47uF

6.3V

C13 47uF

6.3V

R10 1k

R11 1k

R12 100

R10A

C9 1uF

R9 47

C16 1uF

TP2

VRT

C2 1uF

C5 1uF

C12 1uF

C15 1uF

C17 OPEN

R15A 130

R15 220

C17A 1uF

R16

R18

TP7

INPUT

R17 100

C17B 1uF

10k

R4 100

100pF

ADC0 ADC1

ADC2 ADC3

ADC4

ADC5

ADC6

ADC7

R13 470

C18A 47pF

JS1

DLY1

1uF

+5V

1uF

D0D1D2D3D4D5D6

JS2 DLY1

C18 1uF

J3 96-Pin Female

Q4Q3Q2Q1Q0

7 8

9 10

12 13

27 26

25 24

22 21

20191817161514

PAF PAE

GND REN1

RCLK

REN2 OE

RS WEN1

WCLK

WEN2/LD

VCC

123

D8D7D6D5D4D3D2

Q4Q3Q2Q1Q0

7 8

9 10

12 13

27 26

25 24

22 21

20191817161514

D1 D0

PAF PAE

GND

REN1 RCLK

REN2 OE

WEN1 WCLK

WEN2/LD

VCC

Q6 Q5

123

D8D7D6D5D4D3D2

RD7

RD6

RD5

RD4

RD3

RD2

D0D1D2D3D4D5D6

A1B1C1A2B2C2A3B3C3A4B4C4A5B5C5A6B6C6A7B7C7A8B8C8A9B9C9

A10

B10

C10

A11

B11

C11

A12

B12

C12

A13

B13

C13

A14

B14

C14

A15

B15

C15

A16

B16

C16

A17

B17

C17

A18

B18

C18

A19

B19

C19

A20

B20

C20

A21

B21

C21

A22

B22

C22

A23

B23

C23

A24

B24

C24

A25

B25

C25

A26

B26

C26

A27

B27

C27

A28

B28

C28

A29

B29

C29

A30

B30

C30

A31

B31

C31

A32

B32

C32

TP4

VRB

CHOKE

TP1

TP6

AGND

R7 1k

C4 1uF

TP3

AGND

2N3904

2N3906

INPUT

R14 10k

C11 1uF

C14

1uF

TP5

DGND

+5V

D4D3D2D1D0

C10 1uF

DIV_EN

1 2

+5V

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Figure 2b. ADC 08100 Evaluation Board Clock source

R40 330

461

CLK SEL

C27 1uF

osc

GND

Vcc

OUT

100MHz

-5V

123

-5V

R29 47

R30 240

R33 330

R32

R37

330

R35

C25 1uF

R23

R22 330

R21 330

NTE65

+5VA

C26 1uF

R25

R27 130

+5V

R41 Not used

C32 short

R41A

4.7k

2N3904

ADC_CLK

+5V

RED LED

VCC

VEE

7 2

5 10

U8A

MC10H131FN

VCC

VEE

15 20

17 10

U8B

MC10H131FN

R31

510

-5V

R38

510

-5V

R34 47

R36 47

R39

510

-5V

-5V + 5V

C28 1uF

C30 1uF

C31 1uF

OUT

U7A

MC10H125FN

U7B

MC10H125FN

U7C

MC10H125FN

U7D

MC10H125FN

R28 47

R24 47

R26 510

-5V

C24 1uF

100MHz-2

50MHz

100MHz

_______ 100MHz

[ NOT USED ]

HP1

HP2

OUT

R26A 510

-5V

C29 1uF

C23 1uF

C33 Not used

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8.0 ADC08100 Evaluation Board Bill of Materials

Item Qty Reference Part Source

1 1 C1 10pF Type 1206 2 25 C2, C3, C4, C5, C6, C7, C9, C10, C11, C12, C14,

C15, C16, C17B, C17A, C18, C23, C24, C25,

C26, C27, C28, C29, C30, C31 3 1 C32 Shorting Strap 4 6 C8, C13, C19, C20, C21, C22 47uF, 6.3V Type 7343 (D Size) 5 0 C17, C33 Open Not Used 6 1 C18A 47pF Type 1206 7 3 D1, D2, D3 1N4001 Various 8 1 D4 RED LED DigiKey # 160-1124-ND 9 0 JS1, JS2, HP1, HP2, J5 Not Used n/a

10 1 J2 BNC Connector DigiKey # ARF1177-ND 11 2 J1, J4 3-Pin Post Headers DigiKey # A19351-ND 12 1 J3

13 4 L1, L2, L3, L4 Choke DigiKey # M2204-ND 14 1 P1 Terminal Block DigiKey # ED1609-ND 15 2 Q1, Q5 2N3904 Various 16 1 Q2 2N3906 Various 17 2 Q3, Q4 NTE65 NTE Electronics 18 3 RP1, RP3, RP4 Resistor Pack - 8 x 47 DigiKey # 766-163-R47-ND 19 1 RP2 Resistor Pack - 8 x 1k DigiKey # 766-163-R1k-ND 20 3 R1, R3, R14 10k, 5% Type 1206 21 14 R2, R8A, R9, R10A, R16, R23, R24, R25, R28,

R29, R32, R34, R35, R36

22 4 R4, R5, R12, R17 100, 5% Type 1206 23 1 R6 1.8k, 5% Type 1206 24 4 R7, R8, R10, R11 1k, 5% Type 1206 25 1 R13 470, 5% Type 1206 26 1 R15 220, 5% Type 1206 27 1 R15A 130, 5% Type 1206 28 1 R18 29 1 R19 2.00k, 1% Type 1206 30 1 R20 3.01k, 1% Type 1206 31 5 R21, R22, R33, R37, R40 330, 5% Type 1206 32 5 R26A, R26, R31, R38, R39 510, 5% Type 1206 33 1 R27 130, 5% Type 1206 34 1 R30 240, 5% Type 1206 35 0 R41 Not Used n/a 36 1 R41A 4.7k, 5% Type 1206 37 1 TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8, TP9 Breakable Header DigiKey # S1012-36-ND 38 1 T1 Signal Transformer MiniCircuits type T4-6T 39 1 U1 ADC08100CIMTC National Semiconductor 40 1 U2 CY7C4281-10JC or CY7C4291-10JC Cypress Semiconductor 41 1 U4 LM833N National Semiconductor 42 1 U5 74F74 Various 43 1 U6 LM2931CT National Semiconductor 44 1 U7 MC10H125FN ON Semiconductor 45 1 U8 MC10H131FN ON Semiconductor 46 0 U3 Not Used n/a 47 2 VR1, VR2 1k DigiKey # 3386F-103-ND 48 1 Y1 100MHz Low Jitter, ECL Output 49 1 32-Pin PLCC Socket For U2 DigiKey # A2121-ND 50 1 8-Pin DIP Socket For U4 DigiKey # A400-ND 51 1 6-Pin DIP Socket For T1 DigiKey #AE8906-ND 52 1 4-Pin DIP Socket For Oscillator Y1 DigiKey #A462-ND 53 3 Shorting Jumpers For J4, JS1, JS2 DigiKey #S9601-ND

1uF Type 1206

96-Pin Female DigiKey # H7096-ND

47, 5% Type 1206

51, 5%

Type 1206

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APPENDIX

Summary Tables of Test Points and Connectors

Test Points on the ADC08100 Evaluation Board

TP 1 Power Down Input. Pull high to power down the ADC08100

TP 2 ADC Top Reference Voltage

TP 3 Ground

TP 4 ADC Bottom Reference Voltage

TP 5 Ground

TP 6 Ground

TP 7 Signal Input test point

TP 8 Ground

TP 9 +3V Supply

P1 Connector - Power Supply Connections

J1-1 +5V Positive Power Supply J1-2 GND Power Supply Ground J1-3 +5V Logic and Digital Interface Board Supply J1-4 -5.2V Negative Power Supply

J1 Connector - Number of Memory Chips Used (hard wired)

Connect 1-2 One Memory Chip (Default) Connect 2-3 Two Memory Chips

J2 and JP3 - Not Used

J4 Connector - ADC Clock selection jumper settings

Connect 1-2 Divide frequency of Y1 by 2 (Default) Connect 2-3 Use frequency of Y1

J5Connector - Divide Enable

Connect 1-2 Two Memory Chips Connect 2-3 One Memory Chip (Default)

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J3 Connector - ADC Data Outputs - Connection to WaveVision Digital Interface Board

Signal J2 pin number

ADC output D0 B16

ADC output D1 C16

ADC output D2 B17

ADC output D3 C17

ADC output D4 B18

ADC output D5 C18

ADC output D6 B19

ADC output D7 C19

ADC output D8 not used

ADC output D9 not used

ADC output D10 not used

ADC output D11 not used

GND A1 thru A24, A28, B28, C28, A31, B31, C31

Memory Read Cock B25

Reserved, Signal B22, C22, C23

Reserved, Power A25, A26, B25, B26, C25, C26

(+5V Logic Power Supply to Digital Interface Board )

Reserved, Power (–5.2V) A29, B29, C29

Reserved, Power (+5V) A32, B32, C32

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