MSI MS-V317 Schematic _1.0

A B

D

HGFEC

PG401 A02

4GB GDDR5, 256b, 128Mx32

1

Tall DVI-I + DP + DP + DP/HDMI + DP

TABLE OF CONTENTS

Page

2

3

Description

Table of Contents

1

Block Diagram

2

PCI Express

3

MEMORY: GPU Partition A/B

4

MEMORY: FBA[31:0]

5

MEMORY: FBA[63:32]

6

MEMORY: FBB[31:0]

7

MEMORY: FBB[63:32]

8

MEMORY: GPU Partition C/D

9

MEMORY: FBC[31:0]

10

MEMORY: FBC[63:32]

11

MEMORY: FBD[31:0]

12

MEMORY: FBD[63:32]

13

GPU PWR and GND

14

GPU Decoupling

15

DACA Interface

16
17

IFPAB DVI-I-DL

18

IFPEF with IFPE DP
IFPF DP

19

Page

20 IFPC HDMI/DP

IFPD DP

21

MIOA/B Interface and Frame Lock

22

MISC1: Fan, Thermal, JTAG, GPIO, Stereo

23

MISC2: ROM, XTAL, Straps

24

PS: 5V, PEX_VDD

4

25

Description

PS: FBVDD/Q

26

PS: NVVDD Controller

27
28

PS: NVVDD Phase 1,2
PS: NVVDD Phase 3,4

29

PS: NVVDD Phase 5, 6

30
31

PS: Dynamic Power Balance Logic

32 PS: Dynamic Power Balance Phases

PS: Inputs, Filtering, and Monitoring

33

PS: Shutdown

34

PS: 12V Current Steering PSI Control and LED

35

MECH: Bracket/Thermal

36

MICROCONTROLLER

37

1

2

3

4

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

A B D F H

ASSEMBLY
PAGE DETAIL

BASE LEVEL GENERIC SCHEMATIC ONLY
Table of Contents

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-V317

MS-V317

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Wednesday, August 20, 2014

Wednesday, August 20, 2014

Wednesday, August 20, 2014

NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA

NV_PN

600-1G401-BASE-QS1

PG401-A02

PCB REV

A

EC

BOM REV

G

MS-V317

Table of contents

Table of contents

Table of contents

Sheet ofDate:

137

Sheet ofDate:

137

Sheet ofDate:

137

PAGE
DATE

1 OF 37

04-AUG-2014

5

1.0

1.0

1.0

A B C D E F G H

Page2: Block Diagram

1

Power Supply

NVVDD-PH3

EXT_12V 2x3 PWR 1

(NORTH)

1

Power Supply

NVVDD-PH4

4-WAY SLI/

2

DPDP

QD:2-WAY SLI with FRAME LOCK

Power Supply

NVVDD-PH1

Power Supply

NVVDD-PH2

MEM

MEM

D

MEM

HI

QD:DP

HDMI/

MEM

3

D

LO

DP

C

LO

FB X32

GM204

C

HI

MEM

LO

B

Power Supply

NVVDD-PH5

MEM

MEM

B

HI

Power Supply

NVVDD-PH6

A

LO

Power Supply

5V Linear

Power Supply

FBVDD/FBVDDQ

DVI-I

MEM

A

HI

EXT_12V 2x3 PWR 2/
EXT_12V 2x4 PWR 2

(NORTH)

DYNAMIC OPTION

PEX_12V Finger
DYNAMIC OPTION

EXT_12V 2x3 PWR 2/
EXT_12V 2x4 PWR 2

(NORTH)

QD:EXT_12V 2x4 PWR 2

(EAST)

PEX_12V Finger

PEX_12V 2x4 PWR

2

3

4

QD:STEREO

QUADRO OPTIONS SHOWN IN YELLOW
and prefix "QD:"

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

C E

ASSEMBLY
PAGE DETAIL

BASE LEVEL GENERIC SCHEMATIC ONLY
Block Diagram

PEX_VDD

Open_Vreg option

Fan

PEX_3V3 Finger

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-V317

MS-V317

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Wednesday, August 20, 2014

Wednesday, August 20, 2014

Wednesday, August 20, 2014

NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA

NV_PN

600-1G401-BASE-QS1

PG401-A02

PCB REV

A

FDBA

BOM REV

G

Block Diagram

Block Diagram

Block Diagram

MS-V317

Sheet ofDate:

Sheet ofDate:

Sheet ofDate:

PAGE
DATE

H

237

237

237

2 OF 37

04-AUG-2014

4

1.0

1.0

1.0

5

A B C D E F G H

Page3: PCI Express

12V

C223

4.7uF

16V
10%
X5R
0603
DNI

1

OUT

2

3

4

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

C908

4.7uF

16V
10%
X5R
0603
DNI

STUFF FOR
TESLA ONLY

POWER_BRAKE*

UNSTUFF FOR
DT/QUADRO

PLACE 0603 4.7UF FOOTPRINT
ON TOP OF 0805 FOOTPRINT

C50

4.7uF

16V
10%
X5R
0805
COMMON

3V3

C843

4.7uF

6.3V
20%
X5R
0603
COMMON

GND

R109
0ohm

0.05 ohm
0402
DNI

R110
0ohm

0.05 ohm
0402
DNI

C857

4.7uF

16V
10%
X5R
0805LP
COMMON

C842

0.1uF

16V
10%
X7R
0402
COMMON

RSVD2_POWER_BRAKE

RSVD4_POWER_BRAKE

GND

C850

0.1uF

16V
10%
X7R
0402
COMMON

PEX_PRSNT*

CN2NONPHY-X16

CON_X16
COMMON

@electro_mechanic.con_pci_express(sym_1):page3_i662

B1

+12V

B2

+12V

A2

+12V

A3

+12V

B3

+12V/RSVD

B8

+3V3

A9

+3V3

A10

+3V3

B10

+3V3AUX

A1

PRSNT1

B17

PRSNT2

B12

RSVD

B4

GND

A4

GND

B7

GND

A12

GND

B13

GND

A15

GND

B16

GND

B18

GND

A18

GND

GND

GND

GND

GND

END OF X1

B31

PRSNT2

A19

RSVD

B30

RSVD

A32

RSVD

A20

GND

B21

GND

B22

GND

A23

GND

A24

GND

B25

GND

B26

GND

A27

GND

A28

GND

B29

GND

A31

GND

B32

GND

END OF X4

B48

PRSNT2

A33

RSVD

A34

GND

B35

GND

B36

GND

A37

GND

A38

GND

B39

GND

B40

GND

A41

GND

A42

GND

B43

GND

B44

GND

A45

GND

A46

GND

B47

GND

B49

GND

A49

GND

END OF X8

B81

PRSNT2

A50

RSVD

B82

RSVD

A51

GND

B52

GND

B53

GND

A54

GND

A55

GND

B56

GND

B57

GND

A58

GND

A59

GND

B60

GND

B61

GND

A62

GND

A63

GND

B64

GND

B65

GND

A66

GND

A67

GND

B68

GND

B69

GND

A70

GND

A71

GND

B72

GND

B73

GND

A74

GND

A75

GND

B76

GND

B77

GND

A78

GND

A79

GND

B80

GND

A82

GND

END OF X16

TRST* JTAG1

TCLK JTAG2

TDI JTAG3
TDO JTAG4
TMS JTAG5

SMCLK

SMDAT

PERST

REFCLK
REFCLK

PERP0
PERN0

PETP0
PETN0

PERP1
PERN1

PETP1
PETN1

PERP2
PERN2

PETP2
PETN2

PERP3
PERN3

PETP3
PETN3

PERP4
PERN4

PETP4
PETN4

PERP5
PERN5

PETP5
PETN5

PERP6
PERN6

PETP6
PETN6

PERP7
PERN7

PETP7
PETN7

PERP8
PERN8

PETP8
PETN8

PERP9
PERN9

PETP9
PETN9

PERP10
PERN10

PETP10
PETN10

PERP11
PERN11

PETP11
PETN11

PERP12
PERN12

PETP12
PETN12

PERP13
PERN13

PETP13
PETN13

PERP14
PERN14

PETP14
PETN14

PERP15
PERN15

PETP15
PETN15

R709

0ohm

B9
A5
A6

PEX_TDO

A7
A8

PEX_SMCLK

B5

PEX_SMDAT

B6

B11

WAKE

PEX_RST* PEX_RST_BUF*

A11

PEX_REFCLK

A13

PEX_REFCLK*

A14

PEX_TXX0

A16

PEX_TXX0*

A17

PEX_RX0

B14

PEX_RX0*

B15

PEX_TXX1

A21

PEX_TXX1*

A22

PEX_RX1

B19

PEX_RX1*

B20

PEX_TXX2

A25

PEX_TXX2*

A26

PEX_RX2

B23

PEX_RX2*

B24

PEX_TXX3

A29

PEX_TXX3*

A30

PEX_RX3

B27

PEX_RX3*

B28

PEX_TXX4

A35

PEX_TXX4*

A36

PEX_RX4

B33

PEX_RX4*

B34

PEX_TXX5

A39

PEX_TXX5*

A40

PEX_RX5

B37

PEX_RX5*

B38

PEX_TXX6

A43

PEX_TXX6*

A44

PEX_RX6

B41

PEX_RX6*

B42

PEX_TXX7

A47

PEX_TXX7*

A48

PEX_RX7

B45

PEX_RX7*

B46

PEX_TXX8

A52

PEX_TXX8*

A53

PEX_RX8

B50

PEX_RX8*

B51

PEX_TXX9

A56

PEX_TXX9*

A57

PEX_RX9

B54

PEX_RX9*

B55

PEX_TXX10

A60

PEX_TXX10*

A61

PEX_RX10

B58

PEX_RX10*

B59

PEX_TXX11

A64

PEX_TXX11*

A65

PEX_RX11

B62

PEX_RX11*

B63

PEX_TXX12

A68

PEX_TXX12*

A69

PEX_RX12

B66

PEX_RX12*

B67

PEX_TXX13

A72

PEX_TXX13*

A73

PEX_RX13

B70

PEX_RX13*

B71

PEX_TXX14

A76

PEX_TXX14*

A77

PEX_RX14

B74

PEX_RX14*

B75

PEX_TXX15

A80

PEX_TXX15*

A81

PEX_RX15

B78

PEX_RX15*

B79

0402

COMMON

R61

0402

0.05 ohm

PEX_REFCLK
PEX_REFCLK

PEX_TXX0
PEX_TXX0

PEX_RX0
PEX_RX0

PEX_TXX1
PEX_TXX1

PEX_RX1
PEX_RX1

PEX_TXX2
PEX_TXX2

PEX_RX2
PEX_RX2

PEX_TXX3
PEX_TXX3

PEX_RX3
PEX_RX3

PEX_TXX4
PEX_TXX4

PEX_RX4
PEX_RX4

PEX_TXX5
PEX_TXX5

PEX_RX5
PEX_RX5

PEX_TXX6
PEX_TXX6

PEX_RX6
PEX_RX6

PEX_TXX7
PEX_TXX7

PEX_RX7
PEX_RX7

PEX_TXX8
PEX_TXX8

PEX_RX8
PEX_RX8

PEX_TXX9
PEX_TXX9

PEX_RX9
PEX_RX9

PEX_TXX10
PEX_TXX10

PEX_RX10
PEX_RX10

PEX_TXX11
PEX_TXX11

PEX_RX11
PEX_RX11

PEX_TXX12
PEX_TXX12

PEX_RX12
PEX_RX12

PEX_TXX13
PEX_TXX13

PEX_RX13
PEX_RX13

PEX_TXX14
PEX_TXX14

PEX_RX14
PEX_RX14

PEX_TXX15
PEX_TXX15

PEX_RX15
PEX_RX15

0.05 ohm

3V3_F

R65

R66

2.2k

2.2k

5 %

5 %
0402

0402

COMMON

0ohm

DNI

COMMON

R62

0ohm

DNI

0402

0.05 ohm

I2CS_SCL
I2CS_SDA

34

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

COMMON

COMMON

COMMON

COMMON

COMMON

COMMON

COMMON

COMMON

COMMON

COMMON

COMMON

COMMON

COMMON

COMMON

COMMON

COMMON

C815 0.22uF

6.3V

0402

10%

X7R

C796

0.22uF

6.3V0402
10%

X7R

C792 0.22uF

6.3V0402
10%

X7R

C776 0.22uF

6.3V0402
10%

X7R

C750 0.22uF

6.3V0402
10%

X7R

C738 0.22uF

6.3V

0402

10%

X7R

C727 0.22uF

6.3V0402
10%

X7R

C714 0.22uF

6.3V

0402

10%

X7R

C699 0.22uF

6.3V

0402

10%

X7R

C688 0.22uF

6.3V

0402

10%

X7R

C674 0.22uF

6.3V

0402

10%

X7R

C655 0.22uF

6.3V

0402

10%

X7R

C649 0.22uF

6.3V

0402

10%

X7R

C647 0.22uF

6.3V

0402

10%

X7R

C645 0.22uF

6.3V0402
10%

X7R

C641 0.22uF

6.3V

0402

10%

X7R

C816

0402

C797

C793

C777

0402

C748 0.22uF

C731

0402

C722

C710

C697

0402

C683

0402

C669

C652

0402

C648

0402

C646

C643

0402

C640

0402

C E

0.22uF

6.3V

0.22uF

6.3V0402

0.22uF

6.3V0402

0.22uF

6.3V

6.3V0402

0.22uF

6.3V

0.22uF

6.3V0402

0.22uF

6.3V0402

0.22uF

6.3V

0.22uF

6.3V

0.22uF

6.3V0402

0.22uF

6.3V

0.22uF

6.3V

0.22uF

6.3V0402

0.22uF

6.3V

0.22uF

6.3V

ASSEMBLY
PAGE DETAIL

OUT
OUT

IN

PEX_TX0
PEX_TX0*

10%

COMMON

X7R

PEX_TX1
PEX_TX1*

10%

COMMON

X7R

PEX_TX2
PEX_TX2*

10%

COMMON

X7R

PEX_TX3
PEX_TX3*

10%

COMMON

X7R

PEX_TX4
PEX_TX4*

10%

COMMON

X7R

PEX_TX5
PEX_TX5*

10%

COMMON

X7R

PEX_TX6
PEX_TX6*

10%

COMMON

X7R

PEX_TX7
PEX_TX7*

10%

COMMON

X7R

PEX_TX8
PEX_TX8*

10%

COMMON

X7R

PEX_TX9
PEX_TX9*

10%

COMMON

X7R

PEX_TX10
PEX_TX10*

10%

COMMON

X7R

PEX_TX11
PEX_TX11*

10%

COMMON

X7R

PEX_TX12
PEX_TX12*

10%

COMMON

X7R

PEX_TX13
PEX_TX13*

10%

COMMON

X7R

PEX_TX14
PEX_TX14*

10%

COMMON

X7R

PEX_TX15
PEX_TX15*

10%

COMMON

X7R

23
23

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

BASE LEVEL GENERIC SCHEMATIC ONLY
PCI Express

3V3_F

R1132
10k

5 %
0402
DNI

G1A

@digital.u_gpu_gb3b_256(sym_1):page3_i849
BGA1745
COMMON

1/21 PCI_EXPRESS

BJ21

PEX_WAKE

BE20

PEX_RST

BB20

PEX_CLKREQ

BD20

PEX_REFCLK

BC20

PEX_REFCLK

BC21

PEX_TX0

BD21

PEX_TX0

BH21

PEX_RX0

BG21

PEX_RX0

BE22

PEX_TX1

BE23

PEX_TX1

BG23

PEX_RX1

BH23

PEX_RX1

BD23

PEX_TX2

BC23

PEX_TX2

BJ23

PEX_RX2

BJ24

PEX_RX2

BC24

PEX_TX3

BD24

PEX_TX3

BH24

PEX_RX3

BG24

PEX_RX3

BE26

PEX_TX4

BE25

PEX_TX4

BG26

PEX_RX4

BH26

PEX_RX4

BD26

PEX_TX5

BC26

PEX_TX5

BJ26

PEX_RX5

BJ27

PEX_RX5

BC27

PEX_TX6

BD27

PEX_TX6

BH27

PEX_RX6

BG27

PEX_RX6

BE28

PEX_TX7

BE29

PEX_TX7

BG29

PEX_RX7

BH29

PEX_RX7

BD29

PEX_TX8

BC29

PEX_TX8

BJ29

PEX_RX8

BJ30

PEX_RX8

BC30

PEX_TX9

BD30

PEX_TX9

BH30

PEX_RX9

BG30

PEX_RX9

BE31

PEX_TX10

BE32

PEX_TX10

BG32

PEX_RX10

BH32

PEX_RX10

BD32

PEX_TX11

BC32

PEX_TX11

BJ32

PEX_RX11

BJ33

PEX_RX11

BC33

PEX_TX12

BD33

PEX_TX12

BH33

PEX_RX12

BG33

PEX_RX12

BE34

PEX_TX13

BE35

PEX_TX13

BG35

PEX_RX13

BH35

PEX_RX13

BD35

PEX_TX14

BC35

PEX_TX14

BJ35

PEX_RX14

BJ36

PEX_RX14

BC36

PEX_TX15

BD36

PEX_TX15

BH36

PEX_RX15

BG36

PEX_RX15

PEX_RST*

PEX_RST_MCU*

3V3_F

5

1
2

3

GND

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

PEX_PLL_HVDD

PEX_SVDD_3V3

NVVDD_SENSE

GND_SENSE

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT

PEX_PLLVDD

TESTMODE

PEX_TERMP

R1146

FDBA

0402

0.05 ohm

U52

INS16823418

4

SC70-5
DNI

0ohm

COMMON

MSI

MSI

C715

4.7uF

6.3V
20%
X5R
0603
COMMON

C718

4.7uF

6.3V
20%
X5R
0603
COMMON

MSI

C1189

0.1uF

16V
10%
X7R

PEX_RST_BUF*

0402
DNI

GND

R1152
10k

5 %
0402
DNI

GND

Place near balls

AW33
AY32

C709

C694

AY33

1uF

AY35

6.3V

BA33

10%

BA35

X5R

BB33

0402
COMMON

AY24
AY26

C707

AY27

1uF

AY29

6.3V

AY30

10%

BA24

X5R

BA26

0402
COMMON

BA27
BA29
BA30
BA32
BB24
BB27
BB30

1uF

6.3V
10%
X5R
0402
COMMON

C684
1uF

6.3V
10%
X5R
0402
COMMON

C696
1uF

6.3V
10%
X5R
0402
COMMON

C682
1uF

6.3V
10%
X5R
0402
COMMON

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-V317

MS-V317

PCIE

PCIE

PCIE

Place between
GPU and PS

MS-V317

Sheet ofDate:

Sheet ofDate:

Sheet ofDate:

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev
Custom

Custom

Custom

Wednesday, August 20, 2014

Wednesday, August 20, 2014

Wednesday, August 20, 2014

PEX_VDD

C102
10uF

6.3V
20%
X5R
0805
COMMON

C634
10uF

6.3V
20%
X5R
0805LP
COMMON

C108
22uF

6.3V
20%
X5R
0805
COMMON

C630
22uF

6.3V
20%
X5R
0805LP
COMMON

C109
10uF

6.3V
20%
X5R
0805
COMMON

C100
10uF

6.3V
20%
X5R
0805
COMMON

GND

PEX_VDD

GND

C642
22uF

6.3V
20%
X5R
0805LP
COMMON

C633
22uF

6.3V
20%
X5R
0805LP
COMMON

1.0

1.0

1.0

337

337

337

1

2

3V3_RUN

AW30
AW32

AY23
AW23

NVVDD_SENSE

GND_SENSE

C687

0.1uF

16V
10%
X7R
0402
COMMON

C693

C808

4.7uF

6.3V
20%
X5R
0603
COMMON

C822

4.7uF

6.3V
20%
X5R
0603
COMMON

GND

27
27

0.1uF

16V
10%
X7R
0402
COMMON

OUT

OUT

3

4

R631

BH38
BG38

AW26

BA23

BJ38

PEX_PLL_CLK_OUT
PEX_PLL_CLK_OUT*

GPU_TESTMODE

PEX_TERMP

PEX_PLL_CLK
PEX_PLL_CLK

PLLVDD now requires decap only

R83 10k

COMMON

0402

5 %

R630 2.49k

COMMON

0402

1 %

PEXGEN3_SIGNALS
PEXGEN3_SIGNALS

GND

GND

G

200ohm

5 %
0402
DNI

C85

C84
1uF

0.1uF

16V

6.3V

10%

10%

X7R

X5R

0402

0402

COMMON

COMMON

NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA

NV_PN

600-1G401-BASE-QS1

PG401-A02

PCB REV

A

BOM REV

PEX_VDD

GND

C91

4.7uF

6.3V
20%
X5R
0603
COMMON

5

3 OF 37

PAGE
DATE

04-AUG-2014

H

A B C D E F G H

Page4: MEMORY: GPU Partition A/B

1

5

Fba_D<0>

5

Fba_D<1>

5

Fba_D<2>

5

Fba_D<3>

5

Fba_D<4>

5

Fba_D<5>

5

Fba_D<6>

5

Fba_D<7>

5

Fba_D<8>

5

Fba_D<9>

5

Fba_D<10>

5

Fba_D<11>

5

Fba_D<12>

5

Fba_D<13>

5

Fba_D<14>

5

Fba_D<15>

5

Fba_D<16>

5

Fba_D<17>

5

Fba_D<18>

5

Fba_D<19>

5

Fba_D<20>

5

Fba_D<21>

5

2

3

5
5
5
5
06
06

4

06
06

Fba_D<22>

5

Fba_D<23>

5

Fba_D<24>

5

Fba_D<25>

5

Fba_D<26>

5

Fba_D<27>

5

Fba_D<28>

5

Fba_D<29>

5

Fba_D<30>

5

Fba_D<31>

06

Fba_D<32>

06

Fba_D<33>

06

Fba_D<34>

06

Fba_D<35>

06

Fba_D<36>

06

Fba_D<37>

06

Fba_D<38>

06

Fba_D<39>

06

Fba_D<40>

06

Fba_D<41>

06

Fba_D<42>

06

Fba_D<43>

06

Fba_D<44>

06

Fba_D<45>

06

Fba_D<46>

06

Fba_D<47>

06

Fba_D<48>

06

Fba_D<49>

06

Fba_D<50>

06

Fba_D<51>

06

Fba_D<52>

06

Fba_D<53>

06

Fba_D<54>

06

Fba_D<55>

06

Fba_D<56>

06

Fba_D<57>

06

Fba_D<58>

06

Fba_D<59>

06

Fba_D<60>

06

Fba_D<61>

06

Fba_D<62>

06

Fba_D<63>

5
5
5
5
06
06
06
06

1V_PLL

C653

0.1uF

16V
10%
X7R
0402
COMMON

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

BI
BI
BI
BI
BI
BI
BI
BI

FBA_D<0>

0

FBA_D<1>

1

FBA_D<2>

2

FBA_D<3>

3

FBA_D<4>

4

FBA_D<5>

5

FBA_D<6>

6

FBA_D<7>

7

FBA_D<8>

8

FBA_D<9>

9

FBA_D<10>

10

FBA_D<11>

11

FBA_D<12>

12

FBA_D<13>

13

FBA_D<14>

14

FBA_D<15>

15

FBA_D<16>

16

FBA_D<17>

17

FBA_D<18>

18

FBA_D<19>

19

FBA_D<20>

20

FBA_D<21>

21

FBA_D<22>

22

FBA_D<23>

23

FBA_D<24>

24

FBA_D<25>

25

FBA_D<26>

26

FBA_D<27>

27

FBA_D<28>

28

FBA_D<29>

29

FBA_D<30>

30

FBA_D<31>

31

FBA_D<32>

32

FBA_D<33>

33

FBA_D<34>

34

FBA_D<35>

35

FBA_D<36>

36

FBA_D<37>

37

FBA_D<38>

38

FBA_D<39>

39

FBA_D<40>

40

FBA_D<41>

41

FBA_D<42>

42

FBA_D<43>

43

FBA_D<44>

44

FBA_D<45>

45

FBA_D<46>

46

FBA_D<47>

47

FBA_D<48>

48

FBA_D<49>

49

FBA_D<50>

50

FBA_D<51>

51

FBA_D<52>

52

FBA_D<53>

53

FBA_D<54>

54

FBA_D<55>

55

FBA_D<56>

56

FBA_D<57>

57

FBA_D<58>

58

FBA_D<59>

59

FBA_D<60>

60

FBA_D<61>

61

FBA_D<62>

62

FBA_D<63>

63

FBA_DBI<0>

0

FBA_DBI<1>

1

FBA_DBI<2>

2

FBA_DBI<3>

3

FBA_DBI<4>

4

FBA_DBI<5>

5

FBA_DBI<6>

6

FBA_DBI<7>

7

FBA_EDC<0>

0

FBA_EDC<1>

1

FBA_EDC<2>

2

FBA_EDC<3>

3

FBA_EDC<4>

4

FBA_EDC<5>

5

FBA_EDC<6>

6

FBA_EDC<7>

7

C725

0.1uF

16V
10%
X7R
0402
COMMON

GND

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

G1B

@digital.u_gpu_gb3b_256(sym_2):page4_i1879
BGA1745
COMMON

2/21 FBA

V43

FBA_D0

V41

FBA_D1

V44

FBA_D2

V42

FBA_D3

U43

FBA_D4

U44

FBA_D5

U41

FBA_D6

U42

FBA_D7

AA46

FBA_D8

AC46

FBA_D9

AA45

FBA_D10

AA47

FBA_D11

Y46

FBA_D12

Y49

FBA_D13

Y45

FBA_D14

Y48

FBA_D15

AJ46

FBA_D16

AG47

FBA_D17

AG46

FBA_D18

AG45

FBA_D19

AF44

FBA_D20

AF45

FBA_D21

AD46

FBA_D22

AD45

FBA_D23

AD44

FBA_D24

AD43

FBA_D25

AD42

FBA_D26

AC42

FBA_D27

AA44

FBA_D28

AA43

FBA_D29

AA42

FBA_D30

AA40

FBA_D31

AT48

FBA_D32

AT46

FBA_D33

AT49

FBA_D34

AT47

FBA_D35

AW47

FBA_D36

AW48

FBA_D37

BA47

FBA_D38

AW46

FBA_D39

AR46

FBA_D40

AN45

FBA_D41

AR49

FBA_D42

AR48

FBA_D43

AT45

FBA_D44

AR44

FBA_D45

AN41

FBA_D46

AN42

FBA_D47

AG40

FBA_D48

AG43

FBA_D49

AG41

FBA_D50

AJ43

FBA_D51

AJ40

FBA_D52

AK40

FBA_D53

AK42

FBA_D54

AK41

FBA_D55

AK45

FBA_D56

AK43

FBA_D57

AK48

FBA_D58

AK49

FBA_D59

AM45

FBA_D60

AM44

FBA_D61

AK44

FBA_D62

AM43

FBA_D63

U40

FBA_DQM0

AC45

FBA_DQM1

AG44

FBA_DQM2

AA41

FBA_DQM3

AV45

FBA_DQM4

AR45

FBA_DQM5

AG42

FBA_DQM6

AM46

FBA_DQM7

U45

FBA_DQS_WP0

Y43

FBA_DQS_WP1

AF42

FBA_DQS_WP2

AC44

FBA_DQS_WP3

AV47

FBA_DQS_WP4

AN43

FBA_DQS_WP5

AJ42

FBA_DQS_WP6

AK47

FBA_DQS_WP7

U46

FBA_DQS_RN0

Y44

FBA_DQS_RN1

AF43

FBA_DQS_RN2

AC43

FBA_DQS_RN3

AV46

FBA_DQS_RN4

AN44

FBA_DQS_RN5

AJ41

FBA_DQS_RN6

AK46

FBA_DQS_RN7

AC39

FB_REFPLL_DLL_AVDD0

L21

FB_REFPLL_DLL_AVDD1

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD32
FBA_CMD33
FBA_CMD34
FBA_CMD35

FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1

FBA_WCK01
FBA_WCK01

FBA_WCKB01
FBA_WCKB01

FBA_WCK23
FBA_WCK23

FBA_WCKB23
FBA_WCKB23

FBA_WCK45
FBA_WCK45

FBA_WCKB45
FBA_WCKB45

FBA_WCK67
FBA_WCK67

FBA_WCKB67
FBA_WCKB67

U48
U49
V48
V49
V47
AA49
AA48
AC48
AC49
AC47
AD49
AD48
AD47
AF47
AF48
BB49
BA48
BA49
AW49
AV48
AV49
AN48
AN49
AM47
AM49
AM48
AJ47
AJ49
AJ48
AG48
AG49
AF49
AF46
Y47
AR47

AF41
AF40
AJ44
AJ45

V46
V45
Y42
Y41
AD41
AD40
AC41
AC40
AT44
AT43
AR43
AR42
AM42
AM41
AN47
AN46

FBA_CMD<1>
FBA_CMD<2>
FBA_CMD<3>
FBA_CMD<4>
FBA_CMD<5>
FBA_CMD<6>
FBA_CMD<7>
FBA_CMD<8>
FBA_CMD<9>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<12>
FBA_CMD<13>
FBA_CMD<14>
FBA_CMD<15>
FBA_CMD<16>
FBA_CMD<17>
FBA_CMD<18>
FBA_CMD<19>
FBA_CMD<20>
FBA_CMD<21>
FBA_CMD<22>
FBA_CMD<23>
FBA_CMD<24>
FBA_CMD<25>
FBA_CMD<26>
FBA_CMD<27>
FBA_CMD<28>
FBA_CMD<29>
FBA_CMD<30>
FBA_CMD<31>

FBA_DEBUG0
FBA_DEBUG1

FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*

FBA_WCK01
FBA_WCK01*

FBA_WCK23
FBA_WCK23*

FBA_WCK45
FBA_WCK45*

FBA_WCK67
FBA_WCK67*

0
1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

R622 60.4ohm

0402 DNI

1 %

FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1

FBA_WCK01
FBA_WCK01

FBA_WCK23
FBA_WCK23

FBA_WCK45
FBA_WCK45

FBA_WCK67
FBA_WCK67

FB_CLK
FB_CLK
FB_CLK
FB_CLK

FB_WCK
FB_WCK

FB_WCK
FB_WCK

FB_WCK
FB_WCK

FB_WCK
FB_WCK

FBA_CMD<0>
FBA_CMD<1>
FBA_CMD<2>
FBA_CMD<3>
FBA_CMD<4>
FBA_CMD<5>
FBA_CMD<6>
FBA_CMD<7>
FBA_CMD<8>
FBA_CMD<9>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<12>
FBA_CMD<13>
FBA_CMD<14>
FBA_CMD<15>
FBA_CMD<16>
FBA_CMD<17>
FBA_CMD<18>
FBA_CMD<19>
FBA_CMD<20>
FBA_CMD<21>
FBA_CMD<22>
FBA_CMD<23>
FBA_CMD<24>
FBA_CMD<25>
FBA_CMD<26>
FBA_CMD<27>
FBA_CMD<28>
FBA_CMD<29>
FBA_CMD<30>
FBA_CMD<31>

R623

0402

1 %

60.4ohm

DNI

FBA_CMD<0>

U47

3V3_RUN

LB501
30ohm

COMMON
BEAD_0603

FBA_PLL_AVDD

AJ39

C820

0.1uF

16V
10%
X7R
0402
COMMON

3V3_PLL 3V3_PLL

C823

22uF

6.3V

20%

X5R

0805LP

COMMON

GND

R596
10k

5 %
0402

FBA_CMD<1>
FBA_CMD<17>

FBA_CMD<2>
FBA_CMD<18>

COMMON

R616
10k

5 %
0402
COMMON

C E

OUT
OUT
OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

OUT

ASSEMBLY
PAGE DETAIL

GDDR5 CMD Mapping

CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6

CMD8
CMD9
CMD10 WE*
CMD11
CMD12

5

CMD13

5

CMD14

5

CMD15

5

CMD16

5

CMD17

5

CMD18

5

CMD19

5

CMD20

5

CMD21

5

CMD22

5

CMD23

5

CMD24

5

CMD25

5

CMD26

5

CMD27

5

CMD28

06

CMD29

06

CMD30

06

CMD31

06
06
06
06
06
06
06
06
06
06
06
06

FBVDDQ

06

FBVDDQ

R595
10k

5 %
0402
COMMON

R614
10k

5 %
0402
COMMON

GND

CAS*
CKE*
RST*
RAS*
A1_A9
A0_A10
A12_RFU
ABI*CMD7
A6_A11
A7_A8

A5_BA1
A4_BA2
A2_BA0
A3_BA3
CS*

32..630..31CMD

CAS*
CKE*
RST*
RAS*
A1_A9
A0_A10
A12_RFU
ABI*
A6_A11
A7_A8
WE*
A5_BA1
A4_BA2
A2_BA0
A3_BA3
CS*

5
5
06
06

5
5

5
5

06
06

06
06

4,09,16,17,18,20,21

R635
10k

5 %
0402

FBB_CMD<1>
FBB_CMD<17>

FBB_CMD<2>
FBB_CMD<18>

BASE LEVEL GENERIC SCHEMATIC ONLY
MEMORY: GPU Partition A/B

COMMON

R617
10k

5 %
0402
COMMON

G1C

@digital.u_gpu_gb3b_256(sym_3):page4_i1880
BGA1745
COMMON

07

Fbb_D<0>

07

Fbb_D<1>

07

Fbb_D<2>

07

Fbb_D<3>

07

Fbb_D<4>

07

Fbb_D<5>

07

Fbb_D<6>

07

Fbb_D<7>

07

Fbb_D<8>

07

Fbb_D<9>

07

Fbb_D<10>

07

Fbb_D<11>

07

Fbb_D<12>

07

Fbb_D<13>

07

Fbb_D<14>

07

Fbb_D<15>

07

Fbb_D<16>

07

Fbb_D<17>

07

Fbb_D<18>

07

Fbb_D<19>

07

Fbb_D<20>

07

Fbb_D<21>

07

Fbb_D<22>

07

Fbb_D<23>

07

Fbb_D<24>

07

Fbb_D<25>

07

Fbb_D<26>

07

Fbb_D<27>

07

Fbb_D<28>

07

Fbb_D<29>

07

Fbb_D<30>

07

Fbb_D<31>

8

Fbb_D<32>

8

Fbb_D<33>

8

Fbb_D<34>

8

Fbb_D<35>

8

Fbb_D<36>

8

Fbb_D<37>

8

Fbb_D<38>

8

Fbb_D<39>

8

Fbb_D<40>

8

Fbb_D<41>

8

Fbb_D<42>

8

Fbb_D<43>

8

Fbb_D<44>

8

Fbb_D<45>

8

Fbb_D<46>

8

Fbb_D<47>

8

Fbb_D<48>

8

Fbb_D<49>

8

Fbb_D<50>

8

Fbb_D<51>

8

Fbb_D<52>

8

Fbb_D<53>

8

Fbb_D<54>

8

Fbb_D<55>

8

Fbb_D<56>

8

Fbb_D<57>

8

Fbb_D<58>

8

Fbb_D<59>

8

Fbb_D<60>

8

Fbb_D<61>

8

Fbb_D<62>

8

Fbb_D<63>

07
07
07
07
8
8
8
8

07
07
07
07
8
8
8
8

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

BI
BI
BI
BI
BI
BI
BI
BI

FBB_D<0>

0

FBB_D<1>

1

FBB_D<2>

2

FBB_D<3>

3

FBB_D<4>

4

FBB_D<5>

5

FBB_D<6>

6

FBB_D<7>

7

FBB_D<8>

8

FBB_D<9>

9

FBB_D<10>

10

FBB_D<11>

11

FBB_D<12>

12

FBB_D<13>

13

FBB_D<14>

14

FBB_D<15>

15

FBB_D<16>

16

FBB_D<17>

17

FBB_D<18>

18

FBB_D<19>

19

FBB_D<20>

20

FBB_D<21>

21

FBB_D<22>

22

FBB_D<23>

23

FBB_D<24>

24

FBB_D<25>

25

FBB_D<26>

26

FBB_D<27>

27

FBB_D<28>

28

FBB_D<29>

29

FBB_D<30>

30

FBB_D<31>

31

FBB_D<32>

32

FBB_D<33>

33

FBB_D<34>

34

FBB_D<35>

35

FBB_D<36>

36

FBB_D<37>

37

FBB_D<38>

38

FBB_D<39>

39

FBB_D<40>

40

FBB_D<41>

41

FBB_D<42>

42

FBB_D<43>

43

FBB_D<44>

44

FBB_D<45>

45

FBB_D<46>

46

FBB_D<47>

47

FBB_D<48>

48

FBB_D<49>

49

FBB_D<50>

50

FBB_D<51>

51

FBB_D<52>

52

FBB_D<53>

53

FBB_D<54>

54

FBB_D<55>

55

FBB_D<56>

56

FBB_D<57>

57

FBB_D<58>

58

FBB_D<59>

59

FBB_D<60>

60

FBB_D<61>

61

FBB_D<62>

62

FBB_D<63>

63

FBB_DBI<0>

0

FBB_DBI<1>

1

FBB_DBI<2>

2

FBB_DBI<3>

3

FBB_DBI<4>

4

FBB_DBI<5>

5

FBB_DBI<6>

6

FBB_DBI<7>

7

FBB_EDC<0>

0

FBB_EDC<1>

1

FBB_EDC<2>

2

FBB_EDC<3>

3

FBB_EDC<4>

4

FBB_EDC<5>

5

FBB_EDC<6>

6

FBB_EDC<7>

7

FBVDDQ

R594
10k

5 %
0402
COMMON

R634
10k

5 %
0402
COMMON

GND

3/21 FBB

D30
G30
E30

F30

G29

F29

J29
H29
C33
E33

F33
D33
C30
K33
E32
D32
H39
G39

F39
D41

F38
G38
D38
E38

F36
K35
E36
D36
G35

F35
D35
E35
M44
P42
M43
P43
R45
R46
R43
R44
M47
P44
M46
M45
P47
P49
P45
P46

F46
E47
D47
D48

F48
H46
H47
H48

L45

L44

J46
H49

L47

J49

L48

L49

E29
G33
H38
C36
P41
P48

F47

L46

J30
H33
D39

J35
R42
M48

F49

J47

H30

J33
E39
H35
R41
M49

E49

J48

FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63

FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7

FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7

FBB_DQS_RN0
FBB_DQS_RN1
FBB_DQS_RN2
FBB_DQS_RN3
FBB_DQS_RN4
FBB_DQS_RN5
FBB_DQS_RN6
FBB_DQS_RN7

FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8

FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_CMD32
FBB_CMD33
FBB_CMD34
FBB_CMD35

FBB_CLK0
FBB_CLK0
FBB_CLK1
FBB_CLK1

FBB_WCK01
FBB_WCK01

FBB_WCKB01
FBB_WCKB01

FBB_WCK23
FBB_WCK23

FBB_WCKB23
FBB_WCKB23

FBB_WCK45
FBB_WCK45

FBB_WCKB45
FBB_WCKB45

FBB_WCK67
FBB_WCK67

FBB_WCKB67
FBB_WCKB67

FBB_PLL_AVDD

FDBA

FBB_CMD<0>

C29

FBB_CMD<1>

B29

FBB_CMD<2>

A29

FBB_CMD<3>

A30

FBB_CMD<4>

B30

FBB_CMD<5>

B32

FBB_CMD<6>

A32

FBB_CMD<7>

C32

FBB_CMD<8>

A33

FBB_CMD<9>

B33

FBB_CMD<10>

B35

FBB_CMD<11>

A35

FBB_CMD<12>

C35

FBB_CMD<13>

A36

FBB_CMD<14>

B36

FBB_CMD<15>

B38

FBB_CMD<16>

D49

FBB_CMD<17>

C48

FBB_CMD<18>

B46

FBB_CMD<19>

A46

FBB_CMD<20>

A45

FBB_CMD<21>

C44

FBB_CMD<22>

A44

FBB_CMD<23>

B44

FBB_CMD<24>

C42

FBB_CMD<25>

B42

FBB_CMD<26>

A42

FBB_CMD<27>

A41

FBB_CMD<28>

B41

FBB_CMD<29>

C39

FBB_CMD<30>

B39

FBB_CMD<31>

A39
A38
C38

FBB_DEBUG0

D29

FBB_DEBUG1

C41

FBB_CLK0

E41

FBB_CLK0*

F41

FBB_CLK1

E42

FBB_CLK1*

D42

FBB_WCK01

F32

FBB_WCK01*

G32
H32
J32

FBB_WCK23

G36

FBB_WCK23*

H36
K36
J36

FBB_WCK45

M42

FBB_WCK45*

M41
L42
L43

FBB_WCK67

H45

FBB_WCK67*

H44
J45
J44

L36

GND

MSI

MSI

MSI

NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA

NV_PN

PCB REV
BOM REV

G

Fbb_Cmd<0>
Fbb_Cmd<1>
Fbb_Cmd<2>
Fbb_Cmd<3>
Fbb_Cmd<4>
Fbb_Cmd<5>
Fbb_Cmd<6>
Fbb_Cmd<7>
Fbb_Cmd<8>
Fbb_Cmd<9>
Fbb_Cmd<10>
Fbb_Cmd<11>
Fbb_Cmd<12>
Fbb_Cmd<13>
Fbb_Cmd<14>
Fbb_Cmd<15>
Fbb_Cmd<16>
Fbb_Cmd<17>
Fbb_Cmd<18>
Fbb_Cmd<19>
Fbb_Cmd<20>
Fbb_Cmd<21>
Fbb_Cmd<22>
Fbb_Cmd<23>
Fbb_Cmd<24>
Fbb_Cmd<25>
Fbb_Cmd<26>
Fbb_Cmd<27>
Fbb_Cmd<28>
Fbb_Cmd<29>
Fbb_Cmd<30>
Fbb_Cmd<31>

1 %

FB_CLK
FB_CLK
FB_CLK
FB_CLK

FB_WCK
FB_WCK

FB_WCK
FB_WCK

FB_WCK
FB_WCK

FB_WCK
FB_WCK

MS-V317

MS-V317

MS-V317

07
07
07
07
07
07
07
07
07
07
07
07
07
07
07
07
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8

R629 60.4ohm

0402 DNI

1 %

4,09,16,17,18,20,21

H

FBVDDQ

OUT
OUT
OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

Sheet ofDate:

437

Sheet ofDate:

437

Sheet ofDate:

437

PAGE
DATE

4 OF 37

04-AUG-2014

0
1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

R641 60.4ohm

0402 DNI

FBB_CLK0
FBB_CLK0
FBB_CLK1
FBB_CLK1

FBB_WCK01
FBB_WCK01

FBB_WCK23
FBB_WCK23

FBB_WCK45
FBB_WCK45

FBB_WCK67
FBB_WCK67

IN

C654

0.1uF

16V
10%
X7R
0402
COMMON

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

MEMORY: GPU Partition A/B

MEMORY: GPU Partition A/B

MEMORY: GPU Partition A/B

Wednesday, August 20, 2014

Wednesday, August 20, 2014

Wednesday, August 20, 2014

600-1G401-BASE-QS1

PG401-A02
A

1

2

07
07
8
8

3

07
07

07
07

8
8

8
8

4

1.0

1.0

1.0

5

A B C D E F G H

Page5: MEMORY: FBA Partition 31..0

1

GND

M7C

@memory.u_mem_sd_ddr5_x32(sym_7):page5_i361
BGA170_MIRR
COMMON

Mirrored

B10

VSS

B5

VSS

D10

VSS

G10

VSS

G5

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L10

VSS

L5

VSS

P10

VSS

T10

VSS

T5

VSS

A1

VSSQ

A12

VSSQ

A14

VSSQ

A3

VSSQ

C1

VSSQ

C11

VSSQ

C12

VSSQ

C14

VSSQ

C3

VSSQ

C4

VSSQ

E1

VSSQ

E12

VSSQ

E14

VSSQ

E3

VSSQ

F10

VSSQ

F5

VSSQ

H13

VSSQ

H2

VSSQ

K13

VSSQ

K2

VSSQ

M10

VSSQ

M5

VSSQ

N1

VSSQ

N12

VSSQ

N14

VSSQ

N3

VSSQ

R1

VSSQ

R11

VSSQ

R12

VSSQ

R14

VSSQ

R3

VSSQ

R4

VSSQ

V1

VSSQ

V12

VSSQ

V14

VSSQ

V3

VSSQ

SOE*/MF_VDD

add 1k to VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

FBVDDQ

R600

FBA_MF1_A

J1
C10

VDD

C5

VDD

D11

VDD

G1

VDD

G11

VDD

G14

VDD

G4

VDD

L1

VDD

L11

VDD

L14

VDD

L4

VDD

P11

VDD

R10

VDD

R5

VDD

B1
B12
B14
B3
D1
D12
D14
D3
E10
E5
F1
F12
F14
F3
G13
G2
H12
H3
K12
K3
L13
L2
M1
M12
M14
M3
N10
N5
P1
P12
P14
P3
T1
T12
T14
T3

1k

0402 COMMON

1 %

FBVDDQ

M7B

@memory.u_mem_sd_ddr5_x32(sym_5):page5_i360
BGA170_MIRR

M7D

@memory.u_mem_sd_ddr5_x32(sym_2):page5_i358
BGA170_MIRR

2

4

Fba_D<0>

4

Fba_D<1>

4

Fba_D<2>

4

Fba_D<3>

4

Fba_D<4>

4

Fba_D<5>

4

Fba_D<6>

4

Fba_D<7>

4
4

4

Fba_D<8>

4

Fba_D<9>

4

Fba_D<10>

4

Fba_D<11>

4

Fba_D<12>

4

Fba_D<13>

4

Fba_D<14>

4

Fba_D<15>

4
4

3

4
4

FBA_D<0>

0

FBA_D<1>

1

FBA_D<2>

2

FBA_D<3>

3

FBA_D<4>

4

FBA_D<5>

5

FBA_D<6>

6

FBA_D<7>

7

FBA_EDC<0>

BI

FBA_DBI<0>

BI

FBA_D<8>

8

FBA_D<9>

9

FBA_D<10>

10

FBA_D<11>

11

FBA_D<12>

12

FBA_D<13>

13

FBA_D<14>

14

FBA_D<15>

15

FBA_EDC<1>

BI

FBA_DBI<1>

BI

FBA_WCK01

IN

FBA_WCK01*

IN

COMMON

MIRRORED

x16x32

V4

DQ0

NC

4

V2

DQ1

NC

T4

DQ2

NC

T2

DQ3

NC

N4

DQ4

NC

N2

DQ5

NC

M4

DQ6

NC

M2

DQ7

NC

R2

EDC0

NC

P2

DBI0

NC

V10

VREFD

V11

DQ8

V13

DQ9

T11

DQ10

T13

DQ11

N11

DQ12

N13

DQ13

M11

DQ14

M13

DQ15

R13

EDC1

P13

DBI1

P4

WCK01

P5

WCK01

Fba_D<16>

4

Fba_D<17>

4

Fba_D<18>

4

Fba_D<19>

4

Fba_D<20>

4

Fba_D<21>

4

Fba_D<22>

4

Fba_D<23>

4
4

FBA_VREFD

4

Fba_D<24>

4

Fba_D<25>

4

Fba_D<26>

4

Fba_D<27>

4

Fba_D<28>

4

Fba_D<29>

4

Fba_D<30>

4

Fba_D<31>

4
4

4
4

FBA_D<16>

16

FBA_D<17>

17

FBA_D<18>

18

FBA_D<19>

19

FBA_D<20>

20

FBA_D<21>

21

FBA_D<22>

22

FBA_D<23>

23

FBA_EDC<2>

BI

FBA_DBI<2>

BI

FBA_D<24>

24

FBA_D<25>

25

FBA_D<26>

26

FBA_D<27>

27

FBA_D<28>

28

FBA_D<29>

29

FBA_D<30>

30

FBA_D<31>

31

FBA_EDC<3>

BI

FBA_DBI<3>

BI

FBA_WCK23

IN

FBA_WCK23*

IN

07,10,12,23

IN

M7A

@memory.u_mem_sd_ddr5_x32(sym_4):page5_i359
BGA170_MIRR
COMMON

MIRRORED

x32 x16

A11

DQ16

A13

DQ17

B11

DQ18

B13

DQ19

E11

DQ20

E13

DQ21

F11

DQ22

F13

DQ23

C13

EDC2

D13

DBI2

A4

DQ24

A2

DQ25

B4

DQ26

B2

DQ27

E4

DQ28

E2

DQ29

F4

DQ30

F2

DQ31

C2

EDC3

D2

DBI3

D4

WCK23

D5

WCK23

GPIO10_FBVREF_SEL

VREFD

NC
NC
NC
NC
NC
NC
NC
NC

GND

NC

A10

GND GND

C137
820pF

50V
10%
X7R
0402
COMMON

0.140A1.05V

1G1D1S

FBVDDQ

R103
549ohm

1 %
0402
COMMON

R104

1.33k

1 %
0402
COMMON

3

D

Q15

@discrete.q_fet_n_enh(sym_2):page5_i328
SOT23_1G1D1S

G

1

COMMON

S

2

60V

0.26A
3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V

0.31A

0.3W
20V

GND

FBA_VREFD

R102
931ohm

1 %
0402
COMMON

FBA_CMD<3>

4

C116
820pF

50V
10%
X7R
0402
COMMON

3

FBA_CMD<0>

4

0

FBA_CMD<10>

4

10

FBA_CMD<15>

4

15

FBA_CMD<7>

4

7

FBA_CMD<5>

4

5

FBA_CMD<4>

4

4

FBA_CMD<13>

4

13

FBA_CMD<14>

4

14

FBA_CMD<12>

4

12

FBA_CMD<11>

4

11

FBA_CMD<8>

4

8

FBA_CMD<9>

4

9

FBA_CMD<6>

4

6

FBA_CMD<2>

4

2

FBA_CMD<1>

4

1

R615

40.2ohm

1 %
0402
COMMON

C609
10nF

16V
10%
X7R
0402
COMMON

GND

OUT

FBA_VREFC

R605

0402 COMMON

R591

0402 COMMON

FBA_ZQ_1_B

121ohm

1 %

FBA_SEN_1

1k

1 %

GND

FBA_CMD<3>
FBA_CMD<0>
FBA_CMD<10>
FBA_CMD<15>

FBA_CMD<7>
FBA_CMD<5>

FBA_CMD<4>
FBA_CMD<13>
FBA_CMD<14>
FBA_CMD<12>
FBA_CMD<11>
FBA_CMD<8>
FBA_CMD<9>
FBA_CMD<6>

FBA_CMD<2>
FBA_CMD<1>

FBA_CLK0

IN

FBA_CLK0*

IN

R611

40.2ohm

1 %
0402
COMMON

FBA_CLK0_RC

0.350 1.05V

R94
931ohm

1 %
0402
COMMON

GND

4
4

FBA_VREF_Q

06

FBVDDQ

R93
549ohm

1 %
0402
COMMON

R89

1.33k

1 %
0402
COMMON

GND

OUT

1.05V

0.350

COMMON

L3

RAS

G3

CAS

G12

WE

L12

CS

J4

ABI

K4

A0_A10

K5

A1_A9

K11

A2_BA0

K10

A3_BA3

H11

A4_BA2

H10

A5_BA1

H5

A6_A11

H4

A7_A8

J5

RFU_A12

J2

RESET

J3

CKE

J12

CLK

J11

CLK

A5

NC_RFU_A5

V5

NC_RFU_V5

06

J14

VREFC

J13

ZQ

J10

SEN

4

1

FBVDDQ

2

3

4

FBVDDQ

C601

C603

C586

C596

C624

10uF

4.7uF

6.3V

6.3V

20%

20%

X5R

X5R

0805LP

0603

COMMON

COMMON

FBVDDQ

C587

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

10uF

6.3V
20%
X5R
0805LP
COMMON

C130

4.7uF

6.3V
20%
X5R
0603
COMMON

4.7uF

6.3V
20%
X5R
0603
COMMON

C127

4.7uF

6.3V
20%
X5R
0603
COMMON

1uF

6.3V
10%
X5R
0402
COMMON

C120
1uF

6.3V
10%
X5R
0402
COMMON

1uF

6.3V
10%
X5R
0402
COMMON

C125
1uF

6.3V
10%
X5R
0402
COMMON

C619
1uF

6.3V
10%
X5R
0402
COMMON

C113
1uF

6.3V
10%
X5R
0402
COMMON

C613
1uF

6.3V
10%
X5R
0402
COMMON

C110
1uF

6.3V
10%
X5R
0402
COMMON

C614
1uF

6.3V
10%
X5R
0402
COMMON

GND

C592
1uF

6.3V
10%
X5R
0402
COMMON

GND

C916
47uF

4V
20%
X5R
0805LP
DNI

C E

ASSEMBLY
PAGE DETAIL

BASE LEVEL GENERIC SCHEMATIC ONLY
MEMORY: FBA[31:0]

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-V317

MS-V317

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Wednesday, August 20, 2014

Wednesday, August 20, 2014

Wednesday, August 20, 2014

NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA

NV_PN

600-1G401-BASE-QS1

PG401-A02

PCB REV

A

FDBA

BOM REV

G

MS-V317

5: MEMORY: FBA Partition 31..0

5: MEMORY: FBA Partition 31..0

5: MEMORY: FBA Partition 31..0

Sheet ofDate:

Sheet ofDate:

Sheet ofDate:

H

537

537

537

5 OF 37

PAGE
DATE

04-AUG-2014

10

10

10

5

A B C D E F G H

Page6: MEMORY: FBA Partition 63..32

1

GND

M8C

@memory.u_mem_sd_ddr5_x32(sym_6):page6_i109
BGA170
COMMON

Normal

J1

MF_VSS/SOE*

add 1k to VSS

B10

VSS

B5

VSS

D10

VSS

G10

VSS

G5

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L10

VSS

L5

VSS

P10

VSS

T10

VSS

T5

VSS

A1

VSSQ

A12

VSSQ

A14

VSSQ

A3

VSSQ

C1

VSSQ

C11

VSSQ

C12

VSSQ

C14

VSSQ

C3

VSSQ

C4

VSSQ

E1

VSSQ

E12

VSSQ

E14

VSSQ

E3

VSSQ

F10

VSSQ

F5

VSSQ

H13

VSSQ

H2

VSSQ

K13

VSSQ

K2

VSSQ

M10

VSSQ

M5

VSSQ

N1

VSSQ

N12

VSSQ

N14

VSSQ

N3

VSSQ

R1

VSSQ

R11

VSSQ

R12

VSSQ

R14

VSSQ

R3

VSSQ

R4

VSSQ

V1

VSSQ

V12

VSSQ

V14

VSSQ

V3

VSSQ

C10

VDD

C5

VDD

D11

VDD

G1

VDD

G11

VDD

G14

VDD

G4

VDD

L1

VDD

L11

VDD

L14

VDD

L4

VDD

P11

VDD

R10

VDD

R5

VDD

B1

VDDQ

B12

VDDQ

B14

VDDQ

B3

VDDQ

D1

VDDQ

D12

VDDQ

D14

VDDQ

D3

VDDQ

E10

VDDQ

E5

VDDQ

F1

VDDQ

F12

VDDQ

F14

VDDQ

F3

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

K12

VDDQ

K3

VDDQ

L13

VDDQ

L2

VDDQ

M1

VDDQ

M12

VDDQ

M14

VDDQ

M3

VDDQ

N10

VDDQ

N5

VDDQ

P1

VDDQ

P12

VDDQ

P14

VDDQ

P3

VDDQ

T1

VDDQ

T12

VDDQ

T14

VDDQ

T3

VDDQ

M8B

@memory.u_mem_sd_ddr5_x32(sym_5):page6_i55
BGA170

2

M8D

@memory.u_mem_sd_ddr5_x32(sym_1):page6_i11
BGA170
COMMON

4

Fba_D<32>

4

Fba_D<33>

4

Fba_D<34>

4

Fba_D<35>

4

Fba_D<36>

4

Fba_D<37>

4

Fba_D<38>

4

Fba_D<39>

4
4

4

Fba_D<40>

4

Fba_D<41>

4

Fba_D<42>

4

Fba_D<43>

4

Fba_D<44>

4

3

Fba_D<45>

4

Fba_D<46>

4

Fba_D<47>

4
4

4
4

FBA_D<32>

32

FBA_D<33>

33

FBA_D<34>

34

FBA_D<35>

35

FBA_D<36>

36

FBA_D<37>

37

FBA_D<38>

38

FBA_D<39>

39

FBA_EDC<4>

BI

FBA_DBI<4>

BI

FBA_D<40>

40

FBA_D<41>

41

FBA_D<42>

42

FBA_D<43>

43

FBA_D<44>

44

FBA_D<45>

45

FBA_D<46>

46

FBA_D<47>

47

FBA_EDC<5>

BI

FBA_DBI<5>

BI

FBA_WCK45

IN

FBA_WCK45*

IN

NORMAL

A4

DQ0

A2

DQ1

B4

DQ2

B2

DQ3

E4

DQ4

E2

DQ5

F4

DQ6

F2

DQ7

C2

EDC0

D2

DBI0

VREFD

x16

x32

A11

DQ8

A13

DQ9

B11

DQ10

B13

DQ11

E11

DQ12

E13

DQ13

F11

DQ14

F13

DQ15

C13

EDC1

D13

DBI1

D4

WCK01

D5

WCK01

FBA_VREFD FBA_VREFD

A10

NC
NC
NC
NC
NC
NC
NC
NC

GND

NC

4

Fba_D<48>

4

Fba_D<49>

4

Fba_D<50>

4

Fba_D<51>

4

Fba_D<52>

4

Fba_D<53>

4

Fba_D<54>

4

Fba_D<55>

4
4

IN

4
4

5

4

Fba_D<56>

4

Fba_D<57>

4

Fba_D<58>

4

Fba_D<59>

4

Fba_D<60>

4

Fba_D<61>

4

Fba_D<62>

4

Fba_D<63>

4
4

FBA_D<48>

48

FBA_D<49>

49

FBA_D<50>

50

FBA_D<51>

51

FBA_D<52>

52

FBA_D<53>

53

FBA_D<54>

54

FBA_D<55>

55

FBA_EDC<6>

BI

FBA_DBI<6>

BI

FBA_D<56>

56

FBA_D<57>

57

FBA_D<58>

58

FBA_D<59>

59

FBA_D<60>

60

FBA_D<61>

61

FBA_D<62>

62

FBA_D<63>

63

FBA_EDC<7>

BI

FBA_DBI<7>

BI

FBA_WCK67

IN

FBA_WCK67*

IN

M8A

@memory.u_mem_sd_ddr5_x32(sym_3):page6_i51
BGA170
COMMON

NORMAL

V11

DQ16

V13

DQ17

T11

DQ18

T13

DQ19

N11

DQ20

N13

DQ21

M11

DQ22

M13

DQ23

R13

EDC2

P13

DBI2

VREFD

x16

x32

V4

DQ24

V2

DQ25

T4

DQ26

T2

DQ27

N4

DQ28

N2

DQ29

M4

DQ30

M2

DQ31

R2

EDC3

P2

DBI3

P4

WCK23

P5

WCK23

V10

NC
NC
NC
NC
NC
NC
NC
NC

NC
NC

C138
820pF

50V

4

10%
X7R

4

0402
COMMON

GND

5

IN

4

IN
IN

C119
820pF

50V
10%
X7R
0402
COMMON

GND GND

FBA_CMD<19>
FBA_CMD<16>
FBA_CMD<26>
FBA_CMD<31>

FBA_CMD<23>
FBA_CMD<21>

FBA_CMD<20>
FBA_CMD<29>
FBA_CMD<30>
FBA_CMD<28>
FBA_CMD<27>
FBA_CMD<24>
FBA_CMD<25>
FBA_CMD<22>

FBA_CMD<18>
FBA_CMD<17>

FBA_CLK1
FBA_CLK1*

R613

40.2ohm

1 %
0402
COMMON

FBA_CLK1_CM

GND

R604 121ohm

R593

C608
10nF

16V
10%
X7R
0402
COMMON

FBA_CMD<19>

4

19

FBA_CMD<16>

4

16

FBA_CMD<26>

4

26

FBA_CMD<31>

4

31

FBA_CMD<23>

4

23

FBA_CMD<21>

4

21

FBA_CMD<20>

4

20

FBA_CMD<29>

4

29

FBA_CMD<30>

4

30

FBA_CMD<28>

4

28

FBA_CMD<27>

4

27

FBA_CMD<24>

4

24

FBA_CMD<25>

4

25

FBA_CMD<22>

4

22

FBA_CMD<18>

4

18

FBA_CMD<17>

4

17

R610

40.2ohm

1 %
0402
COMMON

FBA_VREFC

FBA_ZQ_2B

COMMON0402

1 %

1 %

FBA_SEN_2

1k

COMMON0402

COMMON

G3

RAS

L3

CAS

L12

WE

G12

CS

J4

ABI

H4

A0_A10

H5

A1_A9

H11

A2_BA0

H10

A3_BA3

K11

A4_BA2

K10

A5_BA1

K5

A6_A11

K4

A7_A8

J5

RFU_A12

J2

RESET

J3

CKE

J12

CLK

J11

CLK

A5

NC_RFU_A5

V5

NC_RFU_V5

J14

VREFC

J13

ZQ

J10

SEN

FBA_MF2_A

R602

1k

COMMON0402

1 %

FBVDDQ

FBVDDQ

1

2

3

4

FBVDDQ

C620

C615

C606

GND

1uF

6.3V
10%
X5R
0402
COMMON

C126
1uF

6.3V
10%
X5R
0402
COMMON

GND

C915
47uF

4V
20%
X5R
0805LP
DNI

C E

C600

C589
10uF

6.3V
20%
X5R
0805LP
COMMON

FBVDDQ

C588
10uF

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

6.3V
20%
X5R
0805LP
COMMON

4.7uF

6.3V
20%
X5R
0603
COMMON

C135

4.7uF

6.3V
20%
X5R
0603
COMMON

C625

4.7uF

6.3V
20%
X5R
0603
COMMON

C132

4.7uF

6.3V
20%
X5R
0603
COMMON

C604
1uF

6.3V
10%
X5R
0402
COMMON

C112
1uF

6.3V
10%
X5R
0402
COMMON

C595
1uF

6.3V
10%
X5R
0402
COMMON

C129
1uF

6.3V
10%
X5R
0402
COMMON

1uF

6.3V
10%
X5R
0402
COMMON

C123
1uF

6.3V
10%
X5R
0402
COMMON

1uF

6.3V
10%
X5R
0402
COMMON

C115
1uF

6.3V
10%
X5R
0402
COMMON

ASSEMBLY
PAGE DETAIL

BASE LEVEL GENERIC SCHEMATIC ONLY
MEMORY: FBA[63:32]

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-V317

MS-V317

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev
Custom

Custom

Custom

Wednesday, August 20, 2014

Wednesday, August 20, 2014

Wednesday, August 20, 2014

NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA

NV_PN

PCB REV

FDBA

BOM REV

G

MS-V317

6: MEMORY: FBA Partition 63..32

6: MEMORY: FBA Partition 63..32

6: MEMORY: FBA Partition 63..32

600-1G401-BASE-QS1

PG401-A02
A

1.0

1.0

1.0

Sheet ofDate:

06 37

Sheet ofDate:

06 37

Sheet ofDate:

06 37

6 OF 37

PAGE
DATE

04-AUG-2014

H

5

A B C D E F G H

Page7: MEMORY: FBB Partition 31..0

1

GND

M5C

@memory.u_mem_sd_ddr5_x32(sym_7):page7_i381
BGA170_MIRR
COMMON

Mirrored

B10

VSS

B5

VSS

D10

VSS

G10

VSS

G5

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L10

VSS

L5

VSS

P10

VSS

T10

VSS

T5

VSS

A1

VSSQ

A12

VSSQ

A14

VSSQ

A3

VSSQ

C1

VSSQ

C11

VSSQ

C12

VSSQ

C14

VSSQ

C3

VSSQ

C4

VSSQ

E1

VSSQ

E12

VSSQ

E14

VSSQ

E3

VSSQ

F10

VSSQ

F5

VSSQ

H13

VSSQ

H2

VSSQ

K13

VSSQ

K2

VSSQ

M10

VSSQ

M5

VSSQ

N1

VSSQ

N12

VSSQ

N14

VSSQ

N3

VSSQ

R1

VSSQ

R11

VSSQ

R12

VSSQ

R14

VSSQ

R3

VSSQ

R4

VSSQ

V1

VSSQ

V12

VSSQ

V14

VSSQ

V3

VSSQ

SOE*/MF_VDD

add 1k to VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

FBB_MF1_A

J1
C10

VDD

C5

VDD

D11

VDD

G1

VDD

G11

VDD

G14

VDD

G4

VDD

L1

VDD

L11

VDD

L14

VDD

L4

VDD

P11

VDD

R10

VDD

R5

VDD

B1
B12
B14
B3
D1
D12
D14
D3
E10
E5
F1
F12
F14
F3
G13
G2
H12
H3
K12
K3
L13
L2
M1
M12
M14
M3
N10
N5
P1
P12
P14
P3
T1
T12
T14
T3

R636 1k

1 %

FBVDDQ

COMMON0402

M5B

@memory.u_mem_sd_ddr5_x32(sym_5):page7_i380
BGA170_MIRR

M5D

@memory.u_mem_sd_ddr5_x32(sym_2):page7_i378
BGA170_MIRR
COMMON

2

4

Fbb_D<0>

4

Fbb_D<1>

4

Fbb_D<2>

4

Fbb_D<3>

4

Fbb_D<4>

4

Fbb_D<5>

4

Fbb_D<6>

4

Fbb_D<7>

4
4

4

Fbb_D<8>

4

Fbb_D<9>

4

Fbb_D<10>

4

Fbb_D<11>

4

Fbb_D<12>

4

Fbb_D<13>

4

Fbb_D<14>

4

Fbb_D<15>

4
4

4
4

3

FBB_D<0>

0

FBB_D<1>

1

FBB_D<2>

2

FBB_D<3>

3

FBB_D<4>

4

FBB_D<5>

5

FBB_D<6>

6

FBB_D<7>

7

FBB_EDC<0>

BI

FBB_DBI<0>

BI

FBB_D<8>

8

FBB_D<9> FBB_D<25>

9

FBB_D<10>

10

FBB_D<11>

11

FBB_D<12>

12

FBB_D<13>

13

FBB_D<14>

14

FBB_D<15>

15

FBB_EDC<1>

BI

FBB_DBI<1>

BI

FBB_WCK01

IN

FBB_WCK01*

IN

MIRRORED

x16x32

V4

DQ0

NC

4

V2

DQ1

NC

T4

DQ2

NC

T2

DQ3

NC

N4

DQ4

NC

N2

DQ5

NC

M4

DQ6

NC

M2

DQ7

NC

R2

EDC0

NC

P2

DBI0

NC

VREFD

V11

DQ8

V13

DQ9

T11

DQ10

T13

DQ11

N11

DQ12

N13

DQ13

M11

DQ14

M13

DQ15

R13

EDC1

P13

DBI1

P4

WCK01

P5

WCK01

Fbb_D<16>

4

Fbb_D<17>

4

Fbb_D<18>

4

Fbb_D<19>

4

Fbb_D<20>

4

Fbb_D<21>

4

Fbb_D<22>

4

Fbb_D<23>

4
4

FBB_VREFD

V10

4

Fbb_D<24>

4

Fbb_D<25>

4

Fbb_D<26>

4

Fbb_D<27>

4

Fbb_D<28>

4

Fbb_D<29>

4

Fbb_D<30>

4

Fbb_D<31>

4
4

4
4

FBB_D<16>

16

FBB_D<17>

17

FBB_D<18>

18

FBB_D<19>

19

FBB_D<20>

20

FBB_D<21>

21

FBB_D<22>

22

FBB_D<23>

23

FBB_EDC<2>

BI

FBB_DBI<2>

BI

FBB_D<24>

24
25

FBB_D<26>

26

FBB_D<27>

27

FBB_D<28>

28

FBB_D<29>

29

FBB_D<30>

30

FBB_D<31>

31

FBB_EDC<3>

BI

FBB_DBI<3>

BI

FBB_WCK23

IN

FBB_WCK23*

IN

5,10,12,23

M5A

@memory.u_mem_sd_ddr5_x32(sym_4):page7_i379
BGA170_MIRR
COMMON

MIRRORED

x32 x16

A11

DQ16

NC

A13

DQ17

NC

B11

DQ18

NC

B13

DQ19

NC

E11

DQ20

NC

E13

DQ21

NC

F11

DQ22

NC

F13

DQ23

NC

C13

EDC2

GND

D13

DBI2

NC

VREFD

A4

DQ24

A2

DQ25

B4

DQ26

B2

DQ27

E4

DQ28

E2

DQ29

F4

DQ30

F2

DQ31

C2

EDC3

D2

DBI3

D4

WCK23

D5

WCK23

GPIO10_FBVREF_SEL

IN

A10

GND GND

C644
820pF

50V
10%
X7R
0402
COMMON

0.140A1.05V

FBVDDQ

1G1D1S

1

R100
549ohm

1 %
0402
COMMON

R101

1.33k

1 %
0402
COMMON

3

D

Q16

@discrete.q_fet_n_enh(sym_2):page7_i328
SOT23_1G1D1S

G

COMMON

S

2

60V

0.26A
3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V

0.31A

0.3W
20V

GND

FBB_VREFD

R99
931ohm

1 %
0402
COMMON

FBB_CMD<3>

4

C104
820pF

50V
10%
X7R
0402
COMMON

3

FBB_CMD<0>

4

0

FBB_CMD<10>

4

10

FBB_CMD<15>

4

15

FBB_CMD<7>

4

7

FBB_CMD<5>

4

5

FBB_CMD<4>

4

4

FBB_CMD<13>

4

13

FBB_CMD<14>

4

14

FBB_CMD<12>

4

12

FBB_CMD<11>

4

11

FBB_CMD<8>

4

8

FBB_CMD<9>

4

9

FBB_CMD<6>

4

6

FBB_CMD<2>

4

2

FBB_CMD<1>

4

1

R627

40.2ohm

1 %
0402
COMMON

C632
10nF

16V
10%
X7R
0402
COMMON

GND

OUT

FBB_VREFC

FBB_ZQ_1_B

R625 121ohm

COMMON0402

1 %

R628 1k

FBB_SEN_1

COMMON0402

1 %

GND

Fbb_Cmd<3>
Fbb_Cmd<0>
Fbb_Cmd<10>
Fbb_Cmd<15>

Fbb_Cmd<7>
Fbb_Cmd<5>

Fbb_Cmd<4>
Fbb_Cmd<13>
Fbb_Cmd<14>
Fbb_Cmd<12>
Fbb_Cmd<11>
Fbb_Cmd<8>
Fbb_Cmd<9>
Fbb_Cmd<6>

Fbb_Cmd<2>
Fbb_Cmd<1>

FBB_CLK0

IN

FBB_CLK0*

IN

R626

40.2ohm

1 %
0402
COMMON

FBB_CLK0_RC

0.350 1.05V

R91
931ohm

1 %
0402
COMMON

GND

4
4

FBB_VREF_Q

8

FBVDDQ

R85
549ohm

1 %
0402
COMMON

R86

1.33k

1 %
0402
COMMON

GND

OUT

1.05V

0.350

COMMON

L3

RAS

G3

CAS

G12

WE

L12

CS

J4

ABI

K4

A0_A10

K5

A1_A9

K11

A2_BA0

K10

A3_BA3

H11

A4_BA2

H10

A5_BA1

H5

A6_A11

H4

A7_A8

J5

RFU_A12

J2

RESET

J3

CKE

J12

CLK

J11

CLK

A5

NC_RFU_A5

V5

NC_RFU_V5

8

J14

VREFC

J13

ZQ

J10

SEN

4

1

FBVDDQ

FBVDDQ

2

3

4

FBVDDQ

C638

C670

C671

GND

1uF

6.3V
10%
X5R
0402
COMMON

C602
1uF

6.3V
10%
X5R
0402
COMMON

GND

C914
47uF

4V
20%
X5R
0805LP
DNI

C E

C631

C636

C673

C637

10uF

4.7uF

6.3V
20%
X5R
0603
COMMON

C107

4.7uF

6.3V
20%
X5R
0603
COMMON

4.7uF

6.3V
20%
X5R
0603
COMMON

C98

4.7uF

6.3V
20%
X5R
0603
COMMON

6.3V
20%
X5R
0805LP
COMMON

FBVDDQ

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

C635
10uF

6.3V
20%
X5R
0805LP
COMMON

1uF

6.3V
10%
X5R
0402
COMMON

C106
1uF

6.3V
10%
X5R
0402
COMMON

C639
1uF

6.3V
10%
X5R
0402
COMMON

C99
1uF

6.3V
10%
X5R
0402
COMMON

1uF

6.3V
10%
X5R
0402
COMMON

C105
1uF

6.3V
10%
X5R
0402
COMMON

1uF

6.3V
10%
X5R
0402
COMMON

C103
1uF

6.3V
10%
X5R
0402
COMMON

ASSEMBLY
PAGE DETAIL

BASE LEVEL GENERIC SCHEMATIC ONLY
MEMORY: FBB[31:0]

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-V317

MS-V317

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev
Custom

Custom

Custom

Wednesday, August 20, 2014

Wednesday, August 20, 2014

Wednesday, August 20, 2014

NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA

NV_PN

600-1G401-BASE-QS1

PG401-A02

PCB REV

A

FDBA

BOM REV

G

MS-V317

7: MEMORY: FBB Partition 31..0

7: MEMORY: FBB Partition 31..0

7: MEMORY: FBB Partition 31..0

Sheet ofDate:

Sheet ofDate:

Sheet ofDate:

PAGE
DATE

H

07 37

07 37

07 37

7 OF 37

04-AUG-2014

5

1.0

1.0

1.0

A B C D E F G H

Page8: MEMORY: FBB Partition 63..32

1

GND

M6C

@memory.u_mem_sd_ddr5_x32(sym_6):page8_i109
BGA170
COMMON

Normal

J1

MF_VSS/SOE*

add 1k to VSS

B10

VSS

B5

VSS

D10

VSS

G10

VSS

G5

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L10

VSS

L5

VSS

P10

VSS

T10

VSS

T5

VSS

A1

VSSQ

A12

VSSQ

A14

VSSQ

A3

VSSQ

C1

VSSQ

C11

VSSQ

C12

VSSQ

C14

VSSQ

C3

VSSQ

C4

VSSQ

E1

VSSQ

E12

VSSQ

E14

VSSQ

E3

VSSQ

F10

VSSQ

F5

VSSQ

H13

VSSQ

H2

VSSQ

K13

VSSQ

K2

VSSQ

M10

VSSQ

M5

VSSQ

N1

VSSQ

N12

VSSQ

N14

VSSQ

N3

VSSQ

R1

VSSQ

R11

VSSQ

R12

VSSQ

R14

VSSQ

R3

VSSQ

R4

VSSQ

V1

VSSQ

V12

VSSQ

V14

VSSQ

V3

VSSQ

C10

VDD

C5

VDD

D11

VDD

G1

VDD

G11

VDD

G14

VDD

G4

VDD

L1

VDD

L11

VDD

L14

VDD

L4

VDD

P11

VDD

R10

VDD

R5

VDD

B1

VDDQ

B12

VDDQ

B14

VDDQ

B3

VDDQ

D1

VDDQ

D12

VDDQ

D14

VDDQ

D3

VDDQ

E10

VDDQ

E5

VDDQ

F1

VDDQ

F12

VDDQ

F14

VDDQ

F3

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

K12

VDDQ

K3

VDDQ

L13

VDDQ

L2

VDDQ

M1

VDDQ

M12

VDDQ

M14

VDDQ

M3

VDDQ

N10

VDDQ

N5

VDDQ

P1

VDDQ

P12

VDDQ

P14

VDDQ

P3

VDDQ

T1

VDDQ

T12

VDDQ

T14

VDDQ

T3

VDDQ

M6B

@memory.u_mem_sd_ddr5_x32(sym_5):page8_i55
BGA170
COMMON

FBB_VREFC

FBB_SEN_2

G3

RAS

L3

CAS

L12

WE

G12

CS

J4

ABI

H4

A0_A10

H5

A1_A9

H11

A2_BA0

H10

A3_BA3

K11

A4_BA2

K10

A5_BA1

K5

A6_A11

K4

A7_A8

J5

RFU_A12

J2

RESET

J3

CKE

J12

CLK

J11

CLK

A5

NC_RFU_A5

V5

NC_RFU_V5

J14

VREFC

J13

ZQ

J10

SEN

FBB_CMD<19>

4

GND

C607
10nF

16V
10%
X7R
0402
COMMON

R603

0402

1 %

R592 1k

1 %

19
16
26
31

23

21
20
29
30
28
27
24
25
22

18
17

121ohm

COMMON

COMMON0402

R609

40.2ohm

1 %
0402
COMMON

FBB_CMD<16>
FBB_CMD<26>
FBB_CMD<31>

FBB_CMD<23>

FBB_CMD<21>
FBB_CMD<20>
FBB_CMD<29>
FBB_CMD<30>
FBB_CMD<28>
FBB_CMD<27>
FBB_CMD<24>
FBB_CMD<25>
FBB_CMD<22>

FBB_CMD<18>
FBB_CMD<17>

FBB_ZQ_2B

4
4
4

4
4

4
4
4
4
4
4
4
4

4
4

Fbb_Cmd<19>
Fbb_Cmd<16>
Fbb_Cmd<26>
Fbb_Cmd<31>

Fbb_Cmd<23>

IN
IN

C118
820pF

50V
10%
X7R
0402
COMMON

GND GND

Fbb_Cmd<21>
Fbb_Cmd<20>
Fbb_Cmd<29>
Fbb_Cmd<30>
Fbb_Cmd<28>
Fbb_Cmd<27>
Fbb_Cmd<24>
Fbb_Cmd<25>
Fbb_Cmd<22>

Fbb_Cmd<18>
Fbb_Cmd<17>

FBB_CLK1
FBB_CLK1*

R612

40.2ohm

1 %
0402
COMMON

FBB_CLK1_CM

2

4

Fbb_D<32>

4

Fbb_D<33>

4

Fbb_D<34>

4

Fbb_D<35>

4

Fbb_D<36>

4

Fbb_D<37>

4

Fbb_D<38>

4

Fbb_D<39>

4
4

4

Fbb_D<40>

4

Fbb_D<41>

4

Fbb_D<42>

4

Fbb_D<43>

4

Fbb_D<44>

4

Fbb_D<45>

4

Fbb_D<46>

4

3

Fbb_D<47>

4
4

4
4

FBB_D<32>

32

FBB_D<33>

33

FBB_D<34>

34

FBB_D<35>

35

FBB_D<36>

36

FBB_D<37>

37

FBB_D<38>

38

FBB_D<39>

39

FBB_EDC<4>

BI

FBB_DBI<4>

BI

FBB_D<40>

40

FBB_D<41>

41

FBB_D<42>

42

FBB_D<43>

43

FBB_D<44>

44

FBB_D<45>

45

FBB_D<46>

46

FBB_D<47>

47

FBB_EDC<5>

BI

FBB_DBI<5>

BI

FBB_WCK45

IN

FBB_WCK45*

IN

M6D

@memory.u_mem_sd_ddr5_x32(sym_1):page8_i11
BGA170
COMMON

NORMAL

A4

DQ0

A2

DQ1

B4

DQ2

B2

DQ3

E4

DQ4

E2

DQ5

F4

DQ6

F2

DQ7

C2

EDC0

D2

DBI0

VREFD

x16

x32

A11

DQ8

A13

DQ9

B11

DQ10

B13

DQ11

E11

DQ12

E13

DQ13

F11

DQ14

F13

DQ15

C13

EDC1

GND

D13

DBI1

D4

WCK01

D5

WCK01

M6A

FBB_D<48>

4

Fbb_D<48>

4

Fbb_D<49>

4

Fbb_D<50>

4

Fbb_D<51>

4

Fbb_D<52>

4

Fbb_D<53>

4

Fbb_D<54>

4

Fbb_D<55>

4
4

FBB_VREFD FBB_VREFD

A10

NC
NC
NC
NC
NC
NC
NC
NC

NC

IN

4

Fbb_D<56>

4

Fbb_D<57>

4

Fbb_D<58>

4

Fbb_D<59>

4

Fbb_D<60>

4

Fbb_D<61>

4

Fbb_D<62>

4

Fbb_D<63>

4
4

4
4

48
49
50
51
52
53
54
55

FBB_EDC<6>

BI

FBB_DBI<6>

BI

07

56
57
58
59
60
61
62
63

FBB_EDC<7>

BI

FBB_DBI<7>

BI

FBB_WCK67

IN

FBB_WCK67*

IN

FBB_D<49>
FBB_D<50>
FBB_D<51>
FBB_D<52>
FBB_D<53>
FBB_D<54>
FBB_D<55>

FBB_D<56>
FBB_D<57>
FBB_D<58>
FBB_D<59>
FBB_D<60>
FBB_D<61>
FBB_D<62>
FBB_D<63>

V11
V13
T11

T13
N11
N13
M11
M13

R13

P13

V4
V2
T4
T2
N4
N2
M4
M2

R2

P2
P4

P5

@memory.u_mem_sd_ddr5_x32(sym_3):page8_i51
BGA170
COMMON

NORMAL

DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23

EDC2
DBI2

V10

VREFD

x16

x32

DQ24

NC

DQ25

NC

DQ26

NC

DQ27

NC

DQ28

NC

DQ29

NC

DQ30

NC

DQ31

NC

EDC3

NC

DBI3

NC

WCK23
WCK23

4
4

C136
820pF

50V
10%
X7R
0402
COMMON

GND

07

IN

R601

0402 COMMON

1 %

FBB_MF2_A

1k

1

FBVDDQ

2

FBVDDQ

3

4

FBVDDQ

C618

C623

C584
10uF

6.3V
20%
X5R
0805LP
COMMON

FBVDDQ

C585

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

10uF

6.3V
20%
X5R
0805LP
COMMON

4.7uF

6.3V
20%
X5R
0603
COMMON

C131

4.7uF

6.3V
20%
X5R
0603
COMMON

C599

4.7uF

6.3V
20%
X5R
0603
COMMON

C134

4.7uF

6.3V
20%
X5R
0603
COMMON

C594
1uF

6.3V
10%
X5R
0402
COMMON

C111
1uF

6.3V
10%
X5R
0402
COMMON

C617
1uF

6.3V
10%
X5R
0402
COMMON

C114
1uF

6.3V
10%
X5R
0402
COMMON

C612
1uF

6.3V
10%
X5R
0402
COMMON

C122
1uF

6.3V
10%
X5R
0402
COMMON

C605
1uF

6.3V
10%
X5R
0402
COMMON

C128
1uF

6.3V
10%
X5R
0402
COMMON

1uF

6.3V
10%
X5R
0402
COMMON

GND

C124
1uF

6.3V
10%
X5R
0402
COMMON

GND

C913
47uF

4V
20%
X5R
0805LP
DNI

C E

ASSEMBLY
PAGE DETAIL

BASE LEVEL GENERIC SCHEMATIC ONLY
MEMORY: FBB[63:32]

4

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-V317

MS-V317

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev
Custom

Custom

Custom

Wednesday, August 20, 2014

Wednesday, August 20, 2014

Wednesday, August 20, 2014

NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA

NV_PN

PCB REV

FDBA

BOM REV

G

MS-V317

MEMORY: FBB Partition 63..32

MEMORY: FBB Partition 63..32

MEMORY: FBB Partition 63..32

600-1G401-BASE-QS1

PG401-A02
A

Sheet ofDate:

837

Sheet ofDate:

837

Sheet ofDate:

837

PAGE
DATE

H

8 OF 37

04-AUG-2014

1.0

1.0

1.0

5

A B C D E F G H

Page9: MEMORY: GPU Partition C/D

1

10

Fbc_D<0>

10

Fbc_D<1>

10

Fbc_D<2>

10

Fbc_D<3>

10

Fbc_D<4>

10

Fbc_D<5>

10

Fbc_D<6>

10

Fbc_D<7>

10

Fbc_D<8>

10

Fbc_D<9>

10

Fbc_D<10>

10

Fbc_D<11>

10

Fbc_D<12>

10

Fbc_D<13>

10

Fbc_D<14>

10

Fbc_D<15>

10

Fbc_D<16>

10

Fbc_D<17>

10

Fbc_D<18>

10

Fbc_D<19>

10

Fbc_D<20>

10

Fbc_D<21>

10

2

3

10
10
10
10
11
11

4

11
11

Fbc_D<22>

10

Fbc_D<23>

10

Fbc_D<24>

10

Fbc_D<25>

10

Fbc_D<26>

10

Fbc_D<27>

10

Fbc_D<28>

10

Fbc_D<29>

10

Fbc_D<30>

10

Fbc_D<31>

11

Fbc_D<32>

11

Fbc_D<33>

11

Fbc_D<34>

11

Fbc_D<35>

11

Fbc_D<36>

11

Fbc_D<37>

11

Fbc_D<38>

11

Fbc_D<39>

11

Fbc_D<40>

11

Fbc_D<41>

11

Fbc_D<42>

11

Fbc_D<43>

11

Fbc_D<44>

11

Fbc_D<45>

11

Fbc_D<46>

11

Fbc_D<47>

11

Fbc_D<48>

11

Fbc_D<49>

11

Fbc_D<50>

11

Fbc_D<51>

11

Fbc_D<52>

11

Fbc_D<53>

11

Fbc_D<54>

11

Fbc_D<55>

11

Fbc_D<56>

11

Fbc_D<57>

11

Fbc_D<58>

11

Fbc_D<59>

11

Fbc_D<60>

11

Fbc_D<61>

11

Fbc_D<62>

11

Fbc_D<63>

10
10
10
10
11
11
11
11

FBC_D<0>

0

FBC_D<1>

1

FBC_D<2>

2

FBC_D<3>

3

FBC_D<4>

4

FBC_D<5>

5

FBC_D<6>

6

FBC_D<7>

7

FBC_D<8>

8

FBC_D<9>

9

FBC_D<10>

10

FBC_D<11>

11

FBC_D<12>

12

FBC_D<13>

13

FBC_D<14>

14

FBC_D<15>

15

FBC_D<16>

16

FBC_D<17>

17

FBC_D<18>

18

FBC_D<19>

19

FBC_D<20>

20

FBC_D<21>

21

FBC_D<22>

22

FBC_D<23>

23

FBC_D<24>

24

FBC_D<25>

25

FBC_D<26>

26

FBC_D<27>

27

FBC_D<28>

28

FBC_D<29>

29

FBC_D<30>

30

FBC_D<31>

31

FBC_D<32>

32

FBC_D<33>

33

FBC_D<34>

34

FBC_D<35>

35

FBC_D<36>

36

FBC_D<37>

37

FBC_D<38>

38

FBC_D<39>

39

FBC_D<40>

40

FBC_D<41>

41

FBC_D<42>

42

FBC_D<43>

43

FBC_D<44>

44

FBC_D<45>

45

FBC_D<46>

46

FBC_D<47>

47

FBC_D<48>

48

FBC_D<49>

49

FBC_D<50>

50

FBC_D<51>

51

FBC_D<52>

52

FBC_D<53>

53

FBC_D<54>

54

FBC_D<55>

55

FBC_D<56>

56

FBC_D<57>

57

FBC_D<58>

58

FBC_D<59>

59

FBC_D<60>

60

FBC_D<61>

61

FBC_D<62>

62

FBC_D<63>

63

FBC_DBI<0>

OUT

0

FBC_DBI<1>

OUT

1

FBC_DBI<2>

OUT

2

FBC_DBI<3>

OUT

3

FBC_DBI<4>

OUT

4

FBC_DBI<5>

OUT

5

FBC_DBI<6>

OUT

6

FBC_DBI<7>

OUT

7

FBC_EDC<0>

BI

0

FBC_EDC<1>

BI

1

FBC_EDC<2>

BI

2

FBC_EDC<3>

BI

3

FBC_EDC<4>

BI

4

FBC_EDC<5>

BI

5

FBC_EDC<6>

BI

6

FBC_EDC<7>

BI

7

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

G1D

@digital.u_gpu_gb3b_256(sym_4):page9_i2030
BGA1745
COMMON

4/21 FBC

A8

FBC_D0

D8

FBC_D1

B8

FBC_D2

C8

FBC_D3

C5

FBC_D4

B5

FBC_D5

D5

FBC_D6

C4

FBC_D7

B9

FBC_D8

E11

FBC_D9

D9

FBC_D10

A9

FBC_D11

H11

FBC_D12

F9

FBC_D13

J11

FBC_D14

E8

FBC_D15

K17

FBC_D16

G17

FBC_D17

J17

FBC_D18

G15

FBC_D19

K15

FBC_D20

K14

FBC_D21

H14

FBC_D22

J14

FBC_D23

E14

FBC_D24

F14

FBC_D25

A14

FBC_D26

B14

FBC_D27

E12

FBC_D28

F12

FBC_D29

G12

FBC_D30

G14

FBC_D31

G26

FBC_D32

J26

FBC_D33

F26

FBC_D34

H26

FBC_D35

G27

FBC_D36

F27

FBC_D37

J27

FBC_D38

H27

FBC_D39

E23

FBC_D40

D21

FBC_D41

D23

FBC_D42

C23

FBC_D43

A24

FBC_D44

B24

FBC_D45

E24

FBC_D46

D24

FBC_D47

D15

FBC_D48

C17

FBC_D49

D17

FBC_D50

E17

FBC_D51

F18

FBC_D52

E18

FBC_D53

D20

FBC_D54

E20

FBC_D55

G20

FBC_D56

H20

FBC_D57

F20

FBC_D58

H21

FBC_D59

F23

FBC_D60

G23

FBC_D61

H23

FBC_D62

K23

FBC_D63

E6

FBC_DQM0

E9

FBC_DQM1

H17

FBC_DQM2

D12

FBC_DQM3

K27

FBC_DQM4

E21

FBC_DQM5

F17

FBC_DQM6

J23

FBC_DQM7

D6

FBC_DQS_WP0

F11

FBC_DQS_WP1

H15

FBC_DQS_WP2

C14

FBC_DQS_WP3

E27

FBC_DQS_WP4

F24

FBC_DQS_WP5

H18

FBC_DQS_WP6

G21

FBC_DQS_WP7

C6

FBC_DQS_RN0

G11

FBC_DQS_RN1

J15

FBC_DQS_RN2

D14

FBC_DQS_RN3

D27

FBC_DQS_RN4

G24

FBC_DQS_RN5

G18

FBC_DQS_RN6

F21

FBC_DQS_RN7

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31
FBC_CMD32
FBC_CMD33
FBC_CMD34
FBC_CMD35

FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1

FBC_WCK01

FBC_WCK01
FBC_WCKB01
FBC_WCKB01

FBC_WCK23

FBC_WCK23
FBC_WCKB23
FBC_WCKB23

FBC_WCK45

FBC_WCK45
FBC_WCKB45
FBC_WCKB45

FBC_WCK67

FBC_WCK67
FBC_WCKB67
FBC_WCKB67

FBC_PLL_AVDD

A4

FBC_CMD<1>

FBC_CMD<2>

B4

FBC_CMD<3>

A5

FBC_CMD<4>

A6

FBC_CMD<5>

B6

FBC_CMD<6>

B11

FBC_CMD<7>

A11

FBC_CMD<8>

C12

FBC_CMD<9>

A12

FBC_CMD<10>

B12

FBC_CMD<11>

C15

FBC_CMD<12>

A15

FBC_CMD<13>

B15

FBC_CMD<14>

B17

FBC_CMD<15>

A17

FBC_CMD<16>

C27

FBC_CMD<17>

B27

FBC_CMD<18>

A27

FBC_CMD<19>

C26

FBC_CMD<20>

A26

FBC_CMD<21>

B26

FBC_CMD<22>

A23

FBC_CMD<23>

B23

FBC_CMD<24>

B21

FBC_CMD<25>

A21

FBC_CMD<26>

C21

FBC_CMD<27>

A20

FBC_CMD<28>

B20

FBC_CMD<29>

C20

FBC_CMD<30>

C18

FBC_CMD<31>

B18
D18
A18

FBC_DEBUG0

C9

FBC_DEBUG1

C24

FBC_CLK0

F15

FBC_CLK0*

E15

FBC_CLK1

J18

FBC_CLK1*

K18

FBC_WCK01

F8

FBC_WCK01*

G8
H9
G9

FBC_WCK23

H12

FBC_WCK23*

J12
C11
D11

FBC_WCK45

D26

FBC_WCK45*

E26
H24
J24

FBC_WCK67

J20

FBC_WCK67*

K20
J21
K21

L26

0

Fbc_Cmd<0>

1

Fbc_Cmd<1>

2

Fbc_Cmd<2>

3

Fbc_Cmd<3>

4

Fbc_Cmd<4>

5

Fbc_Cmd<5>

6

Fbc_Cmd<6>

7

Fbc_Cmd<7>

8

Fbc_Cmd<8>

9

Fbc_Cmd<9>

10

Fbc_Cmd<10>

11

Fbc_Cmd<11>

12

Fbc_Cmd<12>

13

Fbc_Cmd<13>

14

Fbc_Cmd<14>

15

Fbc_Cmd<15>

16

Fbc_Cmd<16>

17

Fbc_Cmd<17>

18

Fbc_Cmd<18>

19

Fbc_Cmd<19>

20

Fbc_Cmd<20>

21

Fbc_Cmd<21>

22

Fbc_Cmd<22>

23

Fbc_Cmd<23>

24

Fbc_Cmd<24>

25

Fbc_Cmd<25>

26

Fbc_Cmd<26>

27

Fbc_Cmd<27>

28

Fbc_Cmd<28>

29

Fbc_Cmd<29>

30

Fbc_Cmd<30>

31

Fbc_Cmd<31>

R661

60.4ohm
R642

DNI

0402

1 %

FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1

FBC_WCK01
FBC_WCK01

FBC_WCK23
FBC_WCK23

FBC_WCK45
FBC_WCK45

FBC_WCK67
FBC_WCK67

3V3_PLL 3V3_PLL

C713

0.1uF

16V
10%
X7R
0402
COMMON

1 %

FB_CLK
FB_CLK
FB_CLK
FB_CLK

FB_WCK
FB_WCK

FB_WCK
FB_WCK

FB_WCK
FB_WCK

FB_WCK
FB_WCK

IN

FBC_CMD<0>

B3

GND

R672
10k

5 %
0402

FBC_CMD<1>
FBC_CMD<17>

FBC_CMD<2>
FBC_CMD<18>

COMMON

R640
10k

5 %
0402
COMMON

C E

GDDR5 CMD Mapping

CMD

CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6

10

CMD7

10

CMD8

10

CMD9

10

CMD10

10

CMD11

10

CMD12

10

CMD13

10

CMD14

10

CMD15

10

CMD16

10

CMD17

10

CMD18

10

CMD19

10

CMD20

10

CMD21

10

CMD22

11

CMD23

11

CMD24

11

CMD25

11

CMD26

11

CMD27

11

CMD28

11

CMD29

11

CMD30

11

CMD31

11
11
11
11
11
11
11

60.4ohm

DNI0402

OUT
OUT
OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

4,09,16,17,18,20,21

ASSEMBLY
PAGE DETAIL

0..31 32..63

CAS*
CKE*
RST*
RAS*
A1_A9
A0_A10
A12_RFU
ABI*
A6_A11
A7_A8
WE*
A5_BA1
A4_BA2
A2_BA0
A3_BA3
CS*

FBVDDQ

FBVDDQ

R637
10k

5 %
0402
COMMON

R675
10k

5 %
0402
COMMON

GND

BASE LEVEL GENERIC SCHEMATIC ONLY
MEMORY: GPU Partition C/D

10
10
11
11

10
10

10
10

11
11

11
11

FBD_CMD<1>
FBD_CMD<17>

FBD_CMD<2>
FBD_CMD<18>

CAS*
CKE*
RST*
RAS*
A1_A9
A0_A10
A12_RFU
ABI*
A6_A11
A7_A8
WE*
A5_BA1
A4_BA2
A2_BA0
A3_BA3
CS*

R704
10k

5 %
0402
COMMON

R690
10k

5 %
0402
COMMON

G1E

@digital.u_gpu_gb3b_256(sym_5):page9_i2031
BGA1745
COMMON

12

Fbd_D<0>

12

Fbd_D<1>

12

Fbd_D<2>

12

Fbd_D<3>

12

Fbd_D<4>

12

Fbd_D<5>

12

Fbd_D<6>

12

Fbd_D<7>

12

Fbd_D<8>

12

Fbd_D<9>

12

Fbd_D<10>

12

Fbd_D<11>

12

Fbd_D<12>

12

Fbd_D<13>

12

Fbd_D<14>

12

Fbd_D<15>

12

Fbd_D<16>

12

Fbd_D<17>

12

Fbd_D<18>

12

Fbd_D<19>

12

Fbd_D<20>

12

Fbd_D<21>

12

Fbd_D<22>

12

Fbd_D<23>

12

Fbd_D<24>

12

Fbd_D<25>

12

Fbd_D<26>

12

Fbd_D<27>

12

Fbd_D<28>

12

Fbd_D<29>

12

Fbd_D<30>

12

Fbd_D<31>

13

Fbd_D<32>

13

Fbd_D<33>

13

Fbd_D<34>

13

Fbd_D<35>

13

Fbd_D<36>

13

Fbd_D<37>

13

Fbd_D<38>

13

Fbd_D<39>

13

Fbd_D<40>

13

Fbd_D<41>

13

Fbd_D<42>

13

Fbd_D<43>

13

Fbd_D<44>

13

Fbd_D<45>

13

Fbd_D<46>

13

Fbd_D<47>

13

Fbd_D<48>

13

Fbd_D<49>

13

Fbd_D<50>

13

Fbd_D<51>

13

Fbd_D<52>

13

Fbd_D<53>

13

Fbd_D<54>

13

Fbd_D<55>

13

Fbd_D<56>

13

Fbd_D<57>

13

Fbd_D<58>

13

Fbd_D<59>

13

Fbd_D<60>

13

Fbd_D<61>

13

Fbd_D<62>

13

Fbd_D<63>

12
12
12
12
13
13
13
13

12
12
12
12
13
13
13
13

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

BI
BI
BI
BI
BI
BI
BI
BI

FBD_D<0>

0

FBD_D<1>

1

FBD_D<2>

2

FBD_D<3>

3

FBD_D<4>

4

FBD_D<5>

5

FBD_D<6>

6

FBD_D<7>

7

FBD_D<8>

8

FBD_D<9>

9

FBD_D<10>

10

FBD_D<11>

11

FBD_D<12>

12

FBD_D<13>

13

FBD_D<14>

14

FBD_D<15>

15

FBD_D<16>

16

FBD_D<17>

17

FBD_D<18>

18

FBD_D<19>

19

FBD_D<20>

20

FBD_D<21>

21

FBD_D<22>

22

FBD_D<23>

23

FBD_D<24>

24

FBD_D<25>

25

FBD_D<26>

26

FBD_D<27>

27

FBD_D<28>

28

FBD_D<29>

29

FBD_D<30>

30

FBD_D<31>

31

FBD_D<32>

32

FBD_D<33>

33

FBD_D<34>

34

FBD_D<35>

35

FBD_D<36>

36

FBD_D<37>

37

FBD_D<38>

38

FBD_D<39>

39

FBD_D<40>

40

FBD_D<41>

41

FBD_D<42>

42

FBD_D<43>

43

FBD_D<44>

44

FBD_D<45>

45

FBD_D<46>

46

FBD_D<47>

47

FBD_D<48>

48

FBD_D<49>

49

FBD_D<50>

50

FBD_D<51>

51

FBD_D<52>

52

FBD_D<53>

53

FBD_D<54>

54

FBD_D<55>

55

FBD_D<56>

56

FBD_D<57>

57

FBD_D<58>

58

FBD_D<59>

59

FBD_D<60>

60

FBD_D<61>

61

FBD_D<62>

62

FBD_D<63>

63

FBD_DBI<0>

0

FBD_DBI<1>

1

FBD_DBI<2>

2

FBD_DBI<3>

3

FBD_DBI<4>

4

FBD_DBI<5>

5

FBD_DBI<6>

6

FBD_DBI<7>

7

FBD_EDC<0>

0

FBD_EDC<1>

1

FBD_EDC<2>

2

FBD_EDC<3>

3

FBD_EDC<4>

4

FBD_EDC<5>

5

FBD_EDC<6>

6

FBD_EDC<7>

7

FBVDDQ

R708
10k

5 %
0402
COMMON

R691
10k

5 %
0402
COMMON

GND

5/21 FBD

AF7

FBD_D0

AF9

FBD_D1

AF6

FBD_D2

AF8

FBD_D3

AG7

FBD_D4

AG6

FBD_D5

AG9

FBD_D6

AG8

FBD_D7

AC5

FBD_D8

AA4

FBD_D9

AC4

FBD_D10

AC3

FBD_D11

AD4

FBD_D12

AD2

FBD_D13

AD5

FBD_D14

AD1

FBD_D15

R4

FBD_D16

U3

FBD_D17

U4

FBD_D18

U5

FBD_D19

V6

FBD_D20

V5

FBD_D21

Y4

FBD_D22

Y5

FBD_D23

Y6

FBD_D24

Y7

FBD_D25

Y8

FBD_D26

AC9

FBD_D27

AC7

FBD_D28

AC6

FBD_D29

AC8

FBD_D30

AC10

FBD_D31

H2

FBD_D32

H4

FBD_D33

H1

FBD_D34

H3

FBD_D35

F5

FBD_D36

E2

FBD_D37

E4

FBD_D38

D3

FBD_D39

J4

FBD_D40

L5

FBD_D41

J2

FBD_D42

J1

FBD_D43

J6

FBD_D44

H5

FBD_D45

L9

FBD_D46

L8

FBD_D47

U10

FBD_D48

U7

FBD_D49

U9

FBD_D50

R7

FBD_D51

R10

FBD_D52

P10

FBD_D53

P8

FBD_D54

P9

FBD_D55

P5

FBD_D56

P6

FBD_D57

P2

FBD_D58

P1

FBD_D59

M5

FBD_D60

M6

FBD_D61

M7

FBD_D62

P7

FBD_D63

AG10

FBD_DQM0

AA5

FBD_DQM1

U6

FBD_DQM2

AA8

FBD_DQM3

E3

FBD_DQM4

J5

FBD_DQM5

U8

FBD_DQM6

M4

FBD_DQM7

AG5

FBD_DQS_WP0

AD7

FBD_DQS_WP1

V8

FBD_DQS_WP2

AA7

FBD_DQS_WP3

F4

FBD_DQS_WP4

L7

FBD_DQS_WP5

R8

FBD_DQS_WP6

P3

FBD_DQS_WP7

AG4

FBD_DQS_RN0

AD6

FBD_DQS_RN1

V7

FBD_DQS_RN2

AA6

FBD_DQS_RN3

F3

FBD_DQS_RN4

L6

FBD_DQS_RN5

R9

FBD_DQS_RN6

P4

FBD_DQS_RN7

FBD_CMD0
FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD4
FBD_CMD5
FBD_CMD6
FBD_CMD7
FBD_CMD8

FBD_CMD9
FBD_CMD10
FBD_CMD11
FBD_CMD12
FBD_CMD13
FBD_CMD14
FBD_CMD15
FBD_CMD16
FBD_CMD17
FBD_CMD18
FBD_CMD19
FBD_CMD20
FBD_CMD21
FBD_CMD22
FBD_CMD23
FBD_CMD24
FBD_CMD25
FBD_CMD26
FBD_CMD27
FBD_CMD28
FBD_CMD29
FBD_CMD30
FBD_CMD31
FBD_CMD32
FBD_CMD33
FBD_CMD34
FBD_CMD35

FBD_CLK0
FBD_CLK0
FBD_CLK1
FBD_CLK1

FBD_WCK01
FBD_WCK01

FBD_WCKB01
FBD_WCKB01

FBD_WCK23
FBD_WCK23

FBD_WCKB23
FBD_WCKB23

FBD_WCK45
FBD_WCK45

FBD_WCKB45
FBD_WCKB45

FBD_WCK67
FBD_WCK67

FBD_WCKB67
FBD_WCKB67

FBD_PLL_AVDD

FDBA

FBD_CMD<0>

AG3

FBD_CMD<1>

AG2

FBD_CMD<2>

AG1

FBD_CMD<3>

AF3

FBD_CMD<4>

AF1

FBD_CMD<5>

AF2

FBD_CMD<6>

AC1

FBD_CMD<7>

AC2

FBD_CMD<8>

AA2

FBD_CMD<9>

AA1

FBD_CMD<10>

AA3

FBD_CMD<11>

Y1

FBD_CMD<12>

Y2

FBD_CMD<13>

Y3

FBD_CMD<14>

V3

FBD_CMD<15>

V2

FBD_CMD<16>

C2

FBD_CMD<17>

D1

FBD_CMD<18>

D2

FBD_CMD<19>

E1

FBD_CMD<20>

F2

FBD_CMD<21>

F1

FBD_CMD<22>

L2

FBD_CMD<23>

L1

FBD_CMD<24>

M3

FBD_CMD<25>

M1

FBD_CMD<26>

M2

FBD_CMD<27>

R3

FBD_CMD<28>

R1

FBD_CMD<29>

R2

FBD_CMD<30>

U2

FBD_CMD<31>

U1
V1
V4

FBD_DEBUG0

AD3

FBD_DEBUG1

J3

FBD_CLK0

V9

FBD_CLK0*

V10

FBD_CLK1

R6

FBD_CLK1*

R5

FBD_WCK01

AF4

FBD_WCK01*

AF5
AD8
AD9

FBD_WCK23

Y9

FBD_WCK23*

Y10
AA9
AA10

FBD_WCK45

H6

FBD_WCK45*

H7
J8
J7

FBD_WCK67

M8

FBD_WCK67*

M9
L3
L4

AA11

GND

MSI

MSI

MSI

NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA

NV_PN

PCB REV
BOM REV

G

Fbd_Cmd<0>
Fbd_Cmd<1>
Fbd_Cmd<2>
Fbd_Cmd<3>
Fbd_Cmd<4>
Fbd_Cmd<5>
Fbd_Cmd<6>
Fbd_Cmd<7>
Fbd_Cmd<8>
Fbd_Cmd<9>
Fbd_Cmd<10>
Fbd_Cmd<11>
Fbd_Cmd<12>
Fbd_Cmd<13>
Fbd_Cmd<14>
Fbd_Cmd<15>
Fbd_Cmd<16>
Fbd_Cmd<17>
Fbd_Cmd<18>
Fbd_Cmd<19>
Fbd_Cmd<20>
Fbd_Cmd<21>
Fbd_Cmd<22>
Fbd_Cmd<23>
Fbd_Cmd<24>
Fbd_Cmd<25>
Fbd_Cmd<26>
Fbd_Cmd<27>
Fbd_Cmd<28>
Fbd_Cmd<29>
Fbd_Cmd<30>
Fbd_Cmd<31>

60.4ohm

DNI0402

1 %

MS-V317

MS-V317

MS-V317

R668

FB_CLK
FB_CLK
FB_CLK
FB_CLK

FB_WCK
FB_WCK

FB_WCK
FB_WCK

FB_WCK
FB_WCK

FB_WCK
FB_WCK

4,09,16,17,18,20,21

12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13

FBVDDQ

13

60.4ohm

DNI0402

1 %

OUT
OUT
OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

Sheet ofDate:

09 37

Sheet ofDate:

09 37

Sheet ofDate:

09 37

9 OF 37

PAGE
DATE

04-AUG-2014

H

0
1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

R669

FBD_CLK0
FBD_CLK0
FBD_CLK1
FBD_CLK1

FBD_WCK01
FBD_WCK01

FBD_WCK23
FBD_WCK23

FBD_WCK45
FBD_WCK45

FBD_WCK67
FBD_WCK67

IN

C766

0.1uF

16V
10%
X7R
0402
COMMON

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

9: MEMORY: GPU Partition C/D

9: MEMORY: GPU Partition C/D

9: MEMORY: GPU Partition C/D

Wednesday, August 20, 2014

Wednesday, August 20, 2014

Wednesday, August 20, 2014

600-1G401-BASE-QS1

PG401-A02
A

1

2

12
12
13
13

3

12
12

12
12

13
13

13
13

4

1.0

1.0

1.0

5

A B C D E F G H

Page10: MEMORY: FBC Partition 31..0

1

GND

M3C

@memory.u_mem_sd_ddr5_x32(sym_7):page10_i381
BGA170_MIRR
COMMON

Mirrored

B10

VSS

B5

VSS

D10

VSS

G10

VSS

G5

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L10

VSS

L5

VSS

P10

VSS

T10

VSS

T5

VSS

A1

VSSQ

A12

VSSQ

A14

VSSQ

A3

VSSQ

C1

VSSQ

C11

VSSQ

C12

VSSQ

C14

VSSQ

C3

VSSQ

C4

VSSQ

E1

VSSQ

E12

VSSQ

E14

VSSQ

E3

VSSQ

F10

VSSQ

F5

VSSQ

H13

VSSQ

H2

VSSQ

K13

VSSQ

K2

VSSQ

M10

VSSQ

M5

VSSQ

N1

VSSQ

N12

VSSQ

N14

VSSQ

N3

VSSQ

R1

VSSQ

R11

VSSQ

R12

VSSQ

R14

VSSQ

R3

VSSQ

R4

VSSQ

V1

VSSQ

V12

VSSQ

V14

VSSQ

V3

VSSQ

SOE*/MF_VDD

add 1k to VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

FBVDDQ

FBC_MF1_A

R673

J1
C10

VDD

C5

VDD

D11

VDD

G1

VDD

G11

VDD

G14

VDD

G4

VDD

L1

VDD

L11

VDD

L14

VDD

L4

VDD

P11

VDD

R10

VDD

R5

VDD

B1
B12
B14
B3
D1
D12
D14
D3
E10
E5
F1
F12
F14
F3
G13
G2
H12
H3
K12
K3
L13
L2
M1
M12
M14
M3
N10
N5
P1
P12
P14
P3
T1
T12
T14
T3

1k

0402 COMMON

1 %

FBVDDQ

M3B

@memory.u_mem_sd_ddr5_x32(sym_5):page10_i380
BGA170_MIRR

M3D

@memory.u_mem_sd_ddr5_x32(sym_2):page10_i378
BGA170_MIRR
COMMON

MIRRORED

2

09

Fbc_D<0>

09

Fbc_D<1>

09

Fbc_D<2>

09

Fbc_D<3>

09

Fbc_D<4>

09

Fbc_D<5>

09

Fbc_D<6>

09

Fbc_D<7>

09
09

09

Fbc_D<8>

09

Fbc_D<9>

09

Fbc_D<10>

09

Fbc_D<11>

09

Fbc_D<12>

09

Fbc_D<13>

09

Fbc_D<14>

09

Fbc_D<15>

09
09

09
09

3

FBC_D<0>

0

FBC_D<1>

1

FBC_D<2>

2

FBC_D<3>

3

FBC_D<4>

4

FBC_D<5>

5

FBC_D<6>

6

FBC_D<7>

7

FBC_EDC<0>

BI

FBC_DBI<0>

BI

FBC_D<8>

8

FBC_D<9>

9

FBC_D<10>

10

FBC_D<11>

11

FBC_D<12>

12

FBC_D<13>

13

FBC_D<14>

14

FBC_D<15>

15

FBC_EDC<1>

BI

FBC_DBI<1>

BI

FBC_WCK01

IN

FBC_WCK01*

IN

x16x32

V4

DQ0

NC

09

V2

DQ1

NC

T4

DQ2

NC

T2

DQ3

NC

N4

DQ4

NC

N2

DQ5

NC

M4

DQ6

NC

M2

DQ7

NC

R2

EDC0

NC

P2

DBI0

NC

V10

VREFD

V11

DQ8

V13

DQ9

T11

DQ10

T13

DQ11

N11

DQ12

N13

DQ13

M11

DQ14

M13

DQ15

R13

EDC1

P13

DBI1

P4

WCK01

P5

WCK01

Fbc_D<16>

09

Fbc_D<17>

09

Fbc_D<18>

09

Fbc_D<19>

09

Fbc_D<20>

09

Fbc_D<21>

09

Fbc_D<22>

09

Fbc_D<23>

09
09

FBC_VREFD

09

Fbc_D<24>

09

Fbc_D<25>

09

Fbc_D<26>

09

Fbc_D<27>

09

Fbc_D<28>

09

Fbc_D<29>

09

Fbc_D<30>

09

Fbc_D<31>

09
09

09
09

FBC_D<16>

16

FBC_D<17>

17

FBC_D<18>

18

FBC_D<19>

19

FBC_D<20>

20

FBC_D<21>

21

FBC_D<22>

22

FBC_D<23>

23

FBC_EDC<2>

BI

FBC_DBI<2>

BI

FBC_D<24>

24

FBC_D<25>

25

FBC_D<26>

26

FBC_D<27>

27

FBC_D<28>

28

FBC_D<29>

29

FBC_D<30>

30

FBC_D<31>

31

FBC_EDC<3>

BI

FBC_DBI<3>

BI

FBC_WCK23

IN

FBC_WCK23*

IN

5,07,12,23

M3A

@memory.u_mem_sd_ddr5_x32(sym_4):page10_i379
BGA170_MIRR
COMMON

MIRRORED

x32 x16

A11

DQ16

NC

A13

DQ17

NC

B11

DQ18

NC

B13

DQ19

NC

E11

DQ20

NC

E13

DQ21

NC

F11

DQ22

NC

F13

DQ23

NC

C13

EDC2

GND

D13

DBI2

NC

VREFD

A4

DQ24

A2

DQ25

B4

DQ26

B2

DQ27

E4

DQ28

E2

DQ29

F4

DQ30

F2

DQ31

C2

EDC3

D2

DBI3

D4

WCK23

D5

WCK23

GPIO10_FBVREF_SEL

IN

A10

GND GND

C76
820pF

50V
10%
X7R
0402
COMMON

0.140A1.05V

1G1D1S

FBVDDQ

R82
549ohm

1 %
0402
COMMON

R84

1.33k

1 %
0402
COMMON

D

Q14

@discrete.q_fet_n_enh(sym_2):page10_i328
SOT23_1G1D1S

G

1

COMMON

S

60V

0.26A
3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V

0.31A

0.3W
20V

GND

FBC_CMD<3>

09

C88
820pF

50V
10%
X7R
0402
COMMON

3

FBC_CMD<0>

09

0

FBC_CMD<10>

09

10

FBC_CMD<15>

09

15

FBC_CMD<7>

09

7

FBC_CMD<5>

09

5

FBC_CMD<4>

09

4

FBC_CMD<13>

09

13

FBC_CMD<14>

09

14

FBC_CMD<12>

09

12

FBC_CMD<11>

09

11

FBC_CMD<8>

09

8

FBC_CMD<9>

09

9

FBC_CMD<6>

09

6

FBC_CMD<2>

09

2

FBC_CMD<1>

09

1

R659

40.2ohm

1 %
0402
COMMON

C772
10nF

16V
10%
X7R
0402
COMMON

GND

OUT

FBC_VREFC

R657

0402 COMMON

R660

0402 COMMON

FBC_ZQ_1_B

121ohm

1 %

FBC_SEN_1

1k

1 %

GND

Fbc_Cmd<3>
Fbc_Cmd<0>
Fbc_Cmd<10>
Fbc_Cmd<15>

Fbc_Cmd<7>
Fbc_Cmd<5>

Fbc_Cmd<4>
Fbc_Cmd<13>
Fbc_Cmd<14>
Fbc_Cmd<12>
Fbc_Cmd<11>
Fbc_Cmd<8>

FBC_VREFD

OUT

R81
931ohm

1 %
0402
COMMON

3

1.05V

0.350

2

09
09

FBC_VREF_Q

11

FBVDDQ

R77
549ohm

1 %
0402
COMMON

R78

1.33k

1 %
0402
COMMON

GND

Fbc_Cmd<9>
Fbc_Cmd<6>

Fbc_Cmd<2>
Fbc_Cmd<1>

FBC_CLK0

IN

FBC_CLK0*

IN

R658

40.2ohm

1 %
0402
COMMON

FBC_CLK0_RC

0.350 1.05V

R79
931ohm

1 %
0402
COMMON

GND

COMMON

L3

RAS

G3

CAS

G12

WE

L12

CS

J4

ABI

K4

A0_A10

K5

A1_A9

K11

A2_BA0

K10

A3_BA3

H11

A4_BA2

H10

A5_BA1

H5

A6_A11

H4

A7_A8

J5

RFU_A12

J2

RESET

J3

CKE

J12

CLK

J11

CLK

A5

NC_RFU_A5

V5

NC_RFU_V5

11

J14

VREFC

J13

ZQ

J10

SEN

4

1

FBVDDQ

2

3

4

FBVDDQ

C814

C821
10uF

6.3V
20%
X5R
0805LP
COMMON

FBVDDQ

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

C799
10uF

6.3V
20%
X5R
0805LP
COMMON

4.7uF

6.3V
20%
X5R
0603
COMMON

C83

4.7uF

6.3V
20%
X5R
0603
COMMON

C780

4.7uF

6.3V
20%
X5R
0603
COMMON

C74

4.7uF

6.3V
20%
X5R
0603
COMMON

C784
1uF

6.3V
10%
X5R
0402
COMMON

C81
1uF

6.3V
10%
X5R
0402
COMMON

C813
1uF

6.3V
10%
X5R
0402
COMMON

C82
1uF

6.3V
10%
X5R
0402
COMMON

C785
1uF

6.3V
10%
X5R
0402
COMMON

C79
1uF

6.3V
10%
X5R
0402
COMMON

C786
1uF

6.3V
10%
X5R
0402
COMMON

C75
1uF

6.3V
10%
X5R
0402
COMMON

C811
1uF

6.3V
10%
X5R
0402
COMMON

GND

C812
1uF

6.3V
10%
X5R
0402
COMMON

GND

C912
47uF

4V
20%
X5R
0805LP
DNI

C E

ASSEMBLY
PAGE DETAIL

BASE LEVEL GENERIC SCHEMATIC ONLY
MEMORY: FBC[31:0]

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-V317

MS-V317

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev
Custom

Custom

Custom

Wednesday, August 20, 2014

Wednesday, August 20, 2014

Wednesday, August 20, 2014

NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA

NV_PN

PCB REV

FDBA

BOM REV

G

MS-V317

10: MEMORY: FBC Partition 31..0

10: MEMORY: FBC Partition 31..0

10: MEMORY: FBC Partition 31..0

600-1G401-BASE-QS1

PG401-A02
A

1.0

1.0

1.0

Sheet ofDate:

10 37

Sheet ofDate:

10 37

Sheet ofDate:

10 37

10 OF 37

PAGE
DATE

04-AUG-2014

H

5

A B C D E F G H

Page11: MEMORY: FBC Partition 63..32

1

GND

M4C

@memory.u_mem_sd_ddr5_x32(sym_6):page11_i109
BGA170
COMMON

Normal

J1

MF_VSS/SOE*

add 1k to VSS

B10

VSS

B5

VSS

D10

VSS

G10

VSS

G5

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L10

VSS

L5

VSS

P10

VSS

T10

VSS

T5

VSS

A1

VSSQ

A12

VSSQ

A14

VSSQ

A3

VSSQ

C1

VSSQ

C11

VSSQ

C12

VSSQ

C14

VSSQ

C3

VSSQ

C4

VSSQ

E1

VSSQ

E12

VSSQ

E14

VSSQ

E3

VSSQ

F10

VSSQ

F5

VSSQ

H13

VSSQ

H2

VSSQ

K13

VSSQ

K2

VSSQ

M10

VSSQ

M5

VSSQ

N1

VSSQ

N12

VSSQ

N14

VSSQ

N3

VSSQ

R1

VSSQ

R11

VSSQ

R12

VSSQ

R14

VSSQ

R3

VSSQ

R4

VSSQ

V1

VSSQ

V12

VSSQ

V14

VSSQ

V3

VSSQ

C10

VDD

C5

VDD

D11

VDD

G1

VDD

G11

VDD

G14

VDD

G4

VDD

L1

VDD

L11

VDD

L14

VDD

L4

VDD

P11

VDD

R10

VDD

R5

VDD

B1

VDDQ

B12

VDDQ

B14

VDDQ

B3

VDDQ

D1

VDDQ

D12

VDDQ

D14

VDDQ

D3

VDDQ

E10

VDDQ

E5

VDDQ

F1

VDDQ

F12

VDDQ

F14

VDDQ

F3

VDDQ

G13

VDDQ

G2

VDDQ

H12

VDDQ

H3

VDDQ

K12

VDDQ

K3

VDDQ

L13

VDDQ

L2

VDDQ

M1

VDDQ

M12

VDDQ

M14

VDDQ

M3

VDDQ

N10

VDDQ

N5

VDDQ

P1

VDDQ

P12

VDDQ

P14

VDDQ

P3

VDDQ

T1

VDDQ

T12

VDDQ

T14

VDDQ

T3

VDDQ

M4B

@memory.u_mem_sd_ddr5_x32(sym_5):page11_i55
BGA170
COMMON

FBC_VREFC

FBC_ZQ_2B

FBC_SEN_2

G3

RAS

L3

CAS

L12

WE

G12

CS

J4

ABI

H4

A0_A10

H5

A1_A9

H11

A2_BA0

H10

A3_BA3

K11

A4_BA2

K10

A5_BA1

K5

A6_A11

K4

A7_A8

J5

RFU_A12

J2

RESET

J3

CKE

J12

CLK

J11

CLK

A5

NC_RFU_A5

V5

NC_RFU_V5

J14

VREFC

J13

ZQ

J10

SEN

FBC_CMD<19>

09

C753
10nF

16V
10%
X7R
0402
COMMON

GND

R649 121ohm

R646 1k

19

FBC_CMD<16>

09

16

FBC_CMD<26>

09

26

FBC_CMD<31>

09

31

FBC_CMD<23>

09

23

FBC_CMD<21>

09

21

FBC_CMD<20>

09

20

FBC_CMD<29>

09

29

FBC_CMD<30>

09

30

FBC_CMD<28>

09

28

FBC_CMD<27>

09

27

FBC_CMD<24>

09

24

FBC_CMD<25>

09

25

FBC_CMD<22>

09

22

FBC_CMD<18>

09

18

FBC_CMD<17>

09

17

R650

40.2ohm

1 %
0402
COMMON

COMMON0402

1 %

COMMON0402

1 %

Fbc_Cmd<19>
Fbc_Cmd<16>
Fbc_Cmd<26>
Fbc_Cmd<31>

Fbc_Cmd<23>
Fbc_Cmd<21>

IN
IN

C80
820pF

50V
10%
X7R
0402
COMMON

GND GND

Fbc_Cmd<20>
Fbc_Cmd<29>
Fbc_Cmd<30>
Fbc_Cmd<28>
Fbc_Cmd<27>
Fbc_Cmd<24>
Fbc_Cmd<25>
Fbc_Cmd<22>

Fbc_Cmd<18>
Fbc_Cmd<17>

FBC_CLK1
FBC_CLK1*

R651

40.2ohm

1 %
0402
COMMON

FBC_CLK1_CM

2

09

Fbc_D<32>

09

Fbc_D<33>

09

Fbc_D<34>

09

Fbc_D<35>

09

Fbc_D<36>

09

Fbc_D<37>

09

Fbc_D<38>

09

Fbc_D<39>

09
09

09

Fbc_D<40>

09

Fbc_D<41>

09

Fbc_D<42>

09

Fbc_D<43>

09

Fbc_D<44>

09

Fbc_D<45>

09

Fbc_D<46>

09

3

Fbc_D<47>

09
09

09
09

FBC_D<32>

32

FBC_D<33>

33

FBC_D<34>

34

FBC_D<35>

35

FBC_D<36>

36

FBC_D<37>

37

FBC_D<38>

38

FBC_D<39>

39

FBC_EDC<4>

BI

FBC_DBI<4>

BI

FBC_D<40>

40

FBC_D<41>

41

FBC_D<42>

42

FBC_D<43>

43

FBC_D<44>

44

FBC_D<45>

45

FBC_D<46>

46

FBC_D<47>

47

FBC_EDC<5>

BI

FBC_DBI<5>

BI

FBC_WCK45

IN

FBC_WCK45*

IN

M4D

@memory.u_mem_sd_ddr5_x32(sym_1):page11_i11
BGA170
COMMON

NORMAL

A4

DQ0

A2

DQ1

B4

DQ2

B2

DQ3

E4

DQ4

E2

DQ5

F4

DQ6

F2

DQ7

C2

EDC0

D2

DBI0

VREFD

x16

x32

A11

DQ8

NC

A13

DQ9

NC

B11

DQ10

NC

B13

DQ11

NC

E11

DQ12

NC

E13

DQ13

NC

F11

DQ14

NC

F13

DQ15

NC

C13

EDC1

GND

D13

DBI1

NC

D4

WCK01

D5

WCK01

09

Fbc_D<48>

09

Fbc_D<49>

09

Fbc_D<50>

09

Fbc_D<51>

09

Fbc_D<52>

09

Fbc_D<53>

09

Fbc_D<54>

09

Fbc_D<55>

09
09

FBC_VREFD FBC_VREFD

A10

IN

09
09

09
09

10

09

Fbc_D<56>

09

Fbc_D<57>

09

Fbc_D<58>

09

Fbc_D<59>

09

Fbc_D<60>

09

Fbc_D<61>

09

Fbc_D<62>

09

Fbc_D<63>

FBC_D<48>

48

FBC_D<49>

49

FBC_D<50>

50

FBC_D<51>

51

FBC_D<52>

52

FBC_D<53>

53

FBC_D<54>

54

FBC_D<55>

55

FBC_EDC<6>

BI

FBC_DBI<6>

BI

FBC_D<56>

56

FBC_D<57>

57

FBC_D<58>

58

FBC_D<59>

59

FBC_D<60>

60

FBC_D<61>

61

FBC_D<62>

62

FBC_D<63>

63

FBC_EDC<7>

BI

FBC_DBI<7>

BI

FBC_WCK67

IN

FBC_WCK67*

IN

M4A

@memory.u_mem_sd_ddr5_x32(sym_3):page11_i51
BGA170
COMMON

NORMAL

V11

DQ16

V13

DQ17

T11

DQ18

T13

DQ19

N11

DQ20

N13

DQ21

M11

DQ22

M13

DQ23

R13

EDC2

P13

DBI2

VREFD

x16

x32

V4

DQ24

NC

V2

DQ25

NC

T4

DQ26

NC

T2

DQ27

NC

N4

DQ28

NC

N2

DQ29

NC

M4

DQ30

NC

M2

DQ31

NC

R2

EDC3

NC

P2

DBI3

NC

P4

WCK23

P5

WCK23

09
09

V10

C94
820pF

50V
10%
X7R
0402
COMMON

GND

10

IN

R638

0402 COMMON

1 %

FBC_MF2_A

1k

1

FBVDDQ

2

FBVDDQ

3

4

FBVDDQ

C760

C678

C745

C749

C680

C679

C681

C672

10uF

4.7uF

4.7uF

1uF

1uF

1uF

6.3V

6.3V
20%
X5R
0805LP
COMMON

FBVDDQ

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

C728
10uF

6.3V
20%
X5R
0805LP
COMMON

20%
X5R
0603
COMMON

C86

4.7uF

6.3V
20%
X5R
0603
COMMON

6.3V
20%
X5R
0603
COMMON

C97

4.7uF

6.3V
20%
X5R
0603
COMMON

6.3V
10%
X5R
0402
COMMON

C96
1uF

6.3V
10%
X5R
0402
COMMON

6.3V
10%
X5R
0402
COMMON

C89
1uF

6.3V
10%
X5R
0402
COMMON

6.3V
10%
X5R
0402
COMMON

C90
1uF

6.3V
10%
X5R
0402
COMMON

1uF

6.3V
10%
X5R
0402
COMMON

C87
1uF

6.3V
10%
X5R
0402
COMMON

C95

1uF

1uF

6.3V

6.3V
10%

10%

X5R

X5R

0402

0402

COMMON

COMMON

GND

C911
47uF

4V
20%
X5R
0805LP
DNI

GND

C E

ASSEMBLY
PAGE DETAIL

BASE LEVEL GENERIC SCHEMATIC ONLY

MEMORY: FBC[63:32]

4

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-V317

MS-V317

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev
Custom

Custom

Custom

NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA

NV_PN

PCB REV

FDBA

BOM REV

G

MS-V317

11: MEMORY: FBC Partition 63..32

11: MEMORY: FBC Partition 63..32

11: MEMORY: FBC Partition 63..32

Wednesday, August 20, 2014

Wednesday, August 20, 2014

Wednesday, August 20, 2014

600-1G401-BASE-QS1

PG401-A02
A

1.0

1.0

1.0

Sheet ofDate:

11 37

Sheet ofDate:

11 37

Sheet ofDate:

11 37

11 OF 37

PAGE
DATE

04-AUG-2014

H

5

A B C D E F G H

Page12: MEMORY: FBD Partition 31..0

1

GND

M2C

@memory.u_mem_sd_ddr5_x32(sym_7):page12_i381
BGA170_MIRR
COMMON

Mirrored

B10

VSS

B5

VSS

D10

VSS

G10

VSS

G5

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L10

VSS

L5

VSS

P10

VSS

T10

VSS

T5

VSS

A1

VSSQ

A12

VSSQ

A14

VSSQ

A3

VSSQ

C1

VSSQ

C11

VSSQ

C12

VSSQ

C14

VSSQ

C3

VSSQ

C4

VSSQ

E1

VSSQ

E12

VSSQ

E14

VSSQ

E3

VSSQ

F10

VSSQ

F5

VSSQ

H13

VSSQ

H2

VSSQ

K13

VSSQ

K2

VSSQ

M10

VSSQ

M5

VSSQ

N1

VSSQ

N12

VSSQ

N14

VSSQ

N3

VSSQ

R1

VSSQ

R11

VSSQ

R12

VSSQ

R14

VSSQ

R3

VSSQ

R4

VSSQ

V1

VSSQ

V12

VSSQ

V14

VSSQ

V3

VSSQ

SOE*/MF_VDD

add 1k to VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

FBVDDQ

FBD_MF1_A

J1
C10

VDD

C5

VDD

D11

VDD

G1

VDD

G11

VDD

G14

VDD

G4

VDD

L1

VDD

L11

VDD

L14

VDD

L4

VDD

P11

VDD

R10

VDD

R5

VDD

B1
B12
B14
B3
D1
D12
D14
D3
E10
E5
F1
F12
F14
F3
G13
G2
H12
H3
K12
K3
L13
L2
M1
M12
M14
M3
N10
N5
P1
P12
P14
P3
T1
T12
T14
T3

R705 1k

1 %

FBVDDQ

COMMON0402

M2B

@memory.u_mem_sd_ddr5_x32(sym_5):page12_i380
BGA170_MIRR

M2D

@memory.u_mem_sd_ddr5_x32(sym_2):page12_i378
BGA170_MIRR
COMMON

MIRRORED

2

09

Fbd_D<0>

09

Fbd_D<1>

09

Fbd_D<2>

09

Fbd_D<3>

09

Fbd_D<4>

09

Fbd_D<5>

09

Fbd_D<6>

09

Fbd_D<7>

09
09

09

Fbd_D<8>

09

Fbd_D<9>

09

Fbd_D<10>

09

Fbd_D<11>

09

Fbd_D<12>

09

Fbd_D<13>

09

Fbd_D<14>

09

Fbd_D<15>

09
09

09
09

FBD_D<0>

0

FBD_D<1>

1

FBD_D<2>

2

FBD_D<3>

3

FBD_D<4>

4

FBD_D<5>

5

FBD_D<6>

6

FBD_D<7>

7

FBD_EDC<0>

BI

FBD_DBI<0>

BI

FBD_D<8>

8

FBD_D<9>

9

FBD_D<10>

10

FBD_D<11>

11

FBD_D<12>

12

FBD_D<13>

13

FBD_D<14>

14

FBD_D<15>

15 31

FBD_EDC<1>

BI

FBD_DBI<1>

BI

FBD_WCK01

IN

FBD_WCK01*

IN

x16x32

V4

DQ0

NC

09

V2

DQ1

NC

T4

DQ2

NC

T2

DQ3

NC

N4

DQ4

NC

N2

DQ5

NC

M4

DQ6

NC

M2

DQ7

NC

R2

EDC0

NC

P2

DBI0

NC

V10

VREFD

V11

DQ8

V13

DQ9

T11

DQ10

T13

DQ11

N11

DQ12

N13

DQ13

M11

DQ14

M13

DQ15

R13

EDC1

P13

DBI1

P4

WCK01

P5

WCK01

Fbd_D<16>

09

Fbd_D<17>

09

Fbd_D<18>

09

Fbd_D<19>

09

Fbd_D<20>

09

Fbd_D<21>

09

Fbd_D<22>

09

Fbd_D<23>

09
09

FBD_VREFD

09

Fbd_D<24>

09

Fbd_D<25>

09

Fbd_D<26>

09

Fbd_D<27>

09

Fbd_D<28>

09

Fbd_D<29>

09

Fbd_D<30>

09

Fbd_D<31>

09
09

09
09

FBD_D<16>

16

FBD_D<17>

17

FBD_D<18>

18

FBD_D<19>

19

FBD_D<20>

20

FBD_D<21>

21

FBD_D<22>

22

FBD_D<23>

23

FBD_EDC<2>

BI

FBD_DBI<2>

BI

FBD_D<24>

24

FBD_D<25>

25

FBD_D<26>

26

FBD_D<27>

27

FBD_D<28>

28

FBD_D<29>

29

FBD_D<30>

30

FBD_D<31>

FBD_EDC<3>

BI

FBD_DBI<3>

BI

FBD_WCK23

IN

FBD_WCK23*

IN

3

5,07,10,23

M2A

@memory.u_mem_sd_ddr5_x32(sym_4):page12_i379
BGA170_MIRR
COMMON

MIRRORED

x32 x16

A11

DQ16

NC

A13

DQ17

NC

B11

DQ18

NC

B13

DQ19

NC

E11

DQ20

NC

E13

DQ21

NC

F11

DQ22

NC

F13

DQ23

NC

C13

EDC2

GND

D13

DBI2

NC

VREFD

A4

DQ24

A2

DQ25

B4

DQ26

B2

DQ27

E4

DQ28

E2

DQ29

F4

DQ30

F2

DQ31

C2

EDC3

D2

DBI3

D4

WCK23

D5

WCK23

GPIO10_FBVREF_SEL

IN

1.05V 0.140A

A10

GND GND

C55
820pF

50V
10%
X7R
0402
COMMON

FBVDDQ

1G1D1S

G

1

R58
549ohm

1 %
0402
COMMON

FBD_VREFD

R57

1.33k

1 %
0402
COMMON

3

D

Q11

@discrete.q_fet_n_enh(sym_2):page12_i328
SOT23_1G1D1S
COMMON

S

2

60V

0.26A
3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V

0.31A

0.3W
20V

GND

R59
931ohm

1 %
0402
COMMON

FBD_CMD<3>

09

C68
820pF

50V
10%
X7R
0402
COMMON

3

FBD_CMD<0>

09

0

FBD_CMD<10>

09

10

FBD_CMD<15>

09

15

FBD_CMD<7>

09

7

FBD_CMD<5>

09

5

FBD_CMD<4>

09

4

FBD_CMD<13>

09

13

FBD_CMD<14>

09

14

FBD_CMD<12>

09

12

FBD_CMD<11>

09

11

FBD_CMD<8>

09

8

FBD_CMD<9>

09

9

FBD_CMD<6>

09

6

FBD_CMD<2>

09

2

FBD_CMD<1>

09

1

R692

40.2ohm

1 %
0402
COMMON

C844
10nF

16V
10%
X7R
0402
COMMON

GND

OUT

FBD_VREFC

R699 121ohm

R713 1k

FBD_ZQ_1_B

COMMON0402

1 %

FBD_SEN_1

COMMON0402

1 %

GND

Fbd_Cmd<3>
Fbd_Cmd<0>
Fbd_Cmd<10>
Fbd_Cmd<15>

Fbd_Cmd<7>
Fbd_Cmd<5>

Fbd_Cmd<4>
Fbd_Cmd<13>
Fbd_Cmd<14>
Fbd_Cmd<12>
Fbd_Cmd<11>
Fbd_Cmd<8>
Fbd_Cmd<9>
Fbd_Cmd<6>

Fbd_Cmd<2>
Fbd_Cmd<1>

FBD_CLK0

IN

FBD_CLK0*

IN

R694

40.2ohm

1 %
0402
COMMON

FBD_CLK0_RC

0.350 1.05V

R69
931ohm

1 %
0402
COMMON

GND

09
09

FBD_VREF_Q

13

FBVDDQ

R70
549ohm

1 %
0402
COMMON

R71

1.33k

1 %
0402
COMMON

GND

OUT

1.05V

0.350

COMMON

L3

RAS

G3

CAS

G12

WE

L12

CS

J4

ABI

K4

A0_A10

K5

A1_A9

K11

A2_BA0

K10

A3_BA3

H11

A4_BA2

H10

A5_BA1

H5

A6_A11

H4

A7_A8

J5

RFU_A12

J2

RESET

J3

CKE

J12

CLK

J11

CLK

A5

NC_RFU_A5

V5

NC_RFU_V5

13

J14

VREFC

J13

ZQ

J10

SEN

1

FBVDDQ

2

3

4

FBVDDQ

C830

C831

C854

C841

C848

10uF

4.7uF

4.7uF

1uF

6.3V

6.3V

20%

20%

X5R

X5R

0805LP

0603

COMMON

COMMON

FBVDDQ

C62

5

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.

C849
10uF

6.3V
20%
X5R
0805LP
COMMON

4.7uF

6.3V
20%
X5R
0603
COMMON

6.3V
20%
X5R
0603
COMMON

C60

4.7uF

6.3V
20%
X5R
0603
COMMON

6.3V
10%
X5R
0402
COMMON

C66
1uF

6.3V
10%
X5R
0402
COMMON

1uF

6.3V
10%
X5R
0402
COMMON

C64
1uF

6.3V
10%
X5R
0402
COMMON

C840
1uF

6.3V
10%
X5R
0402
COMMON

C70
1uF

6.3V
10%
X5R
0402
COMMON

C835
1uF

6.3V
10%
X5R
0402
COMMON

C72
1uF

6.3V
10%
X5R
0402
COMMON

GND

C855
1uF

6.3V
10%
X5R
0402
COMMON

C851
1uF

6.3V
10%
X5R
0402
COMMON

GND

C910
47uF

4V
20%
X5R
0805LP
DNI

C E

ASSEMBLY
PAGE DETAIL

BASE LEVEL GENERIC SCHEMATIC ONLY

MEMORY: FBD[31:0]

4

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-V317

MS-V317

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Wednesday, August 20, 2014

Wednesday, August 20, 2014

Wednesday, August 20, 2014

NVIDIA CORPORATION

2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA

NV_PN

PCB REV

FDBA

BOM REV

G

MS-V317

12: MEMORY: FBD Partition 31..0

12: MEMORY: FBD Partition 31..0

12: MEMORY: FBD Partition 31..0

600-1G401-BASE-QS1

PG401-A02
A

Sheet ofDate:

Sheet ofDate:

Sheet ofDate:

12 37

12 37

12 37

PAGE
DATE

H

12 OF 37

04-AUG-2014

1.0

1.0

1.0

5