Page 1
A B C D E F G H
G94-P545-A01 - GDDR3, DVI/VGA + DVI/VGA + HDTV/SDTV-Out
1
2
3
4
VARIANT ASSEMBLY
SKU
BASE
B
SKU9100
1
2
SKU0000
SKU0010
3
SKU0020
4
<UNDEFINED>
5
<UNDEFINED>
6
<UNDEFINED>
7
<UNDEFINED>
8
<UNDEFINED>
9
<UNDEFINED>
10
<UNDEFINED>
11
<UNDEFINED>
12
<UNDEFINED>
13
<UNDEFINED>
14
<UNDEFINED>
15
Table of Contents:
Page 1: Overview
Page 2: PCI Express
Page 3: MEMORY: GPU Partition A/B
Page 4: MEMORY: GPU Partition C/D
Page 5: FBA Partition
Page 6: FBA Partition Decoupling
Page 7: FBB Partition
Page 8: FBB Partion Decoupling
Page 9: FBC Partition
Page 10: FBC Partition Decoupling
Page 11: FBD Partition
Page 12: FBD Partition Decoupling
Page 13: FB Net Properties
Page 14: DACA Interface
Page 15: DACC Interface
Page 16: IFP A/B Interface -- DVI Connector South
Page 17: IFP C/D Interface -- DVI Connector MID
Page 18: IFP E/F Interface -- Unused
Page 19: DACB and HDTV/SDTV-Out
Page 20: MIO A/B Interface
Page 21: MISC: GPIO, I2C, ROM, HDCP, and XTAL
Page 22: Strap Configuration
Page 23: PWR and GND Signals
Page 24: NVVDD and FBVDDQ Decoupling
Page 25: SPDIF Input, Backdrive Protection, and IFP_IOVDD Power Supply
Page 26: PS I: 3V3, 12V, and 12V_EXT Power Supply Filter
Page 27: PS II: PEX_VDD, IFP_PLLVDD, 2V5, 5V, and DDC_5V Power Supply
Page 28: PS III: FBVDDQ Power Supply
Page 29: PS IV: NVVDD VID Control
Page 30: PS V: NVVDD Power Supply
Page 31: Thermal Diode and Fan Control
Page 32: Thermal, Mechanical, and Bracket
NVPN
600-10545-base-100
600-10545-9100-100
600-10545-0000-100
600-10545-0010-100
600-10545-0020-100
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
G94-400 650MHz/1000MHz 512MB 16Mx32 BGA136 GDDR3, DVI-I-DL+DVI-I-DL+HDTV-Out (Bring Up SKU)
G94-400 650MHz/1000MHz 512MB 16Mx32 BGA136 GDDR3, DVI-I-DL+DVI-I-DL+HDTV-Out
G94-300 500MHz/800MHz 512MB 16Mx32 BGA136 GDDR3, DVI-I-DL+DVI-I-DL+HDTV-Out
G94-200 500MHz/800MHz 384MB 16Mx32 BGA136 GDDR3, DVI-I-DL+DVI-I-DL+HDTV-Out
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
V127-0A Base on P545
1.PAGE18: ADD Display port circuit
2.PAGE21: ADD GPIO circuit
3.PAGE 21: change SPDIF circuit
4.PAGE 27: remove PEX_VDD power switch circuit
5.PAGE 27: remove IFP_PLLVDD/2V5 power switch circuit cahnge APL5713 and APL5910 circuit
6.PAGE 28: remove FBVDDQ power switch circuit change APW7067N power circuit
7.PAGE 29: remove NVVDD VID circuit
8.PAGE 30: change NNVDD POWER APW7088 circuit
9.PAGE 16/17 : ADD EMI bridge R
10.PAGE 17 CO-LAYOUT HDIM CONNECT
11.PAGE 15 remove J2 D_SUB SLIM CONNECT
12.PAGE 29 ADD CH7322 circuit
V127-20 Base on V127-0A
1.PAGE30 .CO-LAYOUT RT9258 circuit
V127-40 Base on V127-20
1.PAGE34 .Add Hybrid Power circuit modify form P393 and Hybrid APP note
2.PAGE20 .Remove SLi circuit
3.PAGE19 .Add Scart circuit and remove HDTV-7
4.PAGE17 .TMDS C/D Revise to HDMI short connector and remove DVI connector,
And Change HDMI to I2CD bus
5.PAGE32 .Add FAN seat for Heatsink solution
6.PAGE25&2 .Reserve MB support SPDIF IN circuit
7.PAGE29 .Remove U508 CEC circuit
8.PAGE16 .Add EMI diff sulotion
5
9.PAGE17 .Add EMI diff sulotion
10.PAGE17 .Add EMI suggestion C16 for 3V3_F to GND
11.PAGE32 .Add EMI suggestion EM1~EM6 Spring part
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
Overview
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date:
Date:
Date:
MS-V127
<Doc>
<Doc>
<Doc>
Wednesday, July 09, 2008
Wednesday, July 09, 2008
Wednesday, July 09, 2008
Sheet of
Sheet of
Sheet of
HFDBA
132
132
132
<RevCode>
<RevCode>
<RevCode>
1
2
3
4
5
www.vinafix.vn
Page 2
P
age 16: <e
dit h
il
ere to insert page deta
Page 15: <edit here to insert page detail>
HGFEDCBA
1
DDR3 32Mx16
POWER
MEMORY CHANNEL A/B
2
3
REGULATION
From +12V
NVVDD,PEX1V2
From +12V LINEAR:
5V
From +12V DIRECT:
FAN
From +3.3V LINEAR:
A3V3, A2V5,FBVDDQ
Straps
BIOS
HDCP
MEM A/B
MIOA/B
ROM
MEMORY CHANNEL C/D
DDR3 32Mx16
MEM C/D
DACB
CRT
H/VSync
I2CB_SCL/SDA
XTALIN/OUT
DACA
CRT
H/VSync
I2CA_SCL/SDA
TV Filters
27MHz XTAL
V127-20 DDR3 8-Layer
TV
CONN
RBG Filters
1
2
3
DVI-IDual Link
G94GT
POWER DELIVERY
+12V_BUS+3.3V
DACC
CRT
H/VSync
I2CB_SCL/SDA
Dual Link
RBG Filters
PCI-Express
4
VGA
CONN
4
+3.3V_BUS +12V_BUS
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A B D F H
PCI-Express Bus
www.vinafix.vn
ASSEMBLY
PAGE DETAIL
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
P381 Overview
E GC
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
MS-V056-40
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Date:
Date:
P381-A04
Tuesday, July 01, 2008
Tuesday, July 01, 2008
Tuesday, July 01, 2008
15 15
15 15
15 15
Sheet of
Sheet of
Sheet of
<RevCode>
<RevCode>
<RevCode>
5
Page 3
A B C D E F G H
Page34: Hybrid Power
1
2
Weak pull-ups needed for I2CS:
* if SMBus is isolated from the GPU
* if MB does not support SMBus
* if MB does not support 3V3AUX
3
4
5
Per Datasheet:
Vf = 400mV at 10mA
Vf = 500mV at 30mA
* expected current < 2mA
OUT
BI
OUT
UC_3V3
PEX_REFCLK_EN 2
R1213
R1213
68K
68K
?
?
0402
0402
COMMON
COMMON
R1214
R1214
68K
68K
?
?
0402
0402
COMMON
COMMON
I2CA_SCL_R10
OUT
I2CA_SDA_R10
UC_3V3
D
Q1201
Q1201
SOT23
SOT23
G
1
COMMON
COMMON
S
1G1D1S
R1209
R1209
68K
68K
?
?
0402
0402
COMMON
COMMON
GND
GND
G
1
1G1D1S
1G1D1S
UC_3V3
3
D
Q1211
Q1211
SOT23
SOT23
COMMON
COMMON
S
?
?
2
?
?
?
?
?
?
?
?
?
?
GND
1G1D1S
R1210
R1210
68K
68K
?
?
0402
0402
COMMON
COMMON
Stuff 10K pull-down for DP skus
OUT
OUT
OUT
12V
R1216
R1216
10K
10K
?
?
0402
0402
COMMON
COMMON
3V3
3V3_AUX
D1200
D1200
1
2
3
UC_3V3
R1201
R1201
68K
68K
?
?
0402
0402
COMMON
COMMON
I2CC_SCL_R16,17
I2CC_SDA_R16,17
UC_3V3
R1220
R1220
68K
68K
?
?
0402
0402
COMMON
COMMON
C1200
C1200
1UF
1UF
?
?
?
?
?
?
0402
0402
COMMON
COMMON
?
?
?
?
SOT23
SOT23
COMMON
COMMON
R1221
R1221
0
0
?
?
0402
0402
UC_3V3
COMMON
COMMON
3.0V
0.01A
10MIL
C1201
C1201
.1UF
.1UF
?
?
?
?
?
?
0402
0402
U1200
U1200
COMMON
COMMON
XSOP20_P065_072X053
XSOP20_P065_072X053
COMMON
GND
I2CC_SCL_R
I2CC_SDA_R
I2CS_SCL_R 2,16
I2CS_SDA_R 2,16
PEX_RST* 2
IN
HYBRID_PRG_TP
COMMON
1
2
3
17
11
13
7
4
20
GND
VDD
PEX_REF_CLK_ENABLE
IICC_SCL
IICC_SDA
SMB_SCL
SMB_SDA
PCI_E_RESET*
VPP
GND
PIC16F690
PIC16F690
HOTPLUG_DETECT_C
HOTPLUG_DETECT_D
HOTPLUG_DETECT_E
HOTPLUG_DETECT_F
GPU_RESET*
POWER_ENABLE
FAN_ENABLE
I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
15
14
8
9
12
10
19
18
6
16
5
PS3_OUTEN
I2CA_SCL_UC
I2CA_SDA_UC
I2CB_SCL_UC
I2CB_SDA_UC
HYBRID_DP_HPD
HPLG_DET_D
HPLG_DET_E
HPLG_DET_F
GPU_RST*
PS3_OUTEN10,11,17,23,26
GPIO4_FAN_PWM_R17
D
Q1210
Q1210
SOT23
SOT23
G
1
COMMON
COMMON
S
1G1D1S
1G1D1S
3
2
GND
R1207
R1207
68K
68K
?
?
0402
0402
COMMON
COMMON
R1212 10K
R1212 10K
0402
0402
R1200 10K
R1200 10K
0402
0402
I2CS_ENABLE*
?
?
?
?
?
?
?
?
?
?
?
?
UC_3V3
R1208
R1208
68K
68K
?
?
0402
0402
COMMON
COMMON
COMMON
COMMON
?
?
R1223 68K
R1223 68K
0402
0402
?
?
R1202 68K
R1202 68K
0402
0402
?
?
COMMON
COMMON
?
?
UC_3V3
COMMON
COMMON
COMMON
COMMON
R1215
R1215
68K
68K
?
?
0402
0402
COMMON
COMMON
UC_3V3
3
?
?
2
?
?
?
?
?
?
?
?
?
?
SOT23
SOT23
I2CS_ENABLE16
OUT
3
D
Q1200
Q1200
SOT23
SOT23
G
1
COMMON
COMMON
S
?
?
2
?
?
?
?
1G1D1S
1G1D1S
?
?
?
?
?
?
UC_3V3 UC_3V3
G
1
1G1D1S
1G1D1S
UC_3V3
R1204
R1204
68K
68K
?
?
0402
0402
COMMON
COMMON
3
D
Q1205
Q1205
G
1
COMMON
COMMON
S
?
?
2
?
?
?
?
1G1D1S
1G1D1S
?
?
?
?
?
?
GND
D
S
isolates SMBus to the GPU when in Hybrid mode
Q1203
Q1203
SOT23
SOT23
COMMON
COMMON
3
2
GND
?
?
?
?
?
?
?
?
?
?
?
?
C1204
C1204
.1UF
.1UF
?
?
?
?
?
?
0402
0402
COMMON
COMMON
BI
D
G
1
S
1G1D1S
1G1D1S
UC_3V3
R1203
R1203
68K
68K
?
?
0402
0402
COMMON
COMMON
3
Q1204
Q1204
SOT23
SOT23
COMMON
COMMON
?
?
2
?
?
?
?
?
?
?
?
?
?
GND
HYBRID_HPLG_DET_D_Q
U1201A
U1201A
XSOP16_PI025_049X040
XSOP16_PI025_049X040
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
VCC
1
NC
9
NC
GND
U1202A
U1202A
XSOP16_PI025_049X040
XSOP16_PI025_049X040
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
VCC
1
NC
9
NC
GND
Q1202
Q1202
SOT23
SOT23
COMMON
COMMON
1
I2CB_SCL_R11
OUT
I2CB_SDA_R11
BI
3
?
?
2
?
?
?
?
?
?
?
?
?
?
2
Inverts DP HPD signal polarity
D
G
HYBRID_HPLG_DET_C_Q
1
C1203
S
1G1D1S
1G1D1S
C1203
.1UF
.1UF
?
?
?
?
?
?
0402
0402
COMMON
COMMON
GND
HYBRID_HPLG_DET_C_Q 12
3
HYBRID_HPLG_DET_D_Q 12
C1202
C1202
.1UF
.1UF
?
?
?
?
?
?
0402
0402
COMMON
COMMON
C1205
C1205
.1UF
.1UF
?
?
?
?
?
?
0402
0402
COMMON
COMMON
Vcc section of I2C bus switch
See sheets 10-11 for switch sections
4
UC_3V3
16
8
GND
UC_3V3
16
8
GND
5
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
PAGE DETAIL
www.vinafix.vn
Overview
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date:
Date:
Date:
<Doc>
<Doc>
<Doc>
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
MS-V127
Sheet of
Sheet of
Sheet of
HFDBA
132
132
132
<RevCode>
<RevCode>
<RevCode>
Page 4
A B C D E F G H
J501
Page2: PCI Express JTAG
12V
C855
C855
4.7UF
4.7UF
16V
16V
10%
10%
X5R
X5R
3V3
1206
1206
COMMON
COMMON
C846
C846
C847
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C847
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
1
GND
COMMON
COMMON
C857
C857
C856
C856
.1UF
.1UF
4.7UF
4.7UF
16V
16V
16V
16V
10%
10%
10%
10%
X7R
X7R
X5R
X5R
0402
0402
1206
1206
COMMON
COMMON
COMMON
COMMON
GND
3V3_AUX
C31
.1UF
C31
.1UF
0402
0402
16V
16V
10%
10%
X7R
X7R
PEX_PRSNT1*
2
GND
?
3
?
?
?
?
?
?
?
?
?
S
?
?
1G1D1S
1G1D1S
G
2
COMMON
COMMON
1
SOT23
SOT23
D
Q1209
Q1209
3
PEX_PRSNT2*
PEX_REFCLK_EN27
IN
4
CN2
CN2
CON_X16
CON_X16
COMMON
COMMON
B1
+12V
B2
+12V
A2
+12V
A3
+12V
B3
+12V/RSVD
B8
+3V3
A9
+3V3
A10
+3V3
B10
+3V3AUX
A1
PRSNT1
B17
PRSNT2
B12
RSVD
B4
GND
A4
GND
B7
GND
A12
GND
B13
GND
A15
GND
B16
GND
B18
GND
A18
GND
GND
B31
PRSNT2
A19
RSVD
B30
RSVD
A32
RSVD
A20
GND
B21
GND
B22
GND
A23
GND
A24
GND
B25
GND
B26
GND
A27
GND
A28
GND
B29
GND
A31
GND
B32
GND
B48
PRSNT2
A33
RSVD
A34
GND
B35
GND
B36
GND
A37
GND
A38
GND
B39
GND
B40
GND
A41
GND
A42
GND
B43
GND
B44
GND
A45
GND
A46
GND
B47
GND
B49
GND
A49
GND
GND
B81
PRSNT2
A50
RSVD
B82
RSVD
A51
GND
B52
GND
B53
GND
A54
GND
A55
GND
B56
GND
B57
GND
A58
GND
A59
GND
B60
GND
B61
GND
A62
GND
A63
GND
B64
GND
B65
GND
A66
GND
A67
GND
B68
GND
B69
GND
A70
GND
A71
GND
B72
GND
B73
GND
A74
GND
A75
GND
B76
GND
B77
GND
A78
GND
A79
GND
B80
GND
A82
GND
GND
5
SPDIF_IN_M
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
14,16
OUT
Stuff only to bypass the micro-controller
PEX_RST*
PEX_PRSNT1* PEX_PRSNT2*
END OF X1
END OF X1
END OF X4
END OF X4
END OF X8
END OF X8
END OF X16
END OF X16
TRST* JTAG1
TCLK JTAG2
TDI JTAG3
TDO JTAG4
TMS JTAG5
SMCLK
SMDAT
PERST
REFCLK
REFCLK
PERP0
PERN0
PETP0
PETN0
PERP1
PERN1
PETP1
PETN1
PERP2
PERN2
PETP2
PETN2
PERP3
PERN3
PETP3
PETN3
PERP4
PERN4
PETP4
PETN4
PERP5
PERN5
PETP5
PETN5
PERP6
PERN6
PETP6
PETN6
PERP7
PERN7
PETP7
PETN7
PERP8
PERN8
PETP8
PETN8
PERP9
PERN9
PETP9
PETN9
PERP10
PERN10
PETP10
PETN10
PERP11
PERN11
PETP11
PETN11
PERP12
PERN12
PETP12
PETN12
PERP13
PERN13
PETP13
PETN13
PERP14
PERN14
PETP14
PETN14
PERP15
PERN15
PETP15
PETN15
R28
0
R28
0
0402
COMMON
0402
COMMON
5%
5%
R767
0
R767
0
0402
COMMON
0402
COMMON
5%
5%
B9
A5
A6
A7
A8
B5
B6
B11
WAKE
A11
A13
A14
A16
A17
B14
B15
A21
A22
B19
B20
A25
A26
B23
B24
A29
A30
B27
B28
A35
A36
B33
B34
A39
A40
B37
B38
A43
A44
B41
B42
A47
A48
B45
B46
A52
A53
B50
B51
A56
A57
B54
B55
A60
A61
B58
B59
A64
A65
B62
B63
A68
A69
B66
B67
A72
A73
B70
B71
A76
A77
B74
B75
A80
A81
B78
B79
PEX_TRST*
PEX_TCLK
PEX_TDI
PEX_TDO
PEX_TMS
I2CS_SCL_R
I2CS_SDA_R
SNN_PEX_WAKE*
PEX_RST*
PEX_REFCLK
PEX_REFCLK*
PEX_TXX0
PEX_TXX0*
PEX_RX0
PEX_RX0*
PEX_TXX1
PEX_TXX1*
PEX_RX1
PEX_RX1*
PEX_TXX2
PEX_TXX2*
PEX_RX2
PEX_RX2*
PEX_TXX3
PEX_TXX3*
PEX_RX3
PEX_RX3*
PEX_TXX4
PEX_TXX4*
PEX_RX4
PEX_RX4*
PEX_TXX5
PEX_TXX5*
PEX_RX5
PEX_RX5*
PEX_TXX6
PEX_TXX6*
PEX_RX6
PEX_RX6*
PEX_TXX7
PEX_TXX7*
PEX_RX7
PEX_RX7*
PEX_TXX8
PEX_TXX8*
PEX_RX8
PEX_RX8*
PEX_TXX9
PEX_TXX9*
PEX_RX9
PEX_RX9*
PEX_TXX10
PEX_TXX10*
PEX_RX10
PEX_RX10*
PEX_TXX11
PEX_TXX11*
PEX_RX11
PEX_RX11*
PEX_TXX12
PEX_TXX12*
PEX_RX12
PEX_RX12*
PEX_TXX13
PEX_TXX13*
PEX_RX13
PEX_RX13*
PEX_TXX14
PEX_TXX14*
PEX_RX14
PEX_RX14*
PEX_TXX15
PEX_TXX15*
PEX_RX15
PEX_RX15*
GPU_RST*
I2CS_SCL_R 16,27
I2CS_SDA_R 16,27
PEX_RST* 27
C822
0402
0402
COMMON
COMMON
X5R
X5R
C818
0402 10V
0402 10V
COMMON
COMMON
X5R
X5R
C804
C804
0402 10V
0402 10V
COMMON
COMMON
X5R
X5R
C795
COMMON
COMMON
X5R
X5R
C782
C782
COMMON
COMMON
X5R
X5R
C771
C771
0402
0402
COMMON
COMMON
X5R
X5R
C761
C761
COMMON
COMMON
X5R
X5R
C734
0402
0402
COMMON
COMMON
X5R
X5R
C716
COMMON
COMMON
X5R
X5R
C687
C687
0402
0402
COMMON
COMMON
X5R
X5R
C657
C657
0402
0402
COMMON
COMMON
X5R
X5R
C638
C638
0402
0402
COMMON
COMMON
X5R
X5R
C622
C622
COMMON
COMMON
X5R
X5R
C614
C614
COMMON
COMMON
X5R
X5R
C612
C612
COMMON
COMMON
X5R
X5R
C610
C610
COMMON
COMMON
X5R
X5R
R717
R717
0
0
5%
5%
0402
0402
COMMON
COMMON
R693
0
R693
0
JTAG_TRST*
(OPT)
COMMON
COMMON
0402
0402
5%
5%
R697
05%R697
0
JTAG_TCLK
(OPT)
0402 COMMON
0402 COMMON
5%
R716
0R716
0
(OPT)
0402 COMMON
0402 COMMON
5%
5%
R718
0
R718
0
(OPT)
COMMON
COMMON
0402
0402
5%
5%
R713
0
R713
0
JTAG_TMS
(OPT)
COMMON
COMMON
0402
0402
5%
5%
(OPT)
G1A
G1A
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
1/19 PCI_EXPRESS
AW10
AW11
AW12
AW13
AW14
AW15
AW16
AW17
AW18
AW19
AW20
AW21
AW22
AW23
AW24
AW25
AW26
AW27
1/19 PCI_EXPRESS
PEX_RST
AY10
PEX_CLKREQ
PEX_REFCLK
PEX_REFCLK
AU13
PEX_TX0
AV13
PEX_TX0
AY12
PEX_RX0
BA12
PEX_RX0
PEX_TX1
PEX_TX1
BB12
PEX_RX1
BB13
PEX_RX1
PEX_TX2
AV15
PEX_TX2
BA13
PEX_RX2
AY13
PEX_RX2
AV16
PEX_TX3
PEX_TX3
AY15
PEX_RX3
BA15
PEX_RX3
PEX_TX4
PEX_TX4
BB15
PEX_RX4
BB16
PEX_RX4
AV18
PEX_TX5
AU18
PEX_TX5
BA16
PEX_RX5
AY16
PEX_RX5
AV19
PEX_TX6
PEX_TX6
AY18
PEX_RX6
BA18
PEX_RX6
PEX_TX7
PEX_TX7
BB18
PEX_RX7
BB19
PEX_RX7
AV21
PEX_TX8
AU21
PEX_TX8
BA19
PEX_RX8
AY19
PEX_RX8
AV22
PEX_TX9
PEX_TX9
AY21
PEX_RX9
BA21
PEX_RX9
PEX_TX10
PEX_TX10
BB21
PEX_RX10
BB22
PEX_RX10
AV24
PEX_TX11
AU24
PEX_TX11
BA22
PEX_RX11
AY22
PEX_RX11
AU25
PEX_TX12
AV25
PEX_TX12
AY24
PEX_RX12
BA24
PEX_RX12
PEX_TX13
PEX_TX13
BB24
PEX_RX13
BB25
PEX_RX13
PEX_TX14
AV27
PEX_TX14
BA25
PEX_RX14
AY25
PEX_RX14
AU27
PEX_TX15
AT27
PEX_TX15
AY27
PEX_RX15
BA27
PEX_RX15
GPU_RST* 17,27
IN
.1UFC822
.1UF
C819
C819
10V
10V
10%
10%
.1UFC818
.1UF
10%
10%
.1UF
.1UF
C803
C803
10%
10%
.1UFC795
.1UF
C793
C793
10V0402
10V0402
10%
10%
.1UF
.1UF
C779
10V0402
10V0402
10%
10%
.1UF
.1UF
C766
C766
10V
10V
10%
10%
.1UF
.1UF
C753
C753
10V0402
10V0402
10%
10%
.1UFC734
.1UF
C727
C727
10V
10V
10%
10%
.1UFC716
.1UF
C707
C707
10V0402
10V0402
10%
10%
.1UF
.1UF
C683
10V
10V
10%
10%
.1UF
.1UF
C652
C652
10V
10V
10%
10%
.1UF
.1UF
C632
C632
10V
10V
10%
10%
.1UF
.1UF
C621
C621
10V0402
10V0402
10%
10%
.1UF
.1UF
C613
C613
10V0402
10V0402
10%
10%
.1UF
.1UF
C611
C611
10V0402
10V0402
10%
10%
.1UF
.1UF
C609
C609
10V0402
10V0402
10%
10%
0402 10V
0402 10V
C816
0402
0402
0402
0402
0402
0402
0402 10V
0402 10V
0402
0402
0402
0402
0402
0402
PEX_TX0
.1UF
.1UF
PEX_TX0*
10%
10%
COMMON
COMMON
X5R
X5R
PEX_TX1
.1UFC816
.1UF
PEX_TX1*
10%
10%
0402
10V
0402
10V
COMMON
COMMON
X5R
X5R
PEX_TX2
.1UF
.1UF
PEX_TX2*
10%
10%
10V0402
10V0402
COMMON
COMMON
X5R
X5R
PEX_TX3
.1UF
.1UF
PEX_TX3*
10%
10%
10V
10V
COMMON
COMMON
X5R
X5R
PEX_TX4
.1UFC779
.1UF
PEX_TX4*
10%
10%
10V0402
10V0402
COMMON
COMMON
X5R
X5R
PEX_TX5
.1UF
.1UF
PEX_TX5*
10%
10%
10V
10V
COMMON
COMMON
X5R
X5R
PEX_TX6
.1UF
.1UF
PEX_TX6*
10%
10%
10V
10V
COMMON
COMMON
X5R
X5R
PEX_TX7
.1UF
.1UF
PEX_TX7*
10%
10%
10V0402
10V0402
COMMON
COMMON
X5R
X5R
PEX_TX8
.1UF
.1UF
PEX_TX8*
10%
10%
COMMON
COMMON
X5R
X5R
PEX_TX9
.1UFC683
.1UF
PEX_TX9*
10%
10%
10V
10V
COMMON
COMMON
X5R
X5R
PEX_TX10
.1UF
.1UF
PEX_TX10*
10%
10%
10V
10V
COMMON
COMMON
X5R
X5R
PEX_TX11
.1UF
.1UF
PEX_TX11*
10%
10%
10V0402
10V0402
COMMON
COMMON
X5R
X5R
PEX_TX12
.1UF
.1UF
PEX_TX12*
10%
10%
10V
10V
COMMON
COMMON
X5R
X5R
PEX_TX13
.1UF
.1UF
PEX_TX13*
10%
10%
10V0402
10V0402
COMMON
COMMON
X5R
X5R
PEX_TX14
.1UF
.1UF
PEX_TX14*
10%
10%
10V0402
10V0402
COMMON
COMMON
X5R
X5R
PEX_TX15
.1UF
.1UF
PEX_TX15*
10%
10%
10V0402
10V0402
COMMON
COMMON
X5R
X5R
C GE
J501
?
?
3V3_F
?
?
?
?
CON_HDR_002X004_TH
CON_HDR_002X004_TH
COMMON
COMMON
TMS2TRST*
1
TDI4GND
3
KEY
KEY
VCC
5
TDO8TCK
7
AT18
PEX_IOVDD
AT24
PEX_IOVDD
AT25
PEX_IOVDD
AU15
PEX_IOVDD
AU16
PEX_IOVDD
AU19
PEX_IOVDD
AU22
PEX_IOVDD
AM17
PEX_IOVDDQ
AM18
PEX_IOVDDQ
AM19
PEX_IOVDDQ
AM20
PEX_IOVDDQ
AM24
PEX_IOVDDQ
AM25
PEX_IOVDDQ
AM26
PEX_IOVDDQ
AM27
PEX_IOVDDQ
AM28
PEX_IOVDDQ
AP18
PEX_IOVDDQ
AP19
PEX_IOVDDQ
AP21
PEX_IOVDDQ
AP22
PEX_IOVDDQ
AP24
PEX_IOVDDQ
AP25
PEX_IOVDDQ
AP27
PEX_IOVDDQ
AR15
PEX_IOVDDQ
AR16
PEX_IOVDDQ
AR18
PEX_IOVDDQ
AR19
PEX_IOVDDQ
AR21
PEX_IOVDDQ
AR22
PEX_IOVDDQ
AR24
PEX_IOVDDQ
AR25
PEX_IOVDDQ
AR27
PEX_IOVDDQ
AT15
PEX_IOVDDQ
AT16
PEX_IOVDDQ
AT19
PEX_IOVDDQ
AT21
PEX_IOVDDQ
AT22
PEX_IOVDDQ
L11
VDD33
L12
VDD33
L13
VDD33
M11
VDD33
N11
VDD33
AJ22
VDD_SENSE
AJ21
GND_SENSE
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_CAL_PD_VDDQ
PEX_CAL_PU_GND
AP16
AP17
AM16
PEX_PLLVDD
BB27
TESTMODE
AM21
AM22
AM23
PEX_TERMP
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
PCI Express
3V3_F
GND
Place near balls
C705
C705
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C675
C675
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
Matching Rule of Thumb
4 inch from Top of Gold Fingers to GPU
*2 inch Lane to Lane Skew
*No real Skew rule, but reducing the skew will minimize latency
Place near balls
C748
C748
.47UF
.47UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
NVVDD_SENSE_GPU
NVVDD_GND_SENSE_GPU
PEX_PLL_CLK_OUT
PEX_PLL_CLK_OUT*
12MIL
PEX_PLLVDD
GPU_TESTMODE
12MIL
PEX_CAL_PD_VDDQ
PEX_CAL_PU_GND
12MIL
PEX_TERMP
12MIL
C744
C744
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
R71
R71
0402
0402
R715
R715
10K
10K
5%
5%
0402
0402
COMMON
COMMON
C701
C701
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C668
C668
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
5%
5%
R626
R626
0402
0402
R714
R714
10K
10K
5%
5%
0402
0402
COMMON
COMMON
R694
R694
10K
10K
5%
5%
0402
0402
COMMON
COMMON
GND
C688
C688
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C696
C696
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C785
C785
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
30
OUT
30
OUT
SHOULD BE PLACED ON THE BOTTOM LAYER
SHOULD BE PLACED ON THE BOTTOM LAYER
R630
200
R630
200
COMMON
0402
COMMON
0402
5%
5%
10K
10K
COMMON
COMMON
2.49K
2.49K
COMMON
COMMON
1%
1%
R695
R695
180
180
5%
5%
0402
0402
COMMON
COMMON
R696
R696
270
270
5%
5%
0402
0402
COMMON
COMMON
R627
R627
R625
0402
0402
JTAG_TCLKJTAG_TDI
JTAG_TMS
JTAG_TDIJTAG_TDO
JTAG_TDO
JTAG_TRST*
C682
C682
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C676
C676
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
VDD33
C751
C751
.47UF
.47UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
2.49K
2.49K
COMMON0402
COMMON0402
1%
1%
2.49KR625
2.49K
COMMON
COMMON
1%
1%
C717
C717
.1UF
.1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
PEX_VDD
C736
C736
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
GND
C660
C660
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C728
C728
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C689
C689
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
2,21
OUT
2,21
OUT
2,21
OUT
2,2,21
IN
2,21
OUT
1
PEX_VDD
C661
C661
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
GND
GND
C754
C754
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C54
C54
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
3V3_F
C780
C780
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
2
3
4
PEX_VDD
LB502
10nH
LB502
10nH
COMMON
IND_SMD_0402
COMMON
IND_SMD_0402
C708
C708
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C673
C673
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
5
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
<RevCode>
<RevCode>
<RevCode>
232
232
232
www.vinafix.vn
Page 5
A B C D E F G H
Page3: MEMORY: GPU Partition A/B
1
5,13
2
3
4
FBA_D[63..0]
BI
FBA_DQM[7..0]
5,13
OUT
FBA_DQS_WP[7..0]
5,13
OUT
FBA_DQS_RN[7..0]
5,13
IN
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBVDDQ
R611
R611
511
511
1%
1%
13
0402
0402
COMMON
COMMON
R610
5
R610
1.3K
1.3K
1%
1%
0402
0402
COMMON
COMMON
C629
C629
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
OUT
FB_VREF
AM34
AW33
AW36
AW28
AW31
AW29
AM39
AW32
AM36
AW34
AW35
AL34
AK35
AK36
AJ34
AH34
AH35
AJ36
AK37
AL39
AL41
AL42
AK42
AJ39
AH39
AH41
AH42
AN35
AP36
AP37
AR37
AL35
AL36
AL37
AP41
AP42
AN39
AN40
AN41
AN42
AR40
AT39
AR31
AP32
AR33
AT31
AT34
AU34
AU35
AU31
BB33
BA33
AY33
BA34
BB34
AY35
AU30
AP28
AP31
AR28
AP29
AR30
AT30
BA31
BB31
BB30
BB28
BA28
AY28
AJ37
AP35
AP40
AR34
AY34
AU29
AH36
AK41
AP38
AT33
AV34
AT28
AY30
AH37
AK40
AN36
AP39
AT32
AU28
BA30
AH38
AL38
AN38
AR39
AV33
AT29
AV31
L32
G1B
G1B
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
2/19 FBA
2/19 FBA
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7
FB_VREF
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_DEBUG
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
FBA_WCK0
FBA_WCK0
FBA_WCK1
FBA_WCK1
FBA_WCK2
FBA_WCK2
FBA_WCK3
FBA_WCK3
FB_DLLAVDD0
FB_PLLAVDD0
AA32
AB32
AC32
AD32
AD34
AE32
AF32
AG32
AG34
AK34
AN34
AP30
AP33
J10
J13
J16
J19
J24
J27
J30
AT40
AU38
AT38
BA39
AV37
BB39
AW38
AW42
AW39
AY41
AU39
AV36
BA40
AY39
AU40
BA37
AY36
AY37
AT37
AU36
AV39
AY38
AV40
AU42
AW40
AU41
AW41
BB37
AW37
AY42
BB40
AT36
AT41
AT42
BA36
BB36
AK38
AK39
AM37
AN37
AU32
AU33
AV30
AW30
AH32
AJ32
FBVDDQ
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD27
FBA_DEBUG
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FB_PLLAVDD0
FBA_CMD[6..0]
0
1
2
3
4
5
6
FBA_CMD[25..8]
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
FBA_CMD27
5 7
FBVDDQ
R618
60.4R618
60.4
COMMON
0402
COMMON
0402
1%
1%
(OPT) (OPT)
5,13
OUT
5,13
OUT
5,13
OUT
5,13
OUT
OUT
C650
C650
C651
C651
1UF
1UF
.1UF
.1UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
GND
GND
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
FBB_D[63..0]
BI
FBB_DQM[7..0]
7,13
OUT
FBB_DQS_WP[7..0]
7,13
OUT
FBB_DQS_RN[7..0]
7,13
IN
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63
FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7
FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7
FBB_DQS_RN0
FBB_DQS_RN1
FBB_DQS_RN2
FBB_DQS_RN3
FBB_DQS_RN4
FBB_DQS_RN5
FBB_DQS_RN6
FBB_DQS_RN7
PEX_VDD
C643
C643
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
FBA_CMD[6..0]
FBA_CMD[25..8]
13
5
CMD-Addr Map
BGA136[31..0] BGA136[63..32] ADDR
CMD1 CMD1 RAS*
CMD10 CMD10 CAS*
CMD11 CMD11 WE*
5
CMD8 CMD8 CS0*
CMD19 CMD19 A<0>
CMD25 CMD25 A<1>
CMD22 A<2>
CMD24 A<3>
CMD0 A<4>
CMD2 A<5>
CMD4 A<2>
CMD6 A<3>
CMD5 A<4>
CMD13 A<5>
CMD21 CMD21 A<6>
CMD16 CMD16 A<7>
CMD23 CMD23 A<8>
CMD20 CMD20 A<9>
CMD17 CMD17 A<10>
CMD9 CMD9 A<11>
CMD12 CMD12 BA0
CMD3 CMD3 BA1
CMD27 CMD27 BA2
CMD18 CMD18 CKE
CMD15 CMD15 RST
LB501
120R@100MHzLB501
120R@100MHz
COMMONIND_SMD_0402
COMMONIND_SMD_0402
C647
C647
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
7,13
GND
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
MEMORY: GPU Partition A/B
C40
E39
F37
H37
G38
G39
G40
H39
C41
D40
D41
C42
D42
H40
G41
G42
J37
K37
J38
J39
L36
M34
M35
M36
J40
J41
J42
K39
L39
M38
M39
M40
W35
W36
W37
W38
AA34
AA35
AA36
AA37
W40
AA40
AA41
AA42
AB40
AB41
AB42
AD40
AB34
AB35
AB36
AB37
AE35
AE36
AE37
AG36
AD41
AD42
AE38
AF39
AE42
AG40
AG41
AG42
G37
F41
L37
K42
AA38
AC39
AE34
AE41
F39
F40
K35
K41
Y39
AB39
AD36
AE40
F38
E40
K36
K40
W39
AB38
AD35
AE39
H36
F42
L34
K38
AA39
AD39
AG35
AG39
G1C
G1C
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
3/19 FBB
3/19 FBB
FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63
FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7
FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7
FBB_DQS_RN0
FBB_DQS_RN1
FBB_DQS_RN2
FBB_DQS_RN3
FBB_DQS_RN4
FBB_DQS_RN5
FBB_DQS_RN6
FBB_DQS_RN7
FBB_DBI0
FBB_DBI1
FBB_DBI2
FBB_DBI3
FBB_DBI4
FBB_DBI5
FBB_DBI6
FBB_DBI7
CALIBRATION PIN
FB_CALx_PD_VDDQ
FB_CALx_PU_GND
VREF RATIO
0.7 FBVDDQ
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
DDR3
60
40
40FB_CALx_TERM_GND
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_DEBUG
FBB_CLK0
FBB_CLK0
FBB_CLK1
FBB_CLK1
FBB_WCK0
FBB_WCK0
FBB_WCK1
FBB_WCK1
FBB_WCK2
FBB_WCK2
FBB_WCK3
FBB_WCK3
FBVDDQ
J33
K34
K9
L17
L18
L19
L20
L23
L24
L25
L26
L27
N41
R39
N42
V37
T41
T42
V38
R38
N40
U39
N39
V40
R41
V39
P39
V36
V41
T39
T38
T35
T36
T40
R37
M41
T37
M42
R36
V35
V42
R42
R40
R34
N37
N38
U34
V34
J35
J36
N35
N36
W41
W42
AD37
AD38
M32
N32
P32
FBB_CMD[6..0]
FBB_CMD[25..8]
FBB_CMD27
FBB_CMD[6..0]
FBB_CMD[25..8]
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD27
0
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
FBVDDQ
R616
60.4
R616
FBB_DEBUG
FBB_CLK0
FBB_CLK0*
FBB_CLK1
FBB_CLK1*
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
60.4
COMMON
0402
COMMON
0402
1%
1%
7,13
OUT
7,13
OUT
7,13
OUT
7,13
OUT
R619 54.9
R619 54.9
04021%COMMON
04021%COMMON
R622
40.2
R622
40.2
0402
COMMON
0402
COMMON
1%
1%
R612
40.2
R612
40.2
0402
COMMON
0402
COMMON
1%
1%
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
FBVDDQ
GND
Sheet of
Sheet of
Sheet of
HFDBA
7
7
332
332
332
1
2
3
4
5
<RevCode>
<RevCode>
<RevCode>
www.vinafix.vn
Page 6
A B C D E F G H
Page4: MEMORY: GPU Partition C/D
1
9,13
2
3
4
FBC_D[63..0]
BI
FBC_DQM[7..0]
9,13
OUT
FBC_DQS_WP[7..0]
9,13
OUT
FBC_DQS_RN[7..0]
9,13
IN
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
5
J21
H21
G21
F21
F18
G18
H18
G16
B16
A16
B19
A19
D17
E18
A18
C16
H24
G24
F24
E24
J22
H22
G22
F22
C24
C22
B22
A22
C21
B21
A21
C19
F34
F33
E34
D34
G32
J31
H31
G31
C34
B34
A34
D33
D32
E31
D31
C31
D39
D38
G36
F35
E36
D36
C36
D35
B40
C39
B39
A40
A39
C35
B36
A36
J18
B18
E22
D20
F32
A33
F36
B37
G19
C18
D23
D21
H33
B33
D37
C37
H19
D18
D24
E21
G33
C33
E37
C38
H16
D16
D22
D19
J32
E33
G35
A37
G1D
G1D
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
4/19 FBC
4/19 FBC
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
FBC_DBI0
FBC_DBI1
FBC_DBI2
FBC_DBI3
FBC_DBI4
FBC_DBI5
FBC_DBI6
FBC_DBI7
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_DEBUG
FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1
FBC_WCK0
FBC_WCK0
FBC_WCK1
FBC_WCK1
FBC_WCK2
FBC_WCK2
FBC_WCK3
FBC_WCK3
FB_DLLAVDD1
FB_PLLAVDD1
G1E
FBVDDQ
N34
N9
R32
T32
T34
U32
V32
W32
W34
Y32
FBC_CMD0
C25
FBC_CMD1
A27
FBC_CMD2
E25
FBC_CMD3
D30
FBC_CMD4
D28
FBC_CMD5
E28
FBC_CMD6
G27
D27
FBC_CMD8
C30
FBC_CMD9
B28
FBC_CMD10
B25
FBC_CMD11
A30
FBC_CMD12
D26
FBC_CMD13
F27
FBC_CMD14
F25
FBC_CMD15
B31
FBC_CMD16
B30
FBC_CMD17
D29
FBC_CMD18
A28
FBC_CMD19
E27
FBC_CMD20
C27
FBC_CMD21
G28
FBC_CMD22
B27
FBC_CMD23
G25
FBC_CMD24
H27
FBC_CMD25
H25
A25
FBC_CMD27
A31
F28
C28
D25
FBC_CMD[6..0]
0
1
2
3
4
5
6
FBC_CMD[25..8]
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
FBC_CMD27
FBC_CMD[6..0]
FBC_CMD[25..8]
9
11,13
9
CMD-Addr Map
BGA136[31..0] BGA136[63..32] ADDR
CMD1 CMD1 RAS*
CMD10 CMD10 CAS*
CMD11 CMD11 WE*
9
CMD8 CMD8 CS0*
CMD19 CMD19 A<0>
CMD25 CMD25 A<1>
CMD22 A<2>
CMD24 A<3>
CMD0 A<4>
CMD2 A<5>
CMD4 A<2>
CMD6 A<3>
CMD5 A<4>
CMD13 A<5>
CMD21 CMD21 A<6>
CMD16 CMD16 A<7>
CMD23 CMD23 A<8>
CMD20 CMD20 A<9>
CMD17 CMD17 A<10>
CMD9 CMD9 A<11>
CMD12 CMD12 BA0
CMD3 CMD3 BA1
CMD27 CMD27 BA2
CMD18 CMD18 CKE
CMD15 CMD15 RST
FBVDDQ
FBC_DEBUG
J28
FBC_CLK0
J26
FBC_CLK0*
J25
FBC_CLK1
F30
FBC_CLK1*
E30
F19
E19
B24
A24
H30
G30
H34
G34
L21
L22
R624
60.41%R624
60.4
COMMON0402
COMMON0402
1%
(OPT) (OPT)
9,13
OUT
9,13
OUT
9,13
OUT
9,13
OUT
13
OUT
LB505
120R@100MHzLB505
120R@100MHz
IND_SMD_0402COMMON
IND_SMD_0402COMMON
C749
C750
C750
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C749
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C692
C692
.1UF
.1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
GND
11,13
11,13
11,13
PEX_VDD
GND
FBD_D[63..0]
BI
FBD_DQM[7..0]
OUT
FBD_DQS_WP[7..0]
OUT
FBD_DQS_RN[7..0]
IN
C758
C758
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FBD_D0
FBD_D1
FBD_D2
FBD_D3
FBD_D4
FBD_D5
FBD_D6
FBD_D7
FBD_D8
FBD_D9
FBD_D10
FBD_D11
FBD_D12
FBD_D13
FBD_D14
FBD_D15
FBD_D16
FBD_D17
FBD_D18
FBD_D19
FBD_D20
FBD_D21
FBD_D22
FBD_D23
FBD_D24
FBD_D25
FBD_D26
FBD_D27
FBD_D28
FBD_D29
FBD_D30
FBD_D31
FBD_D32
FBD_D33
FBD_D34
FBD_D35
FBD_D36
FBD_D37
FBD_D38
FBD_D39
FBD_D40
FBD_D41
FBD_D42
FBD_D43
FBD_D44
FBD_D45
FBD_D46
FBD_D47
FBD_D48
FBD_D49
FBD_D50
FBD_D51
FBD_D52
FBD_D53
FBD_D54
FBD_D55
FBD_D56
FBD_D57
FBD_D58
FBD_D59
FBD_D60
FBD_D61
FBD_D62
FBD_D63
FBD_DQM0
FBD_DQM1
FBD_DQM2
FBD_DQM3
FBD_DQM4
FBD_DQM5
FBD_DQM6
FBD_DQM7
FBD_DQS_WP0
FBD_DQS_WP1
FBD_DQS_WP2
FBD_DQS_WP3
FBD_DQS_WP4
FBD_DQS_WP5
FBD_DQS_WP6
FBD_DQS_WP7
FBD_DQS_RN0
FBD_DQS_RN1
FBD_DQS_RN2
FBD_DQS_RN3
FBD_DQS_RN4
FBD_DQS_RN5
FBD_DQS_RN6
FBD_DQS_RN7
G1E
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
M9
N8
N7
P9
R9
R8
P7
N6
M4
M2
M1
N1
P4
R4
R2
R1
K8
J7
J6
H6
L9
M8
M7
M6
J2
J1
K4
K3
K2
K1
H3
G4
H12
J11
H10
G12
G9
F9
F8
F12
A10
B10
C10
B9
A9
D10
D7
C8
F13
J15
J12
H15
D15
J14
H13
G13
D12
B12
A12
A13
D14
A15
B15
C15
P6
L4
J8
J3
H9
C9
F14
D11
R7
N2
L7
J5
G10
E9
G15
C13
R6
N3
K7
J4
G11
D9
F15
B13
R5
M5
K5
H4
E10
D8
G14
E12
5/19 FBD
5/19 FBD
FBD_D0
FBD_D1
FBD_D2
FBD_D3
FBD_D4
FBD_D5
FBD_D6
FBD_D7
FBD_D8
FBD_D9
FBD_D10
FBD_D11
FBD_D12
FBD_D13
FBD_D14
FBD_D15
FBD_D16
FBD_D17
FBD_D18
FBD_D19
FBD_D20
FBD_D21
FBD_D22
FBD_D23
FBD_D24
FBD_D25
FBD_D26
FBD_D27
FBD_D28
FBD_D29
FBD_D30
FBD_D31
FBD_D32
FBD_D33
FBD_D34
FBD_D35
FBD_D36
FBD_D37
FBD_D38
FBD_D39
FBD_D40
FBD_D41
FBD_D42
FBD_D43
FBD_D44
FBD_D45
FBD_D46
FBD_D47
FBD_D48
FBD_D49
FBD_D50
FBD_D51
FBD_D52
FBD_D53
FBD_D54
FBD_D55
FBD_D56
FBD_D57
FBD_D58
FBD_D59
FBD_D60
FBD_D61
FBD_D62
FBD_D63
FBD_DQM0
FBD_DQM1
FBD_DQM2
FBD_DQM3
FBD_DQM4
FBD_DQM5
FBD_DQM6
FBD_DQM7
FBD_DQS_WP0
FBD_DQS_WP1
FBD_DQS_WP2
FBD_DQS_WP3
FBD_DQS_WP4
FBD_DQS_WP5
FBD_DQS_WP6
FBD_DQS_WP7
FBD_DQS_RN0
FBD_DQS_RN1
FBD_DQS_RN2
FBD_DQS_RN3
FBD_DQS_RN4
FBD_DQS_RN5
FBD_DQS_RN6
FBD_DQS_RN7
FBD_DBI0
FBD_DBI1
FBD_DBI2
FBD_DBI3
FBD_DBI4
FBD_DBI5
FBD_DBI6
FBD_DBI7
FBD_CMD0
FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD4
FBD_CMD5
FBD_CMD6
FBD_CMD7
FBD_CMD8
FBD_CMD9
FBD_CMD10
FBD_CMD11
FBD_CMD12
FBD_CMD13
FBD_CMD14
FBD_CMD15
FBD_CMD16
FBD_CMD17
FBD_CMD18
FBD_CMD19
FBD_CMD20
FBD_CMD21
FBD_CMD22
FBD_CMD23
FBD_CMD24
FBD_CMD25
FBD_CMD26
FBD_CMD27
FBD_CMD28
FBD_CMD29
FBD_CMD30
FBD_DEBUG
FBD_CLK0
FBD_CLK0
FBD_CLK1
FBD_CLK1
FBD_WCK0
FBD_WCK0
FBD_WCK1
FBD_WCK1
FBD_WCK2
FBD_WCK2
FBD_WCK3
FBD_WCK3
FB_VDDQ_SENSE
FBD_CMD[6..0]
FBD_CMD[25..8]
FBD_CMD[6..0]
FBD_CMD[25..8]
11
FBD_CMD0
G3
FBD_CMD1
F5
FBD_CMD2
G5
FBD_CMD3
B4
FBD_CMD4
E6
FBD_CMD5
A4
FBD_CMD6
D5
D1
FBD_CMD8
D4
FBD_CMD9
C2
FBD_CMD10
F4
FBD_CMD11
E7
FBD_CMD12
B3
FBD_CMD13
C4
FBD_CMD14
F3
FBD_CMD15
B6
FBD_CMD16
C7
FBD_CMD17
C6
FBD_CMD18
G6
FBD_CMD19
F7
FBD_CMD20
E4
FBD_CMD21
C5
FBD_CMD22
E3
FBD_CMD23
F1
FBD_CMD24
D3
FBD_CMD25
F2
D2
FBD_CMD27
A6
D6
C1
A3
0
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
FBD_CMD27
FBVDDQ
FBD_DEBUG
G7
FBD_CLK0
G1
FBD_CLK0*
G2
FBD_CLK1
B7
FBD_CLK1*
A7
N5
N4
L6
K6
F11
F10
E13
D13
FBVDDQ_SENSEFB_PLLAVDD1
J34
R641
60.4
R641
60.4
COMMON
COMMON
0402
0402
1%
1%
11,13
OUT
11,13
OUT
11
OUT
11
OUT
28
OUT
1
2
11
11
3
4
5
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
PAGE DETAIL
www.vinafix.vn
MEMORY: GPU Partition C/D
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
432
432
432
<RevCode>
<RevCode>
<RevCode>
Page 7
A B C D E F G H
Page5: FBA Partition
M6E
R84
R84
240
240
5%
5%
0603
0603
COMMON
COMMON
C72
C72
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_DQM0
FBA_DQS_RN0
FBA_DQS_WP0
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_DQM4
FBA_DQS_RN4
FBA_DQS_WP4
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
M6E
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
RAS
CAS
WE
CS0
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1
BA2
CKE
CLK
CLK
NC/RFU
A12 (32Mx32)
SEN (GND)
RESET
MF (GND)
ZQ
VDDA (VDD)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
C3
G3
F2
F3
B3
B2
C2
E2
E3
D3
D2
R10
M11
N11
M10
T10
R11
T11
L10
N10
P10
P11
NONMIRRORED
NONMIRRORED
M6A
M6A
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M7E
M7E
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VREF
VREF
FBVDDQ
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
GND
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
GND
G12
L12
FBA_VREF0 FBA_VREF1
H1
FBA_VREF2 FBA_VREF3
H12
VREF = FBVDDQ * R2/(R1 + R2)
VREF = 0.70 * FBVDDQ
DDR3:
1.26V = 1.8V * 1.18K/(511 + 1.18K)
FBA_D8
8
FBA_D9
9
FBA_D10
10
FBA_D11
11
FBA_D12
12
FBA_D13
13
FBA_D14
14
FBA_D15
15
FBA_DQM1
FBA_DQS_RN1
FBA_DQS_WP1
FBA_D40
40
FBA_D41
41
FBA_D42
42
FBA_D43
43
FBA_D44
44
FBA_D45
45
FBA_D46
46
FBA_D47
47
FBA_DQM5
FBA_DQS_RN5
FBA_DQS_WP5
13
GND
MUST BE PLACED as close as possible to
the BGA memory on the line AFTER the
MEMORY pin!!
Minimize the stub length!!
FBVDDQ
R80
R80
511
511
R1
1%
1%
0402
0402
COMMON
COMMON
R78
R78
1.3K
1.3K
R2
1%
1%
0402
0402
COMMON
COMMON
GND
M6B
M6B
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
G10
DQ0
F11
DQ1
E11
DQ2
C10
DQ3
C11
DQ4
F10
DQ5
B10
DQ6
B11
DQ7
E10
DQM
D10
RDQS
D11
WDQS
M7A
M7A
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
T2
DQ0
R2
DQ1
L3
DQ2
M3
DQ3
N2
DQ4
M2
DQ5
T3
DQ6
R3
DQ7
N3
DQM
P3
RDQS
P2
WDQS
OUT
3,13
3,13
C GE
CMD-Addr Map
BGA136 ADDR
FBA_CMD[6..0]
FBA_CMD[25..8]
FBA_D[63..0]
FBA_DQM[7..0]
FBA_DQS_RN[7..0]
FBA_DQS_WP[7..0]
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD19 A<0>
CMD25 A<1>
CMD22 A<2>
CMD24 A<3>
CMD0 A<4>
CMD2 A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD27 BA2
CMD18 CKE
CMD15 RST
3
GND
1
FBA_CMD1 FBA_CMD1
10
FBA_CMD10 FBA_CMD10
11
FBA_CMD11 FBA_CMD11
8
19
FBA_CMD19 FBA_CMD19
25
FBA_CMD25 FBA_CMD25
22
FBA_CMD22
24
FBA_CMD24
0
FBA_CMD0
2
FBA_CMD2
21
FBA_CMD21 FBA_CMD21
16
FBA_CMD16 FBA_CMD16
23
FBA_CMD23 FBA_CMD23
20
FBA_CMD20 FBA_CMD20
17
FBA_CMD17 FBA_CMD17
9
FBA_CMD9 FBA_CMD9
12
FBA_CMD12 FBA_CMD12
3
FBA_CMD3 FBA_CMD3
27
FBA_CMD27 FBA_CMD27
R1005
R1005
0R
0R
5%
5%
0402
0402
COMMON
COMMON
13
3
FBA_CMD27 FBA_CMD27
18
FBA_CMD18 FBA_CMD18
FBA_CLK0
FBA_CLK0*
14
FBA_CMD14 FBA_CMD14
FBA_CMD_SENA0 FBA_CMD_SENA1
15
FBA_CMD15 FBA_CMD15 FBA_CMD15
FBA_ZQ0 FBA_ZQ1
IN
FBA_CMD18
R571
R571
R598
R598
10K
10K
10K
10K
5%
5%
5%
5%
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
GND
GND GND GND
FBVDDQ
3
C81
C81
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
0
1
2
3
FBA_DQM0
0
FBA_DQM1
1
FBA_DQM2
2
FBA_DQM3
3
4
FBA_DQM5
5
FBA_DQM6
6
FBA_DQM7
7
FBA_DQS_RN0
0
FBA_DQS_RN1
1
FBA_DQS_RN2
2
FBA_DQS_RN3
3
FBA_DQS_RN4
4
FBA_DQS_RN5
5
FBA_DQS_RN6
6
FBA_DQS_RN7
7
FBA_DQS_WP0
0
FBA_DQS_WP1
1
FBA_DQS_WP2
2
FBA_DQS_WP3
3
FBA_DQS_WP4
4
FBA_DQS_WP5
5
FBA_DQS_WP6
6
FBA_DQS_WP7
7
4
5
6
7
32
33
34
35
36
37
38
39
FBVDDQ
1
13
OUT
C574
C574
.01UF
.01UF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
3,13
3,13
MUST BE PLACED as close as possible to
the BGA memory on the line AFTER the
MEMORY pin!!
2
3
Minimize the stub length!!
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
4
R581
R581
0
0
5%
5%
0402
0402
COMMON
COMMON
(OPT) (OPT)
FBA_CLK0_TERM
R578
R578
R577
R577
40.2
40.2
40.2
40.2
1%
1%
1%
1%
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
IN
IN
ZQ = 6x desired output
DDR3:
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
FBA_CMD[6..0]
0
1
2
3
4
5
6
FBA_CMD[25..8]
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
3,13
BI
3,13
BI
3,13
BI
3,13
BI
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
CMD-Addr Map
BGA136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD19 A<0>
CMD25 A<1>
CMD4 A<2>
CMD6 A<3>
CMD5 A<4>
CMD13 A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD27 BA2
CMD18 CKE
CMD15 RST
GND
DDR3:
ZQ = 6x desired output
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
R1006
R1006
0R
0R
5%
5%
0402
0402
COMMON
COMMON
1
10
11
8
19
25
4
FBA_CMD4
6
FBA_CMD6
5
FBA_CMD5
13
FBA_CMD13
21
16
23
20
17
9
12
3
27
18
14
FBVDDQ
15
13
IN
FBA_CLK1
FBA_CLK1*
R85
R85
240
240
5%
5%
0603
0603
COMMON
COMMON
H10
F9
H4
F4
K9
H11
K10
M9
K4
H2
K3
L4
K2
M4
K11
L9
G9
G4
H3
H9
J11
J10
J2
J3
V4
V9
A9
A4
GND
FBVDDQ
K1
C554
C554
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
K12
J1
J12
C74
C74
.047UF
.047UF
16V
16V
10%
R1
R2
C80
C80
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
13
OUT
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
C575
C575
.01UF
.01UF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
IN
IN
COMMON
COMMON
R593
R593
40.2
40.2
C71
C71
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
FBA_CLK1_TERM
1%
1%
0402
0402
OUT
FBVDDQ
COMMON
COMMON
13
R594
R594
COMMON
COMMON
COMMON
COMMON
40.2
40.2
0402
0402
R582
R582
0
0
5%
5%
0402
0402
COMMON
COMMON
1%
1%
FBVDDQ
R89
R89
511
511
1%
1%
0402
0402
R92
R92
1.3K
1.3K
1%
1%
0402
0402
GND
M6D
M6C
M6C
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
FBA Partition
COMMON
M2
R3
T2
N2
T3
R2
M3
L3
N3
P3
P2
M7B
M7B
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
E11
C10
G10
B10
B11
F10
F11
C11
E10
D10
D11
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
FBA_D24
24
FBA_D25
25
FBA_D26
26
FBA_D27
27
FBA_D28
28
FBA_D29
29
FBA_D30
30
FBA_D31
31
FBA_DQM3FBA_DQM4
FBA_DQS_RN3
FBA_DQS_WP3
FBA_D56
56
FBA_D57
57
FBA_D58
58
FBA_D59
59
FBA_D60
60
FBA_D61
61
FBA_D62
62
FBA_D63
63
FBA_DQM7
FBA_DQS_RN7
FBA_DQS_WP7
FBA_D16
16
FBA_D17
17
FBA_D18
18
FBA_D19
19
FBA_D20
20
FBA_D21
21
FBA_D22
22
FBA_D23
23
FBA_DQM2
FBA_DQS_RN2
FBA_DQS_WP2
FBA_D48
48
FBA_D49
49
FBA_D50
50
FBA_D51
51
FBA_D52
52
FBA_D53
53
FBA_D54
54
FBA_D55
55
FBA_DQM6
FBA_DQS_RN6
FBA_DQS_WP6
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
M6D
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
R11
N11
R10
M10
L10
M11
T10
T11
N10
P10
P11
M7C
M7C
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
F2
F3
G3
C3
E2
B3
B2
C2
E3
D3
D2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M7D
M7D
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
RAS
CAS
WE
CS0
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1
BA2
CKE
CLK
CLK
NC/RFU
A12 (32Mx32)
SEN (GND)
RESET
MF (GND)
ZQ
VDDA (VDD)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
MIRRORED
MIRRORED
VDD
M1
VDD
A2
VDD
V2
VDD
A11
VDD
V11
VDD
F12
VDD
M12
VDD
A1
VDDQ
C1
VDDQ
E1
VDDQ
N1
VDDQ
R1
VDDQ
V1
VDDQ
C4
VDDQ
E4
VDDQ
J4
VDDQ
N4
VDDQ
R4
VDDQ
C9
VDDQ
E9
VDDQ
J9
VDDQ
N9
VDDQ
R9
VDDQ
A12
VDDQ
C12
VDDQ
E12
VDDQ
N12
VDDQ
R12
VDDQ
V12
VDDQ
B1
VSSQ
D1
VSSQ
P1
VSSQ
T1
VSSQ
G2
VSSQ
L2
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VREF
VREF
GND
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
GND
G12
L12
H1
H12
VREF = FBVDDQ * R2/(R1 + R2)
DDR3: VREF = 0.70 * FBVDDQ
FBVDDQ
R88
R88
511
511
1%
1%
0402
0402
COMMON
COMMON
R91
R91
1.3K
1.3K
R2
1%
1%
0402
0402
COMMON
COMMON
GND
FBA_CMD4
FBA_CMD6FBA_CMD8 FBA_CMD8
FBA_CMD5
FBA_CMD13
FBA_CMD22
FBA_CMD24
FBA_CMD0
FBA_CMD2
1.26V = 1.8V * 1.18K/(511 + 1.18K)
OUT
C79
C79
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
13
FBVDDQ
F1
FBVDDQ
R589
121R589
121
COMMON0402
COMMON0402
1%
1%
R590
121
R590
121
COMMON
COMMON
0402
0402
1%
1%
R580
121R580
121
COMMON0402
COMMON0402
1%
1%
R572
121R572
121
COMMON0402
COMMON0402
1%
1%
R591
121
R591
121
COMMON
0402
COMMON
0402
1%
1%
R586
121R586
121
COMMON0402
COMMON0402
1%
1%
R579
121
R579
121
COMMON
0402
COMMON
0402
1%
1%
R567
121R567
121
COMMON0402
COMMON0402
1%
1%
1
2
FBVDDQ
R81
R81
511
511
R1R1
1%
1%
0402
0402
COMMON
COMMON
COMMON
COMMON
R79
R79
1.3K
1.3K
R2
1%
1%
0402
0402
GND
C73
C73
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
13
OUT
3
4
5
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
<RevCode>
<RevCode>
<RevCode>
532
532
532
www.vinafix.vn
Page 8
A B C D E F G H
Page6: FBA Partition Decoupling
1
2
1
2
Decoupling for FBA 31..0 Decoupling for FBA 63..32
FBVDDQ
C592
C592
C584
C584
.1UF
.1UF
.1UF
.1UF
16V
16V
16V
16V
10%
10%
10%
10%
X7R
X7R
X7R
X7R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C550
C550
C556
C556
.1UF
.1UF
.1UF
.1UF
16V
16V
16V
16V
10%
10%
10%
10%
X7R
X7R
X7R
X7R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C591
C591
C570
C570
1UF
1UF
1UF
1UF
16V
16V
16V
3
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C580
C580
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C557
C557
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C581
C581
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C561
C561
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C582
C582
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C562
C562
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C551
C551
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C583
C583
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
FBVDDQ
C553
C553
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C558
C558
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C578
C578
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
PLACE NEAR MEMORY FBVDDQ PINSPLACE NEAR MEMORY FBVDDQ PINS
C585
C585
C590
C565
C565
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C559
C559
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C555
C555
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C586
C586
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C560
C560
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C573
C573
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C587
C587
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C589
C589
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C590
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C568
C568
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
3
GND
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
FBA Partition Decoupling
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
632
632
632
4
5
<RevCode>
<RevCode>
<RevCode>
Page 9
A B C D E F G H
Page7: FBB Partition
M5E
CMD-Addr Map
FBB_CMD[6..0]
FBB_CMD[25..8]
FBB_D[63..0]
FBB_DQM[7..0]
FBB_DQS_RN[7..0]
FBB_DQS_WP[7..0]
BGA136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD19 A<0>
CMD25 A<1>
CMD22 A<2>
CMD24 A<3>
CMD0 A<4>
CMD2 A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD27 BA2
CMD18 CKE
CMD15 RST
R1007
R1007
0R
0R
5%
5%
0402
0402
COMMON
COMMON
GND
3
13
1
FBB_CMD1 FBB_CMD1
10
FBB_CMD10 FBB_CMD10
11
FBB_CMD11 FBB_CMD11
8
FBB_CMD8 FBB_CMD8
19
FBB_CMD19 FBB_CMD19
25
FBB_CMD25 FBB_CMD25
22
FBB_CMD22
24
FBB_CMD24
0
FBB_CMD0
2
FBB_CMD2
21
FBB_CMD21 FBB_CMD21
16
FBB_CMD16 FBB_CMD16
23
FBB_CMD23 FBB_CMD23
20
FBB_CMD20 FBB_CMD20
17
FBB_CMD17 FBB_CMD17
9
FBB_CMD9 FBB_CMD9
12
FBB_CMD12 FBB_CMD12
3
FBB_CMD3 FBB_CMD3
27
FBB_CMD27 FBB_CMD27
3
IN
FBB_CMD27 FBB_CMD27
18
FBB_CMD18 FBB_CMD18
FBB_CLK0
FBB_CLK0*
14
FBB_CMD14 FBB_CMD14
FBB_CMD_SENB0 FBB_CMD_SENB1
15
FBB_CMD15 FBB_CMD15 FBB_CMD15
FBB_ZQ0 FBB_ZQ1
R601
R601
R602
R602
10K
10K
10K
10K
5%
5%
5%
5%
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
GND
GND GND GND
FBVDDQ
3
C70
C70
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
FBB_DQM0
0
FBB_DQM1
1
FBB_DQM2
2
FBB_DQM3
3
4
FBB_DQM5
5
FBB_DQM6
6
FBB_DQM7
7
FBB_DQS_RN0
0
FBB_DQS_RN1
1
FBB_DQS_RN2
2
FBB_DQS_RN3
3
FBB_DQS_RN4
4
FBB_DQS_RN5
5
FBB_DQS_RN6
6
FBB_DQS_RN7
7
FBB_DQS_WP0
0
FBB_DQS_WP1
1
FBB_DQS_WP2
2
FBB_DQS_WP3
3
FBB_DQS_WP4
4
FBB_DQS_WP5
5
FBB_DQS_WP6
6
FBB_DQS_WP7
7
FBVDDQ
1
13
OUT
C601
C601
.01UF
.01UF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
3,13
3,13
MUST BE PLACED as close as possible to
the BGA memory on the line AFTER the
2
3
MEMORY pin!!
Minimize the stub length!!
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
4
R608
R608
0
0
5%
5%
0402
0402
COMMON
COMMON
(OPT) (OPT)
FBB_CLK0_TERM
R606
R606
R604
R604
40.2
40.2
40.2
40.2
1%
1%
1%
1%
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
IN
IN
DDR3: ZQ = 6x desired output
impedence of DQ drivers
FBB_CMD[6..0]
FBB_CMD[25..8]
3,13
BI
3,13
BI
3,13
BI
3,13
BI
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
M5E
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
H3
RAS
F4
CAS
H9
WE
F9
CS0
K4
A0
H2
A1
K3
A2
M4
A3
K9
A4
H11
A5
K10
A6
L9
A7
K11
A8/AP
M9
A9
K2
A10
L4
A11
G4
BA0
G9
BA1
H10
BA2
H4
CKE
J11
CLK
J10
CLK
J2
NC/RFU
J3
A12 (32Mx32)
V4
SEN (GND)
V9
RESET
A9
MF (GND)
A4
ZQ
R73
R73
240
240
5%
5%
0603
0603
COMMON
COMMON
K1
VDDA (VDD)
K12
VDDA (VDD)
C62
C62
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
J1
VSSA (GND)
J12
VSSA (GND)
FBB_D0
0
FBB_D1
1
FBB_D2
2
FBB_D3
3
FBB_D4
4
FBB_D5
5
FBB_D6
6
FBB_D7
7
FBB_DQM0
FBB_DQS_RN0
FBB_DQS_WP0
FBB_D32
32
FBB_D33
33
FBB_D34
34
FBB_D35
35
FBB_D36
36
FBB_D37
37
FBB_D38
38
FBB_D39
39
FBB_DQM4
FBB_DQS_RN4
FBB_DQS_WP4
B10
C10
B11
E11
C11
G10
F10
F11
E10
D10
D11
M2
N2
R2
T3
M3
L3
T2
R3
N3
P3
P2
NONMIRRORED
NONMIRRORED
M5A
M5A
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M8E
M8E
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VREF
VREF
FBVDDQ
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
GND
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
GND
G12
L12
FBB_VREF0 FBB_VREF1
H1
FBB_VREF2 FBB_VREF3
H12
VREF = FBVDDQ * R2/(R1 + R2)
DDR3: VREF = 0.70 * FBVDDQ
1.26V = 1.8V * 1.18K/(511 + 1.18K)
FBB_D8
8
FBB_D9
9
FBB_D10
10
FBB_D11
11
FBB_D12
12
FBB_D13
13
FBB_D14
14
FBB_D15
15
FBB_DQM1
FBB_DQS_RN1
FBB_DQS_WP1
FBB_D40
40
FBB_D41
41
FBB_D42
42
FBB_D43
43
FBB_D44
44
FBB_D45
45
FBB_D46
46
FBB_D47
47
FBB_DQM5
FBB_DQS_RN5
FBB_DQS_WP5
MUST BE PLACED as close as possible to
the BGA memory on the line AFTER the
MEMORY pin!!
Minimize the stub length!!
FBVDDQ
R74
R74
511
511
1%
1%
0402
0402
COMMON
COMMON
R75
R75
1.3K
1.3K
1%
1%
0402
0402
COMMON
COMMON
GND
M5B
M5B
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
C3
DQ0
B3
DQ1
F3
DQ2
B2
DQ3
C2
DQ4
F2
DQ5
E2
DQ6
G3
DQ7
E3
DQM
D3
RDQS
D2
WDQS
M8A
M8A
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
T11
DQ0
T10
DQ1
R11
DQ2
R10
DQ3
N11
DQ4
M11
DQ5
M10
DQ6
L10
DQ7
N10
DQM
P10
RDQS
P11
WDQS
13
R1
R2
C GE
CMD-Addr Map
R588
R588
40.2
40.2
1%
1%
0402
0402
COMMON
COMMON
DDR3: ZQ = 6x desired outputImpedence = 240 / 6 = 40 ohm
BGA136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD19 A<0>
CMD25 A<1>
CMD4 A<2>
CMD6 A<3>
CMD5 A<4>
CMD13 A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD27 BA2
CMD18 CKE
CMD15 RST
R1008
R1008
0R
0R
5%
5%
0402
0402
COMMON
COMMON
GND
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
13
FBVDDQ
1
10
11
8
19
25
4
FBB_CMD4
6
FBB_CMD6
5
FBB_CMD5
13
FBB_CMD13
21
16
23
20
17
9
12
3
27
18
14
15
IN
FBB_CLK1
FBB_CLK1*
R90
R90
240
240
5%
5%
0603
0603
COMMON
COMMON
H10
F9
H4
F4
K9
H11
K10
M9
K4
H2
K3
L4
K2
M4
K11
L9
G9
G4
H3
H9
J11
J10
J2
J3
V4
V9
A9
A4
FBVDDQ
R576
R576
0
0
5%
5%
0402
0402
COMMON
OUT
C569
C569
.01UF
.01UF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
3,13
3,13
COMMON
FBB_CLK1_TERM
R592
R592
40.2
40.2
1%
1%
0402
0402
COMMON
COMMON
IN
IN
GND
C61
C61
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
13
OUT
FBVDDQ
R76
R76
511
511
R1
1%
1%
0402
0402
COMMON
COMMON
COMMON
COMMON
R77
R77
1.3K
1.3K
R2
1%
1%
0402
0402
C69
C69
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
13
OUT
FBVDDQ
GND
C75
C75
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C77
C77
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
K1
K12
J1
J12
GND
M5D
M5C
M5C
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
FBB_D16
16
FBB_D17
17
FBB_D18
18
FBB_D19
19
FBB_D20
20
FBB_D21
21
FBB_D22
22
FBB_D23
23
FBB_DQM2
FBB_DQS_RN2
FBB_DQS_WP2
FBB_D48
48
FBB_D49
49
FBB_D50
50
FBB_D51
51
FBB_D52
52
FBB_D53
53
FBB_D54
54
FBB_D55
55
FBB_DQM6
FBB_DQS_RN6
FBB_DQS_WP6
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
FBB Partition
COMMON
M10
R10
M11
L10
R11
T11
N11
T10
N10
P10
P11
M8B
M8B
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
G3
F3
C3
B3
B2
C2
E2
F2
E3
D3
D2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
FBB_D24
24
FBB_D25
25
FBB_D26
26
FBB_D27
27
FBB_D28
28
FBB_D29
29
FBB_D30
30
FBB_D31
31
FBB_DQM3FBB_DQM4
FBB_DQS_RN3
FBB_DQS_WP3
FBB_D56
56
FBB_D57
57
FBB_D58
58
FBB_D59
59
FBB_D60
60
FBB_D61
61
FBB_D62
62
FBB_D63
63
FBB_DQM7
FBB_DQS_RN7
FBB_DQS_WP7
M5D
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
R3
L3
M3
N2
M2
R2
T3
T2
N3
P3
P2
M8C
M8C
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
G10
F10
F11
E11
B11
B10
C10
C11
E10
D10
D11
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M8D
M8D
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
RAS
CAS
WE
CS0
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1
BA2
CKE
CLK
CLK
NC/RFU
A12 (32Mx32)
SEN (GND)
RESET
MF (GND)
ZQ
VDDA (VDD)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
MIRRORED
MIRRORED
FBVDDQ
F1
VDD
M1
VDD
A2
VDD
V2
VDD
A11
VDD
V11
VDD
F12
VDD
M12
VDD
A1
VDDQ
C1
VDDQ
E1
VDDQ
N1
VDDQ
R1
VDDQ
V1
VDDQ
C4
VDDQ
E4
VDDQ
J4
VDDQ
N4
VDDQ
R4
VDDQ
C9
VDDQ
E9
VDDQ
J9
VDDQ
N9
VDDQ
R9
VDDQ
A12
VDDQ
C12
VDDQ
E12
VDDQ
N12
VDDQ
R12
VDDQ
V12
VDDQ
B1
VSSQ
D1
VSSQ
P1
VSSQ
T1
VSSQ
G2
VSSQ
L2
VSSQ
B4
VSSQ
D4
VSSQ
P4
VSSQ
T4
VSSQ
B9
VSSQ
D9
VSSQ
P9
VSSQ
T9
VSSQ
G11
VSSQ
L11
VSSQ
B12
VSSQ
D12
VSSQ
P12
VSSQ
T12
VSSQ
G1
VSS
L1
VSS
A3
VSS
V3
VSS
A10
VSS
V10
VSS
G12
VSS
L12
VSS
H1
VREF
H12
VREF
VREF = FBVDDQ * R2/(R1 + R2)
GND
FBVDDQ
R87
R87
511
511
1%
1%
0402
0402
COMMON
COMMON
R86
R86
1.3K
1.3K
1%
1%
0402
0402
COMMON
COMMON
GND
GND
VREF = 0.70 * FBVDDQDDR3:
1.26V = 1.8V * 1.18K/(511 + 1.18K)
R1
R2
C78
C78
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
FBB_CMD4
FBB_CMD6
FBB_CMD5
FBB_CMD13
FBB_CMD22
FBB_CMD24
FBB_CMD0
FBB_CMD2
13
OUT
R599
R599
R597
R597
R583
R583
R575
R609
R605
R607
R607
R603
R603
COMMON
COMMON
COMMON
COMMON
FBVDDQ
121
121
COMMON
COMMON
0402
0402
1%
1%
121
121
COMMON
0402
COMMON
0402
1%
1%
121
121
COMMON
COMMON
0402
0402
1%
1%
121R575
121
COMMON0402
COMMON0402
1%
1%
121R609
121
COMMON0402
COMMON0402
1%
1%
121R605
121
COMMON0402
COMMON0402
1%
1%
121
121
COMMON
0402
COMMON
0402
1%
1%
121
121
COMMON
0402
COMMON
0402
1%
1%
FBVDDQ
R83
R83
511
511
R1
1%
1%
0402
0402
R82
R82
1.3K
1.3K
R2
1%
1%
0402
0402
C76
C76
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
13
OUT
GND
1
2
3
4
5
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
<RevCode>
<RevCode>
<RevCode>
732
732
732
www.vinafix.vn
Page 10
A B C D E F G H
Page8: FBB Partition Decoupling
1
2
1
2
Decoupling for FBB 63..32Decoupling for FBB 31..0
FBVDDQ
C599
C599
C606
C606
.1UF
.1UF
.1UF
.1UF
16V
16V
16V
16V
10%
10%
10%
10%
X7R
X7R
X7R
X7R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C597
C597
C595
C595
.1UF
.1UF
.1UF
.1UF
16V
16V
16V
16V
10%
10%
10%
10%
X7R
X7R
X7R
X7R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C608
C608
C605
C605
1UF
1UF
1UF
1UF
16V
16V
16V
16V
10%
10%
10%
3
10%
X5R
X5R
0603
0603
COMMON
COMMON
X5R
X5R
0603
0603
COMMON
COMMON
C607
C607
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C598
C598
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C602
C602
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C604
C604
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C603
C603
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C594
C594
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C600
C600
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C596
C596
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
FBVDDQ
C566
C566
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C576
C576
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C563
C563
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
PLACE NEAR MEMORY FBVDDQ PINSPLACE NEAR MEMORY FBVDDQ PINS
C571
C571
C567
C564
C564
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C572
C572
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C577
C577
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C588
C588
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C552
C552
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C579
C579
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C549
C549
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C593
C593
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C567
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C548
C548
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
3
GND
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
FBB Partion Decoupling
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
832
832
832
4
5
<RevCode>
<RevCode>
<RevCode>
Page 11
A B C D E F G H
Page9: FBC Partition
CMD-Addr Map
BGA136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD19 A<0>
CMD25 A<1>
CMD22 A<2>
CMD24 A<3>
CMD0 A<4>
CMD2 A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0 CMD12 BA0
CMD3 BA1
CMD27 BA2
CMD18 CKE
CMD15 RST
4
R1009
R1009
0R
0R
5%
5%
0402
0402
COMMON
COMMON
C775
C775
.01UF
.01UF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
FBVDDQ
R655
R655
0
0
5%
5%
0402
OUT
0402
COMMON
COMMON
(OPT)
FBC_CLK0_TERM
R648
R648
R654
R654
40.2
40.2
40.2
40.2
1%
1%
1%
1%
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
IN
IN
1
13
GND
4,13
4,13
MUST BE PLACED as close as possible to
the BGA memory on the line AFTER the
2
MEMORY pin!!
Minimize the stub length!!
GND
DDR3:
ZQ = 6x desired output
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD8
FBC_CMD9
3
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
4
FBC_CMD[6..0]
0
1
2
3
4
5
6
FBC_CMD[25..8]
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
4,13
BI
4,13
BI
4,13
BI
4,13
BI
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
FBC_D[63..0]
FBC_DQM[7..0]
FBC_DQS_RN[7..0]
FBC_DQS_WP[7..0]
FBC_CMD[6..0]
FBC_CMD[25..8]
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
1
FBC_CMD1 FBC_CMD1
10
FBC_CMD10 FBC_CMD10
11
FBC_CMD11 FBC_CMD11
8
FBC_CMD8 FBC_CMD8
19
FBC_CMD19 FBC_CMD19
25
FBC_CMD25 FBC_CMD25
22
FBC_CMD22
24
FBC_CMD24
0
FBC_CMD0
2
FBC_CMD2
21
FBC_CMD21 FBC_CMD21
16
FBC_CMD16 FBC_CMD16
23
FBC_CMD23 FBC_CMD23
20
FBC_CMD20 FBC_CMD20
17
FBC_CMD17 FBC_CMD17
9
FBC_CMD9 FBC_CMD9
12
FBC_CMD12 FBC_CMD12
3
FBC_CMD3 FBC_CMD3
27
FBC_CMD27 FBC_CMD27
18
FBC_CMD18 FBC_CMD18
FBC_CLK0
FBC_CLK0*
14
FBC_CMD14 FBC_CMD14
FBC_CMD_SENC0 FBC_CMD_SENC1
15
FBC_CMD15 FBC_CMD15 FBC_CMD15
13
IN
FBC_CMD18
R628
R628
R631
R631
10K
10K
10K
10K
5%
5%
5%
5%
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
4
GND
GND GND GND
FBVDDQ
4
C50
C50
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
M3E
M3E
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
H3
RAS
F4
CAS
H9
WE
F9
CS0
K4
A0
H2
A1
K3
A2
M4
A3
K9
A4
H11
A5
K10
A6
L9
A7
K11
A8/AP
M9
A9
K2
A10
L4
A11
G4
BA0
G9
BA1
H10
BA2
H4
CKE
J11
CLK
J10
CLK
J2
NC/RFU
J3
A12 (32Mx32)
V4
SEN (GND)
V9
RESET
A9
MF (GND)
FBC_ZQ0
A4
ZQ
R62
R62
240
240
5%
5%
0603
0603
COMMON
COMMON
K1
VDDA (VDD)
K12
VDDA (VDD)
C51
C51
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
J1
VSSA (GND)
J12
VSSA (GND)
FBC_D0
0
FBC_D1
1
FBC_D2
2
FBC_D3
3
FBC_D4
4
FBC_D5
5
FBC_D6
6
FBC_D7
7
FBC_DQM0
FBC_DQS_RN0
FBC_DQS_WP0
FBC_D32
32
FBC_D33
33
FBC_D34
34
FBC_D35
35
FBC_D36
36
FBC_D37
37
FBC_D38
38
FBC_D39
39
FBC_DQM4
FBC_DQS_RN4
FBC_DQS_WP4
E11
F11
G10
F10
C11
B10
C10
B11
E10
D10
D11
L3
M3
M2
N2
R3
T2
R2
T3
N3
P3
P2
NONMIRRORED
NONMIRRORED
M3A
M3A
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M4E
M4E
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VREF
VREF
FBVDDQ
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
GND
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
GND
G12
L12
FBC_VREF0 FBC_VREF1
H1
FBC_VREF2 FBC_VREF3
H12
VREF = FBVDDQ * R2/(R1 + R2)
VREF = 0.70 * FBVDDQDDR3:
1.26V = 1.8V * 1.18K/(511K + 1.18K)
FBC_D8
8
FBC_D9
9
FBC_D10
10
FBC_D11
11
FBC_D12
12
FBC_D13
13
FBC_D14
14
FBC_D15
15
FBC_DQM1
FBC_DQS_RN1
FBC_DQS_WP1
FBC_D40
40
FBC_D41
41
FBC_D42
42
FBC_D43
43
FBC_D44
44
FBC_D45
45
FBC_D46
46
FBC_D47
47
FBC_DQM5
FBC_DQS_RN5
FBC_DQS_WP5
13
GND
4,13
4,13
MUST BE PLACED as close as possible to
the BGA memory on the line AFTER the
MEMORY pin!!
Minimize the stub length!!
FBVDDQ
R64
R64
511
511
R1
1%
1%
0402
0402
COMMON
COMMON
R66
R66
1.3K
1.3K
R2
1%
1%
0402
0402
COMMON
COMMON
GND
M3B
M3B
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
B3
DQ0
B2
DQ1
F3
DQ2
G3
DQ3
E2
DQ4
F2
DQ5
C2
DQ6
C3
DQ7
E3
DQM
D3
RDQS
D2
WDQS
M4A
M4A
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
M10
DQ0
R10
DQ1
L10
DQ2
N11
DQ3
M11
DQ4
R11
DQ5
T10
DQ6
T11
DQ7
N10
DQM
P10
RDQS
P11
WDQS
OUT
C631
C631
.01UF
.01UF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C GE
IN
IN
FBVDDQ
R614
R614
0
0
5%
5%
0402
0402
COMMON
COMMON
(OPT)
FBC_CLK1_TERM
R613
R613
40.2
40.2
1%
1%
0402
0402
COMMON
COMMON
R617
R617
40.2
40.2
1%
1%
0402
0402
COMMON
COMMON
DDR3:
CMD-Addr Map
BGA136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD19 A<0>
CMD25 A<1>
CMD4 A<2>
CMD6 A<3>
CMD5 A<4>
CMD13 A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD3 BA1
CMD27 BA2
CMD18 CKE
CMD15 RST
R1010
R1010
0R
0R
5%
5%
0402
0402
COMMON
COMMON
GND
ZQ = 6x desired output
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
1
10
11
8
19
25
4
FBC_CMD4
6
FBC_CMD6
5
13
FBC_CMD13
21
16
23
20
17
9
12
3
27
FBC_CMD27FBC_CMD27
18
FBC_CLK1
FBC_CLK1*
14
FBVDDQ
15
13
FBC_ZQ1
IN
R72
R72
240
240
5%
5%
0603
0603
COMMON
COMMON
H10
F9
H4
F4
K9
H11
K10
M9
K4
H2
K3
L4
K2
M4
K11
L9
G9
G4
H3
H9
J11
J10
J2
J3
V4
V9
A9
A4
M4D
M4D
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
RAS
CAS
WE
CS0
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1
BA2
CKE
CLK
CLK
NC/RFU
A12 (32Mx32)
SEN (GND)
RESET
MF (GND)
ZQ
GND
C49
C49
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
13
OUT
FBVDDQ
R63
R63
511
511
R1
1%
1%
0402
0402
COMMON
COMMON
COMMON
COMMON
R65
R65
1.3K
1.3K
R2
1%
1%
0402
0402
C48
C48
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
13
OUT
FBVDDQ
GND
C55
C55
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C56
C56
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
K1
VDDA (VDD)
K12
VDDA (VDD)
J1
VSSA (GND)
J12
VSSA (GND)
GND
M3C
M3C
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
FBC Partition
COMMON
M11
N11
T11
T10
M10
L10
R11
R10
N10
P10
P11
M4B
M4B
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
G3
E2
F2
F3
B3
C2
B2
C3
E3
D3
D2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
FBC_D24
24
FBC_D25
25
FBC_D26
26
FBC_D27
27
FBC_D28
28
FBC_D29
29
FBC_D30
30
FBC_D31
31
FBC_DQM3FBC_DQM4
FBC_DQS_RN3
FBC_DQS_WP3
FBC_D56
56
FBC_D57
57
FBC_D58
58
FBC_D59
59
FBC_D60
60
FBC_D61
61
FBC_D62
62
FBC_D63
63
FBC_DQM7
FBC_DQS_RN7
FBC_DQS_WP7
FBC_D16
16
FBC_D17
17
FBC_D18
18
FBC_D19
19
FBC_D20
20
FBC_D21
21
FBC_D22
22
FBC_D23
23
FBC_DQM2
FBC_DQS_RN2
FBC_DQS_WP2
FBC_D48
48
FBC_D49
49
FBC_D50
50
FBC_D51
51
FBC_D52
52
FBC_D53
53
FBC_D54
54
FBC_D55
55
FBC_DQM6
FBC_DQS_RN6
FBC_DQS_WP6
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
T3
R3
T2
R2
N2
M2
M3
L3
N3
P3
P2
F10
C10
B11
B10
C11
F11
E11
G10
E10
D10
D11
M3D
M3D
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M4C
M4C
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
MIRRORED
MIRRORED
FBVDDQ
F1
VDD
M1
VDD
A2
VDD
V2
VDD
A11
VDD
V11
VDD
F12
VDD
M12
VDD
A1
VDDQ
C1
VDDQ
E1
VDDQ
N1
VDDQ
R1
VDDQ
V1
VDDQ
C4
VDDQ
E4
VDDQ
J4
VDDQ
N4
VDDQ
R4
VDDQ
C9
VDDQ
E9
VDDQ
J9
VDDQ
N9
VDDQ
R9
VDDQ
A12
VDDQ
C12
VDDQ
E12
VDDQ
N12
VDDQ
R12
VDDQ
V12
VDDQ
B1
VSSQ
D1
VSSQ
P1
VSSQ
T1
VSSQ
G2
VSSQ
L2
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VREF
VREF
GND
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBVDDQ
R70
R70
511
511
1%
1%
0402
0402
COMMON
COMMON
R68
R68
1.3K
1.3K
1%
1%
0402
0402
COMMON
COMMON
GND
GND
FBC_CMD4FBC_CMD5
FBC_CMD6
FBC_CMD5
FBC_CMD13
FBC_CMD22
FBC_CMD24
FBC_CMD0
FBC_CMD2
13
OUT
C59
C59
.1UF
.1UF
R2
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
R623
121
R623
121
COMMON
COMMON
0402
0402
1%
1%
R621
121R621
121
COMMON0402
COMMON0402
1%
1%
R615
121R615
121
COMMON0402
COMMON0402
1%
1%
R620
121
R620
121
COMMON
COMMON
0402
0402
1%
1%
R646
121R646
121
COMMON0402
COMMON0402
1%
1%
R639
121R639
121
COMMON0402
COMMON0402
1%
1%
R643
121
R643
121
COMMON
0402
COMMON
0402
1%
1%
R650
1211%R650
121
COMMON0402
COMMON0402
1%
VREF = FBVDDQ * R2/(R1 + R2)
DDR3:
VREF = 0.70 * FBVDDQ
1.26V = 1.8V * 1.18K/(511K + 1.18K)
FBVDDQ
R69
R69
511
511
R1R1
1%
1%
0402
0402
COMMON
COMMON
R67
R67
1.3K
1.3K
R2
1%
1%
0402
0402
COMMON
COMMON
GND
FBVDDQ
C58
C58
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
13
OUT
1
2
3
4
5
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
<RevCode>
<RevCode>
<RevCode>
932
932
932
www.vinafix.vn
Page 12
A B C D E F G H
Page10: FBC Partition
1
2
3
Decoupling for FBC 31..0
FBVDDQ
C767
C767
C783
C783
.1UF
.1UF
.1UF
.1UF
16V
16V
16V
16V
10%
10%
10%
10%
X7R
X7R
X7R
X7R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C752
C752
C792
C792
.1UF
.1UF
.1UF
.1UF
16V
16V
16V
16V
10%
10%
10%
10%
X7R
X7R
X7R
X7R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C759
C759
C791
C791
1UF
1UF
1UF
1UF
16V
16V
16V
16V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0603
0603
0603
0603
COMMON
COMMON
COMMON
COMMON
C755
C755
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C757
C757
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C735
C735
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C781
C781
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C788
C788
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C794
C794
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C768
C768
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C741
C741
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
Decoupling for FBC 63..32
FBVDDQ
PLACE NEAR MEMORY FBVDDQ PINSPLACE NEAR MEMORY FBVDDQ PINS
C615
C648
C648
C616
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C674
C674
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C617
C617
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C616
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C620
C620
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C666
C666
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C623
C623
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C619
C619
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C665
C665
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
C626
C626
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C627
C627
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C658
C658
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C615
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C659
C659
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
FBC Partition Decoupling
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
10 32
10 32
10 32
4
5
<RevCode>
<RevCode>
<RevCode>
Page 13
A B C D E F G H
Page11: FBD Partition
M1E
CMD-Addr Map
BGA136 ADDR
CMD1 RAS*
GND
FBD_CMD[6..0]
FBD_CMD[25..8]
FBD_D[63..0]
FBD_DQM[7..0]
FBD_DQS_RN[7..0]
FBD_DQS_WP[7..0]
R1011
R1011
0R
0R
5%
5%
0402
0402
COMMON
COMMON
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD19 A<0>
CMD25 A<1>
CMD22 A<2>
CMD24 A<3>
CMD0 A<4>
CMD2 A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD27 BA2
CMD18 CKE
CMD15 RST
13
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
IN
IN
FBD_CLK0_TERM
R729
R729
40.2
40.2
1%
1%
0402
0402
COMMON
COMMON
DDR3: ZQ = 6x desired output
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
4,13
4,13
4,13
4,13
FBVDDQ
COMMON
COMMON
0
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
R726
R726
0
0
5%
5%
0402
0402
COMMON
COMMON
(OPT)
R727
R727
40.2
40.2
1%
1%
0402
0402
FBD_CMD[6..0]
FBD_CMD[25..8]
BI
BI
BI
BI
1
13
OUT
C864
C864
.01UF
.01UF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
4,13
4,13
the BGA memory on the line AFTER the
2
3
MEMORY pin!!
Minimize the stub length!!
FBD_CMD0
FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD4
FBD_CMD5
FBD_CMD6
FBD_CMD8
FBD_CMD9
FBD_CMD10
FBD_CMD11
FBD_CMD12
FBD_CMD13
FBD_CMD14
FBD_CMD15
FBD_CMD16
FBD_CMD17
FBD_CMD18
FBD_CMD19
FBD_CMD20
FBD_CMD21
FBD_CMD22
FBD_CMD23
FBD_CMD24
FBD_CMD25
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
1
FBD_CMD1 FBD_CMD1
10
FBD_CMD10 FBD_CMD10
11
FBD_CMD11 FBD_CMD11
8
FBD_CMD8 FBD_CMD8
19
FBD_CMD19 FBD_CMD19
25
FBD_CMD25 FBD_CMD25
22
FBD_CMD22
24
FBD_CMD24
0
FBD_CMD0
2
FBD_CMD2
21
FBD_CMD21 FBD_CMD21
16
FBD_CMD16 FBD_CMD16
23
FBD_CMD23 FBD_CMD23
20
FBD_CMD20 FBD_CMD20
17
FBD_CMD17 FBD_CMD17
9
FBD_CMD9 FBD_CMD9
12
FBD_CMD12 FBD_CMD12
3
FBD_CMD3 FBD_CMD3
27
FBD_CMD27 FBD_CMD27
4
IN
4
FBD_CMD27 FBD_CMD27
18
FBD_CMD18 FBD_CMD18 FBD_CMD18
FBD_CLK0
FBD_CLK0*
14
FBD_CMD14 FBD_CMD14
FBD_CMD_SEND0 FBD_CMD_SEND1
15
FBD_CMD15 FBD_CMD15 FBD_CMD15
FBD_ZQ0 FBD_ZQ1
R721
R721
R712
R712
10K
10K
10K
10K
5%
5%
5%
5%
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
GND
GND GND GND
FBVDDQ
4
C19
C19
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
0
1
2
3
FBD_DQM0
FBD_DQM1
FBD_DQM2
FBD_DQM3
FBD_DQM5
FBD_DQM6
FBD_DQM7
FBD_DQS_RN0
FBD_DQS_RN1
FBD_DQS_RN2
FBD_DQS_RN3
FBD_DQS_RN4
FBD_DQS_RN5
FBD_DQS_RN6
FBD_DQS_RN7
FBD_DQS_WP0
FBD_DQS_WP1
FBD_DQS_WP2
FBD_DQS_WP3
FBD_DQS_WP4
FBD_DQS_WP5
FBD_DQS_WP6
FBD_DQS_WP7
4
5
6
7
32
33
34
35
36
37
38
39
M1E
BGA_0136_P080_140X120
R23
R23
240
240
5%
5%
0603
0603
COMMON
COMMON
C28
C28
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
FBD_D0
FBD_D1
FBD_D2
FBD_D3
FBD_D4
FBD_D5
FBD_D6
FBD_D7
FBD_DQM0
FBD_DQS_RN0
FBD_DQS_WP0
FBD_D32
FBD_D33
FBD_D34
FBD_D35
FBD_D36
FBD_D37
FBD_D38
FBD_D39
FBD_DQM4
FBD_DQS_RN4
FBD_DQS_WP4
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
RAS
CAS
WE
CS0
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1
BA2
CKE
CLK
CLK
NC/RFU
A12 (32Mx32)
SEN (GND)
RESET
MF (GND)
ZQ
VDDA (VDD)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
G3
F2
F3
B3
C3
B2
C2
E2
E3
D3
D2
N11
R11
M10
L10
T10
T11
R10
M11
N10
P10
P11
NONMIRRORED
NONMIRRORED
M1A
M1A
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M2E
M2E
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VREF
VREF
FBVDDQ
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
GND
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
GND
G12
L12
FBD_VREF0 FBD_VREF1
H1
FBD_VREF2 FBD_VREF3
H12
VREF = FBVDDQ * R2/(R1 + R2)
VREF = 0.70 * FBVDDQ
DDR3:
1.26V = 1.8V * 1.18K/(511 + 1.18K)
FBD_D8
8
FBD_D9
9
FBD_D10
10
FBD_D11
11
FBD_D12
12
FBD_D13
13
FBD_D14
14
FBD_D15
15
FBD_DQM1
FBD_DQS_RN1
FBD_DQS_WP1
FBD_D40
40
FBD_D41
41
FBD_D42
42
FBD_D43
43
FBD_D44
44
FBD_D45
45
FBD_D46
46
FBD_D47
47
FBD_DQM5
FBD_DQS_RN5
FBD_DQS_WP5
GND
MUST BE PLACED as close as possible toMUST BE PLACED as close as possible to
the BGA memory on the line AFTER the
MEMORY pin!!
Minimize the stub length!!
FBVDDQ
R31
R31
511
511
1%
1%
0402
0402
COMMON
COMMON
R34
R34
1.3K
1.3K
1%
1%
0402
0402
COMMON
COMMON
GND
M1B
M1B
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
F10
DQ0
F11
DQ1
G10
DQ2
C10
DQ3
C11
DQ4
E11
DQ5
B11
DQ6
B10
DQ7
E10
DQM
D10
RDQS
D11
WDQS
M2A
M2A
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
T2
DQ0
T3
DQ1
M2
DQ2
M3
DQ3
L3
DQ4
R2
DQ5
R3
DQ6
N2
DQ7
N3
DQM
P3
RDQS
P2
WDQS
C GE
CMD-Addr Map
BGA136 ADDR
DDR3: ZQ = 6x desired output
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
R1
R2
GND
C18
C18
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD19 A<0>
CMD25 A<1>
CMD4 A<2>
CMD6 A<3>
CMD5 A<4>
CMD13 A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD27 BA2
CMD18 CKE
CMD15 RST
R1012
R1012
0R
0R
5%
5%
0402
0402
COMMON
COMMON
OUT
1
10
11
8
19
25
4
FBD_CMD4
6
FBD_CMD6
5
FBD_CMD5
13
FBD_CMD13
21
16
23
20
17
9
12
3
27
18
FBD_CLK1
FBD_CLK1*
14
FBVDDQ
15
13
IN
R50
R50
240
240
5%
5%
0603
0603
COMMON
COMMON
GND
FBVDDQ
C40
C40
C29
C29
.047UF
.047UF
.047UF
.047UF
16V
16V
16V
16V
10%
10%
10%
10%
X7R
X7R
X7R
X7R
0402
0402
0402
0402
COMMON
COMMON
COMMON
13
COMMON
GND
FBVDDQ
R705
R705
0
0
5%
5%
0402
0402
COMMON
COMMON
IN
IN
(OPT)
FBD_CLK1_TERM
R699
R699
40.2
40.2
1%
1%
0402
0402
COMMON
COMMON
OUT
C27
C27
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
R698
R698
40.2
40.2
1%
1%
0402
0402
COMMON
COMMON
13
FBVDDQ
R21
R21
511
511
1%
1%
0402
0402
COMMON
COMMON
R22
R22
1.3K
1.3K
1%
1%
0402
0402
COMMON
COMMON
OUT
C837
C837
.01UF
.01UF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
4
4
R1
R2
GND
M1D
M1C
M1C
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
FBD_D16
16
FBD_D17
17
FBD_D18
18
FBD_D19
19
FBD_D20
20
FBD_D21
21
FBD_D22
22
FBD_D23
23
FBD_DQM2
FBD_DQS_RN2
FBD_DQS_WP2
FBD_D48
48
FBD_D49
49
FBD_D50
50
FBD_D51
51
FBD_D52
52
FBD_D53
53
FBD_D54
54
FBD_D55
55
FBD_DQM6
FBD_DQS_RN6
FBD_DQS_WP6
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
FBD Partition
R3
R2
T3
T2
N2
L3
M2
M3
N3
P3
P2
C11
F10
F11
C10
B11
G10
E11
B10
E10
D10
D11
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
M2B
M2B
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
FBD_D24
24
FBD_D25
25
FBD_D26
26
FBD_D27
27
FBD_D28
28
FBD_D29
29
FBD_D30
30
FBD_D31
31
FBD_DQM3FBD_DQM4
FBD_DQS_RN3
FBD_DQS_WP3
FBD_D56
56
FBD_D57
57
FBD_D58
58
FBD_D59
59
FBD_D60
60
FBD_D61
61
FBD_D62
62
FBD_D63
63
FBD_DQM7
FBD_DQS_RN7
FBD_DQS_WP7
M1D
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
T10
R10
T11
M10
M11
L10
R11
N11
N10
P10
P11
M2C
M2C
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
C3
F3
G3
C2
B2
F2
E2
B3
E3
D3
D2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
RDQS
WDQS
H10
F9
H4
F4
K9
H11
K10
M9
K4
H2
K3
L4
K2
M4
K11
L9
G9
G4
H3
H9
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
M2D
M2D
BGA_0136_P080_140X120
BGA_0136_P080_140X120
BGA136
BGA136
COMMON
COMMON
RAS
CAS
WE
CS0
A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1
BA2
CKE
CLK
CLK
NC/RFU
A12 (32Mx32)
SEN (GND)
RESET
MF (GND)
ZQ
VDDA (VDD)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
MIRRORED
MIRRORED
FBVDDQ
F1
VDD
M1
VDD
A2
VDD
V2
VDD
A11
VDD
V11
VDD
F12
VDD
M12
VDD
A1
VDDQ
C1
VDDQ
E1
VDDQ
N1
VDDQ
R1
VDDQ
V1
VDDQ
C4
VDDQ
E4
VDDQ
J4
VDDQ
N4
VDDQ
R4
VDDQ
C9
VDDQ
E9
VDDQ
J9
VDDQ
N9
VDDQ
R9
VDDQ
A12
VDDQ
C12
VDDQ
E12
VDDQ
N12
VDDQ
R12
VDDQ
V12
VDDQ
B1
VSSQ
D1
VSSQ
P1
VSSQ
T1
VSSQ
G2
VSSQ
L2
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VREF
VREF
GND
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBVDDQ
R40
R40
511
511
R1
1%
1%
0402
0402
COMMON
COMMON
R36
R36
1.3K
1.3K
R2
1%
1%
0402
0402
COMMON
COMMON
GND
GND
FBD_CMD4
FBD_CMD6
FBD_CMD5
FBD_CMD13
FBD_CMD22
FBD_CMD24
FBD_CMD0
FBD_CMD2
VREF = FBVDDQ * R2/(R1 + R2)
DDR3: VREF = 0.70 * FBVDDQ
1.26V = 1.8V * 1.18K/(511 + 1.18K)
13
OUT
C30
C30
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
R53
R53
511
511
1%
1%
0402
0402
R52
R52
1.3K
1.3K
1%
1%
0402
0402
R700
R700
R709
R710
R710
R711
R711
R724
R724
R723
R725
R725
R728
R728
FBVDDQ
GND
FBVDDQ
121
121
COMMON
COMMON
0402
0402
1%
1%
121R709
121
COMMON0402
COMMON0402
1%
1%
121
121
COMMON
COMMON
0402
0402
1%
1%
121
121
COMMON
COMMON
0402
0402
1%
1%
121
121
COMMON
COMMON
0402
0402
1%
1%
1211%R723
121
COMMON0402
COMMON0402
1%
121
121
COMMON
COMMON
0402
0402
1%
1%
121
121
COMMON
COMMON
0402
0402
1%
1%
R1
R2
C42
C42
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
13
OUT
1
2
3
4
5
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
11 32
11 32
11 32
<RevCode>
<RevCode>
<RevCode>
www.vinafix.vn
Page 14
A B C D E F G H
Page12: FBD Partition Decoupling
1
2
3
Decoupling for FBD 31..0
FBVDDQ
C869
C869
C849
C849
.1UF
.1UF
.1UF
.1UF
16V
16V
16V
16V
10%
10%
10%
10%
X7R
X7R
X7R
X7R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C867
C867
C871
C871
.1UF
.1UF
.1UF
.1UF
16V
16V
16V
16V
10%
10%
10%
10%
X7R
X7R
X7R
X7R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C870
C870
C854
C854
1UF
1UF
1UF
1UF
16V
16V
16V
16V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0603
0603
0603
0603
COMMON
COMMON
COMMON
COMMON
C850
C850
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C866
C866
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C852
C852
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C853
C853
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C863
C863
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C858
C858
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C862
C862
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C859
C859
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
Decoupling for FBD 63..32
FBVDDQ
PLACE NEAR MEMORY FBVDDQ PINSPLACE NEAR MEMORY FBVDDQ PINS
C821
C833
C833
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C838
C838
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C834
C834
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C821
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C836
C836
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C825
C825
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C832
C832
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C839
C839
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C851
C851
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C824
C824
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C845
C845
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
C844
C844
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C842
C842
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C820
C820
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
FBD Partition Decoupling
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
12 32
12 32
12 32
4
5
<RevCode>
<RevCode>
<RevCode>
Page 15
A B C D E F G H
Page13: FB Net Properties
1
NET RULES for FBA and FBB
NV_CRITICAL_NET
NET
FBA_CLK0
3,5
OUT
FBA_CLK0*
3,5
OUT
FBA_CLK0_TERM
5
OUT
FBA_CLK1
3,5
OUT
FBA_CLK1*
3,5
OUT
FBA_CLK1_TERM
5
OUT
FBA_DQS_WP[7..0]
3,5
OUT
FBA_DQS_RN[7..0]
3,5
IN
FBA_DQM[7..0]
3,5
OUT
2
3,5
FBA_D[63..0]
BI
FBB_CLK0
3,7
OUT
FBB_CLK0*
3,7
OUT
FBB_CLK0_TERM
7
OUT
FBB_CLK1
OUT
FBB_CLK1*
OUT
FBB_CLK1_TERM
7,13
OUT
NET
FBB_DQS_WP[7..0]
3,7
OUT
FBB_DQS_RN[7..0]
3,7
IN
FBB_DQM[7..0]
3,7
OUT
3,7
FBB_D[63..0]
BI
1
1
1
1 FBA_CLK1
1 FBA_CLK1
1
NV_CRITICAL_NETNET
1
1
1
1
NV_CRITICAL_NET
1
1
1
1 FBB_CLK1
1
NV_CRITICAL_NET
1
1
1
1
IMPEDANCE
IMPEDANCENET
IMPEDANCE
DIFFPAIRIMPEDANCE DIFFPAIR
FBA_CLK0
80DIFF
FBA_CLK0
80DIFF
40OHM
80DIFF
80DIFF
40OHM
40OHM
40OHM
40OHM
40OHM
DIFFPAIR
FBB_CLK0
80DIFF
FBB_CLK01
80DIFF
40OHM
FBB_CLK1
80DIFF
80DIFF
40OHM
40OHM
40OHM
40OHM
40OHM
NET RULES for FBC and FBD
NET NV_CRITICAL_NET
FBC_CLK0
4,9
OUT
FBC_CLK0*
4,9
OUT
FBC_CLK0_TERM
9
OUT
FBC_CLK1
4,9
OUT
FBC_CLK1*
4,9
OUT
FBC_CLK1_TERM
9
OUT
4,9
OUT
4,9
IN
4,9
OUT
4,9
BI
4,11
OUT
4,11
OUT
11
OUT
3,7,13
OUT
3,7,13
OUT
7,13
OUT
4,11
OUT
4,11
IN
4,11
OUT
4,11
BI
NET
FBC_DQS_WP[7..0]
FBC_DQS_RN[7..0]
FBC_DQM[7..0]
FBC_D[63..0]
NET
FBD_CLK0
FBD_CLK0*
FBD_CLK0_TERM
FBD_CLK1
FBD_CLK1*
FBD_CLK1_TERM
NET
FBD_DQS_WP[7..0]
FBD_DQS_RN[7..0]
FBD_DQM[7..0]
FBD_D[63..0]
NV_CRITICAL_NET
NV_CRITICAL_NET
NV_CRITICAL_NET
IMPEDANCE
1
1
1
80DIFF
80DIFF
40OHM
80DIFF
80DIFF
40OHM
FBC_CLK01
FBC_CLK0
FBC_CLK11
FBC_CLK11
IMPEDANCE
1
1
1
1
1
1
1
1
1
1
40OHM
40OHM
40OHM
40OHM
IMPEDANCE
80DIFF
80DIFF
40OHM
80DIFF
80DIFF
40OHM
DIFFPAIR
FBD_CLK0
FBD_CLK0
FBD_CLK1
FBD_CLK1
IMPEDANCE
1
1
1
1
40OHM
40OHM
40OHM
40OHM
3
NET MIN_LINE_WIDTH NV_NET_MAX_CURRENTVOLTAGE
FB_PLLAVDD0
3
BI
FB_VREF
3
BI
FBA_VREF0
5
BI
FBA_VREF1
5
BI
FBA_VREF2
5
BI
FBA_VREF3
5
BI
FBA_ZQ0
5
BI
FBA_ZQ1
5
BI
FBB_VREF0
7
BI
FBB_VREF1
7
BI
FBB_VREF2
7
BI
FBB_VREF3
7
BI
FBB_ZQ0
7
BI
FBB_ZQ1
7
4
BI
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL 0.02A
12MIL 0.02A
12MIL
1.1V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
0.04A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
NET
FB_PLLAVDD1
4
BI
FBC_VREF0
9
BI
FBC_VREF1
9
BI
FBC_VREF2
9
BI
FBC_VREF3
9
BI
FBC_ZQ0
9
BI
FBC_ZQ1
9
BI
FBD_VREF0
11
BI
FBD_VREF1
11
BI
FBD_VREF2
11
BI
FBD_VREF3
11
BI
FBD_ZQ0
11
BI
FBD_ZQ1
11
BI
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
VOLTAGEMIN_LINE_WIDTH
1.1V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
1.26V
NV_NET_MAX_CURRENT
0.04A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
FB Net Properties
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Tuesday, July 01, 2008
Tuesday, July 01, 2008
Tuesday, July 01, 2008
Sheet of
Sheet of
Sheet of
HFDBA
13 32
13 32
13 32
5
<RevCode>
<RevCode>
<RevCode>
Page 16
A B C D E F G H
Page14: DACA Interface
R10
33
R10
33
COMMON
0402
COMMON
0402
5%
1
2
G1F
AM12
AP10
AP11
G1F
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
6/19 DACA
6/19 DACA
DACA_VDD
DACA_VREF
DACA_RSET
I2CA_SCL
I2CA_SDA
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
I2CA_SCL
AA1
I2CA_SDA
AA4
DACA_HSYNC
AU12
DACA_VSYNC
AT12
DACA_RED
AU10
DACA_GREEN
AU11
DACA_BLUE
AT10
3V3_F
LB507
240R@100MHz
LB507
240R@100MHz
IND_SMD_0402
COMMON
IND_SMD_0402
COMMON
C778
C784
C784
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
3
GND
C778
C776
C776
1UF
1UF
4.7UF
4.7UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0603
0603
COMMON
COMMON
COMMON
COMMON
GND
C737
C737
.1UF
.1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
GND
C800
C800
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
DACA_VDD
DACA_VREF
DACA_RSET
R670
R670
124
124
1%
1%
0402
0402
COMMON
COMMON
4
NET
14,16
14,16
14,16
DACA_RED_C
BI
DACA_GREEN_C
BI
DACA_BLUE_C
BI
1 75OHM
1 75OHM
1 75OHM
NV_NET_MAX_CURRENTVOLTAGEMIN_LINE_WIDTH
5
14,16
14,16
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
DACA_HS_C
BI
DACA_VS_C
BI
2 50OHM
2 50OHM
C GE
5%
PS3_OUTEN11,17,23,26,27
R9
33R9
33
COMMON0402
COMMON0402
5%
5%
R638
R638
150
150
1%
1%
0402
0402
COMMON
COMMON
R632
R632
150
150
1%
1%
0402
0402
COMMON
COMMON
R637
R637
150
150
1%
1%
0402
0402
COMMON
COMMON
5%
5%
COMMON
COMMON
0402
0402
0
0
R543
4
5
10
9
R543
U1201B
U1201B
XSOP16_PI025_049X040
XSOP16_PI025_049X040
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
A4B
3
BE
2
U1201C
U1201C
XSOP16_PI025_049X040
XSOP16_PI025_049X040
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
A7B
6
BE
5%
5%
5
COMMON
COMMON
0402
0402
0
0
R542
R542
SYNC_BUFFER BYPASS
5V
U506B
U506B
DACA_VS_BUF DACA_VS_BUF_R
6
SO14_I335X150
SO14_I335X150
COMMON
COMMON
7 14
SYNC_BUFFER BYPASS
5V
U506C
U506C
DACA_HS_BUF DACA_HS_BUF_R
8
SO14_I335X150
SO14_I335X150
COMMON
7 14
COMMON
PLACE NEAR SYNC BUFFER
5V
C884
C884
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
3V3_F
D521
D521
SOT23
SOT23
3
70V
70V
?
?
COMMON
COMMON
1 2
DACA RGB-FILTER
I2CA_SCL_R 27
I2CA_SCL_R
I2CA_SDA_R 27
I2CA_SDA_R
R732
33
R732
33
COMMON
0402
COMMON
0402
5%
5%
(OPT)
R733
33
R733
33
COMMON
0402
COMMON
0402
5%
5%
R745
335%R745
33
COMMON0402
COMMON0402
5%
(OPT)
R746
33
R746
33
COMMON
0402
COMMON
0402
5%
5%
C879
C879
18PF
18PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
COMMON
COMMON
R741
R741
150
150
1%
1%
0402
0402
5V
D5
D5
SOT23
SOT23
3
100V
100V
?
?
COMMON
COMMON
1 2
5V
D6
D6
SOT23
SOT23
3
100V
100V
?
?
COMMON
COMMON
1 2
L508 68nH
L508 68nH
IND_SMD_0603COMMON
IND_SMD_0603COMMON
I2CA_SDA_R
5V
I2CA_SCL_R
GND
L509 68nH
L509 68nH
IND_SMD_0603COMMON
IND_SMD_0603COMMON
C880
R742
D522
D522
SOT23
SOT23
70V
70V
?
?
COMMON
COMMON
COMMON
COMMON
R742
150
150
1%
1%
0402
0402
3V3_F
3
1 2
C880
18PF
18PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
GND
L507 68nH
L507 68nH
IND_SMD_0603COMMON
IND_SMD_0603COMMON
C878
R740
D520
D520
SOT23
SOT23
70V
70V
?
?
COMMON
COMMON
COMMON
COMMON
R740
150
150
1%
1%
0402
0402
3V3_F
3
1 2
C878
18PF
18PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
GND
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
DACA Interface
L3
IND_SMD_0402L3COMMON
IND_SMD_0402
OR
L4
IND_SMD_0402L4COMMON
IND_SMD_0402
OR
DACA_RED_C
C893
C893
4.7PF
4.7PF
50V
50V
+/-0.25PF
+/-0.25PF
COG
COG
0402
0402
COMMON
COMMON
DACA_GREEN_C
C894
C894
4.7PF
4.7PF
50V
50V
+/-0.25PF
+/-0.25PF
COG
COG
0402
0402
COMMON
COMMON
C892
C892
4.7PF
4.7PF
50V
50V
+/-0.25PF
+/-0.25PF
COG
COG
0402
0402
COMMON
COMMON
R4
R4
2.2K
2.2K
5%
5%
0402
0402
COMMON
COMMON
R3
R3
2.2K
2.2K
5%
5%
0402
0402
COMMON
COMMON
27nH
27nH
COMMON
27nH
27nH
COMMON
DACA_BLUE_C
C10
C10
15PF
15PF
50V
50V
5%
5%
C0G
C0G
0603
0603
COMMON
COMMON
LB4
27nHLB4
27nH
COMMONIND_SMD_0402
COMMONIND_SMD_0402
LB3
27nHLB3
27nH
COMMONIND_SMD_0402
COMMONIND_SMD_0402
C9
C9
15PF
15PF
50V
50V
(OPT)
5%
5%
C0G
C0G
0603
0603
COMMON
COMMON
C5
C5
22PF
22PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
C4
C4
22PF
22PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
OUT
OUT
OUT
OUT
14,14,16
14,14,16
14,16
1
14,16
2
(OPT)
3
SOUTH
14,16
OUT
14,16
OUT
14,16
OUT
4
5
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
14 32
14 32
14 32
<RevCode>
<RevCode>
<RevCode>
www.vinafix.vn
Page 17
A B C D E F G H
Page15: DACC Interface
R8
33
R8
33
I2CB_SCL_QS
COMMON
COMMON
0402
0402
5%
5%
1
PS3_OUTEN10,17,23,26,27
PS3_OUTEN
R7 33
R7 33
I2CB_SDA_QS
0402 COMMON
0402 COMMON
5%
5%
DDC isolation from GPU to Micro-Controller
when in Hybrid Power mode
2
G1G
3V3_F
LB506
240R@100MHzLB506
240R@100MHz R744
COMMONIND_SMD_0402
COMMONIND_SMD_0402
C787
C787
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
3
C777
C777
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
C742
C742
.1UF
.1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
GND
C769
C769
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C774
C774
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
DACC_VDD
DACC_VREF
DACC_RSET
R647
R647
124
124
1%
1%
0402
0402
COMMON
COMMON
4
NET NV_CRITICAL_NET
14,16
14,16
14,16
5
14,16
14,16
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
DACC_RED_C
BI
DACC_GREEN_C
BI
DACC_BLUE_C
BI
DACC_HS_C
BI
DACC_VS_C
BI
1 75OHM
1 75OHM
2 50OHM
2 50OHM
G1G
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
8/19 DACC
8/19 DACC
AM11
DACC_VDD
AW8
DACC_VREF
AV7
DACC_RSET
IMPEDANCE MIN_LINE_WIDTH
75OHM1
I2CB_SCL
I2CB_SDA
DACC_HSYNC
DACC_VSYNC
DACC_RED
DACC_GREEN
DACC_BLUE
I2CB_SDA
AA2
DACC_HSYNC
AU7
DACC_VSYNC
AU8
DACC_RED
AT6
DACC_GREEN
AT7
DACC_BLUE
AT8
R649
R649
150
150
1%
1%
0402
0402
COMMON
COMMON
R645
R645
150
150
1%
1%
0402
0402
COMMON
COMMON
I2CB_SCL
AA3
C GE
R652
R652
150
150
1%
1%
0402
0402
COMMON
COMMON
DACC_GREEN
11
12
14
15
5%
5%
COMMON
COMMON
0402
0402
0
0
R551
R551
U1201D
U1201D
XSOP16_PI025_049X040
XSOP16_PI025_049X040
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
A10B
BE
U1201E
U1201E
XSOP16_PI025_049X040
XSOP16_PI025_049X040
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
A13B
BE
5%
5%
COMMON
COMMON
0402
0402
0
0
R544
R544
5V
1
2
7 14
5V
13
12
7 14
U506A
U506A
3
SO14_I335X150
SO14_I335X150
COMMON
COMMON
U506D
U506D
11
SO14_I335X150
SO14_I335X150
COMMON
COMMON
DACC_VS_BUF
DACC_HS_BUF
I2CB_SCL_R 27
I2CB_SCL_R
I2CB_SDA_R 27
I2CB_SDA_R
SYNC_BUFFER BYPASS
R730
R730
0402
0402
5%
5%
(OPT)
R731
R731
0402
0402
5%
5%
SYNC_BUFFER BYPASS
R7435%33
R7435%33
0402 COMMON
0402 COMMON
R744
0402
0402
(OPT)
I2CB_SDA_R
R2
R2
2.2K
2.2K
5V
5%
5%
0402
0402
COMMON
COMMON
R1
R1
2.2K
2.2K
5%
5%
0402
0402
COMMON
COMMON
I2CB_SCL_R
33
33
COMMON
COMMON
DACC_VS_BUF_R
33
33
COMMON
COMMON
33
33
COMMON
COMMON
5%
5%
DACC_HS_BUF_R
5V
D2
D2
SOT23
SOT23
3
100V
100V
?
?
COMMON
COMMON
1 2
5V
D3
D3
SOT23
SOT23
3
100V
100V
?
?
COMMON
COMMON
1 2
DACC RGB-FILTER
L505 68nH
L505 68nH
C876
R738
D518
D518
SOT23
SOT23
70V
70V
?
?
COMMON
COMMON
COMMON
COMMON
R738
150
150
1%
1%
0402
0402
3V3_F
3
1 2
C876
18PF
18PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
GND
L506 68nH
L506 68nH
IND_SMD_0603COMMON
R739
D519
D519
SOT23
SOT23
70V
70V
?
?
COMMON
COMMON
COMMON
COMMON
R739
150
150
1%
1%
0402
0402
3V3_F
3
1 2
C877
C877
18PF
18PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
IND_SMD_0603COMMON
GND
L504
L504
IND_SMD_0603
IND_SMD_0603
C875
R737
D517
D517
SOT23
SOT23
70V
70V
?
?
COMMON
COMMON
COMMON
COMMON
R737
150
150
1%
1%
0402
0402
3V3_F
3
1 2
C875
18PF
18PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
GND
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
DACC Interface
COMMONIND_SMD_0603
COMMONIND_SMD_0603
COMMON
COMMON
DACC_RED_C
C889
C889
4.7PF
4.7PF
50V
50V
+/-0.25PF
+/-0.25PF
COG
COG
0402
0402
COMMON
COMMON
DACC_GREEN_C
C890
C890
4.7PF
4.7PF
50V
50V
+/-0.25PF
+/-0.25PF
COG
COG
0402
0402
COMMON
COMMON
68nH
68nH
DACC_BLUE_C
C888
C888
4.7PF
4.7PF
50V
50V
+/-0.25PF
+/-0.25PF
COG
COG
0402
0402
COMMON
COMMON
LB2
LB2
LB1
LB1
L1
L2
IND_SMD_0402
IND_SMD_0402
IND_SMD_0402
IND_SMD_0402
IND_SMD_0402
OR
IND_SMD_0402
OR
COMMON
COMMON
COMMON
COMMON
COMMONL1IND_SMD_0402
COMMON
COMMONL2IND_SMD_0402
COMMON
27nH
C2
C2
22PF
22PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
14,16
OUT
27nH
27nH
C1
C1
22PF
22PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
14,14,16
OUT
27nH
27nH
C7
C7
15PF
15PF
50V
50V
(OPT)
5%
5%
C0G
C0G
0603
0603
COMMON
COMMON
I2CB_SDA_C
1
I2CB_SCL_C
DACC_VS_C
14,16
OUT
27nH
2
27nH
C8
C8
15PF
15PF
50V
50V
(OPT)
5%
5%
C0G
C0G
0603
0603
COMMON
COMMON
DDC_5V
14,16
OUT
14,16
OUT
14,16
OUT
16
6
1
7
2
8
3
9
4
10
5
17
SHIELD
GND-R
R
GND-G
G
GND_B
B
5V
ID2
GND
GND
SHIELD
DACC_HS_C
MIDDLE
J1
J1
CON_DSUB_015_TH_RA_F_HD_L068_B
CON_DSUB_015_TH_RA_F_HD_L068_B
COMMON
COMMON
1611
1611
15105
15105
HSYNC
VSYNC
3
ID0
11
SDA
I2CB_SDA_C
12
DACC_HS_C
13
DACC_VS_C
14
SCL
I2CB_SCL_C
15
14,14,16
OUT
27nH
4
5
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
15 32
15 32
15 32
<RevCode>
<RevCode>
<RevCode>
www.vinafix.vn
Page 18
A B C D E F G H
Page16: IFP A/B Interface -- DVI Connector South
1
2
IFP_PLLVDD
LB511
120R@100MHzLB511
120R@100MHz
COMMONIND_SMD_0402
COMMONIND_SMD_0402
C807
120R@100MHzLB508
120R@100MHz
COMMONIND_SMD_0402
COMMONIND_SMD_0402
C807
C805
C805
C743
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C743
.1UF
.1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
C786
C786
C772
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C772
.1UF
.1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C790
C790
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
C806
C806
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
IFP_IOVDD
3
C801
C801
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
LB508
GND
R669
R669
1K
1K
1%
1%
0402
0402
COMMON
COMMON
IFPAB_RSET
IFPAB_PLLVDD
IFPAB_IOVDD
AR10
AK11
AP8
AP9
G1H
G1H
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
9/19 IFPAB
9/19 IFPAB
IFPAB_RSET
IFPAB_PLLVDD
IFPA_IOVDD
IFPB_IOVDD
IFPA_TXC
IFPA_TXC
IFPA_TXD0
IFPA_TXD0
IFPA_TXD1
IFPA_TXD1
IFPA_TXD2
IFPA_TXD2
IFPA_TXD3
IFPA_TXD3
IFPB_TXC
IFPB_TXC
1 100DIFF
IFPB_TXD4
IFPB_TXD4
IFPB_TXD5
IFPB_TXD5
IFPB_TXD6
IFPB_TXD6
IFPB_TXD7
IFPB_TXD7
R798
0R798
0
No Stuff
0402
No Stuff
X_90ohm_0603
X_90ohm_0603
COMMON
COMMON
R764
0R764
0
No Stuff
0402
No Stuff
0402
?
COMMON
COMMON
?
R814
R814
300
300
L23
L23
0402
0402
COMMON
COMMON
5%
5%
4 3
1 2
R766
0R766
0
No Stuff
0402
No Stuff
0402
?
?
X_90ohm_0603
X_90ohm_0603
COMMON
COMMON
R796
0402
0402
?
?
R813
R813
L24
L24
300
300
0402
0402
COMMON
COMMON
5%
5%
1 2
R797
0402
0402
?
?
R734
0R734
0
No Stuff
0402
No Stuff
0402
?
?
R816
R816
L21
L21
300
300
0402
0402
COMMON
COMMON
5%
5%
4 3
1 2
R735
0R735
0
No Stuff
0402
No Stuff
0402
?
?
X_90ohm_0603
X_90ohm_0603
COMMON
COMMON
X_90ohm_0603
X_90ohm_0603
R736
0R736
0
No Stuff
0402
No Stuff
0402
?
?
R815
R815
L22
L22
300
300
0402
0402
COMMON
COMMON
5%
5%
4 3
1 2
R762
0R762
0
No Stuff
0402
No Stuff
0402
?
?
X_90ohm_0603
X_90ohm_0603
0R796
0
No Stuff
No Stuff
4 3
0R797
0
No Stuff
No Stuff
COMMON
COMMON
0402
?
?
R812
R812
L25
L25
300
300
0402
0402
COMMON
COMMON
5%
5%
4 3
1 2
R799
0R799
0
No Stuff
0402
No Stuff
0402
?
?
1
DDC_5V
C891
C891
4700PF
4700PF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
100DIFF
IFPAB_TXC*
AT9
IFPAB_TXC
AR9
IFPAB_TXD0*
AY6
IFPAB_TXD0
AW7
IFPAB_TXD1*
AY7
IFPAB_TXD1
AY8
IFPAB_TXD2*
AW9
IFPAB_TXD2
AY9
AV9
AU9
BA10
BB10
IFPAB_TXD4*
BA4
100DIFF
IFPAB_TXD4
AY5
IFPAB_TXD5*
BB6
IFPAB_TXD5
BA6
IFPAB_TXD6*
BB7
IFPAB_TXD6
BA7
BA9
BB9
IFPAB_TXC
100DIFF
IFPAB_TXC
IFPAB_TXD0
IFPAB_TXD0
IFPAB_TXD1
1 100DIFF
IFPAB_TXD1
1
IFPAB_TXD4
IFPAB_TXD4
IFPAB_TXD5
IFPAB_TXD5
IFPAB_TXD6
IFPAB_TXD6
1
1
100DIFF
1
1 100DIFF
1
1
X_90ohm_0603
X_90ohm_0603
COMMON
COMMON
1 100DIFF
100DIFF1
14
IN
14
IN
100DIFF1
100DIFF
100DIFF
R800
0R800
0
No Stuff
0402
No Stuff
0402
?
?
R818
R818
L26
L26
300
300
0402
0402
COMMON
COMMON
5%
5%
4 3
1 2
R801
0R801
0
No Stuff
0402
No Stuff
0402
?
?
X_90ohm_0603
X_90ohm_0603
COMMON
COMMON
R802
0R802
0
No Stuff
0402
No Stuff
0402
?
?
R817
R817
L27
L27
300
300
0402
0402
COMMON
COMMON
5%
5%
4 3
1 2
R803
0R803
0
No Stuff
0402
No Stuff
0402
?
?
IFPAB_TXD0*_R
IFPAB_TXD0_R
IFPAB_TXD1*_R
IFPAB_TXD1_R
IFPAB_TXD2*_R
IFPAB_TXD2_R
IFPAB_TXD4*_R
IFPAB_TXD4_R
IFPAB_TXD5*_R
IFPAB_TXD5_R
I2CA_SCL_C
I2CA_SDA_C
IFPAB_TXC*_R
IFPAB_TXC_R
14,14
IN
14,14
IN
14,14
IN
14,14
IN
14,14
IN
IFPAB_TXD6*_R
IFPAB_TXD6_R
COMMON
GND
DACA_VS_C
GPIO0_DVI_A_HPD_C
DACA_RED_C
DACA_GREEN_C
DACA_BLUE_C
DACA_HS_C
SHIELD1
25
SHIELD2
26
SHIELD3
27
SHIELD4
28
TX0-
17
TX0+
18
TX1-
9
TX1+
10
TX2-
1
TX2+
2
SHLD24
3
SHLD13
11
SHLD05
19
TX3-
12
TX3+
13
TX4-
4
TX4+
5
TX5-
20
TX5+
21
DDCC
6
DDCD
7
VDDC
14
GND
15
SHLDC
22
TXC-
24
TXC+
23
VSYNC
8
HPD
16
R
C1
G
C2
B
C3
AGND1
C5
AGND2
C5A
HSYNC
C4
SHIELD5
29
SHIELD6
30
SHIELD7
31
SHIELD8
32
17 9
17 9
24
24
C3
C3
C5
C5
C4
C4
16 8
16 8
1
1
C1
C1
C5A
C5A
C2
C2
J5
J5
DVI_I_(SLIM_)SHLD_M
DVI_I_(SLIM_)SHLD_M
MULTI_CON_DVII_030_TH_RA_ST_F_S
MULTI_CON_DVII_030_TH_RA_ST_F_S
COMMON
COMMON
GND
2
3
4
DVIAB Hotplug Detection
GPIO0_DVI_A_HPD
21
OUT
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
GPIO0_DVI_A_HPD_R
R6
1KR6
1K
COMMON0402
COMMON0402
5%
3V3_F
5%
5%
3
COMMON
COMMON
R12
R12
10K
10K
0402
0402
GND
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
IFP A/B Interface -- DVI Connector South
5%
3V3_F
C11
GND
C11
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0603
0603
COMMON
COMMON
27
HYBRID_HPLG_DET_C_Q
D4
D4
SOT23
SOT23
100V
100V
?
?
COMMON
COMMON
1 2
R18
R18
10K
10K
?
?
0402
0402
COMMON
COMMON
LB6
COMMONIND_SMD_0603
COMMONIND_SMD_0603
180R@100MHzLB6
180R@100MHz
4
C6
C6
220PF
220PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
GND
5
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
16 32
16 32
16 32
<RevCode>
<RevCode>
<RevCode>
Page 19
A B C D E F G H
Page17: IFP C/D Interface -- DVI Connector MID
LB509
LB504
LB504
IND_SMD_0402
IND_SMD_0402
COMMONIND_SMD_0402
COMMONIND_SMD_0402
COMMON
COMMON
3V3_F
R768
R768
2.2K
2.2K
5%
5%
0402
0402
COMMON
COMMON
GND
120R@100MHzLB509
120R@100MHz
GND
120R@100MHz
120R@100MHz
GND
C796
C796
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
R769
R769
2.2K
2.2K
5%
5%
0402
0402
COMMON
COMMON
1G1D1S
1G1D1S
C710
C710
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
IFP_TERM_PD
3
D
Q11
Q11
SOT23
SOT23
G
1
COMMON
COMMON
S
2
GND
C789
C789
C762
C762
1UF
1UF
.1UF
.1UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C720
C720
C763
C763
.1UF
.1UF
1UF
1UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
1
GPIO10_TMDS_TERM
10
IN
2
3
IFP_PLLVDD
C799
GND
PEX_VDD
C799
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C725
C725
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
4
GND
5
R127
R127
0402
0402
R126
R126
0402
0402
R1251%499
R1251%499
R124
R124
0402
0402
R123
R123
0402
0402
R1221%499
R1221%499
R121
R120
R120
0402
0402
IFPCD_RSET
IFPCD_PLLVDD
R656
R656
1K
1K
1%
1%
0402
0402
COMMON
COMMON
IFPCD_IOVDD
DDC_5V
C895
C895
4700PF
4700PF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
R17
R17
10K
10K
?
?
0402
0402
COMMON
COMMON
GPIO1_DVI_A_HI_C
I2CD_SDA_C
I2CD_SCL_C
SNN_HDMI_RESERV
HDMI_CEC
DDC_5V
I2CD_SDA_C
10
IN
I2CD_SCL_C
10
IN
SNN_HDMI_RESERV
LB5
180R@100MHz
LB5
180R@100MHz
COMMON
IND_SMD_0603
COMMON
IND_SMD_0603
I2CS_ENABLE
10
IN
499
499
COMMON
COMMON
1%
1%
499
499
COMMON
COMMON
1%
1%
COMMON0402
COMMON0402
499
499
COMMON
COMMON
1%
1%
499
499
COMMON
COMMON
1%
1%
COMMON0402
COMMON0402
499R121
499
COMMON0402
COMMON0402
1%
1%
499
499
COMMON
COMMON
1%
1%
CTXC
CTXD0
CTXD1
CTXD2
AN5
AJ11
AN8
AN9
CTXC*
CTXD0*
CTXD1*
CTXD2*
G1I
G1I
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
10/19 IFPCD
10/19 IFPCD
IFPCD_RSET
IFPCD_PLLVDD
IFPC_IOVDD
IFPD_IOVDD
IFPC
IFPC
IFPD
IFPD
DPL3_TXC
DPL3_TXC
DPL2_TXD0
DPL2_TXD0
DPL1_TXD1
DPL1_TXD1
DPL0_TXD2
DPL0_TXD2
DPL3_TXC
DPL3_TXC
DPL2_TXD0
DPL2_TXD0
DPL1_TXD1
DPL1_TXD1
DPL0_TXD2
DPL0_TXD2
AV6
AU6
AV3
AU4
AW3
AV4
AY4
AW4
AW5
AW6
AT5
AU5
AW2
AW1
AY1
AY2
AY3
BA3
BB3
BB4
BI
SNN_CAUX*
SNN_CAUX
IFPCD_TXC*
IFPCD_TXC
IFPCD_TXD0*
IFPCD_TXD0
IFPCD_TXD1*
IFPCD_TXD1
IFPCD_TXD2*
IFPCD_TXD2
SNN_DAUX*
SNN_DAUX
SNN_IFPD_L3*
SNN_IFPD_L3
SNN_IFPD_L0*
SNN_IFPD_L0
SNN_IFPD_L1*
SNN_IFPD_L1
SNN_IFPD_L2*
SNN_IFPD_L2
GPIO17_HDMI_CEC
IFPC_L3
IFPC_L3
IFPC_L0
IFPC_L0
IFPC_L1
IFPC_L1
IFPC_L2
IFPC_L2
16
AUX
AUX
AUX
AUX
IFPCD_TXC*
IFPCD_TXC
IFPCD_TXD0*
IFPCD_TXD0
IFPCD_TXD1*
IFPCD_TXD1
IFPCD_TXD2*
IFPCD_TXD2
1
3V3_F
R772
R772
27K
27K
5%
5%
0402
0402
COMMON
COMMON
R774
33
R774
33
0402
0402
COMMON
COMMON
5%
5%
D12
D12
INS34074975
INS34074975
SOT23
SOT23
3
100V
100V
100MA
100MA
COMMON
COMMON
1 2
GND
C843 .1UF
C843 .1UF
C904 .1UF
C904 .1UF
16VCOMMON
16VCOMMON
COMMON 16V
COMMON 16V
C829 .1UF
C829 .1UF
C835 .1UF
C835 .1UF
16VCOMMON
16VCOMMON
COMMON 16V
COMMON 16V
C828
.1UF
C828
.1UF
C831
16V
COMMON
16V
COMMON
C827
.1UFC827
.1UF
C830 .1UF
C830 .1UF
COMMON 16V
COMMON 16V
HDMI_CEC_R
0.36W@25C
0.36W@25C
.1UFC831
.1UF
16VCOMMON
16VCOMMON
16VCOMMON
16VCOMMON
SOT23_1G1D1S
SOT23_1G1D1S
+/-20V
0.88A
0.22A@31C
+/-20V
0.88A
0.22A@31C
COMMON
COMMON
3.5R
3.5R
CTXC*
CTXC
CTXD0*
CTXD0
CTXD1*
CTXD1
CTXD2*
CTXD2
50V
50V
1G1D1S
1G1D1S
G
1
2S3
INS34075050
INS34075050
Q517
Q517
D
X_90ohm_0603
X_90ohm_0603
HDMI_CEC_L
29
COMMON
COMMON
600R@100MHZ
600R@100MHZ
LB519
LB519
BEAD_0603 COMMON
BEAD_0603 COMMON
HDMI_CEC
R804
0402
0402
R775
R775
300
300
0402
0402
COMMON
COMMON
L28
L28
5%
5%
R805
0402
0402
IFPC_TXC*
IFPC_TXC
IFPC_TXD0*
IFPC_TXD0
IFPC_TXD1*
IFPC_TXD1
IFPC_TXD2*
IFPC_TXD2
HDMI_CEC
R808
0R808
0R804
0
No Stuff
No Stuff
?
?
12
0R805
0
No Stuff
No Stuff
?
?
43
X_90ohm_0603
X_90ohm_0603
COMMON
COMMON
R806
0R806
0
No Stuff
0402
No Stuff
0402
?
?
R770
R770
L29
L29
300
300
0402
0402
COMMON
COMMON
5%
5%
R807
COMMON
COMMON
X_90ohm_0603
X_90ohm_0603
4 3
1 2
0R807
0
No Stuff
0402
No Stuff
0402
?
?
0
No Stuff
0402
No Stuff
0402
?
?
12
R771
R771
300
300
0402
0402
COMMON
COMMON
L30
L30
5%
5%
R809
0R809
0
No Stuff
0402
No Stuff
0402
?
?
43
X_90ohm_0603
X_90ohm_0603
COMMON
COMMON
R810
R773
R773
L31
L31
300
300
0402
0402
COMMON
COMMON
5%
5%
R811
IFPC_TXC*
IFPC_TXC
IFPC_TXD0*
IFPC_TXD0
IFPC_TXD1*
IFPC_TXD1
IFPC_TXD2*
IFPC_TXD2
0R810
0
No Stuff
0402
No Stuff
0402
?
?
4 3
1 2
0R811
0
No Stuff
0402
No Stuff
0402
?
?
Hotplug Detection
R5
1K
R5
GPIO1_DVI_C_HPD GPIO1_DVI_C_HPD_R
16
OUT
100DIFF1
100DIFF1
100DIFF1
100DIFF1
100DIFF1
100DIFF
100DIFF1
100DIFF1
3V3_F
C16
C16
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
R11
R11
10K
10K
5%
5%
0402
0402
COMMON
COMMON
GND
1K
COMMON
COMMON
0402
0402
5%
5%
3V3_F
3V3_F
C12
D1
D1
SOT23
SOT23
3
100V
100V
?
?
COMMON
COMMON
1 2
GND
C12
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0603
0603
COMMON
COMMON
GND
HYBRID_HPLG_DET_D_Q 27
GND
GPIO1_DVI_A_HI_C
GND
C3
C3
220PF
220PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
GND
MIDDLE
HP DET
HP DET
19
+5V
+5V
18
GND
GND
17
DDC DATA
DDC DATA
16
DDC CLK
DDC CLK
15
NC
NC
14
CE Remote
CE Remote
13
CK-
CK-
12
CK Shield
CK Shield
11
CK+
CK+
10
D0-
D0-
9
D0 Shield
D0 Shield
8
D0+
D0+
7
D1-
D1-
6
D1 Shield
D1 Shield
5
D1+
D1+
4
D2-
D2-
3
D2 Shield
D2 Shield
2
D2+
D2+
1
STARTAKE_19P-4
STARTAKE_19P-4
J16
J16
19
HP DET
18
+5V
17
GND
16
DDC DATA
15
DDC CLK
14
NC
13
CE Remote
12
CK-
11
CK Shield
10
CK+
9
D0-
8
D0 Shield
7
D0+
6
D1-
5
D1 Shield
4
D1+
3
D2-
2
D2 Shield
1
D2+
STARTAKE_19P-1
STARTAKE_19P-1
J17
J17
SHELL2
SHELL2
SHELL1
SHELL1
MIDDLE
SHELL2
GND
MEC1
GND
SHELL1
GPIO1_DVI_A_HI_C
21
MEC1
20
21
23
MEC1
22
20
1
2
3
4
5
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
PAGE DETAIL
www.vinafix.vn
IFP C/D Interface -- DVI Connector MID
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
17 32
17 32
17 32
<RevCode>
<RevCode>
<RevCode>
Page 20
A B C D E F G H
Page18: IFP E/F Interface -- Unused
TMDS E : Display Port
1
2
G1J
G1J
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
11/19 IFPEF
11/19 IFPEF
AM9
IFPEF_RSET
AH11
AN6
AN7
IFPEF_PLLVDD
IFPE_IOVDD
IFPF_IOVDD
3
GND
4
IFPE
IFPE
IFPF
IFPF
DPL3_TXC
DPL3_TXC
DPL2_TXD0
DPL2_TXD0
DPL1_TXD1
DPL1_TXD1
DPL0_TXD2
DPL0_TXD2
DPL3_TXC
DPL3_TXC
DPL2_TXD0
DPL2_TXD0
DPL1_TXD1
DPL1_TXD1
DPL0_TXD2
DPL0_TXD2
AR7
AUX
AR6
AUX
AP7
AP6
AP5
AP4
AP3
AR3
AU3
AT3
AT4
AUX
AR4
AUX
AN2
AN1
AP1
AP2
AT2
AT1
AU1
AU2
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
IFP E/F Interface -- Unused
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
18 32
18 32
18 32
5
<RevCode>
<RevCode>
<RevCode>
Page 21
A B C D E F G H
Page19: DACB and HDTV/SDTV-Out
3V3_F
1
2
3
4
LB510
LB510
COMMON
IND_SMD_0402
COMMON
IND_SMD_0402
C798
C798
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND GNDGND
FILTER CIRCUIT
from codec
240R@100MHz
240R@100MHz
C745
C745
.1UF
.1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
HDTV/SDTV
82pF/330pF
C797
C797
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C760
C760
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
8.2pF/22pf
0.56uH/1.8uH
Add Scart TV connector
DACB_VDD
DACB_VREF
DACB_RSET
C802
C802
.1UF
.1UF
R667
R667
124
124
10V
10V
10%
10%
1%
1%
X5R
X5R
0402
0402
COMMON
COMMON
0402
0402
COMMON
COMMON
to DIN connector
82pF/270pF
SCART_VCC
5V
AC
D16
D16
1N5817
1N5817
<Cfgdft>
<Cfgdft>
COMMON
COMMON
C907
C907
4.7UF
4.7UF
?
?
?
?
?
?
0805
0805
COMMON
COMMON
GND GND
AL11
AN3
AL3
G1K
G1K
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
7/19 DACB(TV)
7/19 DACB(TV)
DACB_VDD
DACB_VREF
DACB_RSET
<Cfgdft>
<Cfgdft>
D17
D17
1N5817
1N5817
U509
U509
ADJ_VR=1.25V
ADJ_VR=1.25V
SOT_223
SOT_223
COMMON
COMMON
GND/ADJ
NV_CRITICAL_NETNETNET IMPEDANCE
R790
0
R790
0
TV_PR_RED
COMMON
0402
COMMON
0402
5%
5%
<MUXDEMUXQSOP16>
<MUXDEMUXQSOP16>
U1205E
U1205E
INS34823987
INS34823987
XSOP16_SECT
AK2
19
19
GPIO_16_SEL_HDTV_SDTV
IN
GPIO20_TV_LOAD_TEST
OUT
Place near the connector
DACB_CSYNC
DACB_GREEN
1V 5MIL
DACB_RED
DACB_BLUE
DACB_RED
AK1
DACB_GREEN
AL1
DACB_BLUE
AL2
R663
R663
150
150
1%
1%
0402
0402
COMMON
COMMON
GND
3V3_F
R787
R787
10K
10K
5%
5%
0402
0402
COMMON
COMMON
R788
R788
10K
10K
5%
5%
0402
0402
COMMON
COMMON
3V3_F
R791
R791
100K
100K
5%
5%
0402
0402
COMMON
COMMON
R662
R662
150
150
1%
1%
0402
0402
COMMON
COMMON
R661
R661
150
150
1%
1%
0402
0402
COMMON
COMMON
1
15
4
3V3_F
3
1 2
GND
<MUXDEMUXQSOP16>
<MUXDEMUXQSOP16>
U1205A
U1205A
XSOP16_SECT
XSOP16_SECT
INS34823908
INS34823908
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
SEL
EN
<MUXDEMUXQSOP16>
<MUXDEMUXQSOP16>
U1205B
U1205B
INS34824295
INS34824295
XSOP16_SECT
XSOP16_SECT
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
Y
D515
D515
SOT23
SOT23
70V
70V
?
?
COMMON
COMMON
VCC
GND
3V3_F
3
GND
16
8
GND
GPIO10_TV_LOAD_TEST_CVBS
I0
2
GPIO10_TV_LOAD_TEST_RED
I1
3
1 2
1V 5MIL
D516
D516
SOT23
SOT23
70V
70V
COMMON
COMMON
3V3_F
3
?
?
5V
GND
LB524
LB524
600R@100MHZ
600R@100MHZ
COMMON
COMMON
BEAD_0603
BEAD_0603
C909
C909
.01UF
.01UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
5MIL1V
D514
D514
SOT23
SOT23
70V
70V
?
?
COMMON
COMMON
GND GND GND
1 2
TV_SW_VDD
R793
R793
0402 COMMON
0402 COMMON
R792
R792
0402 COMMON
0402 COMMON
R765
R765
150
150
1%
1%
0402
0402
COMMON
COMMON
C910
C910
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
5%
5%
5%
5%
R794
R794
R786
R786
150
150
150
150
1%
1%
1%
1%
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
10K
10K
10K
10K
SCART
COMMON
COMMON
AC
Scart_VCC
2
OUT3IN
4
TAB
1
Rtop
R781
R781
140
140
?
?
0402
0402
COMMON
COMMON
12
R784
R784
180
180
1%
1%
R0603MS
R0603MS
COMMON
COMMON
Rbot
GND GND
2.8
C928
C928
.1UF
C905
C906
C906
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
C0805MS
C0805MS
COMMON
COMMON
12
C905
100UF
100UF
COMMON
COMMON
20%
20%
16V
16V
ALE
ALE
C_P2_21_D5_H11
C_P2_21_D5_H11
12
.1UF
0402
0402
COMMON
COMMON
XSOP16_SECT
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
I0
14
Y
12
I1
13
R780
0
R780
0
COMMON0402
COMMON0402
5%
5%
R785
0
R785
0
COMMON
0402
COMMON
0402
5%
5%
<MUXDEMUXQSOP16>
<MUXDEMUXQSOP16>
U1205D
U1205D
INS34824060
INS34824060
XSOP16_SECT
XSOP16_SECT
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
I0
11
Y
9
I1
10
R783
0
R783
0
0402 COMMON
0402 COMMON
5%
5%
R789
0
R789
0
COMMON
0402
COMMON
0402
5%
5%
<MUXDEMUXQSOP16>
<MUXDEMUXQSOP16>
U1205C
U1205C
INS34823933
INS34823933
XSOP16_SECT
XSOP16_SECT
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
I0
5
Y
7
I1
6
R779
0
R779
0
COMMON
0402
COMMON
0402
5%
5%
Scart_VCC
?
?
?
?
?
?
GND GND
F2
F2
POLYSWITCH
1 2
200mA
200mA
COMMON
COMMON
1206
1206
POLYSWITCH
B1
B1
Bead
Bead
COMMON
COMMON
TV_Y_GREEN
TV_PB_BLUE
60OHM
R778
R778
10K
10K
5%
5%
0402
0402
COMMON
COMMON
TV_LUMA_F
TV_CVBS_F
TV_CHRO_F
GND
60OHM
GND
60OHM
GND GND
60OHM
60OHM
60OHM
Scart_VCC_CONN
D15
D15
1N4148
1N4148
A C
C925
C925
82PF
82PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
C914
C914
82PF
82PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
C911
C911
82PF
82PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
0.56uH
0.56uH
0.56uH
0.56uH
0.56uH
0.56uH
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
L515
L515
8.2PF
50V 0402
50V 0402
+/-0.5PF
+/-0.5PF
C0G
C0G
8.2PF
8.2PF
50V 0402
50V 0402
+/-0.5PF
+/-0.5PF
C0G
C0G
8.2PF
8.2PF
50V 0402
50V 0402
+/-0.5PF
+/-0.5PF
C0G
C0G
C927
C927
82PF
82PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
GND
L516
L516
TV_G_PR_F
0603COMMON
0603COMMON
C924
C924
C908
C908
82PF
82PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
GND
L517
L517
TV_CVBS_PB_F
0603COMMON
0603COMMON
C912
C912
C913
C913
82PF
82PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
TV_R_Y_F
0603COMMON
0603COMMON
C926
8.2PF
C926
TV_LUMA_F
TV_CHRO_F
TV_R_Y_F
TV_CHRO_F
TV_CVBS_F
TV_CVBS_PB_F
TV_G_PR_F
60OHM
60OHM
60OHM
Y(SCART,SV)
C(SCART,SV)
Y(HDTV)
PB(HDTV)
PR(HDTV)
Y/GREEN
Pr/RED
Pb/BLUE
R782
0
R782
J18
J18
1 2
3
5
7
9
11
13
2*7scart
2*7scart
1
60OHM
0402
0402
5%
5%
R763
R763
0402
0402
5%
5%
TV_LUMA_CVBS
4
Scart_VCC_CONNTV_LUMA_F
6
8
10
12
14
0
COMMON
COMMON
1
60OHM
0
0
COMMON
COMMON
GND
KEY
GND GND
TV_CVBS_F
TV_LUMA_F
GND
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
DACB and HDTV/SDTV-Out
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
19 32
19 32
19 32
5
<RevCode>
<RevCode>
<RevCode>
Page 22
A B C D E F G H
Page20: MIO A/B Interface
1
G1M
G1M
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
12/19 MIOA
12/19 MIOA
AB11
MIOA_VDDQ
AC11
MIOA_VDDQ
AC9
MIOA_VDDQ
AD11
MIOA_VDDQ
GND
SNN_MIOA_CAL_PD_VDDQ
SNN_MIOA_CAL_PU_GND
SNN_MIOA_VREF
2
AD7
AE7
AG8
MIOACAL_PD_VDDQ
MIOACAL_PU_GND
MIOA_VREF
MIOAD0
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
MIOAD6
MIOAD7
MIOAD8
MIOAD9
MIOAD10
MIOAD11
MIOAD12
MIOAD13
MIOAD14
MIOA_CTL3
MIOA_HSYNC
MIOA_VSYNC
MIOA_DE
MIOA_CLKOUT
MIOA_CLKOUT
MIOA_CLKIN
AE1
AE2
AE3
AG3
AG2
AG1
AF4
AF6
AG4
AG5
AG6
AG7
AD8
AE9
AD9
AD4
AD6
AD5
AE4
AE6
AE5
AE8
SNN_MIOA_D0
SNN_MIOA_D1
SNN_MIOA_D2
SNN_MIOA_D3
SNN_MIOA_D4
SNN_MIOA_D5
SNN_MIOA_D6
SNN_MIOA_D7
SNN_MIOA_D8
SNN_MIOA_D9
SNN_MIOA_D10
SNN_MIOA_D11
SNN_MIOA_D12
SNN_MIOA_D13
SNN_MIOA_D14
SNN_MIOA_CTL3
SNN_MIOA_HSYNC
SNN_MIOA_VSYNC
SNN_MIOA_DE
SNN_MIOA_CLKOUT
SNN_MIOA_CLKOUT*
MIOA_CLKIN
R665
10K
R665
10K
0402
0402
COMMON
COMMON
5%
5%
1
2
GND
3
4
3V3_F
C823
C823
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
GND
SNN_MIOB_CAL_PD_VDDQ
SNN_MIOB_CAL_PU_GND
AE11
AF11
AF9
AG9
AH6
AL8
AL7
G1L
G1L
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
13/19 MIOB
13/19 MIOB
MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOBCAL_PD_VDDQ
MIOBCAL_PU_GND
MIOB_VREF
MIOBD0
MIOBD1
MIOBD2
MIOBD3
MIOBD4
MIOBD5
MIOBD6
MIOBD7
MIOBD8
MIOBD9
MIOBD10
MIOBD11
MIOBD12
MIOBD13
MIOBD14
MIOBD15
MIOBD16
MIOBD17
MIOB_CTL3
MIOB_HSYNC
MIOB_VSYNC
MIOB_DE
MIOB_CLKOUT
MIOB_CLKOUT
MIOB_CLKIN
AH4
AH1
AH2
AH3
AK3
AL4
AK5
AM6
AL6
AL5
AM4
AN4
AK8
AJ6
AK7
AJ9
AK9
AL9
AH8
AH7
AH9
AH5
AJ4
AK4
AK6
MIOB_D15_STRAP0
MIOB_D16_STRAP1
MIOB_D17_STRAP2SNN_MIOB_VREF
MIOB_CLKIN
22
OUT
22
OUT
22
OUT
R651
10K
R651
10K
0402
0402
COMMON
COMMON
5%
5%
3
4
GND
MIOA_D[14..0]
20
IN
1
IMPEDANCE
DIFFPAIRNET NV_CRITICAL_NET
50OHM
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
ASSEMBLY
PAGE DETAIL
P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
MIO A/B Interface
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
20 32
20 32
20 32
5
<RevCode>
<RevCode>
<RevCode>
Page 23
A B C D E F G H
Page21: MISC: GPIO, I2C, ROM, HDCP, and XTAL
G1O
1
J6
J6
?
?
?
?
?
?
CON_HDR_002X004_TH_ST_M_P020_K
CON_HDR_002X004_TH_ST_M_P020_K
COMMON
COMMON
BCLK2GND
1
KEY
KEY
SYNC6GND
5
SDI
7
SDO
4
RST*
8
HDA_BCLK
HDA_RST*
HDA_SDI
HDA_SDO
HDA_SYNC
R666
R666
0402
0402
10K
10K
COMMON
COMMON
5%
5%
GND
R634
40.2KR634
0402
0402
1%
1%
R633 40.2K
GND
R633 40.2K
0402 COMMON
0402 COMMON
1%
1%
Binary Production Strap Mode:
STRAP_CALPD_MIOB = 40.2K 1%
STRAP_CALPD_MISC = NO STUFF
31
31
2
3
I2CS isolation for Hybrid Power
4
I2CS_SCL_Q
40.2K
2
2
2
2,2
2
COMMON
COMMON
?
?
STRAP_CALPD_MISC
(OPT)
STRAP_CALPD_MIOB
THERMDN
OUT
THERMDP
OUT
JTAG_TCLK
IN
JTAG_TMS
IN
JTAG_TDI
IN
JTAG_TDO
OUT
JTAG_TRST*
IN
G
1
SOT23
1G1D1S
SOT23
1G1D1S
D
?
?
Q1212
Q1212
COMMON
COMMON
?
?
?
?
?
?
R1217
R1217
?
?
2S3
0402
0402
I2CS_SCL_R
0
0
COMMON
COMMON
?
?
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
G1O
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
15/19 MISC2
15/19 MISC2
L31
BBIASN_NC
L30
BBIASP_NC
T6
HDA_BCLK
V7
HDA_RST
U6
HDA_SDI
T7
HDA_SDO
V6
HDA_SYNC
GND
Y11
STRAP_REF_MISC
W11
STRAP_REF_MIOB
G1N
G1N
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
14/19 MISC1
14/19 MISC1
T1
THERMDN
T2
THERMDP
AP12
JTAG_TCK
AR12
JTAG_TMS
AR13
JTAG_TDI
AP13
JTAG_TDO
AP14
JTAG_TRST
ROM_CS
ROM_SI
ROM_SO
ROM_SCLK
I2CH_SCL
I2CH_SDA
SPDIF
BUFRST
PGOOD_OUT
RFU_GND
I2CS_SCL
I2CS_SDA
I2CC_SCL
I2CC_SDA
I2CD_SCL
I2CD_SDA
I2CE_SCL
I2CE_SDA
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
RFU
ROM_CS*
T4
ROM_SI
V4
ROM_SO
U4
ROM_SCLK
T5
I2CH_SCL
Y6
I2CH_SDA I2CH_SDA
AA6
SPDIF
V5
V8
T8
L15
AP15
GND
3V3_F 3V3_F
R32
R32
2.2K
2.2K
5%
5%
0402
0402
COMMON
COMMON
I2CS_SCL
W2
I2CS_SDA
W1
I2CC_SCL I2CC_SCL_R
W3
I2CC_SDA I2CC_SDA_R
W4
I2CD_SCL
Y4
I2CD_SDA
AA5
W6
W5
GPIO0_DVI_A_HPD
AB1
GPIO1_DVI_C_HPD
AB2
AB3
GPIO3_NVVDD_PHASE
AD1
GPIO4_FAN_TACH
AD2
GPIO5_VSEL0
AD3
GPIO6_VSEL1
AB4
GPIO7_FBVDDQ_SEL
AB5
GPIO8_GPU_SLOW*
AB6
GPIO9_FAN_PWM
AB7
GPIO10_TMDS_TERM
AB8
GPIO11_SLI_SYNC1
AB9
GPIO12_12V_EXT_PRSNT
AC4
AC6
AA8
T9
GPIO_16_SEL_HDTV_SDTV
U9
GPIO17_HDMI_CEC
V9
SNN_GPIO18_DP_MODE
W9
SNN_GPIO19_DP_CEC
Y9
GPIO20_TV_LOAD_TEST
AA9
SNN_GPIO21_DP_HPD
W7
GPIO22_SWAPRDY_A
W8
AA7
GPIO2_SWAPRDY_OUT
I2CS_SDA_Q
I2CS_ENABLE27
OUT
G
1
1G1D1S
1G1D1S
SOT23
SOT23
D
?
?
?
?
Q1214
Q1214
COMMON
COMMON
?
?
?
?
?
?
?
?
2S3
R1218
0
R1218
0
0402
COMMON
0402
COMMON
?
?
I2CS_SDA_R
IN
BI
22
OUT
22
OUT
22
OUT
25,25
IN
R33
R33
2.2K
2.2K
5%
5%
0402
0402
COMMON
COMMON
R664
33R664
33
(OPT)
0402 COMMON
0402 COMMON
5%
5%
R55
33
R55
33
COMMON
COMMON
0402
0402
5%
5%
R103
33
R103
33
0402
COMMON
0402
COMMON
5%
5%
16
IN
18
IN
30
OUT
31
OUT
30
OUT
30
OUT
28
OUT
25,31
IN
31
OUT
GPIO10_TMDS_TERM
20
OUT
26
IN
19
OUT
GPIO17_HDMI_CEC
19
IN
1G1D1S
1G1D1S
G
1
GPIO TABLE
FunctionI/OGPIO
DVI HOTPLUG DET A
IN
0
HDMI HOTPLUG DET E
1
IN
2
SWAPREADY
N/A
3
NVVDD PHASE CONTROL
N/A
PWM TACH SIGNAL
4 N/A
OUT
VOLTAGE SELECT 05
VOLTAGE SELECT 1
6 OUT
FBVVDQ VOLTAGE CONTROL
N/A7
IN GPU_SLOW*
8
PWM FAN CONTROL
OUT9
UNUSED10
N/A
SLI_RASTERY_SYNCN/A11
12 IN EXT_12V DETECT
UNUSEDOUT13
UNUSED
14 IN
IN
UNUSED15
16 IN DP_MODE
HDMI_EF17
IN
18 UNUSED
IN
HDMI_CEC19
IN
20
IN
DP HOTPLUG DET F
IN
21
UNUSED
IN
22
SWAPREADY_A
OUT
23
UNUSED
R660
R58 33
R58 33
0402
0402
R106
0402
0402
17
17
D
S
C GE
3V3_F
U503
U503
SO08_I190X150
SO08_I190X150
R682
R682
SO8
SO8
10K
10K
COMMON
COMMON
5%
5%
7
HOLD8VCC
0402
0402
COMMON
COMMON
3
WP
1
CS
5
SI
2
SO
6
SCK
3V3_F 3V3_F
R56
R56
R57
R57
2.2K
2.2K
2.2K
2.2K
5%
5%
5%
5%
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
335%R660
33
(OPT)
COMMON0402
COMMON0402
5%
COMMON
COMMON
5%
5%
33R106
33
COMMON
COMMON
5%
5%
GND
I2CS_SCL_Q
I2CS_SDA_Q
3V3_F
C817
C817
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
4
0402
0402
COMMON
COMMON
GND
I2CD_SCL_0
31
OUT
31
OUT
PS3_OUTEN11,17,23,26,27
I2CD_SDA_0
3V3_F
R35
R35
1K
1K
1%
1%
0402
0402
COMMON
3
Q3
Q3
BSS138
SOT23
SOT23
COMMON
COMMON
2
COMMON
(OPT)
50V
50V
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
20
OUT
GND
PEX_VDD
LB503 10nH
LB503 10nH
IND_SMD_0402COMMON
IND_SMD_0402COMMON
C730
C730
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C702
C702
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
COMMON
COMMON
C703
C703
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
GND
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
MISC: GPIO, I2C, ROM, HDCP, and XTAL
DIFFPAIRNV_IMPEDANCE
MAX_CURRENT
3V3_F
U504
R1002
R1002
0
0
5%
5%
0402
0402
COMMON
COMMON
I2CD_SCL_R 27
I2CD_SCL_R
I2CD_SDA_R 27
I2CD_SDA_R
U504
SO08_I190X150
SO08_I190X150
COMMON
COMMON
6
SCL
SDA
5
3
SDA
2
NC
5V
XTAL_SMD_4_060X035+/-10 PPM
XTAL_SMD_4_060X035+/-10 PPM
3V3_F
8
VCC
7
VCC
GND
GND
R16
R16
2.2K
2.2K
5%
5%
0402
0402
COMMON
COMMON
R15
R15
2.2K
2.2K
5%
5%
0402
0402
COMMON
COMMON
Y1
27 MHZY1
27 MHZ
COMMON
COMMON
C841
C841
.1UF
.1UF
10V
10V
4
10%
10%
1
X5R
X5R
0402
0402
COMMON
COMMON
GND
LB9
27nHLB9
27nH
COMMONIND_SMD_0402
COMMONIND_SMD_0402
LB8
27nHLB8
27nH
COMMONIND_SMD_0402
COMMONIND_SMD_0402
XTALOUTBUFF
C15
C15
22PF
22PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
C13
C13
22PF
22PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
XTALOUTBUFF
T3
V2
XTALOUT
XTALOUT
C44
C44
22PF
22PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
GND GND
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
R1000
R1000
R720
R720
10K
10K
10K
10K
5%
5%
5%
5%
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
R1001 0
R1001 0
R719
R719
10K
10K
5%
5%
0402
0402
COMMON
COMMON
(OPT)
GND
5%
5%
COMMON
COMMON
0402
0402
0
0
R557
R557
U1202B
U1202B
XSOP16_PI025_049X040
XSOP16_PI025_049X040
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
A4B
3
BE
2
U1202C
U1202C
XSOP16_PI025_049X040
XSOP16_PI025_049X040
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
A7B
6
BE
5%
5%
5
COMMON
COMMON
0402
0402
0
0
R556
R556
U1202D
U1202D
XSOP16_PI025_049X040
XSOP16_PI025_049X040
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
A10B
11
BE
12
U1202E
U1202E
XSOP16_PI025_049X040
XSOP16_PI025_049X040
COMMON
COMMON
XSOP16_SECT
XSOP16_SECT
A13B
14
BE
15
GPU_PLLVDD
C723
C723
C724
C724
.1UF
.1UF
.1UF
.1UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X7R
X7R
X7R
X7R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
XTALSSIN
GND
R653
R653
10K
10K
5%
5%
0402
0402
COMMON
COMMON
GND GND
0402 COMMON
0402 COMMON
5%
5%
(OPT)
AM13
AM15
AM14
XTALIN
C43
C43
22PF
22PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
I2CH_SDA_R
GND
G1P
G1P
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
16/19 XTAL_PLL
16/19 XTAL_PLL
PLLVDD
VID_PLLVDD
SP_PLLVDD
V3
XTALSSIN
V1
XTALIN
R658
R658
330
330
5%
5%
0402
0402
COMMON
COMMON
I2CD_SCL_C
I2CD_SDA_C
HFDBA
MIN_WIDTH
21 32
21 32
21 32
Sheet of
Sheet of
Sheet of
1
2
3
4
5
<RevCode>
<RevCode>
<RevCode>
www.vinafix.vn
Page 24
A B C D E F G H
Page22: Strap Configuration
1
2
3
21
IN
21
IN
21
IN
20
IN
ROM_SI
ROM_SO
ROM_SCLK
MIOB_D15_STRAP0
G1Q
G1Q
BGA_1504_P080_350X350
AC34
AC36
AC37
AC7
AF34
AF36
AF37
AF7
AG37
AG38
AH40
AJ7
AK32
AL32
AL40
AM29
AM30
AM31
AM32
AM7
AP34
AR36
AT11
AT13
AT35
AU14
AU17
AU20
AU23
AU26
AV10
AV12
AV28
AY31
C12
E15
E16
F16
F17
F20
F23
F31
G17
G20
G23
G26
G29
G8
H28
H7
J17
J20
J23
J29
J9
L14
L16
L28
L29
M3
M37
P11
P34
P36
R11
R3
R35
T11
U11
U36
U7
Y34
Y36
Y37
Y7
BGA_1504_P080_350X350
COMMON
COMMON
19/19 NC
19/19 NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1
2
3
3V3_F
R679
R679
4.99K
4.99K
1%
1%
0402
0402
COMMON
COMMON
R674
R674
4.99K
4.99K
1%
1%
0402
0402
COMMON
COMMON
(OPT)
STRAP PIN
ROM_SI
STRAP NAME 15K
PCI_DEVID_EXT
3V3 GND
0
GND
3V3_F
R678
R678
4.99K
4.99K
1%
1%
0402
0402
COMMON
COMMON
R676
R676
4.99K
4.99K
1%
1%
0402
0402
COMMON
COMMON
(OPT)
STRAP PIN
ROM_SO SLOT_CLK_CFG
STRAP NAME
GND
3V3_F
R677
R677
4.99K
4.99K
1%
1%
0402
0402
COMMON
COMMON
R675
R675
4.99K
4.99K
1%
1%
0402
0402
COMMON
COMMON
(OPT)
STRAP PIN
ROM_SCLK PCI_DEVID[3]
STRAP NAME
GND
3V3_F
R672
R672
4.99K
4.99K
1%
1%
0402
0402
COMMON
COMMON
R681
R681
4.99K
4.99K
1%
1%
0402
0402
COMMON
COMMON
(OPT)
STRAP PIN
STRAP0
STRAP NAME
RAMCFG0
GND
3V3_F
R671
R671
4.99K
4
MIOB_D16_STRAP1
20
IN
4.99K
1%
1%
0402
0402
COMMON
COMMON
R680
R680
4.99K
4.99K
1%
1%
0402
0402
COMMON
COMMON
(OPT)
STRAP PIN
STRAP1
STRAP NAME
RAMCFG1
*
RAMCFG[2:0]
256MB (8Mx32)
101 --- 256-bit Qimonda
110 --- 256-bit Hynix
111 --- 256-bit Samsung
* VBIOS will be defined on a per SKU basis.
GND
3V3_F
R673
R673
4.99K
4.99K
1%
1%
0402
0402
COMMON
MIOB_D17_STRAP2
20
IN
5
COMMON
(OPT)
R683
R683
4.99K
4.99K
1%
1%
0402
0402
COMMON
COMMON
STRAP PIN
STRAP2
STRAP NAME
RAMCFG2
GND
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
512MB (16Mx32)
001 --- 256-bit Qimonda
010 --- 256-bit Hynix
011 --- 256-bit Samsung
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
Strap Configuration
1024MB (32Mx32)
101 --- 256-bit Hynix
110 --- 256-bit Hynix
111 --- 256-bit Samsung
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
22 32
22 32
22 32
4
5
<RevCode>
<RevCode>
<RevCode>
Page 25
A B C D E F G H
Page23: PWR and GND Signals
G1R
AA13
AA22
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AC13
AA14
AC15
AC17
AC19
AC21
AC23
AC25
AC27
AC29
AD13
AD14
AA15
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AA16
AD25
AD26
AD27
AD28
AD29
AD30
AE14
AE16
AE18
AE20
AA17
AE22
AE24
AE26
AE28
AE30
AG13
AA18
AA19
AA20
AA21
P20
AG15
AG17
AG19
AG21
AG23
AG25
AG27
AG29
AH13
AH14
AH15
AH16
AH17
AH18
AH19
AH20
AH21
AH22
AH23
AH24
AH25
AH26
AH27
Y27
Y29
G1R
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
18/19 NVVDD
18/19 NVVDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
1
2
3
4
NVVDD
N23
VDD
N24
VDD
N25
VDD
N26
VDD
N27
VDD
N28
VDD
N29
VDD
N30
VDD
P14
VDD
P16
VDD
P18
VDD
N22
VDD
AH28
VDD
N21
VDD
AH29
VDD
AH30
VDD
AJ14
VDD
AJ16
VDD
AJ18
VDD
AJ20
VDD
AJ24
VDD
AJ26
VDD
AJ28
VDD
AJ30
VDD
N20
VDD
N13
VDD
N14
VDD
N15
VDD
N16
VDD
N17
VDD
N18
VDD
N19
VDD
P22
VDD
P24
VDD
P26
VDD
P28
VDD
P30
VDD
T13
VDD
T15
VDD
T17
VDD
T19
VDD
T21
VDD
T23
VDD
T25
VDD
T27
VDD
T29
VDD
U13
VDD
U14
VDD
U15
VDD
U16
VDD
U17
VDD
U18
VDD
U19
VDD
U20
VDD
U21
VDD
U22
VDD
U23
VDD
U24
VDD
U25
VDD
U26
VDD
U27
VDD
U28
VDD
U29
VDD
U30
VDD
V14
VDD
V16
VDD
V18
VDD
V20
VDD
V22
VDD
V24
VDD
V26
VDD
V28
VDD
V30
VDD
Y13
VDD
Y15
VDD
Y17
VDD
Y19
VDD
Y21
VDD
Y23
VDD
Y25
VDD
G1S
G1S
BGA_1504_P080_350X350
BGA_1504_P080_350X350
COMMON
COMMON
AF17
AF16
AF15
AF14
AF13
AE29
AE27
AE25
AE23
GND
GND
GND
GND
GND
GND
GND
GND
GND
17/19 GND
17/19 GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AB28
AB27
AB26
AB25
AB24
AB23
AB22
AB21
AA11
GND
AF25
AF24
AF23
AF22
AF21
AF20
AF2
AF19
AB16
AF18
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AC2
AB13
AB30
AB29
AC24
AC22
AC20
AC18
AC16
AC14
AF5
AF41
AF38
AF35
AF30
AF29
AF28
AB17
AF27
AF26
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AC8
AC5
AE13
AB14
AC41
AC38
AC35
AC30
AC28
AC26
AG24
AG22
AG20
AG18
AG16
AB18
AG14
AG11
AF8
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AK24
AK23
AK22
AK21
AB15
AE21
AE19
AE17
AE15
BA11
AB20
AJ17
AB19
AJ15
AJ13
AG30
AG28
AG26
AK25
GNDB8GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AM2
AK30
AK29
AK28
AK27
AK26
AM41
AM38
AM35
BA38
BA35
BA32
BA29
BA26
BA23
BA20
BA2
BA17
BA14
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AR2
AM8
AM5
AP26
AP23
AP20
AR20
AR17
AR14
AR11
E23
E20
E17
E14
E11
BA8
BA5
BA41
GND
GNDE2GND
GND
GND
GNDC3GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AR8
AR5
AT14
AR41
AR38
AR35
AR32
AR29
AR26
AR23
AJ23
AJ2
AJ19
E41
E38
E35
E32
E29
E26
GND
GND
GNDE5GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AV2
AT26
AT23
AT20
AT17
AV20
AV17
AV14
AV11
AU37
AK13
AJ8
AJ5
AJ41
AJ38
AJ35
AJ29
AJ27
AJ25
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AV8
AV5
AV41
AV38
AV35
AV32
AV29
AV26
AV23
F29
F26
AK20
AK19
AK18
AK17
AK16
AK15
AK14
GND
GND
GND
GND
GND
GND
GND
GND
AY40
GND
GNDE8GND
GND
GND
GND
GND
GNDB2GND
GND
GND
GND
B35
B32
B29
B26
B23
B20
B17
B14
B11
H32
H29
H26
H23
H20
H17
H14
H11
GND
GND
GND
GND
GNDH2GND
GND
GND
GNDF6GND
GND
GND
GND
GND
GND
GNDB5GND
GND
GND
GND
B41
B38
R29
R28
R27
R26
R25
R24
L41
L38
L35
H41
H38
H35
GND
GND
GNDL2GNDH8GNDH5GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
T30
T28
T26
T24
T22
T20
T18
T16
T14
R30
P25
P23
P21
P19
P17
P15
P13
GND
GND
GNDP2GND
GND
GND
GND
GNDL8GNDL5GND
GND
GNDU8GNDU5GND
GND
GND
GND
GNDU2GND
GND
V13
V11
U41
U38
U37
U35
R14
R13
P41
P38
P37
P35
P29
P27
GND
GNDP8GNDP5GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
V29
V27
V25
V23
V21
V19
V17
V15
W14
W13
W30
R23
R22
R21
R20
R19
R18
R17
R16
R15
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
W24
W23
W22
W21
W20
W19
W18
W17
W16
W15
Y8
Y41
Y38
Y24
Y22
Y20
Y18
Y16
Y14
GNDY5GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDY2GND
GND
GND
GND
GND
GND
Y35
Y30
Y28
Y26
W29
W28
W27
W26
W25
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
PWR and GND Signals
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
23 32
23 32
23 32
5
<RevCode>
<RevCode>
<RevCode>
Page 26
A B C D E F G H
Page24: NVVDD and FBVDDQ Decoupling
1
NVVDD
2
3
C649
C649
.1UF
.1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C718
C718
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C722
C722
.22UF
.22UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C732
C732
.22UF
.22UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C690
C690
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C678
C678
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C686
C686
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C721
C721
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
NVVDD
Place under GPU
C719
C719
C653
C653
.1UF
.1UF
.1UF
.1UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X7R
X7R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C711
C711
C663
C663
.1UF
.1UF
.1UF
.1UF
10V
10V
10V
10V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C656
C656
C704
C704
.22UF
.22UF
.22UF
.22UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C664
C664
C654
C654
.22UF
.22UF
.22UF
.22UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C709
C709
C681
C681
1UF
1UF
1UF
1UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C698
C698
C694
C694
.1UF
.1UF
.1UF
.1UF
10V
10V
10V
10V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C679
C679
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C700
C700
C731
C731
4.7UF
4.7UF
4.7UF
4.7UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0603
0603
0603
0603
COMMON
COMMON
COMMON
COMMON
C662
C662
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C706
C706
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C691
C691
.22UF
.22UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C712
C712
.22UF
.22UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C671
C671
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C667
C667
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
Stuffing option for NVVDD
C670
C670
C677
C677
.1UF
.1UF
.1UF
.1UF
10V
10V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C693
C693
C669
C669
.22UF
.22UF
.22UF
.22UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C672
C672
C699
C699
1UF
1UF
1UF
1UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C684
C684
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C726
C726
.22UF
.22UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C685
C685
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C655
C655
.22UF
.22UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C697
C697
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
NVVDD
Place close to GPU
NVVDD
C52
C52
C57
C57
C60
C47
C47
10UF
10UF
10UF
10UF
6.3V
6.3V
6.3V
6.3V
20%
20%
20%
20%
X5R
X5R
X5R
X5R
0805
0805
0805
0805
COMMON
COMMON
COMMON
COMMON
C67
C67
C68
GND
GND
GND
GND
GND
GND
GND
GND
C68
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
C53
C53
47UF
47UF
6.3V
6.3V
20%
20%
X5R
X5R
1206
1206
COMMON
COMMON
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
C66
C66
47UF
47UF
6.3V
6.3V
20%
20%
X5R
X5R
1206
1206
COMMON
COMMON
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
C65
C65
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
C63
C63
47UF
47UF
6.3V
6.3V
20%
20%
X5R
X5R
1206
1206
COMMON
COMMON
C60
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
C64
C64
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
GND
GND
GND
FBVDDQ
C715
C715
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C729
C729
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C634
C634
.47UF
.47UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C713
C713
.47UF
.47UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C714
C714
.47UF
.47UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C637
C637
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C640
C640
4.7UF
4.7UF
6.3V
6.3V
20%
20%
X5R
X5R
0603
0603
COMMON
COMMON
FBVDDQ
Place near BGA
C635
C635
C733
C733
.1UF
.1UF
.1UF
.1UF
10V
10V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X7R
X7R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C639
C639
C633
C633
.1UF
.1UF
.1UF
.1UF
10V
10V
10V
10V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C630
C630
C618
C618
.47UF
.47UF
.47UF
.47UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C680
C680
C765
C765
.47UF
.47UF
.47UF
.47UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C646
C646
C642
C642
.47UF
.47UF
.47UF
.47UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C645
C645
C756
C756
1UF
1UF
1UF
1UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0402
0402
0402
0402
COMMON
COMMON
COMMON
COMMON
C695
C695
C625
C625
1UF
1UF
4.7UF
4.7UF
6.3V
6.3V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0603
0603
0402
0402
COMMON
COMMON
COMMON
COMMON
C747
C747
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C636
C636
.1UF
.1UF
10V
10V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C644
C644
.47UF
.47UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C641
C641
.47UF
.47UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C764
C764
.47UF
.47UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C624
C624
1UF
1UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
C628
C628
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
GND
GND
GND
GND
GND
GND
4
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
NVVDD and FBVDDQ Decoupling
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
24 32
24 32
24 32
5
<RevCode>
<RevCode>
<RevCode>
Page 27
A B C D E F G H
Page25: SPDIF Input, Thermal Protection, and IFP_IOVDD Power Supply
1
NET
SPDIF
21,25
IN
IMPEDANCE
NV_CRITICAL_NET
150OHM
1
2
Thermal Protection
3
GPIO8_GPU_SLOW*
21,31
IN
IFP_IOVDD Backdrive Prevention
Stuffing posibilities for thermal control and protection:
4
R722 1K
R722 1K
GPU_RST* GPU_RST_R*
2
IN
5
04025%COMMON
04025%COMMON
SPDIF Input
3V3_F
R777
0
R777
0
0402
COMMON
0402
COMMON
5%
5%
R776
0
R776
J7
J7
SPDIFIN
1
2
?
?
?
?
?
?
HT102PRW_2
HT102PRW_2
COMMON
COMMON
3V3_F
R38
R38
10K
10K
5%
C33
C33
100PF
100PF
16V
16V
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
12V
R708
R708
10K
10K
5%
5%
0402
0402
COMMON
COMMON
SOT23
SOT23
1G1D1S
1G1D1S
BSS138
?
?
?
?
1G1D1S
1G1D1S
1G1D1S
1G1D1S
COMMON
COMMON
0.88A
0.88A
+/-20V
+/-20V
5%
0402
0402
COMMON
COMMON
1G1D1S
1G1D1S
3
D
Q4
Q4
G
1
S
2
50V
50V
3.5R
3.5R
GND
G
1
PU placed at power
detection circuit
NVVDD_EN
3
D
Q7
Q7
BSS138
SOT23
SOT23
COMMON
COMMON
S
2
50V
50V
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
GND
3V3_F
12V
12V
?
?
16A
16A
?
S
30V
30V
G
2
Q510
Q510
1
RTR040N03
D
SOT23
SOT23
COMMON
COMMON
3
IFP_IOVDD_Q
0.2A
16MIL
3
D
Q1001
Q1001
RTR040N03
SOT23
SOT23
G
1
COMMON
COMMON
S
2
30V
30V
?
?
16A
?
?
12V
12V
IFP_IOVDD
0.2A
16MIL
GND
C36
C36
1000PF
1000PF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C840
C840
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
30,31
OUT
THERM_LATCH*
3
Q511
Q511
BSS138
SOT23
SOT23
COMMON
COMMON
2
GND
1G1D1S
1G1D1S
50V
50V
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
D
G
1
S
IFP_IOVDD_EN*
3V3_F
R39
R39
10K
10K
5%
5%
0402
0402
COMMON
COMMON
THERM_OVERT THERM_OVERT_R
3
Q8
Q8
BSS138
SOT23
SOT23
COMMON
COMMON
2
50V
50V
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
GND
3V3_F
R1004
R1004
10K
10K
5%
5%
0402
0402
COMMON
COMMON
1G1D1S
1G1D1S
1
3V3_F
R48
R48
10K
10K
5%
5%
0402
0402
COMMON
COMMON
R43 10K
R43 10K
0402 COMMON
0402 COMMON
5%
5%
1G1D1S
1G1D1S
D
G
1
C848
C848
100PF
100PF
50V
50V
5%
5%
C0G
C0G
0402
0402
COMMON
COMMON
GND
S
1G1D1S
1G1D1S
3
D
Q5
Q5
BSS138
SOT23
SOT23
G
THERM_LATCH
1
COMMON
COMMON
S
2
50V
50V
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
GND
RCdelay = 1ms
R41
1K5%R41
1K
COMMON0402
COMMON0402
5%
GND
IFP_IOVDD_EN
3
D
Q1000
Q1000
BSS138
SOT23
SOT23
G
COMMON
COMMON
S
2
50V
50V
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
GND
0
0402
COMMON
0402
COMMON
5%
5%
GND
R97
R97
SPDIF_IN_C
1K
1K
0402
0402
1%
1%
COMMON
COMMON
SPDIFIN_R
3V3_F
R37
R37
33K
33K
1%
1%
0402
0402
COMMON
COMMON
R96
R96
2.2K
2.2K
0402
0402
5%
5%
COMMON
COMMON
C951
C951
1000PF
1000PF
50V
50V
5%
5%
NPO
NPO
0402
0402
COMMON
COMMON
GND
2
OUT
C14 .01UF
C14 .01UF
16V
16V
0402
0402
10%
10%
X7R
X7R
COMMON
COMMON
12V
R95
R95
10K
10K
5%
5%
0402
0402
COMMON
COMMON
SPDIF_G_C
Q27
Q27
B
MMBT2222A
MMBT2222A
E C
GND
C954
C954
1000PF
1000PF
50V
50V
5%
5%
NPO
NPO
0402
0402
COMMON
COMMON
R201
R201
75
75
1%
1%
0402
0402
COMMON
COMMON
D
D
Q29
Q29
2N7002
G
G
SOT-23
SOT-23
COMMON
COMMON
S
S
SOT23SGD_T
SOT23SGD_T
GND
GND
R93
R93
100K
100K
5%
5%
0402
0402
COMMON
COMMON
R94
R94
100K
100K
5%
5%
0402
0402
COMMON
COMMON
(OPT)
3V3_F
D7
D7
BAV99
SOT23
SOT23
3
100V
100V
?
?
COMMON
COMMON
1 2
GND
SPDIF
21,25
OUT
2
3
4
5
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
PAGE DETAIL
www.vinafix.vn
SPDIF Input, Backdrive Protection, and IFP_IOVDD Power Supply
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
25 32
25 32
25 32
<RevCode>
<RevCode>
<RevCode>
Page 28
A B C D E F G H
Page26: PS I: 3V3, 12V, and 12V_EXT Power Supply Filter
1
2
3V3 Power Supply Filter
PS3_OUTEN10,11,17,23,27
3V3_F = 3.3V @ 2.5A
UC_3V3
R1226
R1226
10K
10K
?
?
0402
0402
COMMON
COMMON
D
G
1
S
GND
Q1215
Q1215
SOT23
SOT23
COMMON
COMMON
3V3
3.3V
3A
16MIL
C32
C32
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
UC_3V3
R1225
R1225
10K
10K
?
?
0402
0402
COMMON
COMMON
3V3_Q_EN*
3
1G1D1S
1G1D1S
2
?
?
?
?
?
?
?
?
?
?
?
?
GND
G
1
NET MIN_WIDTHMAX_CURRENTVOLTAGE
12V_EXT
12V_EXT
12V
12V
GND
R118 0
R118 0
R0805_67
R0805_67
COMMON
COMMON
5%
5%
R119
0R119
0
R0805_67
R0805_67
COMMON
COMMON
5%
5%
?
?
1D2
5
6
Q1213
COMMON
Q1213
COMMON
TSOP_6P_0_95MM
TSOP_6P_0_95MM
R1224
R1224
100K
100K
?
?
0402
0402
COMMON
COMMON
S
G
3
1G4D1S
1G4D1S
12V
3V3_Q_EN
3
D
Q1216
Q1216
SOT23
SOT23
COMMON
COMMON
S
1G1D1S
1G1D1S
2
?
?
?
?
?
?
?
?
?
?
?
?
GND
3V3_Q
?
?
?
?
?
?
?
?
?
?
4
C151
C151
.1UF
.1UF
?
?
?
?
?
?
0402
0402
COMMON
COMMON
GND
C95
C95
4.7UF
4.7UF
?
?
?
?
?
?
0603
0603
COMMON
COMMON
GND
C101
C101
.1UF
.1UF
?
?
?
?
?
?
0402
0402
COMMON
COMMON
3.3V
3A
8.4mR
8.4mR
L5?1 UH
L5?1 UH
16MIL
COMMONIND_NONRKO_SMD_076X076
COMMONIND_NONRKO_SMD_076X076
C102
C102
.1UF
.1UF
?
?
?
?
?
?
0402
0402
COMMON
COMMON
C20
C20
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND GND
3V3_F
3.3V
3A
16MIL
C26
C26
220UF
220UF
COMMON
COMMON
+/-20%
+/-20%
6.3V
6.3V
POSCAP
POSCAP
2.4A
2.4A
0.025R
0.025R
C_D_7343
C_D_7343
GND
12V
12V
0V
6.25A 16MIL
5.5A 16MIL
28A 16MIL
1
2
3
4
12V Power Supply Filter
12V_F = 12V @ 5.5A
12V
GND
C117
C117
10UF
10UF
16V
16V
20%
20%
X5R
X5R
1206
1206
COMMON
COMMON
L11
1 UHL11
1 UH
COMMON
COMMON
CHK_D2_P5
CHK_D2_P5
10.2A
10.2A
8.4mR
8.4mR
12V_F
12V
5.5A
16MIL
C114
C114
10UF
10UF
16V
16V
20%
20%
X5R
X5R
1206
1206
COMMON
COMMON
GND
12V_EXT Power Supply Filter
12V_EXT_F = 12V @ 6.25A
INPUT POWER SELECTION for NVVDD
12V_EXT
GND
C118
C118
10UF
10UF
16V
16V
10%
10%
X5R
X5R
0805
0805
COMMON
COMMON
L10 1 UH
L10 1 UH
CHK_D2_P5
CHK_D2_P5
10.2A
10.2A
8.4mR
8.4mR
COMMON
COMMON
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
12V_EXT_F
12V
6.25A
16MIL
C GE
12V_EXT_F 12V_F
D501
D501
1
2
BAT54C
25V
25V
?
?
SOT23
SOT23
COMMON
COMMON
3
12V_EXT_12V_SEL
R508
J8
J8
?
?
?
?
?
?
CON_PWR_002X003_TH_RA_M_PI165
CON_PWR_002X003_TH_RA_M_PI165
COMMON
COMMON
GND
6
12V
3
PRSNT*
5
12V
2
GND
4
12V
1
12V_EXT
12V_EXT_PRSNT*
C501
C501
10UF
10UF
16V
16V
10%
10%
X5R
X5R
0805
0805
COMMON
COMMON
GND GND GND
C503
C503
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0603
0603
COMMON
COMMON
R508
10K
10K
5%
5%
0402
0402
COMMON
COMMON
R509
R509
10K
10K
5%
5%
0402
0402
COMMON
COMMON
12V_EXT_PRSNT_EN
1G1D1S
1G1D1S
3
D
Q503
Q503
BSS138
SOT23
SOT23
G
1
COMMON
COMMON
S
2
50V
50V
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
GND
GPIO12
EMERENCY MODE 0
(12V_EXT present)
150W POWER MODE 1
(12V_EXT NOT present)
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
PS I: 3V3, 12V, and 12V_EXT Power Supply Filter
COMMON
COMMON
3
12V_F
C502
C502
4.7UF
4.7UF
25V
25V
10%
10%
X5R
X5R
1206
1206
8
1G2D1S
1G2D1S
7
D
Q502A
Q502A
IRF7328 IRF7328
SO08_I190X150
SO08_I190X150
G
2
COMMON
COMMON
S
-30V
-30V
1
?
?
0.021R
0.021R
-32A
-32A
?
?
+/-20V
+/-20V
12V_NVVDD_Q
SO08_I190X150
SO08_I190X150
12V_EXT
COMMON
COMMON
?
?
6
1G2D1S
1G2D1S
5
D
Q502B
Q502B
G
4
S
-30V
-30V
3
?
?
0.021R
0.021R
-32A
-32A
+/-20V
+/-20V
4
3V3_F
R501
R501
10K
10K
5%
5%
0402
0402
COMMON
COMMON
Q501
Q501
BSS138
SOT23
SOT23
COMMON
COMMON
GND
GPIO12_12V_EXT_PRSNT
3
2
50V
50V
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
1G1D1S
1G1D1S
D
G
1
S
21
OUT
5
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
26 32
26 32
26 32
<RevCode>
<RevCode>
<RevCode>
www.vinafix.vn
Page 29
A B C D E F G H
Page27: PS II: IFP_PLLVDD, 2V5, 5V, and DDC_5V Power Supply
1
2
3
5V and DDC_5V Power Supply
DDC_5V = 5V @ 200mA
4
LAYOUT NOTE:
12V
C868
C868
C861
C861
.1UF
.1UF
4.7UF
4.7UF
16V
16V
25V
25V
10%
10%
10%
10%
X7R
X7R
X5R
X5R
1206
1206
0603
0603
COMMON
COMMON
COMMON
COMMON
GND
ADD MIN 200MM^2 COPPER AROUND THIS DPAK FOR HEAT DISSIPATION
DIODE_SMD_MELF
DIODE_SMD_MELF
D8
D8
12
COMMON
COMMON
R795
0
R795
0
5V_INPUT
0402
COMMON
0402
COMMON
5%
5%
1
AZ7805D-E1_TO252-3-RH
AZ7805D-E1_TO252-3-RH
U505
U505
INPUT
OUTPUT
GND
2
GND
C83
C83
10UF
10UF
16V
16V
10%
10%
X5R
X5R
1206
1206
COMMON
COMMON
C82
C82
10UF
10UF
16V
16V
10%
10%
X5R
X5R
1206
1206
COMMON
COMMON
+
+
12
C92
C92
560u4SO-2
560u4SO-2
PEX_VDD
GND
+
+
12
C91
C91
C100u4SO-RH
C100u4SO-RH
(OPT)
IFP_PLLVDD Power Supply
IFP_PLLVDD = 1.8V @ 200mA
3V3_F
C34
C34
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
1
C35
C35
3
.047UF
.047UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
IFP_PLLVDD = VREF * (1 + (Rtop / Rbot))
1.82V = 0.8V * (1 + (2.5K/2K))
U507
U507
APL5317
ADJ_VR=0.8V
ADJ_VR=0.8V
SOT23-5
SOT23-5
SOT23_5_NPC30X
SOT23_5_NPC30X
COMMON
COMMON
IN
EN4ADJ
GND
GND
C37
C37
4.7UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0805
0805
COMMON
COMMON
C93
C93
10UF
10UF
6.3V
6.3V
10%
10%
X5R
X5R
0805
0805
COMMON
COMMON
IFP_PLLVDD
GND
C41
C41
100UF
100UF
COMMON
COMMON
+/-20%
+/-20%
4.0V
4.0V
POSCAP
POSCAP
1.4A
1.4A
0.035R
0.035R
C_B_3528
C_B_3528
(OPT)
1.8V
0.2A
16MIL
C38
C38
.047UF
.047UF
R42
R42
16V
16V
10%
10%
2.55K
2.55K
Rtop
5
OUT
12MIL
IFP_PLLVDD_ADJ
Rbot
2
1%
1%
0402
0402
COMMON
COMMON
R49
R49
2K
2K
1%
1%
0402
0402
COMMON
COMMON
X7R
X7R
0402
0402
COMMON
COMMON
GND
1
2
3
F501
5V
3
C860
C860
C865
C865
.1UF
.1UF
4.7UF
4.7UF
10V
10V
6.3V
6.3V
10%
10%
10%
10%
X5R
X5R
X5R
X5R
0603
0603
0402
0402
COMMON
COMMON
COMMON
COMMON
F501
200mA
200mA
1206
1206
5V
COMMON
COMMON
0.2A
16MIL
1 2
POLYSWITCH
POLYSWITCH
DDC_5V
5V
0.2A
16MIL
C896
C896
220PF
220PF
50V
50V
5%
5%
C0G
C0G
0603
0603
COMMON
COMMON
GND
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
PS II: PEX_VDD, IFP_PLLVDD, 2V5, 5V, and DDC_5V Power Supply
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
27 32
27 32
27 32
5
<RevCode>
<RevCode>
<RevCode>
Page 30
A B C D E F G H
Page28: PS III: FBVDDQ Power Supply
1
2
3
4
5
PEX_VDD
PEX_VDD = 1.1V @ 3A
C110
C110
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
C111
C111
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
FBVDDQ
50MIL
C112
C112
.1UF
.1UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
VOUT = REFIN * (1 + Rt/Rb)
1.1V = 0.8V * (1 + 768/2.0k)
C113
C113
.01UF
.01UF
16V
16V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
1
12V_F
C515
C515
10UF
C109
C109
<P_esr>
<P_esr>
<P_mat>
<P_mat>
<Cfgdft>
<Cfgdft>
DS
GND
Q36
Q36
NTD4806NT4G
NTD4806NT4G
GND
R512
R512
1K
1K
COMMON
COMMON
0402
0402
5%
5%
10UF
16V
16V
10%
10%
X5R
X5R
1206
1206
COMMON
COMMON
GND
2
FBVDDQ Power Supply
FBVDDQ = 2.1V @ 20A
L13 1.1UH
L13 1.1UH
COMMONCHK_D2_P8_5X3_5
COMMONCHK_D2_P8_5X3_5
2.0mOHM MAX
2.0mOHM MAX
(OPT)
L6 1.2UH
L6 1.2UH
CHK_D2_13_5X12_5COMMON
CHK_D2_13_5X12_5COMMON
R552
R552
2.0mOHM MAX
2.0mOHM MAX
2.2
2.2
5%
5%
0805
0805
COMMON
COMMON
PS1_FB_SNUB
C533
C533
2200PF
2200PF
50V
50V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
R550
R550
0R
0R
Rfb
1%
1%
0402
0402
COMMON
COMMON
R547
R547
2.55K
2.55K
Rtop
1%
1%
0603
0603
COMMON
COMMON
R545
R545
2K
2K
Rbot1
1%
1%
0603
0603
COMMON
R540
R540
Rbot2
10K
10K
1%
1%
0603
0603
COMMON
COMMON
PS1_FB_R1
1G1D1S
1G1D1S
3
D
Q506
Q506
BSS138
SOT23
SOT23
G
1
COMMON
COMMON
S
2
50V
50V
?
?
3.5R
3.5R
0.88A
0.88A
?
?
C124
C124
+/-20V
+/-20V
.01UF
.01UF
16V
16V
10%
10%
X7R
X7R
GND
0402
0402
COMMON
COMMON
COMMON
GND
FBVDDQ = VREF * (1 + (Rtop / Rbot1))
1.82V = 0.8 * (1 + (2.55K / 2K))
FBVDDQ = VREF * (1 + (Rtop / (Rbot1//Rbot2))
2.02V = 0.8 * (1 + (2.55K / (2K//10K))
12
+
+
C88
C88
CD470u6.3SO-RH
CD470u6.3SO-RH
FBVDDQ Local/Remote Sense
*STUFF Rfb for local sense.
*STUFF Rfb_sense for remote sense
C531
0.01uF
C531
0.01uF
PS1_FB_RC
16V0402
16V0402
10%
10%
X7R
X7R
COMMON
COMMON
12
+
+
C89
C89
CD470u6.3SO-RH
CD470u6.3SO-RH
Rfb_sense
R548
R548
5%
5%
0402
0402
22
22
COMMON
COMMON
R549
R549
0
0
5%
5%
0402
0402
COMMON
COMMON
(OPT)
GND
C539
C539
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
FBVDDQ_SENSE
C529
C529
.1UF
.1UF
10V
10V
(OPT)
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
GND
C538
C538
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
IN
C541
C541
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
FBVDDQ
4
C540
C540
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
3
GND
4
+
PS1_FB_PHASE
COMMON
COMMON
GPIO7
Place near drain of the Top FET
Place near drain of the Top FET
C103
C103
.47UF
.47UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
G
3V3_F
R642
R642
10K
10K
5%
5%
0402
0402
1
+
330UF_16V
330UF_16V
12V_F
R546
R546
2.2
2.2
5%
5%
0402
0402
COMMON
COMMON
C532
C532
1UF
1UF
16V
16V
10%
10%
X5R
COMMON
COMMON
R514
R514
2.7K
2.7K
5%
5%
0402
0402
FB3_RC
20MIL
GND
X5R
0603
0603
COMMON
COMMON
DRIVE3_PEX1V2
20MIL
20MIL
GND
C123
C123
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
Rt
Rb
R511
R511
768
768
1%
1%
0603
0603
COMMON
COMMON
R510
R510
1.82K
1.82K
1%
1%
0603
0603
COMMON
COMMON
D
D
G
G
S
S
C509
C509
0402
0402
Q14
Q14
N-3055_TO263
N-3055_TO263
1000PF
1000PF
6.3V
6.3V
10%
10%
X7R
X7R
COMMON
COMMON
GND
FBVDDQ POWER SEQUENCING
1G1D1S
1G1D1S
3
D
Q505
Q505
BSS138
SOT23
SOT23
G
FBVDDQ_EN
1
COMMON
COMMON
S
2
50V
50V
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
SOT23
SOT23
GND
VCC_12
FB3_1V2
6549_FS_DIS
R530
R530
110K
110K
1%
1%
0402
0402
COMMON
COMMON
12V_F
3
Q504
Q504
MMBT3904
COMMON
COMMON
2
50V
50V
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
GND
12MIL
GND
R537
R537
10K
10K
5%
5%
0402
0402
COMMON
COMMON
U18
U18
VR_SW=0.8V, VR_LD=0.8V
VR_SW=0.8V, VR_LD=0.8V
SO14_I335X150
SO14_I335X150
SO14
SO14
COMMON
COMMON
8
VCC129VCC5
5
LDO_DR
6
LDO_FB
2
FS_DIS
12
PGND
7
GND
1G1D1S
1G1D1S
D
G
1
S
C534
1UF
C534
1UF
(OPT)
PVCC5
UGATE
PHASE
LGATE
SW_FB
COMP
ISL_PVCC5
0603
0603
R273
R273
10R
10R
(OPT)
PVCC5
10
PS1_FB_UGATE
14
PS1_FB_BOOT
1
BOOT
13
PS1_FB_LGATE
11
PS1_FB
4
PS1_FB_VO
3
16V
16V
10%
10%
X5R
X5R
COMMON
COMMON
R536
R536
0805
0805
PS1_FB_PHASE
C535
C535
1UF
1UF
COMMON
COMMON
0603
0603
X5R
X5R
16V
16V
10%
10%
5%
5%
GND
(OPT)
0
0
COMMON
COMMON
R761 4.02K
R761 4.02K
0603
0603
2.2
2.2
0805
0805
COMMON
COMMON
5%
5%
R555
R555
COMMON
COMMON
1%
1%
PS1_FB_UGATE_R
PS1_FB_BOOT_R
NV_RC_IN_M
C525
2200PFC525
2200PF
0603 50V
0603 50V
10%
10%
X7R
X7R
COMMON
COMMON
C523
0603 25V
0603 25V
COMMON
COMMON
.1UFC523
.1UF
10%
10%
X7R
X7R
COMMON
COMMON
C903
C903
.047UF
.047UF
10%
10%
16V
16V
X7R
X7R
0603
0603
DS
Q34
Q34
NTD4809NT4G
NTD4809NT4G
G
DS
Q35
Q35
NTD4806NT4G
NTD4806NT4G
G
GND
3V3_F
R525
R525
10K
10K
5%
5%
0402
0402
COMMON
COMMON
(OPT)
NVVDD_PGOOD
30
IN
GPIO7_FBVDDQ_SEL GPIO7_FBVDDQ_VSEL_R
21
IN
FBVDDQ = 1.792V 0
FBVDDQ = 1.999V
5
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
PAGE DETAIL
www.vinafix.vn
PS III: FBVDDQ Power Supply
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
28 32
28 32
28 32
<RevCode>
<RevCode>
<RevCode>
Page 31
A B C D E F G H
Page29: PS IV: NVVDD VID Control
1
2
3
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
NVVDD Voltage Select
NVVDD range 0.80V-1.40V
Regulator: ADP3208
Control via NV_GPIOs NV_VSEL[1..0]
VID
6 5 4 3 2 1 0 Vout
0 1 1 1 0 0 0 0.80V
0 1 1 0 1 0 0 0.85V
0 1 1 0 0 0 0 0.90V
0 1 0 1 1 0 0 0.95V
0 1 0 1 0 0 0 1.00V
0 1 0 0 1 0 0 1.05V
0 1 0 0 0 0 0 1.10V
0 0 1 1 1 0 0 1.15V
0 0 1 1 0 0 0 1.20V
0 0 1 0 1 0 0 1.25V
0 0 1 0 0 0 0 1.30V
0 0 0 1 1 0 0 1.35V
0 0 0 1 0 0 0 1.40V
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
PS IV: NVVDD VID Control
NVVDD
=> Default
=> Voltage1
=> Voltage2
4
G94
5
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Tuesday, July 01, 2008
Date:
Tuesday, July 01, 2008
Date:
Tuesday, July 01, 2008
Sheet of
Sheet of
Sheet of
HFDBA
29 32
29 32
29 32
<RevCode>
<RevCode>
<RevCode>
Page 32
A B C D E F G H
Page30: PS V: NVVDD Power Supply
GPIO5_VSEL0
IN
1
21
RT9258:Place R527 to NC
21
IN
R527
R527
GPIO6_VSEL1
0
0
0402
0402
COMMON
COMMON
5%
5%
3V3_F
VID0
GND
3V3_F
R1020
R1020
1K
1K
1G1D1S
1G1D1S
5%
5%
0402
0402
COMMON
COMMON
G
1
R1021
R1021
10K
10K
5%
5%
0402
0402
COMMON
COMMON
GND
2
12V
R539
R539
2.2
2.2
5%
5%
RT9258:Place R506 to 250ohm for droop setting
0402
0402
COMMON
COMMON
VCC
C508
3
C508
10UF
10UF
16V
16V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
GND GND
NVVDD Sequence
4
25,31,30
5
3V3_F
R1013
R1013
1K
1K
1%
1%
0402
0402
COMMON
COMMON
1G1D1S
1G1D1S
G
NVVDD_EN
IN
NVVDD_EN
1
R1014
R1014
1.1K
1.1K
1%
1%
0402
0402
COMMON
COMMON
GND
RT9258:Place R531 to 39Kohm
R531
R531
0
0
0402
GND
Q1007
Q1007
BSS138
SOT23
SOT23
COMMON
COMMON
28
0402
COMMON
COMMON
5%
5%
3
D
Q1006
Q1006
BSS138
SOT23
SOT23
G
1
COMMON
COMMON
S
50V
50V
2
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
GND
R528
R528
0
0
0402
0402
COMMON
COMMON
3
5%
5%
50V
50V
2
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
OUT
R1018
R1018
1K
1K
1G1D1S
1G1D1S
5%
5%
0402
0402
COMMON
COMMON
R1019
R1019
10K
10K
5%
5%
0402
0402
COMMON
COMMON
RT9258:Place R528 to 20Kohm
D
S
BOOT2_RC
C527
C527
.1UF
.1UF
COMMON
COMMON
0603
0603
25V
25V
10%
10%
X7R
X7R
PHASE2
LGATE2
R506 0
R506 0
5%
5%
(OPT)
GND
C120
C120
LGATE1
1UF
1UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
PHASE1
C524
C524
.1UF
.1UF
COMMON
COMMON
0603
0603
25V
25V
10%
10%
X7R
X7R
BOOT1_RC
12V_F
R1015
R1015
10K
10K
5%
5%
0402
0402
COMMON
COMMON
NVVDD_EN_PWR_Q
3
D
Q1002
Q1002
BSS138
SOT23
SOT23
COMMON
COMMON
S
50V
50V
2
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
GND
RT9258:Place R532 to 0ohm
R532
R532
R529
R529
NVVDD_PGOOD
COMMON0402
COMMON0402
GND
R752
R752
2.2R
2.2R
0805
0805
COMMON
COMMON
5%
5%
1G1D1S
1G1D1S
G
1
2
IN
R747
R747
2.2R
2.2R
0805
0805
COMMON
COMMON
5%
5%
19
20
21
22
23
24
25
D
S
3V3_F
0
0
0402
0402
COMMON
COMMON
5%
5%
0
0
0402
0402
COMMON
COMMON
5%
5%
UGATE2
UGATE1
Q1003
Q1003
BSS138
SOT23
SOT23
COMMON
COMMON
PHASE2
LGATE2
VID2
VCC
LGATE1
PHASE1
PGND
3
50V
50V
2
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
GND
R1024
R1024
1K
1K
5%
5%
0402
0402
COMMON
COMMON
(OPT)
BOOT2_R
BOOT1_R
3V3_F
1G1D1S
1G1D1S
3
D
Q1008
Q1008
SOT23
SOT23
G
1
COMMON
COMMON
S
2
FB
VID2
GND
5VCC
16
17
18
POK
BOOT2
UGATE2
BOOT125VCC3AGND4MODE5CSP1
UGATE1
1
5VCC
GND
SS
NVVDD_GND_SENSE_GPU
R1025
R1025
1K
1K
5%
5%
0402
0402
COMMON
COMMON
RT9258:Place R533 to NC
R533
R533
0
0
0402
0402
COMMON
COMMON
5%
5%
50V
50V
?
?
3.5R
3.5R
0.88A
0.88A
?
?
+/-20V
+/-20V
PS3_OUTEN10,11,17,26,27
RT9258:Place R534 to 10Kohm
R534
R534
0
0
(OPT)
0402
0402
COMMON
COMMON
5%
5%
GND GND
C897
C897
R522
R522
0.22UF
0.22UF
0
0
0402
0402
16V
16V
COMMON
COMMON
10%
10%
5%
5%
X7R
X7R
(OPT)
0402
0402
COMMON
COMMON
VID1
SS
U6
U6
13
15
14
APW7088QAE
APW7088QAE
FB
SS
VID1
COMP
DROOP
25 PGND
25 PGND
6
R521 0
R521 0
0402 COMMON
0402 COMMON
GND
C119
C119
R520
R520
1UF
1UF
0
0
16V
16V
0402
0402
COMMON
COMMON
10%
10%
5%
5%
X5R
X5R
0603
0603
COMMON
COMMON
GND
2-PHASE CONFIG
1-PHASE CONFIG 1
R503 0
R503 0
0402 COMMON
0402 COMMON
5%
5%
(OPT)
CSN2
CSN1
(OPT)
VID1
R507 0
R507 0
R523
R523
R541
R541
0
0
0402
0402
COMMON
COMMON
5%
5%
R756
R756
1K
1K
0603
0603
COMMON
COMMON
1%
1%
FB
FBFB
R755
R755
2.2K
2.2K
0603
0603
COMMON
COMMON
5%
5%
(OPT)
GND
COMP
12
VID0
11
VID0
DROOPVID2
10
CSP2
9
CSP2
CSN2
8
CSN1
7
CSP1
5%
5%
GND GND
COMMON0402
COMMON0402
5%
5%
(OPT)
0
0
0402
0402
COMMON
COMMON
5%
5%
R524
R524
820
820
0402
0402
COMMON
COMMON
5%
5%
C900
C900
4700pF
4700pF
25V
25V
10%
10%
RT9258: R535 NC
X7R
X7R
0402
0402
COMMON
COMMON
0
0
R535
R535
0402
0402
COMMON
COMMON
5%
5%
R526
R526
0
0
(OPT)
0402
0402
COMMON
COMMON
5%
5%
C922
C922
.022uF
.022uF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
(OPT) (OPT)
NVVDD_SENSE_GPU
NVVDD
FB_1
R754
R754
10K
10K
0603
0603
COMMON
COMMON
5%
5%
C899
C899
.01UF
.01UF
16V
16V
10%
10%
X7R
X7R
0603
0603
COMMON
COMMON
GND
RT9258:Place R526 to 42Kohm for FSW:250KHz
C923
C923
GND
.022uF
.022uF
25V
25V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
IN
RT9258:Place R538 to 0 ohm
R538
R538
0
0
0402
0402
COMMON
COMMON
C898
C898
5%
5%
100PF
100PF
(OPT)
50V
50V
10%
10%
NP0
NP0
GND
0603
0603
COMMON
COMMON
R753
R753
0R
0R
RT9258:Place R753 to 10Kohm
0603
0603
COMMON
COMMON
5%
5%
Vdroop = 0.05 * [( Ics1+Ics2 ) * Rdroop ]
GPIO3_NVVDD_PHASE
IN
21
GPIO3
0
GND
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
GPIO6 GPIO5 NVVDD
1
0
1.1V
R751
R751
NVVDD_DRVH1_G
0R
0R
0805
0805
COMMON
COMMON
5%
5%
R750
R750
LGATE1_R
0R
0R
0805
0805
COMMON
COMMON
5%
5%
R748
R748
0R
0R
0805
0805
COMMON
COMMON
5%
5%
R749
R749
LGATE2_R
0R
0R
0805
0805
COMMON
COMMON
5%
5%
PS V: NVVDD Power Supply
1.05V
1.0V
12V_EXT_F
Input Ripple = ~ 6.5A
C507
C507
C516
C516
10UF
10UF
10UF
10UF
+
+
C121
G
G
16V
16V
20%
20%
X5R
X5R
1206
1206
COMMON
COMMON
C104
C104
.47UF
.47UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
C517
C517
10UF
10UF
16V
16V
20%
20%
X5R
X5R
1206
1206
COMMON
COMMON
C107
C107
.47UF
.47UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
D
D
Q21
Q21
DPAKSGD
DPAKSGD
NTD4806NT4G
NTD4806NT4G
S
S
?
?
?
?
?
?
?
?
?
?
?
?
D
D
Q24
Q24
DPAKSGD
DPAKSGD
NTD4806NT4G
NTD4806NT4G
S
S
?
?
?
?
?
?
?
?
?
?
?
?
GND
C121
330UF_16V
330UF_16V
<P_esr>
<P_esr>
<P_mat>
<P_mat>
<Cfgdft>
<Cfgdft>
GND
C106
C106
.47UF
.47UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
GND
+
+
C122
C122
330UF_16V
330UF_16V
<P_esr>
<P_esr>
<P_mat>
<P_mat>
<Cfgdft>
<Cfgdft>
GND
C105
C105
.47UF
.47UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
GND
16V
16V
20%
20%
X5R
X5R
1206
1206
COMMON
COMMON
Place near Drain of Top FET
Place near Drain of Top FET
1G1D1S
1G1D1S
D
D
Q19
Q19
DPAKSGD
DPAKSGD
G
G
NTD4809NT4G
NTD4809NT4G
S
S
?
?
?
?
?
?
?
?
?
?
?
?
1G1D1S
1G1D1S
D
Q20
Q20
DPAKSGD
DPAKSGD
G
G
NTD4806NT4G
NTD4806NT4G
S
12V_EXT_F
1G1D1S
1G1D1S
D
Q22
Q22
DPAKSGD
DPAKSGD
G
G
NTD4809NT4G
NTD4809NT4G
S
1G1D1S
1G1D1S
D
Q23
Q23
DPAKSGD
DPAKSGD
G
G
NTD4806NT4G
NTD4806NT4G
S
D
S
?
?
?
?
?
?
?
?
?
?
?
?
GND
D
S
?
?
?
?
?
?
?
?
?
?
?
?
D
S
?
?
?
?
?
?
?
?
?
?
?
?
GND
1G1D1S
1G1D1S
G
Input Ripple = ~ 6.5A
C512
C512
10UF
10UF
16V
16V
20%
20%
X5R
X5R
1206
1206
COMMON
COMMON
Place near Drain of Top FET
Place near Drain of Top FET
1G1D1S
1G1D1S
G
01
00
2
UGATE1
PHASE1
LGATE1
UGATE2 NVVDD_DRVH2_G
PHASE2
LGATE2
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
R554
R554
2.2
2.2
5%
5%
1206
1206
COMMON
COMMON
NVVDD_SW1_RC
C537
C537
1500PF
1500PF
50V
50V
10%
10%
X7R
X7R
0603
0603
COMMON
COMMON
R553
R553
2.2
2.2
5%
5%
1206
1206
COMMON
COMMON
NVVDD_SW2_RC
C536
C536
1500PF
1500PF
50V
50V
10%
10%
X7R
X7R
0603
0603
COMMON
COMMON
L9 1.1UH
L9 1.1UH
2.0mOHM MAX
2.0mOHM MAX
?
?
2.0mOHM MAX
2.0mOHM MAX
R759
R759
2.7K
2.7K
0603
0603
COMMON
COMMON
5%
5%
CSP1
L12 1.1UH
L12 1.1UH
2.0mOHM MAX
2.0mOHM MAX
?
?
L8 0.5UH
L8 0.5UH
CHK_D2_13_5X12_5COMMON
CHK_D2_13_5X12_5COMMON
2.0mOHM MAX
2.0mOHM MAX
R757
R757
2.7K
2.7K
0603
0603
COMMON
COMMON
5%
5%
CSP2
NET VOLTAGE MAX_CURRENT MIN_WIDTH
COMMONCHK_D2_P8_5X3_5
COMMONCHK_D2_P8_5X3_5
(OPT)
L7 0.5UH
L7 0.5UH
COMMONCHK_D2_13_5X12_5
COMMONCHK_D2_13_5X12_5
C902
C902
0.22UF
0.22UF
R760
R760
10%
10%
715
715
16V
16V
0603
0603
X7R
X7R
0603
0603
COMMON
COMMON
1%
1%
COMMON
COMMON
CSN1
NVVDD Power Supply
NVVDD = 0.9-1.2V @ 40-50A
COMMONCHK_D2_P8_5X3_5
COMMONCHK_D2_P8_5X3_5
(OPT)
C545
C545
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
C901
C901
0.22UF
0.22UF
10%
10%
16V
16V
X7R
X7R
0603
0603
COMMON
COMMON
COMMON
R758
R758
715
715
0603
0603
COMMON
COMMON
1%
1%
CSN2
C546
C546
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
C544
C544
C543
C543
10UF
10UF
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
C542
C542
10UF
10UF
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
C87
C87
6.3V
6.3V
820uF_2.5V
820uF_2.5V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
C90
C90
C547
C547
10UF
10UF
820uF_2.5V
820uF_2.5V
6.3V
6.3V
20%
20%
X5R
X5R
0805
0805
COMMON
COMMON
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Custom
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
Date:
Monday, July 14, 2008
GND
C86
C86
820uF_2.5V
820uF_2.5V
C85
C85
820uF_2.5V
820uF_2.5V
GND
Sheet of
Sheet of
Sheet of
HFDBA
NVVDD
30 32
30 32
30 32
1
2
3
4
5
<RevCode>
<RevCode>
<RevCode>
www.vinafix.vn
Page 33
A B C D E F G H
Page31: Thermal Diode and Fan Control
1
2
ADT7473 External Fan/Thermal Control
10MIL
R59
0R59
0
21
21
THERMDP
IN
IN
10MIL
THERMDN
0402 COMMON
0402 COMMON
5%
5%
(OPT)
R61
5%
5%
(OPT)
C45
C45
100PF
100PF
50V
50V
(OPT)
5%
5%
C0G
C0G
0402
0402
0R61
0
COMMON
COMMON
COMMON0402
COMMON0402
R60
0
R60
0
R46
0
R46
0
0402
0402
COMMON
COMMON
5%
5%
R45 0
R45 0
(OPT)
COMMON
0402
COMMON
0402
5%
3V3_F 3V3_F
C46
C46
.1UF
.1UF
U4
U4
16V
16V
10%
10%
(OPT)
COMMON
COMMON
21
IN
21
I2CC_SDA_R
BI
10MIL
THERMDP_R
10MIL
THERMDN_R
XSOP16_PI025_049X040
XSOP16_PI025_049X040
X5R
X5R
COMMON
COMMON
0402
0402
GND
(OPT)
14
VCCP
1
SCL
16
13
12
11
10
2
GND
PWM1/XTO
SDA
D1+
D1-
D2+
D2-
GND
TACH1
PWM2/ALERT*
GPIO/THERM*
TACH2
PWM3
TACH3
3
VCC
15
6
5
9
7
8
4
C39
C39
.1UF
.1UF
16V
16V
(OPT)
10%
10%
X5R
X5R
0402
0402
COMMON
COMMON
GND
GPIO9_FAN_PWM_RI2CC_SCL_R
GPIO4_FAN_TACH_R
THERM_ALERT*
GPIO8_GPU_SLOW_R*
THERM_PWM3_ADDR_EN*
3V3_F
1
3
2
D9
D9
BAT54C
25V
25V
?
?
SOT23
SOT23
COMMON
COMMON
3V3_F
R47
R47
10K
10K
5%
5%
0402
0402
COMMON
COMMON
The ADT7473-1 requires a pull-up
to disable address select
5%
3V3_F 3V3_F
R51
R51
10K
10K
5%
5%
0402
0402
COMMON
COMMON
(OPT)
R54
R54
10K
10K
5%
5%
0402
0402
COMMON
COMMON
0402
0402
5%
5%
R44
R44
04020COMMON
04020COMMON
5%
5%
COMMON
COMMON
(OPT)
GPIO9_FAN_PWM
GPIO4_FAN_TACH
GPIO8_GPU_SLOW*
NVVDD_EN
0
0
R117
R117
COMMON
COMMON
?
?
0402
0402
12V_F
GND
C116
C116
.47UF
.47UF
16V
16V
10%
10%
X5R
X5R
0603
0603
COMMON
COMMON
21
IN
21
OUT
21,25
BI
25,30
OUT
PS3_OUTEN 10,11,23,26,27
FAN
1
J9
J9
2
?
?
?
?
3
?
?
4
BHEAD1X4_2MM_1
BHEAD1X4_2MM_1
COMMON
COMMON
GND
3
1
2
3
4
5
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
www.vinafix.vn
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
PAGE DETAIL
Thermal Diode and Fan Control
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
31 32
31 32
31 32
4
5
<RevCode>
<RevCode>
<RevCode>
Page 34
A B C D E F G H
Page32: Thermal, Mechanical, and Bracket
1
2
Thermal
COOLING SOLUTION
COOLING SOLUTION
12 connected mounting pins
12 connected mounting pins
123456789
EXTERNAL FAN HOLDER
EXTERNAL FAN HOLDER
2 connected mounting pins
2 connected mounting pins
1
2
MEC10
MEC9
MEC9
HSA_GPU_TM62_T_AL_1
HSA_GPU_TM62_T_AL_1
COMMON
COMMON
101112
GND
MEC12
MEC12
PLATE_D2
PLATE_D2
COMMON
COMMON
BGA SOCKET ASSY
BGA SOCKET ASSY
4 connected mounting pins
4 connected mounting pins
123
4
GND
BOARD STIFFENER
BOARD STIFFENER
4 connected mounting pins
4 connected mounting pins
123
4
MEC10
SKT_BGA_POGO_350X350_P100_SMT
SKT_BGA_POGO_350X350_P100_SMT
COMMON
COMMON
MEC8
MEC8
HSN_SAV_G94GPU_T_ST_1
HSN_SAV_G94GPU_T_ST_1
COMMON
COMMON
GND
3
4
5
EXTERNAL FAN HOLDER
EXTERNAL FAN HOLDER
2 connected mounting pins
2 connected mounting pins
1
2
MEC11
MEC11
PLATE_D2
PLATE_D2
COMMON
COMMON
MEC6
1
FM1
FM1
SW_FB
SW_FB
1
MEC6
MECH_PEX_BREAKOFF_RETENTION
MECH_PEX_BREAKOFF_RETENTION
COMMON
COMMON
FM7
FM7
SW_FB
SW_FB
FM3
FM3
FM2
FM2
SW_FB
SW_FB
SW_FB
SW_FB
1
1
FM6
FM6
FM4
FM4
SW_FB
SW_FB
SW_FB
SW_FB
1
1
FM8
FM8
1
SW_FB
SW_FB
FM5
FM5
SW_FB
SW_FB
1
SPECIAL MECHANIC
SPECIAL MECHANIC
No connected mounting pins
No connected mounting pins
EM1
EM1
1
1
E23_1P
E23_1P
EM2
EM2
1
1
E23_1P
E23_1P
EM5
EM5
1
1
E23_1P
E23_1P
EM3
EM3
1
1
E23_1P
E23_1P
EM4
EM4
1
1
E23_1P
E23_1P
EM6
EM6
1
1
E23_1P
E23_1P
BracketMechanical
BKT1
BKT1
BRKT_ATX_1TAB_1_DVI_DB15S_2_DVI
BRKT_ATX_1TAB_1_DVI_DB15S_2_DVI
COMMON
COMMON
1
GND
MECH. MOUNTING TOP
MECH. MOUNTING TOP
PCB
PCB
PCB
PCB
V127-40
V127-40
MEC1
MEC5
MEC5
STD
STD
COMMON
COMMON
MC1
MC1
MEC_SCREW_PH1
MEC_SCREW_PH1
COMMON
COMMON
J14
X_PIN1*2
X_PIN1*2
J11
J11
341
impedence
impedence
J14
2
GNDGND
J12
J12
X_PIN1*2
X_PIN1*2
GND GND GND
40 ohm / INT5 40 ohm / INT2 40 ohm / BOT
40 ohm / INT5 40 ohm / INT5
MEC1
STD
STD
COMMON
COMMON
MEC2
MEC2
STD
STD
COMMON
COMMON
MEC3
MEC3
STD
STD
COMMON
COMMON
MEC4
MEC4
STD
STD
COMMON
COMMON
X_PIN1*2
X_PIN1*2
J15
J15
1
2
3
4
5
ASSEMBLY P545 BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
C GE
PAGE DETAIL
www.vinafix.vn
Thermal, Mechanical, and Bracket
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
Micro-Star International Co., LTD.
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc>
Custom
<Doc>
Custom
<Doc>
Date:
Date:
Date:
Custom
Monday, July 14, 2008
Monday, July 14, 2008
Monday, July 14, 2008
Sheet of
Sheet of
Sheet of
HFDBA
32 32
32 32
32 32
<RevCode>
<RevCode>
<RevCode>
Loading...