Page 1
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
ASSEMBLY NVPN VARIANT
B
1
2
SKU
3
4
5
6
12
13
14
7
8
9
10
11
15
P616-A01: G96-GB1-128, MXM-II, 512/256MB GDDR3 (32/16Mx32),
LVDS, HDMI, DP, TV_OUT, VGA, HD AUDIO,
MXM 2.1a SPECIFICATION COMPLIANT
Table of Contents
Page 1: PAGE OVERVIEW
Page 2: PCI EXPRESS INTERFACE, PEX_VDD DECOUPLING CAPS
Page 3: FBA MEMORY INTERFACE & FBVDDQ DECOUPLING CAPS
Page 4: FRAME BUFFER A MEMORIES
Page 5: FBA & NVVDD DECOUPLING CAPS
Page 6: FBC MEMORY INTERFACE
Page 7: FRAME BUFFER C MEMORIES
Page 8: FBC DECOUPLING CAPS, GPU GND CONNECTIONS
Page 9: DAC A/B
Page 10: LVDS/TMDS OPTION (LINK A/B)
Page 11: DISPLAY PORT (LINK C)
Page 12: HDMI/DP OPTION (LINK E), TMDS (LINK F)
Page 13: MXM CONNECTOR
Page 14: GPIO, JTAG, TEMP SENSOR
Page 15: MIO A/B
Page 16: VBIOS, HDCP/I2C ROM, XTAL, SPREAD SPECTRUM, HD AUDIO
Page 17: NVVDD POWER SUPPLY
Page 18: FBVDDQ AND PEX_VDD POWER SUPPLY
Page 19: STRAPS, PEX SWING LEVEL, MECHANICAL
Base
SKU0001
SKU0002
SKU0003
SKU9998
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
600-10616-0000-001
600-10616-0001-001
600-10616-0002-001
600-10616-0003-001
600-10616-9998-001
<UNDEFINED?
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
BASE LEVEL GENERIC SCHEMATIC ONLY
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
Cancelled 128MB version
NB9P-GE2 G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
All components
<UNDEFINED?
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
PAGE OVERVIEW
www.vinafix.vn
600-10616-0001-001 A
p616_a01 1 OF 19
wbrenckle
03-DEC-2007
Page 2
1/16 PCI_EXPRESS
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
NC_18
NC_17
NC_16
NC_15
NC_14
NC_13
NC_12
NC_11
NC_10
NC_9
NC_8
NC_7
NC_6
NC_5
NC_4
NC_3
NC_2
NC_1
NC_19
VDD33_5
VDD33_4
VDD33_3
VDD33_2
VDD33_1
VDD_SENSE
GND_SENSE
PEX_PLLVDD
PEX_RFU1
PEX_RFU2
PEX_TERMP
TESTMODE
PEX_CLKREQ
PEX_RST
PEX_RX1
PEX_RX0
PEX_RX0
PEX_REFCLK
PEX_REFCLK
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
PEX_TX0
PEX_TX0
PEX_TX1
PEX_TX1
PEX_TX4
PEX_TX4
PEX_RX1
PEX_RX2
PEX_RX2
PEX_RX3
PEX_RX3
PEX_RX4
PEX_RX4
PEX_TX2
PEX_TX2
PEX_TX3
PEX_TX3
PEX_TX5
PEX_TX8
PEX_TX8
PEX_RX6
PEX_RX6
PEX_RX5
PEX_RX5
PEX_RX7
PEX_RX7
PEX_TX5
PEX_TX6
PEX_TX6
PEX_TX7
PEX_TX7
PEX_TX11
PEX_TX11
PEX_TX10
PEX_TX10
PEX_RX8
PEX_RX8
PEX_RX9
PEX_RX9
PEX_RX10
PEX_RX10
PEX_RX11
PEX_RX11
PEX_TX9
PEX_TX9
PEX_TX15
PEX_TX15
PEX_TX14
PEX_TX14
PEX_RX12
PEX_RX12
PEX_RX13
PEX_RX13
PEX_RX14
PEX_RX14
PEX_TX12
PEX_TX12
PEX_TX13
PEX_TX13
PEX_RX15
PEX_RX15
1/2 PCI-Express, Power
PEX_RST
CLK_REQ
PEX_REFCLK
PEX_TX2
PEX_RX2
PEX_RX2
PEX_TX1
PEX_TX1
PEX_RX1
PEX_TX0
PEX_TX0
PEX_RX1
PEX_RX0
PEX_REFCLK
PEX_RX0
PEX_TX2
PEX_RX6
PEX_TX5
PEX_TX5
PEX_RX6
PEX_TX4
PEX_TX4
PEX_RX5
PEX_RX5
PEX_TX3
PEX_RX4
PEX_RX4
PEX_TX3
PEX_RX3
PEX_RX3
PEX_TX9
PEX_TX9
PEX_RX9
PEX_RX9
PEX_TX8
PEX_TX8
PEX_RX8
PEX_RX8
PEX_TX7
PEX_TX7
PEX_RX7
PEX_RX7
PEX_TX6
PEX_TX6
PEX_RX11
PEX_RX10
PEX_RX10
PEX_TX10
PEX_TX10
PEX_RX13
PEX_TX12
PEX_TX12
PEX_RX12
PEX_RX12
PEX_RX11
PEX_TX11
PEX_TX11
PEX_RX13
PEX_LSW
PRSNT1
PEX_TX15
PEX_RX15
PEX_RX15
PEX_TX15
PEX_TX14
PEX_TX14
PEX_RX14
PEX_RX14
PEX_TX13
PEX_TX13
(1.5A)
3V3RUN
1V8RUN
(3.5A)
(0.5A)
2V5RUN
(4A)
PWR_SRC
(0.5A)
5VRUN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
PCI EXPRESS
GND
238
234
101
104
107
110
113
116
119
122
125
128
131
138
142
150
154
158
163
164
175
176
181
182
187
188
194
199
205
206
211
212
218
223
229
235
236
241
2
1
18
17
20
41
44
47
50
53
56
59
62
65
68
71
74
77
80
83
86
89
92
95
98
CN1
CON_MXM_X16_EDGE
NONPHY-X16
NONPHY-X16
COMMON
PEX_CLKREQ*
137
139
135
133
PEX_TX0_C
129
PEX_TX0_C*
127
132
130
PEX_TX1_C PEX_TX1_C
123
121
126
124
117
115
120
118
111
109
114
112
105
PEX_TX4_C* PEX_TX4_C
103
108
106
PEX_TX5_C PEX_TX5_C
99
PEX_TX5_C* PEX_TX5_C
97
102
100
93
91
96
94
PEX_TX7_C PEX_TX7_C
87
PEX_TX7_C* PEX_TX7_C
85
90
88
81
PEX_TX8_C*
79
84
82
75
73
78
76
69
67
72
70
63
61
66
64
57
55
60
58
51
49
54
52
45
43
48
46
PEX_TX15_C
39
PEX_TX15_C*
37
42
40
134
PEX_PRSNT*
38
GND
GND
R54
0
5%
0402
COMMON
PEX_TX0_C
PEX_TX0_C
PEX_TX1_C PEX_TX1_C*
PEX_TX2_C PEX_TX2_C
PEX_TX2_C PEX_TX2_C*
PEX_TX3_C PEX_TX3_C
PEX_TX3_C PEX_TX3_C*
PEX_TX4_C PEX_TX4_C
PEX_TX6_C PEX_TX6_C
PEX_TX6_C PEX_TX6_C*
PEX_TX8_C PEX_TX8_C
PEX_TX8_C
PEX_TX9_C PEX_TX9_C
PEX_TX9_C PEX_TX9_C*
PEX_TX10_C PEX_TX10_C
PEX_TX10_C PEX_TX10_C*
PEX_TX11_C PEX_TX11_C
PEX_TX11_C PEX_TX11_C*
PEX_TX12_C PEX_TX12_C
PEX_TX12_C PEX_TX12_C*
PEX_TX13_C PEX_TX13_C
PEX_TX13_C PEX_TX13_C*
PEX_TX14_C PEX_TX14_C
PEX_TX14_C PEX_TX14_C*
PEX_TX15_C
PEX_TX15_C
R69
0402
PEX_CLKREQ_R*
0
R55
NO STUFF
0402
5%
NV_CRITICAL NV_IMPEDANCE DIFF_PAIR NET_NAME
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
90DIFF
PEX_PRSNT_R*
0
COMMON
5%
1
1
1 .1UF C621
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
19.4A<
C630
C613
C606
C594
C590
C583
C575
C573
C570
C566
C563
C558
C554
.1UF
10% 16V
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF
10%
16V
.1UF C556
10%
16V
.1UF
10%
16V
.1UF C551
10%
16V 0402
NO STUFF FOR PRODUCTION
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
3V3_RUN
GND
GND
C533
.1UF
50V
10%
X7R
0603
COMMON
GND
C12
.1UF
6.3V
10%
X7R
0402
COMMON
GND
C549
.1UF
16V
10%
X7R
0402
COMMON
GND
C6
.1UF
6.3V
10%
X7R
0402
COMMON
C57
.1UF
6.3V
10%
X7R
0402
COMMON
C5
.1UF
6.3V
1V8_RUN
PWR_SRC
10%
X7R
0402
COMMON
2V5_RUN
5V_RUN
PEX_RST*
PEX_PLL_CLK_OUT
PEX_PLL_CLK_OUT*
PEX_REFCLK
PEX_REFCLK*
PEX_TX0
PEX_TX0*
PEX_RX0
PEX_RX0*
PEX_TX1*
PEX_RX1
PEX_RX1*
PEX_TX2
PEX_TX2*
PEX_RX2
PEX_RX2*
PEX_TX3
PEX_TX3*
PEX_RX3
PEX_RX3*
PEX_TX4
PEX_TX4*
PEX_RX4
PEX_RX4*
PEX_TX5
PEX_TX5*
PEX_RX5
PEX_RX5*
PEX_TX6
PEX_TX6*
PEX_RX6
PEX_RX6*
PEX_TX7
PEX_TX7*
PEX_RX7
PEX_RX7*
PEX_TX8
PEX_TX8*
PEX_RX8
PEX_RX8*
PEX_TX9
PEX_TX9*
PEX_RX9
PEX_RX9*
PEX_TX10
PEX_TX10*
PEX_RX10
PEX_RX10*
PEX_TX11
PEX_TX11*
PEX_RX11
PEX_RX11*
PEX_TX12
PEX_TX12*
PEX_RX12
PEX_RX12*
PEX_TX13
PEX_TX13*
PEX_RX13
PEX_RX13*
PEX_TX14
PEX_TX14*
PEX_RX14
PEX_RX14* PEX_RX14 1
PEX_RX15 PEX_RX15 1
PEX_RX15* PEX_RX15 1
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
R547
0402
5%
C624
0402
C617
0402
C608
0402
C600
0402
C592
0402
C584
0402
C581
0402
C574
0402
C572
0402
C567
0402
C565
0402
C559
0402
C557
0402
C555
0402
C553
0402
C550
0402
200
NO STUFF
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V 10%
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
.1UF
16V
.1UF
16V
.1UF
16V
.1UF
PEX_TCLK
90DIFF
90DIFF
100DIFF
100DIFF
90DIFF
90DIFF
COMMON
X7R 10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
90DIFF
90DIFF
90DIFF
90DIFF .1UF
X7R
10% 16V
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R 10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10% 16V
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10%
90DIFF
90DIFF
90DIFF
90DIFF
X7R
10% 16V
90DIFF
90DIFF
1
PEX_TCLK
1
PEX_RCLK
1
PEX_RCLK
1
PEX_TX0
1
PEX_TX0
1
PEX_RX0
1
PEX_RX0
1
PEX_TX1 1 PEX_TX1
PEX_TX1
1
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
COMMON
PEX_RX1
1
PEX_RX1
1
PEX_TX2
1
PEX_TX2
1
PEX_RX2
1
PEX_RX2
1
PEX_TX3
1
PEX_TX3
1
PEX_RX3
1
PEX_RX3
1
PEX_TX4
1
PEX_TX4
1
PEX_RX4
1
PEX_RX4
1
PEX_TX5
1
PEX_TX5
1
PEX_RX5
1
PEX_RX5
1
PEX_TX6
1
PEX_TX6
1
PEX_RX6
1
PEX_RX6
1
PEX_TX7
1
PEX_TX7
1
PEX_RX7
1
PEX_RX7
1
PEX_TX8
1
PEX_TX8
1
PEX_RX8
1
PEX_RX8
1
PEX_TX9
1
PEX_TX9
1
PEX_RX9
1
PEX_RX9
1
PEX_TX10
1
PEX_TX10
1
PEX_RX10
1
PEX_RX10
1
PEX_TX11
1
PEX_TX11
1
PEX_RX11
1
PEX_RX11
1
PEX_TX12
1
PEX_TX12
1
PEX_RX12
1
PEX_RX12
1
PEX_TX13
1
PEX_TX13
1
PEX_RX13
1
PEX_RX13
1
PEX_TX14
1
PEX_TX14
1
PEX_RX14
1
PEX_TX15 PEX_TX15 1
1 PEX_TX15 PEX_TX15*
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
PCI EXPRESS INTERFACE, PEX_VDD DECOUPLING CAPS
www.vinafix.vn
G1
G96-300-A1 DT
BGA969
COMMON
AM16
AR13
NET_NAME DIFF_PAIR NV_CRITICAL NV_IMPEDANCE
AJ17
AJ18
AR16
AR17
AL17
AM17
AP17
AN17
AM18
AM19
AN19
AP19
AL19
AK19
AR19
AR20
AL20
AM20
AP20
AN20
AM21
AM22
AN22
AP22
AL22
AK22
AR22
AR23
AL23
AM23
AP23
AN23
AM24
AM25
AN25
AP25
AL25
AK25
AR25
AR26
AL26
AM26
AP26
AN26
AM27
AM28
AN28
AP28
AL28
AK28
AR28
AR29
AK29
AL29
AP29
AN29
AM29
AM30
AN31
AP31
AM31
AM32
AR31
AR32
AN32
AP32
AR34
AP34
AK16
AK17
AK21
AK24
AK27
AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24
AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16
A2
AB7
AD6
AF6
AG6
AJ5
AK15
AL7
D35
E35
E7
F7
H32
M7
P6
P7
R7
U7
V6
J10
J11
J12
J13
J9
AD20
AD19
AG14
AG19
AG20
AG21
AP35
SNN_NC<1>
SNN_NC<2>
SNN_NC<3>
SNN_NC<4>
SNN_NC<5>
SNN_NC<6>
SNN_NC<7>
SNN_NC<8>
SNN_NC<9>
SNN_NC<10>
SNN_NC<11>
SNN_NC<12>
SNN_NC<13>
SNN_NC<14>
SNN_NC<15>
SNN_NC<16>
SNN_NC<17>
SNN_NC<18>
SNN_NC<19>
NVVDD_SENSE
NVVDD_GND_SENSE
PEX_PLLVDD
PEX_CAL_PD_VDDQ
PEX_CAL_PU_GND
PEX_TERMP
GPU_TESTMODE
PEX_VDD
C607
.1UF
6.3V
10%
X7R
0402
COMMON
C625
.1UF
6.3V
10%
X7R
0402
COMMON
C576
.1UF
6.3V
10%
X7R
0402
COMMON
C612
1UF
6.3V
10%
X5R
0402
COMMON
C601
1UF
6.3V
10%
X5R
0402
COMMON
C623
1UF
6.3V
10%
X5R
0402
COMMON
C593
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
GND
C651
.1UF
6.3V
10%
X7R
0402
COMMON
TP501
3V3_RUN
2.5G<>
C638
1UF
6.3V
10%
X5R
0402
COMMON
17.3G<
GND
PEX_VDD
VOLTAGE SOURCE_PWR_NET
COMMON 0603
22V
1.8V
2.5V
3.3V
5V
10nH
MIN_LINE_WIDTH
10MIL
10MIL
10MIL
MAX_CURRENT
LB508
PWR_SRC
1V8_RUN
2V5_RUN
3V3_RUN
5V_RUN
C696
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
GND
C688
2.2UF
6.3V
20%
X5R
0402
COMMON
PWR_SRC
1V8_RUN
2V5_RUN
3V3_RUN
5V_RUN
NVVDD_SENSE
NVVDD_GND_SENSE
PEX_PLLVDD
C632
.1UF
6.3V
10%
X7R
0402
COMMON
GND
PEX_VDD
17.3G<
2.49K
R544
COMMON
0402
1%
2.49K
R543
04021%COMMON
2.49K
R542
COMMON
0402
1%
1K
R67
COMMON
0402
5%
4.0A
3.5A
0.5A
1.5A
0.5A
1.1V
0V
1.1V
VOLTAGE
GND
600-10616-0001-001 A
p616_a01
wbrenckle
2 OF 19
03-DEC-2007
Page 3
2/16 FBA
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBA_CMD6
FBA_CMD5
FBA_CMD4
FBA_CMD3
FBA_CMD2
FBA_CMD1
FBA_CMD0
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_DEBUG
FBA_CMD30
FBA_CMD29
FBA_CMD28
FBA_CLK1
FBA_CLK1
FBA_CLK0
FBA_CLK0
FB_PLLAVDD
FB_DLLAVDD
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
RFU
RFU
RFU
RFU
RFU
RFU
FB_VREF
RFU
RFU
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
GPU MEMORY INTERFACE: PARTITION A
1
R536
0402
COMMON
464
1%
FBA_D<63..0>
3
Q507
RHU002N06
SOT323_1G1D1S
COMMON
2
LOW PERF:
HIGH PERF:
VREF = FBVDDQ * Rbot/(Rtop + Rbot)
RTop VREF
0.62V 511
0.72V
511
1.09V
511
1.26V
511
VREF = 0.40 * FBVDDQ
VREF = 0.70 * FBVDDQ
RBot
1k3
1k3
1k3 || 464
1k3 || 464
FBVDDQ
1.55V
1.8V
1.55V
1.8V
PERF MODE
Low
Low
High
High
4.5F<>
4.1H< 7.1H< 14.3G>
4.4F> 4.4A<>
4.5A<> 4.4F>
4.4F< 4.4A<>
GPIO10
High
High
Low
Low
FB_VREF1
GPIO10_FB_VREF_SW
4.4F<> 4.4A<>
FBA_DQM<7..0>
FBA_DQS_WP<7..0>
FBA_DQS_RN<7..0>
Rbot1
FBAC_VREF_CTL
1G1D1S
R537
0402
COMMON
R538
1.3K
0402
COMMON
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
FBVDDQ
511
1%
1%
GND
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
FBA_DQM<0>
FBA_DQM<1>
FBA_DQM<2>
FBA_DQM<3>
FBA_DQM<4>
FBA_DQM<5>
FBA_DQM<6>
FBA_DQM<7>
FBA_DQS_WP<0>
FBA_DQS_WP<1>
FBA_DQS_WP<2>
FBA_DQS_WP<3>
FBA_DQS_WP<4>
FBA_DQS_WP<5>
FBA_DQS_WP<6>
FBA_DQS_WP<7>
FBA_DQS_RN<0>
FBA_DQS_RN<1>
FBA_DQS_RN<2>
FBA_DQS_RN<3>
FBA_DQS_RN<4>
FBA_DQS_RN<5>
FBA_DQS_RN<6>
FBA_DQS_RN<7>
Rtop
Rbot
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
FBA_D<0>
FBA_D<1>
FBA_D<2>
FBA_D<3>
FBA_D<4>
FBA_D<5>
FBA_D<6>
FBA_D<7>
FBA_D<8>
FBA_D<9>
FBA_D<10>
FBA_D<11>
FBA_D<12>
FBA_D<13>
FBA_D<14>
FBA_D<15>
FBA_D<16>
FBA_D<17>
FBA_D<18>
FBA_D<19>
FBA_D<20>
FBA_D<21>
FBA_D<22>
FBA_D<23>
FBA_D<24>
FBA_D<25>
FBA_D<26>
FBA_D<27>
FBA_D<28>
FBA_D<29>
FBA_D<30>
FBA_D<31>
FBA_D<32>
FBA_D<33>
FBA_D<34>
FBA_D<35>
FBA_D<36>
FBA_D<37>
FBA_D<38>
FBA_D<39>
FBA_D<40>
FBA_D<41>
FBA_D<42>
FBA_D<43>
FBA_D<44>
FBA_D<45>
FBA_D<46>
FBA_D<47>
FBA_D<48>
FBA_D<49>
FBA_D<50>
FBA_D<51>
FBA_D<52>
FBA_D<53>
FBA_D<54>
FBA_D<55>
FBA_D<56>
FBA_D<57>
FBA_D<58>
FBA_D<59>
FBA_D<60>
FBA_D<61>
FBA_D<62>
FBA_D<63>
SNN_FBA_WDS0
SNN_FBA_WDS0*
SNN_FBA_WDS1
SNN_FBA_WDS1*
SNN_FBA_WDS2
SNN_FBA_WDS2*
SNN_FBA_WDS3
SNN_FBA_WDS3*
C579
.1UF
6.3V
10%
X7R
0402
COMMON
G1
G96-300-A1 DT
BGA969
COMMON
R30
R32
P31
N30
L31
M32
M30
L30
P33
P34
N35
P35
N34
L33
L32
N33
K31
K30
G30
K32
G32
H30
F30
G31
H33
K35
K33
G34
K34
E33
E34
G33
AG30
AH31
AG32
AF31
AF30
AD30
AC32
AE30
AE32
AF33
AF34
AE35
AE33
AE34
AC35
AB32
AN33
AK32
AL33
AM33
AL31
AK30
AJ30
AH30
AM35
AH33
AH35
AH32
AH34
AM34
AL35
AJ33
P30
P32
J30
H34
AF32
AF35
AL32
AL34
N31
L34
J32
H35
AE31
AC33
AJ32
AJ34
N32
L35
H31
G35
AD32
AC34
AJ31
AJ35
P29
R29
L29
M29
AD29
AE29
AG29
AH29
J27
J23
J24
J29
AA27
AA29
AA31
AB27
AB29
AC27
AD27
AE27
AJ28
B18
E21
G17
G18
G22
G8
G9
H29
J14
J15
J16
J17
J20
J21
J22
V32
W31
U31
Y32
AB35
AB34
W35
W33
W30
T34
T35
AB31
Y30
Y34
W32
AA30
AA32
Y33
U32
Y31
U34
Y35
W34
V30
U35
U30
U33
AB30
AB33
T33
W29
T32
T31
AC31
AC30
T30
AG27
AF27
FBA_CMD<0>
FBA_CMD<1>
FBA_CMD<2>
FBA_CMD<3>
FBA_CMD<4>
FBA_CMD<5>
FBA_CMD<6>
SNN_FBA_CMD7
FBA_CMD<8>
FBA_CMD<9>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<12>
FBA_CMD<13>
FBA_CMD<14>
FBA_CMD<15>
FBA_CMD<16>
FBA_CMD<17>
FBA_CMD<18>
FBA_CMD<19>
FBA_CMD<20>
FBA_CMD<21>
FBA_CMD<22>
FBA_CMD<23>
FBA_CMD<24>
FBA_CMD<25>
SNN_FBA_CMD26
FBA_CMD<27>
SNN_FBA_CMD28
SNN_FBA_CMD29
SNN_FBA_CMD30
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBA_DEBUG
FB_PLLAVDD
C578
.1UF
6.3V
10%
X7R
0402
COMMON
C622
.1UF
6.3V
10%
X7R
0402
COMMON
R533
0402
4.2A<
4.2A<
4.2D<
4.2D<
1%
0
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
C628
.1UF
6.3V
10%
X7R
0402
COMMON
C577
.1UF
6.3V
10%
X7R
0402
COMMON
FBA_CMD<27..0>
4.4F<
4.4F<
4.4F<
4.4F<
40.2
COMMON
FBVDDQ
6.5G< 3.5G<>
C597
.1UF
6.3V
10%
X7R
0402
COMMON
C580
.1UF
6.3V
10%
0402
COMMON
C505
1UF
6.3V
10%
X7R
0603
COMMON
C542
1UF
6.3V
10%
X7R X7R
0603
COMMON
C525
1UF
6.3V
10%
X7R
0603
COMMON
C546
1UF
6.3V
10%
X7R
0603
COMMON
4.1A< 4.4F<
FBVDDQ
C538
4.7UF
6.3V
20%
X5R
0603
COMMON
C527
4.7UF
6.3V
20%
X5R
0603
COMMON
3.4F>
6.5G<
GND
GND
VOLTAGE MIN_LINE_WIDTH NET
10MIL FB_PLLAVDD
1.2V
GND
www.vinafix.vn
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
FBA MEMORY INTERFACE & FBVDDQ DECOUPLING CAPS
600-10616-0001-001 A
p616_a01
wbrenckle
3 OF 19
03-DEC-2007
Page 4
BIBIININOUTINININOUTINBIBIBIBIBIBIBIBIOUTININ
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6
A7
BA2
CLK
CLK
NC/RFU
SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
NONMIRRORED
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSSQ
VSS
VSS
VSS
VSS
VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
VDDA (VDD)
RAS
CAS
CS0
WE
A0
A2
A3
A4
A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU
SEN (GND)
CLK
CLK
CKE
RESET
MF (GND)
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
FRAME BUFFER PARTITION A
4.4F< 3.2F>
Default
Termination
4.4F<
3.4E>
3.4E>
4.4F<
R514
0402
MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!
Minimize the stub length!!
GDDR3:
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
487
COMMON
1%
ZQ = 6x desired output
FBA_CMD<27..0>
CMD-Addr
136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD7 BA2
CMD19 A<0>
CMD25 A<1>
CMD22 0A<2>
CMD24 0A<3>
CMD0 0A<4>
CMD2 0A<5>
CMD4 1A<2>
CMD6 1A<3>
CMD5 1A<4>
CMD13 1A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD18 CKE
CMD15 RST
CMD14 A<12>
4.5F<>
1
10
11
8
19
25
22
24
0
2
21
16
23
20
17
9
12
3
27
18
14
15
R505
10K
5%
0402
COMMON
GND
4.4F<>
4.4F<
3.1C<>
3.3C<> 4.4F>
3.4C<
3.3C<> 4.4F>
FBA_D<63..0>
FBA_DQM<7..0>
FBA_DQS_RN<7..0>
FBA_DQS_WP<7..0>
FBA_DQM<0>
0
FBA_DQM<1>
1
FBA_DQM<2>
2
FBA_DQM<3>
3
FBA_DQM<4>
4
FBA_DQM<5>
5
FBA_DQM<6>
6
FBA_DQM<7>
7
FBA_DQS_RN<0>
0
FBA_DQS_RN<1>
1
FBA_DQS_RN<2>
2
FBA_DQS_RN<3>
3
FBA_DQS_RN<4>
4
FBA_DQS_RN<5>
5
FBA_DQS_RN<6>
6
FBA_DQS_RN<7>
7
FBA_DQS_WP<0>
0
FBA_DQS_WP<1>
1
FBA_DQS_WP<2>
2
FBA_DQS_WP<3>
3
FBA_DQS_WP<4>
4
FBA_DQS_WP<5>
5
FBA_DQS_WP<6>
6
FBA_DQS_WP<7>
7
FBA_CMD<1>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<8>
FBA_CMD<19>
FBA_CMD<25>
FBA_CMD<22>
FBA_CMD<24>
FBA_CMD<0>
FBA_CMD<2>
FBA_CMD<21>
FBA_CMD<16>
FBA_CMD<23>
FBA_CMD<20>
FBA_CMD<17>
FBA_CMD<9>
FBA_CMD<12>
FBA_CMD<3>
FBA_CMD<27>
FBA_CMD<18>
FBA_CLK0
FBA_CLK0*
SNN_FBA0_NC1
FBA_CMD<14>
1K
R504
COMMON
0402
1%
For Infineon ICT test
GND
FBA_CMD<15>
R513
10K
5%
0402
COMMON
GND
GND
FBVDDQ
0
1
2
3
4
5
6
7
32
33
34
35
36
37
38
39
M3
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
FBA_DEBUG1
V4
V9
A9
A4
FBA_ZQ0
R503
240
5%
0402
COMMON
GND
K1
K12
J1
J12
GND
FBA_D<0>
FBA_D<1>
FBA_D<2>
FBA_D<3>
FBA_D<4>
FBA_D<5>
FBA_D<6>
FBA_D<7>
FBA_DQM<0>
FBA_DQS_RN<0>
FBA_DQS_WP<0>
FBA_D<32>
FBA_D<33>
FBA_D<34> C2
FBA_D<35>
FBA_D<36>
FBA_D<37>
FBA_D<38>
FBA_D<39>
FBA_DQM<4>
FBA_DQS_RN<4>
FBA_DQS_WP<4>
B11
B10
C10
C11
F10
F11
E11
G10
E10
D10
D11
C3
G3
F2
F3
B2
B3
E2
E3
D3
D2
M3
DDR3BGA136
BGA136
BGA136
COMMON
M4
DDR3BGA136
BGA136
BGA136
COMMON
8
9
10
11
12
13
14
15
40
41
42
43
44
45
46
47
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
FBA_VREF0
H1
FBA_VREF2
H12
FBA_D<9>
FBA_D<10>
FBA_D<11>
FBA_D<12>
FBA_D<13>
FBA_D<14>
FBA_D<15>
FBA_DQM<1>
FBA_DQS_RN<1>
FBA_DQS_WP<1>
FBA_D<40>
FBA_D<41>
FBA_D<42>
FBA_D<43>
FBA_D<44>
FBA_D<45>
FBA_D<46>
FBA_D<47>
FBA_DQM<5>
FBA_DQS_RN<5>
FBA_DQS_WP<5>
FBVDDQ
FBVDDQ
GND
GND
G10
E11
F11
F10
C10
B10
B11
C11
E10
D10
D11
C3FBA_D<8>
B3
C2
B2
F3
E2
F2
G3
E3
D3
D2
ROUTE CMD BRANCH 56 OHM
(FROM TRUNK TO MEMORY)
Default
Termination
4.4F<
3.4E>
3.4E>
4.4F<
FBVDDQ
R83
511
Rtop
1%
0402
COMMON
1.3K
Rbot
1%
0402
COMMON
GND
M3
DDR3BGA136
BGA136
BGA136
COMMON
M4
DDR3BGA136
BGA136
BGA136
COMMON
16
17
18
19
20
21
22
23
48
49
50
51
52
53
54
55
487
R501
COMMON
0402
1%
MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!
Minimize the stub length!!
4.4F<>
C69 R84
.1UF
6.3V
10%
X7R
0402
COMMON
R75
511
0402
COMMON
R74
1.3K
0402
COMMON
FBVDDQ
1%
1%
Rtop
Rbot
GND
M3
DDR3BGA136
BGA136
BGA136
COMMON
FBA_D<16>
FBA_D<17>
FBA_D<18>
FBA_D<19>
FBA_D<20>
FBA_D<21>
FBA_D<22>
FBA_D<23>
FBA_DQM<2>
FBA_DQS_RN<2>
FBA_DQS_WP<2>
FBA_D<48>
FBA_D<49>
FBA_D<50>
FBA_D<51>
FBA_D<52>
FBA_D<53>
FBA_D<54>
FBA_D<55>
FBA_DQM<6>
FBA_DQS_RN<6>
FBA_DQS_WP<6>
M11
L10
R11
M10
T10
N11
R10
T11
N10
P10
P11
T3
R2
T2
R3
N2
M2
M3
L3
N3
P3
P2
M4
DDR3BGA136
BGA136
BGA136
COMMON
CMD-Addr
136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD7 BA2
CMD19 A<0>
CMD25 A<1>
CMD22 0A<2>
CMD24 0A<3>
CMD0 0A<4>
CMD2 0A<5>
CMD4 1A<2>
CMD6 1A<3>
CMD5 1A<4>
CMD13 1A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD18 CKE
CMD15 RST
CMD14 A<12>
ZQ = 6x desired output
GDDR3:
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
4.5F<>
C53
.1UF
6.3V
10%
X7R
0402
COMMON
24
25
26
27
28
29
30
31
56
57
58
59
60
61
62
63
FBVDDQ
4.5F<>
FBA_D<24>
FBA_D<25>
FBA_D<26>
FBA_D<27>
FBA_D<28>
FBA_D<29>
FBA_D<30>
FBA_D<31>
FBA_DQM<3>
FBA_DQS_RN<3>
FBA_DQS_WP<3>
FBA_D<56>
FBA_D<57>
FBA_D<58>
FBA_D<59>
FBA_D<60>
FBA_D<61>
FBA_D<62>
FBA_D<63>
FBA_DQM<7>
FBA_DQS_RN<7>
FBA_DQS_WP<7>
1
10
11
8
19
25
4
6
5
13
21
16
23
20
17
9
12
3
27
18
SNN_FBA1_NC1
14
R518
0402
For Infineon ICT test
GND
15
N2
L3
M3
R3
M2
T2
R2
T3
N3
P3
P2
R10
L10
M10
N11
M11
T10
R11
T11
N10
P10
P11
FBA_CMD<1>
FBA_CMD<10>
FBA_CMD<11>
FBA_CMD<8>
FBA_CMD<19>
FBA_CMD<25>
FBA_CMD<4>
FBA_CMD<6>
FBA_CMD<5>
FBA_CMD<13>
FBA_CMD<21>
FBA_CMD<16>
FBA_CMD<23>
FBA_CMD<17>
FBA_CMD<9>
FBA_CMD<12>
FBA_CMD<3>
FBA_CMD<27>
FBA_CMD<18>
FBA_CLK1
FBA_CLK1*
FBA_CMD<14>
1K
COMMON
1%
FBA_CMD<15>
GND
FBVDDQ
M3
DDR3BGA136
BGA136
BGA136
COMMON
M4
DDR3BGA136
BGA136
BGA136
COMMON
FBA_DEBUG2
FBA_ZQ1
R502
240
5%
0402
COMMON
GND
H10
H11
K10
K11
J11
J10
K12
J12
F9
H4
F4
K9
M9
K4
H2
K3
L4
K2
M4FBA_CMD<20>
L9
G9
G4
H3
H9
J2
J3
V4
V9
A9
A4
K1
J1
M4
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
FBVDDQ
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBA_VREF1
FBA_VREF3
FBVDDQ
GND
GND
FBA_VREF1
FBA_VREF2
FBA_VREF0
FBA_VREF3
R78
511
0402
COMMON
1.3K
0402
COMMON
VREF
FBVDDQ
1%
1%
GND
0.62V
1.09V
1.26V
Rtop
Rbot
R76
0402
R73
0402
R82
0402
R87
0402
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
RTop
511
511 0.72V
511
511
C54 C70 R77 R85
.1UF
6.3V
10%
X7R
0402
COMMON
FBA_VREFCTL1
464
COMMON
1%
464
COMMON
1%
1%
1%
464
COMMON
464
COMMON
SOT323_1G1D1S
RHU002N06
Low Power VREF Switch
3
1G1D1S
Q504
COMMON
2
GND
1k3
1k3
1k3 || 464
1k3 || 464
4.4F<>
VREF = 0.40 * FBVDDQ
VREF = 0.70 * FBVDDQ
FBVDDQ RBot
1.55V Low
1.55V High
1.8V
FBVDDQ
R86
511
Rtop
1%
0402
COMMON
1.3K
Rbot
1%
0402
COMMON
LOW PERF:
HIGH PERF:
VREF = FBVDDQ * Rbot/(Rtop + Rbot)
GND
NET RULES for FrameBuffer A
NV_IMPEDANCE
80DIFF
80DIFF
80DIFF
80DIFF
50OHM
50OHM
50OHM
50OHM
50OHM
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
4.5A<>
4.4A<>
4.4A<>
4.4A<>
4.1A<
4.2A<
4.2A<
4.2D<
4.2D<
3.4E>
3.4E>
3.4E>
3.4E>
3.3C<>
3.4C<
3.3C<>
3.1C<>
3.2F>
4.3D<>
4.3G<>
4.3E<>
4.3H<>
4.2B>
4.2E>
3.5B<>
FBA_CLK0
FBA_CLK0*
FBA_CLK1
FBA_CLK1*
FBA_DQS_WP<7..0>
FBA_DQS_RN<7..0>
FBA_DQM<7..0>
FBA_D<63..0>
FBA_CMD<25..0>
FBA_VREF0
FBA_VREF1
FBA_VREF2
FBA_VREF3
FBA_ZQ0
FBA_ZQ1
FB_VREF1
NV_CRITICAL NET
1
1
1
1
1
1
1
1
1
VOLTAGE NET
1.47V
1.47V
1.47V
1.47V
1.47V
1.47V
1.47V
GPIO10_FB_VREF_SW1
PERF MODE
Low 1.8V
High
.1UF
6.3V
10%
X7R
0402
COMMON
DIFFPAIR
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
MIN_WIDTH MAX_CURRENT
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
4.5F<>
GPIO10
High
High
Low
Low
3.5B<
14.3G>
7.1H<
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NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
FRAME BUFFER A MEMORIES
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4 OF 19
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1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
FRAME BUFFER: PARTITION A DECOUPLING
NVVDD POWER AND DECOUPLING
FBVDDQ
C503
1UF
X7R
0603
COMMON
C501
1UF
6.3V
10%
X7R
0603
COMMON
C526
1UF
6.3V 6.3V
10% 10% 10%
X7R
0603
COMMON
C531
1UF
6.3V
10%
X7R
0603
COMMON
C509
.1UF
6.3V
X7R
0402
COMMON
C508
.1UF
6.3V
10%
X7R
0402
COMMON
C521
C516
.1UF
.1UF
6.3V
6.3V
X7R
X7R
0402
0402
COMMON COMMON
C532
C511
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON COMMON
C537
.1UF
6.3V
X7R
0402
COMMON
C510
.1UF
6.3V
10%
X7R
0402
COMMON
C539
.1UF
6.3V
10% 10% 10% 10%
X7R
0402
COMMON
C515
.1UF
6.3V
10%
X7R
0402
COMMON
Decoupling for
FBA North Side
Memory Device.
GND
FBVDDQ
C517
1UF
6.3V
10%
X7R
0603
COMMON
C540
1UF
6.3V
10%
X7R
COMMON
C506
1UF
6.3V
10%
X7R
0603
COMMON
C518
1UF
6.3V
10%
X7R
0603 0603
COMMON
C530
.1UF
6.3V
10%
X7R
0402
COMMON
C520
.1UF
6.3V
10%
X7R
0402
COMMON
C512
.1UF
6.3V
10%
X7R
0402
COMMON
C507
.1UF
6.3V
10%
X7R
0402
COMMON
C528
.1UF
6.3V
10%
X7R
0402
COMMON
C535
.1UF
6.3V
10%
X7R
0402
COMMON
C529
.1UF
6.3V
10%
X7R
0402
COMMON
C541
.1UF
6.3V
10%
X7R
0402
COMMON
C519
.1UF
6.3V
10%
X7R
0402
COMMON
C504
.1UF
6.3V
10%
X7R
0402
COMMON
Decoupling for
FBA South Side
Memory Device.
GND
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
FBA & NVVDD DECOUPLING CAPS
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4.7UF4.7UF 4.7UF
6.3V
6.3V
20%
20%
X5R
X5R
0603
0603
COMMON
COMMON
C616
C643
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C631
C602
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON COMMON COMMON
C619
C596
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
C639
C626
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
NVVDD
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC24
AC25
AD12
AD14
AD16
AD18
AD22
AD24
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
M12
M14
M16
M18
M20
M22
M24
P11
P13
P15
P17
P19
C586 C650C587
6.3V
20%
X5R
0603
COMMON
C634
.1UF
6.3V
10%
X7R
0402
COMMON
C615
.022UF
6.3V
10%
X7R
0402
C636
.1UF
6.3V
10%
X7R
0402
COMMON
C603
.022UF
6.3V
10%
X7R
0402
COMMON
G1
G96-300-A1 DT
BGA969
COMMON
NVVDD
C637
C620
.022UF
.022UF
6.3V
10%
X7R
0402
COMMON
C595
.022UF
6.3V
10%
X7R
0402
COMMON COMMON
C611
.022UF
6.3V
10%
X7R
0402
COMMON
C610
.022UF
6.3V
10%
X7R
0402
COMMON
6.3V
10%
X7R
0402
COMMON
C633
.022UF
6.3V
10%
X7R
0402
C609
.022UF
6.3V
10%
X7R
0402
COMMON
C627
.022UF
6.3V
10%
X7R
0402
COMMON
GND
GND
GND
GND
GND
NVVDD
P21
P23
P25
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
T12
T14
T16
T18
T20
T22
T24
V11
V13
V15
V17
V19
V21
V23
V25
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
Y12
Y14
Y16
Y18
Y20
Y22
Y24
600-10616-0001-001 A
p616_a01
wbrenckle
5 OF 19
03-DEC-2007
Page 6
G96 only
3/16 FBC
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD6
FBC_CMD5
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CLK0
FBC_CMD30
FBC_CMD29
FBC_CMD28
FBC_DEBUG
FBC_CLK1
FBC_CLK1
FBC_CLK0
FBAC_PLLAVDD
FBCAL_TERM_GND
FBCAL_PU_GND
FBCAL_PD_VDDQ
FBAC_DLLAVDD
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_RN7
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN2
FBC_DQS_RN1
FBC_DQS_RN0
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
FBC_DQS_RN3
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
GPU MEMORY INTERFACE: PARTITION C
MIN_LINE_WIDTH NET
7.4A<> 7.4F<>
7.4F>
7.5A<>
7.4F<
7.4A<>
7.4F>
7.4A<>
FBC_DQM<7..0>
FBC_DQS_WP<7..0>
FBC_DQS_RN<7..0>
FBC_D<63..0>
G1
G96-300-A1 DT
BGA969
COMMON
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
FBC_DQM<0>
0
FBC_DQM<1>
1
FBC_DQM<2>
2
FBC_DQM<3>
3
FBC_DQM<4> D27
4
FBC_DQM<5>
5
FBC_DQM<6>
6
FBC_DQM<7>
7
FBC_DQS_WP<0>
0
FBC_DQS_WP<1>
1
FBC_DQS_WP<2>
2
FBC_DQS_WP<3>
3
FBC_DQS_WP<4>
4
FBC_DQS_WP<5>
5
FBC_DQS_WP<6>
6
FBC_DQS_WP<7>
7
FBC_DQS_RN<0>
0
FBC_DQS_RN<1>
1
FBC_DQS_RN<2>
2
FBC_DQS_RN<3>
3
FBC_DQS_RN<4>
4
FBC_DQS_RN<5>
5
FBC_DQS_RN<6>
6
FBC_DQS_RN<7>
7
FBC_D<0>
FBC_D<1>
FBC_D<2>
FBC_D<3>
FBC_D<4>
FBC_D<5>
FBC_D<6>
FBC_D<7>
FBC_D<9>
FBC_D<10>
FBC_D<11>
FBC_D<12>
FBC_D<13>
FBC_D<14>
FBC_D<15>
FBC_D<16>
FBC_D<17>
FBC_D<18>
FBC_D<19>
FBC_D<20>
FBC_D<21>
FBC_D<22>
FBC_D<23>
FBC_D<24>
FBC_D<25>
FBC_D<26>
FBC_D<27>
FBC_D<29>
FBC_D<30>
FBC_D<31>
FBC_D<32>
FBC_D<33>
FBC_D<34>
FBC_D<35>
FBC_D<36>
FBC_D<37>
FBC_D<38>
FBC_D<39>
FBC_D<40>
FBC_D<41>
FBC_D<42>
FBC_D<43>
FBC_D<44>
FBC_D<45>
FBC_D<46>
FBC_D<47>
FBC_D<48>
FBC_D<50>
FBC_D<51>
FBC_D<52>
FBC_D<53>
FBC_D<54>
FBC_D<55>
FBC_D<56>
FBC_D<57>
FBC_D<58>
FBC_D<59>
FBC_D<60>
FBC_D<61>
FBC_D<62>
FBC_D<63>
SNN_FBC_WDS0
SNN_FBC_WDS0*
SNN_FBC_WDS1
SNN_FBC_WDS1*
SNN_FBC_WDS2
SNN_FBC_WDS2*
SNN_FBC_WDS3
D11
E11
F10
D8
F8
F9
E8
F12
B11FBC_D<8>
C13
A11
B8
A8
C8
C11
C10
D12
E13
F17
F15
F16
E16
F14
F13
D13
A13
B13
A14
C16FBC_D<28>
A17
B16
D16
D24
D26
E25
F25
F27
E28
F28
D29
A25
B25
D25
C26
C28
B28
A28
A29
E29
F29FBC_D<49>
D30
E31
C33
D33
F32
E32
B29
C29
B31
C31
B32
C32
B34
B35
F11
D10
D15
A16
D28
D34
A34
E10
A10
D14
C14
E26
B26
D32
A32
D9
B10
E14
B14
F26
A26
D31
A31
G11
G12
G14
G15
G24
G25
G27
G28SNN_FBC_WDS3*
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
FBC MEMORY INTERFACE
www.vinafix.vn
N27
P27
R27
T27
U27
U29
V27
V29
V34
W27
Y27
C17
B19
D18
F21
A23
D21
B23
E20
G21
F20
F19
F23
A22
C22
B17
F24
C25
E22
C20
B22
A19
D22
D20
E19
D19
F18
C19
F22
C23
B20
A20
E17
D17
D23
E23
G19
J19
J18
K27
L27
M27
FBVDDQ
FBC_CMD<0>
FBC_CMD<1>
FBC_CMD<2>
FBC_CMD<3>
FBC_CMD<4>
FBC_CMD<5>
FBC_CMD<6>
SNN_FBC_CMD7
FBC_CMD<8>
FBC_CMD<9>
FBC_CMD<10>
FBC_CMD<11>
FBC_CMD<12>
FBC_CMD<13>
FBC_CMD<14>
FBC_CMD<15>
FBC_CMD<16>
FBC_CMD<17>
FBC_CMD<18>
FBC_CMD<19>
FBC_CMD<20>
FBC_CMD<21>
FBC_CMD<22>
FBC_CMD<23>
FBC_CMD<24>
FBC_CMD<25>
SNN_FBC_CMD26
FBC_CMD<27>
SNN_FBC_CMD28
SNN_FBC_CMD29
SNN_FBC_CMD30
NET_NAME
FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*
FBC_DEBUG
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
R545
0402
R535
0402
R540
0402
R541
0402
0
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
40.2
COMMON
1%
1%
1%
1%
FBC_CMD<27..0>
7.4F< 7.2A<
7.4F<
7.2A<
7.4F<
7.2D<
7.4F<
7.2D<
FB_PLLAVDD
FBVDDQ
44.2
COMMON
30.9
COMMON
40.2
COMMON
GND
FBVDDQ
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
10MIL
10MIL
10MIL
7.4F< 7.1A<
3.5G<> 3.4F>
220R@100MHz
C582
C614
.1UF
.1UF
6.3V
6.3V
10%
10%
X7R
X7R
0402
0402
COMMON
COMMON
GND
GND
C618
2.2UF
6.3V
20%
X5R
0402
COMMON
GND
C585
4.7UF
6.3V
20%
X5R
0603
COMMON
GND
COMMON BEAD_0402
PEX_VDD
LB501
600-10616-0001-001 A
p616_a01
wbrenckle
6 OF 19
03-DEC-2007
Page 7
OUTBIININBIBIBIBIBIBIOUTININ
MIRRORED
VDD
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSS
VREF
VREF
VSS
VSSA (GND)
VSSA (GND)
VDDA (VDD)
VDDA (VDD)
A12 (32Mx32)
RAS
CS0
CAS
A0
WE
A3
A2
A1
A5
A4
A11
A10
A8/AP
BA1
BA0
A9
A6
A7
BA2
CLK
CLK
NC/RFU
SEN (GND)
CKE
MF (VDDQ)
RESET
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
NONMIRRORED
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSSQ
VSS
VSS
VSS
VSS
VSS
VREF
VREF
A12 (32Mx32)
VDDA (VDD)
VSSA (GND)
VSSA (GND)
VDDA (VDD)
RAS
CAS
CS0
WE
A0
A2
A3
A4
A5
A1
BA1
A11
A10
A8/AP
BA0
A9
A7
A6
BA2
NC/RFU
SEN (GND)
CLK
CLK
CKE
RESET
MF (GND)
ZQ
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
WDQS
RDQS
DQ0
DQ4
DQ1
DQ2
DQ3
DQ5
DQM
DQ7
DQ6
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
FRAME BUFFER PARTITION C
Default
Termination
7.4F<
6.4F>
6.4F>
7.4F<
7.4F<>
7.4F>
7.4F<
7.4F>
6.1C<>
6.3C<>
6.4C<>
6.4C<>
R563
0402
MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!
Minimize the stub length!!
GDDR3:
6.3G> 7.4F<
487
COMMON
1%
ZQ = 6x desired output
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
FBC_D<63..0>
FBC_DQM<7..0>
FBC_DQS_RN<7..0>
FBC_DQS_WP<7..0>
FBC_CMD<27..0>
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
CMD-Addr
136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD7 BA2
CMD19 A<0>
CMD25 A<1>
CMD22 0A<2>
CMD24 0A<3>
CMD0 0A<4>
CMD2 0A<5>
CMD4 1A<2>
CMD6 1A<3>
CMD5 1A<4>
CMD13 1A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD18 CKE
CMD15 RST
7.5F<>
FBC_DQM<0>
FBC_DQM<1>
FBC_DQM<2>
FBC_DQM<3>
FBC_DQM<4>
FBC_DQM<5>
FBC_DQM<6>
FBC_DQM<7>
FBC_DQS_RN<0>
FBC_DQS_RN<1>
FBC_DQS_RN<2>
FBC_DQS_RN<3>
FBC_DQS_RN<4>
FBC_DQS_RN<5>
FBC_DQS_RN<6>
FBC_DQS_RN<7>
FBC_DQS_WP<0>
FBC_DQS_WP<1>
FBC_DQS_WP<2>
FBC_DQS_WP<3>
FBC_DQS_WP<4>
FBC_DQS_WP<5>
FBC_DQS_WP<6>
FBC_DQS_WP<7>
GND
R546
10K
5%
0402
COMMON
1
10
11
8
19
25
22
24
0
2
21
16
23
20
17
9
12
3
27
18
14
GND
15
FBC_CMD<22>
FBC_CMD<24>
FBC_CMD<0>
FBC_CMD<2>
R568
0402
For Infineon ICT test
GND
FBC_CMD<1>
FBC_CMD<10>
FBC_CMD<11>
FBC_CMD<8>
FBC_CMD<19>
FBC_CMD<25>
FBC_CMD<21>
FBC_CMD<16>
FBC_CMD<23>
FBC_CMD<20>
FBC_CMD<17>
FBC_CMD<9>
FBC_CMD<12>
FBC_CMD<3>
FBC_CMD<27>
FBC_CMD<18>
FBC_CLK0
FBC_CLK0*
SNN_FBC0_NC1
FBC_CMD<14>
1K
COMMON
1%
FBC_CMD<15>
R566
10K
5%
0402
COMMON
FBVDDQ
0
1
2
3
4
5
6
7
32
33
34
35
36
37
38
39
FBC_DEBUG1
FBC_ZQ0
R549
240
5%
0402
COMMON
GND GND
GND
FBC_D<0>
FBC_D<1>
FBC_D<2>
FBC_D<3>
FBC_D<4>
FBC_D<5>
FBC_D<6>
FBC_DQM<0>
FBC_DQS_RN<0>
FBC_DQS_WP<0>
FBC_D<32>
FBC_D<33>
FBC_D<34>
FBC_D<35>
FBC_D<36>
FBC_D<37>
FBC_D<38>
FBC_D<39>
FBC_DQM<4>
FBC_DQS_RN<4>
M1
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
H3
F4
H9
F9
K4
H2
K3
M4
K9
H11
K10
L9
K11
M9
K2
L4
G4
G9
H10
H4
J11
J10
J2
J3
V4
V9
A9
A4
K1
K12
J1
J12
L10
M11
N11
R11
R10
T10
T11
M10FBC_D<7>
N10
P10
P11
B3
C3
B2
C2
F2
E2
F3
G3
E3
D3
D2FBC_DQS_WP<4>
M1
DDR3BGA136
BGA136
BGA136
COMMON
M2
DDR3BGA136
BGA136
BGA136
COMMON
PERF MODE
Low 1.55V
Low 1.8V
High 1.55V
High
7.5F<>
4.1H< 14.3G> 3.5B<
GPIO10
High
High
Low
Low
FBVDDQ
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBC_VREF0
FBC_VREF2
FBVDDQ
GND
GND
ROUTE CMD BRANCH 56 OHM
(FROM TRUNK TO MEMORY)
6.4F> 7.4F<
FBVDDQ
R53
511
Rtop
1%
0402
COMMON
R50
1.3K
Rbot
1%
0402
COMMON
GND
487
Default
Termination
6.4F>
7.4F<
C49
.1UF
6.3V
10%
X7R
0402
COMMON
R534
COMMON
0402
1%
MUST BE PLACED as close as possible to
the BGA memory on the line BEFORE the
MEMORY pin!!
Minimize the stub length!!
GDDR3:
7.5F<>
FBVDDQ
R52
511
Rtop
1%
0402
COMMON
R49
1.3K
0402
COMMON
1%
Rbot
C43
.1UF
6.3V
10%
X7R
0402
COMMON
impedence of DQ drivers
Impedence = 240 / 6 = 40 ohm
7.5F<>
CMD-Addr
136 ADDR
CMD1 RAS*
CMD10 CAS*
CMD11 WE*
CMD8 CS0*
CMD7 BA2
CMD19 A<0>
CMD25 A<1>
CMD22 0A<2>
CMD24 0A<3>
CMD0 0A<4>
CMD2 0A<5>
CMD4 1A<2>
CMD6 1A<3>
CMD5 1A<4>
CMD13 1A<5>
CMD21 A<6>
CMD16 A<7>
CMD23 A<8>
CMD20 A<9>
CMD17 A<10>
CMD9 A<11>
CMD12 BA0
CMD3 BA1
CMD18 CKE
CMD15 RST
FBVDDQ
7.5F<>
ZQ = 6x desired output
FBC_CMD<1>
1
FBC_CMD<10>
10
FBC_CMD<11>
11
FBC_CMD<8>
8
FBC_CMD<19>
19
FBC_CMD<25>
25
FBC_CMD<4>
4
FBC_CMD<6>
6
FBC_CMD<5>
5
FBC_CMD<13>
13
FBC_CMD<21>
21
FBC_CMD<16>
16
FBC_CMD<23>
23
FBC_CMD<20>
20
FBC_CMD<17>
17
FBC_CMD<9>
9
FBC_CMD<12>
12
FBC_CMD<3>
3
FBC_CMD<27>
27
FBC_CMD<18>
18
FBC_CLK1 J11
SNN_FBC1_NC1
FBC_CMD<14>
14
R532
0402
For Infineon ICT test
GND
FBC_CMD<15> V9
15
1%
FBC_DEBUG2
1K
COMMON
FBC_ZQ1
GND
FBVDDQ
R539
240
5%
0402
COMMON
GND
H10
H11
K10
K11
J10FBC_CLK1*
K12
J12
F9
H4
F4
K9
M9
K4
H2
K3
L4
K2
M4
L9
G9
G4
H3
H9
J2
J3
V4
A9
A4
K1
J1
M2
DDR3BGA136
PACK_TYPE=BGA136
VERSION=BGA136
COMMON
F1
M1
A2
V2
A11
V11
F12
M12
A1
C1
E1
N1
R1
V1
C4
E4
J4
N4
R4
C9
E9
J9
N9
R9
A12
C12
E12
N12
R12
V12
B1
D1
P1
T1
G2
L2
B4
D4
P4
T4
B9
D9
P9
T9
G11
L11
B12
D12
P12
T12
G1
L1
A3
V3
A10
V10
G12
L12
H1
H12
FBC_VREF1
FBC_VREF3
FBVDDQ
FBVDDQ
GND
GND
R64
511
0402
COMMON
R63
1.3K
0402
COMMON
FBVDDQ
1%
1%
GND
FBC_VREF2
FBC_VREF1
FBC_VREF0
FBC_VREF3
VREF RTop
Rtop
Rbot
CONTINUOUS_CURRENT=200mA
0.62V 511
1.09V
1.26V
C51
.1UF
6.3V
10%
X7R
0402
COMMON
FBC_VREFCTL
464
R46
COMMON
0402
1%
464
R61
COMMON
0402
1%
464
R48
COMMON
0402
1%
464
R62
COMMON
0402
1%
MAX_VOLTAGE=60V
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
RHU002N06
SOT323_1G1D1S
LOW PERF:
HIGH PERF:
VREF = FBVDDQ * Rbot/(Rtop + Rbot)
RBot
1k3
1k3
511 0.72V
1k3 || 464
511
1k3 || 464
511
7.5F<>
COMMON
1.3K
COMMON
Low Power VREF Switch
3
1G1D1S
Q506
COMMON
GND
VREF = 0.40 * FBVDDQ
VREF = 0.70 * FBVDDQ
R66
511
0402
R65
0402
2
FBVDDQ
1%
1%
GND
1
FBVDDQ
1.8V
Rtop
Rbot
GPIO10_FB_VREF_SW
C52
.1UF
6.3V
10%
X7R
0402
COMMON
GND
NET RULES for FrameBuffer C
7.2A<
7.2A<
7.2D<
7.2D<
7.5A<>
7.4A<>
7.4A<>
6.4F>
6.4F>
6.4F>
6.4F>
6.4C<>
6.4C<>
6.3C<>
6.1C<>
7.4A<>
7.3D<>
7.3G<>
7.3E<>
7.3H<>
7.2B>
7.2E>
FBC_CLK0
FBC_CLK0*
FBC_CLK1
FBC_CLK1*
FBC_DQS_WP<7..0>
FBC_DQS_RN<7..0>
FBC_DQM<7..0>
FBC_D<63..0>
FBC_CMD<25..0>
FBC_VREF0
FBC_VREF1
FBC_VREF2
FBC_VREF3
FBC_ZQ0
FBC_ZQ1
NV_CRITICAL NET
1
1
1
1
1
1
1
1
1
VOLTAGE NET
1.47V
1.47V
1.47V
1.47V
1.47V
1.47V
NV_IMPEDANCE
80DIFF FBC_CLK0
50OHM
50OHM
50OHM
50OHM
50OHM
MAX_CURRENT
0.02A
0.02A
0.02A
0.02A
0.02A
0.02A
DIFFPAIR
FBC_CLK080DIFF
FBC_CLK180DIFF
FBC_CLK180DIFF
MIN_WIDTH
12MIL
12MIL
12MIL
12MIL
12MIL
12MIL
FBC_D<8>
8
FBC_D<9>
9
FBC_D<10>
10
FBC_D<11>
11
FBC_D<12>
12
FBC_D<13>
13
FBC_D<14>
14
FBC_D<15>
15
FBC_DQM<1>
FBC_DQS_RN<1>
FBC_DQS_WP<1>
FBC_D<40>
40
FBC_D<41> C10
41
FBC_D<42>
42
FBC_D<43>
43
FBC_D<44>
44
FBC_D<45>
45
FBC_D<46>
46
FBC_D<47>
47
FBC_DQM<5>
FBC_DQS_RN<5>
FBC_DQS_WP<5>
B10
C11
B11
E11
G10
F10
F11
E10
D10
D11
M3
L3
N2
R2
T2
R3
M2
T3
N3
P3
P2
M1
DDR3BGA136
BGA136
BGA136
COMMON
M2
DDR3BGA136
BGA136
BGA136
COMMON
FBC_D<16>
16
FBC_D<17>
17
FBC_D<18>
18
FBC_D<19>
19
FBC_D<20>
20
FBC_D<21>
21
FBC_D<22>
22
FBC_D<23>
23
FBC_DQM<2>
FBC_DQS_RN<2>
FBC_DQS_WP<2>
FBC_D<48>
48
FBC_D<49> L10
49
FBC_D<50>
50
FBC_D<51>
51
FBC_D<52>
52
FBC_D<53>
53
FBC_D<54>
54
FBC_D<55>
55
FBC_DQM<6>
FBC_DQS_RN<6>
F10
G10
C10
C11
B11
B10
E11
F11
E10
D10
D11
M11
N11
R11
M10
R10
T11
T10
N10
P10
P11FBC_DQS_WP<6>
M1
DDR3BGA136
BGA136
BGA136
COMMON
M2
DDR3BGA136
BGA136
BGA136
COMMON
24
25
26
27
28
29
30
31
56
57
58
59
60
61
62
63
FBC_D<24>
FBC_D<25>
FBC_D<26>
FBC_D<27>
FBC_D<28>
FBC_D<29>
FBC_D<30>
FBC_D<31>
FBC_DQM<3>
FBC_DQS_RN<3>
FBC_DQS_WP<3>
FBC_D<56>
FBC_D<57>
FBC_D<58>
FBC_D<59>
FBC_D<60>
FBC_D<61>
FBC_D<62>
FBC_D<63>
FBC_DQM<7>
FBC_DQS_RN<7>
FBC_DQS_WP<7>
F3
G3
F2
C3
C2
B2
E2
B3
E3
D3
D2
L3
M2
N2
R2
M3
R3
T2
T3
N3
P3
P2
M1
DDR3BGA136
BGA136
BGA136
COMMON
M2
DDR3BGA136
BGA136
BGA136
COMMON
7.1A< 6.3G>
www.vinafix.vn
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
FRAME BUFFER C MEMORIES
600-10616-0001-001 A
p616_a01
wbrenckle
7 OF 19
03-DEC-2007
Page 8
15/16 GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
FRAMEBUFFER: PARTITION C DECOUPLING
FBVDDQ
C641
C659
C667
C668
C665
1UF
6.3V
10%
X7R
0603
COMMON
C640
1UF
6.3V
10%
X7R
0603
COMMON
C664
1UF
6.3V
10%
X7R
0603
COMMON
C663
1UF
6.3V
10%
X7R
0603
COMMON
FBVDDQ
C589
1UF
6.3V
10%
X7R
0603
COMMON
C560
1UF
10%
X7R
0603
C562
1UF
6.3V
10%
X7R
0603
COMMON
C571
1UF
10%
X7R
0603
COMMON COMMON
C642
.1UF
6.3V
10%
X7R
0402
COMMON
C644
.1UF
6.3V
10%
X7R
0402
COMMON
C591
.1UF
6.3V
10%
X7R
0402
COMMON
C561
.1UF
10%
X7R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C669
.1UF
6.3V
10%
X7R
0402
COMMON
C569
.1UF
6.3V
10%
X7R
0402
COMMON
C564
.1UF
10%
X7R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C666
.1UF
6.3V
10%
X7R
0402
COMMON
C605
.1UF
6.3V
10%
X7R
0402
COMMON
C598
.1UF
6.3V 6.3V 6.3V 6.3V 6.3V
10%
X7R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C648
.1UF
6.3V
10%
X7R
0402
COMMON
C588
.1UF
6.3V
10%
X7R
0402
COMMON
C568
.1UF
10%
X7R
0402
COMMON
.1UF
6.3V
10%
X7R
0402
COMMON
C654
.1UF
6.3V
10%
X7R
0402
COMMON
C604
.1UF
6.3V
10%
X7R
0402
COMMON
C599
.1UF
6.3V 6.3V
10%
X7R
0402
COMMON
GND
GND
Decoupling for
FBC West Side
Memory Device.
Decoupling for
FBC East Side
Memory Device.
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
FBC DECOUPLING CAPS, GPU GND CONNECTIONS
www.vinafix.vn
NVVDD GROUND
G1
G96-300-A1 DT
BGA969
COMMON
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA2
AA20
AA21
AA22
AA23
AA24
AA25
AA34
AA5
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AC9
AD11
AD13
AD15
AD17
AD2
AD21
AD23
AD25
AD31
AD34
AD5
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AG2
AG31
AG34
AG5
AK2
AK31
AK34
AK5
AL12
AL15
AL18
AL21
AL24
AL27
AL30
AL6
AL9
AN2
AN34
AP12
AP15
AP18
AP21
AP24
AP27
AP3
AP30
AP33
AP6
AP9
B12
B15
B21
B24
B27
B3
B30
B33
B6
B9
C2
C34
E12
GND
E15
E18
E24
E27
E30
E6
E9
F2
F31
F34
F5
J2
J31
J34
J5
L9
M11
M13
M15
M17
M19
M2
M21
M23
M25
M31
M34
M5
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
N23
N24
N25
P12
P14
P16
P18
P20
P22
P24
R2
R31
R34
R5
T11
T13
T15
T17
T19
T21
T23
T25
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25
V12
V14
V16
V18
V2
V20
V22
V24
V31
V5
V9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25
GND
600-10616-0001-001 A
p616_a01
wbrenckle
8 OF 19
03-DEC-2007
Page 9
4/16 DACA
I2CA_SCL
I2CA_SDA
DACA_VSYNC
DACA_HSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_VREF
DACA_VDD
DACA_RSET
5/16 DACB(TV)
DACB_CSYNC
DACB_BLUE
DACB_GREEN
DACB_RED
DACB_VREF
DACB_VDD
DACB_RSET
6/16 DACC
I2CB_SCL
I2CB_SDA
DACC_VSYNC
DACC_HSYNC
DACC_RED
DACC_GREEN
DACC_BLUE
DACC_VREF
DACC_VDD
DACC_RSET
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
3V3_RUN
PLACE NEAR BGA
LB3
240R@100MHz
COMMON BEAD_0402
C19
4.7UF
6.3V
X5R
0603
COMMON
PLACE NEAR BALLS
12mil
C18
4.7UF
10%
X5R
0603
COMMON
C635
1UF
6.3V
10% 6.3V
X5R
0402
COMMON
C629
.1UF
10%
6.3V
X7R
0402
COMMON
C645
.1UF
10%
6.3V
10%
X7R
0402
COMMON
DAC_A
G1
G96-300-A1 DT
BGA969
COMMON
AJ12
AK12
AK13
R551
124
1%
0402
COMMON
DACA_VDD
DACA_VREF
DACA_RSET
I2CA_SCL
G1
I2CA_SDA
G4
DACA_HSYNC
AM13
DACA_VSYNC
AL13
37.5 OHM TRACE TO 150R RESISITOR
DACA_RED
AM15
DACA_GREEN
AM14
0402
R34
5%
AL14 DACA_BLUE
33
COMMON
0402
3V3_RUN
R33
R36
4.7K
4.7K
5%
5%
0402
0402
COMMON
COMMON
33
R32
COMMON
5%
1
1
1
NV_IMPEDANCE NV_CRITICAL
50OHM
50OHM
50OHM
I2CA_SCL_R
I2CA_SDA_R
13.3A<
13.3A<>
13.3A<
13.3A<
13.3A<
13.3A<
13.3A<
GND
GND
R548
150
1%
0402
COMMON
GND
R550
150
1%
0402
COMMON
R552
150
1%
0402
COMMON
GND GND
Place close to GPU
3V3_RUN
LB510
BEAD_0402
PLACE NEAR BGA
240R@100MHz
COMMON
12mil
C691
4.7UF
6.3V
X5R
0603
COMMON
GND
C685
4.7UF
10%
6.3V
10%
X5R
0603
COMMON
C683
1UF
6.3V
X5R
0402
COMMON
PLACE NEAR BALLS
C661
.1UF
10%
6.3V
X7R
0402
COMMON
C26
.1UF
10%
6.3V
10%
X7R
0402
COMMON
R558
124
1%
0402
COMMON
GND
3V3_RUN
3
4
D1
DLPA006
SC70-6_TRIPLE
85V
160MA
COMMON
2
DACB_RED
3V3_RUN
3
4
D2
DLPA006
SC70-6_TRIPLE
85V
160MA
COMMON
2
C50
.1UF
X7R
0402
COMMON
DACA_RED
10% 6.3V
DAC_B
DACB_VDD
DACB_VREF
DACB_RSET
DAC_C
AC6
AC5
AB6
G1
G96-300-A1 DT
BGA969
COMMON
SNN_DACB_CSYNC
AB5
37.5 OHM TRACE TO 150R RESISITOR
DACB_REDAA4
DACB_GREEN
AB4
DACB_BLUEY4
R565
150
1%
0402
COMMON
GND
Place close to GPU
GND
R560
150
1%
0402
COMMON
3V3_RUN
GND
R564
150
1%
0402
COMMON
1
1
50OHM
50OHM
50OHM 1
13.3A<
13.2A<
13.3A<
1
6
GND
5
D1
DLPA006
SC70-6_TRIPLE
85V
COMMON
2
GND
5
D1
DLPA006
SC70-6_TRIPLE
85V
160MA
COMMON
2
GND
GND
DACC_VDD
SNN_DACC_VREF
SNN_DACC_RSET
R561
10K
5%
0402
COMMON
AG7
AK6
AH7
G1
G96-300-A1 DT
BGA969
COMMON
G3
AM1
AK4
AL4
AJ4
I2CB_SCL
I2CB_SDAG2
SNN_DACC_HSYNC
SNN_DACC_VSYNCAM2
SNN_DACC_RED
SNN_DACC_GREEN
SNN_DACC_BLUE
GND
5
D2
DLPA006
1
DACB_GREEN
SC70-6_TRIPLE
85V
160MA 160MA
COMMON
2
GND
DACA_GREEN
GND
5
D2
DLPA006
DACB_BLUE
6
85V
160MA
COMMON
2
DACA_BLUE SC70-6_TRIPLE
GND
TV DAC ESD PROTECTION
DAC A/B
www.vinafix.vn
R572
4.7K
5%
0402
COMMON
R577
4.7K
5%
0402
COMMON
12.1H<>
12.1H<>
600-10616-0001-001 A
p616_a01
wbrenckle 03-DEC-2007
9 OF 19
Page 10
7/16 IFPAB
IFPA_TXC
IFPA_TXC
IFPA_TXD0
IFPA_TXD0
IFPA_TXD1
IFPA_TXD1
IFPA_TXD2
IFPA_TXD2
IFPA_TXD3
IFPA_TXD3
IFPB_TXC
IFPB_TXC
IFPB_TXD4
IFPB_TXD4
IFPB_TXD5
IFPB_TXD5
IFPB_TXD6
IFPB_TXD6
IFPB_TXD7
IFPB_TXD7
IFPAB_RSET
IFPAB_PLLVDD
IFPB_IOVDD
IFPA_IOVDD
BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
Loading options for IFPAB outputs
Option #1) IFPAB outputs to LVDS only.
Option #2) IFPAB outputs to DVI-C only.
Option #3) Controlled with GPIO9, IFPAB dynamically outputs to LVDS or DVI-C.
LVDS/TMDS(link A&B)
G1
G96-300-A1 DT
BGA969
COMMON
AM12
AM11
AL8
AK9
AJ11
AG9
AG10
AM8
AM9
AM10
AL10
AK10
AL11
AK11
AN13
AP13
AP8
AN8
AN10
AP10
AR10
AR11
AP11
AN11
IFPA_TXC*
IFPA_TXC
IFPA_TXD0*
IFPA_TXD0
IFPA_TXD1*
IFPA_TXD1
IFPA_TXD2*
IFPA_TXD2
IFPA_TXD3*
IFPA_TXD3
IFPB_TXC*
IFPB_TXC
IFPB_TXD4*
IFPB_TXD4
IFPB_TXD5*
IFPB_TXD5
IFPB_TXD6*
IFPB_TXD6
IFPB_TXD7*
IFPB_TXD7
13.4F<
10.5B<>
10.5B<>
13.4F<
10.4B<>
13.4F<
13.4F<
10.4B<>
13.4F<
13.4F<
10.5B<>
13.4F<
13.4F<
10.5B<>
13.4F<
13.4F<
10.5B<>
13.4F<
13.4F<
10.5B<>
13.3F<
13.3F<
10.5B<>
13.4F<
13.4F<
10.5B<>
13.4F<
13.4F<
10.5B<>
13.4F<
13.4F<
GPIO9_LVDS_SYS*
3V3_RUN
PS_VCC_FB
PS_PGOOD_FB
R579
10K
0402
NO STUFF
1G1D1S
1
3V3_RUN
5%
1G1D1S
1
3
Q512
SI2305DS
SOT23_1G1D1S
NO STUFF
2
MAX_VOLTAGE=-8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-8V
3
Q513
RHU002N06
SOT323_1G1D1S
NO STUFF
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
GND
GPIO9_TMDS_IOVDD_EN*
1G1D1S
1
1V8_RUN
option #3.
IFPAB_IOVDD_LVDS_ISOL
3
Q516
RHU002N06
SOT323_1G1D1S
NO STUFF
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
1G1D1S
1
R578
C671
10K
.1UF
5%
6.3V
0402
10%
NO STUFF
X7R
0402
NO STUFF
GND
Load for Load for
option
#1.
IFPAB_IOVDD_SW3
Q511
SI2305DS
SOT23_1G1D1S
NO STUFF
2
MAX_VOLTAGE=-8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-8V
R601
0
5%
0402
COMMON
Load for
options
#1 and #3.
RHU002N06
SOT323_1G1D1S
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
16mil
COMMON
R_DS_ON=4R
Q515
3
2
1G1D1S
1
current on
IFPx_IOVDD.
IFPx_IOVDD
Sequencing
Circuit
LB503
R600
10K
5%
0402
COMMON
C686
1UF
10V
10%
X5R
0603
COMMON
GND
Delay to
control
inrush
COMMON BEAD_0402
240R@100MHz
1V8_RUN
LB505
GND
240R@100MHz
COMMON BEAD_0402
C670
4.7UF
6.3V
10%
X5R
0603
COMMON
1.8V
12mil
C676
C682
2.2UF
4.7UF
6.3V
6.3V
20%
10%
X5R
X5R
0402
0603
COMMON
COMMON
GND
3.3V
16mil
C674
C679
1UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0603
COMMON
COMMON
C658
.1UF
6.3V
10%
X7R
0402
COMMON
IFPAB_PLLVDD
IFPAB_RSET
R553
1K
1%
0402
NO STUFF
IFPAB_IOVDD
C657
.1UF
6.3V
10%
X7R
0402
COMMON
18.2A>
18.2A>
14.3G>
Load for option #2.
LB502
240R@100MHz
NO STUFF BEAD_0402
Load for
options
#2 and #3.
IFPAB_IOVDD_EN*
13.4A>
17.2A<
1G1D1S
MOBILE_RUNPWROK
1
3
Q514
RHU002N06
SOT323_1G1D1S
NO STUFF
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
GND
C692
.1UF
6.3V
10%
X7R
0402
NO STUFF
3V3_RUN
1G1D1S
R596
10K
5%
0402
NO STUFF
3
Q510
SI2305DS
SOT23_1G1D1S
1
NO STUFF
2
MAX_VOLTAGE=-8V
CONTINUOUS_CURRENT=-2.8A@70C
R_DS_ON=52mR
MAX_CURRENT=-6A
MAX_WATTAGE=0.8W@70C
V_BE_GS=+/-8V
IFPAB_IOVDD_3V3 16mil
TMDS backdrive protection
(LVDS CONSTRAINTS)
DIFFPAIR NET NAME
IFPA_TXD0*
IFPA_TXD0
IFPA_TXD1*
IFPA_TXD1
IFPA_TXD2*
IFPA_TXD2
IFPA_TXD3*
IFPA_TXD3
IFPB_TXD4*
IFPB_TXD4
IFPB_TXD5*
IFPB_TXD5
IFPB_TXD6*
IFPB_TXD6
IFPB_TXD7*
IFPB_TXD7
IFPA_TXC*
IFPA_TXC
IFPB_TXC*
IFPB_TXC
IFPATXD0
IFPATXD0
IFPATXD1
IFPATXD1
IFPATXD2
IFPATXD2
IFPATXD3
IFPATXD3
IFPBTXD4
IFPBTXD4
IFPBTXD5
IFPBTXC 1
IFPBTXC 1
NV_CRITICAL_NET
1
1
1
1
1
1
1
1
1
1
1
1 IFPBTXD5
1 IFPBTXD6
1 IFPBTXD6
1 IFPBTXD7
1 IFPBTXD7
1 IFPATXC
1 IFPATXC
NV_IMPEDANCE
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
13.4F<
10.1H>
10.1H>
13.4F<
13.4F<
10.2H>
10.2H>
13.4F<
13.4F<
10.2H>
10.2H>
13.4F<
13.4F<
10.2H>
10.2H>
13.4F<
10.2H>
13.3F<
13.4F<
10.2H>
10.2H>
13.4F<
10.2H>
13.4F<
10.2H>
13.4F<
10.1H>
13.4F<
10.2H>
13.4F<
13.3F< 10.2H>
13.4F< 10.2H>
13.4F< 10.3H>
13.4F< 10.1H>
13.4F< 10.2H>
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
LVDS/TMDS OPTION (LINK A/B)
www.vinafix.vn
600-10616-0001-001 A
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wbrenckle
10 OF 19
03-DEC-2007
Page 11
IFPC
IFPD
8/16 IFPCD
AUX
AUX
DPL0_TXD2
DPL0_TXD2
DPL1_TXD1
DPL1_TXD1
DPL2_TXD0
DPL2_TXD0
DPL3_TXC
DPL3_TXC
AUX
AUX
DPL1_TXD1
DPL1_TXD1
DPL2_TXD0
DPL2_TXD0
DPL3_TXC
DPL3_TXC
DPL0_TXD2
DPL0_TXD2
IFPCD_RSET
IFPCD_PLLVDD
IFPD_IOVDD
IFPC_IOVDD
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
3.3V
3.3V
14.3H<>
14.3H>
5V_RUN
14.3E>
DP MODE detection by SW
3V3_RUN
R22
0402
1G1D1S
1
I2CD_SDA
I2CD_SCL
10K
COMMON
5%
GPIO16_MODE_C
R30
4.7K
5%
0402
COMMON
33
R21
COMMON
0402
31
1G1D1S
4
Q6
FDC6301N
SOT23_6D_1G1D1S
COMMON
2
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=0.22A
R_DS_ON=5R
MAX_CURRENT=0.5A
MAX_WATTAGE=0.7W@125C
V_BE_GS=8V
3V3_RUN
R28
R20
100K
100K
5%
5%
0402
0402
COMMON COMMON
GPIO16_MODE_C*
CONTINUOUS_CURRENT=200mA
6
Q6
FDC6301N
SOT23_6D_1G1D1S
COMMON
5
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=0.22A
MAX_WATTAGE=0.7W@125C
R_DS_ON=5R
MAX_CURRENT=0.5A
V_BE_GS=8V
1G1D1S
DP(link C)
G1
G96-300-A1 DT
BGA969
COMMON
R29
0402
RHU002N06
SOT323_1G1D1S
COMMON
MAX_VOLTAGE=60V
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
3
Q2
2
GND
5%
33
COMMON
5%
GND
IFPCF_AUXG_R*
IFPCF_AUXG_R
DP_L3_C*
DP_L3_C
DP_L2_C*
DP_L2_C
DP_L1_C*
DP_L1_C
DP_L0_C*
DP_L0_C
11.5D<>
11.5D<>
11.5D<>
11.5D<>
11.5D<>
11.5D<>
11.5D<>
11.5D<>
13.3F<
13.3F<
13.3F<
13.3F<
13.3F<
13.3F<
13.3F<
13.3F<
11.5B<>
11.5B<>
12.3F>
12.3F>
1V8_RUN
LB509
240R@100MHz
NO STUFF BEAD_0402
.1UF
DP_AUXG*
AN3
DP_AUXG
AP2
1.8V
12mil
C689 C697
6.3V
10%
X5R
0603
NO STUFF
GND
6.3V
20%
X5R
0402
NO STUFF
10%
X7R
0402
NO STUFF
IFPC_PLLVDD
IFPC_RSET
R554C649
1K4.7UF 2.2UF .1UF
1% 6.3V
0402
NO STUFF
AJ9
AK7
AR2
AP1
AM4
AM3
AM5
AL5
AM6
AM7
DP_L3*
DP_L3
DP_L2*
DP_L2
DP_L1*
DP_L1
DP_L0*
DP_L0
C21
0402
C47
0402
C41
0402
C48
0402
C36
0402
NO STUFF
.1UF
NO STUFF
.1UF
NO STUFF
.1UF
NO STUFF
.1UF
NO STUFF
C22
C44
0402
C39
0402
C45
0402
C34
0402
.1UF
NO STUFF 0402
.1UF
NO STUFF
.1UF
NO STUFF
.1UF
NO STUFF
.1UF
NO STUFF
PEX_VDD
LB1
BEAD_0402
120R@100MHz
NO STUFF
1UF
6.3V
10%
X5R
0402
NO STUFF
16mil 1.1V
C660C16 C17
.1UF
6.3V
10%
X7R
0402
NO STUFF
16mil
C1
4.7UF
6.3V
10%
X5R
0603
NO STUFF
GND
4.7UF
6.3V
10%
X5R
0603
NO STUFF
GND
AJ8
AK8IFPC_IOVDD
AN4
AP4
AR4
AR5
AP5
AN5
AN7
AP7
AR7
AR8
SNN_IFPD_AUX*
SNN_IFPD_AUX
SNN_IFPD_L3*
SNN_IFPD_L3
SNN_IFPD_L2*
SNN_IFPD_L2
SNN_IFPD_L1*
SNN_IFPD_L1
SNN_IFPD_L0*
SNN_IFPD_L0
DP_AUX_C*
DP_AUX_C
11.5D<>
11.5D<>
13.3A<>
13.3A<>
(DP CONSTRAINTS)
DP_AUX*
DP_AUX
IFPCF_AUXG_R*
IFPCF_AUXG_R
DP_L3*
DP_L3
DP_L2*
DP_L2
DP_L1*
DP_L1
DP_L0*
DP_L0
DP_AUX
DP_AUX
DP_AUX1
DP_AUX1
DP_L3
DP_L3
DP_L2
DP_L2
DP_L1
DP_L1
DP_L0
DP_L0
NV_IMPEDANCE NV_CRITICAL_NET DIFFPAIR NET NAME
11.2F<
11.3F<
12.3F>
12.3F>
DP_AUX_C*
DP_AUX_C
DP_L3_C*
DP_L3_C
DP_L2_C*
DP_L2_C
DP_L1_C*
DP_L1_C
DP_L0_C*
DP_L0_C
1
1
1
1
1
1
1
1
1
1
1
1
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
DIFFPAIR NET NAME
DP_AUX3
DP_AUX3
DPL3C
DPL3C
DPL2C
DPL2C
DPL1C
DPL1C
DPL0C
DPL0C
1
1
1
1
1
1
1
1
1
1
NV_IMPEDANCE NV_CRITICAL_NET
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
11.2G>
13.3A<>
13.3F<
11.3E>
11.3E>
13.3F<
13.3F<
11.3E>
11.3E>
13.3F<
13.3F<
11.3E>
11.3E>
13.3F<
11.3E>
13.3F<
11.3G> 13.3A<>
13.3F< 11.3E>
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
DISPLAY PORT (LINK C)
www.vinafix.vn
600-10616-0001-001 A
p616_a01
wbrenckle
11 OF 19
03-DEC-2007
Page 12
IFPE
IFPF
9/16 IFPEF
AUX
AUX
DPL0_TXD2
DPL0_TXD2
DPL1_TXD1
DPL1_TXD1
DPL2_TXD0
DPL2_TXD0
DPL3_TXC
DPL3_TXC
AUX
AUX
DPL1_TXD1
DPL1_TXD1
DPL2_TXD0
DPL2_TXD0
DPL3_TXC
DPL3_TXC
DPL0_TXD2
DPL0_TXD2
IFPEF_RSET
IFPEF_PLLVDD
IFPF_IOVDD
IFPE_IOVDD
BIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBIBI
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
10K
NO STUFF
5V_RUN
3V3_RUN
3.3V
3.3V
9.4F<>
9.4F>
14.3E>
I2CB_SDA
33
R26
COMMON
0402
5%
I2CB_SCL
33
R18
COMMON
0402
5%
4
Q7
HDMI/DP OPTION (LINK E)
G1
G96-300-A1 DT
BGA969
COMMON
FDC6301N
SOT23_6D_1G1D1S
NO STUFF
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=0.22A
R_DS_ON=5R
MAX_CURRENT=0.5A
MAX_WATTAGE=0.7W@125C
V_BE_GS=8V
2
1G1D1S
IFPE_AUXG_R*
6
Q7
FDC6301N
SOT23_6D_1G1D1S
3 1
NO STUFF
5
MAX_VOLTAGE=25V
CONTINUOUS_CURRENT=0.22A
R_DS_ON=5R
1G1D1S
MAX_CURRENT=0.5A
MAX_WATTAGE=0.7W@125C
V_BE_GS=8V
IFPE_AUXG_R
3V3_RUN
GPIO18_MODE_C*
R27
100K
5%
0402
NO STUFF
R19
100K
5%
0402
NO STUFF
RHU002N06
SOT323_1G1D1S
NO STUFF
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
R10
0402
5%
3
1G1D1S
Q3
2
1
GPIO18_MODE_EF
R9
4.7K
5%
0402
NO STUFF
GND
C14
0402
0402
0402
C15
.1UF C28IFPE_AUX*
.1UF
COMMON
.1UF
C7
COMMON
.1UF
C8
COMMON
.1UF
COMMON 0402
0402
C10
0402
0402
0402
C11
0402
.1UF
NO STUFF
IFPE_TXC*
IFPE_TXC
.1UF
COMMON
IFPE_TXD0*
IFPE_TXD0
.1UF
C2
COMMON
IFPE_TXD1*
IFPE_TXD1
.1UF
C3
COMMON
IFPE_TXD2*
IFPE_TXD2
.1UF
COMMON
12.5B<>
12.5B<>
12.5B<>
12.5B<>
12.5B<>
12.5B<>
12.5B<>
12.5B<>
13.2F<
13.2F<
13.2F<
13.2F<
13.2F<
13.2F<
13.2F<
13.2F<
GND
DP MODE detection by SW
IFPE_AUX_C*
IFPE_AUX_C
12.5F<>
12.5F<>
13.2A<>
13.2A<>
AD4
IFPE_AUX 0402 C27NO STUFF
1V8_RUN
LB504
240R@100MHz
COMMON BEAD_0402
1.8V
12mil
C681
4.7UF
6.3V
10%
X5R
0603
COMMON
GND
C675
2.2UF
6.3V
20%
X5R
0402
COMMON
C662
.1UF
6.3V
10%
X7R
0402
COMMON
IFPEF_PLLVDD
IFPEF_RSET
R31
1K
1%
0402
COMMON
AJ6
AL1
AE4
AE5
AE6
AF5
AF4
AG4
AH4
AH5
AH6
IFPE_L3*
IFPE_L3
IFPE_L2*
IFPE_L2
IFPE_L1*
IFPE_L1
IFPE_L0*
IFPE_L0
C655
.1UF
6.3V
10%
X7R
0402
COMMON
AE7
AD7
AF2
AF3
AH3
AH2
AH1
AJ1
AJ2
AJ3
AL3
AL2
IFPF_AUX*
IFPF_AUX
IFPF_L3*
IFPF_L3
IFPF_L2*
IFPF_L2
IFPF_L1*
IFPF_L1
IFPF_L0*
IFPF_L0
C20
0402
C42
0402
C31
0402
C37
0402
C32
0402
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
C23
0402
C40
0402
C29
0402
C35
0402
C30
0402
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
.1UF
COMMON
IFPCF_AUXG_R*
IFPCF_AUXG_R
IFPF_TXC*
IFPF_TXC
IFPF_TXD0*
IFPF_TXD0
IFPF_TXD1*
IFPF_TXD1
IFPF_TXD2*
IFPF_TXD2
PEX_VDD
1.1V
LB506
120R@100MHz
COMMON BEAD_0402
GND
C694
4.7UF
6.3V
10%
X5R
0603
COMMON
16mil
C677
C680
1UF
4.7UF
6.3V
6.3V
10%
10%
X5R
X5R
0402
0603
COMMON
COMMON
GND
IFPEF_IOVDD
C673
.1UF
6.3V
10%
X7R
0402
COMMON
TMDS (LINK F)
(TMDS/HDMI/DP OPTION CONSTRAINTS)
IFPE_L3*
IFPE_L3
IFPE_L2*
IFPE_L2
IFPE_L1*
IFPE_L1
IFPE_L0*
IFPE_L0
IFPE_TXC*
IFPE_TXC
IFPE_TXD0*
IFPE_TXD0
IFPE_TXD1*
IFPE_TXD1
IFPE_TXD2*
IFPE_TXD2
IFPE_L3 1
IFPE_L2 1
IFPE_L2 1
IFPE_L1 1
IFPE_L1 1
IFPE_L0 1
IFPE_L0 1
IFPETXC 1
IFPETXD0 1
IFPETXD0
IFPETXD1 1
IFPETXD1
IFPETXD2 1
NET NAME NV_IMPEDANCE NV_CRITICAL_NET DIFFPAIR NET NAME
1 IFPE_L3
1 IFPETXC
1
1
1 IFPETXD2
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
12.2F>
12.2F>
12.2F>
12.2F>
12.2F>
12.2F>
12.3F>
12.3F>
13.2F<
13.2F<
13.2F<
13.2F<
13.2F<
13.2F<
13.2F<
13.2F<
IFPF_L3*
IFPF_L3
IFPF_L2*
IFPF_L2
IFPF_L1*
IFPF_L1
IFPF_L0*
IFPF_TXC*
IFPF_TXC
IFPF_TXD0*
IFPF_TXD0
IFPF_TXD1*
IFPF_TXD1
IFPF_TXD2*
IFPF_TXD2
DIFFPAIR
IFPF_L3
IFPF_L3
IFPF_L2
IFPF_L2
IFPF_L1
IFPF_L1
IFPF_L0
IFPF_L0IFPF_L0
IFPFTXC
IFPFTXC
IFPFTXD0
IFPFTXD0
IFPFTXD1
IFPFTXD1
IFPFTXD2
IFPFTXD2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
NV_IMPEDANCE NV_CRITICAL_NET
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
12.3F>
12.3F>
12.3F>
12.3F>
12.3F>
12.3F>
12.3F>
12.3F>
13.3F<
13.3F<
13.2F<
13.3F<
13.2F<
13.2F<
13.2F<
13.2F<
IFPE_AUX*
IFPE_AUX
IFPE_AUXG_R*
IFPE_AUXG_R
IFPE_AUX_C*
IFPE_AUX_C
IFPF_AUX*
IFPF_AUX
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
HDMI/DP OPTION (LINK E), TMDS (LINK F)
IFPE_AUX
IFPE_AUX
IFPE_AUXG_R
IFPE_AUXG_R
IFPE_AUX_C
IFPE_AUX_C
IFPF_AUX
IFPF_AUX
1
1
1
1
1
1 100DIFF
1
1
www.vinafix.vn
NV_IMPEDANCE NV_CRITICAL_NET DIFFPAIR NET NAME
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
100DIFF
11.2F<
11.3F<
12.5D<>
12.5D<>
12.5D<>
12.5D<>
12.5D<>
12.5D<>
12.5D<>
12.5D<>
11.5B<>
11.5B<>
13.3F<
13.3F<
13.2F<
13.3F<
13.2F<
13.2F<
13.2F<
13.2F<
12.2H>
13.2A<>
LinkE/F BIAS
IFPE_TXC*
IFPE_TXC
IFPE_TXD0*
IFPE_TXD0
IFPE_TXD1*
IFPE_TXD1
IFPE_TXD2*
IFPE_TXD2
IFPF_TXC*
IFPF_TXC
IFPF_TXD0*
IFPF_TXD0
IFPF_TXD1*
IFPF_TXD1
IFPF_TXD2*
IFPF_TXD2
13.2A<> 12.2H>
R11
0402
0402
0402
0402
0402
0402
R12
0402
0402
R47
0402
R45
0402
R40
0402
R37
0402
R44
0402
0402
R41
0402
R38
0402
499
COMMON
1%
499
R7
COMMON
1%
499
R5
COMMON
1%
499 R1
COMMON
1%
499
R6
COMMON
1%
499
R2
COMMON
1%
499
COMMON
1%
499
R8
COMMON
1%
499
NO STUFF
1%
499
NO STUFF
1%
499
NO STUFF
1%
499
NO STUFF
1%
499
NO STUFF
1%
499 R43
NO STUFF
1%
499
NO STUFF
1%
499
NO STUFF
1%
1.8V
16mil
IFPE_TERM
NO STUFF WHEN USING
1.8V
16mil
IFPF_TERM
3V3_RUN
3
1G1D1S
Q5
RHU002N06
SOT323_1G1D1S
COMMON
GND
2
1
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
LINK E OR F FOR DP
3V3_RUN
3
1G1D1S
Q4
RHU002N06
SOT323_1G1D1S
NO STUFF
GND
2
1
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
600-10616-0001-001 A
p616_a01
wbrenckle
12 OF 19
03-DEC-2007
Page 13
INININININININININININININININININININININININININININININININININININININININININININ
DVI-B DP_A
2/2 IO - LVDS,DVI,DP,VGA,TV
HDTV SDTV
DVI_A_CLK
DVI_A_CLK
DVI_A_TX0
DVI_A_TX2
DVI_A_TX1
DVI_A_TX1
DVI_A_TX0
DVI_A_TX2
DVI_B_TX2
DVI_B_TX2 DP_A_L0
DP_A_L0
DVI_B_TX1
DVI_B_TX1
DVI_B_CLK
DVI_B_CLK
DVI_B_TX0
DVI_B_TX0
DP_B_L2
DP_B_L2
DP_B_L1
DP_B_L0
DP_B_L0
DP_B_L1
DP_A_L2
DP_A_L2
DP_A_L3
DP_A_L3
DP_A_L1
DP_A_L1
DP_B_L3
DP_B_L3
LVDS_UTX0
LVDS_UTX1
LVDS_UTX3
LVDS_UTX2
LVDS_UTX2
LVDS_UTX0
LVDS_UTX1
LVDS_LTX0
LVDS_UCLK
LVDS_UCLK
LVDS_UTX3
LVDS_LTX0
LVDS_LTX1
LVDS_LTX3
LVDS_LCLK
LVDS_LTX2
LVDS_LTX3
LVDS_LTX2
LVDS_LTX1
LVDS_LCLK
DVI_B_C_HPD
DVI_A_HPD
DDCB_SDATA
DDCB_SCLK
HDTV_Y
HDTV_Pr
HDTV_Pb TV_CVBS
TV_C
TV_Y
VGA_BLU
VSYNC
HSYNC
VGA_RED
VGA_GRN
DDCA_SCLK
LVDS_BL_BRGHT
DP_AUX
DP_AUX
DDCA_SDATA
DP_HPD
DDCC_SCLK
LVDS_BLEN
DDCC_SDATA
LVDS_PPEN
SMB_CLK
THERM
SMB_DAT
RUNPWROK
AC/BATT*
HDA_SDI
HDA_SDO
HDA_SYNC
HDA_BCLK
SPDIF
HDA_RST
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
MXM CONNECTOR
CN1
CON_MXM_X16_EDGE
(NON)PHY(-X16,-HE)
NONPHY-X16
COMMON
219
221
237
239
231
233
225
227
201
203
207
209
213
215
189
191
195
197
183
185
177
179
165
167
186
184
180
178
174
172
168
166
162
160
216
214
210
208
204
202
198
196
192
190
IFPB_TXD4
IFPB_TXD4*
IFPB_TXD5
IFPB_TXD5*
IFPB_TXD6
IFPB_TXD6*
IFPB_TXD7
IFPB_TXD7*
IFPB_TXC
IFPB_TXC*
IFPA_TXD0
IFPA_TXD0*
IFPA_TXD1
IFPA_TXD1*
IFPA_TXD2
IFPA_TXD2*
IFPA_TXD3
IFPA_TXD3*
IFPA_TXC
IFPA_TXC*
HDA_BCLK
HDA_SYNC
HDA_SDO
HDA_SDI
HDA_RST*
217
232
230
193
140
136
144
153
151
148
152
156
155
157
200
171
173
224
228
226
222
220
145
147
149
169
170
143
141
161
159
146
16
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
MXM CONNECTOR
www.vinafix.vn
14.3H<
12.2H>
12.5F<>
12.2H>
12.5F<>
16.5G< 14.3H>
16.5G<>
11.5D<>
11.5D<>
14.3H<>
17.2A<
14.4H<
9.3G>
9.3G>
9.3G>
9.1G>
9.1G>
9.1G>
9.1G>
9.1G>
9.1G>
9.1G<>
14.3H<
11.2G>
11.3G>
14.3G>
14.3G>
14.3G>
14.2A<
14.2A<>
14.5A<>
14.5A<
14.2G>
10.3A<
MOBILE_RUNPWROK
R506
0402
1%
C513
220PF
50V
5%
C0G
0402
COMMON
GND
ESD Protection for
MOSFET Gates
1K
COMMON
14.3E<
16.2E<
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=2
DVIA_HPD
IFPE_AUX_C
IFPE_AUX_C*
DVIBC_HPD
DACB_GREEN
DACB_RED
DACB_BLUE
DACA_VSYNC
DACA_HSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
I2CA_SCL_R
I2CA_SDA_R
GPIO1_DP_HPD
DP_AUX_C*
DP_AUX_C
GPIO3_PPEN
GPIO4_BLEN
GPIO2_BL_PWM
I2CC_SCL_R
I2CC_SDA_R
SMB_DATA
SMB_CLK
THERM_ALERT*
MOBILE_RUNPWROK_IN
GPIO12_AC_DET
C46SPDIF
0402
16.5B<>
16.5B<>
16.5B<>
NV_IMPEDANCE=50OHM
NV_CRITICAL_NET=2
.1UF
6.3V
10%
16.5B<>
X7R
16.5B<>
COMMON
16.2A<
16.1A>
16.1A<
SPDIF_MXM
IFPE_TXC*
IFPE_TXC
IFPE_TXD0*
IFPE_TXD0
IFPE_TXD1*
IFPE_TXD1
IFPE_TXD2*
IFPE_TXD2
IFPF_TXD2*
IFPF_TXD2
IFPF_TXD1*
IFPF_TXD1
IFPF_TXD0*
IFPF_TXD0
IFPF_TXC*
IFPF_TXC
DP_L0_C*
DP_L0_C
DP_L1_C*
DP_L1_C
DP_L2_C*
DP_L2_C
DP_L3_C*
DP_L3_C
12.2F>
12.2F>
12.2F>
12.2F>
12.2F>
12.2F>
12.3F>
12.3F>
12.3F>
12.3F>
12.3F>
12.3F>
12.3F>
12.3F>
12.3F>
12.3F>
11.3E>
11.3E>
11.3E>
11.3E>
11.3E>
11.3E>
11.3E>
11.3E>
12.5B<>
12.5B<>
12.5B<>
12.5B<>
12.5B<>
12.5B<>
12.5B<>
12.5B<>
12.5D<>
12.5D<>
12.5D<>
12.5D<>
12.5D<>
12.5D<>
12.5D<>
12.5D<>
11.5D<>
11.5D<>
11.5D<>
11.5D<>
11.5D<>
11.5D<>
11.5D<>
11.5D<>
10.2H>
10.2H>
10.2H>
10.2H>
10.3H>
10.2H>
10.2H>
10.1H>
10.1H>
10.2H>
10.2H>
10.2H>
10.2H>
10.2H>
10.2H>
10.1H>
10.1H>
10.5B<> 10.2H>
10.5B<> 10.2H>
10.5B<>
10.5B<>
10.5B<>
10.5B<>
10.5B<>
10.5B<>
10.5B<> 10.2H>
10.5B<>
10.4B<>
10.4B<>
10.4B<>
10.4B<>
10.5B<>
10.5B<>
10.5B<>
10.5B<>
10.5B<>
10.5B<>
600-10616-0001-001 A
p616_a01
wbrenckle
13 OF 19
03-DEC-2007
Page 14
VDD
THERM
ALERT
GND
D+
D-
SDA
SCL
12/16 MISC1
I2CC_SCL
I2CC_SDA
I2CD_SCL
I2CS_SCL
I2CS_SDA
I2CD_SDA
I2CE_SCL
I2CE_SDA
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
GPIO5
GPIO9
GPIO8
GPIO7
GPIO6
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
SWAP_RDY_A/GPIO22
STEREO/GPIO23
THERMDN
THERMDP
JTAG_TRST
JTAG_TMS
JTAG_TDO
JTAG_TDI
JTAG_TCK
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
16.5G< 14.3H> 13.4A<
13.4A<> 14.3H<>
16.5G<>
I2CC_SCL_R
I2CC_SDA_R
GPIO, TEMP SENSOR, JTAG
I2C ADDRESS: 0x98H
NOSTUFF for internal sensor
U4
MAX6649MUA
SO8_122MIL
COMMON
JTAG_TCLK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST
14.2D>
14.2D<>
THERM*
THERM
2
3
8
7
3V3_RUN
AP14
AR14
AN14
AN16
AP16
B4
B5
Stuff for
connecting ExtThermalSensor to DDCC
0
R586
COMMON
0402
5%
R585
0402
TP2
TP1
TP3
TP4
TP5
0
COMMON
5%
Place lab TP
together
3V3_RUN
3V3_RUN
GND
R57
180
5%
0402
COMMON
R58
270
5%
0402
COMMON
3V3_RUN
GND
R56
10K
5%
0402
COMMON
R60
10K
5%
0402
COMMON
3V3_RUN
C33
2200PF
X5R
COMMON
R59
10K
5%
0402
COMMON
I2CS_SCL
I2CS_SDA
10MIL
10MIL
THERM_SCL
THERM_SDA
10V 0402
10%
G1
G96-300-A1 DT
BGA969
COMMON
3V3_RUN
R580
200
5%
0402
COMMON
THERM_VDD
12mil
1
THERM_ALERTM*
4
GPIO8_SLOWDOWNM*
6
5
Use GPIO0 for DVI-B HPD when using link AB for TMDS
GND
0
R569
COMMON
0402
5%
I2CS_SCL
E2
I2CS_SDA
E1
I2CC_SCL
E3
I2CC_SDA
E4
F4
G5
SNN_I2CE_SCL
D5
SNN_I2CE_SDA
E5
GPIO21_DVI_B_C_HPD
K1
GPIO1_DP_HPD
K2
GPIO2_BL_PWM_GPU
K3
GPIO3_PPEN_GPU
H3
GPIO4_BLEN_GPU
H2
GPIO5_NVVDDCTL0
H1
GPIO6_NVVDDCTL1
H4
GPIO7_FBVDDQ_CTL
H5
GPIO8_THERM_ALERT*
H6
GPIO9_LVDS_SYS*
J7
GPIO10_FB_VREF_SW
K4
SNN_GPIO11_RASTER_SYNC
K5
GPIO12_AC_DET
H7
SNN_GPIO13_LOAD_STEP_DWN
J4
SNN_GPIO14_LOAD_STEP_UP
J6
GPIO15_DVI_A_HPD
L1
GPIO16_MODE_C
L2
SNN_GPIO17_CEC_DET_C
L4
GPIO18_MODE_EF
M4
SNN_GPIO19_CEC_DET_E
L7
SNN_GPIO20L5
GPIO21_DVI_B_C_HPD
K6
SNN_GPIO22_GPU_SWAPRDY
L6
SNN_GPIO23M6
3V3_RUN 3V3_RUN
33
COMMON
R562
0
5%
0402
COMMON
R567
2.2K
5%
0402
COMMON
1G1D1S
6
11.2G<
12.2H<
Q1
FDC6301N
1
5
COMMON
V_BE_GS=8V
R_DS_ON=5R
MAX_VOLTAGE=25V
MAX_CURRENT=0.5A
MAX_WATTAGE=0.7W@125C
SOT23_6D_1G1D1S
CONTINUOUS_CURRENT=0.22A
R4
10K
5%
0402
COMMON
3
1G1D1S
4
Q1
FDC6301N
SOT23_6D_1G1D1S
13.4B>
PS_PGOOD_NV
2
COMMON
R_DS_ON=5R
MAX_VOLTAGE=25V
MAX_CURRENT=0.5A
CONTINUOUS_CURRENT=0.22A
1G1D1S
3
V_BE_GS=8V
MAX_WATTAGE=0.7W@125C
R3
10K
5%
0402
COMMON
1
2
Q508
COMMON
RHU002N06
SOT323_1G1D1S
R14
10K
5%
0402
COMMON
V_BE_GS=12V
R_DS_ON=4R
V_BE_GS=+/-20V
MAX_VOLTAGE=60V
MAX_WATTAGE=200mW
MAX_CURRENT=800mA
CONTINUOUS_CURRENT=200mA
R559
10K
5%
0402
COMMON
1
COMMON
MAX_VOLTAGE=30V
MAX_WATTAGE=1W@25C
MAX_CURRENT=16A
CONTINUOUS_CURRENT=4A@25C
2
1G1D1S
RTR040N03
SOT23_1G1D1S
3
Q509
18.4B<
17.2A>
18.2A<
GPIO2_BL_PWM
GPIO3_PPEN
GPIO4_BLEN
THERM_ALERT*
13.4A<
13.3A<
13.3A<
17.4B<
17.4B<
18.3F<
10.2A<
3.5B<
GPIO21_DVI_B_C_HPD
13.4A<
as per HDMI spec
1k5 < R < 2k2
7.1H<
4.1H<
R581
100K
5%
0402
COMMON
GND
GND
R24
2.2K
5%
0402
COMMON
R35
100K
5%
0402
NO STUFF
3V3_RUN
3
2 1
3V3_RUN
D501
BAT54C
30V
200MA
SOT23
COMMON
R23
2.2K
5%
0402
COMMON
I2CC_SCL_R
I2CC_SDA_R
I2CD_SCL
I2CD_SDA
R582
0402
R39
0402
13.4A<
13.4A<>
11.1H<>
11.1H<>
16.5G<> 14.2A<>
13.3A>
16.5G<
14.2A<
DVIA_HPD
10K
COMMON
5%
DVIBC_HPD
10K
COMMON
5%
13.2A>
13.2A>
R570
10k
5%
0402
COMMON
C672
.1UF
16V
10%
X7R
0603
COMMON
GND
0
R571
COMMON
0402
5%
14.4C<
R591
0402
14.4C<>
5%
33
COMMON
0402
R25
5%
13.4A>
13.4A<>
0R592
NO STUFF
0402
5%
0
R587
NO STUFF
0402
5%
NOSTUFF,
except to
connect
SMBus to
external
sensor.
SMB_CLK
SMB_DATA
R588
R597
47K
47K
5%
5%
0402
0402
NO STUFF
NO STUFF
ONLY for IntThermalSensor
tied to SMBus
R602
0402
5%
R589
0402
0
NO STUFF
5%
0
NO STUFF
R590
47K
5%
0402
COMMON
ONLY FOR IntThermalSensor
NOT connected
R607
47K
5%
0402
COMMON
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
GPIO, JTAG, TEMP SENSOR
www.vinafix.vn
GND
R42
GND
GND
GND
100K
5%
0402
COMMON
GND
600-10616-0001-001 A
p616_a01
wbrenckle
14 OF 19
03-DEC-2007
Page 15
11/16 MIOB
MIOBD0
MIOBD1
MIOBD2
MIOBD3
MIOBD4
MIOBD5
MIOBD6
MIOBD7
MIOBD8
MIOBD9
MIOBD10
MIOBD11
MIOBD12
MIOBD13
MIOBD14
MIOBD15
MIOBD16
MIOB_CLKIN
MIOB_CLKOUT
MIOB_CLKOUT
MIOB_CTL3
MIOBD17
MIOB_DE
MIOB_VSYNC
MIOB_HSYNC
MIOBCAL_PD_VDDQ
MIOBCAL_PU_GND
MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VREF
10/16 MIOA
MIOAD0
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
MIOAD6
MIOAD7
MIOAD8
MIOAD9
MIOAD10
MIOAD11
MIOAD12
MIOAD13
MIOAD14
MIOA_CLKIN
MIOA_CLKOUT
MIOA_CLKOUT
MIOA_VSYNC
MIOA_HSYNC
MIOA_DE
MIOA_CTL3
MIOACAL_PD_VDDQ
MIOACAL_PU_GND
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VREF
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
NETNAME
MIN_LINE_WIDTH
12MIL 3.3V MIOB_VDDQ
MIOA/B
(MIOB CONSTRAINTS)
3V3_RUN
C656
.1UF
6.3V
10%
X7R
0402
COMMON
GND
SNN_MIOBCAL_PD_VDDQ
SNN_MIOBCAL_PU_GND
SNN_MIOB_VREF
SNN_MIOACAL_PU_GND
SNN_MIOA_VREF
GND
AA9
AB9
AA7
AA6
AF1
W9
Y9
P9
R9
T9
U9
U5SNN_MIOACAL_PD_VDDQ
T5
N5
G1
G96-300-A1 DT
BGA969
COMMON
G1
G96-300-A1 DT
BGA969
COMMON
Y1
Y2
Y3
AB3
AB2
AB1
AC4
AC1
AC2
AC3
AE3
AE2
U6
W6
Y6
W5
W7
V7
W3
W1
W2
Y5
V4
W4
N1
P4
P1
P2
P3
T3
T2
T1
U4
U1
U2
U3
R6
T6
N6
SNN_MIOBD<0>
SNN_MIOBD<1>
SNN_MIOBD<2>
SNN_MIOBD<3>
SNN_MIOBD<4>
SNN_MIOBD<5>
SNN_MIOBD<6>
SNN_MIOBD<7>
SNN_MIOBD<8>
SNN_MIOBD<9>
SNN_MIOBD<10>
SNN_MIOBD<11>
SNN_MIOBD<12>
SNN_MIOBD<13>
SNN_MIOBD<14>
SNN_MIOBD_CTL3
SNN_MIOB_HSYNC
SNN_MIOB_VSYNC
SNN_MIOB_DE
SNN_MIOB_CLKOUT
SNN_MIOB_CLKOUT*
SNN_MIOB_CLKINAE1
SNN_DR_D<0>
SNN_DR_D<1>
SNN_DR_D<2>
SNN_DR_D<3>
SNN_DR_D<4>
SNN_DR_D<5>
SNN_DR_D<6>
SNN_DR_D<7>
SNN_DR_D<8>
SNN_DR_D<9>
SNN_DR_D<10>
SNN_DR_D<11>
SNN_DR_D<12>
SNN_DR_D<13>
SNN_DR_D<14>
STRAP0
STRAP1
STRAP2
19.1A<
19.1A<
19.4A> 19.1A<
SNN_MIOA_CTL3
P5
SNN_MIOA_HSYNC
N3
SNN_MIOA_VSYNCL3
SNN_MIOA_DE
N2
SNN_DR_CLKOUT
R4
SNN_MIOA_CLKOUT*
T4
SNN_DR_REFCLK
N4
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
MIO A/B
www.vinafix.vn
600-10616-0001-001 A
p616_a01
wbrenckle
15 OF 19
03-DEC-2007
Page 16
VCC
GND
HOLD
WP
CS
SI
SCK
SO
SCL
VCC
SDA
GND
A0
WP
A1
A2
13/16 MISC2
ROM_SO
ROM_SI
ROM_SCLK
ROM_CS
BUFRST
RFU_GND
SPDIF
PGOOD_OUT
RFU_GND
I2CH_SDA
I2CH_SCL
RFU
RFU
HDA_BCLK
HDA_RST
HDA_SDI
HDA_SDO
HDA_SYNC
STRAP_REF_MIOB
STRAP_REF_3V3
14/16 XTAL_PLL
XTALOUT
XTALOUTBUFF
VID_PLLVDD
SP_PLLVDD
PLLVDD
XTALSSIN
XTALIN
VDD
CLKOUT/
FS_IN0
REFOUT/
FS_IN1
GND
CLKIN
PD
SDATA
SCLK
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
3V3_RUN
R16
10K
5%
0402
NO STUFF
HD AUDIO
10K
R17
COMMON
0402
5%
SNN_RFU_J26
GND
16.5B<>
16.5B<>
16.5B<>
16.5B<>
13.4C> 16.5B<>
13.4C>
13.4C<
13.4C>
13.4C>
HDA_BCLK
HDA_RST*
HDA_SDI
HDA_SDO
HDA_SYNC
R51
0402
10
COMMON
5%
HDA1_SDI
Select Multi-level strap
40.2K
R556
COMMON
0402
1%
40.2K
R555
04021%COMMON
GND
STRAP_REF_3V3
STRAP_REF_MIOB
PEX_VDD
PEX_VDD
LB507
(HD AUDIO CONSTRAINTS)
NV_CRITICAL_NET
2 56OHM
2
2
2
2
2
HDA1_SDI
HDA_BCLK
HDA_SYNC
HDA_SDI
HDA_SDO
HDA_RST*
NV_IMPEDANCE
56OHM
56OHM
56OHM
56OHM
56OHM
13.4C>
13.4C>
13.4C<
13.4C>
13.4C>
16.1A<
16.2A<
16.1A>
16.2A<
16.1A<
J26
J25SNN_RFU_J25
D7
D6
C7
B7
A7
N9
M9
220R@100MHz
COMMON BEAD_0402
G1
G96-300-A1 DT
BGA969
COMMON
LB2
COMMON BEAD_0402
3V3_RUN
GND
ROM_CS*
C3
ROM_SI
D3
ROM_SO
C4
ROM_SCLK
D4
F6
G6
I2CH_SCL
I2CH_SDA
A5
SNN_BUFRST*
A4
SNN_PGOOD_OUT*
220R@100MHz
C695
4.7UF
6.3V
10%
X5R
0603
GND
R595
0603
4.7
NO STUFF
5%
C4
4.7UF
6.3V
10%
X5R
0603
COMMON
C687
2.2UF
6.3V
20%
X5R
0402
COMMON COMMON
C690
4.7UF
6.3V
10%
X5R
0603
NO STUFF
C5
AK14
K9
GND
C652
4.7UF
6.3V
10%
X5R
0603
COMMON
C653
.1UF
6.3V
X7R
0402
COMMON
C693
4.7UF
6.3V
10%
X5R
0603
NO STUFF
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
VBIOS, HDCP/I2C ROM, XTAL, SPREAD SPECTRUM, HD AUDIO
R557
76.8
0402
COMMON
C647
.1UF
6.3V
X7R
0402
COMMON
XTAL_SP_PLLVDD
12MIL
10%
R594
22
5%
0402
COMMON
Place close to ICS91730
C13
C9
470PF
.1UF
16V
6.3V
10%
10%
X7R
X5R
0402
0402
NO STUFF
NO STUFF
1%
GND
10%
GND
www.vinafix.vn
SPDIF
XTAL_PLLVDD
12MIL
C646
.1UF
6.3V
10%
X7R
0402
COMMON
XTAL_SSFOUT
XTALIN
C25
22PF
50V
5%
C0G
0402
COMMON
GND
SP_VDD
12MIL
19.3A< 16.1E<
19.3A< 16.1E<
19.3A< 16.1E<
R583
10K
5%
0402
COMMON
13.4B>
G1
G96-300-A1 DT
BGA969
COMMON
AE9
AD9
AF9
D2
B1
NV_IMPEDANCE NV_CRITIC
1
R599
10K
5%
0402
COMMON
16.1E<
16.1E<
16.1E<
50OHM
19.3A<
19.3A<
19.3A<
3V3_RUN
3V3_RUN
SP_FOUT
SP_REF
3V3_RUN
R584
10K
5%
0402
COMMON
3V3_RUN
XTAL
XVGBBLNANF-27MHZ
3
SMD
SPREAD
R15
10K
5%
0402
NO STUFF
2
4
5
3
I2C Address: 0xD4
R13
10K
5%
0402
COMMON
C678
.1UF
X7R
0402
COMMON
GND
Y1
27.0000MHZ
1
+/-10PPM
COMMON
ROM_CS*
ROM_SI
ROM_SO
ROM_SCLK
10% 6.3V
ICS91730BM
NO STUFF
VBIOS ROM
U1
3V3_RUN
7
3
1
5
2
6
MX25L1005
SO8
SO8
COMMON
3V3_RUN
8
4
HDCP I2C ROM
AT24C16BN
8
6
5
4
GND
XTALOUT_BUF
D1
XTALOUT
B2
NV_IMPEDANCE NV_CRITIC
50OHM
U2
SO8
1
3V3_RUN
8
XTALOUT_BUF_R
1
I2CC_SCL_R7
6 I2CC_SDA_R
GND
COMMON
U3
SO8
C684
.1UF
6.3V
10%
X7R
0402
COMMON
GND
7
1
2
3
C24
22PF
50V
5%
C0G
0402
COMMON
13.4A<
13.4A<>
3V3_RUN
GND
Place close to GPU
22 R609
NO STUFF
0402
R604
10K
5%
0402
COMMON
5%
INTERNAL SS : STUFF
EXTERNAL SS : NO STUFF
GND
14.3H> 14.2A<
14.3H<>
14.2A<>
600-10616-0001-001 A
p616_a01
wbrenckle
16 OF 19
03-DEC-2007
Page 17
DRVH
TON
VBST
DRVL
LL
PGND
VO
FB
GND (PAD)
5VDRV
5VFILT
EN
TRIP
PGOOD
GND
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
NVVDD POWER SUPPLY
NV_NET_MAX_CURRENT MIN_WIDTH_LINE VOLTAGE NET
NVVDD
NVVDD
12MIL 1V
18A
NVVDD
U502
TPS51117
5V_RUN
301
R524
COMMON
0402
1%
C514
1UF
6.3V
10%
X5R
0402
COMMON
14.2G< 18.2A< 18.4B<
GND
PS_VCC_NV
R516
10K
5%
0402
COMMON
5V
16MIL
C543
1UF
10%
6.3V
X5R
0402
COMMON
GND
PS_PGOOD_NV
10
4
6
VR=0.75V
QFN14
COMMON
12MIL
1
11
7
10.3A< 13.4A>
MOBILE_RUNPWROK
PS_OCP_NV
R507
6.49K
1%
0402
COMMON
15
GND
14.3G>
14.3G>
GPIO6_NVVDDCTL1
GPIO5_NVVDDCTL0
R521
0402
R529
10K
5%
0402
COMMON
GND
NVVDD SWITCHER POWER SUPPLY
13
PS_UG_NV
20MIL
14
PS_BOOT_NV
12MIL
2
PS_FS_NV
12MIL
12
PS_PH_NV
16MIL
9
PS_LG_NV
20MIL
8
3
5
Rbot1
R509
37.4K
1%
0402
COMMON
1
.01UF
6.3V
10%
X7R
COMMON
3
Q503
RHU002N06
SOT323_1G1D1S
COMMON
2
GND
C544
0402
1G1D1S
NVVDD_CTL1
10K
COMMON
5%
R530
10K
5%
0402
COMMON
GND
R520
0402
C545
0402
10K
COMMON
5%
0
R510
COMMON
0402
5%
SET TO 300KHZ
301K
R523
COMMON
0402
1%
12MIL
NVVDD_CTL1_R
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
NVVDD_CTL0
.01UF
6.3V
10%
X7R
COMMON
PS_BOOT_NV_R
12MIL
Rbot0
COMMON
1G1D1S
1
COMMON
R508
56.2K
1%
0402
Q502
RHU002N06
SOT323_1G1D1S
COMMON
3
2
GND
C522
.1UF
0402
16V
10%
X7R
PS_FB_NV
12MIL
12MIL
NVVDD_CTL0_R
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
4
PWR_SRC
5
Q10
BSC090N03LSG
LFPAK
COMMON
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=30A@100C
2
3
MAX_WATTAGE=2.5W@Ta=25C
V_BE_GS=+/-20V
R527
7.5K
1%
0402
COMMON
Rtop
R519
37.4K
1%
0402
COMMON
Rbot
GND
LFPAK
4
C63
.1UF
50V
10%
X7R
0603
COMMON
GND
GND
LFPAK
5
Q9
BSC016N03LSG
LFPAK
COMMON
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=32A@25C
2
3
MAX_WATTAGE=2.5W
V_BE_GS=+/-20V
GND
NVVDD = (1 + Rt/Rb) x 0.75
RTop
NVVDD
7k5
0.9V
1.0V
1.05V
1.15V
37k4
37k4 || 56k2 = 22k5
7k5
37k4 || 37k4 = 18k7
7k5
37k4 || 56k2 || 37k4 = 14k1
7k5
C73
10UF
25V
10%
X5R
1206
COMMON
PS_PH_SNUB_NV
RBot
C68
10UF
25V
10%
X5R
1206
COMMON
GND
GND
CONTINUOUS_CURRENT=20A
MAX_CURRENT=27A
DC_RESISTANCE=3.0mOhm MAX
HEIGHT=3.5MM
NV_PN=131-0134-000
131-0139-000 CAN BE THE ALTERNATIVE
L1
SMD_420X400
R526
2.2
5%
1206
NO STUFF
16MIL
C552
1000PF
50V
10%
X7R
0402
NO STUFF
GND
PS_FB_SENSE_NV
10MIL
10UF
25V
10%
X5R
1206
COMMON
GND
NO STUFF PER TI
NO STUFF PER TI
10UF
25V
10%
X5R
1206
COMMON
1uH
COMMON
GPIO6
Low
Low
High
High
C65
470UF
COMMON
20%
2.5V
POSCAP
3700MA@100KHZ,85C
9MOHM
SMD_7343
GND
R522
0
5%
0402
CHANGED
FOR NVVDD OUTPUT SIDE SENSE
0
R528
NO STUFF
0402
5%
FOR GPU REMOTE SIDE SENSE
GPIO5
Actual Voltage
Low
High
Low
High
NVVDD=1.1V
APPROX. 18A @ 300MHZ
INPUT CURRENT RMS = 6.6A @ 7.5V INPUT AND NVVDD @ 1.0V (reduced perf)
OUTPUT PEAK TO PEAK CURRENT = 3.5A @ 22V INPUT
SWITCHING FREQ. = 300KHZ
NVVDD
GND
NVVDD_SENSE
C71
470UF
COMMON
20%
2.5V
POSCAP
3700MA@100KHZ,85C
9MOHM
SMD_7343
C62
10UF
16V
20%
X7R
1206
COMMON
GND
2.5G<>
2.4G>
0.9004V
1.0005V
1.0508V
1.1504V
C74
C67
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
NVVDD POWER SUPPLY
www.vinafix.vn
600-10616-0001-001 A
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03-DEC-2007
Page 18
SW
SW
BST
FB
VCC
IN
IN
GND
THERMAL
EN/SYNC
GND
SW
SW
BST
SW
BG
FB
VCC
IN
IN
IN
PG
GND
GND
EN/SYNC
NC
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
FBVDDQ AND PEX_VDD POWER SUPPLY
PEX_VDD
FBVDDQ
PEX_VDD
FBVDDQ
1.1V
1.8V
4A
5A
PEX_VDD
FBVDDQ
NV_NET_MAX_CURRENT VOLTAGE NET
PWR_SRC
10.1A<
PS_VCC_FB
GND
10.1A<
14.2G< 17.2A> 18.4B<
PS_PGOOD_FB
C502
0402
C524
.1UF
50V
10%
X7R
0603
COMMON
GND
1UF
6.3V
10%
X5R
COMMON
NO STUFF
PS_PGOOD_NV
100K
0402
R81
5%
C66
10UF
25V
10%
X5R
1206
COMMON
1
2
N/A
N/A
N/A
U501
MP8668-C142
VR=0.8V
DFN14
COMMON
4
5
6
12
2
3
14
15
7SNN_PS_NC_FB
11
8
9
10
13
1
PS_UG_FB
PS_PH_FB
PS_LG_FB
PS_FB_FB
GND
FBVDDQ SWITCHER
.1UF C64
16V 0402
10%
COMMON
X7R
LFPAK
4
R515
53.6K
Rbot
1%
0402
COMMON
5
Q501
BSC030N03LS
LFPAK
COMMON
1
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=100A
2
R_DS_ON=3.0mR
MAX_CURRENT=400A
3
MAX_WATTAGE=2.8W@25C
V_BE_GS=+/-20V
GND
R517
158K
1%
Rbot1
0402
COMMON
PS_FB_VCTL*
RHU002N06
SOT323_1G1D1S
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
Q505
COMMON
R512
0402
3
2
Rtop
L2
SMD_6X6
NV_PN=131-0112-000
HEIGHT=3.0MM
DC_RESISTANCE=5.5 mOhm MAX
CONTINUOUS_CURRENT=15.5A
MAX_CURRENT=25A
49.9K
COMMON
1%
C523
0402
1G1D1S
PS_FB_VCTL
1
C548
.01UF
16V
10%
X7R
0402
COMMON
GND
COMMON
6.3V
10%
X5R
COMMON
0.68UH
PS_CP_FB.1UF
R525
0402
FBVDDQ = 1.8V
APPROX. 5A @ 600MHZ
INPUT CURRENT RMS = 2.9A @ 7.5V INPUT
OUTPUT PEAK TO PEAK CURRENT = 4.1A @ 22V INPUT
C61
47UF
6.3V
20%
X5R
1206
COMMON
SWITCHING FREQ. = 600KHZ
C72
.1UF
16V
10%
X7R
0402
COMMON
GND GND
C59
47UF
6.3V
20%
X5R
1206
COMMON
GND
C38
47UF
6.3V
20%
X5R
1206
COMMON
GND
FBVDDQ
PLACE BY FB MEMORIES
100K
R511
COMMON
0402
5%
FBVDDQ = (1 + Rt/Rb) x 0.80
GPIO7_FBVDDQ_CTL
10K
COMMON
5%
R531
10K
5%
0402
COMMON
3V3_RUN
14.3G>
FBVDDQ
1.55V
RTop
49K9
49K9
53K6
53K6 || 158K 1.8V
RBot
GPIO7
Low
High
Actual Voltage
1.5448V
1.7975V
GND
PEX_VDD SWITCHER
1V8_RUN
N/A
4A
N/A
C56
22UF
6.3V
20%
X5R
0805
COMMON
14.2G< 17.2A> 18.2A<
C547
22UF
6.3V
20%
X5R
0805
COMMON
GND
PS_PGOOD_NV
C60
.1UF
6.3V
0402
COMMON
10%
X5R
5V_RUN
C534
1UF
6.3V
10%
X5R
0402
COMMON
U5
MP38115
VR=0.8V
DFN10
COMMON
C536
4
7
6
PS_UG_PEX5
3
PS_PH_PEX
8
.01UF
COMMON
0402
16V
X7R
10%
COMMON SMD_045_041
.22uH
L501
PEX_VDD
10
2
9
11
GND GND
PS_FB_PEX1
R80
866K
1%
0402
COMMON
GND
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
FBVDDQ AND PEX_VDD POWER SUPPLY
R79
0402
324K
COMMON
1%
C55
.1UF
6.3V
10%
X7R
0402
COMMON
GND
C58
47UF
6.3V
1206
COMMON
20%
X5R
www.vinafix.vn
Vout = Vref * (1 + Rtop / Rbot)
1.099V = 0.8V * (1 + 324k / 866k)
GND
600-10616-0001-001 A
p616_a01
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18 OF 19
03-DEC-2007
Page 19
2
3
4
5
1
H G F
DATE
PAGE
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NAME
ID
NV_PN
D E
PAGE DETAIL
ASSEMBLY
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
C B
2
1
A
5
4
3
H F D G E B A C
STRAP0
STRAP1
USER_BIT0
USER_BIT1
USER_BIT2
USER_BIT3
3GIO_PADCFG_LUT_ADR0
3GIO_PADCFG_LUT_ADR1
3GIO_PADCFG_LUT_ADR2
3GIO_PADCFG_LUT_ADR3
0xF: 45K PU (unused)
0x0: Desktop default (normal swing) - 5k PD
0x1: Mobile default (low swing) - 10k PD
acc. to //hw/tesla_g98b/manuals/dev_ext_devices.ref
3V3_RUN
R573
10K
1%
0402
CHANGED
R574
4.99K
1%
0402
NO STUFF
STRAPPING OPTIONS
R576
45.3K
1%
0402
COMMON
R575
4.99K
1%
0402
NO STUFF
19.4A>
15.2F>
15.2F>
15.2F>
USER[3:2]
STRAP0
3GIO_PAD_CFG[3:0]
STRAP1
PCI_DEVID[3:0]
STRAP2
R70
4.99K
1%
0402
NO STUFF
R72
10K
1%
0402
COMMON
3V3
GND
5K
10K
15K
3V3_RUN
20K 1011
25K
30K
R605
4.99K
1%
0402
RAM_CFG[3:0]
16.1E<
16.1E<
16.1E<
ROM_SI
XCLK277, TV_MODE[2:0]
ROM_SO
SUB_VENDOR, SLOT_CLK_CFG, PEX_PLL_EN_TERM100
ROM_SCLK
NO STUFF
R606
30.1K
1%
0402
CHANGED
R598
4.99K
1%
0402
COMMON
R593
4.99K
1%
0402
NO STUFF
R603
4.99K
1%
0402
NO STUFF
R608
24.9K
1%
0402
COMMON
35K
45K
1000
1001
1010
1100
1101
1110
1111
GND
0000
0001
0010
0011
0100
0101
0110
0111
STRAP2
ROM_SO
ROM_SI
ROM_SCLK
GND
PCI_DEVID_0
PCI_DEVID_1
PCI_DEVID_2
PCI_DEVID_3
TV_MODE_BIT0
TV_MODE_BIT1
TV_MODE_BIT2
XCLK_277
RAM_CFG_0
RAM_CFG_1
RAM_CFG_2
RAM_CFG_3
PCI_DEVID_EXT
SUB_VENDOR
RAM_CFG[3:0] Definitions
SLOT_CLK_CONFIG
PEX_PLL_EN_TERM100
all 4 bits set by HW strapping
0x0649: 10K PU (NB9P-GS)
0x0648: 5K PU (NB9P-GE2)
0x0: NTSC-M
1: PCI-E GEN2
0000 Reserved
0001 Qimonda
0010 Hynix
0011 Samsung
0:
1: SUB_VENDOR BIOS
0:
0: TERM100 DISABLED
5K PU
512 MB (4pcs. 32Mx32) 256 MB (4pcs. 16Mx32)
RAM_CFG[3:0] Definitions
0100 25k PD Reserved
0101 30k PD Qimonda
0110 35k PD Hynix
0111 45k PD Samsung
25K PD
PEX SWING LEVEL
15.2F> 19.1A<
2.5C>
PEX_PRSNT_R*
STRAP1
3V3_RUN
R68
100K
1%
0402
COMMON
1G1D1S
R71
10K
5%
0402
COMMON
STRAP1_R
3
Q8
RHU002N06
1
SOT323_1G1D1S
COMMON
2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
GND
PEX_PRSNT2_R
GND
R_STRAP1
10k
5k (10k ll 10k) FLOAT
3_GIO_PADCFG_LUT<3..0>
0x1 MOBILE_DEFAULT
0x0 DESKTOP_DEFAULT
NB9P-GS G96M 800MHz, 512MB(128bit) GDDR3 32Mx32 136FBGA, LVDS + DP + HDMI + SD/HD(TV_OUT) + VGA
STRAPS, PEX SWING LEVEL, MECHANICAL
www.vinafix.vn
MECHANICAL
MEC2
1
MXM_I_II_BACKPLATE_HOLES
X4
COMMON
MEC2
2
MXM_I_II_BACKPLATE_HOLES
X4
COMMON
MEC2
3
MXM_I_II_BACKPLATE_HOLES
X4
COMMON
MEC2
4
MXM_I_II_BACKPLATE_HOLES
X4
COMMON
GND
GND
MEC1
MXM_II_MOUNTING_HOLES
X2
COMMON
1
MEC1
MXM_II_MOUNTING_HOLES
X2
COMMON
2
600-10616-0001-001 A
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03-DEC-2007