8
Title
7
6
5
4
Schematic No.
3
2
1
Date:
AGP R480+Rialto 256MB BGA DVII DVII VIVO
REVISION HISTORY
D D
Sch
PCB
Rev
Rev
0 00A 07/07/04 Initial revision of the schematic based on 105-A474xx-00
C C
Date
REVISION DESCRIPTION
105-A49000-00A
Friday, January 28, 2005
Rev
0
B B
A A
8
7
6
5
4
3
2
1
www.vinafix.vn
5
4
3
2
1
D D
+12V EXT.
+5V EXT.
EXTERNAL
POWER
CONNECTOR
POWER
REGULATION
SHT 14,15,16,17
From +12V_Bus
SWITCHING
+MVDDQ, +MVDDC, +VTT,
+VDDC, +PCIE_VDDRC
From +12V_Bus
C C
B B
Linear
+5V
From +3.3V_Bus
Linear
+VDD_1.8V, +VDDC_CT
+VPCIE_VDDR, +A2VDD,
+PVDD, +TPVDD, +MPVDD
PCIE_PVDD_18, VDDCI
From +3.3V DIRECT:
VDDR3
From +3.3V direct Or drivitive
VDDR4,5
From on board +5V
+RTAVDD
From +12V DIRECT:
FAN
From +3.3V_Bus
Linear
+B_VDDC
MEMORY CHANNEL A B
GDDR3 8M X 32 (BGA)
Speed control
& temperature
sense
SHT 12
Channel A-B memory Address, Data nad Control signals
SHT 19
POWER DELIVERY
BIOS
SHT 4
STRAPS
SHT 7
FAN
SHT 19
ROMCS#
Channel C-D memory Add re ss , Da ta nad Control signals
MEM A B MEM C D
GPIO
R480
SHEET 3, 4, 5, 6, 8, 9
DAC1
VIP
TVO
DAC2
CRT
TMDS
PCIE
TMDS_TX[C,2..0]N TMDS_TX[C,2..0]P HPD, DDC2CLK DDC2DATA
MEMORY CHANNEL C D
GDDR3 8M X 32 (BGA)
R G B HSY VSY DDC1DATA DDC1CLK
SHT 13
CRT1
FILTERS
SHT 20, 22
TVOUT
FILTERS
SHT 23
CRT2 FILTERS
SHT 21
IMPEDANCE
MATCHING
Slim_VGA
slim
CONN
SHT 20
TVout
CONN
SHT 24
DVI-I
CONN
SHT 21
PCI-Express
ROM
Rialto
GPIO
STRAPS
SHT 14
POWER DELIVERY
AGP
AGP R480+Rialto
BLOCK DIAGRAM REFLECTING DELL U HM G A11
CONFIGURATION.
COMPONENTS THAT ARE NOT POPULATED FOR DELL
AGP Bus
SHT 2
A A
5
4
3
UHMGA11 SKU ARE MARKED AS "DNI"
2
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
Title
AGP R480+Rialto 256MB BGA DVII DVII VIVO
Size Document Number Rev
C
Date: Sheet
105-A49000-00A
1
of
128Friday, January 28, 2005
0
www.vinafix.vn
8
LAYOUT NOTE: SOME OF THE CAPS BELOW MAY BE
REMOVED IF SPACE IS AN ISSUE, ASK BEFORE REMOVING
+12V_BUS
C12
10uF_20V
D D
C C
B B
+5V_BUS +3.3V_BUS
C5
47uF_6.3V
AGP_INTR#(23)
AGP_GNT#(23)
AGP_MB_8X_DET#(23)
AGP_DBI_HI(23)
AGP_WBF#(23)
AGP_SBSTB#(23)
AGP_ADSTB1#(23)
AGP_FRAME#(23)
AGP_TRDY#(23)
AGP_STOP#(23)
AGP_PAR(23)
AGP_ADSTB0#(23)
C10
47uF_6.3V
7
+VDDQ_BUS
C4
330uF_2.5V
AGP_CON_RESET#
6
Use 47uF Tant. 16V 20% D size (P/N 4230047600),
800mR Max. ESR and Max. ripple 430mA @ 100kHz
or
100uF, Alum. 6.3V 20% 6.3mm dia (P/N 4261010700),
440mR Max. ESR and Max. ripple 230mA @ 100kHz
or
47uF, Alum. 6.3V 20% 5mm dia (P/N 4262047600),
760mR Max. ESR and Max. ripple 150mA @ 100kHz
Place C2 on left side of AGP connector
+3.3V_BUS
+VDDQ_BUS
AGP_TYPEDET#
AGP_GC_8X_DET#
R7 0R
R9 0R
R1 0R
R5 0R
R12 0R
AGP_VREFGC
402
402
402
402
402
AGP_ST1
AGP_MB_8X_DET#_R
AGP_DBI_HI_R
AGP_SBA1
AGP_SBA3
AGP_SBA5
AGP_SBA7
AGP_AD30
AGP_AD28
AGP_AD26
AGP_AD24
AGP_C/BE#3
AGP_AD22
AGP_AD20
AGP_AD18
AGP_AD16
AGP_PAR_R
AGP_AD15
AGP_AD13
AGP_AD11
AGP_AD9
AGP_C/BE#0
AGP_AD6
AGP_AD4
AGP_AD2
4X/8X AGP BUS
+12V_BUS
MAGP1
A1
12V
A2
TYPEDET#
A3
GC_DET#/RESERVED
A4
USB-
A5
GND
A6
INTA#
A7
RST#
A8
GNT#
A9
VCC3.3
A10
ST1
A11
MB_DET#/RESERVED
A12
DBI_HI/PIPE#
A13
GND#A13
A14
WBF#
A15
SBA1
A16
VCC3.3#A16
A17
SBA3
A18
SB_STB#
A19
GND#A19
A20
SBA5
A21
SBA7
A22
RESERVED
A23
GND#A23
A24
RESERVED#A24
A25
VCC3.3#A25
A26
AD30
A27
AD28
A28
VCC3.3#A28
A29
AD26
A30
AD24
A31
GND#A31
A32
AD_STB1#
A33
C/BE3#
A34
VDDQ1.5
A35
AD22
A36
AD20
A37
GND#A37
A38
AD18
A39
AD16
A40
VDDQ1.5#A40
A41
FRAME#
A42
KEY
A43
KEY#A43
A44
KEY#A44
A45
KEY#A45
A46
TRDY#
A47
STOP#
A48
PME#
A49
GND#A49
A50
PAR
A51
AD15
A52
VDDQ1.5#A52
A53
AD13
A54
AD11
A55
GND#A55
A56
AD9
A57
C/BE0#
A58
VDDQ1.5#A58
A59
AD_STB0#
A60
AD6
A61
GND#A61
A62
AD4
A63
AD2
A64
VDDQ1.5#A64
A65
AD0
A66
VREFGC
1.5V_AGP_BUS
5
OVRCNT#
5.0V#B3
USB+
GND#B5
INTB#
REQ#
VCC3.3#B9
RBF#
GND#B13
DBI_LO/RESERVED
SBA0
VCC3.3#B16
SBA2
SB_STB
GND#B19
SBA4
SBA6
RESERVED#B22
GND#B23
3.3VAUX
VCC3.3#B25
AD31
AD29
VCC3.3#B28
AD27
AD25
GND#B31
AD_STB1
AD23
VDDQ1.5#B34
AD21
AD19
GND#B37
AD17
C/BE2#
VDDQ1.5#B40
IRDY#
KEY#B42
KEY#B43
KEY#B44
KEY#B45
DEVSEL#
VDDQ1.5#B47
PERR#
GND#B49
SERR#
C/BE1#
VDDQ1.5#B52
AD14
AD12
GND#B55
AD10
VDDQ1.5#B58
AD_STB0
GND#B61
VDDQ1.5#B64
VREFCG
4
AGP_C/BE#[3..0]
AGP_AD[31..0]
AGP_SBA[7..0]
AGP_ST[2..0]
+3.3V_BUS
+5V_BUS
+VDDQ_BUS
B1
B2
5.0V
B3
B4
B5
B6
B7
CLK
B8
B9
B10
ST0
B11
ST2
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
AD8
B58
B59
B60
AD7
B61
B62
AD5
B63
AD3
B64
B65
AD1
B66
AGP_ST0
AGP_ST2
AGP_SBA0
AGP_SBA2
AGP_SBA4
AGP_SBA6
AGP_AD31
AGP_AD29
AGP_AD27
AGP_AD25
AGP_AD23
AGP_AD21
AGP_AD19
AGP_AD17
AGP_C/BE#2
AGP_C/BE#1
AGP_AD14
AGP_AD12
AGP_AD10
AGP_AD8
AGP_AD7
AGP_AD5
AGP_AD3
AGP_AD1AGP_AD0
AGP_DBI_LO_R
AGP_SBSTB_R
AGP_ADSTB1_R
AGP_ADSTB0_R
AGP_AGPREF
R8 0R
R2 0R
R10 0R
R13 0R
3
VDDC_PGOOD(7)
AGP_C/BE#[3..0] (23)
AGP_AD[31..0] (23)
AGP_SBA[7..0] (23)
AGP_ST[2..0] (23)
402
402
402
402
AGP_AGPCLK (23)
AGP_REQ# (23)
AGP_RBF# (23)
AGP_DBI_LO (23)
AGP_SBSTB (23)
AGP_ADSTB1 (23)
AGP_IRDY# (23)
AGP_DEVSEL# (23)
AGP_ADSTB0 (23)
R1833 0R
DNI
AGP_CON_RESET#
74ACT08MTC
R1834
10K
2
+5V_BUS
1
2
14
+-U2A
7
C972
100nF
R1837 100R
3
+12V_BUS
C22
100nF
402
R1838
180R
+3.3V_BUS+5V_BUS
C25
100nF
402 402
1
SYMBOL LEGEND
DNI
#
AGP_RESET# (19,20,23)
C24
100nF
DO NOT
INSTALL
ACTIVE
LOW
DIGITAL
GROUND
ANALOG
GROUND
Caps for EMI - install close to AGP connector
UNIVERSAL VREFGC CIRCUIT (4X, 8X)
TEST
+VDDQ_BUS
1
32
Q1
R20
324R
2N7002E
R21
147R
R24
100R
402
3
AGP_VREFGC
C6
10nF
402
Close to ASIC
+3.3V_BUS
1
Q20
BSN20
+5V_BUS
53
+
1
2
-U4TC7SZ08FU
32
+12V_BUS
C3
100nF
4
R6
20K
402402
402
R23
1K
402
4
AGP_TYPEDET#
AGP_GC_8X_DET#
A A
R19
5.1R
R64
0R
402
+12V, TYPEDET#
short protection
for OEM (5.1R)
8
R17
AGP_MB_8X_DET#(23)
AGP_MB_8X_DET#
47K
May be placed far from connector -- place C3 FAR from connector, on left side!!
7
6
5
AGP_AGPREF
TEST
UNIVERSAL VREFCG CIRCUIT (4X, 8X)
+VDDQ_BUS
32
1
Q77
2N7002E
R72
147R
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
Title
Size Document Number Rev
C
Date: Sheet
2
DNI
R75
R73
324R
0R
402 402402
AGP_AGPREFCG
R74
C11
100R
10nF
402402
Close to ASIC
*
AGP R480+Rialto 256MB BGA DVII DVII VIVO
105-A49000-00A
AGP_AGPREFCG (23)
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228Friday, January 28, 2005
1
0
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D D
PETp0_GFXRp0(22) GFXTp0_PERp0 (22)
PETn0_GFXRn0(22)
PETp1_GFXRp1(22)
PETn1_GFXRn1(22)
PETp2_GFXRp2(22)
PETn2_GFXRn2(22)
PETp3_GFXRp3(22)
PETn3_GFXRn3(22)
PETp4_GFXRp4(22)
PETn4_GFXRn4(22)
PETp5_GFXRp5(22)
PETn5_GFXRn5(22)
PETp6_GFXRp6(22)
PETn6_GFXRn6(22)
PETp7_GFXRp7(22)
PETn7_GFXRn7(22)
PETp8_GFXRp8(22)
PETn8_GFXRn8(22)
PETp9_GFXRp9(22)
PETn9_GFXRn9(22)
PETp10_GFXRp10(22)
C C
PETn10_GFXRn10(22)
PETp11_GFXRp11(22)
PETn11_GFXRn11(22)
PETp12_GFXRp12(22)
PETn12_GFXRn12(22)
PETp13_GFXRp13(22)
PETn13_GFXRn13(22)
PETp14_GFXRp14(22)
PETn14_GFXRn14(22)
PETp15_GFXRp15(22)
PETn15_GFXRn15(22)
PCIE_REFCLKP(22)
PCIE_REFCLKN(22)
PERST#(22)
7
Place the Test Points
close to U1
TP28
TP29
TP42
TP43
TP58
TP59
ATI PN# 215RBKAGA11F
U1A
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
PCIE_REFCLKP
PCIE_REFCLKN
PERSTB
215RBKAGA11F
PART 1 OF 10
AU38
AU39
AT38
AR38
AR39
AP39
AP38
AN38
AM38
AM39
AL39
AL38
AK38
AJ38
AJ39
AH39
AH38
AG38
AG37
AF37
AF38
AF39
AE39
AE38
AD38
AC38
AC39
AB39
AB38
AA38
AH31
AG31
AM34
Y38
Y39
PCI
Express
Interface
6
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
PERSTb_MASK
CALRP
CALRN
5
TP32
AN36
AM36
TP33
AK34
AJ34
AK36
AJ36
AK35
AJ35
AH33
AG33
AE32
AE33
AG34
AF34
TP46
AG35
AF35
TP47
AD34
AC34
AD36
AC36
AD35
AC35
AE31
AD31
AB32
AA32
AB33
AA33
AA36
Y36
TP56
AA35
AA34
TP57
AL34
AV38
CALI
AN35
AM35
R101110K
R1009150R
R1010100R
GFXTn0_PERn0 (22)
GFXTp1_PERp1 (22)
GFXTn1_PERn1 (22)
GFXTp2_PERp2 (22)
GFXTn2_PERn2 (22)
GFXTp3_PERp3 (22)
GFXTn3_PERn3 (22)
GFXTp4_PERp4 (22)
GFXTn4_PERn4 (22)
GFXTp5_PERp5 (22)
GFXTn5_PERn5 (22)
GFXTp6_PERp6 (22)
GFXTn6_PERn6 (22)
GFXTp7_PERp7 (22)
GFXTn7_PERn7 (22)
GFXTp8_PERp8 (22)
GFXTn8_PERn8 (22)
GFXTp9_PERp9 (22)
GFXTn9_PERn9 (22)
GFXTp10_PERp10 (22)
GFXTn10_PERn10 (22)
GFXTp11_PERp11 (22)
GFXTn11_PERn11 (22)
GFXTp12_PERp12 (22)
GFXTn12_PERn12 (22)
GFXTp13_PERp13 (22)
GFXTn13_PERn13 (22)
GFXTp14_PERp14 (22)
GFXTn14_PERn14 (22)
GFXTp15_PERp15 (22)
GFXTn15_PERn15 (22)
+PCIE_VDDR_12
4
3
2
1
B B
A A
<Variant Name>
8
7
6
5
4
3
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
Title
AGP R480+Rialto 256MB BGA DVII DVII VIVO
Size Document Number Rev
C
Date: Sheet
2
105-A49000-00A
of
328Friday, January 28, 2005
1
0
www.vinafix.vn
8
VID[7..0]
VID[7..0](20)
D D
CLK_VIDCLK(20)
DVALID(14)
PSYNC(14)
VHAD1(20)
VHAD0(20)
VPHCTL(20)
CLK_VIPCLK(20)
DVOMODE_0(14)
DVOMODE_1(14)
DVO[11..0](19)
Install close to ASIC to provide
return path for EMI
C C
DC_Strap2(14)
DC_Strap3(14,21)
DC_Strap4(14)
PAL/NTSC(14)
DEMUX_SEL(14)
GPIO[6..0](14)
GPIO[13..8](8,14)
GPIO15(8)
ThermINT(15)
GPU_DPLUS(15)
GPU_DMINUS(15)
B B
+3.3V_BUS
B3
220R
C1522
R1625
1K
1.0uF
A A
C1523
100nF
Oscillator Circuit
4
2
8
Y3
VCC
GND
27.000MHz
3
OUT
1
E/D
DVO[11..0]
R1623 22R
DNI
R57
221R
7
C52582pF
+PVDD
GND_PVSS
+MPVDD
GND_MPVSS
R63
7
R586499R
C46
22uF_16V
221R
R66
150R
C27
22uF_16V
+3.3V_BUS
C45
100nF
+3.3V_BUS +3.3V_BUS
R51
R58
4.7K
4.7K
TP12
TP13
DVO_VSYNC(19)
DVO_HSYNC(19)
DVO_DE(19)
CLK_DVOCLK0(19)
DVO0
DVO1
DVO2
DVO3
DVO4
DVO5
DVO6
DVO7
DVO8
DVO9
DVO10
DVO11
+3.3V_BUS
R587499R
C41
C26
1.0uF
100nF
1.0uF
1.0uF
C44
C43
To Rage Theater
XTALIN
R65
0R
XTALOUT
1.0uF
C42
PVDD
PVSS
6
6
R60
4.7K
DVOMODE_0
DVOMODE_1
MPVDD
MPVSS
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO15
XTALIN
XTALOUT
CLK_RT_XTALIN (20)
AK26
AJ26
AL24
AN25
AM23
AL23
AK23
AJ23
AM27
AL26
AK28
AJ20
AK20
AK19
AK18
AL20
AK22
AW20
AP23
AU13
AV14
AW14
AU14
AW15
AV15
AU15
AV16
AU16
AV17
AW17
AU17
AW18
AV18
AV19
AV20
AP17
AR17
AT17
AM18
AP19
AN19
AM19
AM21
AP20
AM22
AP22
AN22
AV13
AU12
AV12
AW12
AU11
AW11
AV11
AU10
AV10
AT13
AR14
AT14
AN15
AT15
AT16
AN16
AP16
AK15
AJ16
AJ17
AW36
AV36
AV37
AW37
AV9
A10
A11
5
U1B
VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
VID_6
Video Capture/
VID_7
VIP
VPCLK0
DVALID
PSYNC
VHAD_1
VHAD_0
VPHCTL
VIPCLK
SDA
SCL
DVOVMODE_0
DVOVMODE_1
ZV_LCDCNTL_0
ZV_LCDCNTL_1
ZV_LCDCNTL_2
215RBKAGA11F
ZV_LCDCNTL_3
ZV_LCDDATA_0
ZV_LCDDATA_1
ZV_LCDDATA_2
ZV_LCDDATA_3
ZV_LCDDATA_4
ZV_LCDDATA_5
ZV_LCDDATA_6
ZV_LCDDATA_7
ZV_LCDDATA_8
ZV_LCDDATA_9
ZV_LCDDATA_10
ZV_LCDDATA_11
ZV_LCDDATA_12
ZV_LCDDATA_13
ZV_LCDDATA_14
ZV_LCDDATA_15
ZV_LCDDATA_16
ZV_LCDDATA_17
ZV_LCDDATA_18
ZV_LCDDATA_19
ZV_LCDDATA_20
ZV_LCDDATA_21
ZV_LCDDATA_22
ZV_LCDDATA_23
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
VREFG
DPLUS
DMINUS
PVDD
PVSS
MPVDD
MPVSS
XTALIN
XTALOUT
GPIO8
GPIO9
GPIO10
ROMCS#
5
PART 2 OF 10
DVO
GPIO
Thermal
Diode
Mem PLL
XTAL
TMDS
I2C
DAC1
DAC2
Hot Plug
DDC
PLL
TEST
ROM
TXCM
TXCP
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TPVDD
TPVSS
TXVDDR_1
TXVDDR_2
TXVSSR_1
TXVSSR_2
TXVSSR_3
VSYNC
HSYNC
STEREOSYNC
AUXWIN
RSET
AVDD_1
AVDD_2
AVSSQ
AVSSN_1
AVSSN_2
VDD1DI
VSS1DI
H2SYNC
V2SYNC
COMP
R2SET
A2VDD_1
A2VDD_2
A2VSSN_1
A2VSSN_2
A2VDDQ
A2VSSQ
VDD2DI
VSS2DI
HPD1
DDC1DATA
DDC1CLK
DDC2DATA
DDC2CLK
DDC3DATA
DDC3CLK
TESTEN
ROMCSb
Test
RP193A33R
81
RP193D33R
54
RP193C33R
63
RP193B33R
72
AW23
AW24
AV24
AV25
AW26
AW27
AV27
AV28
AW21
AV22
AW29
AV30
AV29
AV26
AV23
AV33
R
AW33
G
AW32
B
AU36
AU35
AR36
AR35
AW35
AV34
AV35
AT34
AU34
AU33
AP35
AP36
AV31
R2
AU31
G2
AW30
B2
AN31
AP31
AR32
C
AT32
Y
AT31
AV32
AP28
AN28
AP29
AN29
AM28
AM29
AL29
AK29
AL16
AT36
AT35
AL17
AM16
AN32
AP32
AN33
AK13
+3.3V_BUS
R91
10K
SERIAL EEPROM 512K/1M
4
R52 499R
AVDD
GND_AVSSQ
R55 715R
1.0uF
C35
TESTEN
ROM_SO
SI/A16
SCK/WEb
CSb
HOLD1
4
GND_RSET
C7
1.0uF
DNI
GND_R2SET
B8 Bead
C34
C36
22uF_16V
100nF
R431K
+3.3V_BUS
C80
100nF
ALTERNAT IVE PART : M25P05(512Kbit)
INSTALL TERMINATION RESISTORS
CLOSE TO ASIC
R797 330R
R796 330R
R795 330R
R794 330R
1.0uF
C15
C9
22uF_16V
+AVDD
C40
100nF
C23
22uF_16V
GND_AVSSN
1.0uF
DNI
C31
+VDD_1.8V+VDD2DI
ROM_SO (23)
SI/A16 (23)
SCK/WEb (23)
CSb (23)
U11
D
C
S
HOLD
W
VCC
VSS
M25P05-AVMN6T
2
Q
4
5
6
1
7
3
8
3
C17
82pF
TXVDDR
Ba3
B5
Bead
C33
100nF
GND_A2VSSN
MU11
BIOS
113-A31901-001
3
C13
100nF
C8
82pF
+A2VDD
ROMCS#
+TPVDD
GND_TPVSS
+VDD_1.8V
C32
22uF_16V
1.0uF
C37
C16
22uF_16V
C21
100nF
1.0uF
C29
+A2VDDQ
C38
100nF
GND_A2VSSQ
<Variant Name>
R44
Rk
0R
DNI
Ba2
B4
Bead
GND_TXVSSR
+VDDDI
C30
100nF
Ba5
C39
22uF_16V
2
TXCM (18)
TXCP (18)
TX0M (18)
TX0P (18)
TX1M (18)
TX1P (18)
TX2M (18)
TX2P (18)
+VDD_1.8V
+3.3V_BUS
R50
4.7K
R_DAC1 (16)
G_DAC1 (16)
B_DAC1 (16)
VSYNC_DAC1 (14,16)
HSYNC_DAC1 (14,16)
STEREOSYNC (21)
+VDD_1.8V
B7
Bead
C28
22uF_16V
R_DAC2 (17)
G_DAC2 (17)
B_DAC2 (17)
HSYNC_DAC2 (14,17)
VSYNC_DAC2 (14,17)
C_DAC2 (21)
Y_DAC2 (21)
COMP_DAC2 (21)
+VDD_1.8V
B9
Bead
+3.3V_BUS +3.3V_BUS
R53
R54
4.7K
4.7K
HPD1 (18)
SDA (15,19)
SCL (15,19)
CRT1DDCDATA (16)
CRT1DDCCLK (16)
CRT2DDCDATA (17)
CRT2DDCCLK (17)
+3.3V_BUS
R1836
10R
JU_LED
JU2
SDA
R25 33R
SCL
R26 33R
Title
Size Document Number Rev
C
Date: Sheet
2
1
2
3
4
4x2mm
JU_LED connector in
the vicinity of Top Left
corner
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
AGP R480+Rialto 256MB BGA DVII DVII VIVO
105-A49000-00A
1
0
of
428Friday, January 28, 2005
1
www.vinafix.vn
5
4
3
2
1
U1G
A7
VDDR1_1
E1
VDDR1_2
T36
VDDR1_3
A17
VDDR1_4
A19
VDDR1_5
A22
VDDR1_6
A26
D D
+MVDDQ
C600
10nF
C70
10uf
C72
10uf
C617
C616
10nF
10nF
C C
B B
+MVDDQ
B29 220R
B30 220R
C668
1.0uF
C669
100nF
C71
10uf
C618
10nF
C73
10uf
C667
1.0uF
C601
10nF
C602
10nF
C608
10nF
C612
10nF
C619
10nF
B31 220R
C670
100nF
C613
10nF
C620
10nF
C609
10nF
C603
10nF
C666
1.0uF
C604
10nF
C610
10nF
C615
C614
10nF
10nF
C621
C622
10nF
10nF
B32 220R
C671
100nF
C611
10nF
C605
10nF
GND_VSSRH0GND_VSSRH1GND_VSSRH2GND_VSSRH3
C623
10nF
C665
1.0uF
C707
C69
1uF
100nF
C606
10nF
C708
100nF
C676
100nF
C672
100nF
C607
10nF
AM15
AM14
AH10
AH12
AG14
AG13
AE13
AW9
AW6
AL15
AL10
AF13
A29
A32
N14
K39
F8
J11
M14
AR1
AK1
AM7
AL8
G8
L14
U1
U11
AL7
H9
AK9
AG7
AK4
N13
AF8
N27
W7
L10
H8
G9
AF7
V13
W13
AA1
AD1
AF1
Y8
K11
V11
U6
T33
U33
U34
M13
L13
G20
G19
L22
L23
N29
P29
L31
M1
M12
H20
M23
N25
N26
M30
M31
N16
N17
N18
N21
N22
N23
N39
R1
Y7
U27
T27
N28
U13
U12
C38
A13
H1
AM1
D36
A14
J1
AN1
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDDR1_19
VDDR1_20
VDDR1_21
VDDR1_22
VDDR1_23
VDDR1_24
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
VDDR1_29
VDDR1_30
VDDR1_31
VDDR1_32
215RBKAGA11F
VDDR1_33
VDDR1_34
VDDR1_35
VDDR1_36
VDDR1_37
VDDR1_38
VDDR1_39
VDDR1_40
VDDR1_41
VDDR1_42
VDDR1_43
VDDR1_44
VDDR1_45
VDDR1_46
VDDR1_47
VDDR1_48
VDDR1_49
VDDR1_50
VDDR1_51
VDDR1_52
VDDR1_53
VDDR1_54
VDDR1_55
VDDR1_56
VDDR1_57
VDDR1_58
VDDR1_59
VDDR1_60
VDDR1_61
VDDR1_62
VDDR1_63
VDDR1_64
VDDR1_65
VDDR1_66
VDDR1_67
VDDR1_68
VDDR1_69
VDDR1_70
VDDR1_71
VDDR1_72
VDDR1_73
VDDR1_74
VDDR1_75
VDDR1_76
VDDR1_77
VDDR1_78
VDDR1_79
VDDR1_80
VDDR1_81
VDDR1_82
VDDR1_83
VDDR1_84
VDDR1_85
VDDR1_86
VDDR1_87
VDDR1_88
VDDR1_89
VDDR1_90
VDDRH_0
VDDRH_1
VDDRH_2
VDDRH_3
VSSRH_0
VSSRH_1
VSSRH_2
VSSRH_3
Memory I/O
Memory I/O
Clock Generator
PART 7 OF 10
POWER
I/O
PCIE
CORE
I/O (INTERNAL)
PCIE_VDDR_12_10
PCIE_VDDR_12_9
PCIE_VDDR_12_1
PCIE_VDDR_12_2
PCIE_VDDR_12_3
PCIE_VDDR_12_4
PCIE_VDDR_12_5
PCIE_VDDR_12_6
PCIE_VDDR_12_7
PCIE_VDDR_12_8
PCIE_PVDD_12_1
PCIE_PVDD_12_2
PCIE_PVDD_12_3
PCIE_PVDD_12_4
PCIE_PVDD_12_5
PCIE_PVDD_18_1
PCIE_PVDD_18_2
PCIE_PVDD_18_3
PCIE_PVDD_18_4
PCIE_PVDD_18_5
PCIE_PVDD_18_6
PCIE_PVDD_18_7
VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8
VDDR4_1
VDDR4_2
VDDR4_3
VDDR4_4
VDDR4_5
VDDR4_6
VDDR5_1
VDDR5_2
VDDR5_3
VDDR5_4
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33
VDDC_34
VDDC_35
VDDC_36
VDDC_37
VDDCI_8
VDDCI_7
VDDCI_6
VDDCI_5
VDDCI_4
VDDCI_3
VDDCI_2
VDDCI_1
VDD15_6
VDD15_5
VDD15_4
VDD15_3
AH16
AH28
AH27
AG16
AJ28
AJ29
AH15
AJ27
AH21
AJ22
AH22
AK21
AL21
AL22
AH18
AH19
AL18
AL19
AE28
AF28
AG29
AG28
AK31
AK30
AJ30
AJ31
AF30
AF29
AD28
AC27
AC29
AD27
AC28
AB30
AA30
AA29
AB29
AB28
AA28
AB27
AC21
U19
U21
AC19
V18
V19
V20
V21
V22
W18
W19
W20
W21
W22
Y19
Y20
Y21
AA18
AA19
AA20
AA21
AA22
AB18
AB19
AB20
AB21
AB22
W17
Y18
AA17
AA23
Y22
W23
U18
U22
AC18
AC22
Y27
Y13
N20
AG20
AC20
Y23
Y17
U20
AG22
AG21
AG18
AG17
+VDDC_CT
+VDDR4
+VDDR5
change to 4210010600
C1668
10uF_6.3V
PCIE_PVDD_12
C1675
10uF_6.3V
C48
100nF
+3.3V_BUS
C49
100nF
C74
1.0uF
C75
1.0uF
C1702
10uF_6.3V
C1703
10uF_6.3V
C1704
10uF_6.3V
C632
10nF
C637
10nF
C61
10uf
C67
22uF_16V
B12 220R
B14 220R
C633
10nF
C638
10nF
C62
10uf
C50
100nF
C709
100nF
C710
100nF
+PCIE_VDDR_12
C1669
100nF
+PCIE_PVDD_12
C1673
1nF
C1676
1nF
C53
22uF_16V
C66
1.0uF
C634
10nF
C639
10nF
C1670
1nF
C1674
100nF
C624
10nF
C1677
100nF
C59
10uF_10V
C625
10nF
DNI
R69 0R
R70 0R
DNI
R67 0R
R68 0R
+PCIE_PVDD_18
C635
10nF
C640
10nF
C646
10nF
L81
60R
C636
1.0uF
C641
10nF
C63
10uF_10V
C648
10nF
C626
10nF
+3.3V_BUS
+VDD_1.8V
+3.3V_BUS
+VDD_1.8V
C56
1.0uF
C642
10nF
+VDDC
C60
10uf
C627
10nF
+PCIE_VDDR
L82
42r@100MHz
C57
1.0uF
C643
10nF
C1952
10nF
+VDDC
C673
1.0uF
C644
10nF
C1953
10nF
C1954
10nF
C1955
10nF
A A
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
Title
AGP R480+Rialto 256MB BGA DVII D VII VIVO
Size Document Number Rev
C
5
4
3
2
Date: Sheet
105-A49000-00A
1
0
of
528Friday, January 28, 2005
www.vinafix.vn
5
4
3
2
1
U1H
AB31
AD33
AD32
AD37
AG36
AE35
AE36
AH35
AG30
AF32
Y34
D D
C C
B B
A A
AH37
AH36
AE29
AN37
AH30
AC32
AK37
AD29
AF33
AL35
AM37
AJ33
AL37
AL32
AE34
AF36
AC30
AF27
AG32
AJ37
AC33
AH32
AH34
AF31
AD30
AB34
AC31
AB37
AC37
AL33
AB35
AB36
AE37
AA37
AE30
AA31
AE27
AR37
AT37
AP37
AN34
AL36
AK33
AK32
AJ32
AL11
AJ15
Y37
Y35
Y33
J10
R33
A16
A20
A23
A25
A28
A31
G37
D10
D13
D19
D28
D34
D35
E10
E12
E13
E18
E19
E27
E28
E33
E34
E38
H10
F13
F19
F28
H34
C34
H11
G11
G13
G14
G16
G17
G23
G33
G34
G35
V31
F25
G10
F11
H14
H17
M29
H33
H39
F10
F16
J15
PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
PCIE_VSS_28
PCIE_VSS_29
PCIE_VSS_30
PCIE_VSS_31
PCIE_VSS_32
PCIE_VSS_33
PCIE_VSS_34
PCIE_VSS_35
PCIE_VSS_36
PCIE_VSS_37
PCIE_VSS_38
PCIE_VSS_39
PCIE_VSS_40
PCIE_VSS_41
PCIE_VSS_42
PCIE_VSS_43
PCIE_VSS_44
PCIE_VSS_45
PCIE_VSS_46
PCIE_VSS_47
PCIE_VSS_48
PCIE_VSS_50
PCIE_VSS_51
PCIE_VSS_52
PCIE_VSS_53
PCIE_VSS_54
PCIE_VSS_55
PCIE_VSS_56
PCIE_VSS_57
PCIE_VSS_58
PCIE_VSS_59
PCIE_VSS_60
A8
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
B3
VSS_10
VSS_11
Y6
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
F1
VSS_21
E4
VSS_22
E9
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
F4
VSS_34
F5
VSS_35
G6
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
G5
VSS_43
G7
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
H7
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
J5
VSS_65
K5
VSS_66
F9
VSS_67
VSS_68
VSS_69
VSS_70
215RBKAGA11F
5
PART 8 OF 10
GND
VSS_280
VSS_279
VSS_278
VSS_277
VSS_276
VSS_275
VSS_274
VSS_273
VSS_272
VSS_271
VSS_270
VSS_269
VSS_268
VSS_267
VSS_266
VSS_265
VSS_264
VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_198
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_188
VSS_187
VSS_186
VSS_185
VSS_184
VSS_183
VSS_182
VSS_181
VSS_180
VSS_179
VSS_178
VSS_177
VSS_176
VSS_175
VSS_174
VSS_173
VSS_172
VSS_171
VSS_170
VSS_169
VSS_168
VSS_167
VSS_166
VSS_165
VSS_164
VSS_163
VSS_162
AL27
AH20
AK25
R35
T34
AK16
L20
AL5
AV21
AN7
AL6
AH5
AK27
AH26
AK6
AN26
AK17
AL12
U30
AM6
AK8
AG6
AG5
AG4
AR34
AJ18
AL25
AJ14
AK14
AP8
AJ8
AJ7
AJ1
AH17
AH14
AG19
AG23
AG15
AG1
AR33
AT33
AP33
J6
AU18
AP34
AE9
AE5
T35
F30
E30
K31
H31
F31
H32
AD13
AD11
AD10
AD9
AD7
AC6
AD5
AD6
E21
D22
G32
G36
AC13
AC12
AC11
AC8
AC7
AC1
E22
F22
M25
J7
AU37
AT12
H4
V23
AB23
AB13
AB9
AB5
AU32
W11
AF4
AA13
AA11
AA10
AA9
U7
W6
Y5
AA5
AJ9
AR19
Y28
AG25
AU9
Y12
Y11
U8
V7
Y1
AJ19
Y32
Y30
Y29
W35
W30
W34
W27
V35
W32
V27
AB17
V17
V1
AU27
AH23
AM33
AC17
AC23
4
J16
J24
J25
L29
N36
N35
J35
F7
K16
K25
K33
K34
K35
K36
L1
L7
L9
L11
E16
L16
L17
L25
L26
J34
L33
L39
P4
N5
M8
M7
M9
M10
M11
E15
M17
M26
M35
P5
N9
L12
J4
D16
N15
N19
J30
N24
H23
G22
U28
U29
N30
N31
N33
N34
AJ25
P1
P8
P7
P11
P12
P13
P27
P28
T29
L30
M33
P39
R4
R5
R6
R7
R9
R10
R11
R13
R27
T5
T9
T13
U17
Y31
U23
K30
H29
J29
K29
G28
H28
J28
G26
H26
D25
E25
G25
E24
J22
K22
J21
J19
K19
J18
J14
J13
K13
D7
E7
E6
U5
U1I
VSS_71
PART 9 OF 10
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_156
VSS_158
VSS_159
VSS_160
VSS_371
VSS_372
VSS_373
VSS_374
VSS_375
VSS_376
VSS_377
VSS_378
VSS_379
VSS_380
VSS_381
VSS_382
VSS_383
VSS_384
VSS_385
VSS_386
VSS_387
VSS_388
VSS_389
VSS_390
VSS_391
VSS_392
VSS_393
VSS_394
VSS_395
VSS_396
215RBKAGA11F
VSS_363
VSS_362
VSS_361
VSS_360
VSS_359
VSS_358
VSS_357
VSS_356
VSS_355
VSS_354
VSS_353
VSS_352
VSS_351
VSS_350
VSS_349
VSS_348
VSS_347
VSS_346
VSS_345
VSS_344
VSS_343
VSS_342
VSS_341
VSS_340
VSS_339
VSS_338
VSS_337
VSS_336
VSS_335
VSS_334
VSS_333
VSS_332
VSS_331
VSS_330
VSS_329
VSS_328
VSS_327
VSS_326
VSS_325
VSS_324
VSS_323
VSS_322
VSS_321
VSS_320
VSS_319
VSS_318
VSS_317
VSS_316
VSS_315
VSS_314
VSS_313
VSS_312
VSS_311
VSS_310
VSS_309
VSS_308
VSS_307
VSS_306
VSS_305
VSS_304
VSS_303
VSS_302
VSS_301
VSS_300
VSS_299
VSS_298
VSS_297
VSS_296
VSS_295
VSS_294
VSS_293
VSS_292
VSS_291
VSS_290
VSS_289
VSS_288
VSS_287
VSS_286
VSS_285
VSS_284
VSS_283
VSS_282
VSS_281
VSS_411
VSS_410
VSS_409
VSS_408
VSS_407
VSS_406
VSS_405
VSS_404
VSS_403
VSS_402
VSS_401
VSS_400
VSS_399
VSS_398
VSS_397
AA27
W36
W37
W39
R32
D12
E36
AK24
AW8
AW5
AT6
AT1
R28
AT27
AT24
D26
AT21
F17
M20
AT11
AT7
AR8
AN5
AL4
AR31
AM26
AR28
AU24
AR25
AU21
AR22
AJ24
AR18
AR16
AR15
AP14
AR12
AR9
AT8
AR7
AP10
AP30
AP27
AN24
AP21
AP18
AP15
AN11
AP9
AR5
AR13
AN30
AH25
AN27
AN23
AM24
AU30
AN21
AN20
AN18
AN17
AJ21
AN14
AN10
AM10
AM8
AT3
AN8
AT30
AH29
AM31
AT18
AM30
AM25
AP24
AM20
AM17
L19
AM11
AN9
AP7
AL31
AL28
AK5
AK11
AJ12
AJ11
AH9
AG11
AG10
AG9
AF11
AF12
W9
V10
V9
V5
V4
+A2VDD
+VDD_1.8V
R71
4.7K
U1J
AM32
PART 10 OF 10
SSIN
AL30
NC_1
AL13
NC_2
AL14
NC_3
AP25
LPVDD
AP26
LPVSS
AH24
LVDDR_18/VDDL0_1
AG24
LVDDR_18/VDDL0_2
AG27
LVDDR_25/VDDL1_1
AG26
LVDDR_25/VDDL1_2
AR27
LVSSR_1
AR26
LVSSR_2
AR21
LVSSR_3
AR20
LVSSR_4
215RBKAGA11F
GND_MPVSS GND_TPVSS GND_RSETGND_AVSSQ
3
AR29
NC_4
AR30
NC_5
AU28
NC_6
AU29
NC_7
AT28
NC_8
AT29
NC_9
AU25
NC_10
AU26
NC_11
AT25
NC_12
AT26
NC_13
AR23
NC_14
AR24
NC_15
AU22
NC_16
AU23
NC_17
AT22
NC_18
AT23
NC_19
AU19
NC_20
AU20
NC_21
AT19
NC_22
AT20
NC_23
GND_A2VSSN
GND_A2VSSQ
NOTE: THIS IS A DRAWING. THESE GROUNDS MUST
BE MANUALLY CONNECTED TO THE GROUND PLANE
<Variant Name>
2
GND_VSSRH0
GND_TVVSSNGND_AVSSN GND_R2SET
GND_VSSRH2
GND_VSSRH1
Title
Size Document Number Rev
C
Date: Sheet
GND_P
GND_VSSRH3GND_TXVSSRGND_PVSS
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
AGP R480+Rialto 256MB BGA DVII DVII VIVO
GND_RT
GND_A GND_VIN
105-A49000-00A
1
628Friday, January 28, 2005
0
of
www.vinafix.vn
8
7
6
5
4
3
2
1
D D
OPTIONAL
CORE REGULATOR VDDC
Trace as short as possible for 2A current
*
C1151 100nF
BAT54SLT1
+5V_BUS
D28
*
ISNS1
VID4
R18581K
DNI
R1591
SW1
ISNS2
R1603
R1589
0R
HDRV1
BOOT1
HDRV2
SW2
1.00K
C1161 100nF
+5V_BUS
PGND1
BOOT2
R1590
0R
LDRV1
PGND2
12345678910111213
C C
R1632
DNI
432R
C1173
1uF
C1157
1.00K
22nf
16171819202122232425262728
DELAY
ILIM
R18521K
R18531K
DNI
7
VCORE-
FPWM
R18541K
DNI
VCORE+
VID0
R18551K
SS
PGOOD
FAN5240MTCX
VID2
VID1
R18561K
R18571K
VIN
VID3
R1860
15K
1
R1861
2K
R1593 432R
+5V_BUS
Q37
CMPT3904
2 3
R1619
0R
R1840
2K
R1602
C1160
4.7K
1nf
+5V_BUS
VID
4 3 2 1 0 +VDDC
--------------------------------1 0 0 1 1 1.200
1 0 0 1 0 1.225
1 0 0 0 1 1.250
1 0 0 0 0 1.275
0 1 1 1 0 1.300
0 1 1 0 1 1.350
0 1 1 0 0 1.400
C1156
220nF
U43
EN AGND
14 15
R1596
41.2K
+12V_BUS
Do not install
This resistor will
be shorted in layout.
+3.3V_BUS +12V_BUS
B B
A A
R1595
243R
Q225
CMPT3904
1
R1598
221R
2 3
8
R1594
VCC
LDRV2
*
*
D29
BAT54SLT1
6
4 5
3
2
1
4 5
3
2
1
R1597
1.50K
R873 0R
10K
C1158
10uf
Q27
Thermal
Pad
FDS7096N3
Q28
Thermal
Pad
FDS7064N
DNI
+5V_BUS
C1159
0.22uF
FDS7064N
1
2
3
4 5
Pad
Thermal
Q210
FDS7096N3
1
2
3
4 5
Pad
Thermal
Q31
9
6
7
8
9
6
7
8
*
8
7
6
9
8
7
6
9
FDS7096N3
4 5
3
2
1
Q29
4 5
3
2
1
FDS7064N
R1592432R
1
2
3
4 5
1
2
3
4 5
Q232
Thermal
Pad
9
6
7
8
Q231
Thermal
Pad
9
6
7
8
***
VDDC_PGOOD (2)
FDS7064N
Pad
Thermal
Q224
Pad
Thermal
FDS7096N3
OPTIONAL
5
8
7
6
9
8
7
6
9
VIN
C1692
C1688
100nF
10uF
L63 1.71uH
1 2
R1851
2.2R
C1706
1nF
R1617
0R
DNI
PADS SHORTED IN
LAYOUT
R1618
0R
DNI
PADS SHORTED IN
LAYOUT
L64
1 2
R1859
2.2R
CHANGE TO 1.5uH 23A
VISHAY IHLP5050EZRZ1R5M01
C1707
1nF
VIN
CHANGE TO 1.5uH 23A
VISHAY IHLP5050EZRZ1R5M01
1.71uH
C1689
10uF
C1532
33uF_16V
4
C1690
10uF
C1152
1500uF
C1691
10uF
C1153
1500uF
+12VEXT
B79
60R
B78
60R
C1154
1500uF
+VDDC
C167
180uF_16V
C1155
1500uF
3
C1951
1500uF
C1948
330uF_2.5V
OPTIONAL
<Variant Name>
C1949
330uF_2.5V
C1950
330uF_2.5V
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
Title
AGP R480+Rialto 256MB BGA DVII DVII VIVO
Size Document Number Rev
C
Date: Sheet
2
105-A49000-00A
of
728Friday, January 28, 2005
1
0
www.vinafix.vn
8
7
6
5
4
3
2
1
+12V_BUS
+5V_BUS
DNI
R372
R373
0R
2R2
D4
BAT54SLT1
C142
1uF
DNI
DNI
C136
0.22uF
C141
22nf
D D
Alternative 1
+PW_VDDC1
SS_VDDC1
COMP_VDDC1
Fb_VDDC1
C C
+12V_BUS
+5V_BUS
DNI
R371
R370
2R2
0R
D5
BAT54SLT1
R112
DNI
0R
R314 0R
C158
0.22uF
DNI
C157
1uF
C169
22nf
B B
Alternative 1
R305 51K
+PW_VDDC2
R306 3K
SS_VDDC2
COMP_VDDC2
Fb_VDDC2
A A
8
MVDDQ Switching Regulator for
Memory Core for 256M
configuration
BST1
R376
0R
R251 0R
SS_VDDC1
Fb_VDDC1
COMP_VDDC1
UVIN1
SWN1
Alternative 2
R258 51K
R259 3K
MVDDC Switching Regulator for
Memory Core for 256M
configuration
BST2
SS_VDDC2
Fb_VDDC2
COMP_VDDC2
UVIN2
SWN2
Alternative 2
U31
DNI
7
SS
4
Vfb
5
COMP
6
UVIN
8
SWN
SP6132
SIPEX SP6132
R257 10K
MU31
2
OCSET
3
SS
4
COMP
5
FB
6
EN
7
GND
ISL6522CB
ISL6522CB : SOIC
ISL6522CV : TSSOP
BOOT_VDDC2
U32
DNI
7
BST
SS
GH
4
Vfb
5
GND
COMP
6
GL
UVIN
8
Vcc
SWN
SP6132
SIPEX SP6132
R307 10K
MU32
2
OCSET
3
SS
4
COMP
5
FB
6
EN
7
GND
ISL6522CB
ISL6522CB : SOIC
ISL6522CV : TSSOP
BOOT_VDDC1
BST
GH
GND
GL
Vcc
LGATE
UGATE
PHASE
10
9
3
2
1
VCCRT
PVCC
LGATE
PGND
BOOT
UGATE
PHASE
10
9
3
2
1
VCCRT
PVCC
PGND
BOOT
BST2
MVDDC_UGATE
MVDDC_LGATE
MVDDC_VCC
141
13
12
11
10
9
8
7
BST1
MVDDQ_UGATE
M<VDDQ_LGATE
MVDDQ_VCC
141
13
12
11
BOOT_VDDC1
10
9
8
BOOT_VDDC2
C122 100nF
+12V_BUS
C121 100nF
+12V_BUS
SWN1
4 5
3
2
1
4 5
3
2
1
IRF7413ATR (2020005600)
C113
1uF
SWN2
R255
2.2R
Q23
4 5
3
2
1
IRF7413A
Q24
4 5
3
2
1
IRF7413A
Fb_VDDC2
IRF7413ATR (2020005600)
R308
C160
2.2R
C159
1uF
1nF
EXTERNAL POWER DETECT
GPIO8(4,14)
PCIETEST(22)
GPIO15(4)
R910 0R
DNI
R909 0R
Q21
IRF7413A
Q22
IRF7413A
Fb_VDDC1
C116
1nF
R874 0R
DNI
6
6
7
8
6
7
8
6
7
8
6
7
8
MMBT3906
C1678
C1679
10uF
100nF
L65
1.5uH
C110
1nf
R254
1.5K
C1683
100nF
L66
1.5uH
C161
1nf
Cc1 Cout1
R309
1.5K
Rc4
+5V_BUS
Q233
10uF
***
Rc1
Cc1
R253
***
1.87K
1%
Rc4
Rc2
R256
1.24K
1%
+PW_VDDC2 UVIN2
C1681
C1682
10uF
10uF
***
Rc1
R310
***
1.87K
1%
+MVDDC = REF * (1+Rc1/Rc2)
Rc2
R311
1.24K
1%
23
1
R1567
0R
C1132
1nf
R917
562R
R918
1.0K
5
+PW_VDDC1
C1680
+5VEXT
+5V_BUS
B21
B76
60R
60R
DNI
***
C106
330uF_2.5V
C105
330uF_2.5V
Cout1
***
+MVDDQ = REF * (1+Rc1/Rc2)
+5VEXT
+5V_BUS
B28
60R
DNI
330uF_2.5V
***
C164
C165
330uF_2.5V
***
+5VEXT
R1565
1K
+MVDDQ
B77
60R
+MVDDC
Connector_4_Pin
J1
R377
DNI
63.4K
C104
330uF_2.5V
C163
180uF_16V
R374
DNI
220K
R375
100K
DNI
C166
330uF_2.5V
+12VEXT +12V_BUS
4
3
2
1
C1167
J1
10uF
UVIN1
R378
100K
DNI
+5VEXT +5V_BUS
C1169
2.2uF
ONLY THROUGH
JU1 PINS 2 AND 3.
4
C1170
10uF
D41
S3AB
D38
S3AB
+5VEXT
F
21
21
C1171
10uF_25V
R1685 0R
R1686 0R
External Power
R250
2K
R249
2.4K
1
Q9
CMPT3904
+12V_BUS
R248
20K
CMPT3904
2 3
SS_VDDC1
1
2 3
Q10
+MVDDC
POWER SEQUENCING CIRCUIT:
R1849
1K
R1850
2.4K
+12VEXT
C1168
10uF_25V
1
Q228
CMPT3904
+12V_BUS
R1848
20K
CMPT3904
2 3
<Variant Name>
SS_VDDC2
1
2 3
Q227
+VDDC
3
DESIGN NOTES:POWER SEQUENCING CIRCUIT:
Add this Capacitor for SP6132
COMP_VDDC1
C140
DNI
2.2nF
Compensation Circuit
COMP_VDDC1
C111
Cc3
Rc5
C112
10nF
33pF
R264
15K
Fb_VDDC1
Cc2
FOR ALTERNATE #2
Change C142 for 10uF
Change C122 for 1uF
Replace R251 with a bead
Swap Rc4 with Cc1
DESIGN NOTES:
Add this Capacitor for SP6132
Compensation Circuit
Cc2
Cc4
COMP_VDDC2
C171
10nF
Rc5
COMP_VDDC2
C168
100pF
C170
33pF
R313
15K
DNI
Cc3
Fb_VDDC2
FOR ALTERNATE #2
Change C157 for 10 uF
Change C121 for 1 uF
Replace C764 by 0 Ohm resistor
Remove R954
Replace R314 with a bead
Swap Rc4 with Cc1
ATI Technologies Inc.
1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
(905) 882-2600
Title
AGP R480+Rialto 256MB BGA DVII DVII VIVO
Size Document Number Rev
C
Date: Sheet
2
105-A49000-00A
of
828Friday, January 28, 2005
1
0
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