MSI MS-V008 Schematic 0A

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Title

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Date:Schematic No.

AGP RV410 DV VG VIVO 256MB DDR3

105-A41800-00

REVISION HISTORY

D D

Sch
Rev

PCB
Rev

0

00A Initial release, based on A379 RV410 Pipecleaner.

00B1 Unify Chassis and Digital Gnd.

Date

06/08/04

08/10/04

REVISION DESCRIPTION

Thursday, December 23, 2004

Rev

3

Update ASIC memory VREF divider to 70%. Change R138, R149, R151, R159 to 3160100000
Update ASIC memory voltages from 1.9V to 2.1V, change R256 and R311 to 3240124100, change R253 and R310 to 3240200100
Added option for new Capacitors to input of +VDDC Regulator C1705 and alternate MC1705.
Add option for different bulk capcitors on the ouptupt of +VDDC, +MVDDC, +MVDDQ regulators. These alternates are for Polymer Caps and Throughhole

LOW ESR electrolytic caps.

C C

00C2 Change +PCIE_VDDR Regulator REG7 to RT9194 with MTD3055.

25/10/04

Add Option three resistor packs (RP207, RP208, RP210) to give option to short +MVDDC and +MVDDQ. Power bufget must be verified before implementing.

003 Add B2 to share +B_VDDC with +PCIE_VDDR_12.

5/12/04

B B

A A

5

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MEMORY CHANNEL A

Rank 1

D D

VIDEO IN
CONNECTOR

SHT 20

+12V EXT.

EXTERNAL
POWER
CONNECTOR

POWER

REGULATION

SHT 5, 6, 7, 8, 9

C C

From +12v
SINGLE PHASE SWITCHING:

VDDC, MVDDC, MVDDQ

From +12V DIRECT:

FAN

From +12V LINEAR:

+5V, RAGE THEATER

From +3.3 V LINEAR:

AVDD, VDD15, VDDRH
TPVDD, TXVDDR, PVDD,
AVDDDI, A2VDD, A2VDDDI,
A2VDDQ, PCIE_VDDR,
PCIE_PVDD_18, VDDC_CT
VDDR4, VDDR5

From +3.3 V DIRECT:

VDDR3

Rank 0

GDDRIII (144 BALL BGA)

SHT 12

MAA[14..0]
QSA[7..0]

QSA#[7..0]

CASA#

RASA#

STRAPS

Speed control
& temperature

SHT 15

sense

POWER DELIVERY

BIOS

SHT 4

FAN

SHT 15

SHT 14

ROMCS#

CLKA01

DQMA[0..7]
WEA#

CLKA01#

CSA#01MDA[63..0]

RESET

CKEA/B

MEM A MEM B

GPIO

SHEET 3 , 4, 5, 6, 10, 11

ROM

RV410

PCI-Express

DAC1

DAC2

TMDS

VIP

TVO

CRT

MAB[14..0]

MAB[14..0]

QSB[7..0]

QSB#[7..0] RESET

RASB#

CASB#

DVP

R G B HSY VSY DDC1DATA DDC1CLK

TMDS_TX[C,2..0]N TMDS_TX[C,2..0]P HPD, DDC2CLK DDC2DATA

MEMORY CHANNEL B

Rank 1

Rank 0

GDDRIII (144 BALL BGA)

SHT 13

DQMB[0..7]

CSB#01

WEB#

CKEBCLKB01

CLKB01#

External TMDS

PRIMARY CRT

FILTERS

SHEET 16

Rage Theater 1

SHT 19

TVOUT
FILTERS

SHT 20

SECONDARY
CRT FILTERS

SHT 16, 17

IMPEDANCE
MATCHING

SHT 4

DVI-I

CONN

SHT 16

TVout/

VIVO

CONN

SHT 20

DVI-I

CONN

SHT 18

ROM

PCI-Express

Rialto

GPIO

STRAPS

SHT 14

B B

POWER DELIVERY

AGP

RV410 + Rialto Pipecleaner

AGP Bus

SHT 2

A A

5

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REV 1

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AGP RV410 DV VG VIVO 256MB DDR3

Size Docum e n t N u mb er R e v

C

2

Date: Sheet

105-A41800-00

1

3

of

127Thursday, D e cember 23, 2004

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LAYOUT NOTE: S OME OF TH E CAPS BELOW MAY BE
REMOVED IF SPACE IS AN ISSUE, ASK BEFORE REMOVING

+12V_BUS

C12
10uF_20V

+5V_BUS +3.3V_BUS

C5
47uF_6.3V

C10
47uF_6.3V

+VDDQ_BUS

Use 47uF Tant. 16V 20% D si ze (P/ N 4230047600),
800mR Max. ESR and Max. ripple 430mA @ 100kHz
or
100uF, Alum. 6.3V 20% 6.3mm dia (P/N 4261010700),

C4
100uF_6.3V

440mR Max. ESR and Max. ripple 230mA @ 100kHz

>= 6.3V

or
47uF, Alum. 6.3V 20% 5mm dia (P/N 4262047600),
760mR Max. ESR and Max. ripple 150mA @ 100kHz

Place C2 on left side of AGP connector

D D

AGP_TYPEDET#
AGP_GC_8X_DET#

AGP_INTR#(21)

AGP_GNT#(21)

AGP_MB_8X_DET#(21)

AGP_DBI_HI(21)

AGP_WBF#(21)

AGP_SBSTB#(21)

C C

AGP_ADSTB1#(21)

AGP_FRAME#(21)

AGP_TRDY#(21)

AGP_STOP#(21)

AGP_PAR(21)

AGP_ADSTB0#(21)

B B

AGP_CON_RESET#

R7 0R
R9 0R

R1 0R

R5 0R

R12 0R

AGP_VREFGC

402
402

402

402

402

4

+3.3V_BUS

+VDDQ_BUS

AGP_ST1
AGP_MB_8X_DET#_R
AGP_DBI_HI_R

AGP_SBA1
AGP_SBA3

AGP_SBA5
AGP_SBA7

AGP_AD30
AGP_AD28

AGP_AD26
AGP_AD24

AGP_C/BE#3
AGP_AD22

AGP_AD20
AGP_AD18

AGP_AD16

AGP_PAR_R
AGP_AD15
AGP_AD13

AGP_AD11
AGP_AD9

AGP_C/BE#0

AGP_AD6
AGP_AD4

AGP_AD2

4X/8X AGP BUS

+12V_BUS

MAGP1

A1

12V

A2

TYPEDET#

A3

GC_DET#/RESERVED

A4

USB-

A5

GND

A6

INTA#

A7

RST#

A8

GNT#

A9

VCC3.3

A10

ST1

A11

MB_DET#/RESERVED

A12

DBI_HI/PIPE#

A13

GND#A13

A14

WBF#

A15

SBA1

A16

VCC3.3#A16

A17

SBA3

A18

SB_STB#

A19

GND#A19

A20

SBA5

A21

SBA7

A22

RESERVED

A23

GND#A23

A24

RESERVED#A24

A25

VCC3.3#A25

A26

AD30

A27

AD28

A28

VCC3.3#A28

A29

AD26

A30

AD24

A31

GND#A31

A32

AD_STB1#

A33

C/BE3#

A34

VDDQ1.5

A35

AD22

A36

AD20

A37

GND#A37

A38

AD18

A39

AD16

A40

VDDQ1.5#A40

A41

FRAME#

A42

KEY

A43

KEY#A43

A44

KEY#A44

A45

KEY#A45

A46

TRDY#

A47

STOP#

A48

PME#

A49

GND#A49

A50

PAR

A51

AD15

A52

VDDQ1.5#A52

A53

AD13

A54

AD11

A55

GND#A55

A56

AD9

A57

C/BE0#

A58

VDDQ1.5#A58

A59

AD_STB0#

A60

AD6

A61

GND#A61

A62

AD4

A63

AD2

A64

VDDQ1.5#A64

A65

AD0

A66

VREFGC

1.5V_AGP_BUS

OVRCNT#

5.0V#B3
USB+

GND#B5

INTB#
REQ#

VCC3.3#B9

RBF#

GND#B13

DBI_LO/RESERVED

SBA0

VCC3.3#B16

SBA2

SB_STB

GND#B19

SBA4
SBA6

RESERVED#B22

GND#B23

3.3VAUX

VCC3.3#B25

AD31
AD29

VCC3.3#B28

AD27
AD25

GND#B31
AD_STB1

AD23

VDDQ1.5#B34

AD21
AD19

GND#B37

AD17

C/BE2#

VDDQ1.5#B40

IRDY#
KEY#B42
KEY#B43
KEY#B44
KEY#B45

DEVSEL#

VDDQ1.5#B47

PERR#

GND#B49

SERR#
C/BE1#

VDDQ1.5#B52

AD14
AD12

GND#B55

AD10

VDDQ1.5#B58

AD_STB0
GND#B61

VDDQ1.5#B64

VREFCG

3

AGP_C/BE#[3..0]
AGP_AD[31..0]
AGP_SBA[7..0]
AGP_ST[2..0]

+3.3V_BUS

+5V_BUS

+VDDQ_BUS
B1
B2

5.0V

B3
B4
B5
B6
B7

CLK

B8
B9
B10

ST0

B11

ST2

B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57

AD8

B58
B59
B60

AD7

B61
B62

AD5

B63

AD3

B64
B65

AD1

B66

AGP_ST0
AGP_ST2

AGP_SBA0
AGP_SBA2

AGP_SBA4
AGP_SBA6

AGP_AD31
AGP_AD29

AGP_AD27
AGP_AD25

AGP_AD23
AGP_AD21

AGP_AD19
AGP_AD17

AGP_C/BE#2

AGP_C/BE#1
AGP_AD14

AGP_AD12
AGP_AD10

AGP_AD8

AGP_AD7
AGP_AD5

AGP_AD3
AGP_AD1AGP_AD0

AGP_DBI_LO_R

AGP_SBSTB_R

AGP_ADSTB1_R

AGP_ADSTB0_R

AGP_AGPREF

R8 0R

R2 0R

R10 0R

R13 0R

AGP_C/BE#[3..0] (21)
AGP_AD[31..0] (21)
AGP_SBA[7..0] (21)
AGP_ST[2..0] (21)

2

+5V_BUS

AGP_CON_RESET#

AGP_AGPCLK (21)
AGP_REQ# (21)

AGP_RB F # (21)

402

AGP_DBI _LO (21)

402

AGP_SBSTB (21)

402

AGP_ADSTB1 (21)

AGP_IRDY# (21)

AGP_DEVSEL# (21)

5
4

74ACT08MTC

6

U2B

R3 100R

+5V_BUS

14

+-U2A

1
2

74ACT08MTC

7

1

SYMBOL LEGEND

DO NOT

DNI

INSTALL

#

ACTIVE
LOW

DIGITAL
GROUND

ANALOG
GROUND

AGP_RESET# (16,18,21)

R4
180R

402

3

C1
100nF

Spare gate

402

AGP_ADSTB0 (21)

+12V_BUS

C22
100nF

402

+5V_BUS

+3.3V_BUS

C25
100nF

402 402

C24
100nF

Caps for EMI - install close to AGP connector

UNIVERSAL VREFGC CIRCUIT (4X, 8X)

TEST

+VDDQ_BUS

1

32

Q1

R20
324R

2N7002E

R21
147R

R24
100R

402

AGP_VREFGC

C6
10nF

402

Close to ASIC

2

+3.3V_BUS

1

Q20

BSN20

+5V_BUS

53

+

1
2

-U4TC7SZ08FU

3

32

+12V_BUS

C3
100nF

4

R6
20K

402402

402

R23
1K

402

AGP_TYPEDET#

AGP_GC_8X_DET#

A A

R19

5.1R

R63
0R

402

+12V, TYPEDET#
short protection
for OEM (5.1R)

R17

AGP_MB_8X_DET#(21)

AGP_MB_8X_DET#

47K

May be placed far from connector -- place C3 FAR from connector, on left side!!

5

4

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AGP_AGPREF

TEST

UNIVERSAL VREFCG CIRCUIT (4X, 8X)

+VDDQ_BUS

32

1

Q77

2N7002E

R72
147R

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AGP RV410 DV VG VIVO 256MB DDR3

Size Docum e n t N u mb er R e v

C

Date: Sheet

R75
324R

402 402402

R74
100R

DNI

R73
0R

AGP_AGPREFCG

C11
10nF

402402

Close to ASIC

*

105-A41800-00

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AGP_AGPREFCG (21)

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227Thursday, January 27, 2005

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NOTE: some of the PCIE testpoints will
be available trought via on traces.

D D

U1A

PETp0_GFXRp0(20)
PETn0_GFXRn0(20)

PETp1_GFXRp1(20)
PETn1_GFXRn1(20)

PETp2_GFXRp2(20)
PETn2_GFXRn2(20)

PETp3_GFXRp3(20)
PETn3_GFXRn3(20)

PETp4_GFXRp4(20)
PETn4_GFXRn4(20)

PETp5_GFXRp5(20)
PETn5_GFXRn5(20)

PETp6_GFXRp6(20)

C C

B B

PETn6_GFXRn6(20)

PETp7_GFXRp7(20)
PETn7_GFXRn7(20)

PETp8_GFXRp8(20)

PETp9_GFXRp9(20)
PETn9_GFXRn9(20)

PETp10_GFXRp10(20)
PETn10_GFXRn10(20)

PETp11_GFXRp11(20)
PETn11_GFXRn11(20)

PETp12_GFXRp12(20)
PETn12_GFXRn12(20)

PETp13_GFXRp13(20)
PETn13_GFXRn13(20)

PETp14_GFXRp14(20)
PETn14_GFXRn14(20)

PETp15_GFXRp15(20)
PETn15_GFXRn15(20)

PCIE_REFCLKP(20)
PCIE_REFCLKN(20)

PERST#(20)

+3.3V_BUS

R1007

4.7K

NI

AH31

AH30
AG30

AG32
AF32

AF31
AE31

AE30
AD30

AD32
AC32

AC31
AB31

AB30
AA30

AA32

AK28

AG24
AA24

AF24

AJ31

W31

W30

AL28

Y32

Y31

V30

V32

U32

U31

T31

T30

R30

R32

P32

P31

N31

PCIE_RX0P
PCIE_RX0N

PCIE_RX1P
PCIE_RX1N

PCIE_RX2P
PCIE_RX2N

PCIE_RX3P
PCIE_RX3N

PCIE_RX4P
PCIE_RX4N

PCIE_RX5P
PCIE_RX5N

PCIE_RX6P
PCIE_RX6N

PCIE_RX7P
PCIE_RX7N

PCIE_RX8P
PCIE_RX8N

PCIE_RX9P
PCIE_RX9N

PCIE_RX10P
PCIE_RX10N

PCIE_RX11P
PCIE_RX11N

PCIE_RX12P
PCIE_RX12N

PCIE_RX13P
PCIE_RX13N

PCIE_RX14P
PCIE_RX14N

PCIE_RX15P
PCIE_RX15N

PCIE_REFCLKP
PCIE_REFCLKN

PERSTB
PCIE_TEST

MCL_0

RV410

Clock

PART 1 OF 7

P
C
I

­E
X
P
R
E
S
S

I
N
T
E
R
F
A
C
E

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

Calibration

PCIE_CALRN
PCIE_CALRP

PCIE_CALI

AK27
AJ27

AJ25
AH25

AH28
AG28

AG27
AF27

AF25
AE25

AE28
AD28

AD27
AC27

AC25
AB25

AB28
AA28

AA27
Y27

Y25
W25

W28
V28

V27
U27

U25
T25

T28
R28

R27
P27

AE24
AD24

AB24

R1010 100R
R1009 150R

R1011 10K

+PCIE_VDDR

GFXTp0_PERp0 (20)
GFXTn0_PERn0 (20)

GFXTp1_PERp1 (20)
GFXTn1_PERn1 (20)

GFXTp2_PERp2 (20)
GFXTn2_PERn2 (20)

GFXTp3_PERp3 (20)
GFXTn3_PERn3 (20)

GFXTp4_PERp4 (20)
GFXTn4_PERn4 (20)

GFXTp5_PERp5 (20)
GFXTn5_PERn5 (20)

GFXTp6_PERp6 (20)
GFXTn6_PERn6 (20)

GFXTp7_PERp7 (20)
GFXTn7_PERn7 (20)

GFXTp8_PERp8 (20)
GFXTn8_PERn8 (20)PETn8_GFXRn8(20)

GFXTp9_PERp9 (20)
GFXTn9_PERn9 (20)

GFXTp10_PERp10 (20)
GFXTn10_PERn10 (20)

GFXTp11_PERp11 (20)
GFXTn11_PERn11 (20)

GFXTp12_PERp12 (20)
GFXTn12_PERn12 (20)

GFXTp13_PERp13 (20)
GFXTn13_PERn13 (20)

GFXTp14_PERp14 (20)
GFXTn14_PERn14 (20)

GFXTp15_PERp15 (20)
GFXTn15_PERn15 (20)

R1006

4.7K

A A

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AGP RV410 DV VG VIVO 256MB DDR3

Size Docum e n t N u mb er R e v

C

5

4

www.vinafix.vn

3

2

Date: Sheet

105-A41800-00

1

3

of

327Thursday, January 27, 2005

5

VID[7..0]

VID[7..0](18)

CLK_VIDCLK(18)

DVALID(13)

D D

C C

B B

C71
22pF

C79
22pF

+3.3V_BUS

B3
220R

R16251KC1522

A A

C1523
100nF

1.0uF

4170010400

CLK_RT(18)

PSYNC(13)
VHAD0(18)

VHAD1(18)

VPHCTL(18)

CLK_VIPCLK(18)

DVOMODE_0(13)
DVOMODE_1(13)

LCDCNTL_R[3..0]( 16)

VID/DVO_R[11..0](16)

DC_Strap2(13)
DC_Strap3(13,19)
DC_Strap4(13)

PAL/NTSC(13)

DEMUX_SEL(13)

GPIO[6..0](13)
GPIO[13..8](13)

HPD_ExtTMDS(16)

GPIO7(25)
GPIO15(25)
GPIO16(25)

ThermINT(14)

GPU_DPLUS(14)
GPU_DMINUS(14)

27MHZ

Y3
27_MHZ

2 1

XTAL

Oscillator Circuit

Y1

4

VCC

2

GND

27.000MHz

5

R30

1.0M

OUT

E/D

LCDCNTL_R[3..0]

VID/DVO_R[11..0]

+3.3V_BUS

+VDD_1.8V

3
1

Install close to ASIC to provide
return path for EMI

B33

NI

Bead

GND_PVSS

+MPVDD

GND_MPVSS

XTALIN

R65

NI

150R

R587499R
R586499R

+PVDD

C46

22uF_16V

4170082000

C27
22uF_16V

+3.3V_BUS

C52582pF

C45
100nF

4170010400

+3.3V_BUS +3.3V_BUS

R51

4.7K

TP12
TP13

C26
100nF

4170010400

1.0uF
C44

R64 0R

Overlap pads

C41

1.0uF

1.0uF
C43

4

VID0
VID1
VID2
VID3

MPVDD

R62
221R

LCDCNTL_R0
LCDCNTL_R1
LCDCNTL_R2
LCDCNTL_R3
VID/DVO_R0
VID/DVO_R1
VID/DVO_R2
VID/DVO_R3
VID/DVO_R4
VID/DVO_R5
VID/DVO_R6
VID/DVO_R7
VID/DVO_R8
VID/DVO_R9
VID/DVO_R10
VID/DVO_R11

TP14

R43 1K

ROMCS#

VID4
VID5
VID6
VID7

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13

HPD_ExtTMDS

GPIO15
GPIO16

XTALIN
XTALOUT

R66
150R

TESTEN

R58

R60

4.7K

4.7K

DVOMODE_0
DVOMODE_1

PVDD
PVSS

MPVSS

1.0uF
C42

R61
221R

4

U1B

AF10

VID_0

AG10

VID_1

AH9

VID_2

AJ8

VID_3

AH8

VID_4

AG9

VID_5

AH7

VID_6

AG8

VID_7

AF7

VPCLK0

AH6

DVALID

AF8

PSYNC

AE10

VHAD_0

AE9

VHAD_1

AG7

VPHCTL

AF9

VIPCLK

AE13

SDA

AF13

SCL

AK4

DVOVMODE_0

AL4

DVOVMODE_1

AF2

DVPCNTL_0

AF1

DVPCNTL_1

AF3

DVPCNTL_2

AG1

DVPCLK

AG2

DVPDATA_0

AG3

DVPDATA_1

AH2

DVPDATA_2

AH3

DVPDATA_3

AJ2

DVPDATA_4

AJ1

DVPDATA_5

AK2

DVPDATA_6

AK1

DVPDATA_7

AK3

DVPDATA_8

AL2

DVPDATA_9

AL3

DVPDATA_10

AM3

DVPDATA_11

AE6

DVPDATA_12

AF4

DVPDATA_13

AF5

DVPDATA_14

AG4

DVPDATA_15

AJ3

DVPDATA_16

AH4

DVPDATA_17

AJ4

DVPDATA_18

AG5

DVPDATA_19

AH5

DVPDATA_20

AF6

DVPDATA_21

AE7

DVPDATA_22

AG6

DVPDATA_23

AD4

GPIO_0

AD2

GPIO_1

AD1

GPIO_2

AD3

GPIO_3

AC1

GPIO_4

AC2

GPIO_5

AC3

GPIO_6

AB2

GPIO_7

AC6

GPIO_8

AC5

GPIO_9

AC4

GPIO_10

AB3

GPIO_11

AB4

GPIO_12

AB5

GPIO_13

AD5

GPIO_14

AB8

GPIO_15

AA8

GPIO_16

AB7

GPIO_17

AB6

NC_22

AC8

VREFG

AG12

DPLUS

AH12

DMINUS

AJ14

PVDD

AH14

PVSS

A6

MPVDD

A5

MPVSS

AL26

XTALIN

AM26

XTALOUT

AG14

PLLTEST

AG22

TESTEN

AC7

ROMCSb

AK17

VSS_166

AJ19

VSS_167

AF18

VSS_168

AH17

VSS_169

AG17

VSS_170

AG19

VSS_171

AH19

VSS_172

RV410

www.vinafix.vn

VIP
Capture

VIP
Host

MMI2C

General
Purpose
I/O

Thermal
Diode

PLL &
XTAL

Test

ROM

PART 2 OF 7

Zoom Video Port/ VIP Host/External TMDS

3

AL9

TXCM

V
I
D
E
O

&

M
U
L
T
I
M
E
D
I
A

Integrated
TMDS

DAC / CRT

DAC2 (TV/CRT2)

Monitor
Interfa ce

GPIO8
GPIO9
GPIO10
ROMCS#

TXCP
TX0M

TX1M

TX2M

TX3M

TX4M

TX5M

TPVDD
TPVSS

TXVDDR_1
TXVDDR_2
TXVDDR_3
TXVDDR_4

TXVSSR_1
TXVSSR_2
TXVSSR_3
TXVSSR_4
TXVSSR_5

HSYNC
VSYNC

GENERICA
GENERICB

RSET

AVDD_1
AVDD_2

AVSSQ
AVSSN_1
AVSSN_2

VDD1DI
VSS1DI

H2SYNC
V2SYNC

COMP

R2SET
A2VDD_1

A2VDD_2

A2VSSN_1
A2VSSN_2

A2VDDQ
A2VSSQ

VDD2DI
VSS2DI

HPD1

DDC1DATA

DDC1CLK

DDC2DATA

DDC2CLK

DDC3DATA

DDC3CLK

GENERICC

MCL_1

VSS_175
VSS_174
VSS_173

TX0P

TX1P

TX2P

TX3P

TX4P

TX5P

R
G
B

R2
G2
B2

Y
C

7 2
5 4
6 3
8 1

AM9
AK10

AL10
AL11

AM11
AL12

AM12
AK9

AJ9
AK11

AJ11
AK12

AJ12
AM8
AL8
AJ6

AK6
AL6
AM6

AJ7
AK7
AL7
AM7
AK8

AK24
AM24
AL24

AJ23
AJ22
AK22

AF23
AL22
AL25

AM25
AK23

AK25
AJ24

AM23
AL23
AK15

AM15
AL15

AF15
AG15

AJ15
AJ13
AH15

AK14
AM16

AL16
AM17

AL17
AL14
AK13
AJ16
AJ17

AF11

AH22
AH23

AH13
AG13

AE12
AF12

AE23
AE18

AF22
AF17
AF21

RP193B33R
RP193D33R

RP193C33R

RP193A33R

R33 1K

R52 499R

AVDD

GND_AVSSQ

R55 715R

1.0uF
C35

R34 1K

+3.3V_BUS

R91
10K

SERIAL EEPROM 512K/1M

3

GND_RSET

C7

C40

1.0uF

100nF

DNI

4170010400

GND_R2SET

+VDD2DI

B8 Bead
22uF_16V

C34
C36
100nF

4170010400

ROM_SO
SI/A16
SCK/WEb
CSb
HOLD1

USE ALTERNATIVE PART : M25P05(512Kbit) (2280002700)

2

R797 330R

R796 330R

R795 330R

R794 330R

INSTALL TERMINATION RESISTORS
CLOSE TO ASIC

1.0uF

C17

C15

82pF

4170082000

TXVDDR

C9

C8

22uF_16V

82pF

4170082000

+VDD_1.8V

Ba3

B5

+AVDD

Bead
C23
22uF_16V

GND_AVSSN

+A2VDD

+VDD_1.8V

+3.3V_BUS

C80
100nF

1.0uF

DNI

C31

GND_A2VSSN

5
6
1
7
3
8

C33
100nF

4170010400

ROM_SO (21)

SI/A16 (21)
SCK/WEb (21)
CSb (21)

U11

D
C
S
HOLD
W
VCC

M25P05-VMN6T

C32

1.0uF
C37

Q

VSS

2

+TPVDD

C13
100nF

4170010400

22uF_16V

2

4

C16
22uF_16V

GND_TPVSS

C21
100nF

4170010400

1.0uF
C29

+A2VDDQ

C38
100nF

4170010400

GND_A2VSSQ

C39

22uF_16V

R44

Rk

0R

DNI

Ba2

B4

Bead

GND_TXVSSR

+VDDDI

C30
100nF

4170010400

Ba5

1

TXCM (17 )
TXCP (17)

TX0M (1 7)
TX0P (17)

TX1M (1 7)
TX1P (17)

TX2M (1 7)
TX2P (17)

+VDD_1.8V

+3.3V_BUS

R50

4.7K

R_DAC1 (15)
G_DAC1 (15)
B_DAC1 (15)

HSYNC_DAC1 (13,15)
VSYNC_DAC1 (13,15)
STEREOSYNC (19)

+VDD_1.8V

B7

C28

Bead

22uF_16V

R_DAC2 (15)
G_DAC2 (15)
B_DAC2 (15)

HSYNC_DAC2 (15)
VSYNC_DAC2 (15)

Y_DAC2 (19)
C_DAC2 (19)
COMP_DAC2 (19)

+VDD_1.8V

B9

Bead

+3.3V_BUS

+3.3V_BUS

R54

R53

4.7K

4.7K

HPD1 (17)

CRT1DDCDATA (15)
CRT1DDCCLK (15)

CRT2DDCDATA (15)
CRT2DDCCLK (15)

SDA (14,16)
SCL (14,16)

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AGP RV410 DV VG VIVO 256MB DDR3

Size Docum e n t N u mb er R e v

C

Date: Sheet

105-A41800-00

1

3

of

427Thursday, January 27, 2005

5

D D

C C

+MVDDQ

C616
1uF

+3.3V_BUS

+VDD_1.8V

+VDD_1.8V

+3.3V_BUS

+MVDDQ

C68
47uF_6.3V

C600
1uF

C64

C70

10uf

10uf

C65
10uf

C617

C618

1uF

1uF

C67
22uF_16V

DNI

DNI

B29 220R

C602

C603

C613
1uF

C620
1uF

C609
1uF

C625
1uF

C604

1uF

1uF

C611

C610

1uF

1uF

C615

C614

1uF

1uF

C622

C621

1uF

1uF

C627

C626

1uF

1uF

1.0uF
C74

C709
100nF

C75

1.0uF

C667

C669

1uF

1uF

C601

1uF

1uF

C608
1uF

C612

C73

1uF

10uf

C619
1uF

C66

C624

1.0uF

1uF

R700R

R690R

R680R

R670R

B12

220R

B14

220R

B30 220R

C668
1uF

C605
1uF

+VDDR4

4170010400

+VDDR5

C710
100nF

4170010400

C670
1uF

C623
1uF

C707

4

U1E

C1

VDDR1_1

J1

VDDR1_2

M1

VDDR1_3

R1

VDDR1_4

V1

VDDR1_5

AA1

VDDR1_6

A3

VDDR1_7

P9

VDDR1_8

J10

VDDR1_9

N9

VDDR1_10

P10

VDDR1_11

A9

VDDR1_12

Y10

VDDR1_13

P8

VDDR1_14

R9

VDDR1_15

Y9

VDDR1_16

J11

AB10
AC19

AD18
AC20
AD19
AD20

VDDR1_17

A21

VDDR1_18

M10

VDDR1_20

N10

VDDR1_21

Y8

VDDR1_22

J18

VDDR1_23

J19

VDDR1_24

K21

VDDR1_25

A12

VDDR1_26

H13

VDDR1_27

A15

VDDR1_28

J20

VDDR1_29

J13

VDDR1_30

K11

VDDR1_31

K19

VDDR1_32

A18

VDDR1_33

L23

VDDR1_34

K20

VDDR1_35

K24

VDDR1_36

L24

VDDR1_37

H19

VDDR1_38

A24

VDDR1_39

K13

VDDR1_40

J32

VDDR1_41

A30

VDDR1_42

C32

VDDR1_43

F32

VDDR1_45

L32

VDDR1_46

AB9

VDDR3_1
VDDR3_2

AA9

VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8

AJ5

VDDR4_1

AM5

VDDR4_2

AL5

VDDR4_3

AK5

VDDR4_4

AE2

VDDR5_1

AE3

VDDR5_2

AE4

VDDR5_3

AE5

VDDR5_4

A27

VDDRH0

F1

VDDRH1

A28

VSSRH0

E1

VSSRH1

RV410

C607

C606

1uF

1uF

C69
1uF

C708

1uF

1uF

C676
1uF

Clock

Memory I/O

Memory

I/O

PART 5 OF 7

I/0

3

C981
1uF

R714.7K

+PCIE_PVDD_12

C970
1uF

C982
1uF

C632
1uF

C637
1uF

C61
10uf

+A2VDD

1uF

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8

VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23

VDD15_1
VDD15_2
VDD15_3

VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4
VDDCI_5
VDDCI_6
VDDCI_7
VDDCI_8

VDDL0

VDDL0_1
VDDL0_2
VDDL0_3

VDDL1_1
VDDL1_2
VDDL1_3
VDDL2_1
VDDL2_2
VDDL2_3

V23
N23
P23
U23

N29
N28
N27
N26
N25

AL31
AM31
AM30
AL32
AL30
AM28
AL29
AM29
AM27

AC11
AC12
P14
U15
W14
W15
R17
R15
V15
V16
T16
U16
T17
U17
V14
R18
T18
V18
P18
P19
R19
W19
AD11

AC13
AC16
AC18

W10
T14
W17
P16
AC15
T23
K14
U19

AE19
AF20

AE20
AF19

AC21
AC22
AD22
AE21
AD21
AE22

+PCIE_VDD R_12

+VDD_1.8V

PCIE_PVDD_12_1
PCIE_PVDD_12_2
PCIE_PVDD_12_3
PCIE_PVDD_12_4

PCIE_PVDD_18_1
PCIE_PVDD_18_2
PCIE_PVDD_18_3
PCIE_PVDD_18_4
PCIE_PVDD_18_5

PCIE_VDDR_12_1
PCIE_VDDR_12_2
PCIE_VDDR_12_3
PCIE_VDDR_12_4
PCIE_VDDR_12_5
PCIE_VDDR_12_6
PCIE_VDDR_12_7

PCI-Express

PCIE_VDDR_12_8
PCIE_VDDR_12_9

P
O
W
E
R

I/O Internal Core

2

B27 200R

C978

C633
1uF

C638
1uF

C62
10uf

C979

1uF

1uF

C971

C976

1uF

1uF

C972

C973

1uF

1uF

C634
1uF

C639
1uF

C59

2.2uF

C49

C50

1uF

1uF

C646

C648

1uF

1uF

C977
1uF

C974
1uF

C983
1uF

C48

C1675
10uF_6.3V

C1668
10uF_6.3V

C635
1uF

C640
1uF

C968
1uF

+VDDC_CT

C60
10uf

C1703
10uF_6.3V

C1704
10uF_6.3V

C1702
10uF_6.3V

C636
1uF

C641
1uF

C63
10uF_10V

+VDDC+3.3V_BUS

+PCIE_PVDD_18

+VDDC

C642
1uF

B23 60R

C644
1uF

+PCIE_VDDR

+PCIE_VDDR

1

B B

A A

5

GND_VSSRH0 GND_VSSRH1

U1G

Forward

Compatibility

Y23

BBN_4

K15

BBN_3

R10

BBN_2

AC17

BBN_1

AC14

BBP_4

M23

BBP_3

V10

BBP_2

K18

BBP_1

L10

VDD25B_1

K22

VDD25B_2

AA10

VDD25A

RV410

4

www.vinafix.vn

PART 7 OF 7

No Connect

AD12

NC_0

AE11

NC_1

GENERICD

NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8

NC_9
NC_10
NC_11

NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21

3

AD23

AJ21
AK21
AH21
AG21
AG20
AH20
AK20
AJ20
AG18
AH18

AK19
AL19
AL20
AM20
AL21
AM21
AK18
AJ18
AL18
AM18

TP11
35mil

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AGP RV410 DV VG VIVO 256MB DDR3

Size Docum e n t N u mb er R e v

C

2

Date: Sheet

105-A41800-00

1

3

of

527Thursday, January 27, 2005

5

GND_TPVSS

GND_MPVSS GND_A2VSSN

GND_PVSS

GND_AVSSN

NOTE: THIS IS A DRAWING. THESE
GROUNDS MUST BE MANUALLY
CONNECTED TO THE GROUND PLANE

D D

C C

B B

A A

GND_TXVSSR

5

GND_A2VSSQ

GND_AVSSQ

GND_RSET

GND_R2SET

GND_VSSRH1

GND_VSSRH0

GND_RT

GND_VIN

GND_TVVSSN

4

U1F

AH27

PCIE_VSS_1

AC23

PCIE_VSS_2

AL27

PCIE_VSS_3

R23

PCIE_VSS_4

P25

PCIE_VSS_5

R25

PCIE_VSS_6

T26

PCIE_VSS_7

U26

PCIE_VSS_8

W26

PCIE_VSS_9

Y26

PCIE_VSS_10

AB26

PCIE_VSS_11

AC26

PCIE_VSS_12

AD25

PCIE_VSS_13

AE26

PCIE_VSS_14

AF26

PCIE_VSS_15

AD26

PCIE_VSS_16

AG25

PCIE_VSS_17

AH26

PCIE_VSS_18

AC28

PCIE_VSS_19

Y28

PCIE_VSS_20

U28

PCIE_VSS_21

P28

PCIE_VSS_22

AH29

PCIE_VSS_23

AF28

PCIE_VSS_24

V29

PCIE_VSS_25

AC29

PCIE_VSS_26

W27

PCIE_VSS_27

AB27

PCIE_VSS_28

V26

PCIE_VSS_29

AJ26

PCIE_VSS_30

AJ32

PCIE_VSS_31

AK29

PCIE_VSS_32

P26

PCIE_VSS_33

P29

PCIE_VSS_34

R29

PCIE_VSS_35

T29

PCIE_VSS_36

U29

PCIE_VSS_37

W29

PCIE_VSS_38

Y29

PCIE_VSS_39

AA29

PCIE_VSS_40

AB29

PCIE_VSS_41

AD29

PCIE_VSS_42

AE29

PCIE_VSS_43

AF29

PCIE_VSS_44

AG29

PCIE_VSS_45

AJ29

PCIE_VSS_46

AK26

PCIE_VSS_47

AK30

PCIE_VSS_48

AG26

PCIE_VSS_49

N30

PCIE_VSS_50

R31

PCIE_VSS_51

AF30

PCIE_VSS_52

AC30

PCIE_VSS_53

V31

PCIE_VSS_54

P30

PCIE_VSS_55

AA31

PCIE_VSS_56

U30

PCIE_VSS_57

AD31

PCIE_VSS_58

AK32

PCIE_VSS_59

AJ28

PCIE_VSS_60

Y30

PCIE_VSS_61

AJ30

PCIE_VSS_62

AK31

PCIE_VSS_63

AA23

PCIE_VSS_64

AG31

PCIE_VSS_65

N24

PCIE_VSS_66

W23

PCIE_VSS_67

AB23

PCIE_VSS_69

P24

PCIE_VSS_70

R24

PCIE_VSS_71

T24

PCIE_VSS_72

U24

PCIE_VSS_73

V24

PCIE_VSS_74

W24

PCIE_VSS_75

Y24

PCIE_VSS_76

AC24

PCIE_VSS_77

AH24

PCIE_VSS_78

V25

PCIE_VSS_79

AA25

PCIE_VSS_80

R26

PCIE_VSS_81

AA26

PCIE_VSS_82

T27

PCIE_VSS_83

AE27

PCIE_VSS_84

B1

VSS_1

H1

VSS_2

L1

VSS_3

P1

VSS_4

U1

VSS_5

Y1

VSS_6

AD7

VSS_7

AE8

VSS_8

AL1

VSS_9

A2

VSS_10

AM2

VSS_11

AD10

VSS_12

E8

VSS_13

H5

VSS_14

K10

VSS_15

M8

VSS_16

T10

VSS_17

E12

VSS_18

AC9

VSS_19

AF14

VSS_20

AD8

VSS_21

C5

VSS_22

F10

VSS_23

J3

VSS_24

L6

VSS_25

M6

VSS_26

P6

VSS_27

AA4

VSS_28

AG11

VSS_29

V3

VSS_30

AG16

VSS_31

R3

VSS_32

C6

VSS_33

C9

VSS_34

F6

VSS_35

H7

VSS_36

J6

VSS_37

RV410

4

Part 6 of 7

PCI-Express GND

CORE GND

www.vinafix.vn

3

AD16

VSS_45

AA6

VSS_44

P7

VSS_43

P5

VSS_42

M3

VSS_41

M9

VSS_40

L7

VSS_39

M7

VSS_38

AD17

VSS_47

AH11

VSS_48

A8

VSS_49

U7

VSS_50

C10

VSS_51

E9

VSS_52

F3

VSS_53

J9

VSS_54

N7

VSS_55

N3

VSS_56

Y5

VSS_57

AM13

VSS_58

AC10

VSS_59

Y6

VSS_60

U6

VSS_61

E5

VSS_62

AL13

VSS_63

A11

VSS_64

U8

VSS_65

U9

VSS_66

U10

VSS_67

R6

VSS_68

AD6

VSS_69

V6

VSS_70

AD14

VSS_71

AD13

VSS_72

D11

VSS_73

J12

VSS_74

K12

VSS_75

A13

VSS_77

F13

VSS_78

E13

VSS_79

F15

VSS_80

K16

VSS_81

J21

VSS_82

H16

VSS_83

T15

VSS_84

V17

VSS_85

C15

VSS_86

C4

VSS_87

U14

VSS_88

P15

VSS_89

A16

VSS_90

E16

VSS_91

G13

VSS_92

G16

VSS_93

P17

VSS_94

R16

VSS_95

R14

VSS_97

W16

VSS_98

C18

VSS_99

F16

VSS_100

W18

VSS_101

U18

VSS_102

AE16

VSS_103

AE17

VSS_104

A19

VSS_105

H32

VSS_106

F19

VSS_107

G19

VSS_108

N8

VSS_109

Y7

VSS_110

T19

VSS_112

V19

VSS_113

G21

VSS_114

C21

VSS_115

F21

VSS_116

AE14

VSS_117

AK16

VSS_118

U5

VSS_119

F22

VSS_120

F18

VSS_121

K30

VSS_122

C24

VSS_124

F24

VSS_125

M24

VSS_126

A25

VSS_127

D30

VSS_128

E25

VSS_129

G25

VSS_130

G20

VSS_131

G22

VSS_132

F27

VSS_133

E28

VSS_134

H21

VSS_135

C27

VSS_136

E32

VSS_137

H28

VSS_138

J30

VSS_139

K17

VSS_140

K27

VSS_141

M32

VSS_142

A22

VSS_143

C20

VSS_144

E19

VSS_145

H20

VSS_146

J24

VSS_147

M28

VSS_148

J28

VSS_149

J16

VSS_150

F30

VSS_151

K23

VSS_152

L29

VSS_153

A31

VSS_154

B32

VSS_155

E30

VSS_156

AE15

VSS_157

AG23

VSS_158

AD9

VSS_159

AF16

VSS_160

AH10

VSS_161

AJ10

VSS_163

AD15

VSS_164

AH16

VSS_165

3

2

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AGP RV410 DV VG VIVO 256MB DDR3

Size Docum e n t N u mb er R e v

C

2

Date: Sheet

1

105-A41800-00

1

3

of

627Thursday, January 27, 2005

8

7

6

CORE REGULATOR VDDC

5

4

3

2

TP1

I_VDDC_LOOP

TP2

1

Current loop to measure
VDDC output current.

D D

+5V_BUS

+12V_BUS

R1589

R1591

0R

2R2

D28

BAT54SLT1

BST3

R1595
0R

BOOT_VDDC3

DNI

C1151

0.22uF

SS_VDDC3

Fb_VDDC3
COMP_VDDC3

C1157

C1692
1uF

22nf

UVIN3
SWN3

VCC3

Alternative 2

C C

Alternative 1

R1598 51K

+PW_VDDC3

R1602 3K

SS_VDDC3
COMP_VDDC3

B B

U43

7

BST

SS

GH

4

Vfb

5

GND

COMP

6

GL

UVIN

8

Vcc

SWN

SP6132

SIPEX SP6132

R1686 10K
MU43

1

RT

2

OCSET

3

SS

4

COMP

5

FB

6

EN

7

GND

ISL6522CB

ISL6522CB : SOIC
ISL6522CV : TSSOP

10
9
3
2
1

VCC

PVCC

LGATE

PGND

BOOT
UGATE
PHASE

UGATE3

LGATE3

BST3

VCC3

14
13
12
11
10
9
8

C1688 100nF

10nF

C1689

+12V_BUS

BOOT_VDDC3Fb_VDDC3

R1619
10R

C1690
1uF

SWN3

+3.3V_BUS

R873
10K

DNI

R1594
10K

DNI

R1618

2.2R

Q28

Thermal

Pad

FDS7096N3

Q29

Thermal

Pad

4 5
3
2
1

FDS7096N3

9

6
7
8

9

6
7
8

C1159
1nF

4 5
3
2
1

Lower MOSFET should be surrounded by
a lot of copper for heat dissipation

+PW_VDDC3

Q30

Thermal

Pad

4 5
3
2
1

FDS7096N3

Q31

Thermal

Pad

4 5
3
2
1

FDS7096N3

C1149

C1532

1.0uF

9

6
7
8

9

6
7
8

C1146

10uF

10uF

DNI DNI

L63

HC1213

Fb_VDDC3

C1148

C1147

10uF

10uF

This trace must be
manully shorted in layout.
It is present to
prevent feedback to
be taken at the wrong
place.

C1158
1nf

DNI

Cc1

R1617

1.5K

DNI

Rc4

POWER SEQUENCING CIRCUIT:

+3.3V_BUS

FOR ALTERNATE #1

Remove R374, R375, R371, C168 and U32
Install R370 , R112, R954, R305-R308, C160

C159 and MU32

Rv1

R1592
10K

1%

Rv2

R1597

16.5K 1%

R1581

5.1K

R1582

2.4K

Dual footprint Dual footprintDNI

C1705
180uF_16V

VR1

1K

DNI

1

Q7

CMPT3904

2

1 3

+12V_BUS

R1583
20K

CMPT3904

2 3

180uF_16V

DNI

1

Q8

MC1705

2 3

SS_VDDC3

C1709

MC1709

180uF_16V

470uF_10V

DNI

C1152
330uF_2.5V

+VDDC

1.28V

1.344V

DESIGN NOTES:

Add this Capacitor for SP6132

Compensation Circuit

Cc2

FOR ALTERNATE #2

Change C157 for 10 uF and C121 for 1 uF
Replace C764 by 0 Ohm resistor
Replace R314 with a bead
Remove R954, R370, R305-R308, C159,
R112, C160 and MU32
Install R374, R375, R371, C168 and U32

D40

21

S3AB

B1 60R

R1593

UVIN3

220K

R1632
100K

+VDDC

1.3V

C1153
330uF_2.5V

C1154
330uF_2.5V

C1155
470uF_10V

DNI

Dual footprint

Rv1
( R1592 )

3240100200, 10K, 1%, 603 3240147200, 14.7K, 1 %, 603

C1164
100pF

Cc4

COMP_VDDC3

C1163

33pF
C1161
10nF

R1580

15K

Rc5

3240165200, 16.5K, 1%, 6033240100200, 10K, 1%, 603

COMP_VDDC3

Cc3

Fb_VDDC3

Rv2
( R1597 )

+12V_BUS

+12VEXT

MC1155
470uF

Compensation circuit

A A

Rc1 = 10K, Rc2 = 8.06K
R313 = 93.1K, C171 = 3.9 nF, C170 = 10 pF

<Variant Name>

8

7

6

5

www.vinafix.vn

4

3

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AGP RV410 DV VG VIVO 256MB DDR3

Size Docum e n t N u mb er R e v

C

Date: Sheet

2

105-A41800-00

of

727Thursday, January 27, 2005

1

3

8

+5V_BUS

+12V_BUS

R373

R372

2R2

0R

DNI

BAT54SLT1

D D

C136

0.22uF

DNI

C141
22nf

C142
1uF

Alternative 1

+PW_VDDC1
SS_VDDC1
COMP_VDDC1
Fb_VDDC1

C C

MVDDQ Switching Regulator for
Memory Core for 256M
configuration
8A Max

D4

BST1

R376
0R

BOOT_VDDC1

SS_VDDC1

Fb_VDDC1
COMP_VDDC1

UVIN1
SWN1 VCC1

VCC1

Alternative 2

R258 51K
R259 3K

U31

7

SS

4

Vfb

5

COMP

6

UVIN

8

SWN

SP6132

SIPEX SP6132

MU31

1

RT

2

OCSET

3

SS

4

COMP

5

FB

6

EN

7

GND

ISL6522CB

ISL6522CB : SOIC

BST

GH

GND

GL

Vcc

R257 10K

LGATE

UGATE
PHASE

PVCC

PGND
BOOT

7

SWN1

C122 1.0uF

R251

+3.3V_BUS

14
13
12
11
10
9
8

10R

10nF

C765

+12V_BUS

BOOT_VDDC1

C113
1uF

R953
10K

DNI

R952
10K

DNI

BST1

10

UGATE1

9
3

LGATE1

2
1

VCC

6

+5VEXT

Dual footprint

C1708
180uF_16V

3000mA

Q24

4 5
3
2
1

Q22

4 5
3
2
1

IRF7413A

Fb_VDDC1

R255

2.2R

Lower MOSFET should be surrounded by
a lot of copper for heat dissipation

IRF7413A

C116
1nF

6
7
8

6
7
8

MC1708
470uF_10V

1230mA
DNI

+PW_VDDC1

L65

1.5uH

C110
1nf

DNI

R254

1.5K

DNI

C1683
100nF

B21 6 0R

Cc1

Rc4

C137
10uF

Rq1

R253
2K

1%

Rq2

R256

1.24K

1%

5

R377 220K

C138
10uF

VR2

C106

1K

13

22uF

DNI

2

TP3

I_MVDDC_LOOP

TP4

Current loop to measure
MVDDQ output current.

C105
22uF

R378
100K

C104
22uF

DNI

UVIN1

4

C1711
470uF_10V

Dual footprint

MC1711
470uF

DNI

+MVDDQ

( 2.1V )

C1707
470uF_10V

Dual footprint

3

POWER SEQUENCING CIRCUIT:

+MVDDC

MC1707
470uF

FOR ALTERNATE #1

DNI

Install R372, D4, R376, C113, R257,
R258, R259, MU31, R255 and C116

Remove R373, R377, R378, C122,
C140 and U31

2.09V

+12V_BUS

R250
2K

1

R249

Q9

2.4K

CMPT3904

Rq1

3240200100, 2K, 1% 3240124100, 1.24K, 1%

R248
20K

CMPT3904

2 3

2

1

DESIGN NOTES:

Add this Cap ac ito r for ALTERNATE #2

COMP_VDDC1

SS_VDDC1

1

2 3

Q10

C140
100pF

Compensation Circuit

COMP_VDDC1

C111

Rc5

C112
100nF

33pF

R264
15K

Cc2

Cc3

Fb_VDDC1

FOR ALTERNATE #2

Change C142 for 10uF
Install R377, R378, R373, C122, C140
and U31
Remove R255, C116, R372, R376, D4,
MU31, R257, R258, R259 and C113

Compensation circuit

Rc1 = 10K, Rc2 = 8.06K
R264 = 41.2K, C111 = 27 pF

Rq2+MVDDQ

+5V_BUS

+5V_BUS

+12V_BUS

R370

R371

0R

2R2

DNI

D5

BAT54SLT1

B B

DNI

C158

0.22uF

C169
22nf

C157
1uF

Alternative 1

+PW_VDDC2
SS_VDDC2
COMP_VDDC2

A A

8

MVDDC Switching Regulator for
Memory Core for 256M
configuration

BST2

R112
0R

BOOT_VDDC2

Fb_VDDC2
COMP_VDDC2

UVIN2
SWN2

VCC2

Alternative 2

R305 51K
R306 3K

7

4
5

6
8

U32

SP6132

10

BST

SS

9

GH

Vfb

3

GND

COMP

2

GL

UVIN

1

Vcc

SWN

SIPEX SP6132

R307 10K

MU32

1
2
3
4
5
6
7

VCC

RT
OCSET

PVCC

SS

LGATE

COMP

PGND

FB

BOOT

EN

UGATE

GND

PHASE

ISL6522CB

ISL6522CB : SOIC

ISL6522CV : TSSOP

UGATE2

LGATE2

7

BST2

VCC2

14
13
12
11
10
9
8

BOOT_VDDC2Fb_VDDC2

B46
60R

5

C163
10uF

Rc1

R310
2K

1%

Rc2

R311

1.24K

1%

Dual footprint

C1710
180uF_16V

DNI

VR3

13

1K

2

+PW_VDDC2

71

C121 100nF

10nF

C764

+12V_BUS

SWN2

R314
10R

+3.3V_BUS

R955

DNI

10K

R954

DNI

10K

C159
1uF

+MVDDQ +MVDDC +MVDDQ +M VDDC +MVDDQ +MVDDC

RP207A 0R
RP207B 0R
RP207C 0R
RP207D 0R

8

MQ23A

2

BSO4804

L66

3.3uH

53

6

MQ23B

4

BSO4804

Fb_VDDC2

C160

R308

1nF

2.2R

81
72
63
54

DNI DNI DNI

6

C172

C1684

10uF

100nF

C161
1nf

Cc1

DNI

R309

Rc4

1.5K

DNI

RP208A 0R

81

RP208B 0R

72

RP208C 0R

63

RP208D 0R

54

www.vinafix.vn

R374

C164
22uF

220K

81
72
63
54

MC1710
470UF

RP210A 0R
RP210B 0R
RP210C 0R
RP210D 0R

C165
22uF

UVIN2

R375
100K

C166
22uF

4

2.09V

+MVDDC

( 2.1V )

C1706
470uF_10V

Dual footprint

FOR ALTERNATE #1

Remove R374, R375, R371, C168 and U32
Install R370 , R112, R954, R305-R308, C160

C159 and MU32

Rc1

3240200100, 2K, 1% 3240124100, 1.24K, 1%

MC1706
470uF

DNI

3

Rc2+MVDDC

<Variant Name>

TP5

I_MVDDQ_LOOP

TP6

Current loop to measure
MVDDC output current.

DESIGN NOTES:

Add this Capacitor for SP6132

Compensation Circuit

Cc2

Rc5

C171
10nF

COMP_VDDC2

C168
100pF

Cc4

COMP_VDDC2SS_VDDC2

C170

Cc3

33pF

Fb_VDDC2

R313
15K

FOR ALTERNATE #2

Change C157 for 10 uF and C121 for 1 uF
Replace C764 by 0 Ohm resistor
Replace R314 with a bead
Remove R954, R370, R305-R308, C159,
R112, C160 and MU32
Install R374, R375, R371, C168 and U32

Compensation circuit

Rc1 = 10K, Rc2 = 8.06K
R313 = 93.1K, C171 = 3.9 nF, C170 = 10 pF

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AGP RV410 DV VG VIVO 256MB DDR3

Size Docum e n t N u mb er R e v

C

Date: Sheet

2

105-A41800-00

1

827Thursday, January 27, 2005

3

of