How it Works
MSI
Loading...
MS-9554
Schematic 0A
13 pgs336.49 Kb0

MSI MS-9554 Schematic 0A

961 2 3 4 5 7 8 10
PART NO.
REL
DEVELOPMENT NO. Q/M
A
B
73P9250
A
B
Osprey Pass1 Final
Sheet Contents:
Contents:
C
C
1. TITLE
2. CHANGE LOG
D
D
3. CROW BLOCK DIAGRAM
4. PCI EDGE CONNECTOR
5. PCI & BUFFERS
E
E
6. CORE & I/O POWER, MEMORY INTERFACE, 2MX32 DDR, GPIO/LCD
7. ANALOG VIDEO CONNECTOR
8. CONNECTORS
F
F
9. RS232 DRIVER
10. STRAPS
11. 3.3V CONTINUOUS POWER FOR HARRIER
G
G
12. 2.5V, 1.8V POWER
13. SPARE PARTS
H
H
Raptor's Senses
I
PART NO.
I
TITLE
MUST CONFORM TO ENG SPEC: 80X2324 TOLERANCE UNLESS NOTED LINEAR ANGLES RADII UNLESS NOTED EDGE/
CORNER
6 9
OUTSIDE MAX INSIDE MAX
0.13
2.0
TITLE
1/1SCALE:
DESIGNER CHECKED APPROVED
OSPREY
3-27-2003_11:35
James DaltonMike Ragan
Jon Rankin (ATI)
SHEET OF
1
Physical Design
Jeff Davis
JJ
13
108754321
961 2 3 4 5 7 8 10
PART NO.
REL
DEVELOPMENT NO. Q/M
A
73P9250
A
Change Log:
B
B
C
D
C
D
E
F
E
F
G
H
G
H
I
PART NO.
I
CHANGE LOG
MUST CONFORM TO ENG SPEC: 80X2324 TOLERANCE UNLESS NOTED LINEAR ANGLES RADII UNLESS NOTED EDGE/
CORNER
6 9
OUTSIDE MAX INSIDE MAX
0.13
2.0
TITLE
1/1SCALE:
3-27-2003_11:35
DESIGNER CHECKED APPROVED
OSPREY
James Dalton
SHEET OF
Mike Ragan Jeff Davis
Jon Rankin (ATI)
2
108754321
Physical Design
JJ
13
961 2 3 4 5 7 8 10
PART NO.
REL
DEVELOPMENT NO. Q/M
A
73P9250
A
SMP
RS485RS232
RS485 RS232
B
USB
USB
MISC RS485 I2C
USB
CONDOR
B
Digital Video
Ext Power
C
C
Ethernet
Analog Video
D
Video
I2C
RS485
MISC
D
Video
E
Harrier
F
MUX
Com Port Block Diagram
PCI
Osprey
E
F
RS232 Driver
External
RS485 Driver
Debug Header
Bus A
External
G
G
Com1
405GP
PCI Conn.
Com2
RS485 Driver
Internal
Bus B
H
H
RS232 Driver
Debug Header
Com3
EZUSB
I
RS232 Driver
I
External
Com4
DUART
PART NO.
Osprey Block Diagram
Com5
MUST CONFORM TO ENG SPEC: 80X2324 TOLERANCE UNLESS NOTED LINEAR ANGLES RADII UNLESS NOTED EDGE/
CORNER
6 9
OUTSIDE MAX INSIDE MAX
0.13
2.0
TITLE
1/1SCALE:
3-27-2003_11:35
DESIGNER CHECKED APPROVED
OSPREY
James Dalton
SHEET OF
Mike Ragan
Jon Rankin (ATI)
3
108754321
Physical Design
Jeff Davis
13
JJ
961 2 3 4 5 7 8 10
PART NO.
REL
A
PRIMARY PCI
J31
B
5 5 5 5 5 5 5 5 5 5 5
C
5 5 5 5 5
Maximum PCI Power
Aux3 ±5% 375mA max. =1.237 W
3.3 V ±0.3 V 7.6 A max. 5 V ±5% 5 A max.
D
12 V ±5% 500 mA
-12 V ±10% 100 mA
5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5
E
PCI_3.3V
5 5 5 5
PPCI_AD0 PPCI_AD1 PPCI_AD2 PPCI_AD3 PPCI_AD4 PPCI_AD5 PPCI_AD6 PPCI_AD7 PPCI_AD8 PPCI_AD9 PPCI_AD10 PPCI_AD11 PPCI_AD12 PPCI_AD13 PPCI_AD14 PPCI_AD15 PPCI_AD16 PPCI_AD17 PPCI_AD18 PPCI_AD19 PPCI_AD20 PPCI_AD21 PPCI_AD22 PPCI_AD23 PPCI_AD24 PPCI_AD25 PPCI_AD26 PPCI_AD27 PPCI_AD28 PPCI_AD29 PPCI_AD30 PPCI_AD31
PPCI_C/BE0_N PPCI_C/BE1_N PPCI_C/BE2_N PPCI_C/BE3_N
A58 B58 A57 B56 A55 B55 A54 B53 B52 A49 B48 A47 B47 A46 B45 A44 A32 B32 A31 B30 A29 B29 A28 B27 A25 B24 A23 B23 A22 B21 A20 B20
A52 B44 B33 B26
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE0# C/BE1# C/BE2# C/BE3#
RSV1 RSV2 RSV3 RSV4
3.3Vaux PME#
PRSNT1# PRSNT2#
LOCK#
PERR# SERR#
REQ64#
ACK64#
SBO#
SDONE
TRST#
TCK TMS TDO
TDI
A9 B10 A11 B14 A14 A19
B9 B11
B39
B40 B42
A60 B60
A41 A40
A1 B2 A3 B4 A4
PRSNT1# PRSNT2# Expansion Configuration
R72
NOPOP
NOPOP
5/23/02 JWD - Added 0 OHM NOPOP per ATI request
0
R73
0
R527
PPCI_SERR#
0
485_PCI_N 485_PCI_P
Open Open No expansion board present Ground Open Expansion board present, 25 W maximum Open Ground Expansion board present, 15 W maximum Ground Ground Expansion board present, 7.5 W maximum
5
HOST_PWRGD/RST_PCI#
HOST_PWR_REQ_PCI#
HOST_SMI_PCI#
4/7/02 JWD- Added PRSNT, PME test point, Changed M66EN pull-down to 0-Ohm
3.3VC
U89
VCC
5
S1ININ = 1
1
6
HOST_PWRGD/RST_UMB#
8
HOST_PWR_REQ_UMB#
8
HOST_SMI_UMB#
8
S2
3
IN = 0
2
GND
VENDOR=ST_MICRO VEN_P/D_NUM=STG3157CTR
U90
S1ININ = 1
1
S2
3
IN = 0
2
GND
VENDOR=ST_MICRO VEN_P/D_NUM=STG3157CTR
U91
S1ININ = 1
1
S2
3
IN = 0
2
GND
4
VCC
5
6
4
VCC
5
6
4
D
3.3VC
D
3.3VC
D
DEVELOPMENT NO. Q/M
HOST_PWRGD/RST#
HOST_PWR_REQ#
73P9250
8
8
HOST_SMI#
8
A
B
C
D
E
CLK
-12V
A6 B7 A7 B8
B16 A15
B49 B1
A2
B3 B15 B17 A18 B22 A24 B28 A30 B34 A35 A37 B38 A42 B46 A48 A56 B57
PPCI_INTA#
PPCI_CLK PPCI_RST_N
M66EN
5
5 5
10
High End Servers that use SP signaling through modified PCI slot have this signal pulled up.
EXA_SLOT_PRSNT
R557
10K
8
8
485_PCI_N
485_INT_N
485_PCI_P
485_INT_P
VENDOR=ST_MICRO VEN_P/D_NUM=STG3157CTR
U87
VCC
5
S1ININ = 1
1
6
S2
3
IN = 0PCI_3.3V
2
GND
VENDOR=ST_MICRO VEN_P/D_NUM=STG3157CTR
U86
S1ININ = 1
1
S2
3
IN = 0
2
GND
VENDOR=ST_MICRO VEN_P/D_NUM=STG3157CTR
4
VCC
5
6
4
D
D
3.3VC
3.3VC
485_N_BUS_B
485_P_BUS_B
F
8
G
8
H
I
5
C185
C194
C174 C173
C169
C183
5 5
0.1U
0.1U 0.1U
0.1U 0.1U
0.1U
5 5
F
5
5
C188
C184
C180 C179
C178 C177
5 5
0.1U
G
H
I
PCI_5V
C42 C526
0.1U
PCI_5V
C172
C525 C524
0.1U 0.1U
C171C170
0.1U0.1U
0.1U 0.1U
C196
0.1U
C195
0.1U
C191
0.1U
0.1U 0.1U
C523
0.1U
C192 C189
C522
0.1U
C190
0.1U
0.1U
0.1U
0.1U0.1U
C39
PCI_3.3V
0.1U
0.1U
PPCI_PAR
PPCI_FRAME_N PPCI_TRDY_N PPCI_IRDY_N PPCI_STOP_N PPCI_DEVSEL_N
PPCI_IDSEL
PPCI_REQ0_N PPCI_GNT0_N
PCI_5V
A43
A34 A36 B35 A38 B37
A26
B18 A17
A21 B25 A27 B31 A33 B36 A39 B41 B43 A45 A53 B54
A10 A16 B19 A59 B59
A5 B5 B6
A8 A61 B61 A62 B62
PAR
FRAME# TRDY# IRDY# STOP# DEVSEL#
IDSEL
REQ# GNT#
3.3V0
3.3V1
3.3V2
3.3V3
3.3V4
3.3V5
3.3V6
3.3V7
3.3V8
3.3V9
3.3V10
3.3V11
VIO_0 VIO_1 VIO_2 VIO_3 VIO_4
5V0 5V1 5V2 5V3 5V4 5V5 5V6 5V7
INTA#
INTB# INTC# INTD#
RESET#
M66EN
+12V
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10 GND11 GND12 GND13 GND14 GND15 GND16
CONN2x60
PCI UNIVERSAL
SILKSCREEN: ADD SILKSCREEN PIN NUMBER EVERY 5 PINS ON BOTH "A" AND "B" SIDES.
6 9
PCI EDGE CONNECTOR
MUST CONFORM TO ENG SPEC: 80X2324 TOLERANCE UNLESS NOTED LINEAR ANGLES RADII UNLESS NOTED EDGE/
CORNER
OUTSIDE MAX INSIDE MAX
0.13
2.0
PART NO.
TITLE
1/1SCALE:
OSPREY
3-27-2003_11:35
DESIGNER CHECKED APPROVED
SHEET OF
James Dalton
Jon Rankin (ATI)
4
Mike Ragan
108754321
Physical Design
Jeff Davis
13
JJ
Loading...
+ 9 hidden pages
Buy Points How it Works FAQ Contact Us Questions and Suggestions Privacy Policy Cookie Policy Terms of Use