MSI MS-9543 Schematic 00

APPROVED

1

2

3

4

A00-00

REV.

1 OF 74/23/02

D

REVISIONS

DESCRIPTIONECO DATE

REV

A00 126277 Release for A-rev 4/20/02 Hayes, Stuart

Block Diagram

ASIC Peripherals

PCI/Memory Ctrl/GPIO

ESM4 connector interface

Page 1

Page 2

Page 3

Page 4

ICMB/Debug Port

Flash Bank 0-1 8MBYTE/SDRAM 16MB

FPGA for IDE/KB/MS virtualization

Reset/Clock/Debug

Page 5

Page 6

Page 7

Page 8

FLASH/SDRAM

2nd PCI

INST

POWER

CORPORATION

COMPUTER

PWR

SEL

CLK

I2C

DATE

DATE

DATE

DATE

DATE

DATE

DATE

AUSTIN,TEXAS

DATE

SHEET

DCBA

6H525

SCHEM,DTRBD,ESM4,PE1650/PE2600

ECO

A CURRENT ISSUE OF THIS DRAWING MUST

INCLUDE A COPY OF THE FOLLOWING

PCI

LAN

UART

GPIO

ECO’S:

ECO

ECO

ECO

ECO

ECO

ECO

ECO

Truc Nguyen

Truc Nguyen

DRAWN

DESIGNED

TITLE

CHECKED

APPROVED

Stuart Hayes 4/20/02

APPROVED

APPROVED

DWG NO.

APPROVED

DATE

RELEASED

SDRAM

SDRAM

Dell Controlled Print

SP2 (AGILENT)

GPIOs

Serial

I2C buses

legacy PCI bus

Ethernet

MII interface

Flash

PROM

MUX

configuration serial bus

Qswitches

IDE

FPGA

Kb/Mouse in

Kb/Mouse out

XGPIOs

PROPRIETARY NOTE

ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER

AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS

CORP., EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN

ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE

REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL

COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION

OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE

INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS

NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH

THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF

THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS

DELL COMPUTER CORPORATION.

IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.

IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA

THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT

EXPORT RESTRICTION:

TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE

A B C

ESM4 connector

1

2

3

4

+3.3V_FP

D

21

R163

+3.3V_FP

8.2K-5%

1

3,7

2,4

SP_RESET

3.3VAUX_PWRGD

2,4

SUB_55159

2

1

14

3.3VAUX_PWRGD

74HC08

3

8.2K-5%

U34

21

R167

5

4

14

6

U34

4,5,7

SOFT_RESET

74HC08

SP_CLK

+3.3V_FP

6,7

21

NP*

2

3

4

4

A00-00

L7

21

BLM11A601S

L6

1 2

BLM11A601S

+3.3V_FP

10uF10V-10%

1

RS232#_485_RTS

21

NP*

R165

0-5%

NP*

8.2K-5%

21

R164

+3.3V_FP

2

C84

21

200-5%

AUSTIN,TEXAS

CORPORATION

COMPUTER

R162

REV.

SHEET

6H525

2 OF 74/23/02

DBA

SCHEM,DTRBD,ESM4,PE1650/PE2600

21

R37

4

SDA34SCL34SDA24SCL2

4

SP_INT

1K-5%

.01uF 16V

21

C74

50V-5%

12pF

C147

10K-5%

1 2

R147

.01uF 16V

1 2

C75

+3.3V_FP

4,7

4,7

R174
R172
R173
R171

R175
R170

+3.3V_FP

R169
R168

10K-5%

1

2

10K-5%

1

2

10K-5%

1 2

10K-5%

1 2

SDA1

SCL14SDA04SCL0

10K-5%

1 2

10K-5%

1 2

10K-5%

1 2

10K-5%

1 2

UART_RS232/RS485

2

DWG NO.

TITLE

DATE

PROPRIETARY NOTE

1 - SP_CLK is used as clock inputs

CLK_CTRL0 : 0 - PHY inputs XTLP/XLN are used as clock inputs

+3.3V_FP

21

10K-1%

R131

21

R97

1K-5%

AC4

AF9

AC11

SP_RST

SOFT_RST

NC_CLK_CTRL1

NC_CLK_CTRL2

AD5

AF1

B12

CLK_CTRL0

CLK_CTRL1

CLK_CTRL2

NC_XTLP

C16

XTLP

SP_CLK

NC_XTLN

B16

XTLN

NC_ASB_CLK

NC_UART_CLK

AC12

AC9

ASB_CLK

UART_CLK

DVDD

DVDDGND

4

4

RIBB

LED_LINK

LED_ACTIVITY

AVDD

C17

AE5

AD4

AC7

A13

B13

DGND

AGND

AVDD

LED_LINK

LED_ACTIVITY

RESET

CLOCK

U23

POWER

RIBB

C15

TXOP

4

RXIN4RXIP

TXON4TXOP

D16

A18

C14

TXON

RXIP

LAN INTERFACE

POWER SELECTION

4

RXIN

3

VAAREF

D15

A16

VAAREF

3

VAAT

C13

VAAT

GNDREF

3

VAAR

B18

D17

VAAR

GNDR

B15

GNDT1

UART_RS232/RS485

A15

A12

GNDT2

4

4

2

RS232_CTS

B7

RS232_RD4RS232_TD4RS232_OE

A6D7C7

4

4

SER_SINA

SER_SOUTA

C10A7A9

B10D8D10A8A10C9C11D9D11

UART_RD0

UART_TD0

SER_RTSA

UART_RS232/RS485

UART_RS232/RS485_RD

UART_RS232/RS485_TD

UART_RS232/RS485_CTS

UART_RS232_RTS/RS485_OE

UART INTERFACE

4

4

4

SER_CTSA

SER_DCDA

SER_DSRA

UART_CTS0

UART_DSR0

UART_RTS0

4

4

SER_DTRA

SER_RIA

SER_SOUTB

XREF1=4

C8

B11

UART_RI0

UART_DCD0

UART_DTR0

4

4

4

SER_SINB

SER_RTSB

B8

UART_RD1

UART_TD1

UART_RTS1

4

4

SER_CTSB

SER_DCDB

SER_DSRB

UART_CTS1

UART_DSR1

4

4

4

SER_DTRB

SER_RIB

B9

UART_RI1

UART_DCD1

UART_DTR1

AD3

AD2

AE1

I2C_SCL0

I2C_SDA0

I2C INTERFACE

AD1

AC3

I2C_SCL1

I2C_SCL2

I2C_SDA1

SECONDARY PCI ADDRESS/DATA AND COMMAND BUS

AC2

AB4

I2C_SCL3

I2C_SDA2

AB3

I2C_SDA3

AD10

AE10

AE2

SP_IRQ

JTAG_TDI

JTAG_TDO

INT CONTROLLER

7

7

7

TCK7TDI7TDO7TMS

TRST

JTAG/ICE

Internal 50K pu: TMS, TCK, TRST, TDI

AD9

AF10

AC5

AE9

JTAG/ICE

JTAG_TCK

JTAG_TMS

JTAG_TRST

JTAG PORT

HETERO 1 OF 2

N2530A SOCKET

PCI CNTRL
SECONDARY

ERROR DET

SYSTEM

ARBITRATION

SECONDARY

THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS

CORP., EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN

AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS

ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER

DELL COMPUTER CORPORATION.

THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF

NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH

INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS

OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE

COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION

REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL

ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE

C

A B C

+3.3V_FP

21

10uF10V-10%

2

1

PWR_AUX_SEL

PWR_BAT_SEL

PRIM_PCI_POWER0

PRIM_PCI_POWER1

PRIM_PCI_POWER2

VCC

U1

V23

PRIM_PCI_POWER3

PRIM_PCI_POWER4

PRIM_PCI_POWER5

PRIM_PCI_POWER6

PRIM_PCI_POWER7

PRIM_PCI_POWER8

Y4K4J4D4Y3M3D3R2K2

PRIM_PCI_POWER9

PWR_BAT_SENSE

PWR_EXT_SENSE

PWR_PCI_SENSE

AE6

AC6

AF7

AD6

AC1 AF3

PWR_STDBY_SENSE

PWR_AUX_SENSE

PWR_EXT_SEL

PWR_PCI_SEL

AF8

AE7

AF6

AE8

PWR_STDBY_SEL

AD8

AC8

AA23

SEC_AD0

Y26

0.1uF 16V

C15

C82

21

R87

1K-5%

XREF1=8

2

R135

10K-1%

R161

21

PWR_EXT_SEL

PWR_PCI_SEL

200-5%

2

2

PWR_BAT_SEL

PWR_AUX_SEL

PWR_STDBY_SEL

2

2

2

NC_SEC_AD0

NC_SEC_AD1

+3.3V_FP

0.1uF 16V

21

C27

+3.3V_FP

0.1uF 16V

1 2

C28

0.1uF 16V

21

C29

0.1uF 16V

1 2

C30

VIO

1K pulldown is used for internal diodes. It must be present.

1

SEC_AD1

SEC_AD2

Y24

Y25

NC_SEC_AD2

NC_SEC_AD3

2

R117

PWR_PCI_SEL

2

2

SEC_AD3

SEC_AD4

Y23

W26

NC_SEC_AD4

NC_SEC_AD5

R118

10K-1%

PWR_EXT_SEL

SEC_AD5

SEC_AD6

W24

W25

NC_SEC_AD6

NC_SEC_AD7

2

10K-1%

R132

PWR_BAT_SEL

2

SEC_AD7

SEC_AD8

SEC_AD9

V25

V26

V24

NC_SEC_AD10

NC_SEC_AD8

NC_SEC_AD9

2

R133

2

10K-1%

PWR_STDBY_SEL

2

2

SEC_AD10

SEC_AD11

SEC_AD12

U25

U26

NC_SEC_AD11

NC_SEC_AD12

2

10K-1%

R134

PWR_AUX_SEL

2

SEC_AD13

SEC_AD14

T26

U23

U24

NC_SEC_AD13

NC_SEC_AD14

NC_SEC_AD15

10K-1%

SEC_AD15

SEC_AD16

SEC_AD17

N26

P23

NC_SEC_AD16

NC_SEC_AD17

SEC_AD18

SEC_AD19

N24

N25

NC_SEC_AD18

NC_SEC_AD19

SEC_AD20

SEC_AD21

M25

M26

N23

NC_SEC_AD20

NC_SEC_AD21

NC_SEC_AD22

SEC_AD22

SEC_AD23

SEC_AD24

L26

M24

NC_SEC_AD23

NC_SEC_AD24

SEC_AD25

SEC_AD26

L24

L25

NC_SEC_AD25

NC_SEC_AD26

SEC_AD27

SEC_AD28

K25

K26

L23

NC_SEC_AD27

NC_SEC_AD28

NC_SEC_AD29

SEC_AD29

SEC_AD30

SEC_AD31

K23

K24

NC_SEC_AD30

NC_SEC_AD31

3

SEC_CBE0

SEC_CBE1

SEC_CBE2

P24

T25

W23

NC_SEC_CBE0

NC_SEC_CBE1

NC_SEC_CBE2

+3.3V_FP

SEC_CBE3

SEC_DEVSEL

SEC_IRDY

SEC_STOP

R25

P26

R24

M23

NC_SEC_CBE3

SEC_DEVSEL7SEC_FRAME

SEC_IRDY

SEC_STOP7SEC_TRDY

7

7

7

21

21

21

10uF10V-10%

1

SEC_FRAME

SEC_TRDY

R23

P25

C19

C18

C20

2

C83

SEC_PAR

T24

NC_SEC_PAR

0.1uF 16V

0.1uF 16V

0.1uF 16V

SEC_REQ1

SEC_REQ2

J25

J26

SEC_REQ1

SEC_REQ2

7

7

SEC_GNT1

SEC_GNT2

SEC_GNT3

SEC_REQ3

J23

H23

H26

J24

SEC_GNT1

SEC_GNT2

SEC_GNT37SEC_INTA_D

SEC_REQ3

7

7

7

SEC_PERR

SEC_RST

SEC_CLK

H24

G24

R26

SEC_CLK

SEC_PERR

SEC_RST7SEC_SERR

7

7

+3.3V_FP

SEC_INTA_D

SEC_SERR

T23

G25

7

7

SUB*_0N748

0.1uF 16V

21

C25

0.1uF 16V

21

C26

0.1uF 16V

21

C24

4

1

2

3

USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL

4

A00-00

REV.

3 OF 74/23/02

AUSTIN,TEXAS

COMPUTER

2

D

VAAREF

0.1uF 16V

2 1

C94

2

VAAT

10uF 10V-10%

21

C95

2

VAAR

0.1uF 16V

12

C93

.01uF 16V .01uF 16V .01uF 16V

L10

12

BLM11A601S

21

C14

12

L8

BLM11A601S

21

1 2

1 2

BLM31A260S

C13

C12

L13

CORPORATION

TITLE

SHEET

6H525

SCHEM,DTRBD,ESM4,PE1650/PE2600

DATE

DWG NO.

>20mil trace

0.1uF 16V

21

C38

10uF 10V-10%

1 2

+3.3V_FP

C85

4

CBA

50V-5%

12pF

PRIM_CLK

21

C146

U23

4

PRIM_AD04PRIM_AD1

Y1

Y2

PRIM_AD0

PRIM_AD1

RAM_A0

RAM_A1

AF17

AD16

4

4

4

PRIM_AD2

PRIM_AD3

PRIM_AD44PRIM_AD54PRIM_AD64PRIM_AD74PRIM_AD84PRIM_AD9

W2

PRIM_AD2

PRIM_AD3

PRIM_AD4

PRIM_AD5

RAM_A2

RAM_A3

RAM_A4

RAM_A5

AF18

AC17

AD17

AE17

4

PRIM_AD104PRIM_AD114PRIM_AD124PRIM_AD134PRIM_AD144PRIM_AD154PRIM_AD164PRIM_AD174PRIM_AD184PRIM_AD19

U4V1V3V4W1

U3

PRIM_AD6

PRIM_AD7

PRIM_AD8

PRIM_AD9

PRIM_AD10

PRIM_AD11

ADDRESS BUS

RAM_A10

RAM_A11

RAM_A6

RAM_A7

RAM_A8

RAM_A9

AF19

AC18

AD18

AE18

AE19

AD19

AC19

PRIM_AD12

PRIM_AD13

PRIM_AD14

RAM_A12

RAM_A13

RAM_AD0

AF20

AD20

4

PRIM_AD204PRIM_AD214PRIM_AD224PRIM_AD234PRIM_AD244PRIM_AD254PRIM_AD264PRIM_AD274PRIM_AD284PRIM_AD29

L3W4L4M1M2M4T1T2T3T4U2

PRIM_AD15

PRIM_AD16

PRIM_AD17

PRIM_AD18

PRIM_AD19

PRIM_AD20

RAM_AD1

RAM_AD2

RAM_AD3

RAM_AD4

RAM_AD5

RAM_AD6

AC21

AD21

AE21

AF21

AC20

AE20

PRIM_AD21

PRIM_AD22

PRIM_AD23

RAM_AD7

RAM_AD8

RAM_AD9

AD22

AE22

AF22

PRIM_AD24

PRIM_AD25

PRIM_AD26

RAM_AD10

RAM_AD11

RAM_AD12

AE23

AF23

AC22

PRIM_AD304PRIM_AD31

G3W3H1H2H3H4J1J2K3L1L2

PRIM_AD27

PRIM_AD28

PRIM_AD29

RAM_AD13

RAM_AD14

RAM_AD15

AD24

AF24

AD23

4

4

PRIM_CBE04PRIM_CBE14PRIM_CBE24PRIM_CBE3

G2

PRIM_CBE0

PRIM_AD30

PRIM_AD31

RAM_DATA0

RAM_DATA1

AF26

AE25

AF25

PRIM_CBE1

PRIM_CBE2

PRIM_CBE3

RAM_DATA2

RAM_DATA3

RAM_DATA4

AC26

AD26

AE26

4

4

PRIM_PAR

NC_PRIM_CBE4

NC_PRIM_CBE5

NC_PRIM_CBE6

NC_PRIM_CBE74PRIM_DEVSEL

PRIM_FRAME

N2P1AA3

AA4

AB1

AB2J3N1R4V2

R3

PRIM_PAR

PRIM_CBE4

PRIM_CBE5

PRIM_CBE6

PRIM_CBE7

PRIM_FRAME

PRIMARY

PCI CNTRL ERROR DET

RAM_DATA10

RAM_DATA5

RAM_DATA6

RAM_DATA7

RAM_DATA8

RAM_DATA9

AB26

AC23

AC24

AC25

AB24

AB25

4

4

PRIM_IRDY4PRIM_LOCK

PRIM_STOP

PRIM_TRDY

N4

P2

P3

N3

PRIM_IRDY

PRIM_TRDY

PRIM_LOCK

RAM_DATA11

RAM_DATA12

RAM_DATA13

RAM_DATA14

AA25

AA26

AB23

4

4

4

4

PRIM_IDSEL

PRIM_GNT4PRIM_INTA4PRIM_INTB4PRIM_INTC4PRIM_INTD

PRIM_REQ

PRIM_RST4PRIM_SERR

F1

G1

F4

K1

F3

PRIM_CLK

PRIM_GNT

PRIM_REQ

PRIM_STOP

PRIM_IDSEL

PRIM_DEVSEL

PRIMARY

ARBITRATION

SYSTEM

RAM_DATA15

FLASH_RDY

ROM_DISABLE

SRAM0_8/16

SRAM_OE

D12

A11

AF16

AF11

AA24

4

4

PRIM_PERR

R1

P4

PRIM_RST

PRIM_PERR

PRIM_SERR

PRIMARY

INT REQ

SRAM_CS0

SRAM_WE

AE16

AF15

E1

PRIM_INTB

PRIM_INTC

PRIM_INTA

PCIPRIMARY PCI ADDRESS/DATA AND COMMAND BUS

SRAM_CS1

SRAM_CS2

SRAM_CS3

AC14

AD14

AE15

NC_INST_BUS0_ARB2

NC_INST_BUS0_ARB1

E4E3E2

C1

PRIM_INTD

INTS_BUS0_ARB1

FLASH CONTROL

SRAM_BE0

SRAM_BE1

AC16

AD15

NC_INST_BUS0_ARB3

NC_INST_BUS0_ARB4

NC_INST_BUS0_ENABLE

NC_INST_BUS1_ARB1

NC_INST_BUS1_ARB0

B24

C24

D2D1C2

B1

INTS_BUS0_ARB2

INTS_BUS0_ARB3

INTS_BUS0_ARB4

INTS_BUS1_ARB0

INTS_BUS1_ARB1

INST_BUS0_ENABLE

DRAM_CAS

DRAM_CS0

DRAM_CS1

DRAM_RAS

DRAM_WE

AE12

AE13

AF14

AD13

AF13

NC_INST_BUS1_ARB2

NC_INST_BUS1_ARB3

NC_INST_BUS1_ARB4

NC_INST_BUS1_ARB5

NC_INST_BUS1_CBE0

NC_INST_BUS1_CBE1

NC_INST_BUS1_CBE2

NC_INST_BUS1_CBE3

NC_INST_BUS1_STOP

A26

A25

B25

A24

INTS_BUS1_ARB2

INTS_BUS1_ARB3

INTS_BUS1_ARB4

DRAM_CKE0

DRAM_CLK

AC15

AC13

A22

A23

B23

C23

D23

INST_BUS1_CBE0

INST_BUS1_CBE1

INST_BUS1_CBE2

INST_BUS1_CBE3

INST_BUS1_STOP

INTS_BUS1_ARB5

INSTRUMENTATION CONNECTOR

SDRAM CONTROL DATA BUS ADDRESS/DATA BUSGPIO

DRAM_CKE1

DRAM_DQM0

DRAM_DQM1

DRAM_DQM2

DRAM_DQM3

GPIO0

B6

AD12

AD11

AE11

AF12

AE14

NC_INST_BUS1_IRDY

NC_INST_BUS1_TRDY

NC_INST_BUS1_CLK

NC_INST_BUS1_DEVSEL

NC_INST_BUS1_FRAME

C22

A21

B21

B22

D22

INST_BUS1_CLK

INST_BUS1_IRDY

INST_BUS1_TRDY

INST_BUS1_FRAME

INST_BUS1_DEVSEL

GPIO1

GPIO2

GPIO3

GPIO4

D6

C6

NC_INST_BUS2_ARB4

NC_INST_BUS2_ARB3

NC_INST_BUS2_ARB2

NC_INST_BUS2_ARB1

NC_INST_BUS2_ARB0

G23

F26

F25

F24

F23

INTS_BUS2_ARB0

INTS_BUS2_ARB1

INTS_BUS2_ARB2

INTS_BUS2_ARB3

INTS_BUS2_ARB4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

C4B4A4D5C5B5A5

A3

NC_INST_BUS2_CBE2

NC_INST_BUS2_CBE1

NC_INST_BUS2_ARB5

NC_INST_BUS2_CBE3

NC_INST_BUS2_CBE0

G26

E26

E25

E24

D26

INST_BUS2_CBE0

INST_BUS2_CBE1

INST_BUS2_CBE2

INST_BUS2_CBE3

INTS_BUS2_ARB5

GPIO10

GPIO11

GPIO12

GPIO13

GPIO14

A1B2A2C3B3

NC_INST_BUS2_STOP

NC_INST_BUS2_IRDY

NC_INST_BUS2_TRDY

NC_INST_BUS2_CLK

NC_INST_BUS2_DEVSEL

C26

D25

C25

D24

E23

INST_BUS2_CLK

INST_BUS2_IRDY

INST_BUS2_STOP

INST_BUS2_TRDY

INST_BUS2_DEVSEL

GPIO15

PRIM_64PCI_PRSNT

PRIM_ACK64

PRIM_PME

PRIM_REQ64

G4

AA1

AA2

AD7

NC_INST_BUS2_FRAME

NC_INST_ENABLE

D13

B26

INST_ENABLE

INST_BUS2_FRAME

64K EXT

HETERO 2 OF 2

N2530A SOCKET

PRIMARY

PRIM_PRSNT

SUB*_0N748

D18

RAM_A0

RAM_A1

RAM_A[0:13]

5,6

RAM_A2

RAM_A3

RAM_A4

RAM_A5

RAM_A6

RAM_A7

RAM_A8

1

RAM_A9

RAM_A10

RAM_A11

RAM_A12

RAM_A13

RAM_AD[0:15]

RAM_AD0

5

RAM_AD1

RAM_AD2

RAM_AD3

RAM_AD4

RAM_AD5

RAM_AD6

RAM_AD7

RAM_AD8

RAM_AD9

RAM_AD10

RAM_AD11

RAM_AD13

RAM_AD12

RAM_AD15

RAM_AD14

RAM_DATA1

RAM_DATA2

RAM_DATA0

RAM_DATA[0:15]

5,6

RAM_DATA3

RAM_DATA4

RAM_DATA5

RAM_DATA6

RAM_DATA7

RAM_DATA8

RAM_DATA9

SRAM_8/16

SUB=NPR38

5

1K-5%

1 2

Populate for 8-bit FLASH

2

RAM_DATA10

RAM_DATA11

RAM_DATA12

RAM_DATA13

RAM_DATA14

RAM_DATA15

ROM_DISABLE

21

SUB=NP

R39

1K-5%

R78

Populate to DISABLE INERNAL ROM

SRAM_OE

5,6

21

0-5%

FLASH_RDY

5

SRAM_WE

5,6

SRAM_CS0

SRAM_CS16SRAM_CS2

5

NC_SRAM_BE0

NC_SRAM_CS3

DRAM_CAS5DRAM_CS0

DRAM_RAS5DRAM_WE

NC_SRAM_BE1

5

NC_DRAM_CS1

5

3

DRAM_CKE0

DRAM_CLK5DRAM_DQM05DRAM_DQM15DRAM_DQM25DRAM_DQM3

NC_DRAM_CKE1

5

5

ESM4_GPIO04ESM4_GPIO14ESM4_GPIO24ESM4_GPIO34ESM4_GPIO44ESM4_GPIO54ESM4_GPIO64ESM4_GPIO7

ESM4_GPIO86INIT#/FPGA_GPIO2

4

DATA/FPGA_GPIO46CONFIG#/VIRT7RED_LED

PROGRAM#/FPGA_GPIO1

DONE/FPGA_GPIO5

CCLK/FPGA_GPIO3

21

6

6

6

R148

0-5%

CCLK

6

PRIM_PME

2

3

PCI_PME

4

NC_PRIM_ACK64

NC_PRIM_REQ64

S

D

4

NC_PRIM_64PCI_PRSNT

NC_PRIM_PRSNT

REPLACE THIS PART WITH NON-SOCKETED PART ON SECOND REV

G

1

2N7002

Q14

SUB=NP

A B C D

Please have five pins tied to high (3.3V) on next spin (X04)

SP_RESET

2,7