MSI MS-9189 Schematic 0B

A B C

D

REVISIONS

1

2

3

SUB=NP Always no-pop
SUB=NP0 Populate only for debug

BOM options

0 = Production
1 = Development

2 = Adds 2U Parts
3 = Adds 1U Parts

5 = Adds parts for Microvue and interposer on breakaway

BOM Instructions

In order to build a proper BOM, you must run a combo build
To build 2U for production, use builds 0 and 2
To build 1U for production, use builds 0 and 3

To build 2U for development, use builds 1 and 2
To build 1U for development, use builds 1 and 3

REV

DESCRIPTIONECO DATE

TABLE OF CONTENTS

BLOCK DIAGRAMSPage 1-11.
Page 12-15.
Page 16-19.
Page 20-21.
Page 22-29.
Page 30-31.
Page 32-35.
Page 36-39.
Page 40-43.
Page 44.
Page 45.
Page 46-47.

Page 49-57.
Page 59.

Page 60.
Page 61.
Page 62.
Page 63.
Page 64-65.
Page 66.
Page 67.
Page 68.
Page 69.
Page 70.
Page 71-73.
Page 74-79.
Page 81-82.
Page 83-84.
Page 85.
Page 86-88
Page 89. BMC - temp sensors/debug port
Page 90.
Page 91.
Page 92.
Page 93.
Page 80, 94.
Page 95.
Page 96.
Page 97-103.
Page 104-107.
Page 108-119.
Page 120.
Page 121.
Page 122.
Page 123.
Page 124.
Page 125. Impedance Coupons (48SE, 50SE, 75D, 85D)

Page 126-127.
Page 128-129.
Page 130-135.
Page 136. +1.8V Current sense

Processor 1

Processor 2

Blank

HT2100

CPU decoupling

Processor 1 DIMMs (4)

Processor 2 DIMMs (4)

Blank

Blank

Clock Generator: CK410B

Clock buffer: DB1200

Clock buffer: DB800Page 48.

HT1000

USB Connectors and ButtonsPage 58.

Floppy Connector

Blank (LAI Connectors if there is room)

SATA Connectors

Voltage Doubler and Intusion Detect

ESB2 I2C MUX and Header

Blank

Super I/O

PCI Reset, Jumpers

Firmware Hub

Coin Cell Battery

Sideplane (PERC5/I, Control Panel, IDE)

Risers (3)

Blank, PME to Wake on Page 77

Broadcom LOM 1

Broadcom LOM 2

LOM power switch

BMC

COM port

BMC I2C MUX and Header

San Marco Connectors (Mgmt, MII)

Rear ID, Cyclops

Fan Connectors and Tach

BMC - CPLD, master and slave

OmniIVu- CPLD and header

Video RN50

Video Output

VRDs

Power Connectors

Power LED

Power sequencing and VRD enable chaining

Ground Clips

Impedance Coupons (90D, 95D, 100D)

System powergood and Reset buffering
Blank
Blank, strappings, SATA, OV/UV

APPROVED

1

2

3

4

ToDo:Update TOC & rearrange/delete pages

EXPORT RESTRICTION:

THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT
IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA
TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE
IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY
OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN
WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC.
UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE
OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED
FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE
LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

PWA: FP973
ASSY: FP976
PWB: FP974
SCH: FP975

DRAWN

DESIGNED

CHECKED

APPROVED

APPROVED

APPROVED

APPROVED

RELEASED

03/14/2006
03/14/2006
03/14/2006
03/14/2006

A CURRENT ISSUE OF THIS DRAWING MUST
INCLUDE A COPY OF THE FOLLOWING
ECO'S:
ECO

ECO
ECO
ECO
ECO
ECO
ECO
ECO

DATE
DATE
DATE
DATE
DATE
DATE
DATE
DATE

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM,PLN,SV,PE_BULN

DWG NO.

FP975

DATE

SHEET

10/20/2006 1 OF 144

4

REV.

X01

A B C

D

1

1

2

2

3

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

REV.

FP975

SHEET

10/20/2006 2 OF 144

DCBA

4

X01

A B C

D

1

1

2

2

3

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

REV.

FP975

SHEET

10/20/2006 3 OF 144

DCBA

4

X01

A B C

D

1

1

2

2

3

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

DCBA

4

REV.

X01

4 OF 14410/20/2006

A B C

D

1

1

2

2

3

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

DCBA

4

REV.

X01

5 OF 14410/20/2006

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1

1

2

2

3

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

DCBA

4

REV.

X01

6 OF 14410/20/2006

A B C

D

1

1

2

2

3

3

4

Powerup Timing- VRDs

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

DCBA

4

REV.

X01

7 OF 14410/20/2006

A B C

D

1

1

2

2

3

3

4

Power up Timing - Chipset

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

DCBA

4

REV.

X01

8 OF 14410/20/2006

A B C

D

1

1

2

2

3

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

REV.

FP975

SHEET

10/20/2006 9 OF 144

DCBA

4

X01

A B C

D

1

1

2

2

3

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

DCBA

4

REV.

X01

10 OF 14410/20/2006

A B C

D

1

1

2

2

3

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

DCBA

4

REV.

X01

11 OF 14410/20/2006

A B C

D

1

HT_CK_C2L0_C1L0_1_DP

16

HT_CK_C2L0_C1L0_1_DN

16

HT_CK_C2L0_C1L0_0_DP

16

HT_CK_C2L0_C1L0_0_DN

16

HT_CT_C2L0_C1L0_1_DP

16

HT_CT_C2L0_C1L0_1_DN

16

HT_CT_C2L0_C1L0_0_DP

16

HT_CT_C2L0_C1L0_0_DN

16

J_CPU1

M6 AC5

L0_CLKIN_H_1 L0_CLKOUT_H_1

N6

L0_CLKIN_L_1

M3 AC1

L0_CLKIN_H_0 L0_CLKOUT_H_0

M2

L0_CLKIN_L_0

U4

L0_CTLIN_H_1

U5

L0_CTLIN_L_1

T1

L0_CTLIN_H_0

U1

L0_CTLIN_L_0

L0_CLKOUT_L_1

L0_CLKOUT_L_0

L0_CTLOUT_H_1
L0_CTLOUT_L_1
L0_CTLOUT_H_0
L0_CTLOUT_L_0

AC4

AB1

W6
V6
V2
V3

HT_CK_C1L0_C2L0_1_DP
HT_CK_C1L0_C2L0_1_DN
HT_CK_C1L0_C2L0_0_DP
HT_CK_C1L0_C2L0_0_DN

HT_CT_C1L0_C2L0_1_DP
HT_CT_C1L0_C2L0_1_DN
HT_CT_C1L0_C2L0_0_DP
HT_CT_C1L0_C2L0_0_DN

16
16
16
16

16
16
16
16

HT_CK_C2L1_C1L2_1_DP

16

HT_CK_C2L1_C1L2_1_DN

16

HT_CK_C2L1_C1L2_0_DP

16

HT_CK_C2L1_C1L2_0_DN

16

HT_CT_C2L1_C1L2_1_DP

16

HT_CT_C2L1_C1L2_1_DN

16

HT_CT_C2L1_C1L2_0_DP

16

HT_CT_C2L1_C1L2_0_DN

16

AK7
AK8
AM7
AN7

AM12
AL12
AP11
AP12

L2_CLKIN_H_1
L2_CLKIN_L_1
L2_CLKIN_H_0
L2_CLKIN_L_0

L2_CTLIN_H_1
L2_CTLIN_L_1
L2_CTLIN_H_0
L2_CTLIN_L_0

J_CPU1

L2_CLKOUT_H_1
L2_CLKOUT_L_1
L2_CLKOUT_H_0
L2_CLKOUT_L_0

L2_CTLOUT_H_1
L2_CTLOUT_L_1
L2_CTLOUT_H_0
L2_CTLOUT_L_0

AM18
AN18
AR18
AR17

AL14
AL13
AP13
AN13

HT_CK_C1L2_C2L1_1_DP
HT_CK_C1L2_C2L1_1_DN
HT_CK_C1L2_C2L1_0_DP
HT_CK_C1L2_C2L1_0_DN

HT_CT_C1L2_C2L1_1_DP
HT_CT_C1L2_C2L1_1_DN
HT_CT_C1L2_C2L1_0_DP
HT_CT_C1L2_C2L1_0_DN

1

16
16
16
16

16
16
16
16

2

3

HT_AD_C2L0_C1L0_15_DP

16

HT_AD_C2L0_C1L0_15_DN

16

HT_AD_C2L0_C1L0_14_DP

16

HT_AD_C2L0_C1L0_14_DN

16

HT_AD_C2L0_C1L0_13_DP

16

HT_AD_C2L0_C1L0_13_DN

16

HT_AD_C2L0_C1L0_12_DP

16

HT_AD_C2L0_C1L0_12_DN

16

HT_AD_C2L0_C1L0_11_DP

16

HT_AD_C2L0_C1L0_11_DN

16

HT_AD_C2L0_C1L0_10_DP

16

HT_AD_C2L0_C1L0_10_DN

16

HT_AD_C2L0_C1L0_9_DP

16

HT_AD_C2L0_C1L0_9_DN

16

HT_AD_C2L0_C1L0_8_DP

16

HT_AD_C2L0_C1L0_8_DN

16

HT_AD_C2L0_C1L0_7_DP

16

HT_AD_C2L0_C1L0_7_DN

16

HT_AD_C2L0_C1L0_6_DP

16

HT_AD_C2L0_C1L0_6_DN

16

HT_AD_C2L0_C1L0_5_DP

16

HT_AD_C2L0_C1L0_5_DN

16

HT_AD_C2L0_C1L0_4_DP

16

HT_AD_C2L0_C1L0_4_DN

16

HT_AD_C2L0_C1L0_3_DP

16

HT_AD_C2L0_C1L0_3_DN

16

HT_AD_C2L0_C1L0_2_DP

16

HT_AD_C2L0_C1L0_2_DN

16

HT_AD_C2L0_C1L0_1_DP

16

HT_AD_C2L0_C1L0_1_DN

16

HT_AD_C2L0_C1L0_0_DP

16

HT_AD_C2L0_C1L0_0_DN

16

T6

L0_CADIN_H_15

U6

L0_CADIN_L_15

R4

L0_CADIN_H_14

R5

L0_CADIN_L_14

P6

L0_CADIN_H_13

R6

L0_CADIN_L_13

N4

L0_CADIN_H_12

N5

L0_CADIN_L_12

L4

L0_CADIN_H_11

L5

L0_CADIN_L_11

K6

L0_CADIN_H_10

L6

L0_CADIN_L_10

J4

L0_CADIN_H_9

J5

L0_CADIN_L_9

H6

L0_CADIN_H_8

J6

L0_CADIN_L_8

T3

L0_CADIN_H_7

P1

L0_CADIN_L_7

T2

L0_CADIN_H_6

R1

L0_CADIN_L_6

P3

L0_CADIN_H_5

P2

L0_CADIN_L_5

M1

L0_CADIN_H_4

N1

L0_CADIN_L_4

K1

L0_CADIN_H_3

L1

L0_CADIN_L_3

K3

L0_CADIN_H_2

K2

L0_CADIN_L_2

H1

L0_CADIN_H_1

J1

L0_CADIN_L_1

H3

L0_CADIN_H_0

H2

L0_CADIN_L_0

L0_CADOUT_H_15
L0_CADOUT_L_15
L0_CADOUT_H_14
L0_CADOUT_L_14
L0_CADOUT_H_13
L0_CADOUT_L_13
L0_CADOUT_H_12
L0_CADOUT_L_12
L0_CADOUT_H_11
L0_CADOUT_L_11
L0_CADOUT_H_10
L0_CADOUT_L_10

L0_CADOUT_H_9
L0_CADOUT_L_9
L0_CADOUT_H_8
L0_CADOUT_L_8

L0_CADOUT_H_7
L0_CADOUT_L_7
L0_CADOUT_H_6
L0_CADOUT_L_6
L0_CADOUT_H_5
L0_CADOUT_L_5
L0_CADOUT_H_4
L0_CADOUT_L_4
L0_CADOUT_H_3
L0_CADOUT_L_3
L0_CADOUT_H_2
L0_CADOUT_L_2
L0_CADOUT_H_1
L0_CADOUT_L_1
L0_CADOUT_H_0
L0_CADOUT_L_0

W5
W4
AA6
Y6
AA5
AA4
AC6
AB6
AE6
AD6
AE5
AE4
AG6
AF6
AG5
AG4

W1
V1
Y2
Y3
AA1
Y1
AB2
AB3
AD2
AD3
AE1
AD1
AF2
AF3
AG1
AF1

HT_AD_C1L0_C2L0_15_DP
HT_AD_C1L0_C2L0_15_DN
HT_AD_C1L0_C2L0_14_DP
HT_AD_C1L0_C2L0_14_DN
HT_AD_C1L0_C2L0_13_DP
HT_AD_C1L0_C2L0_13_DN
HT_AD_C1L0_C2L0_12_DP
HT_AD_C1L0_C2L0_12_DN
HT_AD_C1L0_C2L0_11_DP
HT_AD_C1L0_C2L0_11_DN
HT_AD_C1L0_C2L0_10_DP
HT_AD_C1L0_C2L0_10_DN

HT_AD_C1L0_C2L0_9_DP
HT_AD_C1L0_C2L0_9_DN
HT_AD_C1L0_C2L0_8_DP
HT_AD_C1L0_C2L0_8_DN

HT_AD_C1L0_C2L0_7_DP
HT_AD_C1L0_C2L0_7_DN
HT_AD_C1L0_C2L0_6_DP
HT_AD_C1L0_C2L0_6_DN
HT_AD_C1L0_C2L0_5_DP
HT_AD_C1L0_C2L0_5_DN
HT_AD_C1L0_C2L0_4_DP
HT_AD_C1L0_C2L0_4_DN
HT_AD_C1L0_C2L0_3_DP
HT_AD_C1L0_C2L0_3_DN
HT_AD_C1L0_C2L0_2_DP
HT_AD_C1L0_C2L0_2_DN
HT_AD_C1L0_C2L0_1_DP
HT_AD_C1L0_C2L0_1_DN
HT_AD_C1L0_C2L0_0_DP
HT_AD_C1L0_C2L0_0_DN

16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16

16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16

HT_AD_C2L1_C1L2_15_DP

16

HT_AD_C2L1_C1L2_15_DN

16

HT_AD_C2L1_C1L2_14_DP

16

HT_AD_C2L1_C1L2_14_DN

16

HT_AD_C2L1_C1L2_13_DP

16

HT_AD_C2L1_C1L2_13_DN

16

HT_AD_C2L1_C1L2_12_DP

16

HT_AD_C2L1_C1L2_12_DN

16

HT_AD_C2L1_C1L2_11_DP

16

HT_AD_C2L1_C1L2_11_DN

16

HT_AD_C2L1_C1L2_10_DP

16

HT_AD_C2L1_C1L2_10_DN

16

HT_AD_C2L1_C1L2_9_DP

16

HT_AD_C2L1_C1L2_9_DN

16

HT_AD_C2L1_C1L2_8_DP

16

HT_AD_C2L1_C1L2_8_DN

16

HT_AD_C2L1_C1L2_7_DP

16

HT_AD_C2L1_C1L2_7_DN

16

HT_AD_C2L1_C1L2_6_DP

16

HT_AD_C2L1_C1L2_6_DN

16

HT_AD_C2L1_C1L2_5_DP

16

HT_AD_C2L1_C1L2_5_DN

16

HT_AD_C2L1_C1L2_4_DP

16

HT_AD_C2L1_C1L2_4_DN

16

HT_AD_C2L1_C1L2_3_DP

16

HT_AD_C2L1_C1L2_3_DN

16

HT_AD_C2L1_C1L2_2_DP

16

HT_AD_C2L1_C1L2_2_DN

16

HT_AD_C2L1_C1L2_1_DP

16

HT_AD_C2L1_C1L2_1_DN

16

HT_AD_C2L1_C1L2_0_DP

16

HT_AD_C2L1_C1L2_0_DN

16

AK11
AK12
AM10
AL10

AK9

AK10

AM8
AL8
AM6
AL6
AK5
AK6
AM4
AL4
AK3
AK4

AM11
AN11

AP9

AP10

AM9
AN9
AP7
AP8
AP5
AP6
AM5
AN5
AP3
AP4
AM3
AN3

L2_CADIN_H_15
L2_CADIN_L_15
L2_CADIN_H_14
L2_CADIN_L_14
L2_CADIN_H_13
L2_CADIN_L_13
L2_CADIN_H_12
L2_CADIN_L_12
L2_CADIN_H_11
L2_CADIN_L_11
L2_CADIN_H_10
L2_CADIN_L_10
L2_CADIN_H_9
L2_CADIN_L_9
L2_CADIN_H_8
L2_CADIN_L_8

L2_CADIN_H_7
L2_CADIN_L_7
L2_CADIN_H_6
L2_CADIN_L_6
L2_CADIN_H_5
L2_CADIN_L_5
L2_CADIN_H_4
L2_CADIN_L_4
L2_CADIN_H_3
L2_CADIN_L_3
L2_CADIN_H_2
L2_CADIN_L_2
L2_CADIN_H_1
L2_CADIN_L_1
L2_CADIN_H_0
L2_CADIN_L_0

L2_CADOUT_H_15
L2_CADOUT_L_15
L2_CADOUT_H_14
L2_CADOUT_L_14
L2_CADOUT_H_13
L2_CADOUT_L_13
L2_CADOUT_H_12
L2_CADOUT_L_12
L2_CADOUT_H_11
L2_CADOUT_L_11
L2_CADOUT_H_10
L2_CADOUT_L_10

L2_CADOUT_H_9
L2_CADOUT_L_9
L2_CADOUT_H_8
L2_CADOUT_L_8

L2_CADOUT_H_7
L2_CADOUT_L_7
L2_CADOUT_H_6
L2_CADOUT_L_6
L2_CADOUT_H_5
L2_CADOUT_L_5
L2_CADOUT_H_4
L2_CADOUT_L_4
L2_CADOUT_H_3
L2_CADOUT_L_3
L2_CADOUT_H_2
L2_CADOUT_L_2
L2_CADOUT_H_1
L2_CADOUT_L_1
L2_CADOUT_H_0
L2_CADOUT_L_0

AM14
AN14
AL16
AL15
AM16
AN16
AL18
AL17
AL20
AL19
AM20
AN20
AL22
AL21
AM22
AN22

AR14
AR13
AP15
AN15
AR16
AR15
AP17
AN17
AP19
AN19
AR20
AR19
AP21
AN21
AR22
AR21

HT_AD_C1L2_C2L1_15_DP
HT_AD_C1L2_C2L1_15_DN
HT_AD_C1L2_C2L1_14_DP
HT_AD_C1L2_C2L1_14_DN
HT_AD_C1L2_C2L1_13_DP
HT_AD_C1L2_C2L1_13_DN
HT_AD_C1L2_C2L1_12_DP
HT_AD_C1L2_C2L1_12_DN
HT_AD_C1L2_C2L1_11_DP
HT_AD_C1L2_C2L1_11_DN
HT_AD_C1L2_C2L1_10_DP
HT_AD_C1L2_C2L1_10_DN

HT_AD_C1L2_C2L1_9_DP
HT_AD_C1L2_C2L1_9_DN
HT_AD_C1L2_C2L1_8_DP
HT_AD_C1L2_C2L1_8_DN

HT_AD_C1L2_C2L1_7_DP
HT_AD_C1L2_C2L1_7_DN
HT_AD_C1L2_C2L1_6_DP
HT_AD_C1L2_C2L1_6_DN
HT_AD_C1L2_C2L1_5_DP
HT_AD_C1L2_C2L1_5_DN
HT_AD_C1L2_C2L1_4_DP
HT_AD_C1L2_C2L1_4_DN
HT_AD_C1L2_C2L1_3_DP
HT_AD_C1L2_C2L1_3_DN
HT_AD_C1L2_C2L1_2_DP
HT_AD_C1L2_C2L1_2_DN
HT_AD_C1L2_C2L1_1_DP
HT_AD_C1L2_C2L1_1_DN
HT_AD_C1L2_C2L1_0_DP
HT_AD_C1L2_C2L1_0_DN

16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16

16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16

2

3

From CPU2 L0

AMC CPU F1207

HETERO 1 OF 11

To CPU2 L0

From CPU2 L1 To CPU2 L1

CPU1 TO CPU2 HYPER TRANSPORT LINKS

AMC CPU F1207

HETERO 3 OF 11

4

ROOM=CPU1

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

MODULE:
DESC:
REV: OF

SEC

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

REV.

FP975

X01

SHEET

10/20/2006 12 OF 144

DBA

211

4

1

2

3

4

32
32

32,34
32,34

32,34

33
33

33,34
33,34

33,34

32,34
32,34

32,34

33,34
33,34

33,34

X00_DT10369 SCH name fix

34
32-34
32-34
32-34
32-34
32,33

32-34
32-34
32-34

33,34
32,34

32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33

CPU1_MEM_MA_DQS_17_DP
CPU1_MEM_MA_DQS_17_DN
CPU1_MEM_MA_DQS_16_DP
CPU1_MEM_MA_DQS_16_DN
CPU1_MEM_MA_DQS_15_DP
CPU1_MEM_MA_DQS_15_DN
CPU1_MEM_MA_DQS_14_DP
CPU1_MEM_MA_DQS_14_DN
CPU1_MEM_MA_DQS_13_DP
CPU1_MEM_MA_DQS_13_DN
CPU1_MEM_MA_DQS_12_DP
CPU1_MEM_MA_DQS_12_DN
CPU1_MEM_MA_DQS_11_DP
CPU1_MEM_MA_DQS_11_DN
CPU1_MEM_MA_DQS_10_DP
CPU1_MEM_MA_DQS_10_DN
CPU1_MEM_MA_DQS_9_DP
CPU1_MEM_MA_DQS_9_DN
CPU1_MEM_MA_DQS_8_DP
CPU1_MEM_MA_DQS_8_DN
CPU1_MEM_MA_DQS_7_DP
CPU1_MEM_MA_DQS_7_DN
CPU1_MEM_MA_DQS_6_DP
CPU1_MEM_MA_DQS_6_DN
CPU1_MEM_MA_DQS_5_DP
CPU1_MEM_MA_DQS_5_DN
CPU1_MEM_MA_DQS_4_DP
CPU1_MEM_MA_DQS_4_DN
CPU1_MEM_MA_DQS_3_DP
CPU1_MEM_MA_DQS_3_DN
CPU1_MEM_MA_DQS_2_DP
CPU1_MEM_MA_DQS_2_DN
CPU1_MEM_MA_DQS_1_DP
CPU1_MEM_MA_DQS_1_DN
CPU1_MEM_MA_DQS_0_DP
CPU1_MEM_MA_DQS_0_DN

A B C

CK_CPU1_MEM_MA0_DP
CK_CPU1_MEM_MA0_DN

CPU1_MEM_MA0_CS_L1
CPU1_MEM_MA0_CS_L0

CPU1_MEM_MA0_ODT0

CK_CPU1_MEM_MA1_DP
CK_CPU1_MEM_MA1_DN

CPU1_MEM_MA1_CS_L1
CPU1_MEM_MA1_CS_L0

CPU1_MEM_MA1_ODT0

NC_CPU1_Y30
NC_CPU1_Y31

CPU1_MEM_MA2_CS_L1
CPU1_MEM_MA2_CS_L0

CPU1_MEM_MA2_ODT0

NC_CPU1_AA31
NC_CPU1_AA32

CPU1_MEM_MA3_CS_L1
CPU1_MEM_MA3_CS_L0

CPU1_MEM_MA3_ODT0

CPU1_MEM_MA_ERR_R_N
CPU1_MEM_MA_PAR
CPU1_MEM_MA_CAS_N
CPU1_MEM_MA_RAS_N
CPU1_MEM_MA_WE_N
CPU1_MEM_MA_RESET_N

CPU1_MEM_MA_BANK2
CPU1_MEM_MA_BANK1
CPU1_MEM_MA_BANK0

CPU1_MEM_MA_CKE1
CPU1_MEM_MA_CKE0

ROOM=CPU1

J_CPU1
AD31
AD32

AM34
AH33

AJ32

AE31
AF31

AM35
AH34

AK34

Y30
Y31

AC30
AB32

AB31

AA31
AA32

AD30
AB30

AC32

P30
AF32
AJ33
AH32
AJ31

D33

N32
AF33
AG32

M30

M31

T27

T26
AL26
AM26
AL31
AM31
AH29
AG29
AB27
AC27

J31

J32

L29

K29

D31

D32

F27

F26

U25

U26
AK25
AK26
AK30
AK31
AH28
AJ28
AD26
AD27

K33

J33

H29

G29

F31

E31

D27

D26

MA0_CLK_H
MA0_CLK_L

MA0_CS_L_1
MA0_CS_L_0

MA0_ODT_0

MA1_CLK_H
MA1_CLK_L

MA1_CS_L_1
MA1_CS_L_0

MA1_ODT_0

MA2_CLK_H
MA2_CLK_L

MA2_CS_L_1
MA2_CS_L_0

MA2_ODT_0

MA3_CLK_H
MA3_CLK_L

MA3_CS_L_1
MA3_CS_L_0

MA3_ODT_0

MA_ERR_L
MA_PAR
MA_CAS_L
MA_RAS_L
MA_WE_L
MA_RESET_L

MA_BANK_2
MA_BANK_1
MA_BANK_0

MA_CKE_1
MA_CKE_0

MA_DQS_H_17
MA_DQS_L_17
MA_DQS_H_16
MA_DQS_L_16
MA_DQS_H_15
MA_DQS_L_15
MA_DQS_H_14
MA_DQS_L_14
MA_DQS_H_13
MA_DQS_L_13
MA_DQS_H_12
MA_DQS_L_12
MA_DQS_H_11
MA_DQS_L_11
MA_DQS_H_10
MA_DQS_L_10
MA_DQS_H_9
MA_DQS_L_9
MA_DQS_H_8
MA_DQS_L_8
MA_DQS_H_7
MA_DQS_L_7
MA_DQS_H_6
MA_DQS_L_6
MA_DQS_H_5
MA_DQS_L_5
MA_DQS_H_4
MA_DQS_L_4
MA_DQS_H_3
MA_DQS_L_3
MA_DQS_H_2
MA_DQS_L_2
MA_DQS_H_1
MA_DQS_L_1
MA_DQS_H_0
MA_DQS_L_0

MA_DATA_63
MA_DATA_62
MA_DATA_61
MA_DATA_60
MA_DATA_59
MA_DATA_58
MA_DATA_57
MA_DATA_56
MA_DATA_55
MA_DATA_54
MA_DATA_53
MA_DATA_52
MA_DATA_51
MA_DATA_50
MA_DATA_49
MA_DATA_48
MA_DATA_47
MA_DATA_46
MA_DATA_45
MA_DATA_44
MA_DATA_43
MA_DATA_42
MA_DATA_41
MA_DATA_40
MA_DATA_39
MA_DATA_38
MA_DATA_37
MA_DATA_36
MA_DATA_35
MA_DATA_34
MA_DATA_33
MA_DATA_32
MA_DATA_31
MA_DATA_30
MA_DATA_29
MA_DATA_28
MA_DATA_27
MA_DATA_26
MA_DATA_25
MA_DATA_24
MA_DATA_23
MA_DATA_22
MA_DATA_21
MA_DATA_20
MA_DATA_19
MA_DATA_18
MA_DATA_17
MA_DATA_16
MA_DATA_15
MA_DATA_14
MA_DATA_13
MA_DATA_12
MA_DATA_11
MA_DATA_10

MA_DATA_9
MA_DATA_8
MA_DATA_7
MA_DATA_6
MA_DATA_5
MA_DATA_4
MA_DATA_3
MA_DATA_2
MA_DATA_1
MA_DATA_0

MA_ADD_0
MA_ADD_1
MA_ADD_2
MA_ADD_3
MA_ADD_4
MA_ADD_5
MA_ADD_6
MA_ADD_7
MA_ADD_8

MA_ADD_9
MA_ADD_10
MA_ADD_11
MA_ADD_12
MA_ADD_13
MA_ADD_14
MA_ADD_15

MA_CHECK_7
MA_CHECK_6
MA_CHECK_5
MA_CHECK_4
MA_CHECK_3
MA_CHECK_2
MA_CHECK_1
MA_CHECK_0

AM24
AM25
AL28
AK28
AK24
AL24
AM27
AL27
AK29
AM30
AL33
AK33
AM29
AL29
AM32
AL32
AF28
AF29
AG30
AE30
AE28
AE29
AH30
AJ30
AB25
AB26
AC29
AB29
AC25
AD25
AD28
AC28
L31
K31
G32
G31
L32
L33
H33
H32
H30
G30
K28
L28
K30
J30
H28
J28
E33
D35
F29
E29
F33
F32
E30
D30
F28
E26
B24
C24
E28
D28
E25
D25

AE33
V33
Y33
U31
U32
U30
T32
R31
T31
P32
AG31
R30
P31
AL34
N30
M32

V29
V27
R29
R28
V25
V28
R25
R26

AMC CPU F1207

HETERO 4 OF 11

CPU 1 - CHANNEL A MEMORY

CPU1_MEM_MA_DATA63
CPU1_MEM_MA_DATA62
CPU1_MEM_MA_DATA61
CPU1_MEM_MA_DATA60
CPU1_MEM_MA_DATA59
CPU1_MEM_MA_DATA58
CPU1_MEM_MA_DATA57
CPU1_MEM_MA_DATA56
CPU1_MEM_MA_DATA55
CPU1_MEM_MA_DATA54
CPU1_MEM_MA_DATA53
CPU1_MEM_MA_DATA52
CPU1_MEM_MA_DATA51
CPU1_MEM_MA_DATA50
CPU1_MEM_MA_DATA49
CPU1_MEM_MA_DATA48
CPU1_MEM_MA_DATA47
CPU1_MEM_MA_DATA46
CPU1_MEM_MA_DATA45
CPU1_MEM_MA_DATA44
CPU1_MEM_MA_DATA43
CPU1_MEM_MA_DATA42
CPU1_MEM_MA_DATA41
CPU1_MEM_MA_DATA40
CPU1_MEM_MA_DATA39
CPU1_MEM_MA_DATA38
CPU1_MEM_MA_DATA37
CPU1_MEM_MA_DATA36
CPU1_MEM_MA_DATA35
CPU1_MEM_MA_DATA34
CPU1_MEM_MA_DATA33
CPU1_MEM_MA_DATA32
CPU1_MEM_MA_DATA31
CPU1_MEM_MA_DATA30
CPU1_MEM_MA_DATA29
CPU1_MEM_MA_DATA28
CPU1_MEM_MA_DATA27
CPU1_MEM_MA_DATA26
CPU1_MEM_MA_DATA25
CPU1_MEM_MA_DATA24
CPU1_MEM_MA_DATA23
CPU1_MEM_MA_DATA22
CPU1_MEM_MA_DATA21
CPU1_MEM_MA_DATA20
CPU1_MEM_MA_DATA19
CPU1_MEM_MA_DATA18
CPU1_MEM_MA_DATA17
CPU1_MEM_MA_DATA16
CPU1_MEM_MA_DATA15
CPU1_MEM_MA_DATA14
CPU1_MEM_MA_DATA13
CPU1_MEM_MA_DATA12
CPU1_MEM_MA_DATA11
CPU1_MEM_MA_DATA10

CPU1_MEM_MA_DATA9
CPU1_MEM_MA_DATA8
CPU1_MEM_MA_DATA7
CPU1_MEM_MA_DATA6
CPU1_MEM_MA_DATA5
CPU1_MEM_MA_DATA4
CPU1_MEM_MA_DATA3
CPU1_MEM_MA_DATA2
CPU1_MEM_MA_DATA1
CPU1_MEM_MA_DATA0

CPU1_MEM_MA_ADD0
CPU1_MEM_MA_ADD1
CPU1_MEM_MA_ADD2
CPU1_MEM_MA_ADD3
CPU1_MEM_MA_ADD4
CPU1_MEM_MA_ADD5
CPU1_MEM_MA_ADD6
CPU1_MEM_MA_ADD7
CPU1_MEM_MA_ADD8

CPU1_MEM_MA_ADD9
CPU1_MEM_MA_ADD10
CPU1_MEM_MA_ADD11
CPU1_MEM_MA_ADD12
CPU1_MEM_MA_ADD13
CPU1_MEM_MA_ADD14
CPU1_MEM_MA_ADD15

CPU1_MEM_MA_CHECK7
CPU1_MEM_MA_CHECK6
CPU1_MEM_MA_CHECK5
CPU1_MEM_MA_CHECK4
CPU1_MEM_MA_CHECK3
CPU1_MEM_MA_CHECK2
CPU1_MEM_MA_CHECK1
CPU1_MEM_MA_CHECK0

32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33

32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34

32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33

+1.2V_VLDT

J_CPU1

R8749

1 2

R8748

1 2

51-5%51-5%

22
22
22
22

22
22

22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22

22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22

HT_CK_NBLA_C1L1_1_DP
HT_CK_NBLA_C1L1_1_DN
HT_CK_NBLA_C1L1_0_DP
HT_CK_NBLA_C1L1_0_DN

CPU1_CTLIN_L1_H1
CPU1_CTLIN_L1_L1
HT_CT_NBLA_C1L1_0_DP
HT_CT_NBLA_C1L1_0_DN

HT_AD_NBLA_C1L1_15_DP
HT_AD_NBLA_C1L1_15_DN
HT_AD_NBLA_C1L1_14_DP
HT_AD_NBLA_C1L1_14_DN
HT_AD_NBLA_C1L1_13_DP
HT_AD_NBLA_C1L1_13_DN
HT_AD_NBLA_C1L1_12_DP
HT_AD_NBLA_C1L1_12_DN
HT_AD_NBLA_C1L1_11_DP
HT_AD_NBLA_C1L1_11_DN
HT_AD_NBLA_C1L1_10_DP
HT_AD_NBLA_C1L1_10_DN
HT_AD_NBLA_C1L1_9_DP
HT_AD_NBLA_C1L1_9_DN
HT_AD_NBLA_C1L1_8_DP
HT_AD_NBLA_C1L1_8_DN

HT_AD_NBLA_C1L1_7_DP
HT_AD_NBLA_C1L1_7_DN
HT_AD_NBLA_C1L1_6_DP
HT_AD_NBLA_C1L1_6_DN
HT_AD_NBLA_C1L1_5_DP
HT_AD_NBLA_C1L1_5_DN
HT_AD_NBLA_C1L1_4_DP
HT_AD_NBLA_C1L1_4_DN
HT_AD_NBLA_C1L1_3_DP
HT_AD_NBLA_C1L1_3_DN
HT_AD_NBLA_C1L1_2_DP
HT_AD_NBLA_C1L1_2_DN
HT_AD_NBLA_C1L1_1_DP
HT_AD_NBLA_C1L1_1_DN
HT_AD_NBLA_C1L1_0_DP
HT_AD_NBLA_C1L1_0_DN

E18

L1_CLKIN_H_1

E17

L1_CLKIN_L_1

C18

L1_CLKIN_H_0

B18

L1_CLKIN_L_0

C13

L1_CTLIN_H_1

D13

L1_CTLIN_L_1

A14

L1_CTLIN_H_0

A13

L1_CTLIN_L_0

E14

L1_CADIN_H_15

E13

L1_CADIN_L_15

C15

L1_CADIN_H_14

D15

L1_CADIN_L_14

E16

L1_CADIN_H_13

E15

L1_CADIN_L_13

C17

L1_CADIN_H_12

D17

L1_CADIN_L_12

C19

L1_CADIN_H_11

D19

L1_CADIN_L_11

E20

L1_CADIN_H_10

E19

L1_CADIN_L_10

C21

L1_CADIN_H_9

D21

L1_CADIN_L_9

E22

L1_CADIN_H_8

E21

L1_CADIN_L_8

C14

L1_CADIN_H_7

B14

L1_CADIN_L_7

A16

L1_CADIN_H_6

A15

L1_CADIN_L_6

C16

L1_CADIN_H_5

B16

L1_CADIN_L_5

A18

L1_CADIN_H_4

A17

L1_CADIN_L_4

A20

L1_CADIN_H_3

A19

L1_CADIN_L_3

C20

L1_CADIN_H_2

B20

L1_CADIN_L_2

A22

L1_CADIN_H_1

A21

L1_CADIN_L_1

C22

L1_CADIN_H_0

B22

L1_CADIN_L_0

AMC CPU F1207

HETERO 2 OF 11

From HT2100 LA

CPU 1 HYPERTRANSPORT TO HT2100

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.

L1_CLKOUT_H_1
L1_CLKOUT_L_1
L1_CLKOUT_H_0
L1_CLKOUT_L_0

L1_CTLOUT_H_1
L1_CTLOUT_L_1
L1_CTLOUT_H_0
L1_CTLOUT_L_0

L1_CADOUT_H_15
L1_CADOUT_L_15
L1_CADOUT_H_14
L1_CADOUT_L_14
L1_CADOUT_H_13
L1_CADOUT_L_13
L1_CADOUT_H_12
L1_CADOUT_L_12
L1_CADOUT_H_11
L1_CADOUT_L_11
L1_CADOUT_H_10
L1_CADOUT_L_10

L1_CADOUT_H_9
L1_CADOUT_L_9
L1_CADOUT_H_8
L1_CADOUT_L_8

L1_CADOUT_H_7
L1_CADOUT_L_7
L1_CADOUT_H_6
L1_CADOUT_L_6
L1_CADOUT_H_5
L1_CADOUT_L_5
L1_CADOUT_H_4
L1_CADOUT_L_4
L1_CADOUT_H_3
L1_CADOUT_L_3
L1_CADOUT_H_2
L1_CADOUT_L_2
L1_CADOUT_H_1
L1_CADOUT_L_1
L1_CADOUT_H_0
L1_CADOUT_L_0

E6
D6
B6
B7

F10
F11
C11
D11

E10
D10
F8
F9
E8
D8
F6
F7
F4
F5
E4
D4
F2
F3
E2
D2

B10
B11
C9
D9
B8
B9
C7
D7
C5
D5
B4
B5
C3
D3
B2

B3

TITLE

DWG NO.

DATE

D

HT_CK_C1L1_NBLA_1_DP
HT_CK_C1L1_NBLA_1_DN
HT_CK_C1L1_NBLA_0_DP
HT_CK_C1L1_NBLA_0_DN

NC_CPU1_AL14
NC_CPU1_AL13
HT_CT_C1L1_NBLA_0_DP
HT_CT_C1L1_NBLA_0_DN

HT_AD_C1L1_NBLA_15_DP
HT_AD_C1L1_NBLA_15_DN
HT_AD_C1L1_NBLA_14_DP
HT_AD_C1L1_NBLA_14_DN
HT_AD_C1L1_NBLA_13_DP
HT_AD_C1L1_NBLA_13_DN
HT_AD_C1L1_NBLA_12_DP
HT_AD_C1L1_NBLA_12_DN
HT_AD_C1L1_NBLA_11_DP
HT_AD_C1L1_NBLA_11_DN
HT_AD_C1L1_NBLA_10_DP
HT_AD_C1L1_NBLA_10_DN
HT_AD_C1L1_NBLA_9_DP
HT_AD_C1L1_NBLA_9_DN
HT_AD_C1L1_NBLA_8_DP
HT_AD_C1L1_NBLA_8_DN

HT_AD_C1L1_NBLA_7_DP
HT_AD_C1L1_NBLA_7_DN
HT_AD_C1L1_NBLA_6_DP
HT_AD_C1L1_NBLA_6_DN
HT_AD_C1L1_NBLA_5_DP
HT_AD_C1L1_NBLA_5_DN
HT_AD_C1L1_NBLA_4_DP
HT_AD_C1L1_NBLA_4_DN
HT_AD_C1L1_NBLA_3_DP
HT_AD_C1L1_NBLA_3_DN
HT_AD_C1L1_NBLA_2_DP
HT_AD_C1L1_NBLA_2_DN
HT_AD_C1L1_NBLA_1_DP
HT_AD_C1L1_NBLA_1_DN
HT_AD_C1L1_NBLA_0_DP
HT_AD_C1L1_NBLA_0_DN

To HT2100 LA

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

10/20/2006

22
22
22
22

22
22

22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22

22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22

REV.

X01

13 OF 144

1

2

3

4

C

DBA

A B C

D

+VDDA_CPU1

32
32

32,34
32,34

1

X00_DT10369 SCH name fix

2

3

32,34

33
33

33,34
33,34

33,34

32,34
32,34

32,34

33,34
33,34

33,34

34
32-34
32-34
32-34
32-34
32,33

32-34
32-34
32-34

33,34
32,34

32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33

4

CK_CPU1_MEM_MB0_DP
CK_CPU1_MEM_MB0_DN

CPU1_MEM_MB0_CS_L1
CPU1_MEM_MB0_CS_L0

CPU1_MEM_MB0_ODT0

CK_CPU1_MEM_MB1_DP
CK_CPU1_MEM_MB1_DN

CPU1_MEM_MB1_CS_L1
CPU1_MEM_MB1_CS_L0

CPU1_MEM_MB1_ODT0

NC_CPU1_U29
NC_CPU1_U28

CPU1_MEM_MB2_CS_L1
CPU1_MEM_MB2_CS_L0

CPU1_MEM_MB2_ODT0

NC_CPU1_T29
NC_CPU1_T28

CPU1_MEM_MB3_CS_L1
CPU1_MEM_MB3_CS_L0

CPU1_MEM_MB3_ODT0

CPU1_MEM_MB_ERR_R_N
CPU1_MEM_MB_PAR
CPU1_MEM_MB_CAS_N
CPU1_MEM_MB_RAS_N
CPU1_MEM_MB_WE_N
CPU1_MEM_MB_RESET_N

CPU1_MEM_MB_BANK2
CPU1_MEM_MB_BANK1
CPU1_MEM_MB_BANK0

CPU1_MEM_MB_CKE1
CPU1_MEM_MB_CKE0

CPU1_MEM_MB_DQS_17_DP
CPU1_MEM_MB_DQS_17_DN
CPU1_MEM_MB_DQS_16_DP
CPU1_MEM_MB_DQS_16_DN
CPU1_MEM_MB_DQS_15_DP
CPU1_MEM_MB_DQS_15_DN
CPU1_MEM_MB_DQS_14_DP
CPU1_MEM_MB_DQS_14_DN
CPU1_MEM_MB_DQS_13_DP
CPU1_MEM_MB_DQS_13_DN
CPU1_MEM_MB_DQS_12_DP
CPU1_MEM_MB_DQS_12_DN
CPU1_MEM_MB_DQS_11_DP
CPU1_MEM_MB_DQS_11_DN
CPU1_MEM_MB_DQS_10_DP
CPU1_MEM_MB_DQS_10_DN
CPU1_MEM_MB_DQS_9_DP
CPU1_MEM_MB_DQS_9_DN
CPU1_MEM_MB_DQS_8_DP
CPU1_MEM_MB_DQS_8_DN
CPU1_MEM_MB_DQS_7_DP
CPU1_MEM_MB_DQS_7_DN
CPU1_MEM_MB_DQS_6_DP
CPU1_MEM_MB_DQS_6_DN
CPU1_MEM_MB_DQS_5_DP
CPU1_MEM_MB_DQS_5_DN
CPU1_MEM_MB_DQS_4_DP
CPU1_MEM_MB_DQS_4_DN
CPU1_MEM_MB_DQS_3_DP
CPU1_MEM_MB_DQS_3_DN
CPU1_MEM_MB_DQS_2_DP
CPU1_MEM_MB_DQS_2_DN
CPU1_MEM_MB_DQS_1_DP
CPU1_MEM_MB_DQS_1_DN
CPU1_MEM_MB_DQS_0_DP
CPU1_MEM_MB_DQS_0_DN

Y35
Y34

AJ35
AE35

AG34

AA34
AA33

AK35
AD35

AG35

U29
U28

W31
V32

W32

T29
T28

W30
V30

W33

P33
AB34
AF34
AD33
AE34

A33

N33
AC34
AC33

M34

M35

M29

N29
AN28
AN27
AN33
AN32
AG27
AH27
AA29
AA28

G34

G35

K26

J26

A31

A32

A26

A27

N27

N28
AP26
AP27
AP31
AP32
AJ26
AJ27

W26

W27

H35

H34

H27

G27

C32

B32

B27

C27

MB0_CLK_H
MB0_CLK_L

MB0_CS_L_1
MB0_CS_L_0

MB0_ODT_0

MB1_CLK_H
MB1_CLK_L

MB1_CS_L_1
MB1_CS_L_0

MB1_ODT_0

MB2_CLK_H
MB2_CLK_L

MB2_CS_L_1
MB2_CS_L_0

MB2_ODT_0

MB3_CLK_H
MB3_CLK_L

MB3_CS_L_1
MB3_CS_L_0

MB3_ODT_0

MB_ERR_L
MB_PAR
MB_CAS_L
MB_RAS_L
MB_WE_L
MB_RESET_L

MB_BANK_2
MB_BANK_1
MB_BANK_0

MB_CKE_1
MB_CKE_0

MB_DQS_H_17
MB_DQS_L_17
MB_DQS_H_16
MB_DQS_L_16
MB_DQS_H_15
MB_DQS_L_15
MB_DQS_H_14
MB_DQS_L_14
MB_DQS_H_13
MB_DQS_L_13
MB_DQS_H_12
MB_DQS_L_12
MB_DQS_H_11
MB_DQS_L_11
MB_DQS_H_10
MB_DQS_L_10
MB_DQS_H_9
MB_DQS_L_9
MB_DQS_H_8
MB_DQS_L_8
MB_DQS_H_7
MB_DQS_L_7
MB_DQS_H_6
MB_DQS_L_6
MB_DQS_H_5
MB_DQS_L_5
MB_DQS_H_4
MB_DQS_L_4
MB_DQS_H_3
MB_DQS_L_3
MB_DQS_H_2
MB_DQS_L_2
MB_DQS_H_1
MB_DQS_L_1
MB_DQS_H_0
MB_DQS_L_0

J_CPU1

AMC CPU F1207

HETERO 5 OF 11

MB_DATA_63
MB_DATA_62
MB_DATA_61
MB_DATA_60
MB_DATA_59
MB_DATA_58
MB_DATA_57
MB_DATA_56
MB_DATA_55
MB_DATA_54
MB_DATA_53
MB_DATA_52
MB_DATA_51
MB_DATA_50
MB_DATA_49
MB_DATA_48
MB_DATA_47
MB_DATA_46
MB_DATA_45
MB_DATA_44
MB_DATA_43
MB_DATA_42
MB_DATA_41
MB_DATA_40
MB_DATA_39
MB_DATA_38
MB_DATA_37
MB_DATA_36
MB_DATA_35
MB_DATA_34
MB_DATA_33
MB_DATA_32
MB_DATA_31
MB_DATA_30
MB_DATA_29
MB_DATA_28
MB_DATA_27
MB_DATA_26
MB_DATA_25
MB_DATA_24
MB_DATA_23
MB_DATA_22
MB_DATA_21
MB_DATA_20
MB_DATA_19
MB_DATA_18
MB_DATA_17
MB_DATA_16
MB_DATA_15
MB_DATA_14
MB_DATA_13
MB_DATA_12
MB_DATA_11
MB_DATA_10

MB_DATA_9
MB_DATA_8
MB_DATA_7
MB_DATA_6
MB_DATA_5
MB_DATA_4
MB_DATA_3
MB_DATA_2
MB_DATA_1
MB_DATA_0

MB_ADD_0
MB_ADD_1
MB_ADD_2
MB_ADD_3
MB_ADD_4
MB_ADD_5
MB_ADD_6
MB_ADD_7
MB_ADD_8

MB_ADD_9
MB_ADD_10
MB_ADD_11
MB_ADD_12
MB_ADD_13
MB_ADD_14
MB_ADD_15

MB_CHECK_7
MB_CHECK_6
MB_CHECK_5
MB_CHECK_4
MB_CHECK_3
MB_CHECK_2
MB_CHECK_1
MB_CHECK_0

AN25
AR26
AN29
AR29
AP25
AR25
AR28
AP28
AN30
AR31
AR34
AN34
AR30
AP30
AR33
AP33
AG25
AE25
AF26
AE26
AF24
AE24
AG26
AF27
Y26
AA27
W28
W25
Y25
AA26
Y28
Y29
K35
J35
E35
C35
L34
K34
F34
E34
L24
J27
K25
K24
L27
L26
G26
J25
B34
A34
C30
C29
C34
C33
B31
B30
C28
A28
B25
A24
A29
B29
B26
C25

AB35
V34
W35
V35
U34
U35
T33
R33
T34
R35
AC35
R34
P35
AH35
N35
N34

P27
P28
N25
M25
P25
P26
M26
M27

CPU1_MEM_MB_DATA63
CPU1_MEM_MB_DATA62
CPU1_MEM_MB_DATA61
CPU1_MEM_MB_DATA60
CPU1_MEM_MB_DATA59
CPU1_MEM_MB_DATA58
CPU1_MEM_MB_DATA57
CPU1_MEM_MB_DATA56
CPU1_MEM_MB_DATA55
CPU1_MEM_MB_DATA54
CPU1_MEM_MB_DATA53
CPU1_MEM_MB_DATA52
CPU1_MEM_MB_DATA51
CPU1_MEM_MB_DATA50
CPU1_MEM_MB_DATA49
CPU1_MEM_MB_DATA48
CPU1_MEM_MB_DATA47
CPU1_MEM_MB_DATA46
CPU1_MEM_MB_DATA45
CPU1_MEM_MB_DATA44
CPU1_MEM_MB_DATA43
CPU1_MEM_MB_DATA42
CPU1_MEM_MB_DATA41
CPU1_MEM_MB_DATA40
CPU1_MEM_MB_DATA39
CPU1_MEM_MB_DATA38
CPU1_MEM_MB_DATA37
CPU1_MEM_MB_DATA36
CPU1_MEM_MB_DATA35
CPU1_MEM_MB_DATA34
CPU1_MEM_MB_DATA33
CPU1_MEM_MB_DATA32
CPU1_MEM_MB_DATA31
CPU1_MEM_MB_DATA30
CPU1_MEM_MB_DATA29
CPU1_MEM_MB_DATA28
CPU1_MEM_MB_DATA27
CPU1_MEM_MB_DATA26
CPU1_MEM_MB_DATA25
CPU1_MEM_MB_DATA24
CPU1_MEM_MB_DATA23
CPU1_MEM_MB_DATA22
CPU1_MEM_MB_DATA21
CPU1_MEM_MB_DATA20
CPU1_MEM_MB_DATA19
CPU1_MEM_MB_DATA18
CPU1_MEM_MB_DATA17
CPU1_MEM_MB_DATA16
CPU1_MEM_MB_DATA15
CPU1_MEM_MB_DATA14
CPU1_MEM_MB_DATA13
CPU1_MEM_MB_DATA12
CPU1_MEM_MB_DATA11
CPU1_MEM_MB_DATA10
CPU1_MEM_MB_DATA9
CPU1_MEM_MB_DATA8
CPU1_MEM_MB_DATA7
CPU1_MEM_MB_DATA6
CPU1_MEM_MB_DATA5
CPU1_MEM_MB_DATA4
CPU1_MEM_MB_DATA3
CPU1_MEM_MB_DATA2
CPU1_MEM_MB_DATA1
CPU1_MEM_MB_DATA0

CPU1_MEM_MB_ADD0
CPU1_MEM_MB_ADD1
CPU1_MEM_MB_ADD2
CPU1_MEM_MB_ADD3
CPU1_MEM_MB_ADD4
CPU1_MEM_MB_ADD5
CPU1_MEM_MB_ADD6
CPU1_MEM_MB_ADD7
CPU1_MEM_MB_ADD8
CPU1_MEM_MB_ADD9
CPU1_MEM_MB_ADD10
CPU1_MEM_MB_ADD11
CPU1_MEM_MB_ADD12
CPU1_MEM_MB_ADD13
CPU1_MEM_MB_ADD14
CPU1_MEM_MB_ADD15

CPU1_MEM_MB_CHECK7
CPU1_MEM_MB_CHECK6
CPU1_MEM_MB_CHECK5
CPU1_MEM_MB_CHECK4
CPU1_MEM_MB_CHECK3
CPU1_MEM_MB_CHECK2
CPU1_MEM_MB_CHECK1
CPU1_MEM_MB_CHECK0

32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33

32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34

32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33

CK_200M_CPU1_C_DP

45

45

X00_DT9693 SCH routes to CPLD now

CK_200M_CPU1_C_DN

+MEM_CPU1

+MEM_CPU1

+MEM_CPU1

R9184

1 2

NP

NP

NP

119
119

137

300-5%

R9318

1 2

300-5%

R9319

1 2

300-5%

R9320

1 2

300-5%

R9321

1 2

300-5%

R9322

1 2

300-5%

R9323

1 2

300-5%

R9324

1 2

300-5%

C9383

21

3900pF

50V-10%

C9384

21

3900pF

50V-10%

CPU1_COREFB_POS
CPU1_COREFB_NEG

CPU1_DDRVTT_SENSE

R9220

1 2

510-5%

NP

R9183

X

1 2

NP

R9179

X

300-5%

1 2

CPU1_THERMTRIP_N

CPU1_PROCHOT_N

MOD_CPU1_SIC

MOD_CPU1_SID

SYSTEM_PWRGOOD_CPU1

X

RST_CPU1_N

X

CPU1_LDTSTOP_N

X

NP

R9181

X

300-5%

1 2

CK_200M_CPU1_DP

R9109

1 2

169-1%

1 2

14,96

1 2

14,55

14
14

14
14

R9221

510-5%

NP

R9182

300-5%

X00_DT9809 SCH depop'd R

MOD_CPU1_SCANEN
MOD_CPU1_SCANCK2
MOD_CPU1_SCANCK1
MOD_CPU1_SCANSHIFTENA
MOD_CPU1_SCANSHIFTENB

X

1 2

300-5%

CK_200M_CPU1_DN

SYSTEM_PWRGOOD_CPU1

14,96
14,96

66,138

14
14

20
20
20
20

20

R9113

0-5%

V_MEM_CPU1_VREF
CPU1_M_ZN

CPU1_M_ZP

CPU1_PLLTEST_1
CPU1_PLLTEST_0

NC_MOD_CPU1_TEST_2
NC_MOD_CPU1_TEST_3

R9185

1 2

300-5%

NC_MOD_CPU1_TEST_6

14,138

14,138

14

14

14,96

14,96

RST_CPU1_N
CPU1_LDTSTOP_N

CPU1_PRES_N

MOD_CPU1_SIC
MOD_CPU1_SID

CPU1_TDI
CPU1_TRST_N
CPU1_TCK
CPU1_TMS

CPU1_DBREQ_N

R9112

1 2

0-5%

R9180

NP

1 2

300-5%

R9178

NP

1 2

300-5%

14,96

X

X

G2

VDDA1

G3

VDDA2

G4

VDDA3

K22

CLKIN_H

J22

CLKIN_L

F21

PWROK

F19

RESET_L

H25

LDTSTOP_L

AP1

CPU_PRESENT_L

AG19
AF19

AJ22
AG22
AF22
AJ21

AF17

AJ25
AH25

AF20

AJ20
AH20
AG20
AG21
AF21
AH21
AF18

F24

J9

J10

F18

F23
F20

AG8
AG9

G21
H21

U8

AH9

SIC
SID

TDI
TRST_L
TCK
TMS

DBREQ_L

VDD_FB_H
VDD_FB_L

VTT_SENSE

M_VREF
M_ZN
M_ZP

TEST23

TEST18
TEST19

TEST2
TEST3

TEST25_H
TEST25_L

TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST26

TEST9
TEST6

CPU1 MISC

R9325

1 2

300-5%

R9326

1 2

300-5%

+MEM_CPU1

1 2

1 2

CPU1_PLLTEST_1

CPU1_PLLTEST_0

R9216

39.2-1%

R9215

39.2-1%

C9766

1 2

J_CPU1

AMC CPU F1207

HETERO 6 OF 11

CPU1_M_ZN

CPU1_M_ZP

C9767

1000pF

1 2

50V-10%

1000pF

50V-10%

VID_5
VID_4
VID_3
VID_2
VID_1
VID_0

THERMTRIP_L

PROCHOT_L

TDO

DBRDY

VDDIO_FB_H
VDDIO_FB_L

HTREF1
HTREF0

THERMDA
THERMDC

TEST13

TEST28_H
TEST28_L

TEST17
TEST16
TEST15
TEST14

TEST7

TEST10

TEST8

TEST29_H
TEST29_L

14

14

14

14

E24
G18
J19
H19
K19
H18

AH19
AJ19

AH22

J24

AG17
AH17

V7
U7

AF8
AF9

AH8

L8
M9

J20
G20
K20
H20

J8
V8

H8

G23
G24

CPU1_VID5
CPU1_VID4
CPU1_VID3
CPU1_VID2
CPU1_VID1
CPU1_VID0

CPU1_THERMTRIP_N

CPU1_PROCHOT_N

CPU1_TDO

CPU1_DBRDY

V_MEM_CPU1_SENSE_POS
V_MEM_CPU1_SENSE_NEG

MOD_CPU1_L0_REF_1
MOD_CPU1_L0_REF_0

MOD_CPU1_THERMDA
MOD_CPU1_THERMDC

NC_CPU1_TEST_28_DP
NC_CPU1_TEST_28_DN

NC_MOD_CPU1_TEST_17
NC_MOD_CPU1_TEST_16
NC_MOD_CPU1_TEST_15
NC_MOD_CPU1_TEST_14

NC_MOD_CPU1_TEST_7
NC_MOD_CPU1_TEST_10

NC_MOD_CPU1_TEST_8

R9154

1 2

80.6-1%

+MEM_CPU1

R9430

R9805

R9431

15-1%15-1%

1 2

0-5%

1 2

R9812

1 2

10K-5%

1 2

This value calculated to be negative 16ohm. left as is

TITLE

1

119,143
119,143
119,143
119,143
119,143
119,143

14,138
14,138

18,20

20

+1.2V_VLDT

113
113

R9233

1 2

44.2-1%

C9353

1000pF

50V-10%

1 2

1000pF

50V-10%

2

89
89

R9234

1 2

44.2-1%

C9352

1 2

3

V_MEM_CPU1_VREF

21

C9539

1 2

V_MEM_CPU1_VREF_FEEDBACK

1000pF

50V-10%

55

C9537

This value calculated to be negative 14ohm.

Hence just keeping a place holder with 10kohm

14,55

.1uF

16V-10%

4

INC.

ROUND ROCK,TEXAS

CPU1 - CHANNEL B MEMORY

ROOM=CPU1

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

X00_DT9808 SCH added caps

DWG NO.

DATE

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

DCBA

REV.

X01

14 OF 14410/20/2006

1

A9

A5

VSS_A9

VSS_A5

A B C

AJ24

AJ23

AJ17

AJ15

AJ11

AJ9

AJ7

AJ5

AJ3

AJ1

AH26

AH24

AH16

AH14

AH12

AH10

AH6

AG28

AG23

AG15

AG13

AG11

AG7

AF30

AF25

AF16

AF14

AF12

AF10

AE27

AE23

AE21

AE19

AE17

AE15

AE13

AE11

AE9

AE7

AE3

AE2

AD29

AD24

AD22

AD20

AD18

AD16

AD14

AD12

AD10

AD8

AD5

AD4

AC26

AC23

AC21

AC19

AC17

AC15

AC13

AC11

AC9

AC7

AB28

AB24

AB22

AB20

AB18

AB16

AB14

AB12

AB10

AB8

AA25

AA23

AA21

AA19

AA17

AA15

AA13

AA11

AA9

AA7

AA3

AA2

A30

A25

VSS_AJ9

VSS_AJ7

VSS_AJ5

VSS_AJ3

VSS_AA2

VSS_A30

VSS_A25

VSS_AA9

VSS_AA7

VSS_AA3

VSS_AA15

VSS_AA13

VSS_AA11

VSS_AA21

VSS_AA19

VSS_AA17

VSS_AB8

VSS_AA25

VSS_AA23

VSS_AB14

VSS_AB12

VSS_AB10

VSS_AB20

VSS_AB18

VSS_AB16

VSS_AB28

VSS_AB24

VSS_AB22

VSS_AC9

VSS_AC7

VSS_AC11

VSS_AC17

VSS_AC15

VSS_AC13

VSS_AC23

VSS_AC21

VSS_AC19

VSS_AD5

VSS_AD4

VSS_AC26

VSS_AD8

VSS_AD12

VSS_AD10

VSS_AD18

VSS_AD16

VSS_AD14

VSS_AD24

VSS_AD22

VSS_AD20

VSS_AE3

VSS_AE2

VSS_AD29

VSS_AE9

VSS_AE7

VSS_AE11

VSS_AE17

VSS_AE15

VSS_AE13

VSS_AE23

VSS_AE21

VSS_AE19

VSS_AF12

VSS_AF10

VSS_AE27

VSS_AF25

VSS_AF16

VSS_AF14

VSS_AG7

VSS_AG11

VSS_AF30

VSS_AG23

VSS_AG15

VSS_AG13

VSS_AH6

VSS_AH10

VSS_AG28

VSS_AH16

VSS_AH14

VSS_AH12

VSS_AJ1

VSS_AH26

VSS_AH24

VSS_AJ17

VSS_AJ15

VSS_AJ11

VSS_AJ24

VSS_AJ23

AK14

AK2

AJ29

VSS_AK2

VSS_AK14

VSS_AJ29

AK20

AK18

AK16

VSS_AK20

VSS_AK18

VSS_AK16

AK27

AK23

AK22

VSS_AK27

VSS_AK23

VSS_AK22

AL3

AL1

AK32

VSS_AL3

VSS_AL1

VSS_AK32

AL25

AL11

AL7

VSS_AL7

VSS_AL11

AM19

AM15

AL30

VSS_AM15

VSS_AL30

VSS_AL25

AN6

AM33

AM28

VSS_AM33

VSS_AM28

VSS_AM19

AN24

AN10

VSS_AN6

VSS_AN24

VSS_AN10

AN35

AN31

AN26

VSS_AN35

VSS_AN31

VSS_AN26

AP22

AP18

AP14

VSS_AP22

VSS_AP18

VSS_AP14

AP29

AP24

VSS_AP29

VSS_AP24

D

1

J_CPU1

VDD_A6

A6

VDD_AA8

VDD_A10

AA8

A10

AA10

VDD_AA14

VDD_AA12

VDD_AA10

AA16

AA14

AA12

VDD_AA20

VDD_AA18

VDD_AA16

AB4

AA20

AA18

VDD_AB7

VDD_AB5

VDD_AB4

AB7

AB5

VDD_AB11

VDD_AB9

AB9

AB13

AB11

VDD_AB17

VDD_AB15

VDD_AB13

AB19

AB17

AB15

VDD_AC2

VDD_AB21

VDD_AB19

AC3

AC2

AB21

VDD_AC10

VDD_AC8

VDD_AC3

AC8

AC10

VDD_AC16

VDD_AC14

VDD_AC12

AC16

AC14

AC12

VDD_AD7

VDD_AC20

VDD_AC18

AD7

AC20

AC18

VDD_AD11

VDD_AD9

AD9

AD11

VDD_AD17

VDD_AD15

VDD_AD13

AD17

AD15

AD13

VDD_AE8

VDD_AD21

VDD_AD19

AE8

AD21

AD19

VDD_AE14

VDD_AE12

VDD_AE10

AE14

AE12

AE10

VDD_AE20

VDD_AE18

VDD_AE16

AE20

AE18

AE16

VDD_AF5

VDD_AF4

AF7

AF5

AF4

VDD_AF13

VDD_AF11

VDD_AF7

AF13

AF11

VDD_AG3

VDD_AG2

VDD_AF15

AG3

AG2

AF15

VDD_AG14

VDD_AG12

VDD_AG10

AG14

AG12

AG10

VDD_AH7

VDD_AH5

VDD_AG16

AH7

AH5

AG16

VDD_AH15

VDD_AH13

VDD_AH11

AH15

AH13

AH11

VDD_AJ4

VDD_AJ2

AJ6

AJ4

AJ2

VDD_AJ10

VDD_AJ8

VDD_AJ6

AJ8

AJ10

VDD_AJ16

VDD_AJ14

VDD_AJ12

AJ16

AJ14

AJ12

VDD_AK13

VDD_AK1

AK1

AK15

AK13

VDD_AK19

VDD_AK17

VDD_AK15

AK21

AK19

AK17

VDD_AL5

VDD_AL2

VDD_AK21

AL9

AL5

AL2

VDD_AM13

VDD_AM1

VDD_AL9

AM1

AM13

VDD_AN4

VDD_AM21

VDD_AM17

AN4

AM21

AM17

VDD_AN12

VDD_AN8

AN8

AP16

AN12

VDD_AR6

VDD_AP20

VDD_AP16

AR6

AR10

AP20

VDD_B19

VDD_B15

VDD_AR10

C2

B19

B15

VDD_C6

VDD_C2

C6

C10

VDD_D16

VDD_C12

VDD_C10

D16

C12

VDD_E3

VDD_D20

E7

E3

D20

VDD_E11

VDD_E7

E12

E11

VDD_F15

VDD_F13

VDD_E12

F15

F13

VDD_G1

VDD_F17

G6

G1

F17

VDD_G8

VDD_G6

G8

G10

VDD_G14

VDD_G12

VDD_G10

G14

G12

VDD_H7

VDD_G16

H7

H13

G16

VDD_H17

VDD_H15

VDD_H13

H17

H15

VDD_J16

VDD_J14

J12

J16

J14

VDD_K5

VDD_K4

VDD_J12

K5

K4

AMC CPU F1207

HETERO 8 OF 11

VDD_K7

K7

CPU socket screws

ADD3=ADD*_RP956

ADD2=ADD*_RP956
ADD3=ADD*_RP956
ADD1=ADD*_RP956

CPU socket washers

ADD4=ADD*_GR683

ADD5=ADD*_GR683

ADD6=ADD*_GR683
ADD7=ADD*_GR683

X01_DTXXXXX

+VCORE_CPU1

2

3

AP34

VSS_AP34

J_CPU1

VDD_K9

K9

AR9

AR5

AP35

VSS_AR9

VSS_AR5

VSS_AP35

VDD_K17

VDD_K15

VDD_K13

K17

K15

K13

AR32

AR27

AR24

VSS_AR32

VSS_AR27

VSS_AR24

VDD_L10

VDD_L3

VDD_L2

L3

L2

L10

B17

B13

B12

VSS_B13

VSS_B12

VDD_L14

VDD_L12

L16

L14

L12

B28

B21

VSS_B28

VSS_B21

VSS_B17

VDD_L20

VDD_L18

VDD_L16

L20

L18

J_CPU1

C4

B35

B33

VSS_B35

VSS_B33

VDD_M11

VDD_M7

M7

M13

M11

N17

N15

VSS_N17

VSS_N15

C26

C8

VSS_C8

VSS_C4

VSS_C26

VDD_M17

VDD_M15

VDD_M13

M17

M15

N23

N21

N19

VSS_N21

VSS_N19

D14

D12

C31

VSS_D12

VSS_C31

VDD_M21

VDD_M19

N8

M21

M19

P8

N26

VSS_P8

VSS_N26

VSS_N23

D22

D18

VSS_D22

VSS_D18

VSS_D14

VDD_N12

VDD_N10

VDD_N8

N12

N10

P14

P12

P10

VSS_P12

VSS_P10

D34

D29

D24

VSS_D29

VSS_D24

VDD_N16

VDD_N14

N18

N16

N14

P18

P16

VSS_P18

VSS_P16

VSS_P14

E9

E5

VSS_E9

VSS_E5

VSS_D34

VDD_P4

VDD_N20

VDD_N18

P4

N20

P24

P22

P20

VSS_P22

VSS_P20

F14

E32

E27

VSS_E32

VSS_E27

VDD_P7

VDD_P5

P9

P7

P5

R7

P29

VSS_R7

VSS_P29

VSS_P24

F22

F16

VSS_F22

VSS_F16

VSS_F14

VDD_P13

VDD_P11

VDD_P9

P13

P11

R13

R11

R9

VSS_R9

VSS_R11

F35

F30

F25

VSS_F30

VSS_F25

VDD_P17

VDD_P15

P19

P17

P15

R17

R15

VSS_R17

VSS_R15

VSS_R13

G7

G5

VSS_G7

VSS_G5

VSS_F35

VDD_R2

VDD_P21

VDD_P19

R2

P21

R23

R21

R19

VSS_R21

VSS_R19

G13

G11

G9

VSS_G9

VSS_G11

VDD_R8

VDD_R3

R8

R3

R10

T4

R27

VSS_T4

VSS_R27

VSS_R23

G17

G15

VSS_G17

VSS_G15

VSS_G13

VDD_R14

VDD_R12

VDD_R10

R14

R12

T10

T8

T5

VSS_T8

VSS_T5

G28

G25

G22

VSS_G25

VSS_G22

VDD_R18

VDD_R16

R20

R18

R16

T14

T12

VSS_T14

VSS_T12

VSS_T10

H4

G33

VSS_H4

VSS_G33

VSS_G28

VDD_T11

VDD_T9

VDD_R20

T9

T11

T20

T18

T16

VSS_T18

VSS_T16

H14

H12

H5

VSS_H5

VSS_H12

VDD_T15

VDD_T13

T17

T15

T13

T24

T22

VSS_T24

VSS_T22

VSS_T20

H22

H16

VSS_H22

VSS_H16

VSS_H14

VDD_T21

VDD_T19

VDD_T17

T21

T19

U3

U2

T25

VSS_U2

VSS_T25

H24

H23

VSS_H24

VSS_H23

VDD_U14

VDD_U12

U14

U12

U13

U11

VSS_U3

VSS_U11

J2

H31

H26

VSS_H31

VSS_H26

VDD_U18

VDD_U16

U20

U18

U16

U17

U15

VSS_U17

VSS_U15

VSS_U13

J7

J3

VSS_J7

VSS_J3

VSS_J2

VDD_V5

VDD_V4

VDD_U20

V5

V4

U23

U21

U19

VSS_U21

VSS_U19

J17

J15

J13

VSS_J15

VSS_J13

VDD_V13

VDD_V11

V15

V13

V11

V12

U27

VSS_V12

VSS_U27

VSS_U23

J23

J21

VSS_J23

VSS_J21

VSS_J17

VDD_V19

VDD_V17

VDD_V15

V19

V17

V18

V16

V14

VSS_V16

VSS_V14

K8

J34

J29

VSS_J34

VSS_J29

VDD_W2

VDD_V21

W3

W2

V21

V22

V20

VSS_V22

VSS_V20

VSS_V18

K12

K10

VSS_K8

VSS_K10

VDD_W8

VDD_W3

W8

W10

V26

V24

VSS_V26

VSS_V24

K16

K14

VSS_K16

VSS_K14

VSS_K12

VDD_W14

VDD_W12

VDD_W10

W14

W12

W11

W9

W7

VSS_W9

VSS_W7

K23

K21

K18

VSS_K21

VSS_K18

VDD_W18

VDD_W16

W20

W18

W16

W15

W13

VSS_W15

VSS_W13

VSS_W11

K32

K27

VSS_K32

VSS_K27

VSS_K23

VDD_Y9

VDD_Y7

VDD_W20

Y9

Y7

W21

W19

W17

VSS_W19

VSS_W17

L11

L9

L7

VSS_L9

VSS_L7

VDD_Y13

VDD_Y11

Y15

Y13

Y11

W29

W23

VSS_W29

VSS_W23

VSS_W21

L15

L13

VSS_L15

VSS_L13

VSS_L11

VDD_Y19

VDD_Y17

VDD_Y15

Y19

Y17

Y8

Y5

Y4

VSS_Y5

VSS_Y4

U9

L17

VSS_U9

VSS_L17

VDD_V9

VDD_Y21

V9

Y21

Y12

Y10

VSS_Y8

VSS_Y10

V10

VSS_V10

AMC CPU F1207

HETERO 9 OF 11

VDD_U10

U10

Y18

Y16

Y14

VSS_Y18

VSS_Y16

VSS_Y14

VSS_Y12

Y24

Y22

Y20

VSS_Y22

VSS_Y20

T7

Y27

VSS_T7

VSS_Y27

VSS_Y24

AJ13

F12

VSS_F12

VSS_AJ13

142,143

+VCORE_CPU1

AMC CPU F1207

HETERO 11 OF 11

CPU1_CORE_TYPE

VCORE_CPU1_NB

30,55,142

J_CPU1

NC_CPU1_J18
NC_CPU1_G19

NC_CPU1_H11
NC_CPU1_J11
NC_CPU1_K11 NC_CPU1_AG18

J18
G19
AN1
H11
J11
K11

AA22
AA24
AB23
AC22
AC24
AD23
AE22
AF23
AG24
AH23

L22
M23
N22
N24
P23
R22
R24
T23
U22
U24
V23
W22
W24
Y23

RSVD_J18
RSVD_G19
RSVD_AN1
RSVD_H11
RSVD_J11
RSVD_K11

VDD_AA22
VDD_AA24
VDD_AB23
VDD_AC22
VDD_AC24
VDD_AD23
VDD_AE22
VDD_AF23
VDD_AG24
VDD_AH23
VDD_L22
VDD_M23
VDD_N22
VDD_N24
VDD_P23
VDD_R22
VDD_R24
VDD_T23
VDD_U22
VDD_U24
VDD_V23
VDD_W22
VDD_W24
VDD_Y23

RSVD_H10

RSVD_H9

RSVD_AJ18
RSVD_AH18
RSVD_AG18

AMC CPU F1207

HETERO 7 OF 11

J_CPU1

VSS_L19
VSS_L21
VSS_L23
VSS_L25
VSS_L30
VSS_L35

VSS_M4
VSS_M5

VSS_M8
VSS_M10
VSS_M12
VSS_M14
VSS_M16
VSS_M18
VSS_M20
VSS_M22
VSS_M24
VSS_M28

VSS_N2

VSS_N3

VSS_N7

VSS_N9
VSS_N11
VSS_N13

AMC CPU F1207

HETERO 10 OF 11

H10
H9

AJ18
AH18
AG18

L19
L21
L23
L25
L30
L35
M4
M5
M8
M10
M12
M14
M16
M18
M20
M22
M24
M28
N2
N3
N7
N9
N11
N13

CPU1_NB_COREFB_POS
CPU1_NB_COREFB_NEG

NC_CPU1_AJ18
NC_CPU1_AH18

2

142
142

3

4

+MEM_CPU1

ROOM=CPU1

VDDIO2

VDDIO1

AA35

AA30

VDDIO4

VDDIO3

AC31

AB33

VDDIO6

VDDIO5

AE32

AD34

VDDIO8

VDDIO7

AG33

AF35

+VTT_CPU1

VDDIO10

VDDIO9

AJ34

AH31

VDDIO12

VDDIO11

N31

M33

AL35

VDDIO15

VDDIO14

VDDIO13

R32

P34

VDDIO17

VDDIO16

U33

T35

T30

VDDIO20

VDDIO19

VDDIO18

W34

V31

VDDIO21

Y32

VTT1

A23

VTT2

AN23

AM23

VTT4

VTT3

AP23

VTT5

B23

AR23

VTT7

VTT6

C23

VTT8

D23

VTT9

E23

AL23

VTT10

VLDT_02

VLDT_01

AH3

AH2

AH1

VLDT_04

VLDT_03

AH4

VLDT_12

VLDT_11

E1

D1

C1

VLDT_14

VLDT_13

F1

VLDT_22

VLDT_21

AP2

AN2

AM2

VLDT_24

VLDT_23

AR2

+1.2V_VLDT

CPU1 POWER

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE:
DESC:
REV: OF

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

10/20/2006

DCBA

CPUS,FSB,NB,XDP0,XDP1

SEC

REV.

X01

15 OF 144

MCH

211

4

A B C

D

1

HT_CK_C1L0_C2L0_1_DP

12

HT_CK_C1L0_C2L0_1_DN

12

HT_CK_C1L0_C2L0_0_DP

12

HT_CK_C1L0_C2L0_0_DN

12

HT_CT_C1L0_C2L0_1_DP

12

HT_CT_C1L0_C2L0_1_DN

12

HT_CT_C1L0_C2L0_0_DP

12

HT_CT_C1L0_C2L0_0_DN

12

J_CPU2

M6 AC5

L0_CLKIN_H_1 L0_CLKOUT_H_1

N6

L0_CLKIN_L_1

M3 AC1

L0_CLKIN_H_0 L0_CLKOUT_H_0

M2

L0_CLKIN_L_0

U4

L0_CTLIN_H_1

U5

L0_CTLIN_L_1

T1

L0_CTLIN_H_0

U1

L0_CTLIN_L_0

L0_CLKOUT_L_1

L0_CLKOUT_L_0

L0_CTLOUT_H_1
L0_CTLOUT_L_1
L0_CTLOUT_H_0
L0_CTLOUT_L_0

AC4

AB1

W6
V6
V2
V3

HT_CK_C2L0_C1L0_1_DP
HT_CK_C2L0_C1L0_1_DN
HT_CK_C2L0_C1L0_0_DP
HT_CK_C2L0_C1L0_0_DN

HT_CT_C2L0_C1L0_1_DP
HT_CT_C2L0_C1L0_1_DN
HT_CT_C2L0_C1L0_0_DP
HT_CT_C2L0_C1L0_0_DN

12
12
12
12

12
12
12
12

HT_CK_C1L2_C2L1_1_DP

12

HT_CK_C1L2_C2L1_1_DN

12

HT_CK_C1L2_C2L1_0_DP

12

HT_CK_C1L2_C2L1_0_DN

12

HT_CT_C1L2_C2L1_1_DP

12

HT_CT_C1L2_C2L1_1_DN

12

HT_CT_C1L2_C2L1_0_DP

12

HT_CT_C1L2_C2L1_0_DN

12

E18

L1_CLKIN_H_1

E17

L1_CLKIN_L_1

C18

L1_CLKIN_H_0

B18

L1_CLKIN_L_0

C13

L1_CTLIN_H_1

D13

L1_CTLIN_L_1

A14

L1_CTLIN_H_0

A13

L1_CTLIN_L_0

J_CPU2

L1_CLKOUT_H_1
L1_CLKOUT_L_1
L1_CLKOUT_H_0
L1_CLKOUT_L_0

L1_CTLOUT_H_1
L1_CTLOUT_L_1
L1_CTLOUT_H_0
L1_CTLOUT_L_0

E6
D6
B6
B7

F10
F11
C11
D11

HT_CK_C2L1_C1L2_1_DP
HT_CK_C2L1_C1L2_1_DN
HT_CK_C2L1_C1L2_0_DP
HT_CK_C2L1_C1L2_0_DN

HT_CT_C2L1_C1L2_1_DP
HT_CT_C2L1_C1L2_1_DN
HT_CT_C2L1_C1L2_0_DP
HT_CT_C2L1_C1L2_0_DN

1

12
12
12
12

12
12
12
12

2

3

HT_AD_C1L0_C2L0_15_DP

12

HT_AD_C1L0_C2L0_15_DN

12

HT_AD_C1L0_C2L0_14_DP

12

HT_AD_C1L0_C2L0_14_DN

12

HT_AD_C1L0_C2L0_13_DP

12

HT_AD_C1L0_C2L0_13_DN

12

HT_AD_C1L0_C2L0_12_DP

12

HT_AD_C1L0_C2L0_12_DN

12

HT_AD_C1L0_C2L0_11_DP

12

HT_AD_C1L0_C2L0_11_DN

12

HT_AD_C1L0_C2L0_10_DP

12

HT_AD_C1L0_C2L0_10_DN

12

HT_AD_C1L0_C2L0_9_DP

12

HT_AD_C1L0_C2L0_9_DN

12

HT_AD_C1L0_C2L0_8_DP

12

HT_AD_C1L0_C2L0_8_DN

12

HT_AD_C1L0_C2L0_7_DP

12

HT_AD_C1L0_C2L0_7_DN

12

HT_AD_C1L0_C2L0_6_DP

12

HT_AD_C1L0_C2L0_6_DN

12

HT_AD_C1L0_C2L0_5_DP

12

HT_AD_C1L0_C2L0_5_DN

12

HT_AD_C1L0_C2L0_4_DP

12

HT_AD_C1L0_C2L0_4_DN

12

HT_AD_C1L0_C2L0_3_DP

12

HT_AD_C1L0_C2L0_3_DN

12

HT_AD_C1L0_C2L0_2_DP

12

HT_AD_C1L0_C2L0_2_DN

12

HT_AD_C1L0_C2L0_1_DP

12

HT_AD_C1L0_C2L0_1_DN

12

HT_AD_C1L0_C2L0_0_DP

12

HT_AD_C1L0_C2L0_0_DN

12

T6

L0_CADIN_H_15

U6

L0_CADIN_L_15

R4

L0_CADIN_H_14

R5

L0_CADIN_L_14

P6

L0_CADIN_H_13

R6

L0_CADIN_L_13

N4

L0_CADIN_H_12

N5

L0_CADIN_L_12

L4

L0_CADIN_H_11

L5

L0_CADIN_L_11

K6

L0_CADIN_H_10

L6

L0_CADIN_L_10

J4

L0_CADIN_H_9

J5

L0_CADIN_L_9

H6

L0_CADIN_H_8

J6

L0_CADIN_L_8

T3

L0_CADIN_H_7

P1

L0_CADIN_L_7

T2

L0_CADIN_H_6

R1

L0_CADIN_L_6

P3

L0_CADIN_H_5

P2

L0_CADIN_L_5

M1

L0_CADIN_H_4

N1

L0_CADIN_L_4

K1

L0_CADIN_H_3

L1

L0_CADIN_L_3

K3

L0_CADIN_H_2

K2

L0_CADIN_L_2

H1

L0_CADIN_H_1

J1

L0_CADIN_L_1

H3

L0_CADIN_H_0

H2

L0_CADIN_L_0

L0_CADOUT_H_15
L0_CADOUT_L_15
L0_CADOUT_H_14
L0_CADOUT_L_14
L0_CADOUT_H_13
L0_CADOUT_L_13
L0_CADOUT_H_12
L0_CADOUT_L_12
L0_CADOUT_H_11
L0_CADOUT_L_11
L0_CADOUT_H_10
L0_CADOUT_L_10

L0_CADOUT_H_9
L0_CADOUT_L_9
L0_CADOUT_H_8
L0_CADOUT_L_8

L0_CADOUT_H_7
L0_CADOUT_L_7
L0_CADOUT_H_6
L0_CADOUT_L_6
L0_CADOUT_H_5
L0_CADOUT_L_5
L0_CADOUT_H_4
L0_CADOUT_L_4
L0_CADOUT_H_3
L0_CADOUT_L_3
L0_CADOUT_H_2
L0_CADOUT_L_2
L0_CADOUT_H_1
L0_CADOUT_L_1
L0_CADOUT_H_0
L0_CADOUT_L_0

W5
W4
AA6
Y6
AA5
AA4
AC6
AB6
AE6
AD6
AE5
AE4
AG6
AF6
AG5
AG4

W1
V1
Y2
Y3
AA1
Y1
AB2
AB3
AD2
AD3
AE1
AD1
AF2
AF3
AG1
AF1

HT_AD_C2L0_C1L0_15_DP
HT_AD_C2L0_C1L0_15_DN
HT_AD_C2L0_C1L0_14_DP
HT_AD_C2L0_C1L0_14_DN
HT_AD_C2L0_C1L0_13_DP
HT_AD_C2L0_C1L0_13_DN
HT_AD_C2L0_C1L0_12_DP
HT_AD_C2L0_C1L0_12_DN
HT_AD_C2L0_C1L0_11_DP
HT_AD_C2L0_C1L0_11_DN
HT_AD_C2L0_C1L0_10_DP
HT_AD_C2L0_C1L0_10_DN

HT_AD_C2L0_C1L0_9_DP
HT_AD_C2L0_C1L0_9_DN
HT_AD_C2L0_C1L0_8_DP
HT_AD_C2L0_C1L0_8_DN

HT_AD_C2L0_C1L0_7_DP
HT_AD_C2L0_C1L0_7_DN
HT_AD_C2L0_C1L0_6_DP
HT_AD_C2L0_C1L0_6_DN
HT_AD_C2L0_C1L0_5_DP
HT_AD_C2L0_C1L0_5_DN
HT_AD_C2L0_C1L0_4_DP
HT_AD_C2L0_C1L0_4_DN
HT_AD_C2L0_C1L0_3_DP
HT_AD_C2L0_C1L0_3_DN
HT_AD_C2L0_C1L0_2_DP
HT_AD_C2L0_C1L0_2_DN
HT_AD_C2L0_C1L0_1_DP
HT_AD_C2L0_C1L0_1_DN
HT_AD_C2L0_C1L0_0_DP
HT_AD_C2L0_C1L0_0_DN

12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12

12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12

HT_AD_C1L2_C2L1_15_DP

12

HT_AD_C1L2_C2L1_15_DN

12

HT_AD_C1L2_C2L1_14_DP

12

HT_AD_C1L2_C2L1_14_DN

12

HT_AD_C1L2_C2L1_13_DP

12

HT_AD_C1L2_C2L1_13_DN

12

HT_AD_C1L2_C2L1_12_DP

12

HT_AD_C1L2_C2L1_12_DN

12

HT_AD_C1L2_C2L1_11_DP

12

HT_AD_C1L2_C2L1_11_DN

12

HT_AD_C1L2_C2L1_10_DP

12

HT_AD_C1L2_C2L1_10_DN

12

HT_AD_C1L2_C2L1_9_DP

12

HT_AD_C1L2_C2L1_9_DN

12

HT_AD_C1L2_C2L1_8_DP

12

HT_AD_C1L2_C2L1_8_DN

12

HT_AD_C1L2_C2L1_7_DP

12

HT_AD_C1L2_C2L1_7_DN

12

HT_AD_C1L2_C2L1_6_DP

12

HT_AD_C1L2_C2L1_6_DN

12

HT_AD_C1L2_C2L1_5_DP

12

HT_AD_C1L2_C2L1_5_DN

12

HT_AD_C1L2_C2L1_4_DP

12

HT_AD_C1L2_C2L1_4_DN

12

HT_AD_C1L2_C2L1_3_DP

12

HT_AD_C1L2_C2L1_3_DN

12

HT_AD_C1L2_C2L1_2_DP

12

HT_AD_C1L2_C2L1_2_DN

12

HT_AD_C1L2_C2L1_1_DP

12

HT_AD_C1L2_C2L1_1_DN

12

HT_AD_C1L2_C2L1_0_DP

12

HT_AD_C1L2_C2L1_0_DN

12

E14

L1_CADIN_H_15

E13

L1_CADIN_L_15

C15

L1_CADIN_H_14

D15

L1_CADIN_L_14

E16

L1_CADIN_H_13

E15

L1_CADIN_L_13

C17

L1_CADIN_H_12

D17

L1_CADIN_L_12

C19

L1_CADIN_H_11

D19

L1_CADIN_L_11

E20

L1_CADIN_H_10

E19

L1_CADIN_L_10

C21

L1_CADIN_H_9

D21

L1_CADIN_L_9

E22

L1_CADIN_H_8

E21

L1_CADIN_L_8

C14

L1_CADIN_H_7

B14

L1_CADIN_L_7

A16

L1_CADIN_H_6

A15

L1_CADIN_L_6

C16

L1_CADIN_H_5

B16

L1_CADIN_L_5

A18

L1_CADIN_H_4

A17

L1_CADIN_L_4

A20

L1_CADIN_H_3

A19

L1_CADIN_L_3

C20

L1_CADIN_H_2

B20

L1_CADIN_L_2

A22

L1_CADIN_H_1

A21

L1_CADIN_L_1

C22

L1_CADIN_H_0

B22

L1_CADIN_L_0

L1_CADOUT_H_15
L1_CADOUT_L_15
L1_CADOUT_H_14
L1_CADOUT_L_14
L1_CADOUT_H_13
L1_CADOUT_L_13
L1_CADOUT_H_12
L1_CADOUT_L_12
L1_CADOUT_H_11
L1_CADOUT_L_11
L1_CADOUT_H_10
L1_CADOUT_L_10

L1_CADOUT_H_9
L1_CADOUT_L_9
L1_CADOUT_H_8
L1_CADOUT_L_8

L1_CADOUT_H_7
L1_CADOUT_L_7
L1_CADOUT_H_6
L1_CADOUT_L_6
L1_CADOUT_H_5
L1_CADOUT_L_5
L1_CADOUT_H_4
L1_CADOUT_L_4
L1_CADOUT_H_3
L1_CADOUT_L_3
L1_CADOUT_H_2
L1_CADOUT_L_2
L1_CADOUT_H_1
L1_CADOUT_L_1
L1_CADOUT_H_0
L1_CADOUT_L_0

E10
D10
F8
F9
E8
D8
F6
F7
F4
F5
E4
D4
F2
F3
E2
D2

B10
B11
C9
D9
B8
B9
C7
D7
C5
D5
B4
B5
C3
D3
B2

B3

HT_AD_C2L1_C1L2_15_DP
HT_AD_C2L1_C1L2_15_DN
HT_AD_C2L1_C1L2_14_DP
HT_AD_C2L1_C1L2_14_DN
HT_AD_C2L1_C1L2_13_DP
HT_AD_C2L1_C1L2_13_DN
HT_AD_C2L1_C1L2_12_DP
HT_AD_C2L1_C1L2_12_DN
HT_AD_C2L1_C1L2_11_DP
HT_AD_C2L1_C1L2_11_DN
HT_AD_C2L1_C1L2_10_DP
HT_AD_C2L1_C1L2_10_DN

HT_AD_C2L1_C1L2_9_DP
HT_AD_C2L1_C1L2_9_DN
HT_AD_C2L1_C1L2_8_DP
HT_AD_C2L1_C1L2_8_DN

HT_AD_C2L1_C1L2_7_DP
HT_AD_C2L1_C1L2_7_DN
HT_AD_C2L1_C1L2_6_DP
HT_AD_C2L1_C1L2_6_DN
HT_AD_C2L1_C1L2_5_DP
HT_AD_C2L1_C1L2_5_DN
HT_AD_C2L1_C1L2_4_DP
HT_AD_C2L1_C1L2_4_DN
HT_AD_C2L1_C1L2_3_DP
HT_AD_C2L1_C1L2_3_DN
HT_AD_C2L1_C1L2_2_DP
HT_AD_C2L1_C1L2_2_DN
HT_AD_C2L1_C1L2_1_DP
HT_AD_C2L1_C1L2_1_DN
HT_AD_C2L1_C1L2_0_DP
HT_AD_C2L1_C1L2_0_DN

12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12

12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12

2

3

From CPU1 L0

AMC CPU F1207

HETERO 1 OF 11

To CPU1 L0 From CPU1 L2

CPU2 TO CPU1 HYPER TRANSPORT LINKS

AMC CPU F1207

HETERO 2 OF 11

To CPU1 L2

4

ROOM=CPU2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

10/20/2006

DCBA

4

REV.

X01

16 OF 144

1

2

3

4

A B C

CK_CPU2_MEM_MA0_DP

36

CK_CPU2_MEM_MA0_DN

36

36,38
36,38

36,38

37,38
37,38

37,38

36,38
36,38

36,38

37,38
37,38

37,38

X00_DT10369 SCH name fix

36-38
36-38
36-38
36-38
36,37

36-38
36-38
36-38

37,38
36,38

36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37

CPU2_MEM_MA0_CS_L1
CPU2_MEM_MA0_CS_L0

CPU2_MEM_MA0_ODT0

CK_CPU2_MEM_MA1_DP

37

CK_CPU2_MEM_MA1_DN

37

CPU2_MEM_MA1_CS_L1
CPU2_MEM_MA1_CS_L0

CPU2_MEM_MA1_ODT0

NC_CPU2_Y30
NC_CPU2_Y31

CPU2_MEM_MA2_CS_L1
CPU2_MEM_MA2_CS_L0

CPU2_MEM_MA2_ODT0

NC_CPU2_AA31
NC_CPU2_AA32

CPU2_MEM_MA3_CS_L1
CPU2_MEM_MA3_CS_L0

CPU2_MEM_MA3_ODT0

CPU2_MEM_MA_ERR_R_N

38

CPU2_MEM_MA_PAR
CPU2_MEM_MA_CAS_N
CPU2_MEM_MA_RAS_N
CPU2_MEM_MA_WE_N
CPU2_MEM_MA_RESET_N

CPU2_MEM_MA_BANK2
CPU2_MEM_MA_BANK1
CPU2_MEM_MA_BANK0

CPU2_MEM_MA_CKE1
CPU2_MEM_MA_CKE0

CPU2_MEM_MA_DQS_17_DP
CPU2_MEM_MA_DQS_17_DN
CPU2_MEM_MA_DQS_16_DP
CPU2_MEM_MA_DQS_16_DN
CPU2_MEM_MA_DQS_15_DP
CPU2_MEM_MA_DQS_15_DN
CPU2_MEM_MA_DQS_14_DP
CPU2_MEM_MA_DQS_14_DN
CPU2_MEM_MA_DQS_13_DP
CPU2_MEM_MA_DQS_13_DN
CPU2_MEM_MA_DQS_12_DP
CPU2_MEM_MA_DQS_12_DN
CPU2_MEM_MA_DQS_11_DP
CPU2_MEM_MA_DQS_11_DN
CPU2_MEM_MA_DQS_10_DP
CPU2_MEM_MA_DQS_10_DN
CPU2_MEM_MA_DQS_9_DP
CPU2_MEM_MA_DQS_9_DN
CPU2_MEM_MA_DQS_8_DP
CPU2_MEM_MA_DQS_8_DN
CPU2_MEM_MA_DQS_7_DP
CPU2_MEM_MA_DQS_7_DN
CPU2_MEM_MA_DQS_6_DP
CPU2_MEM_MA_DQS_6_DN
CPU2_MEM_MA_DQS_5_DP
CPU2_MEM_MA_DQS_5_DN
CPU2_MEM_MA_DQS_4_DP
CPU2_MEM_MA_DQS_4_DN
CPU2_MEM_MA_DQS_3_DP
CPU2_MEM_MA_DQS_3_DN
CPU2_MEM_MA_DQS_2_DP
CPU2_MEM_MA_DQS_2_DN
CPU2_MEM_MA_DQS_1_DP
CPU2_MEM_MA_DQS_1_DN
CPU2_MEM_MA_DQS_0_DP
CPU2_MEM_MA_DQS_0_DN

AD31
AD32

AM34
AH33

AJ32

AE31
AF31

AM35
AH34

AK34

Y30
Y31

AC30
AB32

AB31

AA31
AA32

AD30
AB30

AC32

P30
AF32
AJ33
AH32
AJ31

D33

N32
AF33
AG32

M30

M31

T27

T26
AL26
AM26
AL31
AM31
AH29
AG29
AB27
AC27

J31

J32

L29

K29

D31

D32

F27

F26

U25

U26
AK25
AK26
AK30
AK31
AH28
AJ28
AD26
AD27

K33

J33

H29

G29

F31

E31

D27

D26

MA0_CLK_H
MA0_CLK_L

MA0_CS_L_1
MA0_CS_L_0

MA0_ODT_0

MA1_CLK_H
MA1_CLK_L

MA1_CS_L_1
MA1_CS_L_0

MA1_ODT_0

MA2_CLK_H
MA2_CLK_L

MA2_CS_L_1
MA2_CS_L_0

MA2_ODT_0

MA3_CLK_H
MA3_CLK_L

MA3_CS_L_1
MA3_CS_L_0

MA3_ODT_0

MA_ERR_L
MA_PAR
MA_CAS_L
MA_RAS_L
MA_WE_L
MA_RESET_L

MA_BANK_2
MA_BANK_1
MA_BANK_0

MA_CKE_1
MA_CKE_0

MA_DQS_H_17
MA_DQS_L_17
MA_DQS_H_16
MA_DQS_L_16
MA_DQS_H_15
MA_DQS_L_15
MA_DQS_H_14
MA_DQS_L_14
MA_DQS_H_13
MA_DQS_L_13
MA_DQS_H_12
MA_DQS_L_12
MA_DQS_H_11
MA_DQS_L_11
MA_DQS_H_10
MA_DQS_L_10
MA_DQS_H_9
MA_DQS_L_9
MA_DQS_H_8
MA_DQS_L_8
MA_DQS_H_7
MA_DQS_L_7
MA_DQS_H_6
MA_DQS_L_6
MA_DQS_H_5
MA_DQS_L_5
MA_DQS_H_4
MA_DQS_L_4
MA_DQS_H_3
MA_DQS_L_3
MA_DQS_H_2
MA_DQS_L_2
MA_DQS_H_1
MA_DQS_L_1
MA_DQS_H_0
MA_DQS_L_0

J_CPU2

AMC CPU F1207

HETERO 4 OF 11

MA_DATA_63
MA_DATA_62
MA_DATA_61
MA_DATA_60
MA_DATA_59
MA_DATA_58
MA_DATA_57
MA_DATA_56
MA_DATA_55
MA_DATA_54
MA_DATA_53
MA_DATA_52
MA_DATA_51
MA_DATA_50
MA_DATA_49
MA_DATA_48
MA_DATA_47
MA_DATA_46
MA_DATA_45
MA_DATA_44
MA_DATA_43
MA_DATA_42
MA_DATA_41
MA_DATA_40
MA_DATA_39
MA_DATA_38
MA_DATA_37
MA_DATA_36
MA_DATA_35
MA_DATA_34
MA_DATA_33
MA_DATA_32
MA_DATA_31
MA_DATA_30
MA_DATA_29
MA_DATA_28
MA_DATA_27
MA_DATA_26
MA_DATA_25
MA_DATA_24
MA_DATA_23
MA_DATA_22
MA_DATA_21
MA_DATA_20
MA_DATA_19
MA_DATA_18
MA_DATA_17
MA_DATA_16
MA_DATA_15
MA_DATA_14
MA_DATA_13
MA_DATA_12
MA_DATA_11
MA_DATA_10

MA_DATA_9
MA_DATA_8
MA_DATA_7
MA_DATA_6
MA_DATA_5
MA_DATA_4
MA_DATA_3
MA_DATA_2
MA_DATA_1
MA_DATA_0

MA_ADD_0
MA_ADD_1
MA_ADD_2
MA_ADD_3
MA_ADD_4
MA_ADD_5
MA_ADD_6
MA_ADD_7
MA_ADD_8

MA_ADD_9
MA_ADD_10
MA_ADD_11
MA_ADD_12
MA_ADD_13
MA_ADD_14
MA_ADD_15

MA_CHECK_7
MA_CHECK_6
MA_CHECK_5
MA_CHECK_4
MA_CHECK_3
MA_CHECK_2
MA_CHECK_1
MA_CHECK_0

AM24
AM25
AL28
AK28
AK24
AL24
AM27
AL27
AK29
AM30
AL33
AK33
AM29
AL29
AM32
AL32
AF28
AF29
AG30
AE30
AE28
AE29
AH30
AJ30
AB25
AB26
AC29
AB29
AC25
AD25
AD28
AC28
L31
K31
G32
G31
L32
L33
H33
H32
H30
G30
K28
L28
K30
J30
H28
J28
E33
D35
F29
E29
F33
F32
E30
D30
F28
E26
B24
C24
E28
D28
E25
D25

AE33
V33
Y33
U31
U32
U30
T32
R31
T31
P32
AG31
R30
P31
AL34
N30
M32

V29
V27
R29
R28
V25
V28
R25
R26

CPU2_MEM_MA_DATA63
CPU2_MEM_MA_DATA62
CPU2_MEM_MA_DATA61
CPU2_MEM_MA_DATA60
CPU2_MEM_MA_DATA59
CPU2_MEM_MA_DATA58
CPU2_MEM_MA_DATA57
CPU2_MEM_MA_DATA56
CPU2_MEM_MA_DATA55
CPU2_MEM_MA_DATA54
CPU2_MEM_MA_DATA53
CPU2_MEM_MA_DATA52
CPU2_MEM_MA_DATA51
CPU2_MEM_MA_DATA50
CPU2_MEM_MA_DATA49
CPU2_MEM_MA_DATA48
CPU2_MEM_MA_DATA47
CPU2_MEM_MA_DATA46
CPU2_MEM_MA_DATA45
CPU2_MEM_MA_DATA44
CPU2_MEM_MA_DATA43
CPU2_MEM_MA_DATA42
CPU2_MEM_MA_DATA41
CPU2_MEM_MA_DATA40
CPU2_MEM_MA_DATA39
CPU2_MEM_MA_DATA38
CPU2_MEM_MA_DATA37
CPU2_MEM_MA_DATA36
CPU2_MEM_MA_DATA35
CPU2_MEM_MA_DATA34
CPU2_MEM_MA_DATA33
CPU2_MEM_MA_DATA32
CPU2_MEM_MA_DATA31
CPU2_MEM_MA_DATA30
CPU2_MEM_MA_DATA29
CPU2_MEM_MA_DATA28
CPU2_MEM_MA_DATA27
CPU2_MEM_MA_DATA26
CPU2_MEM_MA_DATA25
CPU2_MEM_MA_DATA24
CPU2_MEM_MA_DATA23
CPU2_MEM_MA_DATA22
CPU2_MEM_MA_DATA21
CPU2_MEM_MA_DATA20
CPU2_MEM_MA_DATA19
CPU2_MEM_MA_DATA18
CPU2_MEM_MA_DATA17
CPU2_MEM_MA_DATA16
CPU2_MEM_MA_DATA15
CPU2_MEM_MA_DATA14
CPU2_MEM_MA_DATA13
CPU2_MEM_MA_DATA12
CPU2_MEM_MA_DATA11
CPU2_MEM_MA_DATA10
CPU2_MEM_MA_DATA9
CPU2_MEM_MA_DATA8
CPU2_MEM_MA_DATA7
CPU2_MEM_MA_DATA6
CPU2_MEM_MA_DATA5
CPU2_MEM_MA_DATA4
CPU2_MEM_MA_DATA3
CPU2_MEM_MA_DATA2
CPU2_MEM_MA_DATA1
CPU2_MEM_MA_DATA0

CPU2_MEM_MA_ADD0
CPU2_MEM_MA_ADD1
CPU2_MEM_MA_ADD2
CPU2_MEM_MA_ADD3
CPU2_MEM_MA_ADD4
CPU2_MEM_MA_ADD5
CPU2_MEM_MA_ADD6
CPU2_MEM_MA_ADD7
CPU2_MEM_MA_ADD8
CPU2_MEM_MA_ADD9
CPU2_MEM_MA_ADD10
CPU2_MEM_MA_ADD11
CPU2_MEM_MA_ADD12
CPU2_MEM_MA_ADD13
CPU2_MEM_MA_ADD14
CPU2_MEM_MA_ADD15

CPU2_MEM_MA_CHECK7
CPU2_MEM_MA_CHECK6
CPU2_MEM_MA_CHECK5
CPU2_MEM_MA_CHECK4
CPU2_MEM_MA_CHECK3
CPU2_MEM_MA_CHECK2
CPU2_MEM_MA_CHECK1
CPU2_MEM_MA_CHECK0

36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37

36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38

36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37

NC_CPU2_AK7
NC_CPU2_AK8
NC_CPU2_AM7
NC_CPU2_AN7

NC_CPU2_AM12
NC_CPU2_AL12
NC_CPU2_AP11
NC_CPU2_AP12

NC_CPU2_AK11
NC_CPU2_AK12
NC_CPU2_AM10
NC_CPU2_AL10
NC_CPU2_AK9
NC_CPU2_AK10
NC_CPU2_AM8
NC_CPU2_AL8
NC_CPU2_AM6
NC_CPU2_AL6
NC_CPU2_AK5
NC_CPU2_AK6
NC_CPU2_AM4
NC_CPU2_AL4
NC_CPU2_AK3
NC_CPU2_AK4

NC_CPU2_AM11
NC_CPU2_AN11
NC_CPU2_AP9
NC_CPU2_AP10
NC_CPU2_AM9
NC_CPU2_AN9
NC_CPU2_AP7
NC_CPU2_AP8
NC_CPU2_AP5
NC_CPU2_AP6
NC_CPU2_AM5
NC_CPU2_AN5
NC_CPU2_AP3
NC_CPU2_AP4
NC_CPU2_AM3
NC_CPU2_AN3

AK7
AK8
AM7
AN7

AM12
AL12
AP11
AP12

AK11
AK12
AM10
AL10

AK9

AK10

AM8
AL8
AM6
AL6
AK5
AK6
AM4
AL4
AK3
AK4

AM11
AN11

AP9

AP10

AM9
AN9
AP7
AP8
AP5
AP6
AM5
AN5
AP3
AP4
AM3
AN3

L2_CLKIN_H_1
L2_CLKIN_L_1
L2_CLKIN_H_0
L2_CLKIN_L_0

L2_CTLIN_H_1
L2_CTLIN_L_1
L2_CTLIN_H_0
L2_CTLIN_L_0

L2_CADIN_H_15
L2_CADIN_L_15
L2_CADIN_H_14
L2_CADIN_L_14
L2_CADIN_H_13
L2_CADIN_L_13
L2_CADIN_H_12
L2_CADIN_L_12
L2_CADIN_H_11
L2_CADIN_L_11
L2_CADIN_H_10
L2_CADIN_L_10
L2_CADIN_H_9
L2_CADIN_L_9
L2_CADIN_H_8
L2_CADIN_L_8

L2_CADIN_H_7
L2_CADIN_L_7
L2_CADIN_H_6
L2_CADIN_L_6
L2_CADIN_H_5
L2_CADIN_L_5
L2_CADIN_H_4
L2_CADIN_L_4
L2_CADIN_H_3
L2_CADIN_L_3
L2_CADIN_H_2
L2_CADIN_L_2
L2_CADIN_H_1
L2_CADIN_L_1
L2_CADIN_H_0
L2_CADIN_L_0

AMC CPU F1207

HETERO 3 OF 11

CPU 2 NC HYPERTRANSPORT LINK

J_CPU2

L2_CLKOUT_H_1
L2_CLKOUT_L_1
L2_CLKOUT_H_0
L2_CLKOUT_L_0

L2_CTLOUT_H_1
L2_CTLOUT_L_1
L2_CTLOUT_H_0
L2_CTLOUT_L_0

L2_CADOUT_H_15
L2_CADOUT_L_15
L2_CADOUT_H_14
L2_CADOUT_L_14
L2_CADOUT_H_13
L2_CADOUT_L_13
L2_CADOUT_H_12
L2_CADOUT_L_12
L2_CADOUT_H_11
L2_CADOUT_L_11
L2_CADOUT_H_10
L2_CADOUT_L_10

L2_CADOUT_H_9
L2_CADOUT_L_9
L2_CADOUT_H_8
L2_CADOUT_L_8

L2_CADOUT_H_7
L2_CADOUT_L_7
L2_CADOUT_H_6
L2_CADOUT_L_6
L2_CADOUT_H_5
L2_CADOUT_L_5
L2_CADOUT_H_4
L2_CADOUT_L_4
L2_CADOUT_H_3
L2_CADOUT_L_3
L2_CADOUT_H_2
L2_CADOUT_L_2
L2_CADOUT_H_1
L2_CADOUT_L_1
L2_CADOUT_H_0
L2_CADOUT_L_0

AM18
AN18
AR18
AR17

AL14
AL13
AP13
AN13

AM14
AN14
AL16
AL15
AM16
AN16
AL18
AL17
AL20
AL19
AM20
AN20
AL22
AL21
AM22
AN22

AR14
AR13
AP15
AN15
AR16
AR15
AP17
AN17
AP19
AN19
AR20
AR19
AP21
AN21
AR22
AR21

TITLE

D

NC_CPU2_AM18
NC_CPU2_AN18
NC_CPU2_AR18
NC_CPU2_AR17

NC_CPU2_AL14
NC_CPU2_AL13
NC_CPU2_AP13
NC_CPU2_AN13

NC_CPU2_AM14
NC_CPU2_AN14
NC_CPU2_AL16
NC_CPU2_AL15
NC_CPU2_AM16
NC_CPU2_AN16
NC_CPU2_AL18
NC_CPU2_AL17
NC_CPU2_AL20
NC_CPU2_AL19
NC_CPU2_AM20
NC_CPU2_AN20
NC_CPU2_AL22
NC_CPU2_AL21
NC_CPU2_AM22
NC_CPU2_AN22

NC_CPU2_AR14
NC_CPU2_AR13
NC_CPU2_AP15
NC_CPU2_AN15
NC_CPU2_AR16
NC_CPU2_AR15
NC_CPU2_AP17
NC_CPU2_AN17
NC_CPU2_AP19
NC_CPU2_AN19
NC_CPU2_AR20
NC_CPU2_AR19
NC_CPU2_AP21
NC_CPU2_AN21
NC_CPU2_AR22
NC_CPU2_AR21

INC.

1

2

3

4

ROUND ROCK,TEXAS

CPU 2 - CHANNEL A MEMORY

ROOM=CPU2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

PROCESSOR 2

DWG NO.

DATE

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

10/20/2006

DCBA

REV.

X01

17 OF 144

36,38
36,38

36,38

1

37,38
37,38

37,38

36,38
36,38

36,38

37,38
37,38

37,38

X00_DT10369 SCH name fix

36-38
36-38

2

3

36-38
36-38
36,37

36-38
36-38
36-38

37,38
36,38

36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37

4

CK_CPU2_MEM_MB0_DP

36

CK_CPU2_MEM_MB0_DN

36

CPU2_MEM_MB0_CS_L1
CPU2_MEM_MB0_CS_L0

CPU2_MEM_MB0_ODT0

CK_CPU2_MEM_MB1_DP

37

CK_CPU2_MEM_MB1_DN

37

CPU2_MEM_MB1_CS_L1
CPU2_MEM_MB1_CS_L0

CPU2_MEM_MB1_ODT0

NC_CPU2_U29
NC_CPU2_U28

CPU2_MEM_MB2_CS_L1
CPU2_MEM_MB2_CS_L0

CPU2_MEM_MB2_ODT0

NC_CPU2_T29
NC_CPU2_T28

CPU2_MEM_MB3_CS_L1
CPU2_MEM_MB3_CS_L0

CPU2_MEM_MB3_ODT0

CPU2_MEM_MB_ERR_R_N

38

CPU2_MEM_MB_PAR
CPU2_MEM_MB_CAS_N
CPU2_MEM_MB_RAS_N
CPU2_MEM_MB_WE_N
CPU2_MEM_MB_RESET_N

CPU2_MEM_MB_BANK2
CPU2_MEM_MB_BANK1
CPU2_MEM_MB_BANK0

CPU2_MEM_MB_CKE1
CPU2_MEM_MB_CKE0

CPU2_MEM_MB_DQS_17_DP
CPU2_MEM_MB_DQS_17_DN
CPU2_MEM_MB_DQS_16_DP
CPU2_MEM_MB_DQS_16_DN
CPU2_MEM_MB_DQS_15_DP
CPU2_MEM_MB_DQS_15_DN
CPU2_MEM_MB_DQS_14_DP
CPU2_MEM_MB_DQS_14_DN
CPU2_MEM_MB_DQS_13_DP
CPU2_MEM_MB_DQS_13_DN
CPU2_MEM_MB_DQS_12_DP
CPU2_MEM_MB_DQS_12_DN
CPU2_MEM_MB_DQS_11_DP
CPU2_MEM_MB_DQS_11_DN
CPU2_MEM_MB_DQS_10_DP
CPU2_MEM_MB_DQS_10_DN
CPU2_MEM_MB_DQS_9_DP
CPU2_MEM_MB_DQS_9_DN
CPU2_MEM_MB_DQS_8_DP
CPU2_MEM_MB_DQS_8_DN
CPU2_MEM_MB_DQS_7_DP
CPU2_MEM_MB_DQS_7_DN
CPU2_MEM_MB_DQS_6_DP
CPU2_MEM_MB_DQS_6_DN
CPU2_MEM_MB_DQS_5_DP
CPU2_MEM_MB_DQS_5_DN
CPU2_MEM_MB_DQS_4_DP
CPU2_MEM_MB_DQS_4_DN
CPU2_MEM_MB_DQS_3_DP
CPU2_MEM_MB_DQS_3_DN
CPU2_MEM_MB_DQS_2_DP
CPU2_MEM_MB_DQS_2_DN
CPU2_MEM_MB_DQS_1_DP
CPU2_MEM_MB_DQS_1_DN
CPU2_MEM_MB_DQS_0_DP
CPU2_MEM_MB_DQS_0_DN

A B C

J_CPU2
Y35
Y34

AJ35
AE35

AG34

AA34
AA33

AK35
AD35

AG35

U29
U28

W31
V32

W32

T29
T28

W30
V30

W33

P33

AB34
AF34
AD33
AE34

A33

N33

AC34
AC33

M34
M35

M29
N29

AN28
AN27
AN33
AN32
AG27
AH27
AA29
AA28

G34
G35
K26
J26
A31
A32
A26
A27
N27
N28

AP26
AP27
AP31
AP32
AJ26
AJ27

W26
W27
H35
H34
H27
G27
C32
B32
B27
C27

MB0_CLK_H
MB0_CLK_L

MB0_CS_L_1
MB0_CS_L_0

MB0_ODT_0

MB1_CLK_H
MB1_CLK_L

MB1_CS_L_1
MB1_CS_L_0

MB1_ODT_0

MB2_CLK_H
MB2_CLK_L

MB2_CS_L_1
MB2_CS_L_0

MB2_ODT_0

MB3_CLK_H
MB3_CLK_L

MB3_CS_L_1
MB3_CS_L_0

MB3_ODT_0

MB_ERR_L
MB_PAR
MB_CAS_L
MB_RAS_L
MB_WE_L
MB_RESET_L

MB_BANK_2
MB_BANK_1
MB_BANK_0

MB_CKE_1
MB_CKE_0

MB_DQS_H_17
MB_DQS_L_17
MB_DQS_H_16
MB_DQS_L_16
MB_DQS_H_15
MB_DQS_L_15
MB_DQS_H_14
MB_DQS_L_14
MB_DQS_H_13
MB_DQS_L_13
MB_DQS_H_12
MB_DQS_L_12
MB_DQS_H_11
MB_DQS_L_11
MB_DQS_H_10
MB_DQS_L_10
MB_DQS_H_9
MB_DQS_L_9
MB_DQS_H_8
MB_DQS_L_8
MB_DQS_H_7
MB_DQS_L_7
MB_DQS_H_6
MB_DQS_L_6
MB_DQS_H_5
MB_DQS_L_5
MB_DQS_H_4
MB_DQS_L_4
MB_DQS_H_3
MB_DQS_L_3
MB_DQS_H_2
MB_DQS_L_2
MB_DQS_H_1
MB_DQS_L_1
MB_DQS_H_0
MB_DQS_L_0

MB_DATA_63
MB_DATA_62
MB_DATA_61
MB_DATA_60
MB_DATA_59
MB_DATA_58
MB_DATA_57
MB_DATA_56
MB_DATA_55
MB_DATA_54
MB_DATA_53
MB_DATA_52
MB_DATA_51
MB_DATA_50
MB_DATA_49
MB_DATA_48
MB_DATA_47
MB_DATA_46
MB_DATA_45
MB_DATA_44
MB_DATA_43
MB_DATA_42
MB_DATA_41
MB_DATA_40
MB_DATA_39
MB_DATA_38
MB_DATA_37
MB_DATA_36
MB_DATA_35
MB_DATA_34
MB_DATA_33
MB_DATA_32
MB_DATA_31
MB_DATA_30
MB_DATA_29
MB_DATA_28
MB_DATA_27
MB_DATA_26
MB_DATA_25
MB_DATA_24
MB_DATA_23
MB_DATA_22
MB_DATA_21
MB_DATA_20
MB_DATA_19
MB_DATA_18
MB_DATA_17
MB_DATA_16
MB_DATA_15
MB_DATA_14
MB_DATA_13
MB_DATA_12
MB_DATA_11
MB_DATA_10

MB_DATA_9
MB_DATA_8
MB_DATA_7
MB_DATA_6
MB_DATA_5
MB_DATA_4
MB_DATA_3
MB_DATA_2
MB_DATA_1
MB_DATA_0

MB_ADD_0
MB_ADD_1
MB_ADD_2
MB_ADD_3
MB_ADD_4
MB_ADD_5
MB_ADD_6
MB_ADD_7
MB_ADD_8

MB_ADD_9
MB_ADD_10
MB_ADD_11
MB_ADD_12
MB_ADD_13
MB_ADD_14
MB_ADD_15

MB_CHECK_7
MB_CHECK_6
MB_CHECK_5
MB_CHECK_4
MB_CHECK_3
MB_CHECK_2
MB_CHECK_1
MB_CHECK_0

AMC CPU F1207

HETERO 5 OF 11

AN25
AR26
AN29
AR29
AP25
AR25
AR28
AP28
AN30
AR31
AR34
AN34
AR30
AP30
AR33
AP33
AG25
AE25
AF26
AE26
AF24
AE24
AG26
AF27
Y26
AA27
W28
W25
Y25
AA26
Y28
Y29
K35
J35
E35
C35
L34
K34
F34
E34
L24
J27
K25
K24
L27
L26
G26
J25
B34
A34
C30
C29
C34
C33
B31
B30
C28
A28
B25
A24
A29
B29
B26
C25

AB35
V34
W35
V35
U34
U35
T33
R33
T34
R35
AC35
R34
P35
AH35
N35
N34

P27
P28
N25
M25
P25
P26
M26
M27

CPU2_MEM_MB_DATA63
CPU2_MEM_MB_DATA62
CPU2_MEM_MB_DATA61
CPU2_MEM_MB_DATA60
CPU2_MEM_MB_DATA59
CPU2_MEM_MB_DATA58
CPU2_MEM_MB_DATA57
CPU2_MEM_MB_DATA56
CPU2_MEM_MB_DATA55
CPU2_MEM_MB_DATA54
CPU2_MEM_MB_DATA53
CPU2_MEM_MB_DATA52
CPU2_MEM_MB_DATA51
CPU2_MEM_MB_DATA50
CPU2_MEM_MB_DATA49
CPU2_MEM_MB_DATA48
CPU2_MEM_MB_DATA47
CPU2_MEM_MB_DATA46
CPU2_MEM_MB_DATA45
CPU2_MEM_MB_DATA44
CPU2_MEM_MB_DATA43
CPU2_MEM_MB_DATA42
CPU2_MEM_MB_DATA41
CPU2_MEM_MB_DATA40
CPU2_MEM_MB_DATA39
CPU2_MEM_MB_DATA38
CPU2_MEM_MB_DATA37
CPU2_MEM_MB_DATA36
CPU2_MEM_MB_DATA35
CPU2_MEM_MB_DATA34
CPU2_MEM_MB_DATA33
CPU2_MEM_MB_DATA32
CPU2_MEM_MB_DATA31
CPU2_MEM_MB_DATA30
CPU2_MEM_MB_DATA29
CPU2_MEM_MB_DATA28
CPU2_MEM_MB_DATA27
CPU2_MEM_MB_DATA26
CPU2_MEM_MB_DATA25
CPU2_MEM_MB_DATA24
CPU2_MEM_MB_DATA23
CPU2_MEM_MB_DATA22
CPU2_MEM_MB_DATA21
CPU2_MEM_MB_DATA20
CPU2_MEM_MB_DATA19
CPU2_MEM_MB_DATA18
CPU2_MEM_MB_DATA17
CPU2_MEM_MB_DATA16
CPU2_MEM_MB_DATA15
CPU2_MEM_MB_DATA14
CPU2_MEM_MB_DATA13
CPU2_MEM_MB_DATA12
CPU2_MEM_MB_DATA11
CPU2_MEM_MB_DATA10
CPU2_MEM_MB_DATA9
CPU2_MEM_MB_DATA8
CPU2_MEM_MB_DATA7
CPU2_MEM_MB_DATA6
CPU2_MEM_MB_DATA5
CPU2_MEM_MB_DATA4
CPU2_MEM_MB_DATA3
CPU2_MEM_MB_DATA2
CPU2_MEM_MB_DATA1
CPU2_MEM_MB_DATA0

CPU2_MEM_MB_ADD0
CPU2_MEM_MB_ADD1
CPU2_MEM_MB_ADD2
CPU2_MEM_MB_ADD3
CPU2_MEM_MB_ADD4
CPU2_MEM_MB_ADD5
CPU2_MEM_MB_ADD6
CPU2_MEM_MB_ADD7
CPU2_MEM_MB_ADD8
CPU2_MEM_MB_ADD9
CPU2_MEM_MB_ADD10
CPU2_MEM_MB_ADD11
CPU2_MEM_MB_ADD12
CPU2_MEM_MB_ADD13
CPU2_MEM_MB_ADD14
CPU2_MEM_MB_ADD15

CPU2_MEM_MB_CHECK7
CPU2_MEM_MB_CHECK6
CPU2_MEM_MB_CHECK5
CPU2_MEM_MB_CHECK4
CPU2_MEM_MB_CHECK3
CPU2_MEM_MB_CHECK2
CPU2_MEM_MB_CHECK1
CPU2_MEM_MB_CHECK0

36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37

36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38

36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37

CK_200M_CPU2_C_DP

45

45

+MEM_CPU2

CK_200M_CPU2_C_DN

117
117

R9189

1 2

+MEM_CPU2

NP

R9190

X

300-5%

1 2

NP

R9191

X

R9436

R9440

R9441

R9442

CPU1_TDO

137

1 2

X
X

X

14,20

CPU2_COREFB_POS
CPU2_COREFB_NEG

300-5%

R9439

1 2

300-5%

R9438

1 2

300-5%

R9437

1 2

300-5%

1 2

300-5%

NP

1 2

300-5%

NP

1 2

300-5%

NP

1 2

300-5%

C9385

21

3900pF

50V-10%

C9386

21

3900pF

50V-10%

1 2

CPU2_DDRVTT_SENSE

18,55

18
18

18
18

+MEM_CPU2

NP

R9192

X

300-5%

1 2

CPU2_THERMTRIP_N

CPU2_PROCHOT_N

MOD_CPU2_SIC

MOD_CPU2_SID

SYSTEM_PWRGOOD_CPU2

RST_CPU2_N

CPU2_LDTSTOP_N

NP

R9193

X

300-5%

1 2

X00_DT9809 SCH depop'd R

CK_200M_CPU2_DP

R9110

18,96

R9930

0-5%

R9223

1 2

510-5%

MOD_CPU2_SCANEN
MOD_CPU2_SCANCK2
MOD_CPU2_SCANCK1
MOD_CPU2_SCANSHIFTENA
MOD_CPU2_SCANSHIFTENB

300-5%

169-1%

1 2

SYSTEM_PWRGOOD_CPU2

18,96
18,96

20,66,138

18
18

20
20
20

20

R9114

1 2

0-5%

CPU2_M_ZN
CPU2_M_ZP

CPU2_PLLTEST_1
CPU2_PLLTEST_0

NC_MOD_CPU2_TEST_2
NC_MOD_CPU2_TEST_3

R9187

1 2

300-5%

NC_MOD_CPU2_TEST_6

CK_200M_CPU2_DN

RST_CPU2_N
CPU2_LDTSTOP_N

CPU2_PRES_N

MOD_CPU2_SIC
MOD_CPU2_SID

CPU2_TDI

CPU2_TRST_N
CPU2_TCK
CPU2_TMS

CPU2_DBREQ_N

R9115

1 2

0-5%

V_MEM_CPU2_VREF

R9222

1 2

510-5%

NP

1 2

300-5%

18,138

18,138

18

18

18,96

18,96

NP

R9188

1 2

+VDDA_CPU2

R9186

300-5%

X

18,96

X

1 2

R9435

300-5%

R9434

1 2

300-5%

G2

VDDA1

G3

VDDA2

G4

VDDA3

K22

CLKIN_H

J22

CLKIN_L

F21

PWROK

F19

RESET_L

H25

LDTSTOP_L

AP1

CPU_PRESENT_L

AG19
AF19

AJ22
AG22
AF22
AJ21

AF17

AJ25
AH25

AF20

AJ20
AH20
AG20
AG21
AF21
AH21
AF18

SIC
SID

TDI
TRST_L
TCK
TMS

F24

DBREQ_L

J9

VDD_FB_H

J10

VDD_FB_L

VTT_SENSE

F18

M_VREF
M_ZN
M_ZP

TEST23

F23

TEST18

F20

TEST19

AG8

TEST2

AG9

TEST3

G21

TEST25_H

H21

TEST25_L

TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST26

U8

TEST9

AH9

TEST6

CPU2_PLLTEST_1

CPU2_PLLTEST_0

+MEM_CPU2

J_CPU2

THERMTRIP_L

VDDIO_FB_H
VDDIO_FB_L

AMC CPU F1207

HETERO 6 OF 11

CPU2 MISC

R9217

1 2

39.2-1%

R9218

1 2

39.2-1%

C9768

1 2

1000pF

50V-10%

CPU2_M_ZN

CPU2_M_ZP

C9769

1 2

1000pF

VID_5
VID_4
VID_3
VID_2
VID_1
VID_0

PROCHOT_L

TDO

DBRDY

HTREF1
HTREF0

THERMDA
THERMDC

TEST13

TEST28_H
TEST28_L

TEST17
TEST16
TEST15
TEST14

TEST7

TEST10

TEST8

TEST29_H
TEST29_L

18

18

50V-10%

E24
G18
J19
H19
K19
H18

AH19
AJ19

AH22

J24

AG17
AH17

V7
U7

AF8
AF9

AH8

L8
M9

J20
G20
K20
H20

J8
V8

H8

G23
G24

CPU2_VID5
CPU2_VID4
CPU2_VID3
CPU2_VID2
CPU2_VID1
CPU2_VID0

CPU2_THERMTRIP_N

CPU2_PROCHOT_N

CPU2_TDO

CPU2_DBRDY

V_MEM_CPU2_SENSE_POS
V_MEM_CPU2_SENSE_NEG

MOD_CPU2_L0_REF_1
MOD_CPU2_L0_REF_0

MOD_CPU2_THERMDA
MOD_CPU2_THERMDC

NC_CPU2_TEST_28_DP
NC_CPU2_TEST_28_DN

TP_MOD_CPU2_TEST_17
TP_MOD_CPU2_TEST_16
TP_MOD_CPU2_TEST_15
TP_MOD_CPU2_TEST_14

NC_MOD_CPU2_TEST_7
NC_MOD_CPU2_TEST_10

NC_MOD_CPU2_TEST_8

R9155

1 2

80.6-1%

+MEM_CPU2

R9432

R9806

R9433

18

18

TITLE

15-1%15-1%

1 2

0-5%

1 2

1 2

10K-5%

1 2

R9813

D

117,143
117,143
117,143
117,143
117,143
117,143

18,138
18,138

20

20

112
112

89
89

R9235

1 2

44.2-1%

C9354

1 2

C9355

1000pF

50V-10%

+1.2V_VLDT

R9236

1 2

44.2-1%

1 2

1000pF

50V-10%

1

2

3

V_MEM_CPU2_VREF

21

C9540

1 2

V_MEM_CPU2_VREF_FEEDBACK

1000pF

50V-10%

C9538

55

This value calculated to be negative 14ohm.

Hence just keeping a place holder with 10kohm

This value calculated to be negative 16ohm. left as is

18,55

.1uF

16V-10%

4

INC.

ROUND ROCK,TEXAS

CPU 2 - CHANNEL B MEMORY

ROOM=CPU2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

X00_DT9808 SCH added caps

DWG NO.

DATE

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

10/20/2006

DCBA

REV.

X01

18 OF 144

1

A5

VSS_A5

J_CPU2

A B C

AJ24

AJ23

AJ17

AJ15

AJ11

AJ9

AJ7

AJ5

AJ3

AJ1

AH26

AH24

AH16

AH14

AH12

AH10

AH6

AG28

AG23

AG15

AG13

AG11

AG7

AF30

AF25

AF16

AF14

AF12

AF10

AE27

AE23

AE21

AE19

AE17

AE15

AE13

AE11

AE9

AE7

AE3

AE2

AD29

AD24

AD22

AD20

AD18

AD16

AD14

AD12

AD10

AD8

AD5

AD4

AC26

AC23

AC21

AC19

AC17

AC15

AC13

AC11

AC9

AC7

AB28

AB24

AB22

AB20

AB18

AB16

AB14

AB12

AB10

AB8

AA25

AA23

AA21

AA19

AA17

AA15

AA13

AA11

AA9

AA7

AA3

AA2

A30

A25

A9

VSS_A9

VSS_A25

VSS_AA3

VSS_AA2

VSS_A30

VSS_AA9

VSS_AA7

VSS_AA11

VSS_AA17

VSS_AA15

VSS_AA13

VSS_AA23

VSS_AA21

VSS_AA19

VSS_AB8

VSS_AB10

VSS_AA25

VSS_AB16

VSS_AB14

VSS_AB12

VSS_AB22

VSS_AB20

VSS_AB18

VSS_AC7

VSS_AB28

VSS_AB24

VSS_AC9

VSS_AC13

VSS_AC11

VSS_AC19

VSS_AC17

VSS_AC15

VSS_AC26

VSS_AC23

VSS_AC21

VSS_AD8

VSS_AD5

VSS_AD4

VSS_AD14

VSS_AD12

VSS_AD10

VSS_AD20

VSS_AD18

VSS_AD16

VSS_AD29

VSS_AD24

VSS_AD22

VSS_AE7

VSS_AE3

VSS_AE2

VSS_AE9

VSS_AE13

VSS_AE11

VSS_AE19

VSS_AE17

VSS_AE15

VSS_AE27

VSS_AE23

VSS_AE21

VSS_AF14

VSS_AF12

VSS_AF10

VSS_AF30

VSS_AF25

VSS_AF16

VSS_AG7

VSS_AG13

VSS_AG11

VSS_AG28

VSS_AG23

VSS_AG15

VSS_AH6

VSS_AH12

VSS_AH10

VSS_AH24

VSS_AH16

VSS_AH14

VSS_AJ3

VSS_AJ1

VSS_AH26

VSS_AJ9

VSS_AJ7

VSS_AJ5

VSS_AJ17

VSS_AJ15

VSS_AJ11

VSS_AJ23

AK14

AK2

AJ29

VSS_AK2

VSS_AJ29

VSS_AJ24

AK20

AK18

AK16

VSS_AK18

VSS_AK16

VSS_AK14

AK27

AK23

AK22

VSS_AK23

VSS_AK22

VSS_AK20

AL3

AL1

AK32

VSS_AL1

VSS_AK32

VSS_AK27

AL11

AL7

VSS_AL7

VSS_AL3

VSS_AL11

AM15

AL30

AL25

VSS_AM15

VSS_AL30

VSS_AL25

AM33

AM28

AM19

VSS_AM33

VSS_AM28

VSS_AM19

AN10

AN6

VSS_AN6

VSS_AN10

AN31

AN26

AN24

VSS_AN31

VSS_AN26

VSS_AN24

AP18

AP14

AN35

VSS_AP18

VSS_AP14

VSS_AN35

AP29

AP24

AP22

VSS_AP29

VSS_AP24

VSS_AP22

AMC CPU F1207

HETERO 8 OF 11

CPU socket screws

D

ADD=ADD*_RP956

ADD1=ADD*_RP956

ADD2=ADD*_RP956
ADD3=ADD*_RP956

1

CPU socket washers

ADD4=ADD*_GR683
ADD5=ADD*_GR683

ADD6=ADD*_GR683

ADD7=ADD*_GR683

2

VDD_AA8

VDD_A10

VDD_A6

A6

AA8

A10

AR5

AP35

AP34

VSS_AR5

VSS_AP35

VSS_AP34

VDD_AA14

VDD_AA12

VDD_AA10

AA14

AA12

AA10

AR27

AR24

AR9

VSS_AR9

VSS_AR27

VSS_AR24

VDD_AA20

VDD_AA18

VDD_AA16

AA20

AA18

AA16

B13

B12

AR32

VSS_B13

VSS_B12

VSS_AR32

VDD_AB5

VDD_AB4

AB7

AB5

AB4

B28

B21

B17

VSS_B21

VSS_B17

VDD_AB11

VDD_AB9

VDD_AB7

AB9

AB11

B35

B33

VSS_B35

VSS_B33

VSS_B28

VDD_AB17

VDD_AB15

VDD_AB13

AB17

AB15

AB13

C26

C8

C4

VSS_C8

VSS_C4

VSS_C26

VDD_AC2

VDD_AB21

VDD_AB19

AC2

AB21

AB19

D14

D12

C31

VSS_D14

VSS_D12

VSS_C31

VDD_AC8

VDD_AC3

AC8

AC3

AC10

D24

D22

D18

VSS_D22

VSS_D18

VDD_AC14

VDD_AC12

VDD_AC10

AC16

AC14

AC12

E5

D34

D29

VSS_D34

VSS_D29

VSS_D24

VDD_AC20

VDD_AC18

VDD_AC16

AD7

AC20

AC18

E32

E27

E9

VSS_E9

VSS_E5

VSS_E27

VDD_AD11

VDD_AD9

VDD_AD7

AD9

AD11

F16

F14

VSS_F16

VSS_F14

VSS_E32

VDD_AD17

VDD_AD15

VDD_AD13

AD17

AD15

AD13

F30

F25

F22

VSS_F30

VSS_F25

VSS_F22

VDD_AE8

VDD_AD21

VDD_AD19

AE8

AD21

AD19

G7

G5

F35

VSS_G7

VSS_G5

VSS_F35

VDD_AE14

VDD_AE12

VDD_AE10

AE14

AE12

AE10

G13

G11

G9

VSS_G9

VSS_G13

VSS_G11

VDD_AE20

VDD_AE18

VDD_AE16

AE20

AE18

AE16

G22

G17

G15

VSS_G22

VSS_G17

VSS_G15

VDD_AF5

VDD_AF4

AF7

AF5

AF4

G33

G28

G25

VSS_G28

VSS_G25

VDD_AF13

VDD_AF11

VDD_AF7

AF13

AF11

H5

H4

VSS_H5

VSS_H4

VSS_G33

VDD_AG3

VDD_AG2

VDD_AF15

AG3

AG2

AF15

H16

H14

H12

VSS_H16

VSS_H14

VSS_H12

VDD_AG14

VDD_AG12

VDD_AG10

AG14

AG12

AG10

H24

H23

H22

VSS_H24

VSS_H23

VSS_H22

VDD_AH7

VDD_AH5

VDD_AG16

AH7

AH5

AG16

J2

H31

H26

VSS_J2

VSS_H31

VSS_H26

VDD_AH15

VDD_AH13

VDD_AH11

AH15

AH13

AH11

J13

J7

J3

VSS_J7

VSS_J3

VSS_J13

VDD_AJ4

VDD_AJ2

AJ6

AJ4

AJ2

J21

J17

J15

VSS_J17

VSS_J15

VDD_AJ10

VDD_AJ8

VDD_AJ6

AJ8

AJ10

J29

J23

VSS_J29

VSS_J23

VSS_J21

VDD_AJ16

VDD_AJ14

VDD_AJ12

AJ16

AJ14

AJ12

K10

K8

J34

VSS_K8

VSS_K10

VSS_J34

VDD_AK13

VDD_AK1

AK1

AK15

AK13

K16

K14

K12

VSS_K14

VSS_K12

VDD_AK19

VDD_AK17

VDD_AK15

AK21

AK19

AK17

K23

K21

K18

VSS_K21

VSS_K18

VSS_K16

VDD_AL5

VDD_AL2

VDD_AK21

AL9

AL5

AL2

L7

K32

K27

VSS_K32

VSS_K27

VSS_K23

VDD_AM13

VDD_AM1

VDD_AL9

AM1

AM13

L11

L9

VSS_L9

VSS_L7

VSS_L11

VDD_AN4

VDD_AM21

VDD_AM17

AN4

AM21

AM17

L17

L15

L13

VSS_L17

VSS_L15

VSS_L13

VDD_AN12

VDD_AN8

AN8

AN12

V10

U9

VSS_U9

VSS_V10

VDD_AR6

VDD_AP20

VDD_AP16

AR6

AP20

AP16

VDD_B19

VDD_B15

VDD_AR10

B19

B15

AR10

VDD_C6

VDD_C2

C6

C2

VDD_C12

VDD_C10

C12

C10

141,143

VDD_D20

VDD_D16

E3

D20

D16

VDD_E12

VDD_E11

VDD_E7

VDD_E3

E7

CPU2_CORE_TYPE

VCORE_CPU2_NB

E11

F13

E12

31,55,141

VDD_F17

VDD_F15

VDD_F13

F17

F15

VDD_G6

VDD_G1

G6

G1

VDD_G12

VDD_G10

VDD_G8

G8

NC_CPU2_J18
NC_CPU2_G19

NC_CPU2_H11
NC_CPU2_J11
NC_CPU2_K11

G10

G12

G14

VDD_H7

VDD_G16

VDD_G14

H7

G16

VDD_H15

VDD_H13

H17

H15

H13

VDD_J16

VDD_J14

VDD_H17

J16

J14

J18
G19
AN1
H11
J11
K11

VDD_K4

VDD_J12

K4

J12

RSVD_J18
RSVD_G19
RSVD_AN1
RSVD_H11
RSVD_J11
RSVD_K11

VDD_K7

VDD_K5

K7

K5

J_CPU2

AMC CPU F1207

HETERO 7 OF 11

X01_DTXXXXX

RSVD_H10

RSVD_H9

RSVD_AJ18
RSVD_AH18
RSVD_AG18

H10
H9

AJ18
AH18
AG18

+VCORE_CPU2

CPU2_NB_COREFB_POS
CPU2_NB_COREFB_NEG

NC_CPU2_AJ18
NC_CPU2_AH18
NC_CPU2_AG18

141
141

2

3

J_CPU2

VDD_K9

K9

VDD_K15

VDD_K13

K17

K15

K13

VDD_L3

VDD_L2

VDD_K17

L3

L2

VDD_L12

VDD_L10

L14

L12

L10

VDD_L18

VDD_L16

VDD_L14

L18

L16

VDD_M7

VDD_L20

M7

M11

L20

VDD_M15

VDD_M13

VDD_M11

M15

M13

N17

N15

VSS_N17

VSS_N15

VDD_M19

VDD_M17

M21

M19

M17

N23

N21

N19

VSS_N21

VSS_N19

VDD_N10

VDD_N8

VDD_M21

N8

N10

P8

N26

VSS_P8

VSS_N26

VSS_N23

VDD_N14

VDD_N12

N16

N14

N12

P14

P12

P10

VSS_P12

VSS_P10

VDD_N20

VDD_N18

VDD_N16

N20

N18

P18

P16

VSS_P18

VSS_P16

VSS_P14

VDD_P5

VDD_P4

P7

P5

P4

P24

P22

P20

VSS_P22

VSS_P20

VDD_P11

VDD_P9

VDD_P7

P9

P11

R7

P29

VSS_R7

VSS_P29

VSS_P24

VDD_P15

VDD_P13

P17

P15

P13

R13

R11

R9

VSS_R9

VSS_R11

VDD_P21

VDD_P19

VDD_P17

P21

P19

R17

R15

VSS_R17

VSS_R15

VSS_R13

VDD_R3

VDD_R2

R8

R3

R2

R23

R21

R19

VSS_R21

VSS_R19

VDD_R12

VDD_R10

VDD_R8

R12

R10

T4

R27

VSS_T4

VSS_R27

VSS_R23

VDD_R16

VDD_R14

R18

R16

R14

T10

T8

T5

VSS_T8

VSS_T5

VDD_T9

VDD_R20

VDD_R18

T9

R20

T14

T12

VSS_T14

VSS_T12

VSS_T10

VDD_T13

VDD_T11

T15

T13

T11

T20

T18

T16

VSS_T18

VSS_T16

VDD_T19

VDD_T17

VDD_T15

T19

T17

T24

T22

VSS_T24

VSS_T22

VSS_T20

VDD_U12

VDD_T21

U14

U12

T21

U3

U2

T25

VSS_U2

VSS_T25

VDD_U18

VDD_U16

VDD_U14

U18

U16

U13

U11

VSS_U3

VSS_U13

VSS_U11

VDD_V4

VDD_U20

V5

V4

U20

U19

U17

U15

VSS_U17

VSS_U15

VDD_V13

VDD_V11

VDD_V5

V13

V11

U23

U21

VSS_U23

VSS_U21

VSS_U19

VDD_V17

VDD_V15

V19

V17

V15

V14

V12

U27

VSS_V12

VSS_U27

VDD_W2

VDD_V21

VDD_V19

W2

V21

V18

V16

VSS_V18

VSS_V16

VSS_V14

VDD_W8

VDD_W3

W8

W3

W10

V24

V22

V20

VSS_V22

VSS_V20

VDD_W14

VDD_W12

VDD_W10

W14

W12

W7

V26

VSS_W7

VSS_V26

VSS_V24

VDD_W18

VDD_W16

W20

W18

W16

W13

W11

W9

VSS_W9

VSS_W11

VDD_Y9

VDD_Y7

VDD_W20

Y9

Y7

W17

W15

VSS_W17

VSS_W15

VSS_W13

VDD_Y13

VDD_Y11

Y15

Y13

Y11

W23

W21

W19

VSS_W21

VSS_W19

VDD_Y19

VDD_Y17

VDD_Y15

Y19

Y17

Y4

W29

VSS_Y4

VSS_W29

VSS_W23

VDD_V9

VDD_Y21

V9

U10

Y21

Y10

Y8

Y5

VSS_Y8

VSS_Y5

AMC CPU F1207

HETERO 9 OF 11

VDD_U10

Y16

Y14

Y12

VSS_Y16

VSS_Y14

VSS_Y12

VSS_Y10

Y22

Y20

Y18

VSS_Y20

VSS_Y18

Y27

Y24

VSS_Y27

VSS_Y24

VSS_Y22

F12

T7

VSS_T7

VSS_F12

AJ13

VSS_AJ13

+VCORE_CPU2

AA22
AA24
AB23
AC22
AC24
AD23
AE22
AF23
AG24
AH23

L22
M23
N22
N24
P23
R22
R24
T23
U22
U24
V23
W22
W24
Y23

VDD_AA22
VDD_AA24
VDD_AB23
VDD_AC22
VDD_AC24
VDD_AD23
VDD_AE22
VDD_AF23
VDD_AG24
VDD_AH23
VDD_L22
VDD_M23
VDD_N22
VDD_N24
VDD_P23
VDD_R22
VDD_R24
VDD_T23
VDD_U22
VDD_U24
VDD_V23
VDD_W22
VDD_W24
VDD_Y23

J_CPU2

AMC CPU F1207

HETERO 10 OF 11

VSS_L19
VSS_L21
VSS_L23
VSS_L25
VSS_L30
VSS_L35

VSS_M4
VSS_M5

VSS_M8
VSS_M10
VSS_M12
VSS_M14
VSS_M16
VSS_M18
VSS_M20
VSS_M22
VSS_M24
VSS_M28

VSS_N2

VSS_N3

VSS_N7

VSS_N9
VSS_N11
VSS_N13

L19
L21
L23
L25
L30
L35
M4
M5
M8
M10
M12
M14
M16
M18
M20
M22
M24
M28
N2
N3
N7
N9
N11
N13

3

4

ROOM=CPU2

+MEM_CPU2

J_CPU2

VDDIO1

AA30

VDDIO3

VDDIO2

AB33

AA35

VDDIO5

VDDIO4

AD34

AC31

VDDIO8

VDDIO7

VDDIO6

AG33

AF35

AE32

+VTT_CPU2

VDDIO10

VDDIO9

AJ34

AH31

VDDIO12

VDDIO11

N31

M33

AL35

VDDIO15

VDDIO14

VDDIO13

R32

P34

VDDIO17

VDDIO16

U33

T35

T30

VDDIO20

VDDIO19

VDDIO18

W34

V31

VDDIO21

A23

Y32

VTT2

VTT1

AM23

VTT3

AP23

AN23

VTT5

VTT4

AR23

VTT6

B23

VTT7

C23

VTT8

D23

VTT9

E23

AL23

VTT10

VLDT_02

VLDT_01

AH3

AH2

AH1

VLDT_04

VLDT_03

AH4

VLDT_12

VLDT_11

E1

D1

C1

VLDT_14

VLDT_13

F1

VLDT_22

VLDT_21

AP2

AN2

AM2

VLDT_24

VLDT_23

AR2

+1.2V_VLDT

AMC CPU F1207

HETERO 11 OF 11

CPU2 POWER

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

10/20/2006

4

REV.

X01

19 OF 144

C

DBA

A B C

The connectors on this page are placeholders for the AMD debug headers

+MEM_CPU1

D

+MEM_CPU1

1

2

X00_DT10315 SCH

+MEM_CPU1

14
14
20
20
14
20
20

R9295

1K-1%

R9294

1K-1%

R9293

1K-1%

R9292

1K-1%

NP

NC_J_HDT1_3

NC_J_HDT1_5
CPU1_DBREQ_N
CPU1_DBRDY
HDT1_TCK
HDT1_TMS
CPU1_TDI
HDT1_TRST_N
SWITCHED_CPU_TDO

NC_J_HDT1_25

R9291

1K-1%

R9290

1K-1%

12

12

12

12

12

X

12

R9895

1 2

100-1%

X00_DT9901 SCH

X00_DT9903 SCH

J_HDT1

1
3 4
5 6
7 8

9
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26

K

2

10

20

RESET_HDT_N

96,138

NC_J_HDT2_1

CPU2_DBREQ_N

18

CPU2_DBRDY

18

X00_DT9901

NP

+MEM_CPU1

R9300

X

1 2

R9299

1 2

NC_P3_7
NC_P3_9
NC_P3_11
NC_P3_13
NC_P3_15
NC_P3_16

1K-1% 1K-1%

NC_P3_19
NC_P3_21
NC_P3_23
NC_P3_25

R9298

1 2

1 2

1K-1%

R9896

100-1%

X00_DT10315 SCH

1

R9897

1 2

100-1%

3 4
5 6
7 8

9
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26

2x13 SM HEADER

J_HDT2

2

10

20

1

NC_HDT2_18
NC_HDT2_20
NC_HDT2_22

2

R9289

1 2

1K-1%

2x13 SM HEADER

PIN 25 KEYED

+MEM_CPU1

+MEM_CPU1

R9887

1 2

1K-1%

R9888

U8034

14,18,20

18,20

1K-1%

1 2

CPU1_TDO

CPU2_TDO

+MEM_CPU1

1

B1

2

GND

NC7SB3157

X00_DT9694 SCH

VCC

6

S

5
43

AB0

SWITCHED_CPU_TDO

CPU2_PRES_N

18,66,138

20

3

20

20

20

HDT1_TRST_N

HDT1_TMS

HDT1_TCK

U8038

2

GND

3

2A

SN74LVC2G34

U8037

2

GND

3

2A

SN74LVC2G34

U8036

2

GND

3

2A

SN74LVC2G34

X00_DT9900 SCH

VCC

VCC

VCC

1Y1A

2Y

1Y1A

2Y

1Y1A

2Y

R9296

R9889

61
5
4

61
5
4

61
5
4

1 2

100-1%

R9892

1 2

100-1%

R9894

1 2

100-1%

R9890

1 2

100-1%

R9891

1 2

100-1%

R9893

1 2

100-1%

X00_DT10315 SCH

CPU1_TRST_N

CPU2_TRST_N

CPU1_TMS

CPU2_TMS

CPU1_TCK

CPU2_TCK

14

18

14

18

14

18

1K-1%

+MEM_CPU1

R9297

1K-1%

12

12

CPU1_TDO

CPU2_TDO

14,18,20

18,20

MODULE:
DESC:
REV: OF

SEC

3

MEM

4

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

DBA

4

REV.

X01

20 OF 14410/20/2006

X01

10/20/2006

21 OF 144

HT 2

A B C

North Hub HyperTransport Link A to CPU1 Link 1

D

1

HT 0

CPU 1

DDR2

HT 1

x16

HT A

HT 2100

HT B

13
13

HT_AD_C1L1_NBLA_0_DP
HT_AD_C1L1_NBLA_0_DN

C2

HA_CADIN_H00

C1

HA_CADIN_L00

U_NH

HA_CADOUT_H00
HA_CADOUT_L00

AF2
AF1

HT_AD_NBLA_C1L1_0_DP
HT_AD_NBLA_C1L1_0_DN

13
13

1

13
13

13

PCIE BPCIE A

13

13
13

13
13

13
13

13
13

HT_AD_C1L1_NBLA_1_DP
HT_AD_C1L1_NBLA_1_DN

HT_AD_C1L1_NBLA_2_DP
HT_AD_C1L1_NBLA_2_DN

HT_AD_C1L1_NBLA_3_DP
HT_AD_C1L1_NBLA_3_DN

HT_AD_C1L1_NBLA_4_DP
HT_AD_C1L1_NBLA_4_DN

HT_AD_C1L1_NBLA_5_DP
HT_AD_C1L1_NBLA_5_DN

HT_AD_C1L1_NBLA_6_DP
HT_AD_C1L1_NBLA_6_DN

D2

HA_CADIN_H01

D1

HA_CADIN_L01

E2

HA_CADIN_H02

E1

HA_CADIN_L02

F2

HA_CADIN_H03

F1

HA_CADIN_L03

H1

HA_CADIN_H04

H2

HA_CADIN_L04

J1

HA_CADIN_H05

J2

HA_CADIN_L05

K1

HA_CADIN_H06

K2

HA_CADIN_L06

HA_CADOUT_H01
HA_CADOUT_L01

HA_CADOUT_H02
HA_CADOUT_L02

HA_CADOUT_H03
HA_CADOUT_L03

HA_CADOUT_H04
HA_CADOUT_L04

HA_CADOUT_H05
HA_CADOUT_L05

HA_CADOUT_H06
HA_CADOUT_L06

AE2
AE1

AD2
AD1

AC2
AC1

AA1
AA2

Y1
Y2

W1
W2

HT_AD_NBLA_C1L1_1_DP
HT_AD_NBLA_C1L1_1_DN

HT_AD_NBLA_C1L1_2_DP
HT_AD_NBLA_C1L1_2_DN

HT_AD_NBLA_C1L1_3_DP
HT_AD_NBLA_C1L1_3_DN

HT_AD_NBLA_C1L1_4_DP
HT_AD_NBLA_C1L1_4_DN

HT_AD_NBLA_C1L1_5_DP
HT_AD_NBLA_C1L1_5_DN

HT_AD_NBLA_C1L1_6_DP
HT_AD_NBLA_C1L1_6_DN

13
13

13
13

13
13

13
13

13
13

13
13

2

13
13

13
13

13
13

13
13

13
13

13
13

13
13

HT_AD_C1L1_NBLA_7_DP
HT_AD_C1L1_NBLA_7_DN

HT_AD_C1L1_NBLA_8_DP
HT_AD_C1L1_NBLA_8_DN

HT_AD_C1L1_NBLA_9_DP
HT_AD_C1L1_NBLA_9_DN

HT_AD_C1L1_NBLA_10_DP
HT_AD_C1L1_NBLA_10_DN

HT_AD_C1L1_NBLA_11_DP
HT_AD_C1L1_NBLA_11_DN

HT_AD_C1L1_NBLA_12_DP
HT_AD_C1L1_NBLA_12_DN

HT_AD_C1L1_NBLA_13_DP
HT_AD_C1L1_NBLA_13_DN

L1

HA_CADIN_H07

L2

HA_CADIN_L07

J5

HA_CADIN_H08

J4

HA_CADIN_L08

K5

HA_CADIN_H09

K4

HA_CADIN_L09

L6

HA_CADIN_H10

L5

HA_CADIN_L10

M6

HA_CADIN_H11

M5

HA_CADIN_L11

P5

HA_CADIN_H12

P6

HA_CADIN_L12

R5

HA_CADIN_H13

R6

HA_CADIN_L13

HA_CADOUT_H07
HA_CADOUT_L07

HA_CADOUT_H08
HA_CADOUT_L08

HA_CADOUT_H09
HA_CADOUT_L09

HA_CADOUT_H10
HA_CADOUT_L10

HA_CADOUT_H11
HA_CADOUT_L11

HA_CADOUT_H12
HA_CADOUT_L12

HA_CADOUT_H13
HA_CADOUT_L13

V1
V2

AG5
AG4

AF5
AF4

AE6
AE5

AD6
AD5

AB5
AB6

AA5
AA6

HT_AD_NBLA_C1L1_7_DP
HT_AD_NBLA_C1L1_7_DN

HT_AD_NBLA_C1L1_8_DP
HT_AD_NBLA_C1L1_8_DN

HT_AD_NBLA_C1L1_9_DP
HT_AD_NBLA_C1L1_9_DN

HT_AD_NBLA_C1L1_10_DP
HT_AD_NBLA_C1L1_10_DN

HT_AD_NBLA_C1L1_11_DP
HT_AD_NBLA_C1L1_11_DN

HT_AD_NBLA_C1L1_12_DP
HT_AD_NBLA_C1L1_12_DN

HT_AD_NBLA_C1L1_13_DP
HT_AD_NBLA_C1L1_13_DN

13
13

13
13

13
13

2

13
13

13
13

13
13

13
13

3

+2.5V

REPLACE

21

L1843

1 2

68nH 600mA

13
13

13
13

13
13

13
13

13
13

HT_AD_C1L1_NBLA_14_DP
HT_AD_C1L1_NBLA_14_DN

HT_AD_C1L1_NBLA_15_DP
HT_AD_C1L1_NBLA_15_DN

HT_CK_C1L1_NBLA_0_DP
HT_CK_C1L1_NBLA_0_DN

HT_CK_C1L1_NBLA_1_DP
HT_CK_C1L1_NBLA_1_DN

HT_CT_C1L1_NBLA_0_DP
HT_CT_C1L1_NBLA_0_DN

MOD_NH_HA_CALVDD25

R8454 MOD_NH_HA_CALR_DP

1 2

475-1%

MOD_NH_HA_CALR_DN

T4

HA_CADIN_H14

T5

HA_CADIN_L14

U4

HA_CADIN_H15

U5

HA_CADIN_L15

G3

HA_CLKIN_H0

G2

HA_CLKIN_L0

N5

HA_CLKIN_H1

N4

HA_CLKIN_L1

M1

HA_CLTIN_H

M2

HA_CLTIN_L

M11

HA_RXVDD25

T1

HA_CALR_H

T2

HA_CALR_L

HA_CADOUT_H14
HA_CADOUT_L14

HA_CADOUT_H15
HA_CADOUT_L15

HA_CLKOUT_H0
HA_CLKOUT_L0

HA_CLKOUT_H1
HA_CLKOUT_L1

HA_CLTOUT_H
HA_CLTOUT_L

LDTSTOP_L

LDTREQ_L

Y4
Y5

W4
W5

AB3
AB2

AC4
AC5

U1
U2

D4
E4

HT_AD_NBLA_C1L1_14_DP
HT_AD_NBLA_C1L1_14_DN

HT_AD_NBLA_C1L1_15_DP
HT_AD_NBLA_C1L1_15_DN

HT_CK_NBLA_C1L1_0_DP
HT_CK_NBLA_C1L1_0_DN

HT_CK_NBLA_C1L1_1_DP
HT_CK_NBLA_C1L1_1_DN

HT_CT_NBLA_C1L1_0_DP
HT_CT_NBLA_C1L1_0_DN

13
13

13
13

13
13

13
13

13
13

NP

X

1 2

R9549

+3.3V

REPLACE

R8428

4.7K-5%

1 2

4.7K-5%

NH_HT_LDTSTOP_N
NH_HT_LDTREQ_N

3

138
138

45

45

CK_200M_NH_C_DP

CK_200M_NH_C_DN

C8604

.01uF 16V

.01uF 16V

.01uF

16V-10%

C8605

1 2

C8606

1 2

R8453

1 2

C8603

1 2

150-1%

4.7uF

6.3V-10%

R8426

1 2

100-1%

R8427

1 2

100-1%

MOD_CK_200M_NH_DP
MOD_CK_200M_NH_DN

P2

HT_REFCLK_H

P1

HT_REFCLK_L

HT2100 REV0D6
HETERO 1 OF 7

HA_PLL_TEST_L
HA_PLL_TEST_H

R2
R1

NC_NH_HA_PLL_TEST_DN
NC_NH_HA_PLL_TEST_DP

4

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

REV.

FP975

X01

SHEET

10/20/2006 22 OF 144

DBA

4

A B C

USB GPIO

D

1

HT A

+1.2V_VLDT

x8

HT 2100

PCIE BPCIE A

HT B

Unused HT RX Signal Termination

When part of the width not used,
terminate + signals to GND
terminate - signals to 1.2V VDD

HT

HT1000

PCI PCIX

SATA

IDE

53
53

53
53

53
53

53
53

HT_AD_SBL0_NBLB_0_DP
HT_AD_SBL0_NBLB_0_DN

HT_AD_SBL0_NBLB_1_DP
HT_AD_SBL0_NBLB_1_DN

HT_AD_SBL0_NBLB_2_DP
HT_AD_SBL0_NBLB_2_DN

HT_AD_SBL0_NBLB_3_DP
HT_AD_SBL0_NBLB_3_DN

B29

HB_CADIN_H00

A29

HB_CADIN_L00

B28

HB_CADIN_H01

A28

HB_CADIN_L01

B27

HB_CADIN_H02

A27

HB_CADIN_L02

B26

HB_CADIN_H03

A26

HB_CADIN_L03

U_NH

HB_CADOUT_H00
HB_CADOUT_L00

HB_CADOUT_H01
HB_CADOUT_L01

HB_CADOUT_H02
HB_CADOUT_L02

HB_CADOUT_H03
HB_CADOUT_L03

B5
A5

B6
A6

B7
A7

B8
A8

HT_AD_NBLB_SBL0_0_DP
HT_AD_NBLB_SBL0_0_DN

HT_AD_NBLB_SBL0_1_DP
HT_AD_NBLB_SBL0_1_DN

HT_AD_NBLB_SBL0_2_DP
HT_AD_NBLB_SBL0_2_DN

HT_AD_NBLB_SBL0_3_DP
HT_AD_NBLB_SBL0_3_DN

1

53
53

53
53

53
53

53
53

2

1 2R8468

51-5%

1 2R8655

51-5%

1 2R8653

51-5%

1 2R8654

51-5%

1 2R8646

51-5%

1 2R8647

51-5%

1 2R8648

51-5%

1 2R8660

51-5%

1 2R9486

MOD_NH_HB_CADIN_8_DN

MOD_NH_HB_CADIN_9_DN

MOD_NH_HB_CADIN_10_DN

MOD_NH_HB_CADIN_11_DN

MOD_NH_HB_CADIN_12_DN

MOD_NH_HB_CADIN_13_DN

MOD_NH_HB_CADIN_14_DN

MOD_NH_HB_CADIN_15_DN

MOD_NH_HB_CLKIN_1_DN

23

23

23

23

23

23

23

23

23

53
53

53
53

53
53

53
53

23
23

23
23

23
23

23
23

HT_AD_SBL0_NBLB_4_DP
HT_AD_SBL0_NBLB_4_DN

HT_AD_SBL0_NBLB_5_DP
HT_AD_SBL0_NBLB_5_DN

HT_AD_SBL0_NBLB_6_DP
HT_AD_SBL0_NBLB_6_DN

HT_AD_SBL0_NBLB_7_DP
HT_AD_SBL0_NBLB_7_DN

MOD_NH_HB_CADIN_8_DP
MOD_NH_HB_CADIN_8_DN

MOD_NH_HB_CADIN_9_DP
MOD_NH_HB_CADIN_9_DN

MOD_NH_HB_CADIN_10_DP
MOD_NH_HB_CADIN_10_DN

MOD_NH_HB_CADIN_11_DP
MOD_NH_HB_CADIN_11_DN

A24

HB_CADIN_H04

B24

HB_CADIN_L04

A23

HB_CADIN_H05

B23

HB_CADIN_L05

A22

HB_CADIN_H06

B22

HB_CADIN_L06

A21

HB_CADIN_H07

B21

HB_CADIN_L07

E24

HB_CADIN_H08

D24

HB_CADIN_L08

E23

HB_CADIN_H09

D23

HB_CADIN_L09

F22

HB_CADIN_H10

E22

HB_CADIN_L10

F21

HB_CADIN_H11

E21

HB_CADIN_L11

HB_CADOUT_H04
HB_CADOUT_L04

HB_CADOUT_H05
HB_CADOUT_L05

HB_CADOUT_H06
HB_CADOUT_L06

HB_CADOUT_H07
HB_CADOUT_L07

HB_CADOUT_H08
HB_CADOUT_L08

HB_CADOUT_H09
HB_CADOUT_L09

HB_CADOUT_H10
HB_CADOUT_L10

HB_CADOUT_H11
HB_CADOUT_L11

A10
B10

A11
B11

A12
B12

A13
B13

E6
D6

E7
D7

F8
E8

F9
E9

HT_AD_NBLB_SBL0_4_DP
HT_AD_NBLB_SBL0_4_DN

HT_AD_NBLB_SBL0_5_DP
HT_AD_NBLB_SBL0_5_DN

HT_AD_NBLB_SBL0_6_DP
HT_AD_NBLB_SBL0_6_DN

HT_AD_NBLB_SBL0_7_DP
HT_AD_NBLB_SBL0_7_DN

TP_NH_HB_CADOUT_8_DP
TP_NH_HB_CADOUT_8_DN

TP_NH_HB_CADOUT_9_DP
TP_NH_HB_CADOUT_9_DN

TP_NH_HB_CADOUT_10_DP
TP_NH_HB_CADOUT_10_DN

TP_NH_HB_CADOUT_11_DP
TP_NH_HB_CADOUT_11_DN

53
53

53
53

53
53

53
53

2

Unused HT TX Signals Can be left Disconnected

3

51-5%

1 2R8657

51-5%

1 2R8656

51-5%

1 2R8649

51-5%

1 2R8652

51-5%

1 2R8651

51-5%

1 2R8650

51-5%

1 2R8659

51-5%

1 2R8658

51-5%

1 2R9487

51-5%

MOD_NH_HB_CADIN_8_DP

MOD_NH_HB_CADIN_9_DP

MOD_NH_HB_CADIN_10_DP

MOD_NH_HB_CADIN_11_DP

MOD_NH_HB_CADIN_12_DP

MOD_NH_HB_CADIN_13_DP

MOD_NH_HB_CADIN_14_DP

MOD_NH_HB_CADIN_15_DP

MOD_NH_HB_CLKIN_1_DP

23

23

23

23

23

23

23

23

23

+2.5V

REPLACE

21

C8608

.01uF

16V-10%

L1844

1 2

68nH 600mA

C8607

1 2

4.7uF

6.3V-10%

23
23

23
23

23
23

23
23

53
53

23
23

53
53

MOD_NH_HB_CADIN_12_DP
MOD_NH_HB_CADIN_12_DN

MOD_NH_HB_CADIN_13_DP
MOD_NH_HB_CADIN_13_DN

MOD_NH_HB_CADIN_14_DP
MOD_NH_HB_CADIN_14_DN

MOD_NH_HB_CADIN_15_DP
MOD_NH_HB_CADIN_15_DN

HT_CK_SBL0_NBLB_0_DP
HT_CK_SBL0_NBLB_0_DN

MOD_NH_HB_CLKIN_1_DP
MOD_NH_HB_CLKIN_1_DN

HT_CT_SBL0_NBLB_0_DP
HT_CT_SBL0_NBLB_0_DN

MOD_NH_HB_CALVDD25

R8455 MOD_NH_HB_CALR_DP

1 2

475-1%

MOD_NH_HB_CALR_DN

NC_NH_HB_PLLBYP_DP
NC_NH_HB_PLLBYP_DN

E19

HB_CADIN_H12

F19

HB_CADIN_L12

E18

HB_CADIN_H13

F18

HB_CADIN_L13

D17

HB_CADIN_H14

E17

HB_CADIN_L14

D16

HB_CADIN_H15

E16

HB_CADIN_L15

C25

HB_CLKIN_H0

B25

HB_CLKIN_L0

E20

HB_CLKIN_H1

D20

HB_CLKIN_L1

A20

HB_CLTIN_H

B20

HB_CLTIN_L

L18

HB_RXVDD25

A16

HB_CALR_H

B16

HB_CALR_L

B18

HB_PLLBYP_H

A18

HB_PLLBYP_L

HB_CADOUT_H12
HB_CADOUT_L12

HB_CADOUT_H13
HB_CADOUT_L13

HB_CADOUT_H14
HB_CADOUT_L14

HB_CADOUT_H15
HB_CADOUT_L15

HB_CLKOUT_H0
HB_CLKOUT_L0

HB_CLKOUT_H1
HB_CLKOUT_L1

HB_CLTOUT_H
HB_CLTOUT_L

HB_PLL_TEST_H
HB_PLL_TEST_L

E11
F11

E12
F12

D13
E13

D14
E14

C9
B9

E10
D10

A14
B14

A17
B17

TP_NH_HB_CADOUT_12_DP
TP_NH_HB_CADOUT_12_DN

TP_NH_HB_CADOUT_13_DP
TP_NH_HB_CADOUT_13_DN

TP_NH_HB_CADOUT_14_DP
TP_NH_HB_CADOUT_14_DN

TP_NH_HB_CADOUT_15_DP
TP_NH_HB_CADOUT_15_DN

HT_CL_NBLB_SBL0_0_DP
HT_CL_NBLB_SBL0_0_DN

NC_NH_HB_CLKOUT_0_DP
NC_NH_HB_CLKOUT_0_DN

HT_CT_NBLB_SBL0_0_DP
HT_CT_NBLB_SBL0_0_DN

NC_NH_HB_PLL_TEST_DP
NC_NH_HB_PLL_TEST_DN

53
53

3

53
53

4

HT2100 REV0D6
HETERO 2 OF 7

NORTH HUB HYPER TRANSPORT LINK B TO SOUTH HUB Link 0

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

4

REV.

X01

23 OF 14410/20/2006

C

DBA

A B C

A_PCIE, Port 0: PCIE to Left PCIe Riser(Top)
A_PCIE, Port 1: PCIE to Left PCIe Riser(Bottom)
A_PCIE, Port 2: PCIE to PCIe Switch

71
71

EXP_NH_0_NB_0_DN
EXP_NH_0_NB_0_DP

AG10
AF10

A_PCIE_RN00
A_PCIE_RP00

U_NH

A_PCIE_TDN00
A_PCIE_TDP00

AH29
AH30

EXP_NH_0_SB_0_C_DN
EXP_NH_0_SB_0_C_DP

27
27

D

NORTH HUB PCIE LINKS AND STRAPPINGS

1

2

3

PCIE PORT 0

PCIE PORT 1

PCIE PORT 2

45
45

71
71

71
71

71
71

71
71

71
71

71
71

71
71

71
71

71
71

71
71

71
71

28
28

28
28

28
28

28
28

CK_100M_PCIE_NH_A_DN
CK_100M_PCIE_NH_A_DP

NC_NH_PCIE_A_TEST_DP
NC_NH_PCIE_A_TEST_DN

EXP_NH_0_NB_1_DN
EXP_NH_0_NB_1_DP

EXP_NH_0_NB_2_DN
EXP_NH_0_NB_2_DP

EXP_NH_0_NB_3_DN
EXP_NH_0_NB_3_DP

EXP_NH_0_NB_4_DN
EXP_NH_0_NB_4_DP

EXP_NH_0_NB_5_DN
EXP_NH_0_NB_5_DP

EXP_NH_0_NB_6_DN
EXP_NH_0_NB_6_DP

EXP_NH_0_NB_7_DN
EXP_NH_0_NB_7_DP

EXP_NH_1_NB_0_DN
EXP_NH_1_NB_0_DP

EXP_NH_1_NB_1_DN
EXP_NH_1_NB_1_DP

EXP_NH_1_NB_2_DN
EXP_NH_1_NB_2_DP

EXP_NH_1_NB_3_DN
EXP_NH_1_NB_3_DP

EXP_NH_2_NB_0_DN
EXP_NH_2_NB_0_DP

EXP_NH_2_NB_1_DN
EXP_NH_2_NB_1_DP

EXP_NH_2_NB_2_DN
EXP_NH_2_NB_2_DP

EXP_NH_2_NB_3_DN
EXP_NH_2_NB_3_DP

AG11

A_PCIE_RN01

AF11

A_PCIE_RP01

AF12

A_PCIE_RN02

AE12

A_PCIE_RP02

AF13

A_PCIE_RN03

AE13

A_PCIE_RP03

AF14

A_PCIE_RN04

AG14

A_PCIE_RP04

AE15

A_PCIE_RN05

AF15

A_PCIE_RP05

AF16

A_PCIE_RN06

AE16

A_PCIE_RP06

AG17

A_PCIE_RN07

AF17

A_PCIE_RP07

AK11

A_PCIE_RN08

AJ11

A_PCIE_RP08

AK12

A_PCIE_RN09

AJ12

A_PCIE_RP09

AK13

A_PCIE_RN10

AJ13

A_PCIE_RP10

AK14

A_PCIE_RN11

AJ14

A_PCIE_RP11

AH15

A_PCIE_RN12

AJ15

A_PCIE_RP12

AJ16

A_PCIE_RN13

AK16

A_PCIE_RP13

AJ17

A_PCIE_RN14

AK17

A_PCIE_RP14

AJ18

A_PCIE_RN15

AK18

A_PCIE_RP15

AJ21

A_PCIE_REFCLK_N

AK21

A_PCIE_REFCLK_P

AK20

A_PCIE_TEST_P

AJ20

A_PCIE_TEST_N

HT2100 REV0D6
HETERO 3 OF 7

A_PCIE_TDN1

A_PCIE_TDP01

A_PCIE_TDN2

A_PCIE_TDP02

A_PCIE_TDN3

A_PCIE_TDP03

A_PCIE_TDN4

A_PCIE_TDP04

A_PCIE_TDN5

A_PCIE_TDP05

A_PCIE_TDN6

A_PCIE_TDP06

A_PCIE_TDN7

A_PCIE_TDP07

A_PCIE_TDN8

A_PCIE_TDP08

A_PCIE_TDN9

A_PCIE_TDP09

A_PCIE_TDN10
A_PCIE_TDP10

A_PCIE_TDN11
A_PCIE_TDP11

A_PCIE_TDN12
A_PCIE_TDP12

A_PCIE_TDN13
A_PCIE_TDP13

A_PCIE_TDN14
A_PCIE_TDP14

A_PCIE_TDN15
A_PCIE_TDP15

PCIE_CLKO0_N
PCIE_CLKO0_P

PCIE_CLKO1_N
PCIE_CLKO1_P

PCIE_CLKO2_N
PCIE_CLKO2_P

PCIE_CLKO3_N
PCIE_CLKO3_P

PCIE_CLKO4_N
PCIE_CLKO4_P

AK29
AJ29

AK28
AJ28

AJ27
AH27

AJ26
AK26

AJ25
AK25

AJ24
AK24

AJ23
AK23

AG26
AF26

AG25
AF25

AF24
AE24

AF23
AE23

AG22
AF22

AE21
AF21

AE20
AF20

AF19
AG19

V30
V29

U30
U29

T30
T29

R29
R28

P29
P30

EXP_NH_0_SB_1_C_DN
EXP_NH_0_SB_1_C_DP

EXP_NH_0_SB_2_C_DN
EXP_NH_0_SB_2_C_DP

EXP_NH_0_SB_3_C_DN
EXP_NH_0_SB_3_C_DP

EXP_NH_0_SB_4_C_DN
EXP_NH_0_SB_4_C_DP

EXP_NH_0_SB_5_C_DN
EXP_NH_0_SB_5_C_DP

EXP_NH_0_SB_6_C_DN
EXP_NH_0_SB_6_C_DP

EXP_NH_0_SB_7_C_DN
EXP_NH_0_SB_7_C_DP

EXP_NH_1_SB_0_C_DN
EXP_NH_1_SB_0_C_DP

EXP_NH_1_SB_1_C_DN
EXP_NH_1_SB_1_C_DP

EXP_NH_1_SB_2_C_DN
EXP_NH_1_SB_2_C_DP

EXP_NH_1_SB_3_C_DN
EXP_NH_1_SB_3_C_DP

EXP_NH_2_SB_0_C_DN
EXP_NH_2_SB_0_C_DP

EXP_NH_2_SB_1_C_DN
EXP_NH_2_SB_1_C_DP

EXP_NH_2_SB_2_C_DN
EXP_NH_2_SB_2_C_DP

EXP_NH_2_SB_3_C_DN
EXP_NH_2_SB_3_C_DP

CK_100M_PCIE_NH_0_DN
CK_100M_PCIE_NH_0_DP

CK_100M_PCIE_NH_1_DN
CK_100M_PCIE_NH_1_DP

CK_100M_PCIE_NH_2_C_DN
CK_100M_PCIE_NH_2_C_DP

CK_100M_PCIE_NH_3_DN
CK_100M_PCIE_NH_3_DP

NC_NH_PCIECLK_4_DN
NC_NH_PCIECLK_4_DP

PCIE_CLKO 4 is Disabled

27
27

27
27

27
27

27
27

27
27

27
27

27
27

27
27

27
27

27
27

27
27

27
27

27
27

27
27

27
27

PCIE PORT 0

PCIE PORT 1

PCIE PORT 2

71
71

71
71

29
29

+3.3V

72
72

REPLACE

R8639

NP

1 2

4.7K-5%

R9460

NP

1 2

4.7K-5%

X

X

PCIE PORT 3

+3.3V

REPLACE

R8471

R8478

R8484

45
45

1 2

4.7K-5%

R8681

1 2

100-5%

1 2

4.7K-5%

1 2

4.7K-5%

B_PCIE, Port 3: PCIE to Center PCIe Riser

72
72

72
72

72
72

72
72

72
72

72
72

72
72

72
72

CK_100M_PCIE_NH_B_DN
CK_100M_PCIE_NH_B_DP

R8472

R8476

R8482

MOD_NH_PCIE0_PRES_N
MOD_NH_PCIE1_PRES_N
MOD_NH_PCIE2_PRES_N
MOD_NH_PCIE3_PRES_N
MOD_NH_PCIE4_PRES_N

EXP_NH_3_NB_0_DN
EXP_NH_3_NB_0_DP

EXP_NH_3_NB_1_DN
EXP_NH_3_NB_1_DP

EXP_NH_3_NB_2_DN
EXP_NH_3_NB_2_DP

EXP_NH_3_NB_3_DN
EXP_NH_3_NB_3_DP

EXP_NH_3_NB_4_DN
EXP_NH_3_NB_4_DP

EXP_NH_3_NB_5_DN
EXP_NH_3_NB_5_DP

EXP_NH_3_NB_6_DN
EXP_NH_3_NB_6_DP

EXP_NH_3_NB_7_DN
EXP_NH_3_NB_7_DP

R8470

1 2

4.7K-5%

R8679

1 2

100-5%

R8477

1 2

4.7K-5%

R8483

1 2

4.7K-5%

1 2

4.7K-5%

R8680

1 2

100-5%

1 2

4.7K-5%

1 2

4.7K-5%

T27

B_PCIE_RN00

T26

B_PCIE_RP00

R26

B_PCIE_RN01

R25

B_PCIE_RP01

P26

B_PCIE_RN02

P25

B_PCIE_RP02

N26

B_PCIE_RN03

N27

B_PCIE_RP03

M25

B_PCIE_RN04

M26

B_PCIE_RP04

L25

B_PCIE_RN05

L26

B_PCIE_RP05

K27

B_PCIE_RN06

K26

B_PCIE_RP06

J27

B_PCIE_RN7

J26

B_PCIE_RP07

N29

B_PCIE_REFCLK_N

N30

B_PCIE_REFCLK_P

AF30

ATNSW_L0

AD28

ATNSW_L1_DYDBD5

AA26

ATNSW_L2_DYDBD8

AC29

MPWRGD_L0

AB29

MPWRGD_L1_DYDBD18

Y27

MPWRGD_L2_DYDBD19

AF29

EMILS0

AC30

EMILS1_DYDBD4

AB30

EMILS2_DYDBD7

AE30

PWRFLT_L0

AE29

PWRFLT_L1_DYDBD6

AA27

PWRFLT_L2_DYDBD9

AJ2

PRSNT_L0

AJ4

PRSNT_L1

AK4

PRSNT_L2

Y30

PRSNT_L3

AA30

PRSNT_L4

U_NH

B_PCIE_TDN00
B_PCIE_TDP00

B_PCIE_TDN01
B_PCIE_TDP01

B_PCIE_TDN02
B_PCIE_TDP02

B_PCIE_TDN03
B_PCIE_TDP03

B_PCIE_TDN04
B_PCIE_TDP04

B_PCIE_TDN05
B_PCIE_TDP05

B_PCIE_TDN06
B_PCIE_TDP06

B_PCIE_TDN07
B_PCIE_TDP07

ATNLED0
ATNLED1_DYDBD10
ATNLED2_DYDBD14

EMIL0
EMIL1_DYDBD11
EMIL2_DYDBD15

PWREN_L0
PWREN_L1_DYDBD13
PWREN_L2_DYDBD17

PWRLED_L0
PWRLED_L1_DYDBD12
PWRLED_L2_DYDBD16

MRST_L0
MRST_L1
MRST_L2
MRST_L3
MRST_L4

D30
D29

E30
E29

F30
F29

G30
G29

H28
H29

J29
J30

K29
K30

L29
L30

AF28
AB25
AA29

AD29
AC27
AB26

AD27
AB28
Y26

AD30
AB27
Y25

AJ1
AK3
AJ3
Y29
Y28

EXP_NH_3_SB_0_C_DN
EXP_NH_3_SB_0_C_DP

EXP_NH_3_SB_1_C_DN
EXP_NH_3_SB_1_C_DP

EXP_NH_3_SB_2_C_DN
EXP_NH_3_SB_2_C_DP

EXP_NH_3_SB_3_C_DN
EXP_NH_3_SB_3_C_DP

EXP_NH_3_SB_4_C_DN
EXP_NH_3_SB_4_C_DP

EXP_NH_3_SB_5_C_DN
EXP_NH_3_SB_5_C_DP

EXP_NH_3_SB_6_C_DN
EXP_NH_3_SB_6_C_DP

EXP_NH_3_SB_7_C_DN
EXP_NH_3_SB_7_C_DP

NC_NH_ATNLED_0
NC_NH_ATNLED_1
NC_NH_ATNLED_2

NC_NH_EMIL_0
NC_NH_EMIL_1
NC_NH_EMIL_2

MOD_NH_PWREN_N
MOD_NH_PWREN_N_DYDBD13
MOD_PWREN_N_DYDBD17

NC_NH_PWRLED_0
NC_NH_PORLED_1
NC_NH_PWRLED_2

NH_MRST_0_N
NC_NH_MRST_1_N
NC_NH_MRST_2_N
NC_NH_MRST_3_N
NC_NH_MRST_4_N

96,138

27
27

27
27

27
27

27
27

27
27

27
27

27
27

27
27

PCIE PORT 3

R8480

1 2

4.7K-5%

R8479

1 2

+3.3V

REPLACE

R8481

4.7K-5%

1 2

1

2

4.7K-5%

3

4

HT2100 PCIE PORT

LANE WIDTH

PORT NUM

A

x8x4x4x8

0 1 2 3

R8636

NP

1 2

4.7K-5%

R8637

NP

1 2

4.7K-5%

B

R8640

1 2

4.7K-5%

X

X

R9454

1 2

1K-1%

R8628

1 2

1K-1%

R8629

1 2

1K-1%

R8682

1 2

1K-1%

HT2100 REV0D6
HETERO 4 OF 7

4

INC.

TITLE

ROUND ROCK,TEXAS

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

DCBA

REV.

X01

24 OF 14410/20/2006

A B C

D

1

TEST_MODE3TEST_MODE_EN

0

1

1

1

1

1

1

1

1

1

1

1

1

1

x

0

0

0

0

0

0

0

0

1

1

1

1

1

TEST_MODE2 TEST_MODE1 TEST_MODE0 OPERATION

x x

0

0

0

0

1

1

1

1

0

0

0

0

1

0

0

1

1

0

0

1

0

1

x

0

1

0

1

0

1

0

11

00

1

0

11

00

Regular System Mode

PLL Ref Clk Sel

XOR_MODE

PCIE_LPBK_MODE

RSVD

PLL TEST MODE

RSVD

PINS OUT LOW

PINS OUT HIGH

HT-PHY/PCIE_SDES TEST MODE

RSVD

IDDQ_TEST_MODE

SCAN MODE: SCAN Chain 1

SCAN MODE: SCAN Chain 2

+3.3V

REPLACE

R8548

R8547

R9309

1 2

4.7K-5%

1 2

4.7K-5%

NP

1 2

4.7K-5%

MOD_NH_MDCLK

MOD_NH_MDIO_DB31

X

R8516

1 2

R8588

8.2K-5%

1 2

+3.3V

REPLACE

R8589

8.2K-5%

1 2

1

8.2K-5%

2

3

1

1

1

STRP PIN

STRP_BCN_EN

STRP_DBG_32

STRP_HOT_PLUG

STRP_HT_16X

STRP_HT_BERT

STRP_HT_FREQ[2:0]

STRP_HT_LPBK

STRP_I2C_ADDR

STRP_PLL_PWRDN

TEST_MODE7 OperationTEST_MODE6 TEST_MODE5 TEST_MODE4

X

1

X

STRP_PCIE_A1 STRP_PCIE_A0

0

0

1

1

1

1

Description
1=BCN Dis

0=BCN En

*

1=Enable Dyn_Dbg mode
0=Disable Dyn_dbg mode

*

1=SHPC Mode
0=SWMM

*

1=Force 16x HT Width
1=Enable BERT Test Mode

0=Disable BERT Test Mode

*

HT Test Frequency
1=Enable Loop Back Test Mode

0=Disable Loop Back Test Mode

*

I2C Address Decode
1=CA, 0=C8

1=Disable PLL PD Mod
0=Enable PLL PD When PWROK=0

*

X

1

X

X

*

0

1

0

11

1

1

X

X

X

Auto Config

x16

*

x8,x4,x4

x8,x8

*=Default

NP

X

default

25
25
25
25
25
25
25
25
25

25
25,138
25,138
25,138
25,138

25

MOD_NH_BCN_EN
MOD_NH_DBG_32
MOD_NH_HOT_PLUG
MOD_NH_HT_16X_DB29
MOD_NH_HT_BERT_DB27
MOD_NH_HT_FREQ0_DB24
MOD_NH_HT_FREQ1_DB25
MOD_NH_HT_FREQ2_DB26
MOD_NH_HT_LPBK_DB28
MOD_NH_I2C_ADDR
MOD_NH_PCIE_A0
MOD_NH_PCIE_A1
MOD_NH_PCIE_B0
MOD_NH_PCIE_B1
MOD_NH_PLL_PWRDN_N

0
0
0
0
0
0
0
0
0
0
0
1
1
0
0

1 2

R8602

0

11

X

X

X

1

NP

X

8.2K-5%

1 2

R8614

1

0

11 1

I2C_ISO_BMC_NH_VAUX_SCL

91

DT11510_change net names_jd

I2C_ISO_BMC_NH_VAUX_SDA

91

55

55

PLL 25MHz Bypass ModeX

PLL 250 & 125MHz Bypass Mode

PCIE PLL Bypass Mode

HT PLL Bypass Mode

STRP_PCIE_B1 STRP_PCIE_B0PCIE A CONFIG PCIE B CONFIG

0

0

1

NP

X

8.2K-5%

1 2

R8613

NP

X

8.2K-5%

1 2

R8606

NP

X

8.2K-5%

1 2

R8612

SCAN MODE: SCAN Chain 3

SCAN MODE: SCAN Chain 4

SCAN MODE: Burn In

JP_I2C_DBG_NH_SCL

JP_I2C_DBG_NH_SDA

NOTE: place as close as possible to U_NH

0

1

0

11

NP

X

8.2K-5%

1 2

R8603

NP

X

8.2K-5%

1 2

R8605

*

NP

X

8.2K-5%

Auto Config

x8

x4,x4

RSVD

NP

X

8.2K-5%

1 2

R8611

1 2

R8609

NOTE: place as close as possible to U_NH

52

NP0

NP

X

8.2K-5%

1 2

R8610

R9522

NP0

1 2

0-5%

R9523

1 2

0-5%

R9546

NP0

1 2

0-5%

26

NP

X

8.2K-5%

1 2

R8608

8.2K-5%

NP

NP0

1 2

+1.2V_VPCIE_NH

1 2

R8607

NP

52

R9545

0-5%

NP

8.2K-5%

1 2

R8604

X

8.2K-5%

R8615

I2C_NH_SCL
I2C_NH_SDA

+3.3V

REPLACE

NP

X

8.2K-5%

1 2

R8616

1 2

8.2K-5%

1

2

3

J_I2C_NH

R8540

0-5%

1 2

1 2

1 2

1 2

R8541

L1845

68nH 600mA

L1846

68nH 600mA

L1847

68nH 600mA

HDR 1X3

0-5%

1 2

96,138
96,138

R8542

1 2

138

0-5%

25,138
25,138
25,138
25,138

C8610

C8612

C8611

NH_AUX_PONRST_N
SYSTEM_PWRGOOD_NH
NH_RST_N

MOD_NH_TEST_CLK100
MOD_NH_TEST_CLK125

25
25
25
25
25
25
25
25
25
25

25

1 2

1 2

1 2

MOD_NH_BCN_EN
MOD_NH_DBG_32
MOD_NH_HOT_PLUG
MOD_NH_HT_16X_DB29
MOD_NH_HT_BERT_DB27
MOD_NH_HT_FREQ0_DB24
MOD_NH_HT_FREQ1_DB25
MOD_NH_HT_FREQ2_DB26
MOD_NH_HT_LPBK_DB28
MOD_NH_I2C_ADDR
MOD_NH_PCIE_A0
MOD_NH_PCIE_A1
MOD_NH_PCIE_B0
MOD_NH_PCIE_B1
MOD_NH_PLL_PWRDN_N

NH_A_PCIE_PLL_AVDD

4.7uF

4.7uF

4.7uF

NH_B_PCIE_PLL_AVDD

6.3V-10%

NH_CORE_PLL_AVDD

6.3V-10%

6.3V-10%

B3

PWROK

C3

RESET_L

G5

SCL

F4

SDA

AJ5

TEST_MDC

AJ8

TEST_MDIO_DYDB31

V27

TEST_CLK100

V25

TEST_CLK125

V26

TEST_CLK25

AG6

STRAP_BCN_EN

F5

STRAP_DBG_32

AH3

STRAP_HOT_PLUG

AE8

STRAP_HT_16X_DYDBD29

AJ6

STRAP_HT_BERT_DYDBD27

AH7

STRAP_HT_FREQ0_DYDBD24

AG7

STRAP_HT_FREQ1_DYDBD25

AF7

STRAP_HT_FREQ2_DYDBD26

AF8

STRAP_HT_LPBK_DYDBD28

E5

STRAP_I2C_ADDR

AG2

STRAP_PCIE_A0

AH1

STRAP_PCIE_A1

AH2

STRAP_PCIE_B0

AH6

STRAP_PCIE_B1

H4

STRAP_PLL_PWRDN

Y17

A_PCIE_PLL_AVDD

R20

B_PCIE_PLL_AVDD

U20

CORE_PLL_AVDD

I2C Addr=C8h

U_NH

PCIE_INTR_L0
PCIE_INTR_L1
PCIE_INTR_L2
PCIE_INTR_L3
PCIE_INTR_L4

TEST0_DYDBD20
TEST1_DYDBD21
TEST2_DYDBD22
TEST3_DYDBD23

TEST_MODE_EN

TEST_MODE0_DYDBD0
TEST_MODE1_DYDBD1
TEST_MODE2_DYDBD2
TEST_MODE3_DYDBD3

TEST_MODE4_DYDBD30

TEST_MODE5
TEST_MODE6
TEST_MODE7

TEST_MODE8_I2C_SCAN_MODE_TRIG

HA_PLL_AVDD

HB_PLL_AVDD

HT2100 REV0D6
HETERO 5 OF 7

PME_LPONRST_AUX_L
FATAL_L
ALERT_L

WAKE_L

HPINTR_L

RSVD0

RSVD1

RSVD2

RSVD3

RSVD4

RSVD5

RSVD6

H25B4
C4
A3
F25

E27
D26
F26
D27
E26
G26

W26
AK6
AK7
AK8

AE26
AG27
AG28
AG29
AH9
AK5
W28

H5

AJ9
AH8
AK9
AG8
AC26
F27
G27
AD26
AE27

T11

L14

MOD_NH_PME_N

MOD_NH_WAKE_N

MOD_NH_HPINTR_N

PCIIRQ_L0
PCIIRQ_L1
PCIIRQ_L2
PCIIRQ_L3
PCIIRQ_L4

NC_NH_TEST0_DYDBD20MOD_NH_TEST_CLK25
NC_NH_TEST1_DYDBD21
NC_NH_TEST1_DYDBD22
NC_NH_TEST3_DYDBD23

NC_NH_RSVD0
NC_NH_RSVD1
NC_NH_RSVD2
NC_NH_RSVD3
NC_NH_RSVD4
NC_NH_RSVD5
NC_NH_RSVD6

MOD_NH_TEST_MODE_EN

MOD_NH_TEST_MODE0_DB0
MOD_NH_TEST_MODE1_DB1
MOD_NH_TEST_MODE2_DB2
MOD_NH_TEST_MODE3_DB3
MOD_NH_TEST_MODE4_DB30
MOD_NH_TEST_MODE5
MOD_NH_TEST_MODE6
MOD_NH_TEST_MODE7
MOD_NH_TEST_MODE8_FREEZE

NH_HA_PLL_AVDD

NH_HB_PLL_AVDD

49
49
49
49
49

C8609

1 2

GC_FATAL_N
GC_ALERT_N

NP

X

4.7uF

6.3V-10%

8.2K-5%

1 2

R8591

100-5%

1 2

R8708

1 2

1 2

8.2K-5%

1 2

R8592

1 2

R8706

L1848

L1849

NP

X

100-5%

NP

X

68nH 600mA

68nH 600mA

1 2

R8594

1 2

R8704

51,55,138
51,138

8.2K-5%

1 2

R8595

NP

X

100-5%

1 2

R8703

NP

8.2K-5%

1 2

R8596

NP

X

100-5%

1 2

R8697

+1.2V_VCORE_NH

X

8.2K-5%

100-5%

1 2

R8597

1 2

R8702

NP

X

8.2K-5%

1 2

R8601

100-5%

1 2

R8701

NP

X

8.2K-5%

1 2

R8599

100-5%

1 2

R8698

NP

X

8.2K-5%

1 2

R8600

100-5%

1 2

R8707

26

+3.3V

REPLACE

8.2K-5%

1 2

R8598

NP

X

100-5%

1 2

R8699

2

8.2K-5%

3

100-5%

4

1 2

R8562

100-5%

1 2

R8683

100-5%

1 2

R8684

100-5%

1 2

R8685

100-5%

1 2

R8686

100-5%

1 2

R8687

100-5%

1 2

R8688

100-5%

1 2

R8689

100-5%

1 2

R8690

100-5%

1 2

R8691

100-5%

1 2

R8692

1K-1%

X

1 2R8696

1K-1%

X

1 2R8693

1K-1%

1 2R8694

1K-1%

1 2

R8695

100-5%

NORTH HUB MISC & STRAPPINGS

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

C8613

1 2

4.7uF

6.3V-10%

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

REV.

FP975

SHEET

X01

10/20/2006 25 OF 144

DCBA

4

A B C

D

1

2

3

T14
V14

Y14
AE14
AH14

A15

B15

D15

F15

L15

N15

R15

U15

W15
AG15
AK15

M16

P16

T16

F17

L17

N17

R17

U17

W17
AE17
AH17

M18

P18

T18

V18

Y18
AG18

A19

B19

D19

L19

N19

R19

U19

W19
AE19
AH19
AK19

F20

M20

P20

T20

V20

Y20

C21

D21
AG21
AH21
AE22
AJ22
AK22

C23

F23
AG23
AH23

A25

D25

E25

K25

N25

T25
AA25
AE25

Y16

V16

C17
AH25

C26

H26

U26

H27

M27

GND_T14
GND_V14
GND_Y14
GND_AE14
GND_AH14
GND_A15
GND_B15
GND_D15
GND_F15
GND_L15
GND_N15
GND_R15
GND_U15
GND_W15
GND_AG15
GND_AK15
GND_M16
GND_P16
GND_T16
GND_F17
GND_L17
GND_N17
GND_R17
GND_U17
GND_W17
GND_AE17
GND_AH17
GND_M18
GND_P18
GND_T18
GND_V18
GND_Y18
GND_AG18
GND_A19
GND_B19
GND_D19
GND_L19
GND_N19
GND_R19
GND_U19
GND_W19
GND_AE19
GND_AH19
GND_AK19
GND_F20
GND_M20
GND_P20
GND_T20
GND_V20
GND_Y20
GND_C21
GND_D21
GND_AG21
GND_AH21
GND_AE22
GND_AJ22
GND_AK22
GND_C23
GND_F23
GND_AG23
GND_AH23
GND_A25
GND_D25
GND_E25
GND_K25
GND_N25
GND_T25
GND_AA25
GND_AE25
GND_Y16
GND_V16
GND_C17
GND_AH25
GND_C26
GND_H26
GND_U26
GND_H27
GND_M27

U_NH

GND_A1
GND_B1
GND_G1

GND_N1
GND_AB1
GND_AG1
GND_AK1

GND_A2

GND_B2

GND_N2
GND_AK2

GND_D3

GND_F3

GND_H3

GND_K3

GND_M3

GND_P3

GND_T3

GND_V3

GND_Y3
GND_AC3
GND_AD3
GND_AF3

GND_A4

GND_G4

GND_M4

GND_P4

GND_V4
GND_AB4
GND_AD4
GND_AH4

GND_C5

GND_D5
GND_AH5

GND_F6

GND_H6

GND_J6

GND_N6

GND_T6

GND_V6

GND_Y6
GND_AC6
GND_AF6

GND_C7
GND_AE7

GND_A9

GND_D9
GND_AF9
GND_AG9
GND_C10
GND_F10

GND_AJ10
GND_AK10

GND_C11
GND_D11
GND_L11
GND_N11
GND_R11
GND_U11
GND_W11

GND_AE11
GND_AH11

GND_M12
GND_P12
GND_T12
GND_V12
GND_Y12
GND_C13
GND_F13
GND_L13
GND_N13
GND_R13
GND_U13
GND_W13

GND_AG13
GND_AH13

GND_M14
GND_P14

A1
B1
G1
N1
AB1
AG1
AK1
A2
B2
N2
AK2
D3
F3
H3
K3
M3
P3
T3
V3
Y3
AC3
AD3
AF3
A4
G4
M4
P4
V4
AB4
AD4
AH4
C5
D5
AH5
F6
H6
J6
N6
T6
V6
Y6
AC6
AF6
C7
AE7
A9
D9
AF9
AG9
C10
F10
AJ10
AK10
C11
D11
L11
N11
R11
U11
W11
AE11
AH11
M12
P12
T12
V12
Y12
C13
F13
L13
N13
R13
U13
W13
AG13
AH13
M14
P14

+1.2V

REPLACE

+1.2V

REPLACE

X00_DT11885

R10068

0 OHM-5%

R10134

0 OHM-5%

R10067

0 OHM-5%

R10133

0 OHM-5%

R10132

0 OHM-5%

21

+1.2V_VCORE_NH

21

X00_DT11885

21

+1.2V_VPCIE_NH

21

21

25

+3.3V

REPLACE

+1.2V_VCORE_NH

W12
P13
T13
V13
Y13
N14
R14
U14
W14
P15
T15
V15
N16
R16
U16
P17
T17
V17
N18
R18
U18

AE10

Y15
W16
W18

AE18

V19
Y19

AD25

M19
P19
T19
N20
J25
U25

G6
AJ7
AE9
G25
W25

AC25
AA28
AE28

VCORE12_01
VCORE12_02
VCORE12_03
VCORE12_04
VCORE12_05
VCORE12_06
VCORE12_07
VCORE12_08
VCORE12_09
VCORE12_10
VCORE12_11
VCORE12_12
VCORE12_13
VCORE12_14
VCORE12_15
VCORE12_16
VCORE12_17
VCORE12_18
VCORE12_19
VCORE12_20
VCORE12_21

VPCIE_A01
VPCIE_A02
VPCIE_A03
VPCIE_A04
VPCIE_A05
VPCIE_A06
VPCIE_A07
VPCIE_A08

VPCIE_B01
VPCIE_B02
VPCIE_B03
VPCIE_B04
VPCIE_B05
VPCIE_B06

VCC3_00
VCC3_01
VCC3_02
VCC3_03
VCC3_04
VCC3_05
VCC3_06
VCC3_07

6.3V-20%

U_NH

HT2100 REV0D6
HETERO 6 OF 7

X00_DT11886

1 2

100uF

C8731

6.3V-20%
100uF

1 2

VLDT_A01
VLDT_A02
VLDT_A03
VLDT_A04
VLDT_A05
VLDT_A06
VLDT_A07
VLDT_A08

VLDT_B01
VLDT_B02
VLDT_B03
VLDT_B04
VLDT_B05
VLDT_B06
VLDT_B07
VLDT_B08

GND157
GND158
GND159
GND160
GND161
GND162
GND163
GND164
GND165
GND166
GND167
GND168
GND169
GND170
GND171
GND172
GND173
GND174
GND175
GND176
GND177
GND178
GND179
GND180
GND181
GND182
GND183

C8736

VDDP1
VDDP2
VDDP3
VDDP4

C8626

K6
U6
W6
P11
V11
N12
R12
U12

F7
M13
F14
M15
F16
L16
M17
F24

Y11
L12
L20
W20

P27
U27
W27
AF27
AK27
C28
E28
G28
K28
M28
P28
T28
V28
AC28
AH28
C29
W29
A30
B30
C30
H30
M30
R30
W30
AG30
AJ30
AK30

1 2

+1.2V_VLDT

4.7uF

6.3V-10%

C8627

1 2

+2.5V

REPLACE

4.7uF

6.3V-10%

C8625

1 2

4.7uF

6.3V-10%

25

+1.2V_VLDT

6.3V-20%
100uF

1 2

4.7uF

C8628

+1.2V_VPCIE_NH

C9921

C8629

1 2

6.3V-20%
100uF

4.7uF

1 2

6.3V-10%

1 2

C8732

C8630

6.3V-10%

1 2

C8653

1 2

4.7uF

6.3V-10%

X00_DT11886

6.3V-20%

4.7uF

6.3V-10%

C8631

1 2

1 2

100uF

C8655

1 2

4.7uF

6.3V-10%

C9920

4.7uF

C8632

1 2

6.3V-20%

6.3V-10%

4.7uF

1 2

100uF

C8652

1 2

C8633

6.3V-10%

C8733

4.7uF

6.3V-10%

4.7uF

1 2

C8624

1 2

1 2

C8635

1 2

4.7uF

C8654

6.3V-10%

+3.3V

REPLACE

6.3V-20%
100uF

4.7uF

C8618

6.3V-10%

C8644

6.3V-10%

4.7uF

6.3V-10%

1 2

C8737

1 2

1 2

C8636

1 2

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

C8657

1 2

C8619

1 2

C8645

1 2

C8634

1 2

+2.5V

REPLACE

C9799

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

1 2

C8658

1 2

C8620

1 2

C8643

1 2

C8637

1 2

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

C9780

1 2

C8656

1 2

C8621

1 2

C8646

1 2

C8638

1 2

1uF 6.3V

4.7uF

4.7uF

4.7uF

C8659

6.3V-10%

C8622

6.3V-10%

C8647

6.3V-10%

4.7uF

6.3V-10%

1 2

C9782

1 2

1 2

1 2

C8639

1 2

0.1uF 16V

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

C9781

C8660

1 2

C8623

1 2

C8648

1 2

C8640

1 2

1 2

0.1uF 16V

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

C8661

1 2

C8617

1 2

C8649

1 2

C8641

1 2

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4.7uF

6.3V-10%

C8662

1 2

C8616

1 2

C8650

1 2

C8642

1 2

1

2

4.7uF

6.3V-10%

4.7uF

6.3V-10%

3

4.7uF

6.3V-10%

4.7uF

6.3V-10%

4

HT2100 REV0D6

HETERO 7OF 7

NORTH HUB POWER

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

DCBA

4

REV.

X01

26 OF 14410/20/2006

1

A_PCIE PORT 0

A B C

C9103

EXP_NH_0_SB_0_DN

EXP_NH_0_SB_0_DP

EXP_NH_0_SB_1_DN

EXP_NH_0_SB_1_DP

EXP_NH_0_SB_2_DN

EXP_NH_0_SB_2_DP

EXP_NH_0_SB_3_DN

EXP_NH_0_SB_3_DP

EXP_NH_0_SB_4_DN

EXP_NH_0_SB_4_DP

71

71

71

71

71

71

71

71

TO LEFT RISER

71

71

TOP

HT2100

A_PCIE PORT 2

24

24

24

24

24

24

24

24

EXP_NH_2_SB_0_C_DN

EXP_NH_2_SB_0_C_DP

EXP_NH_2_SB_1_C_DN

EXP_NH_2_SB_1_C_DP

EXP_NH_2_SB_2_C_DN

EXP_NH_2_SB_2_C_DP

EXP_NH_2_SB_3_C_DN

EXP_NH_2_SB_3_C_DP

HT2100

24

24

24

24

24

24

24

24

24

24

EXP_NH_0_SB_0_C_DN

EXP_NH_0_SB_0_C_DP

EXP_NH_0_SB_1_C_DN

EXP_NH_0_SB_1_C_DP

EXP_NH_0_SB_2_C_DN

EXP_NH_0_SB_2_C_DP

EXP_NH_0_SB_3_C_DN

EXP_NH_0_SB_3_C_DP

EXP_NH_0_SB_4_C_DN

EXP_NH_0_SB_4_C_DP

1 2

.1uF

16V-10%

C9104

1 2

.1uF

16V-10%

C9109

1 2

.1uF

16V-10%

C9106

1 2

.1uF

16V-10%

C9113

1 2

.1uF

16V-10%

C9076

1 2

.1uF

16V-10%

C9105

1 2

.1uF

16V-10%

C9107

1 2

.1uF

16V-10%

C9108

1 2

.1uF

16V-10%

C9111

1 2

C9094

1 2

.1uF

16V-10%

C9091

1 2

.1uF

16V-10%

C9090

1 2

.1uF

16V-10%

C9087

1 2

.1uF

16V-10%

C9092

1 2

.1uF

16V-10%

C9093

1 2

.1uF

16V-10%

C9088

1 2

.1uF

16V-10%

C9089

1 2

.1uF

16V-10%

EXP_NH_2_SB_0_DN

EXP_NH_2_SB_0_DP

EXP_NH_2_SB_1_DN

EXP_NH_2_SB_1_DP

EXP_NH_2_SB_2_DN

EXP_NH_2_SB_2_DP

EXP_NH_2_SB_3_DN

EXP_NH_2_SB_3_DP

D

1

28

28

28

28

TO PEX8518

28

28

28

28

2

24

24

24

24

24

24

EXP_NH_0_SB_5_C_DN

EXP_NH_0_SB_5_C_DP

EXP_NH_0_SB_6_C_DN

EXP_NH_0_SB_6_C_DP

EXP_NH_0_SB_7_C_DN

EXP_NH_0_SB_7_C_DP

C9110

1 2

.1uF

16V-10%

C9117

1 2

.1uF

16V-10%

C9114

1 2

.1uF

16V-10%

.1uF

16V-10%

C9112

1 2

.1uF

16V-10%

C9115

1 2

.1uF

16V-10%

C9116

1 2

.1uF

16V-10%

EXP_NH_0_SB_5_DN

EXP_NH_0_SB_5_DP

EXP_NH_0_SB_6_DN

EXP_NH_0_SB_6_DP

EXP_NH_0_SB_7_DN

EXP_NH_0_SB_7_DP

71

71

71

71

71

71

24

24

24

24

24

24

24

EXP_NH_3_SB_0_C_DN

EXP_NH_3_SB_0_C_DP

EXP_NH_3_SB_1_C_DN

EXP_NH_3_SB_1_C_DP

EXP_NH_3_SB_2_C_DN

EXP_NH_3_SB_2_C_DP

EXP_NH_3_SB_3_C_DN

C9086

1 2

.1uF

16V-10%

C9082

1 2

.1uF

16V-10%

C9081

1 2

.1uF

16V-10%

C9079

1 2

C9083

1 2

.1uF

16V-10%

C9084

1 2

.1uF

16V-10%

C9080

1 2

.1uF

16V-10%

EXP_NH_3_SB_0_DN

EXP_NH_3_SB_0_DP

EXP_NH_3_SB_1_DN

EXP_NH_3_SB_1_DP

EXP_NH_3_SB_2_DN

EXP_NH_3_SB_2_DP

EXP_NH_3_SB_3_DN

72

2

72

72

72

72

72

72

3

HT2100

A_PCIE PORT 1

24

24

24

24

24

24

24

24

EXP_NH_1_SB_0_C_DN

EXP_NH_1_SB_0_C_DP

EXP_NH_1_SB_1_C_DN

EXP_NH_1_SB_1_C_DP

EXP_NH_1_SB_2_C_DN

EXP_NH_1_SB_2_C_DP

EXP_NH_1_SB_3_C_DN

EXP_NH_1_SB_3_C_DP

C9102

1 2

.1uF

16V-10%

C9098

1 2

.1uF

16V-10%

C9097

1 2

.1uF

16V-10%

C9095

1 2

.1uF

16V-10%

C9099

1 2

.1uF

16V-10%

C9100

1 2

.1uF

16V-10%

C9096

1 2

.1uF

16V-10%

C9101

.1uF

EXP_NH_1_SB_0_DN

EXP_NH_1_SB_0_DP

EXP_NH_1_SB_1_DN

EXP_NH_1_SB_1_DP

EXP_NH_1_SB_2_DN

EXP_NH_1_SB_2_DP

EXP_NH_1_SB_3_DN

EXP_NH_1_SB_3_DP

71

71

71

71

TO LEFT RISER

71

71

71

71

BOTTOM

HT2100

B_PCIE PORT 3

24

24

24

24

24

24

24

24

24

EXP_NH_3_SB_3_C_DP

EXP_NH_3_SB_4_C_DN

EXP_NH_3_SB_4_C_DP

EXP_NH_3_SB_5_C_DN

EXP_NH_3_SB_5_C_DP

EXP_NH_3_SB_6_C_DN

EXP_NH_3_SB_6_C_DP

EXP_NH_3_SB_7_C_DN

EXP_NH_3_SB_7_C_DP

.1uF

16V-10%

C9078

1 2

.1uF

16V-10%

C9074

1 2

.1uF

16V-10%

C9073

1 2

.1uF

16V-10%

C9070

1 2

.1uF

16V-10%

C9085

1 2

.1uF

16V-10%

C9075

1 2

.1uF

16V-10%

C9077

1 2

.1uF

16V-10%

C9071

1 2

.1uF

16V-10%

C90721 2

1 2

16V-10% .1uF

16V-10%

EXP_NH_3_SB_3_DP

EXP_NH_3_SB_4_DN

EXP_NH_3_SB_4_DP

EXP_NH_3_SB_5_DN

EXP_NH_3_SB_5_DP

EXP_NH_3_SB_6_DN

EXP_NH_3_SB_6_DP

EXP_NH_3_SB_7_DN

EXP_NH_3_SB_7_DP

72

TO CENTER RISER

72

72

72

72

3

72

72

72

72

4

PCIE AC COUPLING CAPACITORS

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

REV.

FP975

X01

SHEET

10/20/2006 27 OF 144

DCBA

4

A B C

28

EXP_NH_2_NB_0_C_DP

C9125

1 2

D

EXP_NH_2_NB_0_DP

24

1

2

3

+3.3V

REPLACE

1 2R8873

4.7K-5%

1 2R8867 MOD_PEX_HP_BTN_0_N

4.7K-5%

1 2R8868

4.7K-5%

1 2R8869

4.7K-5%

1 2R8870

NC_PEX_HP_PWRLED_0_N
MOD_PEX_HP_PRSNT_0_N
NC_PEX_HP_ATNLED_0_N
MOD_PEX_HP_PWRFLT_0_N

MOD_PEX_HP_MRL_0_N
NC_PEX_HP_PWREN_0_N
NC_PEX_HP_PERST_0_N
NC_PEX_HP_CLKEN_0_N

4.7K-5%

1 2R8872

4.7K-5%

1 2R8871

4.7K-5%

1 2R8880

4.7K-5%

1 2R8874

MOD_PEX_HP_BTN_1_N
NC_PEX_HP_PWRLED_1_N
MOD_PEX_HP_PRSNT_1_N
NC_PEX_HP_ATNLED_1_N
MOD_PEX_HP_PWRFLT_1_N

MOD_PEX_HP_MRL_1_N
NC_PEX_HP_PWREN_1_N
NC_PEX_HP_PERST_1_N
NC_PEX_HP_CLKEN_1_N

4.7K-5%

1 2R8875

4.7K-5%

1 2R8876

4.7K-5%

1 2R8877

4.7K-5%

1 2R8878

MOD_PEX_HP_BTN_2_N
NC_PEX_HP_PWRLED_2_N
MOD_PEX_HP_PRSNT_2_N
NC_PEX_HP_ATNLED_2_N
MOD_PEX_HP_PWRFLT_2_N

MOD_PEX_HP_MRL_2_N
NC_PEX_HP_PWREN_2_N
NC_PEX_HP_PERST_2_N
NC_PEX_HP_CLKEN_2_N

4.7K-5%

1 2R8879

4.7K-5%

1 2R8887

4.7K-5%

1 2R8881

4.7K-5%

1 2R8882

MOD_PEX_HP_BTN_3_N
NC_PEX_HP_PWRLED_3_N
MOD_PEX_HP_PRSNT_3_N
NC_PEX_HP_ATNLED_3_N
MOD_PEX_HP_PWRFLT_3_N

MOD_PEX_HP_MRL_3_N
NC_PEX_HP_PWREN_3_N
NC_PEX_HP_PERST_3_N
NC_PEX_HP_CLKEN_3_N

4.7K-5%

1 2R8883

4.7K-5%

1 2R8884

4.7K-5%

1 2R8885

4.7K-5%

MOD_PEX_HP_BTN_4_N
NC_PEX_HP_PWRLED_4_N
MOD_PEX_HP_PRSNT_4_N
NC_PEX_HP_ATNLED_4_N
MOD_PEX_HP_PWRFLT_4_N

MOD_PEX_HP_MRL_4_N
NC_PEX_HP_PWREN_4_N
NC_PEX_HP_PERST_4_N
NC_PEX_HP_CLKEN_4_N

96,138

PEX_LANE_GOOD_0_N
NC_PEX_LANE_GOOD_1_N
NC_PEX_LANE_GOOD_2_N

96,138
96,138

PEX_LANE_GOOD_3_N
PEX_LANE_GOOD_4_N
NC_PEX_LANE_GOOD_5_N
NC_PEX_LANE_GOOD_6_N

96,138
96,138

PEX_LANE_GOOD_7_N
PEX_LANE_GOOD_8_N
NC_PEX_LANE_GOOD_9_N
NC_PEX_LANE_GOOD_10_N

96,138
96,138

PEX_LANE_GOOD_11_N
PEX_LANE_GOOD_12_N
NC_PEX_LANE_GOOD_13_N
NC_PEX_LANE_GOOD_14_N

96,138

PEX_LANE_GOOD_15_N

A1

HP_BUTTON_0_N

F3

HP_PWRLED_0_N

D1

HP_PRSNT_0_N

B2

HP_ATNLED_0_N

E4

HP_PWRFLT_0_N

B1

HP_MRL_0_N

D2

HP_PWREN_0_N

E2

HP_PERST_0_N

E1

HP_CLKEN_0_N

C8

HP_BUTTON_1_N

A3

HP_PWRLED_1_N

A5

HP_PRSNT_1_N

B8

HP_ATNLED_1_N

B7

HP_PWRFLT_1_N

D8

HP_MRL_1_N

B6

HP_PWREN_1_N

D6

HP_PERST_1_N

C4

HP_CLKEN_1_N

A19

HP_BUTTON_2_N

C22

HP_PWRLED_2_N

A22

HP_PRSNT_2_N

C18

HP_ATNLED_2_N

A21

HP_PWRFLT_2_N

D18

HP_MRL_2_N

C20

HP_PWREN_2_N

B22

HP_PERST_2_N

D22

HP_CLKEN_2_N

B13

HP_BUTTON_3_N

D16

HP_PWRLED_3_N

B16

HP_PRSNT_3_N

E13

HP_ATNLED_3_N

B15

HP_PWRFLT_3_N

C14

HP_MRL_3_N

C16

HP_PWREN_3_N

D15

HP_PERST_3_N

C17

HP_CLKEN_3_N

E20

HP_BUTTON_4_N

G20

HP_PWRLED_4_N

G19

HP_PRSNT_4_N

E21

HP_ATNLED_4_N

G18

HP_PWRFLT_4_N

F20

HP_MRL_4_N

E22

HP_PWREN_4_N

F22

HP_PERST_4_N

H20

HP_CLKEN_4_N

C6

PEX_LANE_GOOD_0_N

B5

PEX_LANE_GOOD_1_N

C5

PEX_LANE_GOOD_2_N

B3

PEX_LANE_GOOD_3_N

D4

PEX_LANE_GOOD_4_N

D3

PEX_LANE_GOOD_5_N

C1

PEX_LANE_GOOD_6_N

E3

PEX_LANE_GOOD_7_N

B21

PEX_LANE_GOOD_8_N

B20

PEX_LANE_GOOD_9_N

C19

PEX_LANE_GOOD_10_N

B19

PEX_LANE_GOOD_11_N

D17

PEX_LANE_GOOD_12_N

B18

PEX_LANE_GOOD_13_N

A17

PEX_LANE_GOOD_14_N

B17

PEX_LANE_GOOD_15_N

U_PCIE_SW

PEX_PETP_0

PEX_PETN_0_N

PEX_PERP_0

PEX_PERN_0_N

PEX_PETP_1

PEX_PETN_1_N

PEX_PERP_1

PEX_PERN_1_N

PEX_PETP_2

PEX_PETN_2_N

PEX_PERP_2

PEX_PERN_2_N

PEX_PETP_3

PEX_PETN_3_N

PEX_PERP_3

PEX_PERN_3_N

PEX_PETP_4

PEX_PETN_4_N

PEX_PERP_4

PEX_PERN_4_N

PEX_PETP_5

PEX_PETN_5_N

PEX_PERP_5

PEX_PERN_5_N

PEX_PETP_6

PEX_PETN_6_N

PEX_PERP_6

PEX_PERN_6_N

PEX_PETP_7

PEX_PETN_7_N

PEX_PERP_7

PEX_PERN_7_N

PEX_PETP_8

PEX_PETN_8_N

PEX_PERP_8

PEX_PERN_8_N

PEX_PETP_9

PEX_PETN_9_N

PEX_PERP_9

PEX_PERN_9_N

PEX_PETP_10

PEX_PETN_10_N

PEX_PERP_10

PEX_PERN_10_N

PEX_PETP_11

PEX_PETN_11_N

PEX_PERP_11

PEX_PERN_11_N

PEX_PETP_12

PEX_PETN_12_N

PEX_PERP_12

PEX_PERN_12_N

PEX_PETP_13

PEX_PETN_13_N

PEX_PERP_13

PEX_PERN_13_N

PEX_PETP_14

PEX_PETN_14_N

PEX_PERP_14

PEX_PERN_14_N

PEX_PETP_15

PEX_PETN_15_N

PEX_PERP_15

PEX_PERN_15_N

NC_SPARE0
NC_SPARE1
NC_SPARE2

M2
M1
M4
M5
P2
P1
P4
P5
T2
T1
T4
T5
V2
V1
V4
W4
AA4
AB4
AB2
AA2
AA6
AB6
V6
W6
AA8
AB8
V8
W8
AA10
AB10
V10
W10
AA12
AB12
V12
W12
AA14
AB14
V14
W14
AA16
AB16
V16
W16
AA18
AB18
W18
W19
W21
W22
AA22
AA21
U21
U22
U18
U19
R21
R22
R18
R19
N21
N22
N18
N19

D12
F18
L18

EXP_NH_2_NB_0_C_DP
EXP_NH_2_NB_0_C_DN
EXP_NH_2_SB_0_DP
EXP_NH_2_SB_0_DN
EXP_NH_2_NB_1_C_DP
EXP_NH_2_NB_1_C_DN
EXP_NH_2_SB_1_DP
EXP_NH_2_SB_1_DN
EXP_NH_2_NB_2_C_DP
EXP_NH_2_NB_2_C_DN
EXP_NH_2_SB_2_DP
EXP_NH_2_SB_2_DN
EXP_NH_2_NB_3_C_DP
EXP_NH_2_NB_3_C_DN
EXP_NH_2_SB_3_DP
EXP_NH_2_SB_3_DN
EXP_PEX_1_SB_0_C_DP
EXP_PEX_1_SB_0_C_DN
EXP_PEX_1_NB_0_DP
EXP_PEX_1_NB_0_DN
EXP_PEX_1_SB_1_C_DP
EXP_PEX_1_SB_1_C_DN
EXP_PEX_1_NB_1_DP
EXP_PEX_1_NB_1_DN
EXP_PEX_1_SB_2_C_DP
EXP_PEX_1_SB_2_C_DN
EXP_PEX_1_NB_2_DP
EXP_PEX_1_NB_2_DN
EXP_PEX_1_SB_3_C_DP
EXP_PEX_1_SB_3_C_DN
EXP_PEX_1_NB_3_DP
EXP_PEX_1_NB_3_DN
EXP_PEX_2_SB_0_C_DP
EXP_PEX_2_SB_0_C_DN
EXP_PEX_2_NB_0_DP
EXP_PEX_2_NB_0_DN
EXP_PEX_2_SB_1_C_DP
EXP_PEX_2_SB_1_C_DN
EXP_PEX_2_NB_1_DP
EXP_PEX_2_NB_1_DN
EXP_PEX_2_SB_2_C_DP
EXP_PEX_2_SB_2_C_DN
EXP_PEX_2_NB_2_DP
EXP_PEX_2_NB_2_DN
EXP_PEX_2_SB_3_C_DP
EXP_PEX_2_SB_3_C_DN
EXP_PEX_2_NB_3_DP
EXP_PEX_2_NB_3_DN
EXP_PEX_3_SB_0_C_DP
EXP_PEX_3_SB_0_C_DN
EXP_PEX_3_NB_0_DP
EXP_PEX_3_NB_0_DN
EXP_PEX_3_SB_1_C_DP
EXP_PEX_3_SB_1_C_DN
EXP_PEX_3_NB_1_DP
EXP_PEX_3_NB_1_DN
EXP_PEX_3_SB_2_C_DP
EXP_PEX_3_SB_2_C_DN
EXP_PEX_3_NB_2_DP
EXP_PEX_3_NB_2_DN
EXP_PEX_3_SB_3_C_DP
EXP_PEX_3_SB_3_C_DN
EXP_PEX_3_NB_3_DP
EXP_PEX_3_NB_3_DN

NC_PEX_SPARE0
NC_PEX_SPARE1
NC_PEX_SPARE2

27
27

27
27

27
27

27
27

82
82

82
82

82
82

82
82

84
84

84
84

84
84

84
84

70
70

70
70

70
70

70
70

28
28

28
28

28
28

28
28

28
28

28
28

28
28

28
28

28
28

28
28

28
28

28
28

28
28

28
28

28
28

28
28

SW Port 0
To HT2100 Port 2

SW Port 1
To LOM1

SW Port 2
To LOM2

SW Port 3
To Sideplane

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

EXP_NH_2_NB_0_C_DN

EXP_NH_2_NB_1_C_DP

EXP_NH_2_NB_1_C_DN

EXP_NH_2_NB_2_C_DP

EXP_NH_2_NB_2_C_DN

EXP_NH_2_NB_3_C_DP

EXP_NH_2_NB_3_C_DN

EXP_PEX_1_SB_0_C_DP

EXP_PEX_1_SB_0_C_DN

EXP_PEX_1_SB_1_C_DP

EXP_PEX_1_SB_1_C_DN

EXP_PEX_1_SB_2_C_DP

EXP_PEX_1_SB_2_C_DN

EXP_PEX_1_SB_3_C_DP

EXP_PEX_1_SB_3_C_DN

EXP_PEX_2_SB_0_C_DP

EXP_PEX_2_SB_0_C_DN

EXP_PEX_2_SB_1_C_DP

EXP_PEX_2_SB_1_C_DN

EXP_PEX_2_SB_2_C_DP

EXP_PEX_2_SB_2_C_DN

EXP_PEX_2_SB_3_C_DP

EXP_PEX_2_SB_3_C_DN

EXP_PEX_3_SB_0_C_DP

EXP_PEX_3_SB_0_C_DN

EXP_PEX_3_SB_1_C_DP

EXP_PEX_3_SB_1_C_DN

EXP_PEX_3_SB_2_C_DP

.1uF

16V-10%

C9121

1 2

.1uF

16V-10%

C9120

1 2

.1uF

16V-10%

C9118

1 2

.1uF

16V-10%

C9126

1 2

.1uF

16V-10%

C9128

1 2

.1uF

16V-10%

C9130

1 2

.1uF

16V-10%

C9132

1 2

.1uF

16V-10%

C9134

1 2

.1uF

16V-10%

C9136

1 2

.1uF

16V-10%

C9138

1 2

.1uF

16V-10%

C9140

1 2

.1uF

16V-10%

C9142

1 2

.1uF

16V-10%

C9144

1 2

.1uF

16V-10%

C9146

1 2

C9122

1 2

.1uF

16V-10%

C9123

1 2

.1uF

16V-10%

C9119

1 2

.1uF

16V-10%

C9124

1 2

.1uF

16V-10%

C9127

1 2

.1uF

16V-10%

C9129

1 2

.1uF

16V-10%

C9131

1 2

.1uF

16V-10%

C9133

1 2

.1uF

16V-10%

C9135

1 2

.1uF

16V-10%

C9137

1 2

.1uF

16V-10%

C9139

1 2

.1uF

16V-10%

C9141

1 2

.1uF

16V-10%

C9143

1 2

.1uF

16V-10%

C9145

1 2

.1uF

16V-10%

EXP_NH_2_NB_0_DN

EXP_NH_2_NB_1_DP

EXP_NH_2_NB_1_DN

EXP_NH_2_NB_2_DP

EXP_NH_2_NB_2_DN

EXP_NH_2_NB_3_DP

EXP_NH_2_NB_3_DN

EXP_PEX_1_SB_0_DP

EXP_PEX_1_SB_0_DN

EXP_PEX_1_SB_1_DP

EXP_PEX_1_SB_1_DN

EXP_PEX_1_SB_2_DP

EXP_PEX_1_SB_2_DN

EXP_PEX_1_SB_3_DP

EXP_PEX_1_SB_3_DN

EXP_PEX_2_SB_0_DP

EXP_PEX_2_SB_0_DN

EXP_PEX_2_SB_1_DP

EXP_PEX_2_SB_1_DN

EXP_PEX_2_SB_2_DP

EXP_PEX_2_SB_2_DN

EXP_PEX_2_SB_3_DP

EXP_PEX_2_SB_3_DN

EXP_PEX_3_SB_0_DP

EXP_PEX_3_SB_0_DN

EXP_PEX_3_SB_1_DP

EXP_PEX_3_SB_1_DN

EXP_PEX_3_SB_2_DP

24

24

24

1

24

24

24

24

81

81

81

81

81

81

2

81

81

83

83

83

83

83

83

83

83

3

70

70

70

70

70

4

PEX8518AA

HETERO 1 OF 3

PCIE SWITCH

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

EXP_PEX_3_SB_2_C_DN

28

EXP_PEX_3_SB_3_C_DP

28

EXP_PEX_3_SB_3_C_DN

28

.1uF

16V-10%

C9148

1 2

.1uF

16V-10%

16V-10%

16V-10%

TITLE

DWG NO.

DATE

C9147

1 2

EXP_PEX_3_SB_2_DN

.1uF

EXP_PEX_3_SB_3_DP

C9149

1 2

EXP_PEX_3_SB_3_DN

.1uF

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

FP975

SHEET

70

70

70

4

REV.

X01

28 OF 14410/20/2006

DCBA

1

2

3

A B C

45

AC coupling caps, close to PEX8518

45

24

AC coupling caps, close to PEX8518

24

X00_DT11887

MOD_PEX_PORTCFG[4:0]

00000

*

00010
00011
00100
00101
00110
01000
01001 x4,x4,x4,x2,x2
Others Reserved

CK_100M_PCIE_PEX_C_DP

CK_100M_PCIE_PEX_C_DN

CK_100M_PCIE_NH_2_C_DP

CK_100M_PCIE_NH_2_C_DN

+3.3V

REPLACE

R9132

1 2

R9130

4.7K-5%

1 2

x4,x4,x4,x4,x0
x8,x8,x0,x0,x0
x8,x4,x4,x0,x0
x8,x4,x2,x2,x0
x8,x2,x2,x4,x0
x8,x2,x4,x2,x0
x8,x2,x2,x2,x2

R9129

4.7K-5%

1 2

Mode_Sel[1:0]

00
01
10
11

*

R8906

4.7K-5%

Reserved
Intelligent Adapter
Dual Host
Transparent

4.7K-5%

1 2

MOD_PEX_PORTCFG_0
MOD_PEX_PORTCFG_1
MOD_PEX_PORTCFG_2

MOD_PEX_PORTCFG_3
MOD_PEX_PORTCFG_4

C9349

21

0.01uF

50V-10%

C9350

21

0.01uF

50V-10%

C9919

NP

50V-10%

NP

50V-10%

R8905

1 2

SSC_XING_ENA=0, Single clock domain for all ports

R8904

4.7K-5%

21

0.01uF

C9918

0.01uF

X

+3.3V

21

REPLACE

X

R9133

1 2

1 2

1, Dual clock domain for upstream port

1 2

I2C_ADDR=70h

R8907

4.7K-5%

R8898

4.7K-5%

1 2

29
29

29
29
29

4.7K-5%

R9134

4.7K-5%

R8908

1 2

R8889

No Dual clock domain, REFCLK_CFC Left floating

R8896

4.7K-5%

1 2

R8897

4.7K-5%

1 2

0000 = Port 0 is Upstream

4.7K-5%

1 2

+3.3V

REPLACE

NP

R9138

X

1 2

1 2

4.7K-5%

R8895

4.7K-5%

1 2

R8902

NP

R9139

X

4.7K-5%

1 2

R8894

4.7K-5%

4.7K-5%

1 2

R8888

NP

R9140

X

4.7K-5%

1 2

R8901

1 2

R8892

1 2

R8899

4.7K-5%

4.7K-5%

1 2

4.7K-5%

R8891

4.7K-5%

4.7K-5%

1 2

R8900

1 2

1 2

4.7K-5%

+3.3V

REPLACE

R8890

4.7K-5%

1 2

96,138

CK_100M_PCIE_PEX_DP
CK_100M_PCIE_PEX_DN

CK_100M_PCIE_NH_2_DP
CK_100M_PCIE_NH_2_DN

R9128

1 2

4.7K-5%

R8893

1 2

4.7K-5%

MOD_PEX_NT_UPORT_SEL_0
MOD_PEX_NT_UPORT_SEL_1
MOD_PEX_NT_UPORT_SEL_2
MOD_PEX_NT_UPORT_SEL_3

R8903

4.7K-5%

1 2

MOD_PEX_FACTORY_TEST_3_N

MOD_PEX_FACTORY_TEST_4_N
MOD_PEX_FACTORY_TEST_5_N

MOD_PEX_TEST_MODE_1
MOD_PEX_TEST_MODE_2
MOD_PEX_TEST_MODE_3

MOD_PEX_FACTORY_TEST_2_N
MOD_PEX_FACTORY_TEST_1_N

MOD_PEX_FACTORY_TEST_6_N

MOD_PEX_SSC_XING_ENA

52
52

138

+3.3V

REPLACE

4.7K-5%

1 2

MOD_PEX_TMS
MOD_PEX_TRST_N
MOD_PEX_TCK
MOD_PEX_TDI
TP_MOD_PEX_TDO

PEX_PERST_N
NC_PEX_NT_RESET_N

NC_PEX_EECS_N
NC_PEX_EEDI
MOD_PEX_EEDO
NC_PEX_EESK

MOD_PEX_EEPR_N

96,138

MOD_PEX_MODE_SEL_0
MOD_PEX_MODE_SEL_1

MOD_PEX_UPORT_SEL_0
MOD_PEX_UPORT_SEL_1
MOD_PEX_UPORT_SEL_2
MOD_PEX_UPORT_SEL_3

29
29

4.7K-5%

29
29
29

MOD_PEX_TEST_MODE_0

I2C_PEX_SCL
I2C_PEX_SDA

MOD_PEX_I2C_ADDR_0
MOD_PEX_I2C_ADDR_1
MOD_PEX_I2C_ADDR_2

PEX_FATAL_ERR_N

PEX_PROCMON

MOD_PEX_PORTCFG_0
MOD_PEX_PORTCFG_1
MOD_PEX_PORTCFG_2
MOD_PEX_PORTCFG_3
MOD_PEX_PORTCFG_4

R9141

1 2

C10

JTAG_TMS

C9

JTAG_TRST_N

A9

JTAG_TCK

B9

JTAG_TDI

B10

JTAG_TDO

H2

PEX_PERST_N

D10

PEX_NT_RESET_N

K1

PEX_REFCLKP

K2

PEX_REFCLKN

K4

PEX_REFCLK_CFCP

K5

PEX_REFCLK_CFCN

J20

EE_CS_N

J21

EE_DI

G21

EE_DO

H22

EE_SK

J22

EE_PR_N

G4

N/C

B14

STRAP_NT_UPSTRM_PORT_SEL_0

A15

STRAP_NT_UPSTRM_PORT_SEL_1

A14

STRAP_NT_UPSTRM_PORT_SEL_2

C15

STRAP_NT_UPSTRM_PORT_SEL_3

D11

STRAP_MODE_SEL_0

E11

STRAP_MODE_SEL_1

A7

STRAP_UPSTRM_PORT_SEL_0

C7

STRAP_UPSTRM_PORT_SEL_1

E8

STRAP_UPSTRM_PORT_SEL_2

D7

STRAP_UPSTRM_PORT_SEL_3

J19

STRAP_PORTCFG_0

H19

STRAP_PORTCFG_1

F19

STRAP_PORTCFG_2

E19

STRAP_PORTCFG_3

D20

STRAP_PORTCFG_4

C11

STRAP_FACTORY_TEST3_N

C13

STRAP_FACTORY_TEST4_N

D13

STRAP_FACTORY_TEST5_N

B11

STRAP_TEST_MODE_0

A12

STRAP_TEST_MODE_1

B12

STRAP_TEST_MODE_2

C12

STRAP_TEST_MODE_3

K19

STRAP_FACTORY_TEST2_N

G3

STRAP_FACTORY_TEST1_N

F2

STRAP_FACTORY_TEST6_N

F1

STRAP_SSC_XING_ENA

K22

I2C_SCL

K20

I2C_SDA

L22

I2C_ADDR0

L21

I2C_ADDR1

L20

I2C_ADDR2

L19

FATAL_ERR_N

H1

WAKE_N

U_PCIE_SW

PEX8518AA

HETERO 2 OF 3

+3.3V

REPLACE

21

C9364

21

10uF

C9365

6.3V-20%

VDD33X

VDD33_A6
VDD33_A10
VDD33_A13
VDD33_A20

VDD33_B4

VDD33_C2

VDD33_D9
VDD33_D14
VDD33_D19
VDD33_D21
VDD33_E16

VDD33_F4
VDD33_F21

VDD33_G2
VDD33_H21
VDD33_K21
VDD33_M20

VDD33A

VTT_PEX_0
VTT_PEX_1
VTT_PEX_2
VTT_PEX_3
VTT_PEX_4
VTT_PEX_5
VTT_PEX_6
VTT_PEX_7

VSSA_PLL

VSS_J9
VSS_J10
VSS_J11
VSS_J12
VSS_J13
VSS_J14

VSS_K9
VSS_K10
VSS_K11
VSS_K12
VSS_K13
VSS_K14

VSS_L9
VSS_L10
VSS_L11
VSS_L12
VSS_L13
VSS_L14

VSS_M9
VSS_M10
VSS_M11
VSS_M12
VSS_M13
VSS_M14

VSS_N9
VSS_N10
VSS_N11
VSS_N12
VSS_N13
VSS_N14

VSS_P9
VSS_P10
VSS_P11
VSS_P12
VSS_P13
VSS_P14

.1uF

10V-10%

J3

A6
A10
A13
A20
B4
C2
D9
D14
D19
D21
E16
F4
F21
G2
H21
K21
M20

H3

N1
U1
AB5
AB9
AB13
AB17
V22
P22

H4

J9
J10
J11
J12
J13
J14
K9
K10
K11
K12
K13
K14
L9
L10
L11
L12
L13
L14
M9
M10
M11
M12
M13
M14
N9
N10
N11
N12
N13
N14
P9
P10
P11
P12
P13
P14

21

C9366

21

.1uF

C9367

10V-10%

VDD33A_PEX

.1uF

10V-10%

C9300

21

C9368

21

.1uF

10V-10%

.1uF

16V-10%

+3.3V

REPLACE

R9108

1 2

0 OHM-5%

+1.5V

REPLACE

+3.3V

REPLACE

+1.5V

REPLACE

A2
A4

A8
A11
A16
A18

C3
C21

E6
E10
E14

F5
G22

H5

J2
J18

K3

L1

L4

M3
M19
M22

N3

N4
N20

P3
P19
P20

R1

R4
R20

T3
T19
T22

U3

U4
U20

V3
V19
V20

W1

W5

W7

W9
W11
W13
W15
W17
W20

Y4

Y5

Y6

Y8

Y9
Y10
Y12
Y13
Y14
Y16
Y17
Y18
Y22
AA1
AB1

AB11
AB15
AB19
AB21
AB22

AB3
AB7

VSS_A2
VSS_A4
VSS_A8
VSS_A11
VSS_A16
VSS_A18
VSS_C3
VSS_C21
VSS_E6
VSS_E10
VSS_E14
VSS_F5
VSS_G22
VSS_H5
VSS_J2
VSS_J18
VSS_K3
VSS_L1
VSS_L4
VSS_M3
VSS_M19
VSS_M22
VSS_N3
VSS_N4
VSS_N20
VSS_P3
VSS_P19
VSS_P20
VSS_R1
VSS_R4
VSS_R20
VSS_T3
VSS_T19
VSS_T22
VSS_U3
VSS_U4
VSS_U20
VSS_V3
VSS_V19
VSS_V20
VSS_W1
VSS_W5
VSS_W7
VSS_W9
VSS_W11
VSS_W13
VSS_W15
VSS_W17
VSS_W20
VSS_Y4
VSS_Y5
VSS_Y6
VSS_Y8
VSS_Y9
VSS_Y10
VSS_Y12
VSS_Y13
VSS_Y14
VSS_Y16
VSS_Y17
VSS_Y18
VSS_Y22
VSS_AA1
VSS_AB1
VSS_AB11
VSS_AB15
VSS_AB19
VSS_AB21
VSS_AB22
VSS_AB3
VSS_AB7

U_PCIE_SW

PEX8518AA

HETERO 3 OF 3

D

VDD10S_J1
VDD10S_J4
VDD10S_L2
VDD10S_L3

VDD10S_M21

VDD10S_N5

VDD10S_P21

VDD10S_R2
VDD10S_R3

VDD10S_T20

VDD10S_U2
VDD10S_V18
VDD10S_V21

VDD10S_W2

VDD10S_W3
VDD10S_Y11
VDD10S_Y15
VDD10S_Y19
VDD10S_Y20
VDD10S_Y21

VDD10S_Y3

VDD10S_Y7
VDD10S_AA3
VDD10S_AA5
VDD10S_AA9

VDD10S_AA11
VDD10S_AA13
VDD10S_AA17
VDD10S_AA19

VDD10_E5
VDD10_E7

VDD10_E9
VDD10_E12
VDD10_E15
VDD10_E17

VDD10_G5
VDD10_H18

VDD10_J5
VDD10_K18
VDD10_M18
VDD10_T18

VDD10_U5

VDD10_V5

VDD10_V7
VDD10_V11
VDD10_V13
VDD10_V17

VDD10A_L5
VDD10A_R5

VDD10A_P18

VDD10A_V9

VDD10A_V15

VDD10X_G1
VDD10X_N2

VDD10X_AA7

VDD10X_AA15

VDD10X_T21

NC_D5

NC_E18

NC_Y1

NC_Y2
NC_AA20
NC_AB20

J1
J4
L2
L3
M21
N5
P21
R2
R3
T20
U2
V18
V21
W2
W3
Y11
Y15
Y19
Y20
Y21
Y3
Y7
AA3
AA5
AA9
AA11
AA13
AA17
AA19

E5
E7
E9
E12
E15
E17
G5
H18
J5
K18
M18
T18
U5
V5
V7
V11
V13
V17

PEX_VDD10A

L5
R5
P18
V9
V15

G1
N2
AA7
AA15
T21

D5
E18
Y1
Y2
AA20
AB20

+1V

1

2

R9919

1 2

0 OHM-5%

29

3

NC_PEX_D5
NC_PEX_E18
NC_PEX_Y1
NC_PEX_Y2
NC_PEX_AA20
NC_PEX_AB20

4

+1V

21

C9338

R9145

1 2

21

C9339

22uF 6.3V

R9144

4.7K-5%

1 2

21

C9344

22uF 6.3V

R9143

4.7K-5%

1 2

10uF

C9345

6.3V-20%

4.7K-5%

21

R9142

1 2

10uF

C9346

6.3V-20%

R9146

4.7K-5%

21

10uF

4.7K-5%

1 2

21

C9347

6.3V-20%

10uF

C9298

6.3V-20%

21

1uF

PCIE SWITCH

21

C9299

6.3V-20%

1uF

C9362

6.3V-20%

R9135

1 2

21

.1uF

21

C9356

10V-10%

.1uF

21

C9357

10V-10%

R9136

4.7K-5%

.1uF

C9358

10V-10%

1 2

21

R9137

4.7K-5%

1 2

.1uF

C9359

10V-10%

4.7K-5%

21

.1uF

10V-10%

21

C9360

.1uF

10V-10%

21

C9361

R9374

1 2

4.7K-5%

.1uF

C9363

10V-10%

4.7K-5%

21

MOD_PEX_WAKE_N

21

.1uF

21

C9291

10V-10%

.01uF

16V-10%

21

C9290

.01uF

21

C9285

16V-10%

.01uF

21

C9286

16V-10%

.01uF

16V-10%

Do NOT share VDD10A power vias with other 1.0V power pins

21

C9287

.01uF

16V-10%

21

C9288

.01uF

21

C9289

16V-10%

.01uF

16V-10%

21

C9308

C9309

.022uF

16V-10%

21

C9310

.022uF

16V-10%

21

29

.022uF

16V-10%

PEX_VDD10A

21

C9292

.01uF

16V-10%

21

C9311

.022uF

16V-10%

C9348

10uF

21

C9372

6.3V-20%

.1uF

10V-10%

21

C9371

TITLE

.1uF

10V-10%

21

C9369

.1uF

10V-10%

21

C9370

.1uF

10V-10%

INC.

21

C9294

.01uF

21

C9293

16V-10%

.01uF

16V-10%

ROUND ROCK,TEXAS

4

SCHEM,PLN,SV,PE_BULN

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

REV.

FP975

SHEET

X01

10/20/2006 29 OF 144

DCBA

A B C

D

1

+VCORE_CPU1

+MEM_CPU1

21

C8933

21

C8934

22uF 6.3V

22uF 6.3V

C8973

21

10uF 6.3V

21

C8974

21

C8975

10uF 6.3V

21

C8976

10uF 6.3V

21

C8977

10uF 6.3V

21

C8981

10uF 6.3V

21

C8980

10uF 6.3V

10uF 6.3V

21

C8979

21

C8982

10uF 6.3V

21

C8978

10uF 6.3V

21

C8986

10uF 6.3V

21

C8985

10uF 6.3V

21

C8984

10uF 6.3V

21

C8987

10uF 6.3V

21

C8983

10uF 6.3V

21

C8989

10uF 6.3V

21

C8988

10uF 6.3V

C8880

10uF 6.3V

1 2

.22uF

10V-20%

1 2

C8881

.22uF

10V-20%

1 2

C8882

.22uF

10V-20%

21

C8787

.01uF

16V-10%

C8764

1 2

1800pF

50V-10%

+MEM_CPU1

+VTT_CPU1

21

C8793

.1uF

16V-10%

21

C8794

.1uF

C8795

16V-10%

+VTT_CPU1

21

.1uF

21

C8796

16V-10%

.1uF

16V-10%

21

C8797

.1uF

16V-10%

21

C8802

.1uF

16V-10%

21

C8801

.1uF

16V-10%

21

C8800

.1uF

16V-10%

21

C8799

.1uF

16V-10%

21

C8798

.1uF

16V-10%

21

C9835

.1uF

16V-10%

21

C9834

.1uF

16V-10%

1

2

21

C8991

+1.2V_VLDT +1.2V_VLDT +1.2V_VLDT

21

21

C8990

10uF 6.3V

21

10uF 6.3V

21

C8951

4.7uF

21

C8950

6.3V-10%

4.7uF

C8949

6.3V-10%

21

4.7uF

C8948

6.3V-10%

21

4.7uF

6.3V-10%

1 2

C8888

.22uF

10V-20%

21

1 2

C8887

.22uF

10V-20%

21

1 2

C8886

.22uF

10V-20%

1 2

C8885

.22uF

10V-20%

1 2

C8884

.22uF

10V-20%

1 2

C8883

.22uF

10V-20%

21

C8789

.01uF

16V-10%

21

C8788

.01uF

16V-10%

21

C8766

1 2

21

C8765

1800pF

50V-10%

1 2

1800pF

50V-10%

C9818

1 2

C9819

1800pF

50V-10%

1 2

C9820

1800pF

50V-10%

C9823

1 2

1 2

C9821

1800pF

50V-10%

C9824

1800pF

50V-10%

1 2

1 2

C9822

1800pF

50V-10%

C9825

1800pF

50V-10%

1 2

1 2

1800pF

50V-10%

1800pF

50V-10%

+MEM_CPU1

21

21

C8812

+VTT_CPU1

.1uF

21

C8811

16V-10%

.1uF

16V-10%

21

C8810

.1uF

16V-10%

21

C8809

.1uF

16V-10%

21

C8808

.1uF

16V-10%

21

C8807

.1uF

16V-10%

21

C8806

.1uF

16V-10%

21

C8805

.1uF

16V-10%

21

C8804

.1uF

16V-10%

21

C8803

.1uF

16V-10%

2

21

21

21

21

21

21

21

21

21

21

21

3

C8953

+VTT_CPU1

21

C8960

4.7uF

C8954

6.3V-10%

4.7uF

C8959

6.3V-10%

21

4.7uF

6.3V-10%

4.7uF

C8958

6.3V-10%

21

1 2

C8891

4.7uF

C8957

6.3V-10%

.22uF

C8892

10V-20%

21

4.7uF

1 2

.22uF

10V-20%

6.3V-10%

C8768

1 2

C8898

1 2

.22uF

C8769

1800pF

50V-10%

1 2

C8897

10V-20%

1 2

1800pF

.22uF

C8896

10V-20%

50V-10%

1 2

.22uF

C8952

1 2

C8895

10V-20%

4.7uF

C8947

6.3V-10%

.22uF

10V-20%

4.7uF

6.3V-10%

C8942

1 2

C8890

C8941

1000pF

50V-10%

1 2

1 2

.22uF

C8889

10V-20%

C8940

1000pF

50V-10%

1 2

1 2

.22uF

10V-20%

C8939

1000pF

50V-10%

1 2

C8767

1 2

1000pF

50V-10%

C8763

1800pF

50V-10%

C8772

1 2

1 2

1800pF

50V-10%

C8773

1800pF

50V-10%

1 2

C8955

C8774

1800pF

50V-10%

4.7uF

15,55,142

1 2

1800pF

C8956

6.3V-10%

C8775

1 2

50V-10%

4.7uF

6.3V-10%

VCORE_CPU1_NB

1800pF

50V-10%

C8893

1 2

.22uF

C8894

10V-20%

1 2

C9928

1 2

.22uF

.22uF

C9926

10V-20%

10V-20%

1 2

1800pF

50V-10%

C8770

1 2

21

C9930

C8771

1800pF

10uF 6.3V

1 2

50V-10%

21

C9931

10uF 6.3V

1800pF

50V-10%

21

C9932

21

C9933

10uF 6.3V

21

C9934

10uF 6.3V

10uF 6.3V

C9836

.1uF

16V-10%

C9837

.1uF

16V-10%

+VTT_CPU1

C8813

21

C8823

.1uF

16V-10%

.1uF

16V-10%

C8814

21

C8824

.1uF

16V-10%

.1uF

16V-10%

C8815

21

C8825

.1uF

16V-10%

.1uF

16V-10%

C8816

21

C8826

.1uF

16V-10%

.1uF

16V-10%

C8817

21

C8827

.1uF

16V-10%

.1uF

16V-10%

C8818

21

C8828

.1uF

16V-10%

.1uF

16V-10%

C8819

21

C8829

.1uF

16V-10%

.1uF

16V-10%

C8820

21

C8830

.1uF

16V-10%

.1uF

16V-10%

C8821

21

C8831

.1uF

16V-10%

.1uF

16V-10%

C8822

21

C8832

.1uF

16V-10%

.1uF

16V-10%

3

+VCORE_CPU1

1 2

C8900

.22uF

1 2

C8899

10V-20%

.22uF

10V-20%

2.5V-20%

+

330uF

1 2

2.5V-20%
330uF

C8920

+

C8921

1 2

2.5V-20%

+

330uF

1 2

2.5V-20%

C8922

+

330uF

ROOM = CPU1

2.5V-20%

+

1 2

C8923

330uF

C8924

1 2

2.5V-20%

+

330uF

1 2

C8925

2.5V-20%
820uF

+

1 2

2.5V-20%

C8755

820uF

+

1 2

2.5V-20%

C8756

820uF

+

1 2

2.5V-20%

C8757

820uF

+

1 2

C8758

2.5V-20%
820uF

+

1 2

2.5V-20%
820uF

C9597

+

21

C9598

+MEM_CPU1

PLACE BETWEEN DIMMS

21

C9496

21

C9495

10uF 6.3V

ROOM = CPU1DIMM

21

C9497

10uF 6.3V

21

C9498

10uF 6.3V

21

C9499

10uF 6.3V

21

C9500

10uF 6.3V

10uF 6.3V

MODULE:
DESC:
REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

MCH

211

4

ROOM = CPU1_REG

Was this pulled from Fat Tire/Guiness

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

CPU1 Decoupling

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM,PLN,SV,PE_BULN

REV.

FP975

SHEET

X01

10/20/2006 30 OF 144

DCBA

4