Page 1
A B C
D
REVISIONS
1
2
3
SUB=NP Always no-pop
SUB=NP0 Populate only for debug
BOM options
0 = Production
1 = Development
2 = Adds 2U Parts
3 = Adds 1U Parts
5 = Adds parts for Microvue and interposer on breakaway
BOM Instructions
In order to build a proper BOM, you must run a combo build
To build 2U for production, use builds 0 and 2
To build 1U for production, use builds 0 and 3
To build 2U for development, use builds 1 and 2
To build 1U for development, use builds 1 and 3
REV
DESCRIPTIONECO DATE
TABLE OF CONTENTS
BLOCK DIAGRAMSPage 1-11.
Page 12-15.
Page 16-19.
Page 20-21.
Page 22-29.
Page 30-31.
Page 32-35.
Page 36-39.
Page 40-43.
Page 44.
Page 45.
Page 46-47.
Page 49-57.
Page 59.
Page 60.
Page 61.
Page 62.
Page 63.
Page 64-65.
Page 66.
Page 67.
Page 68.
Page 69.
Page 70.
Page 71-73.
Page 74-79.
Page 81-82.
Page 83-84.
Page 85.
Page 86-88
Page 89. BMC - temp sensors/debug port
Page 90.
Page 91.
Page 92.
Page 93.
Page 80, 94.
Page 95.
Page 96.
Page 97-103.
Page 104-107.
Page 108-119.
Page 120.
Page 121.
Page 122.
Page 123.
Page 124.
Page 125. Impedance Coupons (48SE, 50SE, 75D, 85D)
Page 126-127.
Page 128-129.
Page 130-135.
Page 136. +1.8V Current sense
Processor 1
Processor 2
Blank
HT2100
CPU decoupling
Processor 1 DIMMs (4)
Processor 2 DIMMs (4)
Blank
Blank
Clock Generator: CK410B
Clock buffer: DB1200
Clock buffer: DB800Page 48.
HT1000
USB Connectors and ButtonsPage 58.
Floppy Connector
Blank (LAI Connectors if there is room)
SATA Connectors
Voltage Doubler and Intusion Detect
ESB2 I2C MUX and Header
Blank
Super I/O
PCI Reset, Jumpers
Firmware Hub
Coin Cell Battery
Sideplane (PERC5/I, Control Panel, IDE)
Risers (3)
Blank, PME to Wake on Page 77
Broadcom LOM 1
Broadcom LOM 2
LOM power switch
BMC
COM port
BMC I2C MUX and Header
San Marco Connectors (Mgmt, MII)
Rear ID, Cyclops
Fan Connectors and Tach
BMC - CPLD, master and slave
OmniIVu- CPLD and header
Video RN50
Video Output
VRDs
Power Connectors
Power LED
Power sequencing and VRD enable chaining
Ground Clips
Impedance Coupons (90D, 95D, 100D)
System powergood and Reset buffering
Blank
Blank, strappings, SATA, OV/UV
APPROVED
1
2
3
4
ToDo:Update TOC & rearrange/delete pages
EXPORT RESTRICTION:
THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT
IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA
TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE
IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY
OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN
WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC.
UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE
OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED
FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE
LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
PWA: FP973
ASSY: FP976
PWB: FP974
SCH: FP975
DRAWN
DESIGNED
CHECKED
APPROVED
APPROVED
APPROVED
APPROVED
RELEASED
03/14/2006
03/14/2006
03/14/2006
03/14/2006
A CURRENT ISSUE OF THIS DRAWING MUST
INCLUDE A COPY OF THE FOLLOWING
ECO'S:
ECO
ECO
ECO
ECO
ECO
ECO
ECO
ECO
DATE
DATE
DATE
DATE
DATE
DATE
DATE
DATE
INC.
ROUND ROCK,TEXAS
TITLE
SCHEM,PLN,SV,PE_BULN
DWG NO.
FP975
DATE
SHEET
10/20/2006 1 OF 144
4
REV.
X01
Page 2
A B C
D
1
1
2
2
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
10/20/2006 2 OF 144
DCBA
4
X01
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1
1
2
2
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
10/20/2006 3 OF 144
DCBA
4
X01
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1
1
2
2
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
4
REV.
X01
4 OF 14410/20/2006
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1
1
2
2
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3
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PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
4
REV.
X01
5 OF 14410/20/2006
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1
1
2
2
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PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
4
REV.
X01
6 OF 14410/20/2006
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1
1
2
2
3
3
4
Powerup Timing- VRDs
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
4
REV.
X01
7 OF 14410/20/2006
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1
1
2
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Power up Timing - Chipset
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
4
REV.
X01
8 OF 14410/20/2006
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1
1
2
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PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
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PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
4
REV.
X01
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1
1
2
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PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
4
REV.
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1
HT_CK_C2L0_C1L0_1_DP
16
HT_CK_C2L0_C1L0_1_DN
16
HT_CK_C2L0_C1L0_0_DP
16
HT_CK_C2L0_C1L0_0_DN
16
HT_CT_C2L0_C1L0_1_DP
16
HT_CT_C2L0_C1L0_1_DN
16
HT_CT_C2L0_C1L0_0_DP
16
HT_CT_C2L0_C1L0_0_DN
16
J_CPU1
M6 AC5
L0_CLKIN_H_1 L0_CLKOUT_H_1
N6
L0_CLKIN_L_1
M3 AC1
L0_CLKIN_H_0 L0_CLKOUT_H_0
M2
L0_CLKIN_L_0
U4
L0_CTLIN_H_1
U5
L0_CTLIN_L_1
T1
L0_CTLIN_H_0
U1
L0_CTLIN_L_0
L0_CLKOUT_L_1
L0_CLKOUT_L_0
L0_CTLOUT_H_1
L0_CTLOUT_L_1
L0_CTLOUT_H_0
L0_CTLOUT_L_0
AC4
AB1
W6
V6
V2
V3
HT_CK_C1L0_C2L0_1_DP
HT_CK_C1L0_C2L0_1_DN
HT_CK_C1L0_C2L0_0_DP
HT_CK_C1L0_C2L0_0_DN
HT_CT_C1L0_C2L0_1_DP
HT_CT_C1L0_C2L0_1_DN
HT_CT_C1L0_C2L0_0_DP
HT_CT_C1L0_C2L0_0_DN
16
16
16
16
16
16
16
16
HT_CK_C2L1_C1L2_1_DP
16
HT_CK_C2L1_C1L2_1_DN
16
HT_CK_C2L1_C1L2_0_DP
16
HT_CK_C2L1_C1L2_0_DN
16
HT_CT_C2L1_C1L2_1_DP
16
HT_CT_C2L1_C1L2_1_DN
16
HT_CT_C2L1_C1L2_0_DP
16
HT_CT_C2L1_C1L2_0_DN
16
AK7
AK8
AM7
AN7
AM12
AL12
AP11
AP12
L2_CLKIN_H_1
L2_CLKIN_L_1
L2_CLKIN_H_0
L2_CLKIN_L_0
L2_CTLIN_H_1
L2_CTLIN_L_1
L2_CTLIN_H_0
L2_CTLIN_L_0
J_CPU1
L2_CLKOUT_H_1
L2_CLKOUT_L_1
L2_CLKOUT_H_0
L2_CLKOUT_L_0
L2_CTLOUT_H_1
L2_CTLOUT_L_1
L2_CTLOUT_H_0
L2_CTLOUT_L_0
AM18
AN18
AR18
AR17
AL14
AL13
AP13
AN13
HT_CK_C1L2_C2L1_1_DP
HT_CK_C1L2_C2L1_1_DN
HT_CK_C1L2_C2L1_0_DP
HT_CK_C1L2_C2L1_0_DN
HT_CT_C1L2_C2L1_1_DP
HT_CT_C1L2_C2L1_1_DN
HT_CT_C1L2_C2L1_0_DP
HT_CT_C1L2_C2L1_0_DN
1
16
16
16
16
16
16
16
16
2
3
HT_AD_C2L0_C1L0_15_DP
16
HT_AD_C2L0_C1L0_15_DN
16
HT_AD_C2L0_C1L0_14_DP
16
HT_AD_C2L0_C1L0_14_DN
16
HT_AD_C2L0_C1L0_13_DP
16
HT_AD_C2L0_C1L0_13_DN
16
HT_AD_C2L0_C1L0_12_DP
16
HT_AD_C2L0_C1L0_12_DN
16
HT_AD_C2L0_C1L0_11_DP
16
HT_AD_C2L0_C1L0_11_DN
16
HT_AD_C2L0_C1L0_10_DP
16
HT_AD_C2L0_C1L0_10_DN
16
HT_AD_C2L0_C1L0_9_DP
16
HT_AD_C2L0_C1L0_9_DN
16
HT_AD_C2L0_C1L0_8_DP
16
HT_AD_C2L0_C1L0_8_DN
16
HT_AD_C2L0_C1L0_7_DP
16
HT_AD_C2L0_C1L0_7_DN
16
HT_AD_C2L0_C1L0_6_DP
16
HT_AD_C2L0_C1L0_6_DN
16
HT_AD_C2L0_C1L0_5_DP
16
HT_AD_C2L0_C1L0_5_DN
16
HT_AD_C2L0_C1L0_4_DP
16
HT_AD_C2L0_C1L0_4_DN
16
HT_AD_C2L0_C1L0_3_DP
16
HT_AD_C2L0_C1L0_3_DN
16
HT_AD_C2L0_C1L0_2_DP
16
HT_AD_C2L0_C1L0_2_DN
16
HT_AD_C2L0_C1L0_1_DP
16
HT_AD_C2L0_C1L0_1_DN
16
HT_AD_C2L0_C1L0_0_DP
16
HT_AD_C2L0_C1L0_0_DN
16
T6
L0_CADIN_H_15
U6
L0_CADIN_L_15
R4
L0_CADIN_H_14
R5
L0_CADIN_L_14
P6
L0_CADIN_H_13
R6
L0_CADIN_L_13
N4
L0_CADIN_H_12
N5
L0_CADIN_L_12
L4
L0_CADIN_H_11
L5
L0_CADIN_L_11
K6
L0_CADIN_H_10
L6
L0_CADIN_L_10
J4
L0_CADIN_H_9
J5
L0_CADIN_L_9
H6
L0_CADIN_H_8
J6
L0_CADIN_L_8
T3
L0_CADIN_H_7
P1
L0_CADIN_L_7
T2
L0_CADIN_H_6
R1
L0_CADIN_L_6
P3
L0_CADIN_H_5
P2
L0_CADIN_L_5
M1
L0_CADIN_H_4
N1
L0_CADIN_L_4
K1
L0_CADIN_H_3
L1
L0_CADIN_L_3
K3
L0_CADIN_H_2
K2
L0_CADIN_L_2
H1
L0_CADIN_H_1
J1
L0_CADIN_L_1
H3
L0_CADIN_H_0
H2
L0_CADIN_L_0
L0_CADOUT_H_15
L0_CADOUT_L_15
L0_CADOUT_H_14
L0_CADOUT_L_14
L0_CADOUT_H_13
L0_CADOUT_L_13
L0_CADOUT_H_12
L0_CADOUT_L_12
L0_CADOUT_H_11
L0_CADOUT_L_11
L0_CADOUT_H_10
L0_CADOUT_L_10
L0_CADOUT_H_9
L0_CADOUT_L_9
L0_CADOUT_H_8
L0_CADOUT_L_8
L0_CADOUT_H_7
L0_CADOUT_L_7
L0_CADOUT_H_6
L0_CADOUT_L_6
L0_CADOUT_H_5
L0_CADOUT_L_5
L0_CADOUT_H_4
L0_CADOUT_L_4
L0_CADOUT_H_3
L0_CADOUT_L_3
L0_CADOUT_H_2
L0_CADOUT_L_2
L0_CADOUT_H_1
L0_CADOUT_L_1
L0_CADOUT_H_0
L0_CADOUT_L_0
W5
W4
AA6
Y6
AA5
AA4
AC6
AB6
AE6
AD6
AE5
AE4
AG6
AF6
AG5
AG4
W1
V1
Y2
Y3
AA1
Y1
AB2
AB3
AD2
AD3
AE1
AD1
AF2
AF3
AG1
AF1
HT_AD_C1L0_C2L0_15_DP
HT_AD_C1L0_C2L0_15_DN
HT_AD_C1L0_C2L0_14_DP
HT_AD_C1L0_C2L0_14_DN
HT_AD_C1L0_C2L0_13_DP
HT_AD_C1L0_C2L0_13_DN
HT_AD_C1L0_C2L0_12_DP
HT_AD_C1L0_C2L0_12_DN
HT_AD_C1L0_C2L0_11_DP
HT_AD_C1L0_C2L0_11_DN
HT_AD_C1L0_C2L0_10_DP
HT_AD_C1L0_C2L0_10_DN
HT_AD_C1L0_C2L0_9_DP
HT_AD_C1L0_C2L0_9_DN
HT_AD_C1L0_C2L0_8_DP
HT_AD_C1L0_C2L0_8_DN
HT_AD_C1L0_C2L0_7_DP
HT_AD_C1L0_C2L0_7_DN
HT_AD_C1L0_C2L0_6_DP
HT_AD_C1L0_C2L0_6_DN
HT_AD_C1L0_C2L0_5_DP
HT_AD_C1L0_C2L0_5_DN
HT_AD_C1L0_C2L0_4_DP
HT_AD_C1L0_C2L0_4_DN
HT_AD_C1L0_C2L0_3_DP
HT_AD_C1L0_C2L0_3_DN
HT_AD_C1L0_C2L0_2_DP
HT_AD_C1L0_C2L0_2_DN
HT_AD_C1L0_C2L0_1_DP
HT_AD_C1L0_C2L0_1_DN
HT_AD_C1L0_C2L0_0_DP
HT_AD_C1L0_C2L0_0_DN
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HT_AD_C2L1_C1L2_15_DP
16
HT_AD_C2L1_C1L2_15_DN
16
HT_AD_C2L1_C1L2_14_DP
16
HT_AD_C2L1_C1L2_14_DN
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HT_AD_C2L1_C1L2_13_DP
16
HT_AD_C2L1_C1L2_13_DN
16
HT_AD_C2L1_C1L2_12_DP
16
HT_AD_C2L1_C1L2_12_DN
16
HT_AD_C2L1_C1L2_11_DP
16
HT_AD_C2L1_C1L2_11_DN
16
HT_AD_C2L1_C1L2_10_DP
16
HT_AD_C2L1_C1L2_10_DN
16
HT_AD_C2L1_C1L2_9_DP
16
HT_AD_C2L1_C1L2_9_DN
16
HT_AD_C2L1_C1L2_8_DP
16
HT_AD_C2L1_C1L2_8_DN
16
HT_AD_C2L1_C1L2_7_DP
16
HT_AD_C2L1_C1L2_7_DN
16
HT_AD_C2L1_C1L2_6_DP
16
HT_AD_C2L1_C1L2_6_DN
16
HT_AD_C2L1_C1L2_5_DP
16
HT_AD_C2L1_C1L2_5_DN
16
HT_AD_C2L1_C1L2_4_DP
16
HT_AD_C2L1_C1L2_4_DN
16
HT_AD_C2L1_C1L2_3_DP
16
HT_AD_C2L1_C1L2_3_DN
16
HT_AD_C2L1_C1L2_2_DP
16
HT_AD_C2L1_C1L2_2_DN
16
HT_AD_C2L1_C1L2_1_DP
16
HT_AD_C2L1_C1L2_1_DN
16
HT_AD_C2L1_C1L2_0_DP
16
HT_AD_C2L1_C1L2_0_DN
16
AK11
AK12
AM10
AL10
AK9
AK10
AM8
AL8
AM6
AL6
AK5
AK6
AM4
AL4
AK3
AK4
AM11
AN11
AP9
AP10
AM9
AN9
AP7
AP8
AP5
AP6
AM5
AN5
AP3
AP4
AM3
AN3
L2_CADIN_H_15
L2_CADIN_L_15
L2_CADIN_H_14
L2_CADIN_L_14
L2_CADIN_H_13
L2_CADIN_L_13
L2_CADIN_H_12
L2_CADIN_L_12
L2_CADIN_H_11
L2_CADIN_L_11
L2_CADIN_H_10
L2_CADIN_L_10
L2_CADIN_H_9
L2_CADIN_L_9
L2_CADIN_H_8
L2_CADIN_L_8
L2_CADIN_H_7
L2_CADIN_L_7
L2_CADIN_H_6
L2_CADIN_L_6
L2_CADIN_H_5
L2_CADIN_L_5
L2_CADIN_H_4
L2_CADIN_L_4
L2_CADIN_H_3
L2_CADIN_L_3
L2_CADIN_H_2
L2_CADIN_L_2
L2_CADIN_H_1
L2_CADIN_L_1
L2_CADIN_H_0
L2_CADIN_L_0
L2_CADOUT_H_15
L2_CADOUT_L_15
L2_CADOUT_H_14
L2_CADOUT_L_14
L2_CADOUT_H_13
L2_CADOUT_L_13
L2_CADOUT_H_12
L2_CADOUT_L_12
L2_CADOUT_H_11
L2_CADOUT_L_11
L2_CADOUT_H_10
L2_CADOUT_L_10
L2_CADOUT_H_9
L2_CADOUT_L_9
L2_CADOUT_H_8
L2_CADOUT_L_8
L2_CADOUT_H_7
L2_CADOUT_L_7
L2_CADOUT_H_6
L2_CADOUT_L_6
L2_CADOUT_H_5
L2_CADOUT_L_5
L2_CADOUT_H_4
L2_CADOUT_L_4
L2_CADOUT_H_3
L2_CADOUT_L_3
L2_CADOUT_H_2
L2_CADOUT_L_2
L2_CADOUT_H_1
L2_CADOUT_L_1
L2_CADOUT_H_0
L2_CADOUT_L_0
AM14
AN14
AL16
AL15
AM16
AN16
AL18
AL17
AL20
AL19
AM20
AN20
AL22
AL21
AM22
AN22
AR14
AR13
AP15
AN15
AR16
AR15
AP17
AN17
AP19
AN19
AR20
AR19
AP21
AN21
AR22
AR21
HT_AD_C1L2_C2L1_15_DP
HT_AD_C1L2_C2L1_15_DN
HT_AD_C1L2_C2L1_14_DP
HT_AD_C1L2_C2L1_14_DN
HT_AD_C1L2_C2L1_13_DP
HT_AD_C1L2_C2L1_13_DN
HT_AD_C1L2_C2L1_12_DP
HT_AD_C1L2_C2L1_12_DN
HT_AD_C1L2_C2L1_11_DP
HT_AD_C1L2_C2L1_11_DN
HT_AD_C1L2_C2L1_10_DP
HT_AD_C1L2_C2L1_10_DN
HT_AD_C1L2_C2L1_9_DP
HT_AD_C1L2_C2L1_9_DN
HT_AD_C1L2_C2L1_8_DP
HT_AD_C1L2_C2L1_8_DN
HT_AD_C1L2_C2L1_7_DP
HT_AD_C1L2_C2L1_7_DN
HT_AD_C1L2_C2L1_6_DP
HT_AD_C1L2_C2L1_6_DN
HT_AD_C1L2_C2L1_5_DP
HT_AD_C1L2_C2L1_5_DN
HT_AD_C1L2_C2L1_4_DP
HT_AD_C1L2_C2L1_4_DN
HT_AD_C1L2_C2L1_3_DP
HT_AD_C1L2_C2L1_3_DN
HT_AD_C1L2_C2L1_2_DP
HT_AD_C1L2_C2L1_2_DN
HT_AD_C1L2_C2L1_1_DP
HT_AD_C1L2_C2L1_1_DN
HT_AD_C1L2_C2L1_0_DP
HT_AD_C1L2_C2L1_0_DN
16
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2
3
From CPU2 L0
AMC CPU F1207
HETERO 1 OF 11
To CPU2 L0
From CPU2 L1 To CPU2 L1
CPU1 TO CPU2 HYPER TRANSPORT LINKS
AMC CPU F1207
HETERO 3 OF 11
4
ROOM=CPU1
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
X01
SHEET
10/20/2006 12 OF 144
DBA
211
4
Page 13
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4
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X00_DT10369 SCH name fix
34
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CPU1_MEM_MA_DQS_17_DP
CPU1_MEM_MA_DQS_17_DN
CPU1_MEM_MA_DQS_16_DP
CPU1_MEM_MA_DQS_16_DN
CPU1_MEM_MA_DQS_15_DP
CPU1_MEM_MA_DQS_15_DN
CPU1_MEM_MA_DQS_14_DP
CPU1_MEM_MA_DQS_14_DN
CPU1_MEM_MA_DQS_13_DP
CPU1_MEM_MA_DQS_13_DN
CPU1_MEM_MA_DQS_12_DP
CPU1_MEM_MA_DQS_12_DN
CPU1_MEM_MA_DQS_11_DP
CPU1_MEM_MA_DQS_11_DN
CPU1_MEM_MA_DQS_10_DP
CPU1_MEM_MA_DQS_10_DN
CPU1_MEM_MA_DQS_9_DP
CPU1_MEM_MA_DQS_9_DN
CPU1_MEM_MA_DQS_8_DP
CPU1_MEM_MA_DQS_8_DN
CPU1_MEM_MA_DQS_7_DP
CPU1_MEM_MA_DQS_7_DN
CPU1_MEM_MA_DQS_6_DP
CPU1_MEM_MA_DQS_6_DN
CPU1_MEM_MA_DQS_5_DP
CPU1_MEM_MA_DQS_5_DN
CPU1_MEM_MA_DQS_4_DP
CPU1_MEM_MA_DQS_4_DN
CPU1_MEM_MA_DQS_3_DP
CPU1_MEM_MA_DQS_3_DN
CPU1_MEM_MA_DQS_2_DP
CPU1_MEM_MA_DQS_2_DN
CPU1_MEM_MA_DQS_1_DP
CPU1_MEM_MA_DQS_1_DN
CPU1_MEM_MA_DQS_0_DP
CPU1_MEM_MA_DQS_0_DN
A B C
CK_CPU1_MEM_MA0_DP
CK_CPU1_MEM_MA0_DN
CPU1_MEM_MA0_CS_L1
CPU1_MEM_MA0_CS_L0
CPU1_MEM_MA0_ODT0
CK_CPU1_MEM_MA1_DP
CK_CPU1_MEM_MA1_DN
CPU1_MEM_MA1_CS_L1
CPU1_MEM_MA1_CS_L0
CPU1_MEM_MA1_ODT0
NC_CPU1_Y30
NC_CPU1_Y31
CPU1_MEM_MA2_CS_L1
CPU1_MEM_MA2_CS_L0
CPU1_MEM_MA2_ODT0
NC_CPU1_AA31
NC_CPU1_AA32
CPU1_MEM_MA3_CS_L1
CPU1_MEM_MA3_CS_L0
CPU1_MEM_MA3_ODT0
CPU1_MEM_MA_ERR_R_N
CPU1_MEM_MA_PAR
CPU1_MEM_MA_CAS_N
CPU1_MEM_MA_RAS_N
CPU1_MEM_MA_WE_N
CPU1_MEM_MA_RESET_N
CPU1_MEM_MA_BANK2
CPU1_MEM_MA_BANK1
CPU1_MEM_MA_BANK0
CPU1_MEM_MA_CKE1
CPU1_MEM_MA_CKE0
ROOM=CPU1
J_CPU1
AD31
AD32
AM34
AH33
AJ32
AE31
AF31
AM35
AH34
AK34
Y30
Y31
AC30
AB32
AB31
AA31
AA32
AD30
AB30
AC32
P30
AF32
AJ33
AH32
AJ31
D33
N32
AF33
AG32
M30
M31
T27
T26
AL26
AM26
AL31
AM31
AH29
AG29
AB27
AC27
J31
J32
L29
K29
D31
D32
F27
F26
U25
U26
AK25
AK26
AK30
AK31
AH28
AJ28
AD26
AD27
K33
J33
H29
G29
F31
E31
D27
D26
MA0_CLK_H
MA0_CLK_L
MA0_CS_L_1
MA0_CS_L_0
MA0_ODT_0
MA1_CLK_H
MA1_CLK_L
MA1_CS_L_1
MA1_CS_L_0
MA1_ODT_0
MA2_CLK_H
MA2_CLK_L
MA2_CS_L_1
MA2_CS_L_0
MA2_ODT_0
MA3_CLK_H
MA3_CLK_L
MA3_CS_L_1
MA3_CS_L_0
MA3_ODT_0
MA_ERR_L
MA_PAR
MA_CAS_L
MA_RAS_L
MA_WE_L
MA_RESET_L
MA_BANK_2
MA_BANK_1
MA_BANK_0
MA_CKE_1
MA_CKE_0
MA_DQS_H_17
MA_DQS_L_17
MA_DQS_H_16
MA_DQS_L_16
MA_DQS_H_15
MA_DQS_L_15
MA_DQS_H_14
MA_DQS_L_14
MA_DQS_H_13
MA_DQS_L_13
MA_DQS_H_12
MA_DQS_L_12
MA_DQS_H_11
MA_DQS_L_11
MA_DQS_H_10
MA_DQS_L_10
MA_DQS_H_9
MA_DQS_L_9
MA_DQS_H_8
MA_DQS_L_8
MA_DQS_H_7
MA_DQS_L_7
MA_DQS_H_6
MA_DQS_L_6
MA_DQS_H_5
MA_DQS_L_5
MA_DQS_H_4
MA_DQS_L_4
MA_DQS_H_3
MA_DQS_L_3
MA_DQS_H_2
MA_DQS_L_2
MA_DQS_H_1
MA_DQS_L_1
MA_DQS_H_0
MA_DQS_L_0
MA_DATA_63
MA_DATA_62
MA_DATA_61
MA_DATA_60
MA_DATA_59
MA_DATA_58
MA_DATA_57
MA_DATA_56
MA_DATA_55
MA_DATA_54
MA_DATA_53
MA_DATA_52
MA_DATA_51
MA_DATA_50
MA_DATA_49
MA_DATA_48
MA_DATA_47
MA_DATA_46
MA_DATA_45
MA_DATA_44
MA_DATA_43
MA_DATA_42
MA_DATA_41
MA_DATA_40
MA_DATA_39
MA_DATA_38
MA_DATA_37
MA_DATA_36
MA_DATA_35
MA_DATA_34
MA_DATA_33
MA_DATA_32
MA_DATA_31
MA_DATA_30
MA_DATA_29
MA_DATA_28
MA_DATA_27
MA_DATA_26
MA_DATA_25
MA_DATA_24
MA_DATA_23
MA_DATA_22
MA_DATA_21
MA_DATA_20
MA_DATA_19
MA_DATA_18
MA_DATA_17
MA_DATA_16
MA_DATA_15
MA_DATA_14
MA_DATA_13
MA_DATA_12
MA_DATA_11
MA_DATA_10
MA_DATA_9
MA_DATA_8
MA_DATA_7
MA_DATA_6
MA_DATA_5
MA_DATA_4
MA_DATA_3
MA_DATA_2
MA_DATA_1
MA_DATA_0
MA_ADD_0
MA_ADD_1
MA_ADD_2
MA_ADD_3
MA_ADD_4
MA_ADD_5
MA_ADD_6
MA_ADD_7
MA_ADD_8
MA_ADD_9
MA_ADD_10
MA_ADD_11
MA_ADD_12
MA_ADD_13
MA_ADD_14
MA_ADD_15
MA_CHECK_7
MA_CHECK_6
MA_CHECK_5
MA_CHECK_4
MA_CHECK_3
MA_CHECK_2
MA_CHECK_1
MA_CHECK_0
AM24
AM25
AL28
AK28
AK24
AL24
AM27
AL27
AK29
AM30
AL33
AK33
AM29
AL29
AM32
AL32
AF28
AF29
AG30
AE30
AE28
AE29
AH30
AJ30
AB25
AB26
AC29
AB29
AC25
AD25
AD28
AC28
L31
K31
G32
G31
L32
L33
H33
H32
H30
G30
K28
L28
K30
J30
H28
J28
E33
D35
F29
E29
F33
F32
E30
D30
F28
E26
B24
C24
E28
D28
E25
D25
AE33
V33
Y33
U31
U32
U30
T32
R31
T31
P32
AG31
R30
P31
AL34
N30
M32
V29
V27
R29
R28
V25
V28
R25
R26
AMC CPU F1207
HETERO 4 OF 11
CPU 1 - CHANNEL A MEMORY
CPU1_MEM_MA_DATA63
CPU1_MEM_MA_DATA62
CPU1_MEM_MA_DATA61
CPU1_MEM_MA_DATA60
CPU1_MEM_MA_DATA59
CPU1_MEM_MA_DATA58
CPU1_MEM_MA_DATA57
CPU1_MEM_MA_DATA56
CPU1_MEM_MA_DATA55
CPU1_MEM_MA_DATA54
CPU1_MEM_MA_DATA53
CPU1_MEM_MA_DATA52
CPU1_MEM_MA_DATA51
CPU1_MEM_MA_DATA50
CPU1_MEM_MA_DATA49
CPU1_MEM_MA_DATA48
CPU1_MEM_MA_DATA47
CPU1_MEM_MA_DATA46
CPU1_MEM_MA_DATA45
CPU1_MEM_MA_DATA44
CPU1_MEM_MA_DATA43
CPU1_MEM_MA_DATA42
CPU1_MEM_MA_DATA41
CPU1_MEM_MA_DATA40
CPU1_MEM_MA_DATA39
CPU1_MEM_MA_DATA38
CPU1_MEM_MA_DATA37
CPU1_MEM_MA_DATA36
CPU1_MEM_MA_DATA35
CPU1_MEM_MA_DATA34
CPU1_MEM_MA_DATA33
CPU1_MEM_MA_DATA32
CPU1_MEM_MA_DATA31
CPU1_MEM_MA_DATA30
CPU1_MEM_MA_DATA29
CPU1_MEM_MA_DATA28
CPU1_MEM_MA_DATA27
CPU1_MEM_MA_DATA26
CPU1_MEM_MA_DATA25
CPU1_MEM_MA_DATA24
CPU1_MEM_MA_DATA23
CPU1_MEM_MA_DATA22
CPU1_MEM_MA_DATA21
CPU1_MEM_MA_DATA20
CPU1_MEM_MA_DATA19
CPU1_MEM_MA_DATA18
CPU1_MEM_MA_DATA17
CPU1_MEM_MA_DATA16
CPU1_MEM_MA_DATA15
CPU1_MEM_MA_DATA14
CPU1_MEM_MA_DATA13
CPU1_MEM_MA_DATA12
CPU1_MEM_MA_DATA11
CPU1_MEM_MA_DATA10
CPU1_MEM_MA_DATA9
CPU1_MEM_MA_DATA8
CPU1_MEM_MA_DATA7
CPU1_MEM_MA_DATA6
CPU1_MEM_MA_DATA5
CPU1_MEM_MA_DATA4
CPU1_MEM_MA_DATA3
CPU1_MEM_MA_DATA2
CPU1_MEM_MA_DATA1
CPU1_MEM_MA_DATA0
CPU1_MEM_MA_ADD0
CPU1_MEM_MA_ADD1
CPU1_MEM_MA_ADD2
CPU1_MEM_MA_ADD3
CPU1_MEM_MA_ADD4
CPU1_MEM_MA_ADD5
CPU1_MEM_MA_ADD6
CPU1_MEM_MA_ADD7
CPU1_MEM_MA_ADD8
CPU1_MEM_MA_ADD9
CPU1_MEM_MA_ADD10
CPU1_MEM_MA_ADD11
CPU1_MEM_MA_ADD12
CPU1_MEM_MA_ADD13
CPU1_MEM_MA_ADD14
CPU1_MEM_MA_ADD15
CPU1_MEM_MA_CHECK7
CPU1_MEM_MA_CHECK6
CPU1_MEM_MA_CHECK5
CPU1_MEM_MA_CHECK4
CPU1_MEM_MA_CHECK3
CPU1_MEM_MA_CHECK2
CPU1_MEM_MA_CHECK1
CPU1_MEM_MA_CHECK0
32,33
32,33
32,33
32,33
32,33
32,33
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+1.2V_VLDT
J_CPU1
R8749
1 2
R8748
1 2
51-5%51-5%
22
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HT_CK_NBLA_C1L1_1_DP
HT_CK_NBLA_C1L1_1_DN
HT_CK_NBLA_C1L1_0_DP
HT_CK_NBLA_C1L1_0_DN
CPU1_CTLIN_L1_H1
CPU1_CTLIN_L1_L1
HT_CT_NBLA_C1L1_0_DP
HT_CT_NBLA_C1L1_0_DN
HT_AD_NBLA_C1L1_15_DP
HT_AD_NBLA_C1L1_15_DN
HT_AD_NBLA_C1L1_14_DP
HT_AD_NBLA_C1L1_14_DN
HT_AD_NBLA_C1L1_13_DP
HT_AD_NBLA_C1L1_13_DN
HT_AD_NBLA_C1L1_12_DP
HT_AD_NBLA_C1L1_12_DN
HT_AD_NBLA_C1L1_11_DP
HT_AD_NBLA_C1L1_11_DN
HT_AD_NBLA_C1L1_10_DP
HT_AD_NBLA_C1L1_10_DN
HT_AD_NBLA_C1L1_9_DP
HT_AD_NBLA_C1L1_9_DN
HT_AD_NBLA_C1L1_8_DP
HT_AD_NBLA_C1L1_8_DN
HT_AD_NBLA_C1L1_7_DP
HT_AD_NBLA_C1L1_7_DN
HT_AD_NBLA_C1L1_6_DP
HT_AD_NBLA_C1L1_6_DN
HT_AD_NBLA_C1L1_5_DP
HT_AD_NBLA_C1L1_5_DN
HT_AD_NBLA_C1L1_4_DP
HT_AD_NBLA_C1L1_4_DN
HT_AD_NBLA_C1L1_3_DP
HT_AD_NBLA_C1L1_3_DN
HT_AD_NBLA_C1L1_2_DP
HT_AD_NBLA_C1L1_2_DN
HT_AD_NBLA_C1L1_1_DP
HT_AD_NBLA_C1L1_1_DN
HT_AD_NBLA_C1L1_0_DP
HT_AD_NBLA_C1L1_0_DN
E18
L1_CLKIN_H_1
E17
L1_CLKIN_L_1
C18
L1_CLKIN_H_0
B18
L1_CLKIN_L_0
C13
L1_CTLIN_H_1
D13
L1_CTLIN_L_1
A14
L1_CTLIN_H_0
A13
L1_CTLIN_L_0
E14
L1_CADIN_H_15
E13
L1_CADIN_L_15
C15
L1_CADIN_H_14
D15
L1_CADIN_L_14
E16
L1_CADIN_H_13
E15
L1_CADIN_L_13
C17
L1_CADIN_H_12
D17
L1_CADIN_L_12
C19
L1_CADIN_H_11
D19
L1_CADIN_L_11
E20
L1_CADIN_H_10
E19
L1_CADIN_L_10
C21
L1_CADIN_H_9
D21
L1_CADIN_L_9
E22
L1_CADIN_H_8
E21
L1_CADIN_L_8
C14
L1_CADIN_H_7
B14
L1_CADIN_L_7
A16
L1_CADIN_H_6
A15
L1_CADIN_L_6
C16
L1_CADIN_H_5
B16
L1_CADIN_L_5
A18
L1_CADIN_H_4
A17
L1_CADIN_L_4
A20
L1_CADIN_H_3
A19
L1_CADIN_L_3
C20
L1_CADIN_H_2
B20
L1_CADIN_L_2
A22
L1_CADIN_H_1
A21
L1_CADIN_L_1
C22
L1_CADIN_H_0
B22
L1_CADIN_L_0
AMC CPU F1207
HETERO 2 OF 11
From HT2100 LA
CPU 1 HYPERTRANSPORT TO HT2100
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
L1_CLKOUT_H_1
L1_CLKOUT_L_1
L1_CLKOUT_H_0
L1_CLKOUT_L_0
L1_CTLOUT_H_1
L1_CTLOUT_L_1
L1_CTLOUT_H_0
L1_CTLOUT_L_0
L1_CADOUT_H_15
L1_CADOUT_L_15
L1_CADOUT_H_14
L1_CADOUT_L_14
L1_CADOUT_H_13
L1_CADOUT_L_13
L1_CADOUT_H_12
L1_CADOUT_L_12
L1_CADOUT_H_11
L1_CADOUT_L_11
L1_CADOUT_H_10
L1_CADOUT_L_10
L1_CADOUT_H_9
L1_CADOUT_L_9
L1_CADOUT_H_8
L1_CADOUT_L_8
L1_CADOUT_H_7
L1_CADOUT_L_7
L1_CADOUT_H_6
L1_CADOUT_L_6
L1_CADOUT_H_5
L1_CADOUT_L_5
L1_CADOUT_H_4
L1_CADOUT_L_4
L1_CADOUT_H_3
L1_CADOUT_L_3
L1_CADOUT_H_2
L1_CADOUT_L_2
L1_CADOUT_H_1
L1_CADOUT_L_1
L1_CADOUT_H_0
L1_CADOUT_L_0
E6
D6
B6
B7
F10
F11
C11
D11
E10
D10
F8
F9
E8
D8
F6
F7
F4
F5
E4
D4
F2
F3
E2
D2
B10
B11
C9
D9
B8
B9
C7
D7
C5
D5
B4
B5
C3
D3
B2
B3
TITLE
DWG NO.
DATE
D
HT_CK_C1L1_NBLA_1_DP
HT_CK_C1L1_NBLA_1_DN
HT_CK_C1L1_NBLA_0_DP
HT_CK_C1L1_NBLA_0_DN
NC_CPU1_AL14
NC_CPU1_AL13
HT_CT_C1L1_NBLA_0_DP
HT_CT_C1L1_NBLA_0_DN
HT_AD_C1L1_NBLA_15_DP
HT_AD_C1L1_NBLA_15_DN
HT_AD_C1L1_NBLA_14_DP
HT_AD_C1L1_NBLA_14_DN
HT_AD_C1L1_NBLA_13_DP
HT_AD_C1L1_NBLA_13_DN
HT_AD_C1L1_NBLA_12_DP
HT_AD_C1L1_NBLA_12_DN
HT_AD_C1L1_NBLA_11_DP
HT_AD_C1L1_NBLA_11_DN
HT_AD_C1L1_NBLA_10_DP
HT_AD_C1L1_NBLA_10_DN
HT_AD_C1L1_NBLA_9_DP
HT_AD_C1L1_NBLA_9_DN
HT_AD_C1L1_NBLA_8_DP
HT_AD_C1L1_NBLA_8_DN
HT_AD_C1L1_NBLA_7_DP
HT_AD_C1L1_NBLA_7_DN
HT_AD_C1L1_NBLA_6_DP
HT_AD_C1L1_NBLA_6_DN
HT_AD_C1L1_NBLA_5_DP
HT_AD_C1L1_NBLA_5_DN
HT_AD_C1L1_NBLA_4_DP
HT_AD_C1L1_NBLA_4_DN
HT_AD_C1L1_NBLA_3_DP
HT_AD_C1L1_NBLA_3_DN
HT_AD_C1L1_NBLA_2_DP
HT_AD_C1L1_NBLA_2_DN
HT_AD_C1L1_NBLA_1_DP
HT_AD_C1L1_NBLA_1_DN
HT_AD_C1L1_NBLA_0_DP
HT_AD_C1L1_NBLA_0_DN
To HT2100 LA
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
10/20/2006
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
REV.
X01
13 OF 144
1
2
3
4
C
DBA
Page 14
A B C
D
+VDDA_CPU1
32
32
32,34
32,34
1
X00_DT10369 SCH name fix
2
3
32,34
33
33
33,34
33,34
33,34
32,34
32,34
32,34
33,34
33,34
33,34
34
32-34
32-34
32-34
32-34
32,33
32-34
32-34
32-34
33,34
32,34
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
4
CK_CPU1_MEM_MB0_DP
CK_CPU1_MEM_MB0_DN
CPU1_MEM_MB0_CS_L1
CPU1_MEM_MB0_CS_L0
CPU1_MEM_MB0_ODT0
CK_CPU1_MEM_MB1_DP
CK_CPU1_MEM_MB1_DN
CPU1_MEM_MB1_CS_L1
CPU1_MEM_MB1_CS_L0
CPU1_MEM_MB1_ODT0
NC_CPU1_U29
NC_CPU1_U28
CPU1_MEM_MB2_CS_L1
CPU1_MEM_MB2_CS_L0
CPU1_MEM_MB2_ODT0
NC_CPU1_T29
NC_CPU1_T28
CPU1_MEM_MB3_CS_L1
CPU1_MEM_MB3_CS_L0
CPU1_MEM_MB3_ODT0
CPU1_MEM_MB_ERR_R_N
CPU1_MEM_MB_PAR
CPU1_MEM_MB_CAS_N
CPU1_MEM_MB_RAS_N
CPU1_MEM_MB_WE_N
CPU1_MEM_MB_RESET_N
CPU1_MEM_MB_BANK2
CPU1_MEM_MB_BANK1
CPU1_MEM_MB_BANK0
CPU1_MEM_MB_CKE1
CPU1_MEM_MB_CKE0
CPU1_MEM_MB_DQS_17_DP
CPU1_MEM_MB_DQS_17_DN
CPU1_MEM_MB_DQS_16_DP
CPU1_MEM_MB_DQS_16_DN
CPU1_MEM_MB_DQS_15_DP
CPU1_MEM_MB_DQS_15_DN
CPU1_MEM_MB_DQS_14_DP
CPU1_MEM_MB_DQS_14_DN
CPU1_MEM_MB_DQS_13_DP
CPU1_MEM_MB_DQS_13_DN
CPU1_MEM_MB_DQS_12_DP
CPU1_MEM_MB_DQS_12_DN
CPU1_MEM_MB_DQS_11_DP
CPU1_MEM_MB_DQS_11_DN
CPU1_MEM_MB_DQS_10_DP
CPU1_MEM_MB_DQS_10_DN
CPU1_MEM_MB_DQS_9_DP
CPU1_MEM_MB_DQS_9_DN
CPU1_MEM_MB_DQS_8_DP
CPU1_MEM_MB_DQS_8_DN
CPU1_MEM_MB_DQS_7_DP
CPU1_MEM_MB_DQS_7_DN
CPU1_MEM_MB_DQS_6_DP
CPU1_MEM_MB_DQS_6_DN
CPU1_MEM_MB_DQS_5_DP
CPU1_MEM_MB_DQS_5_DN
CPU1_MEM_MB_DQS_4_DP
CPU1_MEM_MB_DQS_4_DN
CPU1_MEM_MB_DQS_3_DP
CPU1_MEM_MB_DQS_3_DN
CPU1_MEM_MB_DQS_2_DP
CPU1_MEM_MB_DQS_2_DN
CPU1_MEM_MB_DQS_1_DP
CPU1_MEM_MB_DQS_1_DN
CPU1_MEM_MB_DQS_0_DP
CPU1_MEM_MB_DQS_0_DN
Y35
Y34
AJ35
AE35
AG34
AA34
AA33
AK35
AD35
AG35
U29
U28
W31
V32
W32
T29
T28
W30
V30
W33
P33
AB34
AF34
AD33
AE34
A33
N33
AC34
AC33
M34
M35
M29
N29
AN28
AN27
AN33
AN32
AG27
AH27
AA29
AA28
G34
G35
K26
J26
A31
A32
A26
A27
N27
N28
AP26
AP27
AP31
AP32
AJ26
AJ27
W26
W27
H35
H34
H27
G27
C32
B32
B27
C27
MB0_CLK_H
MB0_CLK_L
MB0_CS_L_1
MB0_CS_L_0
MB0_ODT_0
MB1_CLK_H
MB1_CLK_L
MB1_CS_L_1
MB1_CS_L_0
MB1_ODT_0
MB2_CLK_H
MB2_CLK_L
MB2_CS_L_1
MB2_CS_L_0
MB2_ODT_0
MB3_CLK_H
MB3_CLK_L
MB3_CS_L_1
MB3_CS_L_0
MB3_ODT_0
MB_ERR_L
MB_PAR
MB_CAS_L
MB_RAS_L
MB_WE_L
MB_RESET_L
MB_BANK_2
MB_BANK_1
MB_BANK_0
MB_CKE_1
MB_CKE_0
MB_DQS_H_17
MB_DQS_L_17
MB_DQS_H_16
MB_DQS_L_16
MB_DQS_H_15
MB_DQS_L_15
MB_DQS_H_14
MB_DQS_L_14
MB_DQS_H_13
MB_DQS_L_13
MB_DQS_H_12
MB_DQS_L_12
MB_DQS_H_11
MB_DQS_L_11
MB_DQS_H_10
MB_DQS_L_10
MB_DQS_H_9
MB_DQS_L_9
MB_DQS_H_8
MB_DQS_L_8
MB_DQS_H_7
MB_DQS_L_7
MB_DQS_H_6
MB_DQS_L_6
MB_DQS_H_5
MB_DQS_L_5
MB_DQS_H_4
MB_DQS_L_4
MB_DQS_H_3
MB_DQS_L_3
MB_DQS_H_2
MB_DQS_L_2
MB_DQS_H_1
MB_DQS_L_1
MB_DQS_H_0
MB_DQS_L_0
J_CPU1
AMC CPU F1207
HETERO 5 OF 11
MB_DATA_63
MB_DATA_62
MB_DATA_61
MB_DATA_60
MB_DATA_59
MB_DATA_58
MB_DATA_57
MB_DATA_56
MB_DATA_55
MB_DATA_54
MB_DATA_53
MB_DATA_52
MB_DATA_51
MB_DATA_50
MB_DATA_49
MB_DATA_48
MB_DATA_47
MB_DATA_46
MB_DATA_45
MB_DATA_44
MB_DATA_43
MB_DATA_42
MB_DATA_41
MB_DATA_40
MB_DATA_39
MB_DATA_38
MB_DATA_37
MB_DATA_36
MB_DATA_35
MB_DATA_34
MB_DATA_33
MB_DATA_32
MB_DATA_31
MB_DATA_30
MB_DATA_29
MB_DATA_28
MB_DATA_27
MB_DATA_26
MB_DATA_25
MB_DATA_24
MB_DATA_23
MB_DATA_22
MB_DATA_21
MB_DATA_20
MB_DATA_19
MB_DATA_18
MB_DATA_17
MB_DATA_16
MB_DATA_15
MB_DATA_14
MB_DATA_13
MB_DATA_12
MB_DATA_11
MB_DATA_10
MB_DATA_9
MB_DATA_8
MB_DATA_7
MB_DATA_6
MB_DATA_5
MB_DATA_4
MB_DATA_3
MB_DATA_2
MB_DATA_1
MB_DATA_0
MB_ADD_0
MB_ADD_1
MB_ADD_2
MB_ADD_3
MB_ADD_4
MB_ADD_5
MB_ADD_6
MB_ADD_7
MB_ADD_8
MB_ADD_9
MB_ADD_10
MB_ADD_11
MB_ADD_12
MB_ADD_13
MB_ADD_14
MB_ADD_15
MB_CHECK_7
MB_CHECK_6
MB_CHECK_5
MB_CHECK_4
MB_CHECK_3
MB_CHECK_2
MB_CHECK_1
MB_CHECK_0
AN25
AR26
AN29
AR29
AP25
AR25
AR28
AP28
AN30
AR31
AR34
AN34
AR30
AP30
AR33
AP33
AG25
AE25
AF26
AE26
AF24
AE24
AG26
AF27
Y26
AA27
W28
W25
Y25
AA26
Y28
Y29
K35
J35
E35
C35
L34
K34
F34
E34
L24
J27
K25
K24
L27
L26
G26
J25
B34
A34
C30
C29
C34
C33
B31
B30
C28
A28
B25
A24
A29
B29
B26
C25
AB35
V34
W35
V35
U34
U35
T33
R33
T34
R35
AC35
R34
P35
AH35
N35
N34
P27
P28
N25
M25
P25
P26
M26
M27
CPU1_MEM_MB_DATA63
CPU1_MEM_MB_DATA62
CPU1_MEM_MB_DATA61
CPU1_MEM_MB_DATA60
CPU1_MEM_MB_DATA59
CPU1_MEM_MB_DATA58
CPU1_MEM_MB_DATA57
CPU1_MEM_MB_DATA56
CPU1_MEM_MB_DATA55
CPU1_MEM_MB_DATA54
CPU1_MEM_MB_DATA53
CPU1_MEM_MB_DATA52
CPU1_MEM_MB_DATA51
CPU1_MEM_MB_DATA50
CPU1_MEM_MB_DATA49
CPU1_MEM_MB_DATA48
CPU1_MEM_MB_DATA47
CPU1_MEM_MB_DATA46
CPU1_MEM_MB_DATA45
CPU1_MEM_MB_DATA44
CPU1_MEM_MB_DATA43
CPU1_MEM_MB_DATA42
CPU1_MEM_MB_DATA41
CPU1_MEM_MB_DATA40
CPU1_MEM_MB_DATA39
CPU1_MEM_MB_DATA38
CPU1_MEM_MB_DATA37
CPU1_MEM_MB_DATA36
CPU1_MEM_MB_DATA35
CPU1_MEM_MB_DATA34
CPU1_MEM_MB_DATA33
CPU1_MEM_MB_DATA32
CPU1_MEM_MB_DATA31
CPU1_MEM_MB_DATA30
CPU1_MEM_MB_DATA29
CPU1_MEM_MB_DATA28
CPU1_MEM_MB_DATA27
CPU1_MEM_MB_DATA26
CPU1_MEM_MB_DATA25
CPU1_MEM_MB_DATA24
CPU1_MEM_MB_DATA23
CPU1_MEM_MB_DATA22
CPU1_MEM_MB_DATA21
CPU1_MEM_MB_DATA20
CPU1_MEM_MB_DATA19
CPU1_MEM_MB_DATA18
CPU1_MEM_MB_DATA17
CPU1_MEM_MB_DATA16
CPU1_MEM_MB_DATA15
CPU1_MEM_MB_DATA14
CPU1_MEM_MB_DATA13
CPU1_MEM_MB_DATA12
CPU1_MEM_MB_DATA11
CPU1_MEM_MB_DATA10
CPU1_MEM_MB_DATA9
CPU1_MEM_MB_DATA8
CPU1_MEM_MB_DATA7
CPU1_MEM_MB_DATA6
CPU1_MEM_MB_DATA5
CPU1_MEM_MB_DATA4
CPU1_MEM_MB_DATA3
CPU1_MEM_MB_DATA2
CPU1_MEM_MB_DATA1
CPU1_MEM_MB_DATA0
CPU1_MEM_MB_ADD0
CPU1_MEM_MB_ADD1
CPU1_MEM_MB_ADD2
CPU1_MEM_MB_ADD3
CPU1_MEM_MB_ADD4
CPU1_MEM_MB_ADD5
CPU1_MEM_MB_ADD6
CPU1_MEM_MB_ADD7
CPU1_MEM_MB_ADD8
CPU1_MEM_MB_ADD9
CPU1_MEM_MB_ADD10
CPU1_MEM_MB_ADD11
CPU1_MEM_MB_ADD12
CPU1_MEM_MB_ADD13
CPU1_MEM_MB_ADD14
CPU1_MEM_MB_ADD15
CPU1_MEM_MB_CHECK7
CPU1_MEM_MB_CHECK6
CPU1_MEM_MB_CHECK5
CPU1_MEM_MB_CHECK4
CPU1_MEM_MB_CHECK3
CPU1_MEM_MB_CHECK2
CPU1_MEM_MB_CHECK1
CPU1_MEM_MB_CHECK0
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32-34
32,33
32,33
32,33
32,33
32,33
32,33
32,33
32,33
CK_200M_CPU1_C_DP
45
45
X00_DT9693 SCH routes to CPLD now
CK_200M_CPU1_C_DN
+MEM_CPU1
+MEM_CPU1
+MEM_CPU1
R9184
1 2
NP
NP
NP
119
119
137
300-5%
R9318
1 2
300-5%
R9319
1 2
300-5%
R9320
1 2
300-5%
R9321
1 2
300-5%
R9322
1 2
300-5%
R9323
1 2
300-5%
R9324
1 2
300-5%
C9383
21
3900pF
50V-10%
C9384
21
3900pF
50V-10%
CPU1_COREFB_POS
CPU1_COREFB_NEG
CPU1_DDRVTT_SENSE
R9220
1 2
510-5%
NP
R9183
X
1 2
NP
R9179
X
300-5%
1 2
CPU1_THERMTRIP_N
CPU1_PROCHOT_N
MOD_CPU1_SIC
MOD_CPU1_SID
SYSTEM_PWRGOOD_CPU1
X
RST_CPU1_N
X
CPU1_LDTSTOP_N
X
NP
R9181
X
300-5%
1 2
CK_200M_CPU1_DP
R9109
1 2
169-1%
1 2
14,96
1 2
14,55
14
14
14
14
R9221
510-5%
NP
R9182
300-5%
X00_DT9809 SCH depop'd R
MOD_CPU1_SCANEN
MOD_CPU1_SCANCK2
MOD_CPU1_SCANCK1
MOD_CPU1_SCANSHIFTENA
MOD_CPU1_SCANSHIFTENB
X
1 2
300-5%
CK_200M_CPU1_DN
SYSTEM_PWRGOOD_CPU1
14,96
14,96
66,138
14
14
20
20
20
20
20
R9113
0-5%
V_MEM_CPU1_VREF
CPU1_M_ZN
CPU1_M_ZP
CPU1_PLLTEST_1
CPU1_PLLTEST_0
NC_MOD_CPU1_TEST_2
NC_MOD_CPU1_TEST_3
R9185
1 2
300-5%
NC_MOD_CPU1_TEST_6
14,138
14,138
14
14
14,96
14,96
RST_CPU1_N
CPU1_LDTSTOP_N
CPU1_PRES_N
MOD_CPU1_SIC
MOD_CPU1_SID
CPU1_TDI
CPU1_TRST_N
CPU1_TCK
CPU1_TMS
CPU1_DBREQ_N
R9112
1 2
0-5%
R9180
NP
1 2
300-5%
R9178
NP
1 2
300-5%
14,96
X
X
G2
VDDA1
G3
VDDA2
G4
VDDA3
K22
CLKIN_H
J22
CLKIN_L
F21
PWROK
F19
RESET_L
H25
LDTSTOP_L
AP1
CPU_PRESENT_L
AG19
AF19
AJ22
AG22
AF22
AJ21
AF17
AJ25
AH25
AF20
AJ20
AH20
AG20
AG21
AF21
AH21
AF18
F24
J9
J10
F18
F23
F20
AG8
AG9
G21
H21
U8
AH9
SIC
SID
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST23
TEST18
TEST19
TEST2
TEST3
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST26
TEST9
TEST6
CPU1 MISC
R9325
1 2
300-5%
R9326
1 2
300-5%
+MEM_CPU1
1 2
1 2
CPU1_PLLTEST_1
CPU1_PLLTEST_0
R9216
39.2-1%
R9215
39.2-1%
C9766
1 2
J_CPU1
AMC CPU F1207
HETERO 6 OF 11
CPU1_M_ZN
CPU1_M_ZP
C9767
1000pF
1 2
50V-10%
1000pF
50V-10%
VID_5
VID_4
VID_3
VID_2
VID_1
VID_0
THERMTRIP_L
PROCHOT_L
TDO
DBRDY
VDDIO_FB_H
VDDIO_FB_L
HTREF1
HTREF0
THERMDA
THERMDC
TEST13
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
14
14
14
14
E24
G18
J19
H19
K19
H18
AH19
AJ19
AH22
J24
AG17
AH17
V7
U7
AF8
AF9
AH8
L8
M9
J20
G20
K20
H20
J8
V8
H8
G23
G24
CPU1_VID5
CPU1_VID4
CPU1_VID3
CPU1_VID2
CPU1_VID1
CPU1_VID0
CPU1_THERMTRIP_N
CPU1_PROCHOT_N
CPU1_TDO
CPU1_DBRDY
V_MEM_CPU1_SENSE_POS
V_MEM_CPU1_SENSE_NEG
MOD_CPU1_L0_REF_1
MOD_CPU1_L0_REF_0
MOD_CPU1_THERMDA
MOD_CPU1_THERMDC
NC_CPU1_TEST_28_DP
NC_CPU1_TEST_28_DN
NC_MOD_CPU1_TEST_17
NC_MOD_CPU1_TEST_16
NC_MOD_CPU1_TEST_15
NC_MOD_CPU1_TEST_14
NC_MOD_CPU1_TEST_7
NC_MOD_CPU1_TEST_10
NC_MOD_CPU1_TEST_8
R9154
1 2
80.6-1%
+MEM_CPU1
R9430
R9805
R9431
15-1%15-1%
1 2
0-5%
1 2
R9812
1 2
10K-5%
1 2
This value calculated to be negative 16ohm. left as is
TITLE
1
119,143
119,143
119,143
119,143
119,143
119,143
14,138
14,138
18,20
20
+1.2V_VLDT
113
113
R9233
1 2
44.2-1%
C9353
1000pF
50V-10%
1 2
1000pF
50V-10%
2
89
89
R9234
1 2
44.2-1%
C9352
1 2
3
V_MEM_CPU1_VREF
21
C9539
1 2
V_MEM_CPU1_VREF_FEEDBACK
1000pF
50V-10%
55
C9537
This value calculated to be negative 14ohm.
Hence just keeping a place holder with 10kohm
14,55
.1uF
16V-10%
4
INC.
ROUND ROCK,TEXAS
CPU1 - CHANNEL B MEMORY
ROOM=CPU1
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
X00_DT9808 SCH added caps
DWG NO.
DATE
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
REV.
X01
14 OF 14410/20/2006
Page 15
1
A9
A5
VSS_A9
VSS_A5
A B C
AJ24
AJ23
AJ17
AJ15
AJ11
AJ9
AJ7
AJ5
AJ3
AJ1
AH26
AH24
AH16
AH14
AH12
AH10
AH6
AG28
AG23
AG15
AG13
AG11
AG7
AF30
AF25
AF16
AF14
AF12
AF10
AE27
AE23
AE21
AE19
AE17
AE15
AE13
AE11
AE9
AE7
AE3
AE2
AD29
AD24
AD22
AD20
AD18
AD16
AD14
AD12
AD10
AD8
AD5
AD4
AC26
AC23
AC21
AC19
AC17
AC15
AC13
AC11
AC9
AC7
AB28
AB24
AB22
AB20
AB18
AB16
AB14
AB12
AB10
AB8
AA25
AA23
AA21
AA19
AA17
AA15
AA13
AA11
AA9
AA7
AA3
AA2
A30
A25
VSS_AJ9
VSS_AJ7
VSS_AJ5
VSS_AJ3
VSS_AA2
VSS_A30
VSS_A25
VSS_AA9
VSS_AA7
VSS_AA3
VSS_AA15
VSS_AA13
VSS_AA11
VSS_AA21
VSS_AA19
VSS_AA17
VSS_AB8
VSS_AA25
VSS_AA23
VSS_AB14
VSS_AB12
VSS_AB10
VSS_AB20
VSS_AB18
VSS_AB16
VSS_AB28
VSS_AB24
VSS_AB22
VSS_AC9
VSS_AC7
VSS_AC11
VSS_AC17
VSS_AC15
VSS_AC13
VSS_AC23
VSS_AC21
VSS_AC19
VSS_AD5
VSS_AD4
VSS_AC26
VSS_AD8
VSS_AD12
VSS_AD10
VSS_AD18
VSS_AD16
VSS_AD14
VSS_AD24
VSS_AD22
VSS_AD20
VSS_AE3
VSS_AE2
VSS_AD29
VSS_AE9
VSS_AE7
VSS_AE11
VSS_AE17
VSS_AE15
VSS_AE13
VSS_AE23
VSS_AE21
VSS_AE19
VSS_AF12
VSS_AF10
VSS_AE27
VSS_AF25
VSS_AF16
VSS_AF14
VSS_AG7
VSS_AG11
VSS_AF30
VSS_AG23
VSS_AG15
VSS_AG13
VSS_AH6
VSS_AH10
VSS_AG28
VSS_AH16
VSS_AH14
VSS_AH12
VSS_AJ1
VSS_AH26
VSS_AH24
VSS_AJ17
VSS_AJ15
VSS_AJ11
VSS_AJ24
VSS_AJ23
AK14
AK2
AJ29
VSS_AK2
VSS_AK14
VSS_AJ29
AK20
AK18
AK16
VSS_AK20
VSS_AK18
VSS_AK16
AK27
AK23
AK22
VSS_AK27
VSS_AK23
VSS_AK22
AL3
AL1
AK32
VSS_AL3
VSS_AL1
VSS_AK32
AL25
AL11
AL7
VSS_AL7
VSS_AL11
AM19
AM15
AL30
VSS_AM15
VSS_AL30
VSS_AL25
AN6
AM33
AM28
VSS_AM33
VSS_AM28
VSS_AM19
AN24
AN10
VSS_AN6
VSS_AN24
VSS_AN10
AN35
AN31
AN26
VSS_AN35
VSS_AN31
VSS_AN26
AP22
AP18
AP14
VSS_AP22
VSS_AP18
VSS_AP14
AP29
AP24
VSS_AP29
VSS_AP24
D
1
J_CPU1
VDD_A6
A6
VDD_AA8
VDD_A10
AA8
A10
AA10
VDD_AA14
VDD_AA12
VDD_AA10
AA16
AA14
AA12
VDD_AA20
VDD_AA18
VDD_AA16
AB4
AA20
AA18
VDD_AB7
VDD_AB5
VDD_AB4
AB7
AB5
VDD_AB11
VDD_AB9
AB9
AB13
AB11
VDD_AB17
VDD_AB15
VDD_AB13
AB19
AB17
AB15
VDD_AC2
VDD_AB21
VDD_AB19
AC3
AC2
AB21
VDD_AC10
VDD_AC8
VDD_AC3
AC8
AC10
VDD_AC16
VDD_AC14
VDD_AC12
AC16
AC14
AC12
VDD_AD7
VDD_AC20
VDD_AC18
AD7
AC20
AC18
VDD_AD11
VDD_AD9
AD9
AD11
VDD_AD17
VDD_AD15
VDD_AD13
AD17
AD15
AD13
VDD_AE8
VDD_AD21
VDD_AD19
AE8
AD21
AD19
VDD_AE14
VDD_AE12
VDD_AE10
AE14
AE12
AE10
VDD_AE20
VDD_AE18
VDD_AE16
AE20
AE18
AE16
VDD_AF5
VDD_AF4
AF7
AF5
AF4
VDD_AF13
VDD_AF11
VDD_AF7
AF13
AF11
VDD_AG3
VDD_AG2
VDD_AF15
AG3
AG2
AF15
VDD_AG14
VDD_AG12
VDD_AG10
AG14
AG12
AG10
VDD_AH7
VDD_AH5
VDD_AG16
AH7
AH5
AG16
VDD_AH15
VDD_AH13
VDD_AH11
AH15
AH13
AH11
VDD_AJ4
VDD_AJ2
AJ6
AJ4
AJ2
VDD_AJ10
VDD_AJ8
VDD_AJ6
AJ8
AJ10
VDD_AJ16
VDD_AJ14
VDD_AJ12
AJ16
AJ14
AJ12
VDD_AK13
VDD_AK1
AK1
AK15
AK13
VDD_AK19
VDD_AK17
VDD_AK15
AK21
AK19
AK17
VDD_AL5
VDD_AL2
VDD_AK21
AL9
AL5
AL2
VDD_AM13
VDD_AM1
VDD_AL9
AM1
AM13
VDD_AN4
VDD_AM21
VDD_AM17
AN4
AM21
AM17
VDD_AN12
VDD_AN8
AN8
AP16
AN12
VDD_AR6
VDD_AP20
VDD_AP16
AR6
AR10
AP20
VDD_B19
VDD_B15
VDD_AR10
C2
B19
B15
VDD_C6
VDD_C2
C6
C10
VDD_D16
VDD_C12
VDD_C10
D16
C12
VDD_E3
VDD_D20
E7
E3
D20
VDD_E11
VDD_E7
E12
E11
VDD_F15
VDD_F13
VDD_E12
F15
F13
VDD_G1
VDD_F17
G6
G1
F17
VDD_G8
VDD_G6
G8
G10
VDD_G14
VDD_G12
VDD_G10
G14
G12
VDD_H7
VDD_G16
H7
H13
G16
VDD_H17
VDD_H15
VDD_H13
H17
H15
VDD_J16
VDD_J14
J12
J16
J14
VDD_K5
VDD_K4
VDD_J12
K5
K4
AMC CPU F1207
HETERO 8 OF 11
VDD_K7
K7
CPU socket screws
ADD3=ADD*_RP956
ADD2=ADD*_RP956
ADD3=ADD*_RP956
ADD1=ADD*_RP956
CPU socket washers
ADD4=ADD*_GR683
ADD5=ADD*_GR683
ADD6=ADD*_GR683
ADD7=ADD*_GR683
X01_DTXXXXX
+VCORE_CPU1
2
3
AP34
VSS_AP34
J_CPU1
VDD_K9
K9
AR9
AR5
AP35
VSS_AR9
VSS_AR5
VSS_AP35
VDD_K17
VDD_K15
VDD_K13
K17
K15
K13
AR32
AR27
AR24
VSS_AR32
VSS_AR27
VSS_AR24
VDD_L10
VDD_L3
VDD_L2
L3
L2
L10
B17
B13
B12
VSS_B13
VSS_B12
VDD_L14
VDD_L12
L16
L14
L12
B28
B21
VSS_B28
VSS_B21
VSS_B17
VDD_L20
VDD_L18
VDD_L16
L20
L18
J_CPU1
C4
B35
B33
VSS_B35
VSS_B33
VDD_M11
VDD_M7
M7
M13
M11
N17
N15
VSS_N17
VSS_N15
C26
C8
VSS_C8
VSS_C4
VSS_C26
VDD_M17
VDD_M15
VDD_M13
M17
M15
N23
N21
N19
VSS_N21
VSS_N19
D14
D12
C31
VSS_D12
VSS_C31
VDD_M21
VDD_M19
N8
M21
M19
P8
N26
VSS_P8
VSS_N26
VSS_N23
D22
D18
VSS_D22
VSS_D18
VSS_D14
VDD_N12
VDD_N10
VDD_N8
N12
N10
P14
P12
P10
VSS_P12
VSS_P10
D34
D29
D24
VSS_D29
VSS_D24
VDD_N16
VDD_N14
N18
N16
N14
P18
P16
VSS_P18
VSS_P16
VSS_P14
E9
E5
VSS_E9
VSS_E5
VSS_D34
VDD_P4
VDD_N20
VDD_N18
P4
N20
P24
P22
P20
VSS_P22
VSS_P20
F14
E32
E27
VSS_E32
VSS_E27
VDD_P7
VDD_P5
P9
P7
P5
R7
P29
VSS_R7
VSS_P29
VSS_P24
F22
F16
VSS_F22
VSS_F16
VSS_F14
VDD_P13
VDD_P11
VDD_P9
P13
P11
R13
R11
R9
VSS_R9
VSS_R11
F35
F30
F25
VSS_F30
VSS_F25
VDD_P17
VDD_P15
P19
P17
P15
R17
R15
VSS_R17
VSS_R15
VSS_R13
G7
G5
VSS_G7
VSS_G5
VSS_F35
VDD_R2
VDD_P21
VDD_P19
R2
P21
R23
R21
R19
VSS_R21
VSS_R19
G13
G11
G9
VSS_G9
VSS_G11
VDD_R8
VDD_R3
R8
R3
R10
T4
R27
VSS_T4
VSS_R27
VSS_R23
G17
G15
VSS_G17
VSS_G15
VSS_G13
VDD_R14
VDD_R12
VDD_R10
R14
R12
T10
T8
T5
VSS_T8
VSS_T5
G28
G25
G22
VSS_G25
VSS_G22
VDD_R18
VDD_R16
R20
R18
R16
T14
T12
VSS_T14
VSS_T12
VSS_T10
H4
G33
VSS_H4
VSS_G33
VSS_G28
VDD_T11
VDD_T9
VDD_R20
T9
T11
T20
T18
T16
VSS_T18
VSS_T16
H14
H12
H5
VSS_H5
VSS_H12
VDD_T15
VDD_T13
T17
T15
T13
T24
T22
VSS_T24
VSS_T22
VSS_T20
H22
H16
VSS_H22
VSS_H16
VSS_H14
VDD_T21
VDD_T19
VDD_T17
T21
T19
U3
U2
T25
VSS_U2
VSS_T25
H24
H23
VSS_H24
VSS_H23
VDD_U14
VDD_U12
U14
U12
U13
U11
VSS_U3
VSS_U11
J2
H31
H26
VSS_H31
VSS_H26
VDD_U18
VDD_U16
U20
U18
U16
U17
U15
VSS_U17
VSS_U15
VSS_U13
J7
J3
VSS_J7
VSS_J3
VSS_J2
VDD_V5
VDD_V4
VDD_U20
V5
V4
U23
U21
U19
VSS_U21
VSS_U19
J17
J15
J13
VSS_J15
VSS_J13
VDD_V13
VDD_V11
V15
V13
V11
V12
U27
VSS_V12
VSS_U27
VSS_U23
J23
J21
VSS_J23
VSS_J21
VSS_J17
VDD_V19
VDD_V17
VDD_V15
V19
V17
V18
V16
V14
VSS_V16
VSS_V14
K8
J34
J29
VSS_J34
VSS_J29
VDD_W2
VDD_V21
W3
W2
V21
V22
V20
VSS_V22
VSS_V20
VSS_V18
K12
K10
VSS_K8
VSS_K10
VDD_W8
VDD_W3
W8
W10
V26
V24
VSS_V26
VSS_V24
K16
K14
VSS_K16
VSS_K14
VSS_K12
VDD_W14
VDD_W12
VDD_W10
W14
W12
W11
W9
W7
VSS_W9
VSS_W7
K23
K21
K18
VSS_K21
VSS_K18
VDD_W18
VDD_W16
W20
W18
W16
W15
W13
VSS_W15
VSS_W13
VSS_W11
K32
K27
VSS_K32
VSS_K27
VSS_K23
VDD_Y9
VDD_Y7
VDD_W20
Y9
Y7
W21
W19
W17
VSS_W19
VSS_W17
L11
L9
L7
VSS_L9
VSS_L7
VDD_Y13
VDD_Y11
Y15
Y13
Y11
W29
W23
VSS_W29
VSS_W23
VSS_W21
L15
L13
VSS_L15
VSS_L13
VSS_L11
VDD_Y19
VDD_Y17
VDD_Y15
Y19
Y17
Y8
Y5
Y4
VSS_Y5
VSS_Y4
U9
L17
VSS_U9
VSS_L17
VDD_V9
VDD_Y21
V9
Y21
Y12
Y10
VSS_Y8
VSS_Y10
V10
VSS_V10
AMC CPU F1207
HETERO 9 OF 11
VDD_U10
U10
Y18
Y16
Y14
VSS_Y18
VSS_Y16
VSS_Y14
VSS_Y12
Y24
Y22
Y20
VSS_Y22
VSS_Y20
T7
Y27
VSS_T7
VSS_Y27
VSS_Y24
AJ13
F12
VSS_F12
VSS_AJ13
142,143
+VCORE_CPU1
AMC CPU F1207
HETERO 11 OF 11
CPU1_CORE_TYPE
VCORE_CPU1_NB
30,55,142
J_CPU1
NC_CPU1_J18
NC_CPU1_G19
NC_CPU1_H11
NC_CPU1_J11
NC_CPU1_K11 NC_CPU1_AG18
J18
G19
AN1
H11
J11
K11
AA22
AA24
AB23
AC22
AC24
AD23
AE22
AF23
AG24
AH23
L22
M23
N22
N24
P23
R22
R24
T23
U22
U24
V23
W22
W24
Y23
RSVD_J18
RSVD_G19
RSVD_AN1
RSVD_H11
RSVD_J11
RSVD_K11
VDD_AA22
VDD_AA24
VDD_AB23
VDD_AC22
VDD_AC24
VDD_AD23
VDD_AE22
VDD_AF23
VDD_AG24
VDD_AH23
VDD_L22
VDD_M23
VDD_N22
VDD_N24
VDD_P23
VDD_R22
VDD_R24
VDD_T23
VDD_U22
VDD_U24
VDD_V23
VDD_W22
VDD_W24
VDD_Y23
RSVD_H10
RSVD_H9
RSVD_AJ18
RSVD_AH18
RSVD_AG18
AMC CPU F1207
HETERO 7 OF 11
J_CPU1
VSS_L19
VSS_L21
VSS_L23
VSS_L25
VSS_L30
VSS_L35
VSS_M4
VSS_M5
VSS_M8
VSS_M10
VSS_M12
VSS_M14
VSS_M16
VSS_M18
VSS_M20
VSS_M22
VSS_M24
VSS_M28
VSS_N2
VSS_N3
VSS_N7
VSS_N9
VSS_N11
VSS_N13
AMC CPU F1207
HETERO 10 OF 11
H10
H9
AJ18
AH18
AG18
L19
L21
L23
L25
L30
L35
M4
M5
M8
M10
M12
M14
M16
M18
M20
M22
M24
M28
N2
N3
N7
N9
N11
N13
CPU1_NB_COREFB_POS
CPU1_NB_COREFB_NEG
NC_CPU1_AJ18
NC_CPU1_AH18
2
142
142
3
4
+MEM_CPU1
ROOM=CPU1
VDDIO2
VDDIO1
AA35
AA30
VDDIO4
VDDIO3
AC31
AB33
VDDIO6
VDDIO5
AE32
AD34
VDDIO8
VDDIO7
AG33
AF35
+VTT_CPU1
VDDIO10
VDDIO9
AJ34
AH31
VDDIO12
VDDIO11
N31
M33
AL35
VDDIO15
VDDIO14
VDDIO13
R32
P34
VDDIO17
VDDIO16
U33
T35
T30
VDDIO20
VDDIO19
VDDIO18
W34
V31
VDDIO21
Y32
VTT1
A23
VTT2
AN23
AM23
VTT4
VTT3
AP23
VTT5
B23
AR23
VTT7
VTT6
C23
VTT8
D23
VTT9
E23
AL23
VTT10
VLDT_02
VLDT_01
AH3
AH2
AH1
VLDT_04
VLDT_03
AH4
VLDT_12
VLDT_11
E1
D1
C1
VLDT_14
VLDT_13
F1
VLDT_22
VLDT_21
AP2
AN2
AM2
VLDT_24
VLDT_23
AR2
+1.2V_VLDT
CPU1 POWER
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
10/20/2006
DCBA
CPUS,FSB,NB,XDP0,XDP1
SEC
REV.
X01
15 OF 144
MCH
211
4
Page 16
A B C
D
1
HT_CK_C1L0_C2L0_1_DP
12
HT_CK_C1L0_C2L0_1_DN
12
HT_CK_C1L0_C2L0_0_DP
12
HT_CK_C1L0_C2L0_0_DN
12
HT_CT_C1L0_C2L0_1_DP
12
HT_CT_C1L0_C2L0_1_DN
12
HT_CT_C1L0_C2L0_0_DP
12
HT_CT_C1L0_C2L0_0_DN
12
J_CPU2
M6 AC5
L0_CLKIN_H_1 L0_CLKOUT_H_1
N6
L0_CLKIN_L_1
M3 AC1
L0_CLKIN_H_0 L0_CLKOUT_H_0
M2
L0_CLKIN_L_0
U4
L0_CTLIN_H_1
U5
L0_CTLIN_L_1
T1
L0_CTLIN_H_0
U1
L0_CTLIN_L_0
L0_CLKOUT_L_1
L0_CLKOUT_L_0
L0_CTLOUT_H_1
L0_CTLOUT_L_1
L0_CTLOUT_H_0
L0_CTLOUT_L_0
AC4
AB1
W6
V6
V2
V3
HT_CK_C2L0_C1L0_1_DP
HT_CK_C2L0_C1L0_1_DN
HT_CK_C2L0_C1L0_0_DP
HT_CK_C2L0_C1L0_0_DN
HT_CT_C2L0_C1L0_1_DP
HT_CT_C2L0_C1L0_1_DN
HT_CT_C2L0_C1L0_0_DP
HT_CT_C2L0_C1L0_0_DN
12
12
12
12
12
12
12
12
HT_CK_C1L2_C2L1_1_DP
12
HT_CK_C1L2_C2L1_1_DN
12
HT_CK_C1L2_C2L1_0_DP
12
HT_CK_C1L2_C2L1_0_DN
12
HT_CT_C1L2_C2L1_1_DP
12
HT_CT_C1L2_C2L1_1_DN
12
HT_CT_C1L2_C2L1_0_DP
12
HT_CT_C1L2_C2L1_0_DN
12
E18
L1_CLKIN_H_1
E17
L1_CLKIN_L_1
C18
L1_CLKIN_H_0
B18
L1_CLKIN_L_0
C13
L1_CTLIN_H_1
D13
L1_CTLIN_L_1
A14
L1_CTLIN_H_0
A13
L1_CTLIN_L_0
J_CPU2
L1_CLKOUT_H_1
L1_CLKOUT_L_1
L1_CLKOUT_H_0
L1_CLKOUT_L_0
L1_CTLOUT_H_1
L1_CTLOUT_L_1
L1_CTLOUT_H_0
L1_CTLOUT_L_0
E6
D6
B6
B7
F10
F11
C11
D11
HT_CK_C2L1_C1L2_1_DP
HT_CK_C2L1_C1L2_1_DN
HT_CK_C2L1_C1L2_0_DP
HT_CK_C2L1_C1L2_0_DN
HT_CT_C2L1_C1L2_1_DP
HT_CT_C2L1_C1L2_1_DN
HT_CT_C2L1_C1L2_0_DP
HT_CT_C2L1_C1L2_0_DN
1
12
12
12
12
12
12
12
12
2
3
HT_AD_C1L0_C2L0_15_DP
12
HT_AD_C1L0_C2L0_15_DN
12
HT_AD_C1L0_C2L0_14_DP
12
HT_AD_C1L0_C2L0_14_DN
12
HT_AD_C1L0_C2L0_13_DP
12
HT_AD_C1L0_C2L0_13_DN
12
HT_AD_C1L0_C2L0_12_DP
12
HT_AD_C1L0_C2L0_12_DN
12
HT_AD_C1L0_C2L0_11_DP
12
HT_AD_C1L0_C2L0_11_DN
12
HT_AD_C1L0_C2L0_10_DP
12
HT_AD_C1L0_C2L0_10_DN
12
HT_AD_C1L0_C2L0_9_DP
12
HT_AD_C1L0_C2L0_9_DN
12
HT_AD_C1L0_C2L0_8_DP
12
HT_AD_C1L0_C2L0_8_DN
12
HT_AD_C1L0_C2L0_7_DP
12
HT_AD_C1L0_C2L0_7_DN
12
HT_AD_C1L0_C2L0_6_DP
12
HT_AD_C1L0_C2L0_6_DN
12
HT_AD_C1L0_C2L0_5_DP
12
HT_AD_C1L0_C2L0_5_DN
12
HT_AD_C1L0_C2L0_4_DP
12
HT_AD_C1L0_C2L0_4_DN
12
HT_AD_C1L0_C2L0_3_DP
12
HT_AD_C1L0_C2L0_3_DN
12
HT_AD_C1L0_C2L0_2_DP
12
HT_AD_C1L0_C2L0_2_DN
12
HT_AD_C1L0_C2L0_1_DP
12
HT_AD_C1L0_C2L0_1_DN
12
HT_AD_C1L0_C2L0_0_DP
12
HT_AD_C1L0_C2L0_0_DN
12
T6
L0_CADIN_H_15
U6
L0_CADIN_L_15
R4
L0_CADIN_H_14
R5
L0_CADIN_L_14
P6
L0_CADIN_H_13
R6
L0_CADIN_L_13
N4
L0_CADIN_H_12
N5
L0_CADIN_L_12
L4
L0_CADIN_H_11
L5
L0_CADIN_L_11
K6
L0_CADIN_H_10
L6
L0_CADIN_L_10
J4
L0_CADIN_H_9
J5
L0_CADIN_L_9
H6
L0_CADIN_H_8
J6
L0_CADIN_L_8
T3
L0_CADIN_H_7
P1
L0_CADIN_L_7
T2
L0_CADIN_H_6
R1
L0_CADIN_L_6
P3
L0_CADIN_H_5
P2
L0_CADIN_L_5
M1
L0_CADIN_H_4
N1
L0_CADIN_L_4
K1
L0_CADIN_H_3
L1
L0_CADIN_L_3
K3
L0_CADIN_H_2
K2
L0_CADIN_L_2
H1
L0_CADIN_H_1
J1
L0_CADIN_L_1
H3
L0_CADIN_H_0
H2
L0_CADIN_L_0
L0_CADOUT_H_15
L0_CADOUT_L_15
L0_CADOUT_H_14
L0_CADOUT_L_14
L0_CADOUT_H_13
L0_CADOUT_L_13
L0_CADOUT_H_12
L0_CADOUT_L_12
L0_CADOUT_H_11
L0_CADOUT_L_11
L0_CADOUT_H_10
L0_CADOUT_L_10
L0_CADOUT_H_9
L0_CADOUT_L_9
L0_CADOUT_H_8
L0_CADOUT_L_8
L0_CADOUT_H_7
L0_CADOUT_L_7
L0_CADOUT_H_6
L0_CADOUT_L_6
L0_CADOUT_H_5
L0_CADOUT_L_5
L0_CADOUT_H_4
L0_CADOUT_L_4
L0_CADOUT_H_3
L0_CADOUT_L_3
L0_CADOUT_H_2
L0_CADOUT_L_2
L0_CADOUT_H_1
L0_CADOUT_L_1
L0_CADOUT_H_0
L0_CADOUT_L_0
W5
W4
AA6
Y6
AA5
AA4
AC6
AB6
AE6
AD6
AE5
AE4
AG6
AF6
AG5
AG4
W1
V1
Y2
Y3
AA1
Y1
AB2
AB3
AD2
AD3
AE1
AD1
AF2
AF3
AG1
AF1
HT_AD_C2L0_C1L0_15_DP
HT_AD_C2L0_C1L0_15_DN
HT_AD_C2L0_C1L0_14_DP
HT_AD_C2L0_C1L0_14_DN
HT_AD_C2L0_C1L0_13_DP
HT_AD_C2L0_C1L0_13_DN
HT_AD_C2L0_C1L0_12_DP
HT_AD_C2L0_C1L0_12_DN
HT_AD_C2L0_C1L0_11_DP
HT_AD_C2L0_C1L0_11_DN
HT_AD_C2L0_C1L0_10_DP
HT_AD_C2L0_C1L0_10_DN
HT_AD_C2L0_C1L0_9_DP
HT_AD_C2L0_C1L0_9_DN
HT_AD_C2L0_C1L0_8_DP
HT_AD_C2L0_C1L0_8_DN
HT_AD_C2L0_C1L0_7_DP
HT_AD_C2L0_C1L0_7_DN
HT_AD_C2L0_C1L0_6_DP
HT_AD_C2L0_C1L0_6_DN
HT_AD_C2L0_C1L0_5_DP
HT_AD_C2L0_C1L0_5_DN
HT_AD_C2L0_C1L0_4_DP
HT_AD_C2L0_C1L0_4_DN
HT_AD_C2L0_C1L0_3_DP
HT_AD_C2L0_C1L0_3_DN
HT_AD_C2L0_C1L0_2_DP
HT_AD_C2L0_C1L0_2_DN
HT_AD_C2L0_C1L0_1_DP
HT_AD_C2L0_C1L0_1_DN
HT_AD_C2L0_C1L0_0_DP
HT_AD_C2L0_C1L0_0_DN
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
HT_AD_C1L2_C2L1_15_DP
12
HT_AD_C1L2_C2L1_15_DN
12
HT_AD_C1L2_C2L1_14_DP
12
HT_AD_C1L2_C2L1_14_DN
12
HT_AD_C1L2_C2L1_13_DP
12
HT_AD_C1L2_C2L1_13_DN
12
HT_AD_C1L2_C2L1_12_DP
12
HT_AD_C1L2_C2L1_12_DN
12
HT_AD_C1L2_C2L1_11_DP
12
HT_AD_C1L2_C2L1_11_DN
12
HT_AD_C1L2_C2L1_10_DP
12
HT_AD_C1L2_C2L1_10_DN
12
HT_AD_C1L2_C2L1_9_DP
12
HT_AD_C1L2_C2L1_9_DN
12
HT_AD_C1L2_C2L1_8_DP
12
HT_AD_C1L2_C2L1_8_DN
12
HT_AD_C1L2_C2L1_7_DP
12
HT_AD_C1L2_C2L1_7_DN
12
HT_AD_C1L2_C2L1_6_DP
12
HT_AD_C1L2_C2L1_6_DN
12
HT_AD_C1L2_C2L1_5_DP
12
HT_AD_C1L2_C2L1_5_DN
12
HT_AD_C1L2_C2L1_4_DP
12
HT_AD_C1L2_C2L1_4_DN
12
HT_AD_C1L2_C2L1_3_DP
12
HT_AD_C1L2_C2L1_3_DN
12
HT_AD_C1L2_C2L1_2_DP
12
HT_AD_C1L2_C2L1_2_DN
12
HT_AD_C1L2_C2L1_1_DP
12
HT_AD_C1L2_C2L1_1_DN
12
HT_AD_C1L2_C2L1_0_DP
12
HT_AD_C1L2_C2L1_0_DN
12
E14
L1_CADIN_H_15
E13
L1_CADIN_L_15
C15
L1_CADIN_H_14
D15
L1_CADIN_L_14
E16
L1_CADIN_H_13
E15
L1_CADIN_L_13
C17
L1_CADIN_H_12
D17
L1_CADIN_L_12
C19
L1_CADIN_H_11
D19
L1_CADIN_L_11
E20
L1_CADIN_H_10
E19
L1_CADIN_L_10
C21
L1_CADIN_H_9
D21
L1_CADIN_L_9
E22
L1_CADIN_H_8
E21
L1_CADIN_L_8
C14
L1_CADIN_H_7
B14
L1_CADIN_L_7
A16
L1_CADIN_H_6
A15
L1_CADIN_L_6
C16
L1_CADIN_H_5
B16
L1_CADIN_L_5
A18
L1_CADIN_H_4
A17
L1_CADIN_L_4
A20
L1_CADIN_H_3
A19
L1_CADIN_L_3
C20
L1_CADIN_H_2
B20
L1_CADIN_L_2
A22
L1_CADIN_H_1
A21
L1_CADIN_L_1
C22
L1_CADIN_H_0
B22
L1_CADIN_L_0
L1_CADOUT_H_15
L1_CADOUT_L_15
L1_CADOUT_H_14
L1_CADOUT_L_14
L1_CADOUT_H_13
L1_CADOUT_L_13
L1_CADOUT_H_12
L1_CADOUT_L_12
L1_CADOUT_H_11
L1_CADOUT_L_11
L1_CADOUT_H_10
L1_CADOUT_L_10
L1_CADOUT_H_9
L1_CADOUT_L_9
L1_CADOUT_H_8
L1_CADOUT_L_8
L1_CADOUT_H_7
L1_CADOUT_L_7
L1_CADOUT_H_6
L1_CADOUT_L_6
L1_CADOUT_H_5
L1_CADOUT_L_5
L1_CADOUT_H_4
L1_CADOUT_L_4
L1_CADOUT_H_3
L1_CADOUT_L_3
L1_CADOUT_H_2
L1_CADOUT_L_2
L1_CADOUT_H_1
L1_CADOUT_L_1
L1_CADOUT_H_0
L1_CADOUT_L_0
E10
D10
F8
F9
E8
D8
F6
F7
F4
F5
E4
D4
F2
F3
E2
D2
B10
B11
C9
D9
B8
B9
C7
D7
C5
D5
B4
B5
C3
D3
B2
B3
HT_AD_C2L1_C1L2_15_DP
HT_AD_C2L1_C1L2_15_DN
HT_AD_C2L1_C1L2_14_DP
HT_AD_C2L1_C1L2_14_DN
HT_AD_C2L1_C1L2_13_DP
HT_AD_C2L1_C1L2_13_DN
HT_AD_C2L1_C1L2_12_DP
HT_AD_C2L1_C1L2_12_DN
HT_AD_C2L1_C1L2_11_DP
HT_AD_C2L1_C1L2_11_DN
HT_AD_C2L1_C1L2_10_DP
HT_AD_C2L1_C1L2_10_DN
HT_AD_C2L1_C1L2_9_DP
HT_AD_C2L1_C1L2_9_DN
HT_AD_C2L1_C1L2_8_DP
HT_AD_C2L1_C1L2_8_DN
HT_AD_C2L1_C1L2_7_DP
HT_AD_C2L1_C1L2_7_DN
HT_AD_C2L1_C1L2_6_DP
HT_AD_C2L1_C1L2_6_DN
HT_AD_C2L1_C1L2_5_DP
HT_AD_C2L1_C1L2_5_DN
HT_AD_C2L1_C1L2_4_DP
HT_AD_C2L1_C1L2_4_DN
HT_AD_C2L1_C1L2_3_DP
HT_AD_C2L1_C1L2_3_DN
HT_AD_C2L1_C1L2_2_DP
HT_AD_C2L1_C1L2_2_DN
HT_AD_C2L1_C1L2_1_DP
HT_AD_C2L1_C1L2_1_DN
HT_AD_C2L1_C1L2_0_DP
HT_AD_C2L1_C1L2_0_DN
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
2
3
From CPU1 L0
AMC CPU F1207
HETERO 1 OF 11
To CPU1 L0 From CPU1 L2
CPU2 TO CPU1 HYPER TRANSPORT LINKS
AMC CPU F1207
HETERO 2 OF 11
To CPU1 L2
4
ROOM=CPU2
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
10/20/2006
DCBA
4
REV.
X01
16 OF 144
Page 17
1
2
3
4
A B C
CK_CPU2_MEM_MA0_DP
36
CK_CPU2_MEM_MA0_DN
36
36,38
36,38
36,38
37,38
37,38
37,38
36,38
36,38
36,38
37,38
37,38
37,38
X00_DT10369 SCH name fix
36-38
36-38
36-38
36-38
36,37
36-38
36-38
36-38
37,38
36,38
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
CPU2_MEM_MA0_CS_L1
CPU2_MEM_MA0_CS_L0
CPU2_MEM_MA0_ODT0
CK_CPU2_MEM_MA1_DP
37
CK_CPU2_MEM_MA1_DN
37
CPU2_MEM_MA1_CS_L1
CPU2_MEM_MA1_CS_L0
CPU2_MEM_MA1_ODT0
NC_CPU2_Y30
NC_CPU2_Y31
CPU2_MEM_MA2_CS_L1
CPU2_MEM_MA2_CS_L0
CPU2_MEM_MA2_ODT0
NC_CPU2_AA31
NC_CPU2_AA32
CPU2_MEM_MA3_CS_L1
CPU2_MEM_MA3_CS_L0
CPU2_MEM_MA3_ODT0
CPU2_MEM_MA_ERR_R_N
38
CPU2_MEM_MA_PAR
CPU2_MEM_MA_CAS_N
CPU2_MEM_MA_RAS_N
CPU2_MEM_MA_WE_N
CPU2_MEM_MA_RESET_N
CPU2_MEM_MA_BANK2
CPU2_MEM_MA_BANK1
CPU2_MEM_MA_BANK0
CPU2_MEM_MA_CKE1
CPU2_MEM_MA_CKE0
CPU2_MEM_MA_DQS_17_DP
CPU2_MEM_MA_DQS_17_DN
CPU2_MEM_MA_DQS_16_DP
CPU2_MEM_MA_DQS_16_DN
CPU2_MEM_MA_DQS_15_DP
CPU2_MEM_MA_DQS_15_DN
CPU2_MEM_MA_DQS_14_DP
CPU2_MEM_MA_DQS_14_DN
CPU2_MEM_MA_DQS_13_DP
CPU2_MEM_MA_DQS_13_DN
CPU2_MEM_MA_DQS_12_DP
CPU2_MEM_MA_DQS_12_DN
CPU2_MEM_MA_DQS_11_DP
CPU2_MEM_MA_DQS_11_DN
CPU2_MEM_MA_DQS_10_DP
CPU2_MEM_MA_DQS_10_DN
CPU2_MEM_MA_DQS_9_DP
CPU2_MEM_MA_DQS_9_DN
CPU2_MEM_MA_DQS_8_DP
CPU2_MEM_MA_DQS_8_DN
CPU2_MEM_MA_DQS_7_DP
CPU2_MEM_MA_DQS_7_DN
CPU2_MEM_MA_DQS_6_DP
CPU2_MEM_MA_DQS_6_DN
CPU2_MEM_MA_DQS_5_DP
CPU2_MEM_MA_DQS_5_DN
CPU2_MEM_MA_DQS_4_DP
CPU2_MEM_MA_DQS_4_DN
CPU2_MEM_MA_DQS_3_DP
CPU2_MEM_MA_DQS_3_DN
CPU2_MEM_MA_DQS_2_DP
CPU2_MEM_MA_DQS_2_DN
CPU2_MEM_MA_DQS_1_DP
CPU2_MEM_MA_DQS_1_DN
CPU2_MEM_MA_DQS_0_DP
CPU2_MEM_MA_DQS_0_DN
AD31
AD32
AM34
AH33
AJ32
AE31
AF31
AM35
AH34
AK34
Y30
Y31
AC30
AB32
AB31
AA31
AA32
AD30
AB30
AC32
P30
AF32
AJ33
AH32
AJ31
D33
N32
AF33
AG32
M30
M31
T27
T26
AL26
AM26
AL31
AM31
AH29
AG29
AB27
AC27
J31
J32
L29
K29
D31
D32
F27
F26
U25
U26
AK25
AK26
AK30
AK31
AH28
AJ28
AD26
AD27
K33
J33
H29
G29
F31
E31
D27
D26
MA0_CLK_H
MA0_CLK_L
MA0_CS_L_1
MA0_CS_L_0
MA0_ODT_0
MA1_CLK_H
MA1_CLK_L
MA1_CS_L_1
MA1_CS_L_0
MA1_ODT_0
MA2_CLK_H
MA2_CLK_L
MA2_CS_L_1
MA2_CS_L_0
MA2_ODT_0
MA3_CLK_H
MA3_CLK_L
MA3_CS_L_1
MA3_CS_L_0
MA3_ODT_0
MA_ERR_L
MA_PAR
MA_CAS_L
MA_RAS_L
MA_WE_L
MA_RESET_L
MA_BANK_2
MA_BANK_1
MA_BANK_0
MA_CKE_1
MA_CKE_0
MA_DQS_H_17
MA_DQS_L_17
MA_DQS_H_16
MA_DQS_L_16
MA_DQS_H_15
MA_DQS_L_15
MA_DQS_H_14
MA_DQS_L_14
MA_DQS_H_13
MA_DQS_L_13
MA_DQS_H_12
MA_DQS_L_12
MA_DQS_H_11
MA_DQS_L_11
MA_DQS_H_10
MA_DQS_L_10
MA_DQS_H_9
MA_DQS_L_9
MA_DQS_H_8
MA_DQS_L_8
MA_DQS_H_7
MA_DQS_L_7
MA_DQS_H_6
MA_DQS_L_6
MA_DQS_H_5
MA_DQS_L_5
MA_DQS_H_4
MA_DQS_L_4
MA_DQS_H_3
MA_DQS_L_3
MA_DQS_H_2
MA_DQS_L_2
MA_DQS_H_1
MA_DQS_L_1
MA_DQS_H_0
MA_DQS_L_0
J_CPU2
AMC CPU F1207
HETERO 4 OF 11
MA_DATA_63
MA_DATA_62
MA_DATA_61
MA_DATA_60
MA_DATA_59
MA_DATA_58
MA_DATA_57
MA_DATA_56
MA_DATA_55
MA_DATA_54
MA_DATA_53
MA_DATA_52
MA_DATA_51
MA_DATA_50
MA_DATA_49
MA_DATA_48
MA_DATA_47
MA_DATA_46
MA_DATA_45
MA_DATA_44
MA_DATA_43
MA_DATA_42
MA_DATA_41
MA_DATA_40
MA_DATA_39
MA_DATA_38
MA_DATA_37
MA_DATA_36
MA_DATA_35
MA_DATA_34
MA_DATA_33
MA_DATA_32
MA_DATA_31
MA_DATA_30
MA_DATA_29
MA_DATA_28
MA_DATA_27
MA_DATA_26
MA_DATA_25
MA_DATA_24
MA_DATA_23
MA_DATA_22
MA_DATA_21
MA_DATA_20
MA_DATA_19
MA_DATA_18
MA_DATA_17
MA_DATA_16
MA_DATA_15
MA_DATA_14
MA_DATA_13
MA_DATA_12
MA_DATA_11
MA_DATA_10
MA_DATA_9
MA_DATA_8
MA_DATA_7
MA_DATA_6
MA_DATA_5
MA_DATA_4
MA_DATA_3
MA_DATA_2
MA_DATA_1
MA_DATA_0
MA_ADD_0
MA_ADD_1
MA_ADD_2
MA_ADD_3
MA_ADD_4
MA_ADD_5
MA_ADD_6
MA_ADD_7
MA_ADD_8
MA_ADD_9
MA_ADD_10
MA_ADD_11
MA_ADD_12
MA_ADD_13
MA_ADD_14
MA_ADD_15
MA_CHECK_7
MA_CHECK_6
MA_CHECK_5
MA_CHECK_4
MA_CHECK_3
MA_CHECK_2
MA_CHECK_1
MA_CHECK_0
AM24
AM25
AL28
AK28
AK24
AL24
AM27
AL27
AK29
AM30
AL33
AK33
AM29
AL29
AM32
AL32
AF28
AF29
AG30
AE30
AE28
AE29
AH30
AJ30
AB25
AB26
AC29
AB29
AC25
AD25
AD28
AC28
L31
K31
G32
G31
L32
L33
H33
H32
H30
G30
K28
L28
K30
J30
H28
J28
E33
D35
F29
E29
F33
F32
E30
D30
F28
E26
B24
C24
E28
D28
E25
D25
AE33
V33
Y33
U31
U32
U30
T32
R31
T31
P32
AG31
R30
P31
AL34
N30
M32
V29
V27
R29
R28
V25
V28
R25
R26
CPU2_MEM_MA_DATA63
CPU2_MEM_MA_DATA62
CPU2_MEM_MA_DATA61
CPU2_MEM_MA_DATA60
CPU2_MEM_MA_DATA59
CPU2_MEM_MA_DATA58
CPU2_MEM_MA_DATA57
CPU2_MEM_MA_DATA56
CPU2_MEM_MA_DATA55
CPU2_MEM_MA_DATA54
CPU2_MEM_MA_DATA53
CPU2_MEM_MA_DATA52
CPU2_MEM_MA_DATA51
CPU2_MEM_MA_DATA50
CPU2_MEM_MA_DATA49
CPU2_MEM_MA_DATA48
CPU2_MEM_MA_DATA47
CPU2_MEM_MA_DATA46
CPU2_MEM_MA_DATA45
CPU2_MEM_MA_DATA44
CPU2_MEM_MA_DATA43
CPU2_MEM_MA_DATA42
CPU2_MEM_MA_DATA41
CPU2_MEM_MA_DATA40
CPU2_MEM_MA_DATA39
CPU2_MEM_MA_DATA38
CPU2_MEM_MA_DATA37
CPU2_MEM_MA_DATA36
CPU2_MEM_MA_DATA35
CPU2_MEM_MA_DATA34
CPU2_MEM_MA_DATA33
CPU2_MEM_MA_DATA32
CPU2_MEM_MA_DATA31
CPU2_MEM_MA_DATA30
CPU2_MEM_MA_DATA29
CPU2_MEM_MA_DATA28
CPU2_MEM_MA_DATA27
CPU2_MEM_MA_DATA26
CPU2_MEM_MA_DATA25
CPU2_MEM_MA_DATA24
CPU2_MEM_MA_DATA23
CPU2_MEM_MA_DATA22
CPU2_MEM_MA_DATA21
CPU2_MEM_MA_DATA20
CPU2_MEM_MA_DATA19
CPU2_MEM_MA_DATA18
CPU2_MEM_MA_DATA17
CPU2_MEM_MA_DATA16
CPU2_MEM_MA_DATA15
CPU2_MEM_MA_DATA14
CPU2_MEM_MA_DATA13
CPU2_MEM_MA_DATA12
CPU2_MEM_MA_DATA11
CPU2_MEM_MA_DATA10
CPU2_MEM_MA_DATA9
CPU2_MEM_MA_DATA8
CPU2_MEM_MA_DATA7
CPU2_MEM_MA_DATA6
CPU2_MEM_MA_DATA5
CPU2_MEM_MA_DATA4
CPU2_MEM_MA_DATA3
CPU2_MEM_MA_DATA2
CPU2_MEM_MA_DATA1
CPU2_MEM_MA_DATA0
CPU2_MEM_MA_ADD0
CPU2_MEM_MA_ADD1
CPU2_MEM_MA_ADD2
CPU2_MEM_MA_ADD3
CPU2_MEM_MA_ADD4
CPU2_MEM_MA_ADD5
CPU2_MEM_MA_ADD6
CPU2_MEM_MA_ADD7
CPU2_MEM_MA_ADD8
CPU2_MEM_MA_ADD9
CPU2_MEM_MA_ADD10
CPU2_MEM_MA_ADD11
CPU2_MEM_MA_ADD12
CPU2_MEM_MA_ADD13
CPU2_MEM_MA_ADD14
CPU2_MEM_MA_ADD15
CPU2_MEM_MA_CHECK7
CPU2_MEM_MA_CHECK6
CPU2_MEM_MA_CHECK5
CPU2_MEM_MA_CHECK4
CPU2_MEM_MA_CHECK3
CPU2_MEM_MA_CHECK2
CPU2_MEM_MA_CHECK1
CPU2_MEM_MA_CHECK0
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NC_CPU2_AK7
NC_CPU2_AK8
NC_CPU2_AM7
NC_CPU2_AN7
NC_CPU2_AM12
NC_CPU2_AL12
NC_CPU2_AP11
NC_CPU2_AP12
NC_CPU2_AK11
NC_CPU2_AK12
NC_CPU2_AM10
NC_CPU2_AL10
NC_CPU2_AK9
NC_CPU2_AK10
NC_CPU2_AM8
NC_CPU2_AL8
NC_CPU2_AM6
NC_CPU2_AL6
NC_CPU2_AK5
NC_CPU2_AK6
NC_CPU2_AM4
NC_CPU2_AL4
NC_CPU2_AK3
NC_CPU2_AK4
NC_CPU2_AM11
NC_CPU2_AN11
NC_CPU2_AP9
NC_CPU2_AP10
NC_CPU2_AM9
NC_CPU2_AN9
NC_CPU2_AP7
NC_CPU2_AP8
NC_CPU2_AP5
NC_CPU2_AP6
NC_CPU2_AM5
NC_CPU2_AN5
NC_CPU2_AP3
NC_CPU2_AP4
NC_CPU2_AM3
NC_CPU2_AN3
AK7
AK8
AM7
AN7
AM12
AL12
AP11
AP12
AK11
AK12
AM10
AL10
AK9
AK10
AM8
AL8
AM6
AL6
AK5
AK6
AM4
AL4
AK3
AK4
AM11
AN11
AP9
AP10
AM9
AN9
AP7
AP8
AP5
AP6
AM5
AN5
AP3
AP4
AM3
AN3
L2_CLKIN_H_1
L2_CLKIN_L_1
L2_CLKIN_H_0
L2_CLKIN_L_0
L2_CTLIN_H_1
L2_CTLIN_L_1
L2_CTLIN_H_0
L2_CTLIN_L_0
L2_CADIN_H_15
L2_CADIN_L_15
L2_CADIN_H_14
L2_CADIN_L_14
L2_CADIN_H_13
L2_CADIN_L_13
L2_CADIN_H_12
L2_CADIN_L_12
L2_CADIN_H_11
L2_CADIN_L_11
L2_CADIN_H_10
L2_CADIN_L_10
L2_CADIN_H_9
L2_CADIN_L_9
L2_CADIN_H_8
L2_CADIN_L_8
L2_CADIN_H_7
L2_CADIN_L_7
L2_CADIN_H_6
L2_CADIN_L_6
L2_CADIN_H_5
L2_CADIN_L_5
L2_CADIN_H_4
L2_CADIN_L_4
L2_CADIN_H_3
L2_CADIN_L_3
L2_CADIN_H_2
L2_CADIN_L_2
L2_CADIN_H_1
L2_CADIN_L_1
L2_CADIN_H_0
L2_CADIN_L_0
AMC CPU F1207
HETERO 3 OF 11
CPU 2 NC HYPERTRANSPORT LINK
J_CPU2
L2_CLKOUT_H_1
L2_CLKOUT_L_1
L2_CLKOUT_H_0
L2_CLKOUT_L_0
L2_CTLOUT_H_1
L2_CTLOUT_L_1
L2_CTLOUT_H_0
L2_CTLOUT_L_0
L2_CADOUT_H_15
L2_CADOUT_L_15
L2_CADOUT_H_14
L2_CADOUT_L_14
L2_CADOUT_H_13
L2_CADOUT_L_13
L2_CADOUT_H_12
L2_CADOUT_L_12
L2_CADOUT_H_11
L2_CADOUT_L_11
L2_CADOUT_H_10
L2_CADOUT_L_10
L2_CADOUT_H_9
L2_CADOUT_L_9
L2_CADOUT_H_8
L2_CADOUT_L_8
L2_CADOUT_H_7
L2_CADOUT_L_7
L2_CADOUT_H_6
L2_CADOUT_L_6
L2_CADOUT_H_5
L2_CADOUT_L_5
L2_CADOUT_H_4
L2_CADOUT_L_4
L2_CADOUT_H_3
L2_CADOUT_L_3
L2_CADOUT_H_2
L2_CADOUT_L_2
L2_CADOUT_H_1
L2_CADOUT_L_1
L2_CADOUT_H_0
L2_CADOUT_L_0
AM18
AN18
AR18
AR17
AL14
AL13
AP13
AN13
AM14
AN14
AL16
AL15
AM16
AN16
AL18
AL17
AL20
AL19
AM20
AN20
AL22
AL21
AM22
AN22
AR14
AR13
AP15
AN15
AR16
AR15
AP17
AN17
AP19
AN19
AR20
AR19
AP21
AN21
AR22
AR21
TITLE
D
NC_CPU2_AM18
NC_CPU2_AN18
NC_CPU2_AR18
NC_CPU2_AR17
NC_CPU2_AL14
NC_CPU2_AL13
NC_CPU2_AP13
NC_CPU2_AN13
NC_CPU2_AM14
NC_CPU2_AN14
NC_CPU2_AL16
NC_CPU2_AL15
NC_CPU2_AM16
NC_CPU2_AN16
NC_CPU2_AL18
NC_CPU2_AL17
NC_CPU2_AL20
NC_CPU2_AL19
NC_CPU2_AM20
NC_CPU2_AN20
NC_CPU2_AL22
NC_CPU2_AL21
NC_CPU2_AM22
NC_CPU2_AN22
NC_CPU2_AR14
NC_CPU2_AR13
NC_CPU2_AP15
NC_CPU2_AN15
NC_CPU2_AR16
NC_CPU2_AR15
NC_CPU2_AP17
NC_CPU2_AN17
NC_CPU2_AP19
NC_CPU2_AN19
NC_CPU2_AR20
NC_CPU2_AR19
NC_CPU2_AP21
NC_CPU2_AN21
NC_CPU2_AR22
NC_CPU2_AR21
INC.
1
2
3
4
ROUND ROCK,TEXAS
CPU 2 - CHANNEL A MEMORY
ROOM=CPU2
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
PROCESSOR 2
DWG NO.
DATE
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
10/20/2006
DCBA
REV.
X01
17 OF 144
Page 18
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X00_DT10369 SCH name fix
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4
CK_CPU2_MEM_MB0_DP
36
CK_CPU2_MEM_MB0_DN
36
CPU2_MEM_MB0_CS_L1
CPU2_MEM_MB0_CS_L0
CPU2_MEM_MB0_ODT0
CK_CPU2_MEM_MB1_DP
37
CK_CPU2_MEM_MB1_DN
37
CPU2_MEM_MB1_CS_L1
CPU2_MEM_MB1_CS_L0
CPU2_MEM_MB1_ODT0
NC_CPU2_U29
NC_CPU2_U28
CPU2_MEM_MB2_CS_L1
CPU2_MEM_MB2_CS_L0
CPU2_MEM_MB2_ODT0
NC_CPU2_T29
NC_CPU2_T28
CPU2_MEM_MB3_CS_L1
CPU2_MEM_MB3_CS_L0
CPU2_MEM_MB3_ODT0
CPU2_MEM_MB_ERR_R_N
38
CPU2_MEM_MB_PAR
CPU2_MEM_MB_CAS_N
CPU2_MEM_MB_RAS_N
CPU2_MEM_MB_WE_N
CPU2_MEM_MB_RESET_N
CPU2_MEM_MB_BANK2
CPU2_MEM_MB_BANK1
CPU2_MEM_MB_BANK0
CPU2_MEM_MB_CKE1
CPU2_MEM_MB_CKE0
CPU2_MEM_MB_DQS_17_DP
CPU2_MEM_MB_DQS_17_DN
CPU2_MEM_MB_DQS_16_DP
CPU2_MEM_MB_DQS_16_DN
CPU2_MEM_MB_DQS_15_DP
CPU2_MEM_MB_DQS_15_DN
CPU2_MEM_MB_DQS_14_DP
CPU2_MEM_MB_DQS_14_DN
CPU2_MEM_MB_DQS_13_DP
CPU2_MEM_MB_DQS_13_DN
CPU2_MEM_MB_DQS_12_DP
CPU2_MEM_MB_DQS_12_DN
CPU2_MEM_MB_DQS_11_DP
CPU2_MEM_MB_DQS_11_DN
CPU2_MEM_MB_DQS_10_DP
CPU2_MEM_MB_DQS_10_DN
CPU2_MEM_MB_DQS_9_DP
CPU2_MEM_MB_DQS_9_DN
CPU2_MEM_MB_DQS_8_DP
CPU2_MEM_MB_DQS_8_DN
CPU2_MEM_MB_DQS_7_DP
CPU2_MEM_MB_DQS_7_DN
CPU2_MEM_MB_DQS_6_DP
CPU2_MEM_MB_DQS_6_DN
CPU2_MEM_MB_DQS_5_DP
CPU2_MEM_MB_DQS_5_DN
CPU2_MEM_MB_DQS_4_DP
CPU2_MEM_MB_DQS_4_DN
CPU2_MEM_MB_DQS_3_DP
CPU2_MEM_MB_DQS_3_DN
CPU2_MEM_MB_DQS_2_DP
CPU2_MEM_MB_DQS_2_DN
CPU2_MEM_MB_DQS_1_DP
CPU2_MEM_MB_DQS_1_DN
CPU2_MEM_MB_DQS_0_DP
CPU2_MEM_MB_DQS_0_DN
A B C
J_CPU2
Y35
Y34
AJ35
AE35
AG34
AA34
AA33
AK35
AD35
AG35
U29
U28
W31
V32
W32
T29
T28
W30
V30
W33
P33
AB34
AF34
AD33
AE34
A33
N33
AC34
AC33
M34
M35
M29
N29
AN28
AN27
AN33
AN32
AG27
AH27
AA29
AA28
G34
G35
K26
J26
A31
A32
A26
A27
N27
N28
AP26
AP27
AP31
AP32
AJ26
AJ27
W26
W27
H35
H34
H27
G27
C32
B32
B27
C27
MB0_CLK_H
MB0_CLK_L
MB0_CS_L_1
MB0_CS_L_0
MB0_ODT_0
MB1_CLK_H
MB1_CLK_L
MB1_CS_L_1
MB1_CS_L_0
MB1_ODT_0
MB2_CLK_H
MB2_CLK_L
MB2_CS_L_1
MB2_CS_L_0
MB2_ODT_0
MB3_CLK_H
MB3_CLK_L
MB3_CS_L_1
MB3_CS_L_0
MB3_ODT_0
MB_ERR_L
MB_PAR
MB_CAS_L
MB_RAS_L
MB_WE_L
MB_RESET_L
MB_BANK_2
MB_BANK_1
MB_BANK_0
MB_CKE_1
MB_CKE_0
MB_DQS_H_17
MB_DQS_L_17
MB_DQS_H_16
MB_DQS_L_16
MB_DQS_H_15
MB_DQS_L_15
MB_DQS_H_14
MB_DQS_L_14
MB_DQS_H_13
MB_DQS_L_13
MB_DQS_H_12
MB_DQS_L_12
MB_DQS_H_11
MB_DQS_L_11
MB_DQS_H_10
MB_DQS_L_10
MB_DQS_H_9
MB_DQS_L_9
MB_DQS_H_8
MB_DQS_L_8
MB_DQS_H_7
MB_DQS_L_7
MB_DQS_H_6
MB_DQS_L_6
MB_DQS_H_5
MB_DQS_L_5
MB_DQS_H_4
MB_DQS_L_4
MB_DQS_H_3
MB_DQS_L_3
MB_DQS_H_2
MB_DQS_L_2
MB_DQS_H_1
MB_DQS_L_1
MB_DQS_H_0
MB_DQS_L_0
MB_DATA_63
MB_DATA_62
MB_DATA_61
MB_DATA_60
MB_DATA_59
MB_DATA_58
MB_DATA_57
MB_DATA_56
MB_DATA_55
MB_DATA_54
MB_DATA_53
MB_DATA_52
MB_DATA_51
MB_DATA_50
MB_DATA_49
MB_DATA_48
MB_DATA_47
MB_DATA_46
MB_DATA_45
MB_DATA_44
MB_DATA_43
MB_DATA_42
MB_DATA_41
MB_DATA_40
MB_DATA_39
MB_DATA_38
MB_DATA_37
MB_DATA_36
MB_DATA_35
MB_DATA_34
MB_DATA_33
MB_DATA_32
MB_DATA_31
MB_DATA_30
MB_DATA_29
MB_DATA_28
MB_DATA_27
MB_DATA_26
MB_DATA_25
MB_DATA_24
MB_DATA_23
MB_DATA_22
MB_DATA_21
MB_DATA_20
MB_DATA_19
MB_DATA_18
MB_DATA_17
MB_DATA_16
MB_DATA_15
MB_DATA_14
MB_DATA_13
MB_DATA_12
MB_DATA_11
MB_DATA_10
MB_DATA_9
MB_DATA_8
MB_DATA_7
MB_DATA_6
MB_DATA_5
MB_DATA_4
MB_DATA_3
MB_DATA_2
MB_DATA_1
MB_DATA_0
MB_ADD_0
MB_ADD_1
MB_ADD_2
MB_ADD_3
MB_ADD_4
MB_ADD_5
MB_ADD_6
MB_ADD_7
MB_ADD_8
MB_ADD_9
MB_ADD_10
MB_ADD_11
MB_ADD_12
MB_ADD_13
MB_ADD_14
MB_ADD_15
MB_CHECK_7
MB_CHECK_6
MB_CHECK_5
MB_CHECK_4
MB_CHECK_3
MB_CHECK_2
MB_CHECK_1
MB_CHECK_0
AMC CPU F1207
HETERO 5 OF 11
AN25
AR26
AN29
AR29
AP25
AR25
AR28
AP28
AN30
AR31
AR34
AN34
AR30
AP30
AR33
AP33
AG25
AE25
AF26
AE26
AF24
AE24
AG26
AF27
Y26
AA27
W28
W25
Y25
AA26
Y28
Y29
K35
J35
E35
C35
L34
K34
F34
E34
L24
J27
K25
K24
L27
L26
G26
J25
B34
A34
C30
C29
C34
C33
B31
B30
C28
A28
B25
A24
A29
B29
B26
C25
AB35
V34
W35
V35
U34
U35
T33
R33
T34
R35
AC35
R34
P35
AH35
N35
N34
P27
P28
N25
M25
P25
P26
M26
M27
CPU2_MEM_MB_DATA63
CPU2_MEM_MB_DATA62
CPU2_MEM_MB_DATA61
CPU2_MEM_MB_DATA60
CPU2_MEM_MB_DATA59
CPU2_MEM_MB_DATA58
CPU2_MEM_MB_DATA57
CPU2_MEM_MB_DATA56
CPU2_MEM_MB_DATA55
CPU2_MEM_MB_DATA54
CPU2_MEM_MB_DATA53
CPU2_MEM_MB_DATA52
CPU2_MEM_MB_DATA51
CPU2_MEM_MB_DATA50
CPU2_MEM_MB_DATA49
CPU2_MEM_MB_DATA48
CPU2_MEM_MB_DATA47
CPU2_MEM_MB_DATA46
CPU2_MEM_MB_DATA45
CPU2_MEM_MB_DATA44
CPU2_MEM_MB_DATA43
CPU2_MEM_MB_DATA42
CPU2_MEM_MB_DATA41
CPU2_MEM_MB_DATA40
CPU2_MEM_MB_DATA39
CPU2_MEM_MB_DATA38
CPU2_MEM_MB_DATA37
CPU2_MEM_MB_DATA36
CPU2_MEM_MB_DATA35
CPU2_MEM_MB_DATA34
CPU2_MEM_MB_DATA33
CPU2_MEM_MB_DATA32
CPU2_MEM_MB_DATA31
CPU2_MEM_MB_DATA30
CPU2_MEM_MB_DATA29
CPU2_MEM_MB_DATA28
CPU2_MEM_MB_DATA27
CPU2_MEM_MB_DATA26
CPU2_MEM_MB_DATA25
CPU2_MEM_MB_DATA24
CPU2_MEM_MB_DATA23
CPU2_MEM_MB_DATA22
CPU2_MEM_MB_DATA21
CPU2_MEM_MB_DATA20
CPU2_MEM_MB_DATA19
CPU2_MEM_MB_DATA18
CPU2_MEM_MB_DATA17
CPU2_MEM_MB_DATA16
CPU2_MEM_MB_DATA15
CPU2_MEM_MB_DATA14
CPU2_MEM_MB_DATA13
CPU2_MEM_MB_DATA12
CPU2_MEM_MB_DATA11
CPU2_MEM_MB_DATA10
CPU2_MEM_MB_DATA9
CPU2_MEM_MB_DATA8
CPU2_MEM_MB_DATA7
CPU2_MEM_MB_DATA6
CPU2_MEM_MB_DATA5
CPU2_MEM_MB_DATA4
CPU2_MEM_MB_DATA3
CPU2_MEM_MB_DATA2
CPU2_MEM_MB_DATA1
CPU2_MEM_MB_DATA0
CPU2_MEM_MB_ADD0
CPU2_MEM_MB_ADD1
CPU2_MEM_MB_ADD2
CPU2_MEM_MB_ADD3
CPU2_MEM_MB_ADD4
CPU2_MEM_MB_ADD5
CPU2_MEM_MB_ADD6
CPU2_MEM_MB_ADD7
CPU2_MEM_MB_ADD8
CPU2_MEM_MB_ADD9
CPU2_MEM_MB_ADD10
CPU2_MEM_MB_ADD11
CPU2_MEM_MB_ADD12
CPU2_MEM_MB_ADD13
CPU2_MEM_MB_ADD14
CPU2_MEM_MB_ADD15
CPU2_MEM_MB_CHECK7
CPU2_MEM_MB_CHECK6
CPU2_MEM_MB_CHECK5
CPU2_MEM_MB_CHECK4
CPU2_MEM_MB_CHECK3
CPU2_MEM_MB_CHECK2
CPU2_MEM_MB_CHECK1
CPU2_MEM_MB_CHECK0
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36-38
36,37
36,37
36,37
36,37
36,37
36,37
36,37
36,37
CK_200M_CPU2_C_DP
45
45
+MEM_CPU2
CK_200M_CPU2_C_DN
117
117
R9189
1 2
+MEM_CPU2
NP
R9190
X
300-5%
1 2
NP
R9191
X
R9436
R9440
R9441
R9442
CPU1_TDO
137
1 2
X
X
X
14,20
CPU2_COREFB_POS
CPU2_COREFB_NEG
300-5%
R9439
1 2
300-5%
R9438
1 2
300-5%
R9437
1 2
300-5%
1 2
300-5%
NP
1 2
300-5%
NP
1 2
300-5%
NP
1 2
300-5%
C9385
21
3900pF
50V-10%
C9386
21
3900pF
50V-10%
1 2
CPU2_DDRVTT_SENSE
18,55
18
18
18
18
+MEM_CPU2
NP
R9192
X
300-5%
1 2
CPU2_THERMTRIP_N
CPU2_PROCHOT_N
MOD_CPU2_SIC
MOD_CPU2_SID
SYSTEM_PWRGOOD_CPU2
RST_CPU2_N
CPU2_LDTSTOP_N
NP
R9193
X
300-5%
1 2
X00_DT9809 SCH depop'd R
CK_200M_CPU2_DP
R9110
18,96
R9930
0-5%
R9223
1 2
510-5%
MOD_CPU2_SCANEN
MOD_CPU2_SCANCK2
MOD_CPU2_SCANCK1
MOD_CPU2_SCANSHIFTENA
MOD_CPU2_SCANSHIFTENB
300-5%
169-1%
1 2
SYSTEM_PWRGOOD_CPU2
18,96
18,96
20,66,138
18
18
20
20
20
20
R9114
1 2
0-5%
CPU2_M_ZN
CPU2_M_ZP
CPU2_PLLTEST_1
CPU2_PLLTEST_0
NC_MOD_CPU2_TEST_2
NC_MOD_CPU2_TEST_3
R9187
1 2
300-5%
NC_MOD_CPU2_TEST_6
CK_200M_CPU2_DN
RST_CPU2_N
CPU2_LDTSTOP_N
CPU2_PRES_N
MOD_CPU2_SIC
MOD_CPU2_SID
CPU2_TDI
CPU2_TRST_N
CPU2_TCK
CPU2_TMS
CPU2_DBREQ_N
R9115
1 2
0-5%
V_MEM_CPU2_VREF
R9222
1 2
510-5%
NP
1 2
300-5%
18,138
18,138
18
18
18,96
18,96
NP
R9188
1 2
+VDDA_CPU2
R9186
300-5%
X
18,96
X
1 2
R9435
300-5%
R9434
1 2
300-5%
G2
VDDA1
G3
VDDA2
G4
VDDA3
K22
CLKIN_H
J22
CLKIN_L
F21
PWROK
F19
RESET_L
H25
LDTSTOP_L
AP1
CPU_PRESENT_L
AG19
AF19
AJ22
AG22
AF22
AJ21
AF17
AJ25
AH25
AF20
AJ20
AH20
AG20
AG21
AF21
AH21
AF18
SIC
SID
TDI
TRST_L
TCK
TMS
F24
DBREQ_L
J9
VDD_FB_H
J10
VDD_FB_L
VTT_SENSE
F18
M_VREF
M_ZN
M_ZP
TEST23
F23
TEST18
F20
TEST19
AG8
TEST2
AG9
TEST3
G21
TEST25_H
H21
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST26
U8
TEST9
AH9
TEST6
CPU2_PLLTEST_1
CPU2_PLLTEST_0
+MEM_CPU2
J_CPU2
THERMTRIP_L
VDDIO_FB_H
VDDIO_FB_L
AMC CPU F1207
HETERO 6 OF 11
CPU2 MISC
R9217
1 2
39.2-1%
R9218
1 2
39.2-1%
C9768
1 2
1000pF
50V-10%
CPU2_M_ZN
CPU2_M_ZP
C9769
1 2
1000pF
VID_5
VID_4
VID_3
VID_2
VID_1
VID_0
PROCHOT_L
TDO
DBRDY
HTREF1
HTREF0
THERMDA
THERMDC
TEST13
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
18
18
50V-10%
E24
G18
J19
H19
K19
H18
AH19
AJ19
AH22
J24
AG17
AH17
V7
U7
AF8
AF9
AH8
L8
M9
J20
G20
K20
H20
J8
V8
H8
G23
G24
CPU2_VID5
CPU2_VID4
CPU2_VID3
CPU2_VID2
CPU2_VID1
CPU2_VID0
CPU2_THERMTRIP_N
CPU2_PROCHOT_N
CPU2_TDO
CPU2_DBRDY
V_MEM_CPU2_SENSE_POS
V_MEM_CPU2_SENSE_NEG
MOD_CPU2_L0_REF_1
MOD_CPU2_L0_REF_0
MOD_CPU2_THERMDA
MOD_CPU2_THERMDC
NC_CPU2_TEST_28_DP
NC_CPU2_TEST_28_DN
TP_MOD_CPU2_TEST_17
TP_MOD_CPU2_TEST_16
TP_MOD_CPU2_TEST_15
TP_MOD_CPU2_TEST_14
NC_MOD_CPU2_TEST_7
NC_MOD_CPU2_TEST_10
NC_MOD_CPU2_TEST_8
R9155
1 2
80.6-1%
+MEM_CPU2
R9432
R9806
R9433
18
18
TITLE
15-1%15-1%
1 2
0-5%
1 2
1 2
10K-5%
1 2
R9813
D
117,143
117,143
117,143
117,143
117,143
117,143
18,138
18,138
20
20
112
112
89
89
R9235
1 2
44.2-1%
C9354
1 2
C9355
1000pF
50V-10%
+1.2V_VLDT
R9236
1 2
44.2-1%
1 2
1000pF
50V-10%
1
2
3
V_MEM_CPU2_VREF
21
C9540
1 2
V_MEM_CPU2_VREF_FEEDBACK
1000pF
50V-10%
C9538
55
This value calculated to be negative 14ohm.
Hence just keeping a place holder with 10kohm
This value calculated to be negative 16ohm. left as is
18,55
.1uF
16V-10%
4
INC.
ROUND ROCK,TEXAS
CPU 2 - CHANNEL B MEMORY
ROOM=CPU2
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
X00_DT9808 SCH added caps
DWG NO.
DATE
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
10/20/2006
DCBA
REV.
X01
18 OF 144
Page 19
1
A5
VSS_A5
J_CPU2
A B C
AJ24
AJ23
AJ17
AJ15
AJ11
AJ9
AJ7
AJ5
AJ3
AJ1
AH26
AH24
AH16
AH14
AH12
AH10
AH6
AG28
AG23
AG15
AG13
AG11
AG7
AF30
AF25
AF16
AF14
AF12
AF10
AE27
AE23
AE21
AE19
AE17
AE15
AE13
AE11
AE9
AE7
AE3
AE2
AD29
AD24
AD22
AD20
AD18
AD16
AD14
AD12
AD10
AD8
AD5
AD4
AC26
AC23
AC21
AC19
AC17
AC15
AC13
AC11
AC9
AC7
AB28
AB24
AB22
AB20
AB18
AB16
AB14
AB12
AB10
AB8
AA25
AA23
AA21
AA19
AA17
AA15
AA13
AA11
AA9
AA7
AA3
AA2
A30
A25
A9
VSS_A9
VSS_A25
VSS_AA3
VSS_AA2
VSS_A30
VSS_AA9
VSS_AA7
VSS_AA11
VSS_AA17
VSS_AA15
VSS_AA13
VSS_AA23
VSS_AA21
VSS_AA19
VSS_AB8
VSS_AB10
VSS_AA25
VSS_AB16
VSS_AB14
VSS_AB12
VSS_AB22
VSS_AB20
VSS_AB18
VSS_AC7
VSS_AB28
VSS_AB24
VSS_AC9
VSS_AC13
VSS_AC11
VSS_AC19
VSS_AC17
VSS_AC15
VSS_AC26
VSS_AC23
VSS_AC21
VSS_AD8
VSS_AD5
VSS_AD4
VSS_AD14
VSS_AD12
VSS_AD10
VSS_AD20
VSS_AD18
VSS_AD16
VSS_AD29
VSS_AD24
VSS_AD22
VSS_AE7
VSS_AE3
VSS_AE2
VSS_AE9
VSS_AE13
VSS_AE11
VSS_AE19
VSS_AE17
VSS_AE15
VSS_AE27
VSS_AE23
VSS_AE21
VSS_AF14
VSS_AF12
VSS_AF10
VSS_AF30
VSS_AF25
VSS_AF16
VSS_AG7
VSS_AG13
VSS_AG11
VSS_AG28
VSS_AG23
VSS_AG15
VSS_AH6
VSS_AH12
VSS_AH10
VSS_AH24
VSS_AH16
VSS_AH14
VSS_AJ3
VSS_AJ1
VSS_AH26
VSS_AJ9
VSS_AJ7
VSS_AJ5
VSS_AJ17
VSS_AJ15
VSS_AJ11
VSS_AJ23
AK14
AK2
AJ29
VSS_AK2
VSS_AJ29
VSS_AJ24
AK20
AK18
AK16
VSS_AK18
VSS_AK16
VSS_AK14
AK27
AK23
AK22
VSS_AK23
VSS_AK22
VSS_AK20
AL3
AL1
AK32
VSS_AL1
VSS_AK32
VSS_AK27
AL11
AL7
VSS_AL7
VSS_AL3
VSS_AL11
AM15
AL30
AL25
VSS_AM15
VSS_AL30
VSS_AL25
AM33
AM28
AM19
VSS_AM33
VSS_AM28
VSS_AM19
AN10
AN6
VSS_AN6
VSS_AN10
AN31
AN26
AN24
VSS_AN31
VSS_AN26
VSS_AN24
AP18
AP14
AN35
VSS_AP18
VSS_AP14
VSS_AN35
AP29
AP24
AP22
VSS_AP29
VSS_AP24
VSS_AP22
AMC CPU F1207
HETERO 8 OF 11
CPU socket screws
D
ADD=ADD*_RP956
ADD1=ADD*_RP956
ADD2=ADD*_RP956
ADD3=ADD*_RP956
1
CPU socket washers
ADD4=ADD*_GR683
ADD5=ADD*_GR683
ADD6=ADD*_GR683
ADD7=ADD*_GR683
2
VDD_AA8
VDD_A10
VDD_A6
A6
AA8
A10
AR5
AP35
AP34
VSS_AR5
VSS_AP35
VSS_AP34
VDD_AA14
VDD_AA12
VDD_AA10
AA14
AA12
AA10
AR27
AR24
AR9
VSS_AR9
VSS_AR27
VSS_AR24
VDD_AA20
VDD_AA18
VDD_AA16
AA20
AA18
AA16
B13
B12
AR32
VSS_B13
VSS_B12
VSS_AR32
VDD_AB5
VDD_AB4
AB7
AB5
AB4
B28
B21
B17
VSS_B21
VSS_B17
VDD_AB11
VDD_AB9
VDD_AB7
AB9
AB11
B35
B33
VSS_B35
VSS_B33
VSS_B28
VDD_AB17
VDD_AB15
VDD_AB13
AB17
AB15
AB13
C26
C8
C4
VSS_C8
VSS_C4
VSS_C26
VDD_AC2
VDD_AB21
VDD_AB19
AC2
AB21
AB19
D14
D12
C31
VSS_D14
VSS_D12
VSS_C31
VDD_AC8
VDD_AC3
AC8
AC3
AC10
D24
D22
D18
VSS_D22
VSS_D18
VDD_AC14
VDD_AC12
VDD_AC10
AC16
AC14
AC12
E5
D34
D29
VSS_D34
VSS_D29
VSS_D24
VDD_AC20
VDD_AC18
VDD_AC16
AD7
AC20
AC18
E32
E27
E9
VSS_E9
VSS_E5
VSS_E27
VDD_AD11
VDD_AD9
VDD_AD7
AD9
AD11
F16
F14
VSS_F16
VSS_F14
VSS_E32
VDD_AD17
VDD_AD15
VDD_AD13
AD17
AD15
AD13
F30
F25
F22
VSS_F30
VSS_F25
VSS_F22
VDD_AE8
VDD_AD21
VDD_AD19
AE8
AD21
AD19
G7
G5
F35
VSS_G7
VSS_G5
VSS_F35
VDD_AE14
VDD_AE12
VDD_AE10
AE14
AE12
AE10
G13
G11
G9
VSS_G9
VSS_G13
VSS_G11
VDD_AE20
VDD_AE18
VDD_AE16
AE20
AE18
AE16
G22
G17
G15
VSS_G22
VSS_G17
VSS_G15
VDD_AF5
VDD_AF4
AF7
AF5
AF4
G33
G28
G25
VSS_G28
VSS_G25
VDD_AF13
VDD_AF11
VDD_AF7
AF13
AF11
H5
H4
VSS_H5
VSS_H4
VSS_G33
VDD_AG3
VDD_AG2
VDD_AF15
AG3
AG2
AF15
H16
H14
H12
VSS_H16
VSS_H14
VSS_H12
VDD_AG14
VDD_AG12
VDD_AG10
AG14
AG12
AG10
H24
H23
H22
VSS_H24
VSS_H23
VSS_H22
VDD_AH7
VDD_AH5
VDD_AG16
AH7
AH5
AG16
J2
H31
H26
VSS_J2
VSS_H31
VSS_H26
VDD_AH15
VDD_AH13
VDD_AH11
AH15
AH13
AH11
J13
J7
J3
VSS_J7
VSS_J3
VSS_J13
VDD_AJ4
VDD_AJ2
AJ6
AJ4
AJ2
J21
J17
J15
VSS_J17
VSS_J15
VDD_AJ10
VDD_AJ8
VDD_AJ6
AJ8
AJ10
J29
J23
VSS_J29
VSS_J23
VSS_J21
VDD_AJ16
VDD_AJ14
VDD_AJ12
AJ16
AJ14
AJ12
K10
K8
J34
VSS_K8
VSS_K10
VSS_J34
VDD_AK13
VDD_AK1
AK1
AK15
AK13
K16
K14
K12
VSS_K14
VSS_K12
VDD_AK19
VDD_AK17
VDD_AK15
AK21
AK19
AK17
K23
K21
K18
VSS_K21
VSS_K18
VSS_K16
VDD_AL5
VDD_AL2
VDD_AK21
AL9
AL5
AL2
L7
K32
K27
VSS_K32
VSS_K27
VSS_K23
VDD_AM13
VDD_AM1
VDD_AL9
AM1
AM13
L11
L9
VSS_L9
VSS_L7
VSS_L11
VDD_AN4
VDD_AM21
VDD_AM17
AN4
AM21
AM17
L17
L15
L13
VSS_L17
VSS_L15
VSS_L13
VDD_AN12
VDD_AN8
AN8
AN12
V10
U9
VSS_U9
VSS_V10
VDD_AR6
VDD_AP20
VDD_AP16
AR6
AP20
AP16
VDD_B19
VDD_B15
VDD_AR10
B19
B15
AR10
VDD_C6
VDD_C2
C6
C2
VDD_C12
VDD_C10
C12
C10
141,143
VDD_D20
VDD_D16
E3
D20
D16
VDD_E12
VDD_E11
VDD_E7
VDD_E3
E7
CPU2_CORE_TYPE
VCORE_CPU2_NB
E11
F13
E12
31,55,141
VDD_F17
VDD_F15
VDD_F13
F17
F15
VDD_G6
VDD_G1
G6
G1
VDD_G12
VDD_G10
VDD_G8
G8
NC_CPU2_J18
NC_CPU2_G19
NC_CPU2_H11
NC_CPU2_J11
NC_CPU2_K11
G10
G12
G14
VDD_H7
VDD_G16
VDD_G14
H7
G16
VDD_H15
VDD_H13
H17
H15
H13
VDD_J16
VDD_J14
VDD_H17
J16
J14
J18
G19
AN1
H11
J11
K11
VDD_K4
VDD_J12
K4
J12
RSVD_J18
RSVD_G19
RSVD_AN1
RSVD_H11
RSVD_J11
RSVD_K11
VDD_K7
VDD_K5
K7
K5
J_CPU2
AMC CPU F1207
HETERO 7 OF 11
X01_DTXXXXX
RSVD_H10
RSVD_H9
RSVD_AJ18
RSVD_AH18
RSVD_AG18
H10
H9
AJ18
AH18
AG18
+VCORE_CPU2
CPU2_NB_COREFB_POS
CPU2_NB_COREFB_NEG
NC_CPU2_AJ18
NC_CPU2_AH18
NC_CPU2_AG18
141
141
2
3
J_CPU2
VDD_K9
K9
VDD_K15
VDD_K13
K17
K15
K13
VDD_L3
VDD_L2
VDD_K17
L3
L2
VDD_L12
VDD_L10
L14
L12
L10
VDD_L18
VDD_L16
VDD_L14
L18
L16
VDD_M7
VDD_L20
M7
M11
L20
VDD_M15
VDD_M13
VDD_M11
M15
M13
N17
N15
VSS_N17
VSS_N15
VDD_M19
VDD_M17
M21
M19
M17
N23
N21
N19
VSS_N21
VSS_N19
VDD_N10
VDD_N8
VDD_M21
N8
N10
P8
N26
VSS_P8
VSS_N26
VSS_N23
VDD_N14
VDD_N12
N16
N14
N12
P14
P12
P10
VSS_P12
VSS_P10
VDD_N20
VDD_N18
VDD_N16
N20
N18
P18
P16
VSS_P18
VSS_P16
VSS_P14
VDD_P5
VDD_P4
P7
P5
P4
P24
P22
P20
VSS_P22
VSS_P20
VDD_P11
VDD_P9
VDD_P7
P9
P11
R7
P29
VSS_R7
VSS_P29
VSS_P24
VDD_P15
VDD_P13
P17
P15
P13
R13
R11
R9
VSS_R9
VSS_R11
VDD_P21
VDD_P19
VDD_P17
P21
P19
R17
R15
VSS_R17
VSS_R15
VSS_R13
VDD_R3
VDD_R2
R8
R3
R2
R23
R21
R19
VSS_R21
VSS_R19
VDD_R12
VDD_R10
VDD_R8
R12
R10
T4
R27
VSS_T4
VSS_R27
VSS_R23
VDD_R16
VDD_R14
R18
R16
R14
T10
T8
T5
VSS_T8
VSS_T5
VDD_T9
VDD_R20
VDD_R18
T9
R20
T14
T12
VSS_T14
VSS_T12
VSS_T10
VDD_T13
VDD_T11
T15
T13
T11
T20
T18
T16
VSS_T18
VSS_T16
VDD_T19
VDD_T17
VDD_T15
T19
T17
T24
T22
VSS_T24
VSS_T22
VSS_T20
VDD_U12
VDD_T21
U14
U12
T21
U3
U2
T25
VSS_U2
VSS_T25
VDD_U18
VDD_U16
VDD_U14
U18
U16
U13
U11
VSS_U3
VSS_U13
VSS_U11
VDD_V4
VDD_U20
V5
V4
U20
U19
U17
U15
VSS_U17
VSS_U15
VDD_V13
VDD_V11
VDD_V5
V13
V11
U23
U21
VSS_U23
VSS_U21
VSS_U19
VDD_V17
VDD_V15
V19
V17
V15
V14
V12
U27
VSS_V12
VSS_U27
VDD_W2
VDD_V21
VDD_V19
W2
V21
V18
V16
VSS_V18
VSS_V16
VSS_V14
VDD_W8
VDD_W3
W8
W3
W10
V24
V22
V20
VSS_V22
VSS_V20
VDD_W14
VDD_W12
VDD_W10
W14
W12
W7
V26
VSS_W7
VSS_V26
VSS_V24
VDD_W18
VDD_W16
W20
W18
W16
W13
W11
W9
VSS_W9
VSS_W11
VDD_Y9
VDD_Y7
VDD_W20
Y9
Y7
W17
W15
VSS_W17
VSS_W15
VSS_W13
VDD_Y13
VDD_Y11
Y15
Y13
Y11
W23
W21
W19
VSS_W21
VSS_W19
VDD_Y19
VDD_Y17
VDD_Y15
Y19
Y17
Y4
W29
VSS_Y4
VSS_W29
VSS_W23
VDD_V9
VDD_Y21
V9
U10
Y21
Y10
Y8
Y5
VSS_Y8
VSS_Y5
AMC CPU F1207
HETERO 9 OF 11
VDD_U10
Y16
Y14
Y12
VSS_Y16
VSS_Y14
VSS_Y12
VSS_Y10
Y22
Y20
Y18
VSS_Y20
VSS_Y18
Y27
Y24
VSS_Y27
VSS_Y24
VSS_Y22
F12
T7
VSS_T7
VSS_F12
AJ13
VSS_AJ13
+VCORE_CPU2
AA22
AA24
AB23
AC22
AC24
AD23
AE22
AF23
AG24
AH23
L22
M23
N22
N24
P23
R22
R24
T23
U22
U24
V23
W22
W24
Y23
VDD_AA22
VDD_AA24
VDD_AB23
VDD_AC22
VDD_AC24
VDD_AD23
VDD_AE22
VDD_AF23
VDD_AG24
VDD_AH23
VDD_L22
VDD_M23
VDD_N22
VDD_N24
VDD_P23
VDD_R22
VDD_R24
VDD_T23
VDD_U22
VDD_U24
VDD_V23
VDD_W22
VDD_W24
VDD_Y23
J_CPU2
AMC CPU F1207
HETERO 10 OF 11
VSS_L19
VSS_L21
VSS_L23
VSS_L25
VSS_L30
VSS_L35
VSS_M4
VSS_M5
VSS_M8
VSS_M10
VSS_M12
VSS_M14
VSS_M16
VSS_M18
VSS_M20
VSS_M22
VSS_M24
VSS_M28
VSS_N2
VSS_N3
VSS_N7
VSS_N9
VSS_N11
VSS_N13
L19
L21
L23
L25
L30
L35
M4
M5
M8
M10
M12
M14
M16
M18
M20
M22
M24
M28
N2
N3
N7
N9
N11
N13
3
4
ROOM=CPU2
+MEM_CPU2
J_CPU2
VDDIO1
AA30
VDDIO3
VDDIO2
AB33
AA35
VDDIO5
VDDIO4
AD34
AC31
VDDIO8
VDDIO7
VDDIO6
AG33
AF35
AE32
+VTT_CPU2
VDDIO10
VDDIO9
AJ34
AH31
VDDIO12
VDDIO11
N31
M33
AL35
VDDIO15
VDDIO14
VDDIO13
R32
P34
VDDIO17
VDDIO16
U33
T35
T30
VDDIO20
VDDIO19
VDDIO18
W34
V31
VDDIO21
A23
Y32
VTT2
VTT1
AM23
VTT3
AP23
AN23
VTT5
VTT4
AR23
VTT6
B23
VTT7
C23
VTT8
D23
VTT9
E23
AL23
VTT10
VLDT_02
VLDT_01
AH3
AH2
AH1
VLDT_04
VLDT_03
AH4
VLDT_12
VLDT_11
E1
D1
C1
VLDT_14
VLDT_13
F1
VLDT_22
VLDT_21
AP2
AN2
AM2
VLDT_24
VLDT_23
AR2
+1.2V_VLDT
AMC CPU F1207
HETERO 11 OF 11
CPU2 POWER
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
10/20/2006
4
REV.
X01
19 OF 144
C
DBA
Page 20
A B C
The connectors on this page are placeholders for the AMD debug headers
+MEM_CPU1
D
+MEM_CPU1
1
2
X00_DT10315 SCH
+MEM_CPU1
14
14
20
20
14
20
20
R9295
1K-1%
R9294
1K-1%
R9293
1K-1%
R9292
1K-1%
NP
NC_J_HDT1_3
NC_J_HDT1_5
CPU1_DBREQ_N
CPU1_DBRDY
HDT1_TCK
HDT1_TMS
CPU1_TDI
HDT1_TRST_N
SWITCHED_CPU_TDO
NC_J_HDT1_25
R9291
1K-1%
R9290
1K-1%
12
12
12
12
12
X
12
R9895
1 2
100-1%
X00_DT9901 SCH
X00_DT9903 SCH
J_HDT1
1
3 4
5 6
7 8
9
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
K
2
10
20
RESET_HDT_N
96,138
NC_J_HDT2_1
CPU2_DBREQ_N
18
CPU2_DBRDY
18
X00_DT9901
NP
+MEM_CPU1
R9300
X
1 2
R9299
1 2
NC_P3_7
NC_P3_9
NC_P3_11
NC_P3_13
NC_P3_15
NC_P3_16
1K-1% 1K-1%
NC_P3_19
NC_P3_21
NC_P3_23
NC_P3_25
R9298
1 2
1 2
1K-1%
R9896
100-1%
X00_DT10315 SCH
1
R9897
1 2
100-1%
3 4
5 6
7 8
9
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
2x13 SM HEADER
J_HDT2
2
10
20
1
NC_HDT2_18
NC_HDT2_20
NC_HDT2_22
2
R9289
1 2
1K-1%
2x13 SM HEADER
PIN 25 KEYED
+MEM_CPU1
+MEM_CPU1
R9887
1 2
1K-1%
R9888
U8034
14,18,20
18,20
1K-1%
1 2
CPU1_TDO
CPU2_TDO
+MEM_CPU1
1
B1
2
GND
NC7SB3157
X00_DT9694 SCH
VCC
6
S
5
43
AB0
SWITCHED_CPU_TDO
CPU2_PRES_N
18,66,138
20
3
20
20
20
HDT1_TRST_N
HDT1_TMS
HDT1_TCK
U8038
2
GND
3
2A
SN74LVC2G34
U8037
2
GND
3
2A
SN74LVC2G34
U8036
2
GND
3
2A
SN74LVC2G34
X00_DT9900 SCH
VCC
VCC
VCC
1Y1A
2Y
1Y1A
2Y
1Y1A
2Y
R9296
R9889
61
5
4
61
5
4
61
5
4
1 2
100-1%
R9892
1 2
100-1%
R9894
1 2
100-1%
R9890
1 2
100-1%
R9891
1 2
100-1%
R9893
1 2
100-1%
X00_DT10315 SCH
CPU1_TRST_N
CPU2_TRST_N
CPU1_TMS
CPU2_TMS
CPU1_TCK
CPU2_TCK
14
18
14
18
14
18
1K-1%
+MEM_CPU1
R9297
1K-1%
12
12
CPU1_TDO
CPU2_TDO
14,18,20
18,20
MODULE:
DESC:
REV: OF
SEC
3
MEM
4
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DBA
4
REV.
X01
20 OF 14410/20/2006
Page 21
X01
10/20/2006
21 OF 144
Page 22
HT 2
A B C
North Hub HyperTransport Link A to CPU1 Link 1
D
1
HT 0
CPU 1
DDR2
HT 1
x16
HT A
HT 2100
HT B
13
13
HT_AD_C1L1_NBLA_0_DP
HT_AD_C1L1_NBLA_0_DN
C2
HA_CADIN_H00
C1
HA_CADIN_L00
U_NH
HA_CADOUT_H00
HA_CADOUT_L00
AF2
AF1
HT_AD_NBLA_C1L1_0_DP
HT_AD_NBLA_C1L1_0_DN
13
13
1
13
13
13
PCIE BPCIE A
13
13
13
13
13
13
13
13
13
HT_AD_C1L1_NBLA_1_DP
HT_AD_C1L1_NBLA_1_DN
HT_AD_C1L1_NBLA_2_DP
HT_AD_C1L1_NBLA_2_DN
HT_AD_C1L1_NBLA_3_DP
HT_AD_C1L1_NBLA_3_DN
HT_AD_C1L1_NBLA_4_DP
HT_AD_C1L1_NBLA_4_DN
HT_AD_C1L1_NBLA_5_DP
HT_AD_C1L1_NBLA_5_DN
HT_AD_C1L1_NBLA_6_DP
HT_AD_C1L1_NBLA_6_DN
D2
HA_CADIN_H01
D1
HA_CADIN_L01
E2
HA_CADIN_H02
E1
HA_CADIN_L02
F2
HA_CADIN_H03
F1
HA_CADIN_L03
H1
HA_CADIN_H04
H2
HA_CADIN_L04
J1
HA_CADIN_H05
J2
HA_CADIN_L05
K1
HA_CADIN_H06
K2
HA_CADIN_L06
HA_CADOUT_H01
HA_CADOUT_L01
HA_CADOUT_H02
HA_CADOUT_L02
HA_CADOUT_H03
HA_CADOUT_L03
HA_CADOUT_H04
HA_CADOUT_L04
HA_CADOUT_H05
HA_CADOUT_L05
HA_CADOUT_H06
HA_CADOUT_L06
AE2
AE1
AD2
AD1
AC2
AC1
AA1
AA2
Y1
Y2
W1
W2
HT_AD_NBLA_C1L1_1_DP
HT_AD_NBLA_C1L1_1_DN
HT_AD_NBLA_C1L1_2_DP
HT_AD_NBLA_C1L1_2_DN
HT_AD_NBLA_C1L1_3_DP
HT_AD_NBLA_C1L1_3_DN
HT_AD_NBLA_C1L1_4_DP
HT_AD_NBLA_C1L1_4_DN
HT_AD_NBLA_C1L1_5_DP
HT_AD_NBLA_C1L1_5_DN
HT_AD_NBLA_C1L1_6_DP
HT_AD_NBLA_C1L1_6_DN
13
13
13
13
13
13
13
13
13
13
13
13
2
13
13
13
13
13
13
13
13
13
13
13
13
13
13
HT_AD_C1L1_NBLA_7_DP
HT_AD_C1L1_NBLA_7_DN
HT_AD_C1L1_NBLA_8_DP
HT_AD_C1L1_NBLA_8_DN
HT_AD_C1L1_NBLA_9_DP
HT_AD_C1L1_NBLA_9_DN
HT_AD_C1L1_NBLA_10_DP
HT_AD_C1L1_NBLA_10_DN
HT_AD_C1L1_NBLA_11_DP
HT_AD_C1L1_NBLA_11_DN
HT_AD_C1L1_NBLA_12_DP
HT_AD_C1L1_NBLA_12_DN
HT_AD_C1L1_NBLA_13_DP
HT_AD_C1L1_NBLA_13_DN
L1
HA_CADIN_H07
L2
HA_CADIN_L07
J5
HA_CADIN_H08
J4
HA_CADIN_L08
K5
HA_CADIN_H09
K4
HA_CADIN_L09
L6
HA_CADIN_H10
L5
HA_CADIN_L10
M6
HA_CADIN_H11
M5
HA_CADIN_L11
P5
HA_CADIN_H12
P6
HA_CADIN_L12
R5
HA_CADIN_H13
R6
HA_CADIN_L13
HA_CADOUT_H07
HA_CADOUT_L07
HA_CADOUT_H08
HA_CADOUT_L08
HA_CADOUT_H09
HA_CADOUT_L09
HA_CADOUT_H10
HA_CADOUT_L10
HA_CADOUT_H11
HA_CADOUT_L11
HA_CADOUT_H12
HA_CADOUT_L12
HA_CADOUT_H13
HA_CADOUT_L13
V1
V2
AG5
AG4
AF5
AF4
AE6
AE5
AD6
AD5
AB5
AB6
AA5
AA6
HT_AD_NBLA_C1L1_7_DP
HT_AD_NBLA_C1L1_7_DN
HT_AD_NBLA_C1L1_8_DP
HT_AD_NBLA_C1L1_8_DN
HT_AD_NBLA_C1L1_9_DP
HT_AD_NBLA_C1L1_9_DN
HT_AD_NBLA_C1L1_10_DP
HT_AD_NBLA_C1L1_10_DN
HT_AD_NBLA_C1L1_11_DP
HT_AD_NBLA_C1L1_11_DN
HT_AD_NBLA_C1L1_12_DP
HT_AD_NBLA_C1L1_12_DN
HT_AD_NBLA_C1L1_13_DP
HT_AD_NBLA_C1L1_13_DN
13
13
13
13
13
13
2
13
13
13
13
13
13
13
13
3
+2.5V
REPLACE
21
L1843
1 2
68nH 600mA
13
13
13
13
13
13
13
13
13
13
HT_AD_C1L1_NBLA_14_DP
HT_AD_C1L1_NBLA_14_DN
HT_AD_C1L1_NBLA_15_DP
HT_AD_C1L1_NBLA_15_DN
HT_CK_C1L1_NBLA_0_DP
HT_CK_C1L1_NBLA_0_DN
HT_CK_C1L1_NBLA_1_DP
HT_CK_C1L1_NBLA_1_DN
HT_CT_C1L1_NBLA_0_DP
HT_CT_C1L1_NBLA_0_DN
MOD_NH_HA_CALVDD25
R8454 MOD_NH_HA_CALR_DP
1 2
475-1%
MOD_NH_HA_CALR_DN
T4
HA_CADIN_H14
T5
HA_CADIN_L14
U4
HA_CADIN_H15
U5
HA_CADIN_L15
G3
HA_CLKIN_H0
G2
HA_CLKIN_L0
N5
HA_CLKIN_H1
N4
HA_CLKIN_L1
M1
HA_CLTIN_H
M2
HA_CLTIN_L
M11
HA_RXVDD25
T1
HA_CALR_H
T2
HA_CALR_L
HA_CADOUT_H14
HA_CADOUT_L14
HA_CADOUT_H15
HA_CADOUT_L15
HA_CLKOUT_H0
HA_CLKOUT_L0
HA_CLKOUT_H1
HA_CLKOUT_L1
HA_CLTOUT_H
HA_CLTOUT_L
LDTSTOP_L
LDTREQ_L
Y4
Y5
W4
W5
AB3
AB2
AC4
AC5
U1
U2
D4
E4
HT_AD_NBLA_C1L1_14_DP
HT_AD_NBLA_C1L1_14_DN
HT_AD_NBLA_C1L1_15_DP
HT_AD_NBLA_C1L1_15_DN
HT_CK_NBLA_C1L1_0_DP
HT_CK_NBLA_C1L1_0_DN
HT_CK_NBLA_C1L1_1_DP
HT_CK_NBLA_C1L1_1_DN
HT_CT_NBLA_C1L1_0_DP
HT_CT_NBLA_C1L1_0_DN
13
13
13
13
13
13
13
13
13
13
NP
X
1 2
R9549
+3.3V
REPLACE
R8428
4.7K-5%
1 2
4.7K-5%
NH_HT_LDTSTOP_N
NH_HT_LDTREQ_N
3
138
138
45
45
CK_200M_NH_C_DP
CK_200M_NH_C_DN
C8604
.01uF 16V
.01uF 16V
.01uF
16V-10%
C8605
1 2
C8606
1 2
R8453
1 2
C8603
1 2
150-1%
4.7uF
6.3V-10%
R8426
1 2
100-1%
R8427
1 2
100-1%
MOD_CK_200M_NH_DP
MOD_CK_200M_NH_DN
P2
HT_REFCLK_H
P1
HT_REFCLK_L
HT2100 REV0D6
HETERO 1 OF 7
HA_PLL_TEST_L
HA_PLL_TEST_H
R2
R1
NC_NH_HA_PLL_TEST_DN
NC_NH_HA_PLL_TEST_DP
4
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
X01
SHEET
10/20/2006 22 OF 144
DBA
4
Page 23
A B C
USB GPIO
D
1
HT A
+1.2V_VLDT
x8
HT 2100
PCIE BPCIE A
HT B
Unused HT RX Signal Termination
When part of the width not used,
terminate + signals to GND
terminate - signals to 1.2V VDD
HT
HT1000
PCI PCIX
SATA
IDE
53
53
53
53
53
53
53
53
HT_AD_SBL0_NBLB_0_DP
HT_AD_SBL0_NBLB_0_DN
HT_AD_SBL0_NBLB_1_DP
HT_AD_SBL0_NBLB_1_DN
HT_AD_SBL0_NBLB_2_DP
HT_AD_SBL0_NBLB_2_DN
HT_AD_SBL0_NBLB_3_DP
HT_AD_SBL0_NBLB_3_DN
B29
HB_CADIN_H00
A29
HB_CADIN_L00
B28
HB_CADIN_H01
A28
HB_CADIN_L01
B27
HB_CADIN_H02
A27
HB_CADIN_L02
B26
HB_CADIN_H03
A26
HB_CADIN_L03
U_NH
HB_CADOUT_H00
HB_CADOUT_L00
HB_CADOUT_H01
HB_CADOUT_L01
HB_CADOUT_H02
HB_CADOUT_L02
HB_CADOUT_H03
HB_CADOUT_L03
B5
A5
B6
A6
B7
A7
B8
A8
HT_AD_NBLB_SBL0_0_DP
HT_AD_NBLB_SBL0_0_DN
HT_AD_NBLB_SBL0_1_DP
HT_AD_NBLB_SBL0_1_DN
HT_AD_NBLB_SBL0_2_DP
HT_AD_NBLB_SBL0_2_DN
HT_AD_NBLB_SBL0_3_DP
HT_AD_NBLB_SBL0_3_DN
1
53
53
53
53
53
53
53
53
2
1 2R8468
51-5%
1 2R8655
51-5%
1 2R8653
51-5%
1 2R8654
51-5%
1 2R8646
51-5%
1 2R8647
51-5%
1 2R8648
51-5%
1 2R8660
51-5%
1 2R9486
MOD_NH_HB_CADIN_8_DN
MOD_NH_HB_CADIN_9_DN
MOD_NH_HB_CADIN_10_DN
MOD_NH_HB_CADIN_11_DN
MOD_NH_HB_CADIN_12_DN
MOD_NH_HB_CADIN_13_DN
MOD_NH_HB_CADIN_14_DN
MOD_NH_HB_CADIN_15_DN
MOD_NH_HB_CLKIN_1_DN
23
23
23
23
23
23
23
23
23
53
53
53
53
53
53
53
53
23
23
23
23
23
23
23
23
HT_AD_SBL0_NBLB_4_DP
HT_AD_SBL0_NBLB_4_DN
HT_AD_SBL0_NBLB_5_DP
HT_AD_SBL0_NBLB_5_DN
HT_AD_SBL0_NBLB_6_DP
HT_AD_SBL0_NBLB_6_DN
HT_AD_SBL0_NBLB_7_DP
HT_AD_SBL0_NBLB_7_DN
MOD_NH_HB_CADIN_8_DP
MOD_NH_HB_CADIN_8_DN
MOD_NH_HB_CADIN_9_DP
MOD_NH_HB_CADIN_9_DN
MOD_NH_HB_CADIN_10_DP
MOD_NH_HB_CADIN_10_DN
MOD_NH_HB_CADIN_11_DP
MOD_NH_HB_CADIN_11_DN
A24
HB_CADIN_H04
B24
HB_CADIN_L04
A23
HB_CADIN_H05
B23
HB_CADIN_L05
A22
HB_CADIN_H06
B22
HB_CADIN_L06
A21
HB_CADIN_H07
B21
HB_CADIN_L07
E24
HB_CADIN_H08
D24
HB_CADIN_L08
E23
HB_CADIN_H09
D23
HB_CADIN_L09
F22
HB_CADIN_H10
E22
HB_CADIN_L10
F21
HB_CADIN_H11
E21
HB_CADIN_L11
HB_CADOUT_H04
HB_CADOUT_L04
HB_CADOUT_H05
HB_CADOUT_L05
HB_CADOUT_H06
HB_CADOUT_L06
HB_CADOUT_H07
HB_CADOUT_L07
HB_CADOUT_H08
HB_CADOUT_L08
HB_CADOUT_H09
HB_CADOUT_L09
HB_CADOUT_H10
HB_CADOUT_L10
HB_CADOUT_H11
HB_CADOUT_L11
A10
B10
A11
B11
A12
B12
A13
B13
E6
D6
E7
D7
F8
E8
F9
E9
HT_AD_NBLB_SBL0_4_DP
HT_AD_NBLB_SBL0_4_DN
HT_AD_NBLB_SBL0_5_DP
HT_AD_NBLB_SBL0_5_DN
HT_AD_NBLB_SBL0_6_DP
HT_AD_NBLB_SBL0_6_DN
HT_AD_NBLB_SBL0_7_DP
HT_AD_NBLB_SBL0_7_DN
TP_NH_HB_CADOUT_8_DP
TP_NH_HB_CADOUT_8_DN
TP_NH_HB_CADOUT_9_DP
TP_NH_HB_CADOUT_9_DN
TP_NH_HB_CADOUT_10_DP
TP_NH_HB_CADOUT_10_DN
TP_NH_HB_CADOUT_11_DP
TP_NH_HB_CADOUT_11_DN
53
53
53
53
53
53
53
53
2
Unused HT TX Signals Can be left Disconnected
3
51-5%
1 2R8657
51-5%
1 2R8656
51-5%
1 2R8649
51-5%
1 2R8652
51-5%
1 2R8651
51-5%
1 2R8650
51-5%
1 2R8659
51-5%
1 2R8658
51-5%
1 2R9487
51-5%
MOD_NH_HB_CADIN_8_DP
MOD_NH_HB_CADIN_9_DP
MOD_NH_HB_CADIN_10_DP
MOD_NH_HB_CADIN_11_DP
MOD_NH_HB_CADIN_12_DP
MOD_NH_HB_CADIN_13_DP
MOD_NH_HB_CADIN_14_DP
MOD_NH_HB_CADIN_15_DP
MOD_NH_HB_CLKIN_1_DP
23
23
23
23
23
23
23
23
23
+2.5V
REPLACE
21
C8608
.01uF
16V-10%
L1844
1 2
68nH 600mA
C8607
1 2
4.7uF
6.3V-10%
23
23
23
23
23
23
23
23
53
53
23
23
53
53
MOD_NH_HB_CADIN_12_DP
MOD_NH_HB_CADIN_12_DN
MOD_NH_HB_CADIN_13_DP
MOD_NH_HB_CADIN_13_DN
MOD_NH_HB_CADIN_14_DP
MOD_NH_HB_CADIN_14_DN
MOD_NH_HB_CADIN_15_DP
MOD_NH_HB_CADIN_15_DN
HT_CK_SBL0_NBLB_0_DP
HT_CK_SBL0_NBLB_0_DN
MOD_NH_HB_CLKIN_1_DP
MOD_NH_HB_CLKIN_1_DN
HT_CT_SBL0_NBLB_0_DP
HT_CT_SBL0_NBLB_0_DN
MOD_NH_HB_CALVDD25
R8455 MOD_NH_HB_CALR_DP
1 2
475-1%
MOD_NH_HB_CALR_DN
NC_NH_HB_PLLBYP_DP
NC_NH_HB_PLLBYP_DN
E19
HB_CADIN_H12
F19
HB_CADIN_L12
E18
HB_CADIN_H13
F18
HB_CADIN_L13
D17
HB_CADIN_H14
E17
HB_CADIN_L14
D16
HB_CADIN_H15
E16
HB_CADIN_L15
C25
HB_CLKIN_H0
B25
HB_CLKIN_L0
E20
HB_CLKIN_H1
D20
HB_CLKIN_L1
A20
HB_CLTIN_H
B20
HB_CLTIN_L
L18
HB_RXVDD25
A16
HB_CALR_H
B16
HB_CALR_L
B18
HB_PLLBYP_H
A18
HB_PLLBYP_L
HB_CADOUT_H12
HB_CADOUT_L12
HB_CADOUT_H13
HB_CADOUT_L13
HB_CADOUT_H14
HB_CADOUT_L14
HB_CADOUT_H15
HB_CADOUT_L15
HB_CLKOUT_H0
HB_CLKOUT_L0
HB_CLKOUT_H1
HB_CLKOUT_L1
HB_CLTOUT_H
HB_CLTOUT_L
HB_PLL_TEST_H
HB_PLL_TEST_L
E11
F11
E12
F12
D13
E13
D14
E14
C9
B9
E10
D10
A14
B14
A17
B17
TP_NH_HB_CADOUT_12_DP
TP_NH_HB_CADOUT_12_DN
TP_NH_HB_CADOUT_13_DP
TP_NH_HB_CADOUT_13_DN
TP_NH_HB_CADOUT_14_DP
TP_NH_HB_CADOUT_14_DN
TP_NH_HB_CADOUT_15_DP
TP_NH_HB_CADOUT_15_DN
HT_CL_NBLB_SBL0_0_DP
HT_CL_NBLB_SBL0_0_DN
NC_NH_HB_CLKOUT_0_DP
NC_NH_HB_CLKOUT_0_DN
HT_CT_NBLB_SBL0_0_DP
HT_CT_NBLB_SBL0_0_DN
NC_NH_HB_PLL_TEST_DP
NC_NH_HB_PLL_TEST_DN
53
53
3
53
53
4
HT2100 REV0D6
HETERO 2 OF 7
NORTH HUB HYPER TRANSPORT LINK B TO SOUTH HUB Link 0
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
4
REV.
X01
23 OF 14410/20/2006
C
DBA
Page 24
A B C
A_PCIE, Port 0: PCIE to Left PCIe Riser(Top)
A_PCIE, Port 1: PCIE to Left PCIe Riser(Bottom)
A_PCIE, Port 2: PCIE to PCIe Switch
71
71
EXP_NH_0_NB_0_DN
EXP_NH_0_NB_0_DP
AG10
AF10
A_PCIE_RN00
A_PCIE_RP00
U_NH
A_PCIE_TDN00
A_PCIE_TDP00
AH29
AH30
EXP_NH_0_SB_0_C_DN
EXP_NH_0_SB_0_C_DP
27
27
D
NORTH HUB PCIE LINKS AND STRAPPINGS
1
2
3
PCIE PORT 0
PCIE PORT 1
PCIE PORT 2
45
45
71
71
71
71
71
71
71
71
71
71
71
71
71
71
71
71
71
71
71
71
71
71
28
28
28
28
28
28
28
28
CK_100M_PCIE_NH_A_DN
CK_100M_PCIE_NH_A_DP
NC_NH_PCIE_A_TEST_DP
NC_NH_PCIE_A_TEST_DN
EXP_NH_0_NB_1_DN
EXP_NH_0_NB_1_DP
EXP_NH_0_NB_2_DN
EXP_NH_0_NB_2_DP
EXP_NH_0_NB_3_DN
EXP_NH_0_NB_3_DP
EXP_NH_0_NB_4_DN
EXP_NH_0_NB_4_DP
EXP_NH_0_NB_5_DN
EXP_NH_0_NB_5_DP
EXP_NH_0_NB_6_DN
EXP_NH_0_NB_6_DP
EXP_NH_0_NB_7_DN
EXP_NH_0_NB_7_DP
EXP_NH_1_NB_0_DN
EXP_NH_1_NB_0_DP
EXP_NH_1_NB_1_DN
EXP_NH_1_NB_1_DP
EXP_NH_1_NB_2_DN
EXP_NH_1_NB_2_DP
EXP_NH_1_NB_3_DN
EXP_NH_1_NB_3_DP
EXP_NH_2_NB_0_DN
EXP_NH_2_NB_0_DP
EXP_NH_2_NB_1_DN
EXP_NH_2_NB_1_DP
EXP_NH_2_NB_2_DN
EXP_NH_2_NB_2_DP
EXP_NH_2_NB_3_DN
EXP_NH_2_NB_3_DP
AG11
A_PCIE_RN01
AF11
A_PCIE_RP01
AF12
A_PCIE_RN02
AE12
A_PCIE_RP02
AF13
A_PCIE_RN03
AE13
A_PCIE_RP03
AF14
A_PCIE_RN04
AG14
A_PCIE_RP04
AE15
A_PCIE_RN05
AF15
A_PCIE_RP05
AF16
A_PCIE_RN06
AE16
A_PCIE_RP06
AG17
A_PCIE_RN07
AF17
A_PCIE_RP07
AK11
A_PCIE_RN08
AJ11
A_PCIE_RP08
AK12
A_PCIE_RN09
AJ12
A_PCIE_RP09
AK13
A_PCIE_RN10
AJ13
A_PCIE_RP10
AK14
A_PCIE_RN11
AJ14
A_PCIE_RP11
AH15
A_PCIE_RN12
AJ15
A_PCIE_RP12
AJ16
A_PCIE_RN13
AK16
A_PCIE_RP13
AJ17
A_PCIE_RN14
AK17
A_PCIE_RP14
AJ18
A_PCIE_RN15
AK18
A_PCIE_RP15
AJ21
A_PCIE_REFCLK_N
AK21
A_PCIE_REFCLK_P
AK20
A_PCIE_TEST_P
AJ20
A_PCIE_TEST_N
HT2100 REV0D6
HETERO 3 OF 7
A_PCIE_TDN1
A_PCIE_TDP01
A_PCIE_TDN2
A_PCIE_TDP02
A_PCIE_TDN3
A_PCIE_TDP03
A_PCIE_TDN4
A_PCIE_TDP04
A_PCIE_TDN5
A_PCIE_TDP05
A_PCIE_TDN6
A_PCIE_TDP06
A_PCIE_TDN7
A_PCIE_TDP07
A_PCIE_TDN8
A_PCIE_TDP08
A_PCIE_TDN9
A_PCIE_TDP09
A_PCIE_TDN10
A_PCIE_TDP10
A_PCIE_TDN11
A_PCIE_TDP11
A_PCIE_TDN12
A_PCIE_TDP12
A_PCIE_TDN13
A_PCIE_TDP13
A_PCIE_TDN14
A_PCIE_TDP14
A_PCIE_TDN15
A_PCIE_TDP15
PCIE_CLKO0_N
PCIE_CLKO0_P
PCIE_CLKO1_N
PCIE_CLKO1_P
PCIE_CLKO2_N
PCIE_CLKO2_P
PCIE_CLKO3_N
PCIE_CLKO3_P
PCIE_CLKO4_N
PCIE_CLKO4_P
AK29
AJ29
AK28
AJ28
AJ27
AH27
AJ26
AK26
AJ25
AK25
AJ24
AK24
AJ23
AK23
AG26
AF26
AG25
AF25
AF24
AE24
AF23
AE23
AG22
AF22
AE21
AF21
AE20
AF20
AF19
AG19
V30
V29
U30
U29
T30
T29
R29
R28
P29
P30
EXP_NH_0_SB_1_C_DN
EXP_NH_0_SB_1_C_DP
EXP_NH_0_SB_2_C_DN
EXP_NH_0_SB_2_C_DP
EXP_NH_0_SB_3_C_DN
EXP_NH_0_SB_3_C_DP
EXP_NH_0_SB_4_C_DN
EXP_NH_0_SB_4_C_DP
EXP_NH_0_SB_5_C_DN
EXP_NH_0_SB_5_C_DP
EXP_NH_0_SB_6_C_DN
EXP_NH_0_SB_6_C_DP
EXP_NH_0_SB_7_C_DN
EXP_NH_0_SB_7_C_DP
EXP_NH_1_SB_0_C_DN
EXP_NH_1_SB_0_C_DP
EXP_NH_1_SB_1_C_DN
EXP_NH_1_SB_1_C_DP
EXP_NH_1_SB_2_C_DN
EXP_NH_1_SB_2_C_DP
EXP_NH_1_SB_3_C_DN
EXP_NH_1_SB_3_C_DP
EXP_NH_2_SB_0_C_DN
EXP_NH_2_SB_0_C_DP
EXP_NH_2_SB_1_C_DN
EXP_NH_2_SB_1_C_DP
EXP_NH_2_SB_2_C_DN
EXP_NH_2_SB_2_C_DP
EXP_NH_2_SB_3_C_DN
EXP_NH_2_SB_3_C_DP
CK_100M_PCIE_NH_0_DN
CK_100M_PCIE_NH_0_DP
CK_100M_PCIE_NH_1_DN
CK_100M_PCIE_NH_1_DP
CK_100M_PCIE_NH_2_C_DN
CK_100M_PCIE_NH_2_C_DP
CK_100M_PCIE_NH_3_DN
CK_100M_PCIE_NH_3_DP
NC_NH_PCIECLK_4_DN
NC_NH_PCIECLK_4_DP
PCIE_CLKO 4 is Disabled
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
PCIE PORT 0
PCIE PORT 1
PCIE PORT 2
71
71
71
71
29
29
+3.3V
72
72
REPLACE
R8639
NP
1 2
4.7K-5%
R9460
NP
1 2
4.7K-5%
X
X
PCIE PORT 3
+3.3V
REPLACE
R8471
R8478
R8484
45
45
1 2
4.7K-5%
R8681
1 2
100-5%
1 2
4.7K-5%
1 2
4.7K-5%
B_PCIE, Port 3: PCIE to Center PCIe Riser
72
72
72
72
72
72
72
72
72
72
72
72
72
72
72
72
CK_100M_PCIE_NH_B_DN
CK_100M_PCIE_NH_B_DP
R8472
R8476
R8482
MOD_NH_PCIE0_PRES_N
MOD_NH_PCIE1_PRES_N
MOD_NH_PCIE2_PRES_N
MOD_NH_PCIE3_PRES_N
MOD_NH_PCIE4_PRES_N
EXP_NH_3_NB_0_DN
EXP_NH_3_NB_0_DP
EXP_NH_3_NB_1_DN
EXP_NH_3_NB_1_DP
EXP_NH_3_NB_2_DN
EXP_NH_3_NB_2_DP
EXP_NH_3_NB_3_DN
EXP_NH_3_NB_3_DP
EXP_NH_3_NB_4_DN
EXP_NH_3_NB_4_DP
EXP_NH_3_NB_5_DN
EXP_NH_3_NB_5_DP
EXP_NH_3_NB_6_DN
EXP_NH_3_NB_6_DP
EXP_NH_3_NB_7_DN
EXP_NH_3_NB_7_DP
R8470
1 2
4.7K-5%
R8679
1 2
100-5%
R8477
1 2
4.7K-5%
R8483
1 2
4.7K-5%
1 2
4.7K-5%
R8680
1 2
100-5%
1 2
4.7K-5%
1 2
4.7K-5%
T27
B_PCIE_RN00
T26
B_PCIE_RP00
R26
B_PCIE_RN01
R25
B_PCIE_RP01
P26
B_PCIE_RN02
P25
B_PCIE_RP02
N26
B_PCIE_RN03
N27
B_PCIE_RP03
M25
B_PCIE_RN04
M26
B_PCIE_RP04
L25
B_PCIE_RN05
L26
B_PCIE_RP05
K27
B_PCIE_RN06
K26
B_PCIE_RP06
J27
B_PCIE_RN7
J26
B_PCIE_RP07
N29
B_PCIE_REFCLK_N
N30
B_PCIE_REFCLK_P
AF30
ATNSW_L0
AD28
ATNSW_L1_DYDBD5
AA26
ATNSW_L2_DYDBD8
AC29
MPWRGD_L0
AB29
MPWRGD_L1_DYDBD18
Y27
MPWRGD_L2_DYDBD19
AF29
EMILS0
AC30
EMILS1_DYDBD4
AB30
EMILS2_DYDBD7
AE30
PWRFLT_L0
AE29
PWRFLT_L1_DYDBD6
AA27
PWRFLT_L2_DYDBD9
AJ2
PRSNT_L0
AJ4
PRSNT_L1
AK4
PRSNT_L2
Y30
PRSNT_L3
AA30
PRSNT_L4
U_NH
B_PCIE_TDN00
B_PCIE_TDP00
B_PCIE_TDN01
B_PCIE_TDP01
B_PCIE_TDN02
B_PCIE_TDP02
B_PCIE_TDN03
B_PCIE_TDP03
B_PCIE_TDN04
B_PCIE_TDP04
B_PCIE_TDN05
B_PCIE_TDP05
B_PCIE_TDN06
B_PCIE_TDP06
B_PCIE_TDN07
B_PCIE_TDP07
ATNLED0
ATNLED1_DYDBD10
ATNLED2_DYDBD14
EMIL0
EMIL1_DYDBD11
EMIL2_DYDBD15
PWREN_L0
PWREN_L1_DYDBD13
PWREN_L2_DYDBD17
PWRLED_L0
PWRLED_L1_DYDBD12
PWRLED_L2_DYDBD16
MRST_L0
MRST_L1
MRST_L2
MRST_L3
MRST_L4
D30
D29
E30
E29
F30
F29
G30
G29
H28
H29
J29
J30
K29
K30
L29
L30
AF28
AB25
AA29
AD29
AC27
AB26
AD27
AB28
Y26
AD30
AB27
Y25
AJ1
AK3
AJ3
Y29
Y28
EXP_NH_3_SB_0_C_DN
EXP_NH_3_SB_0_C_DP
EXP_NH_3_SB_1_C_DN
EXP_NH_3_SB_1_C_DP
EXP_NH_3_SB_2_C_DN
EXP_NH_3_SB_2_C_DP
EXP_NH_3_SB_3_C_DN
EXP_NH_3_SB_3_C_DP
EXP_NH_3_SB_4_C_DN
EXP_NH_3_SB_4_C_DP
EXP_NH_3_SB_5_C_DN
EXP_NH_3_SB_5_C_DP
EXP_NH_3_SB_6_C_DN
EXP_NH_3_SB_6_C_DP
EXP_NH_3_SB_7_C_DN
EXP_NH_3_SB_7_C_DP
NC_NH_ATNLED_0
NC_NH_ATNLED_1
NC_NH_ATNLED_2
NC_NH_EMIL_0
NC_NH_EMIL_1
NC_NH_EMIL_2
MOD_NH_PWREN_N
MOD_NH_PWREN_N_DYDBD13
MOD_PWREN_N_DYDBD17
NC_NH_PWRLED_0
NC_NH_PORLED_1
NC_NH_PWRLED_2
NH_MRST_0_N
NC_NH_MRST_1_N
NC_NH_MRST_2_N
NC_NH_MRST_3_N
NC_NH_MRST_4_N
96,138
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
PCIE PORT 3
R8480
1 2
4.7K-5%
R8479
1 2
+3.3V
REPLACE
R8481
4.7K-5%
1 2
1
2
4.7K-5%
3
4
HT2100 PCIE PORT
LANE WIDTH
PORT NUM
A
x8x4x4x8
0 1 2 3
R8636
NP
1 2
4.7K-5%
R8637
NP
1 2
4.7K-5%
B
R8640
1 2
4.7K-5%
X
X
R9454
1 2
1K-1%
R8628
1 2
1K-1%
R8629
1 2
1K-1%
R8682
1 2
1K-1%
HT2100 REV0D6
HETERO 4 OF 7
4
INC.
TITLE
ROUND ROCK,TEXAS
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
REV.
X01
24 OF 14410/20/2006
Page 25
A B C
D
1
TEST_MODE3TEST_MODE_EN
0
1
1
1
1
1
1
1
1
1
1
1
1
1
x
0
0
0
0
0
0
0
0
1
1
1
1
1
TEST_MODE2 TEST_MODE1 TEST_MODE0 OPERATION
x x
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
1
1
0
0
1
0
1
x
0
1
0
1
0
1
0
11
00
1
0
11
00
Regular System Mode
PLL Ref Clk Sel
XOR_MODE
PCIE_LPBK_MODE
RSVD
PLL TEST MODE
RSVD
PINS OUT LOW
PINS OUT HIGH
HT-PHY/PCIE_SDES TEST MODE
RSVD
IDDQ_TEST_MODE
SCAN MODE: SCAN Chain 1
SCAN MODE: SCAN Chain 2
+3.3V
REPLACE
R8548
R8547
R9309
1 2
4.7K-5%
1 2
4.7K-5%
NP
1 2
4.7K-5%
MOD_NH_MDCLK
MOD_NH_MDIO_DB31
X
R8516
1 2
R8588
8.2K-5%
1 2
+3.3V
REPLACE
R8589
8.2K-5%
1 2
1
8.2K-5%
2
3
1
1
1
STRP PIN
STRP_BCN_EN
STRP_DBG_32
STRP_HOT_PLUG
STRP_HT_16X
STRP_HT_BERT
STRP_HT_FREQ[2:0]
STRP_HT_LPBK
STRP_I2C_ADDR
STRP_PLL_PWRDN
TEST_MODE7 OperationTEST_MODE6 TEST_MODE5 TEST_MODE4
X
1
X
STRP_PCIE_A1 STRP_PCIE_A0
0
0
1
1
1
1
Description
1=BCN Dis
0=BCN En
*
1=Enable Dyn_Dbg mode
0=Disable Dyn_dbg mode
*
1=SHPC Mode
0=SWMM
*
1=Force 16x HT Width
1=Enable BERT Test Mode
0=Disable BERT Test Mode
*
HT Test Frequency
1=Enable Loop Back Test Mode
0=Disable Loop Back Test Mode
*
I2C Address Decode
1=CA, 0=C8
1=Disable PLL PD Mod
0=Enable PLL PD When PWROK=0
*
X
1
X
X
*
0
1
0
11
1
1
X
X
X
Auto Config
x16
*
x8,x4,x4
x8,x8
*=Default
NP
X
default
25
25
25
25
25
25
25
25
25
25
25,138
25,138
25,138
25,138
25
MOD_NH_BCN_EN
MOD_NH_DBG_32
MOD_NH_HOT_PLUG
MOD_NH_HT_16X_DB29
MOD_NH_HT_BERT_DB27
MOD_NH_HT_FREQ0_DB24
MOD_NH_HT_FREQ1_DB25
MOD_NH_HT_FREQ2_DB26
MOD_NH_HT_LPBK_DB28
MOD_NH_I2C_ADDR
MOD_NH_PCIE_A0
MOD_NH_PCIE_A1
MOD_NH_PCIE_B0
MOD_NH_PCIE_B1
MOD_NH_PLL_PWRDN_N
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1 2
R8602
0
11
X
X
X
1
NP
X
8.2K-5%
1 2
R8614
1
0
11 1
I2C_ISO_BMC_NH_VAUX_SCL
91
DT11510_change net names_jd
I2C_ISO_BMC_NH_VAUX_SDA
91
55
55
PLL 25MHz Bypass ModeX
PLL 250 & 125MHz Bypass Mode
PCIE PLL Bypass Mode
HT PLL Bypass Mode
STRP_PCIE_B1 STRP_PCIE_B0PCIE A CONFIG PCIE B CONFIG
0
0
1
NP
X
8.2K-5%
1 2
R8613
NP
X
8.2K-5%
1 2
R8606
NP
X
8.2K-5%
1 2
R8612
SCAN MODE: SCAN Chain 3
SCAN MODE: SCAN Chain 4
SCAN MODE: Burn In
JP_I2C_DBG_NH_SCL
JP_I2C_DBG_NH_SDA
NOTE: place as close as possible to U_NH
0
1
0
11
NP
X
8.2K-5%
1 2
R8603
NP
X
8.2K-5%
1 2
R8605
*
NP
X
8.2K-5%
Auto Config
x8
x4,x4
RSVD
NP
X
8.2K-5%
1 2
R8611
1 2
R8609
NOTE: place as close as possible to U_NH
52
NP0
NP
X
8.2K-5%
1 2
R8610
R9522
NP0
1 2
0-5%
R9523
1 2
0-5%
R9546
NP0
1 2
0-5%
26
NP
X
8.2K-5%
1 2
R8608
8.2K-5%
NP
NP0
1 2
+1.2V_VPCIE_NH
1 2
R8607
NP
52
R9545
0-5%
NP
8.2K-5%
1 2
R8604
X
8.2K-5%
R8615
I2C_NH_SCL
I2C_NH_SDA
+3.3V
REPLACE
NP
X
8.2K-5%
1 2
R8616
1 2
8.2K-5%
1
2
3
J_I2C_NH
R8540
0-5%
1 2
1 2
1 2
1 2
R8541
L1845
68nH 600mA
L1846
68nH 600mA
L1847
68nH 600mA
HDR 1X3
0-5%
1 2
96,138
96,138
R8542
1 2
138
0-5%
25,138
25,138
25,138
25,138
C8610
C8612
C8611
NH_AUX_PONRST_N
SYSTEM_PWRGOOD_NH
NH_RST_N
MOD_NH_TEST_CLK100
MOD_NH_TEST_CLK125
25
25
25
25
25
25
25
25
25
25
25
1 2
1 2
1 2
MOD_NH_BCN_EN
MOD_NH_DBG_32
MOD_NH_HOT_PLUG
MOD_NH_HT_16X_DB29
MOD_NH_HT_BERT_DB27
MOD_NH_HT_FREQ0_DB24
MOD_NH_HT_FREQ1_DB25
MOD_NH_HT_FREQ2_DB26
MOD_NH_HT_LPBK_DB28
MOD_NH_I2C_ADDR
MOD_NH_PCIE_A0
MOD_NH_PCIE_A1
MOD_NH_PCIE_B0
MOD_NH_PCIE_B1
MOD_NH_PLL_PWRDN_N
NH_A_PCIE_PLL_AVDD
4.7uF
4.7uF
4.7uF
NH_B_PCIE_PLL_AVDD
6.3V-10%
NH_CORE_PLL_AVDD
6.3V-10%
6.3V-10%
B3
PWROK
C3
RESET_L
G5
SCL
F4
SDA
AJ5
TEST_MDC
AJ8
TEST_MDIO_DYDB31
V27
TEST_CLK100
V25
TEST_CLK125
V26
TEST_CLK25
AG6
STRAP_BCN_EN
F5
STRAP_DBG_32
AH3
STRAP_HOT_PLUG
AE8
STRAP_HT_16X_DYDBD29
AJ6
STRAP_HT_BERT_DYDBD27
AH7
STRAP_HT_FREQ0_DYDBD24
AG7
STRAP_HT_FREQ1_DYDBD25
AF7
STRAP_HT_FREQ2_DYDBD26
AF8
STRAP_HT_LPBK_DYDBD28
E5
STRAP_I2C_ADDR
AG2
STRAP_PCIE_A0
AH1
STRAP_PCIE_A1
AH2
STRAP_PCIE_B0
AH6
STRAP_PCIE_B1
H4
STRAP_PLL_PWRDN
Y17
A_PCIE_PLL_AVDD
R20
B_PCIE_PLL_AVDD
U20
CORE_PLL_AVDD
I2C Addr=C8h
U_NH
PCIE_INTR_L0
PCIE_INTR_L1
PCIE_INTR_L2
PCIE_INTR_L3
PCIE_INTR_L4
TEST0_DYDBD20
TEST1_DYDBD21
TEST2_DYDBD22
TEST3_DYDBD23
TEST_MODE_EN
TEST_MODE0_DYDBD0
TEST_MODE1_DYDBD1
TEST_MODE2_DYDBD2
TEST_MODE3_DYDBD3
TEST_MODE4_DYDBD30
TEST_MODE5
TEST_MODE6
TEST_MODE7
TEST_MODE8_I2C_SCAN_MODE_TRIG
HA_PLL_AVDD
HB_PLL_AVDD
HT2100 REV0D6
HETERO 5 OF 7
PME_LPONRST_AUX_L
FATAL_L
ALERT_L
WAKE_L
HPINTR_L
RSVD0
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
H25B4
C4
A3
F25
E27
D26
F26
D27
E26
G26
W26
AK6
AK7
AK8
AE26
AG27
AG28
AG29
AH9
AK5
W28
H5
AJ9
AH8
AK9
AG8
AC26
F27
G27
AD26
AE27
T11
L14
MOD_NH_PME_N
MOD_NH_WAKE_N
MOD_NH_HPINTR_N
PCIIRQ_L0
PCIIRQ_L1
PCIIRQ_L2
PCIIRQ_L3
PCIIRQ_L4
NC_NH_TEST0_DYDBD20MOD_NH_TEST_CLK25
NC_NH_TEST1_DYDBD21
NC_NH_TEST1_DYDBD22
NC_NH_TEST3_DYDBD23
NC_NH_RSVD0
NC_NH_RSVD1
NC_NH_RSVD2
NC_NH_RSVD3
NC_NH_RSVD4
NC_NH_RSVD5
NC_NH_RSVD6
MOD_NH_TEST_MODE_EN
MOD_NH_TEST_MODE0_DB0
MOD_NH_TEST_MODE1_DB1
MOD_NH_TEST_MODE2_DB2
MOD_NH_TEST_MODE3_DB3
MOD_NH_TEST_MODE4_DB30
MOD_NH_TEST_MODE5
MOD_NH_TEST_MODE6
MOD_NH_TEST_MODE7
MOD_NH_TEST_MODE8_FREEZE
NH_HA_PLL_AVDD
NH_HB_PLL_AVDD
49
49
49
49
49
C8609
1 2
GC_FATAL_N
GC_ALERT_N
NP
X
4.7uF
6.3V-10%
8.2K-5%
1 2
R8591
100-5%
1 2
R8708
1 2
1 2
8.2K-5%
1 2
R8592
1 2
R8706
L1848
L1849
NP
X
100-5%
NP
X
68nH 600mA
68nH 600mA
1 2
R8594
1 2
R8704
51,55,138
51,138
8.2K-5%
1 2
R8595
NP
X
100-5%
1 2
R8703
NP
8.2K-5%
1 2
R8596
NP
X
100-5%
1 2
R8697
+1.2V_VCORE_NH
X
8.2K-5%
100-5%
1 2
R8597
1 2
R8702
NP
X
8.2K-5%
1 2
R8601
100-5%
1 2
R8701
NP
X
8.2K-5%
1 2
R8599
100-5%
1 2
R8698
NP
X
8.2K-5%
1 2
R8600
100-5%
1 2
R8707
26
+3.3V
REPLACE
8.2K-5%
1 2
R8598
NP
X
100-5%
1 2
R8699
2
8.2K-5%
3
100-5%
4
1 2
R8562
100-5%
1 2
R8683
100-5%
1 2
R8684
100-5%
1 2
R8685
100-5%
1 2
R8686
100-5%
1 2
R8687
100-5%
1 2
R8688
100-5%
1 2
R8689
100-5%
1 2
R8690
100-5%
1 2
R8691
100-5%
1 2
R8692
1K-1%
X
1 2R8696
1K-1%
X
1 2R8693
1K-1%
1 2R8694
1K-1%
1 2
R8695
100-5%
NORTH HUB MISC & STRAPPINGS
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
C8613
1 2
4.7uF
6.3V-10%
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 25 OF 144
DCBA
4
Page 26
A B C
D
1
2
3
T14
V14
Y14
AE14
AH14
A15
B15
D15
F15
L15
N15
R15
U15
W15
AG15
AK15
M16
P16
T16
F17
L17
N17
R17
U17
W17
AE17
AH17
M18
P18
T18
V18
Y18
AG18
A19
B19
D19
L19
N19
R19
U19
W19
AE19
AH19
AK19
F20
M20
P20
T20
V20
Y20
C21
D21
AG21
AH21
AE22
AJ22
AK22
C23
F23
AG23
AH23
A25
D25
E25
K25
N25
T25
AA25
AE25
Y16
V16
C17
AH25
C26
H26
U26
H27
M27
GND_T14
GND_V14
GND_Y14
GND_AE14
GND_AH14
GND_A15
GND_B15
GND_D15
GND_F15
GND_L15
GND_N15
GND_R15
GND_U15
GND_W15
GND_AG15
GND_AK15
GND_M16
GND_P16
GND_T16
GND_F17
GND_L17
GND_N17
GND_R17
GND_U17
GND_W17
GND_AE17
GND_AH17
GND_M18
GND_P18
GND_T18
GND_V18
GND_Y18
GND_AG18
GND_A19
GND_B19
GND_D19
GND_L19
GND_N19
GND_R19
GND_U19
GND_W19
GND_AE19
GND_AH19
GND_AK19
GND_F20
GND_M20
GND_P20
GND_T20
GND_V20
GND_Y20
GND_C21
GND_D21
GND_AG21
GND_AH21
GND_AE22
GND_AJ22
GND_AK22
GND_C23
GND_F23
GND_AG23
GND_AH23
GND_A25
GND_D25
GND_E25
GND_K25
GND_N25
GND_T25
GND_AA25
GND_AE25
GND_Y16
GND_V16
GND_C17
GND_AH25
GND_C26
GND_H26
GND_U26
GND_H27
GND_M27
U_NH
GND_A1
GND_B1
GND_G1
GND_N1
GND_AB1
GND_AG1
GND_AK1
GND_A2
GND_B2
GND_N2
GND_AK2
GND_D3
GND_F3
GND_H3
GND_K3
GND_M3
GND_P3
GND_T3
GND_V3
GND_Y3
GND_AC3
GND_AD3
GND_AF3
GND_A4
GND_G4
GND_M4
GND_P4
GND_V4
GND_AB4
GND_AD4
GND_AH4
GND_C5
GND_D5
GND_AH5
GND_F6
GND_H6
GND_J6
GND_N6
GND_T6
GND_V6
GND_Y6
GND_AC6
GND_AF6
GND_C7
GND_AE7
GND_A9
GND_D9
GND_AF9
GND_AG9
GND_C10
GND_F10
GND_AJ10
GND_AK10
GND_C11
GND_D11
GND_L11
GND_N11
GND_R11
GND_U11
GND_W11
GND_AE11
GND_AH11
GND_M12
GND_P12
GND_T12
GND_V12
GND_Y12
GND_C13
GND_F13
GND_L13
GND_N13
GND_R13
GND_U13
GND_W13
GND_AG13
GND_AH13
GND_M14
GND_P14
A1
B1
G1
N1
AB1
AG1
AK1
A2
B2
N2
AK2
D3
F3
H3
K3
M3
P3
T3
V3
Y3
AC3
AD3
AF3
A4
G4
M4
P4
V4
AB4
AD4
AH4
C5
D5
AH5
F6
H6
J6
N6
T6
V6
Y6
AC6
AF6
C7
AE7
A9
D9
AF9
AG9
C10
F10
AJ10
AK10
C11
D11
L11
N11
R11
U11
W11
AE11
AH11
M12
P12
T12
V12
Y12
C13
F13
L13
N13
R13
U13
W13
AG13
AH13
M14
P14
+1.2V
REPLACE
+1.2V
REPLACE
X00_DT11885
R10068
0 OHM-5%
R10134
0 OHM-5%
R10067
0 OHM-5%
R10133
0 OHM-5%
R10132
0 OHM-5%
21
+1.2V_VCORE_NH
21
X00_DT11885
21
+1.2V_VPCIE_NH
21
21
25
+3.3V
REPLACE
+1.2V_VCORE_NH
W12
P13
T13
V13
Y13
N14
R14
U14
W14
P15
T15
V15
N16
R16
U16
P17
T17
V17
N18
R18
U18
AE10
Y15
W16
W18
AE18
V19
Y19
AD25
M19
P19
T19
N20
J25
U25
G6
AJ7
AE9
G25
W25
AC25
AA28
AE28
VCORE12_01
VCORE12_02
VCORE12_03
VCORE12_04
VCORE12_05
VCORE12_06
VCORE12_07
VCORE12_08
VCORE12_09
VCORE12_10
VCORE12_11
VCORE12_12
VCORE12_13
VCORE12_14
VCORE12_15
VCORE12_16
VCORE12_17
VCORE12_18
VCORE12_19
VCORE12_20
VCORE12_21
VPCIE_A01
VPCIE_A02
VPCIE_A03
VPCIE_A04
VPCIE_A05
VPCIE_A06
VPCIE_A07
VPCIE_A08
VPCIE_B01
VPCIE_B02
VPCIE_B03
VPCIE_B04
VPCIE_B05
VPCIE_B06
VCC3_00
VCC3_01
VCC3_02
VCC3_03
VCC3_04
VCC3_05
VCC3_06
VCC3_07
6.3V-20%
U_NH
HT2100 REV0D6
HETERO 6 OF 7
X00_DT11886
1 2
100uF
C8731
6.3V-20%
100uF
1 2
VLDT_A01
VLDT_A02
VLDT_A03
VLDT_A04
VLDT_A05
VLDT_A06
VLDT_A07
VLDT_A08
VLDT_B01
VLDT_B02
VLDT_B03
VLDT_B04
VLDT_B05
VLDT_B06
VLDT_B07
VLDT_B08
GND157
GND158
GND159
GND160
GND161
GND162
GND163
GND164
GND165
GND166
GND167
GND168
GND169
GND170
GND171
GND172
GND173
GND174
GND175
GND176
GND177
GND178
GND179
GND180
GND181
GND182
GND183
C8736
VDDP1
VDDP2
VDDP3
VDDP4
C8626
K6
U6
W6
P11
V11
N12
R12
U12
F7
M13
F14
M15
F16
L16
M17
F24
Y11
L12
L20
W20
P27
U27
W27
AF27
AK27
C28
E28
G28
K28
M28
P28
T28
V28
AC28
AH28
C29
W29
A30
B30
C30
H30
M30
R30
W30
AG30
AJ30
AK30
1 2
+1.2V_VLDT
4.7uF
6.3V-10%
C8627
1 2
+2.5V
REPLACE
4.7uF
6.3V-10%
C8625
1 2
4.7uF
6.3V-10%
25
+1.2V_VLDT
6.3V-20%
100uF
1 2
4.7uF
C8628
+1.2V_VPCIE_NH
C9921
C8629
1 2
6.3V-20%
100uF
4.7uF
1 2
6.3V-10%
1 2
C8732
C8630
6.3V-10%
1 2
C8653
1 2
4.7uF
6.3V-10%
X00_DT11886
6.3V-20%
4.7uF
6.3V-10%
C8631
1 2
1 2
100uF
C8655
1 2
4.7uF
6.3V-10%
C9920
4.7uF
C8632
1 2
6.3V-20%
6.3V-10%
4.7uF
1 2
100uF
C8652
1 2
C8633
6.3V-10%
C8733
4.7uF
6.3V-10%
4.7uF
1 2
C8624
1 2
1 2
C8635
1 2
4.7uF
C8654
6.3V-10%
+3.3V
REPLACE
6.3V-20%
100uF
4.7uF
C8618
6.3V-10%
C8644
6.3V-10%
4.7uF
6.3V-10%
1 2
C8737
1 2
1 2
C8636
1 2
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4.7uF
6.3V-10%
C8657
1 2
C8619
1 2
C8645
1 2
C8634
1 2
+2.5V
REPLACE
C9799
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4.7uF
6.3V-10%
1 2
C8658
1 2
C8620
1 2
C8643
1 2
C8637
1 2
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4.7uF
6.3V-10%
C9780
1 2
C8656
1 2
C8621
1 2
C8646
1 2
C8638
1 2
1uF 6.3V
4.7uF
4.7uF
4.7uF
C8659
6.3V-10%
C8622
6.3V-10%
C8647
6.3V-10%
4.7uF
6.3V-10%
1 2
C9782
1 2
1 2
1 2
C8639
1 2
0.1uF 16V
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4.7uF
6.3V-10%
C9781
C8660
1 2
C8623
1 2
C8648
1 2
C8640
1 2
1 2
0.1uF 16V
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4.7uF
6.3V-10%
C8661
1 2
C8617
1 2
C8649
1 2
C8641
1 2
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4.7uF
6.3V-10%
C8662
1 2
C8616
1 2
C8650
1 2
C8642
1 2
1
2
4.7uF
6.3V-10%
4.7uF
6.3V-10%
3
4.7uF
6.3V-10%
4.7uF
6.3V-10%
4
HT2100 REV0D6
HETERO 7OF 7
NORTH HUB POWER
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
4
REV.
X01
26 OF 14410/20/2006
Page 27
1
A_PCIE PORT 0
A B C
C9103
EXP_NH_0_SB_0_DN
EXP_NH_0_SB_0_DP
EXP_NH_0_SB_1_DN
EXP_NH_0_SB_1_DP
EXP_NH_0_SB_2_DN
EXP_NH_0_SB_2_DP
EXP_NH_0_SB_3_DN
EXP_NH_0_SB_3_DP
EXP_NH_0_SB_4_DN
EXP_NH_0_SB_4_DP
71
71
71
71
71
71
71
71
TO LEFT RISER
71
71
TOP
HT2100
A_PCIE PORT 2
24
24
24
24
24
24
24
24
EXP_NH_2_SB_0_C_DN
EXP_NH_2_SB_0_C_DP
EXP_NH_2_SB_1_C_DN
EXP_NH_2_SB_1_C_DP
EXP_NH_2_SB_2_C_DN
EXP_NH_2_SB_2_C_DP
EXP_NH_2_SB_3_C_DN
EXP_NH_2_SB_3_C_DP
HT2100
24
24
24
24
24
24
24
24
24
24
EXP_NH_0_SB_0_C_DN
EXP_NH_0_SB_0_C_DP
EXP_NH_0_SB_1_C_DN
EXP_NH_0_SB_1_C_DP
EXP_NH_0_SB_2_C_DN
EXP_NH_0_SB_2_C_DP
EXP_NH_0_SB_3_C_DN
EXP_NH_0_SB_3_C_DP
EXP_NH_0_SB_4_C_DN
EXP_NH_0_SB_4_C_DP
1 2
.1uF
16V-10%
C9104
1 2
.1uF
16V-10%
C9109
1 2
.1uF
16V-10%
C9106
1 2
.1uF
16V-10%
C9113
1 2
.1uF
16V-10%
C9076
1 2
.1uF
16V-10%
C9105
1 2
.1uF
16V-10%
C9107
1 2
.1uF
16V-10%
C9108
1 2
.1uF
16V-10%
C9111
1 2
C9094
1 2
.1uF
16V-10%
C9091
1 2
.1uF
16V-10%
C9090
1 2
.1uF
16V-10%
C9087
1 2
.1uF
16V-10%
C9092
1 2
.1uF
16V-10%
C9093
1 2
.1uF
16V-10%
C9088
1 2
.1uF
16V-10%
C9089
1 2
.1uF
16V-10%
EXP_NH_2_SB_0_DN
EXP_NH_2_SB_0_DP
EXP_NH_2_SB_1_DN
EXP_NH_2_SB_1_DP
EXP_NH_2_SB_2_DN
EXP_NH_2_SB_2_DP
EXP_NH_2_SB_3_DN
EXP_NH_2_SB_3_DP
D
1
28
28
28
28
TO PEX8518
28
28
28
28
2
24
24
24
24
24
24
EXP_NH_0_SB_5_C_DN
EXP_NH_0_SB_5_C_DP
EXP_NH_0_SB_6_C_DN
EXP_NH_0_SB_6_C_DP
EXP_NH_0_SB_7_C_DN
EXP_NH_0_SB_7_C_DP
C9110
1 2
.1uF
16V-10%
C9117
1 2
.1uF
16V-10%
C9114
1 2
.1uF
16V-10%
.1uF
16V-10%
C9112
1 2
.1uF
16V-10%
C9115
1 2
.1uF
16V-10%
C9116
1 2
.1uF
16V-10%
EXP_NH_0_SB_5_DN
EXP_NH_0_SB_5_DP
EXP_NH_0_SB_6_DN
EXP_NH_0_SB_6_DP
EXP_NH_0_SB_7_DN
EXP_NH_0_SB_7_DP
71
71
71
71
71
71
24
24
24
24
24
24
24
EXP_NH_3_SB_0_C_DN
EXP_NH_3_SB_0_C_DP
EXP_NH_3_SB_1_C_DN
EXP_NH_3_SB_1_C_DP
EXP_NH_3_SB_2_C_DN
EXP_NH_3_SB_2_C_DP
EXP_NH_3_SB_3_C_DN
C9086
1 2
.1uF
16V-10%
C9082
1 2
.1uF
16V-10%
C9081
1 2
.1uF
16V-10%
C9079
1 2
C9083
1 2
.1uF
16V-10%
C9084
1 2
.1uF
16V-10%
C9080
1 2
.1uF
16V-10%
EXP_NH_3_SB_0_DN
EXP_NH_3_SB_0_DP
EXP_NH_3_SB_1_DN
EXP_NH_3_SB_1_DP
EXP_NH_3_SB_2_DN
EXP_NH_3_SB_2_DP
EXP_NH_3_SB_3_DN
72
2
72
72
72
72
72
72
3
HT2100
A_PCIE PORT 1
24
24
24
24
24
24
24
24
EXP_NH_1_SB_0_C_DN
EXP_NH_1_SB_0_C_DP
EXP_NH_1_SB_1_C_DN
EXP_NH_1_SB_1_C_DP
EXP_NH_1_SB_2_C_DN
EXP_NH_1_SB_2_C_DP
EXP_NH_1_SB_3_C_DN
EXP_NH_1_SB_3_C_DP
C9102
1 2
.1uF
16V-10%
C9098
1 2
.1uF
16V-10%
C9097
1 2
.1uF
16V-10%
C9095
1 2
.1uF
16V-10%
C9099
1 2
.1uF
16V-10%
C9100
1 2
.1uF
16V-10%
C9096
1 2
.1uF
16V-10%
C9101
.1uF
EXP_NH_1_SB_0_DN
EXP_NH_1_SB_0_DP
EXP_NH_1_SB_1_DN
EXP_NH_1_SB_1_DP
EXP_NH_1_SB_2_DN
EXP_NH_1_SB_2_DP
EXP_NH_1_SB_3_DN
EXP_NH_1_SB_3_DP
71
71
71
71
TO LEFT RISER
71
71
71
71
BOTTOM
HT2100
B_PCIE PORT 3
24
24
24
24
24
24
24
24
24
EXP_NH_3_SB_3_C_DP
EXP_NH_3_SB_4_C_DN
EXP_NH_3_SB_4_C_DP
EXP_NH_3_SB_5_C_DN
EXP_NH_3_SB_5_C_DP
EXP_NH_3_SB_6_C_DN
EXP_NH_3_SB_6_C_DP
EXP_NH_3_SB_7_C_DN
EXP_NH_3_SB_7_C_DP
.1uF
16V-10%
C9078
1 2
.1uF
16V-10%
C9074
1 2
.1uF
16V-10%
C9073
1 2
.1uF
16V-10%
C9070
1 2
.1uF
16V-10%
C9085
1 2
.1uF
16V-10%
C9075
1 2
.1uF
16V-10%
C9077
1 2
.1uF
16V-10%
C9071
1 2
.1uF
16V-10%
C90721 2
1 2
16V-10% .1uF
16V-10%
EXP_NH_3_SB_3_DP
EXP_NH_3_SB_4_DN
EXP_NH_3_SB_4_DP
EXP_NH_3_SB_5_DN
EXP_NH_3_SB_5_DP
EXP_NH_3_SB_6_DN
EXP_NH_3_SB_6_DP
EXP_NH_3_SB_7_DN
EXP_NH_3_SB_7_DP
72
TO CENTER RISER
72
72
72
72
3
72
72
72
72
4
PCIE AC COUPLING CAPACITORS
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
X01
SHEET
10/20/2006 27 OF 144
DCBA
4
Page 28
A B C
28
EXP_NH_2_NB_0_C_DP
C9125
1 2
D
EXP_NH_2_NB_0_DP
24
1
2
3
+3.3V
REPLACE
1 2R8873
4.7K-5%
1 2R8867 MOD_PEX_HP_BTN_0_N
4.7K-5%
1 2R8868
4.7K-5%
1 2R8869
4.7K-5%
1 2R8870
NC_PEX_HP_PWRLED_0_N
MOD_PEX_HP_PRSNT_0_N
NC_PEX_HP_ATNLED_0_N
MOD_PEX_HP_PWRFLT_0_N
MOD_PEX_HP_MRL_0_N
NC_PEX_HP_PWREN_0_N
NC_PEX_HP_PERST_0_N
NC_PEX_HP_CLKEN_0_N
4.7K-5%
1 2R8872
4.7K-5%
1 2R8871
4.7K-5%
1 2R8880
4.7K-5%
1 2R8874
MOD_PEX_HP_BTN_1_N
NC_PEX_HP_PWRLED_1_N
MOD_PEX_HP_PRSNT_1_N
NC_PEX_HP_ATNLED_1_N
MOD_PEX_HP_PWRFLT_1_N
MOD_PEX_HP_MRL_1_N
NC_PEX_HP_PWREN_1_N
NC_PEX_HP_PERST_1_N
NC_PEX_HP_CLKEN_1_N
4.7K-5%
1 2R8875
4.7K-5%
1 2R8876
4.7K-5%
1 2R8877
4.7K-5%
1 2R8878
MOD_PEX_HP_BTN_2_N
NC_PEX_HP_PWRLED_2_N
MOD_PEX_HP_PRSNT_2_N
NC_PEX_HP_ATNLED_2_N
MOD_PEX_HP_PWRFLT_2_N
MOD_PEX_HP_MRL_2_N
NC_PEX_HP_PWREN_2_N
NC_PEX_HP_PERST_2_N
NC_PEX_HP_CLKEN_2_N
4.7K-5%
1 2R8879
4.7K-5%
1 2R8887
4.7K-5%
1 2R8881
4.7K-5%
1 2R8882
MOD_PEX_HP_BTN_3_N
NC_PEX_HP_PWRLED_3_N
MOD_PEX_HP_PRSNT_3_N
NC_PEX_HP_ATNLED_3_N
MOD_PEX_HP_PWRFLT_3_N
MOD_PEX_HP_MRL_3_N
NC_PEX_HP_PWREN_3_N
NC_PEX_HP_PERST_3_N
NC_PEX_HP_CLKEN_3_N
4.7K-5%
1 2R8883
4.7K-5%
1 2R8884
4.7K-5%
1 2R8885
4.7K-5%
MOD_PEX_HP_BTN_4_N
NC_PEX_HP_PWRLED_4_N
MOD_PEX_HP_PRSNT_4_N
NC_PEX_HP_ATNLED_4_N
MOD_PEX_HP_PWRFLT_4_N
MOD_PEX_HP_MRL_4_N
NC_PEX_HP_PWREN_4_N
NC_PEX_HP_PERST_4_N
NC_PEX_HP_CLKEN_4_N
96,138
PEX_LANE_GOOD_0_N
NC_PEX_LANE_GOOD_1_N
NC_PEX_LANE_GOOD_2_N
96,138
96,138
PEX_LANE_GOOD_3_N
PEX_LANE_GOOD_4_N
NC_PEX_LANE_GOOD_5_N
NC_PEX_LANE_GOOD_6_N
96,138
96,138
PEX_LANE_GOOD_7_N
PEX_LANE_GOOD_8_N
NC_PEX_LANE_GOOD_9_N
NC_PEX_LANE_GOOD_10_N
96,138
96,138
PEX_LANE_GOOD_11_N
PEX_LANE_GOOD_12_N
NC_PEX_LANE_GOOD_13_N
NC_PEX_LANE_GOOD_14_N
96,138
PEX_LANE_GOOD_15_N
A1
HP_BUTTON_0_N
F3
HP_PWRLED_0_N
D1
HP_PRSNT_0_N
B2
HP_ATNLED_0_N
E4
HP_PWRFLT_0_N
B1
HP_MRL_0_N
D2
HP_PWREN_0_N
E2
HP_PERST_0_N
E1
HP_CLKEN_0_N
C8
HP_BUTTON_1_N
A3
HP_PWRLED_1_N
A5
HP_PRSNT_1_N
B8
HP_ATNLED_1_N
B7
HP_PWRFLT_1_N
D8
HP_MRL_1_N
B6
HP_PWREN_1_N
D6
HP_PERST_1_N
C4
HP_CLKEN_1_N
A19
HP_BUTTON_2_N
C22
HP_PWRLED_2_N
A22
HP_PRSNT_2_N
C18
HP_ATNLED_2_N
A21
HP_PWRFLT_2_N
D18
HP_MRL_2_N
C20
HP_PWREN_2_N
B22
HP_PERST_2_N
D22
HP_CLKEN_2_N
B13
HP_BUTTON_3_N
D16
HP_PWRLED_3_N
B16
HP_PRSNT_3_N
E13
HP_ATNLED_3_N
B15
HP_PWRFLT_3_N
C14
HP_MRL_3_N
C16
HP_PWREN_3_N
D15
HP_PERST_3_N
C17
HP_CLKEN_3_N
E20
HP_BUTTON_4_N
G20
HP_PWRLED_4_N
G19
HP_PRSNT_4_N
E21
HP_ATNLED_4_N
G18
HP_PWRFLT_4_N
F20
HP_MRL_4_N
E22
HP_PWREN_4_N
F22
HP_PERST_4_N
H20
HP_CLKEN_4_N
C6
PEX_LANE_GOOD_0_N
B5
PEX_LANE_GOOD_1_N
C5
PEX_LANE_GOOD_2_N
B3
PEX_LANE_GOOD_3_N
D4
PEX_LANE_GOOD_4_N
D3
PEX_LANE_GOOD_5_N
C1
PEX_LANE_GOOD_6_N
E3
PEX_LANE_GOOD_7_N
B21
PEX_LANE_GOOD_8_N
B20
PEX_LANE_GOOD_9_N
C19
PEX_LANE_GOOD_10_N
B19
PEX_LANE_GOOD_11_N
D17
PEX_LANE_GOOD_12_N
B18
PEX_LANE_GOOD_13_N
A17
PEX_LANE_GOOD_14_N
B17
PEX_LANE_GOOD_15_N
U_PCIE_SW
PEX_PETP_0
PEX_PETN_0_N
PEX_PERP_0
PEX_PERN_0_N
PEX_PETP_1
PEX_PETN_1_N
PEX_PERP_1
PEX_PERN_1_N
PEX_PETP_2
PEX_PETN_2_N
PEX_PERP_2
PEX_PERN_2_N
PEX_PETP_3
PEX_PETN_3_N
PEX_PERP_3
PEX_PERN_3_N
PEX_PETP_4
PEX_PETN_4_N
PEX_PERP_4
PEX_PERN_4_N
PEX_PETP_5
PEX_PETN_5_N
PEX_PERP_5
PEX_PERN_5_N
PEX_PETP_6
PEX_PETN_6_N
PEX_PERP_6
PEX_PERN_6_N
PEX_PETP_7
PEX_PETN_7_N
PEX_PERP_7
PEX_PERN_7_N
PEX_PETP_8
PEX_PETN_8_N
PEX_PERP_8
PEX_PERN_8_N
PEX_PETP_9
PEX_PETN_9_N
PEX_PERP_9
PEX_PERN_9_N
PEX_PETP_10
PEX_PETN_10_N
PEX_PERP_10
PEX_PERN_10_N
PEX_PETP_11
PEX_PETN_11_N
PEX_PERP_11
PEX_PERN_11_N
PEX_PETP_12
PEX_PETN_12_N
PEX_PERP_12
PEX_PERN_12_N
PEX_PETP_13
PEX_PETN_13_N
PEX_PERP_13
PEX_PERN_13_N
PEX_PETP_14
PEX_PETN_14_N
PEX_PERP_14
PEX_PERN_14_N
PEX_PETP_15
PEX_PETN_15_N
PEX_PERP_15
PEX_PERN_15_N
NC_SPARE0
NC_SPARE1
NC_SPARE2
M2
M1
M4
M5
P2
P1
P4
P5
T2
T1
T4
T5
V2
V1
V4
W4
AA4
AB4
AB2
AA2
AA6
AB6
V6
W6
AA8
AB8
V8
W8
AA10
AB10
V10
W10
AA12
AB12
V12
W12
AA14
AB14
V14
W14
AA16
AB16
V16
W16
AA18
AB18
W18
W19
W21
W22
AA22
AA21
U21
U22
U18
U19
R21
R22
R18
R19
N21
N22
N18
N19
D12
F18
L18
EXP_NH_2_NB_0_C_DP
EXP_NH_2_NB_0_C_DN
EXP_NH_2_SB_0_DP
EXP_NH_2_SB_0_DN
EXP_NH_2_NB_1_C_DP
EXP_NH_2_NB_1_C_DN
EXP_NH_2_SB_1_DP
EXP_NH_2_SB_1_DN
EXP_NH_2_NB_2_C_DP
EXP_NH_2_NB_2_C_DN
EXP_NH_2_SB_2_DP
EXP_NH_2_SB_2_DN
EXP_NH_2_NB_3_C_DP
EXP_NH_2_NB_3_C_DN
EXP_NH_2_SB_3_DP
EXP_NH_2_SB_3_DN
EXP_PEX_1_SB_0_C_DP
EXP_PEX_1_SB_0_C_DN
EXP_PEX_1_NB_0_DP
EXP_PEX_1_NB_0_DN
EXP_PEX_1_SB_1_C_DP
EXP_PEX_1_SB_1_C_DN
EXP_PEX_1_NB_1_DP
EXP_PEX_1_NB_1_DN
EXP_PEX_1_SB_2_C_DP
EXP_PEX_1_SB_2_C_DN
EXP_PEX_1_NB_2_DP
EXP_PEX_1_NB_2_DN
EXP_PEX_1_SB_3_C_DP
EXP_PEX_1_SB_3_C_DN
EXP_PEX_1_NB_3_DP
EXP_PEX_1_NB_3_DN
EXP_PEX_2_SB_0_C_DP
EXP_PEX_2_SB_0_C_DN
EXP_PEX_2_NB_0_DP
EXP_PEX_2_NB_0_DN
EXP_PEX_2_SB_1_C_DP
EXP_PEX_2_SB_1_C_DN
EXP_PEX_2_NB_1_DP
EXP_PEX_2_NB_1_DN
EXP_PEX_2_SB_2_C_DP
EXP_PEX_2_SB_2_C_DN
EXP_PEX_2_NB_2_DP
EXP_PEX_2_NB_2_DN
EXP_PEX_2_SB_3_C_DP
EXP_PEX_2_SB_3_C_DN
EXP_PEX_2_NB_3_DP
EXP_PEX_2_NB_3_DN
EXP_PEX_3_SB_0_C_DP
EXP_PEX_3_SB_0_C_DN
EXP_PEX_3_NB_0_DP
EXP_PEX_3_NB_0_DN
EXP_PEX_3_SB_1_C_DP
EXP_PEX_3_SB_1_C_DN
EXP_PEX_3_NB_1_DP
EXP_PEX_3_NB_1_DN
EXP_PEX_3_SB_2_C_DP
EXP_PEX_3_SB_2_C_DN
EXP_PEX_3_NB_2_DP
EXP_PEX_3_NB_2_DN
EXP_PEX_3_SB_3_C_DP
EXP_PEX_3_SB_3_C_DN
EXP_PEX_3_NB_3_DP
EXP_PEX_3_NB_3_DN
NC_PEX_SPARE0
NC_PEX_SPARE1
NC_PEX_SPARE2
27
27
27
27
27
27
27
27
82
82
82
82
82
82
82
82
84
84
84
84
84
84
84
84
70
70
70
70
70
70
70
70
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
SW Port 0
To HT2100 Port 2
SW Port 1
To LOM1
SW Port 2
To LOM2
SW Port 3
To Sideplane
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
EXP_NH_2_NB_0_C_DN
EXP_NH_2_NB_1_C_DP
EXP_NH_2_NB_1_C_DN
EXP_NH_2_NB_2_C_DP
EXP_NH_2_NB_2_C_DN
EXP_NH_2_NB_3_C_DP
EXP_NH_2_NB_3_C_DN
EXP_PEX_1_SB_0_C_DP
EXP_PEX_1_SB_0_C_DN
EXP_PEX_1_SB_1_C_DP
EXP_PEX_1_SB_1_C_DN
EXP_PEX_1_SB_2_C_DP
EXP_PEX_1_SB_2_C_DN
EXP_PEX_1_SB_3_C_DP
EXP_PEX_1_SB_3_C_DN
EXP_PEX_2_SB_0_C_DP
EXP_PEX_2_SB_0_C_DN
EXP_PEX_2_SB_1_C_DP
EXP_PEX_2_SB_1_C_DN
EXP_PEX_2_SB_2_C_DP
EXP_PEX_2_SB_2_C_DN
EXP_PEX_2_SB_3_C_DP
EXP_PEX_2_SB_3_C_DN
EXP_PEX_3_SB_0_C_DP
EXP_PEX_3_SB_0_C_DN
EXP_PEX_3_SB_1_C_DP
EXP_PEX_3_SB_1_C_DN
EXP_PEX_3_SB_2_C_DP
.1uF
16V-10%
C9121
1 2
.1uF
16V-10%
C9120
1 2
.1uF
16V-10%
C9118
1 2
.1uF
16V-10%
C9126
1 2
.1uF
16V-10%
C9128
1 2
.1uF
16V-10%
C9130
1 2
.1uF
16V-10%
C9132
1 2
.1uF
16V-10%
C9134
1 2
.1uF
16V-10%
C9136
1 2
.1uF
16V-10%
C9138
1 2
.1uF
16V-10%
C9140
1 2
.1uF
16V-10%
C9142
1 2
.1uF
16V-10%
C9144
1 2
.1uF
16V-10%
C9146
1 2
C9122
1 2
.1uF
16V-10%
C9123
1 2
.1uF
16V-10%
C9119
1 2
.1uF
16V-10%
C9124
1 2
.1uF
16V-10%
C9127
1 2
.1uF
16V-10%
C9129
1 2
.1uF
16V-10%
C9131
1 2
.1uF
16V-10%
C9133
1 2
.1uF
16V-10%
C9135
1 2
.1uF
16V-10%
C9137
1 2
.1uF
16V-10%
C9139
1 2
.1uF
16V-10%
C9141
1 2
.1uF
16V-10%
C9143
1 2
.1uF
16V-10%
C9145
1 2
.1uF
16V-10%
EXP_NH_2_NB_0_DN
EXP_NH_2_NB_1_DP
EXP_NH_2_NB_1_DN
EXP_NH_2_NB_2_DP
EXP_NH_2_NB_2_DN
EXP_NH_2_NB_3_DP
EXP_NH_2_NB_3_DN
EXP_PEX_1_SB_0_DP
EXP_PEX_1_SB_0_DN
EXP_PEX_1_SB_1_DP
EXP_PEX_1_SB_1_DN
EXP_PEX_1_SB_2_DP
EXP_PEX_1_SB_2_DN
EXP_PEX_1_SB_3_DP
EXP_PEX_1_SB_3_DN
EXP_PEX_2_SB_0_DP
EXP_PEX_2_SB_0_DN
EXP_PEX_2_SB_1_DP
EXP_PEX_2_SB_1_DN
EXP_PEX_2_SB_2_DP
EXP_PEX_2_SB_2_DN
EXP_PEX_2_SB_3_DP
EXP_PEX_2_SB_3_DN
EXP_PEX_3_SB_0_DP
EXP_PEX_3_SB_0_DN
EXP_PEX_3_SB_1_DP
EXP_PEX_3_SB_1_DN
EXP_PEX_3_SB_2_DP
24
24
24
1
24
24
24
24
81
81
81
81
81
81
2
81
81
83
83
83
83
83
83
83
83
3
70
70
70
70
70
4
PEX8518AA
HETERO 1 OF 3
PCIE SWITCH
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
EXP_PEX_3_SB_2_C_DN
28
EXP_PEX_3_SB_3_C_DP
28
EXP_PEX_3_SB_3_C_DN
28
.1uF
16V-10%
C9148
1 2
.1uF
16V-10%
16V-10%
16V-10%
TITLE
DWG NO.
DATE
C9147
1 2
EXP_PEX_3_SB_2_DN
.1uF
EXP_PEX_3_SB_3_DP
C9149
1 2
EXP_PEX_3_SB_3_DN
.1uF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
70
70
70
4
REV.
X01
28 OF 14410/20/2006
DCBA
Page 29
1
2
3
A B C
45
AC coupling caps, close to PEX8518
45
24
AC coupling caps, close to PEX8518
24
X00_DT11887
MOD_PEX_PORTCFG[4:0]
00000
*
00010
00011
00100
00101
00110
01000
01001 x4,x4,x4,x2,x2
Others Reserved
CK_100M_PCIE_PEX_C_DP
CK_100M_PCIE_PEX_C_DN
CK_100M_PCIE_NH_2_C_DP
CK_100M_PCIE_NH_2_C_DN
+3.3V
REPLACE
R9132
1 2
R9130
4.7K-5%
1 2
x4,x4,x4,x4,x0
x8,x8,x0,x0,x0
x8,x4,x4,x0,x0
x8,x4,x2,x2,x0
x8,x2,x2,x4,x0
x8,x2,x4,x2,x0
x8,x2,x2,x2,x2
R9129
4.7K-5%
1 2
Mode_Sel[1:0]
00
01
10
11
*
R8906
4.7K-5%
Reserved
Intelligent Adapter
Dual Host
Transparent
4.7K-5%
1 2
MOD_PEX_PORTCFG_0
MOD_PEX_PORTCFG_1
MOD_PEX_PORTCFG_2
MOD_PEX_PORTCFG_3
MOD_PEX_PORTCFG_4
C9349
21
0.01uF
50V-10%
C9350
21
0.01uF
50V-10%
C9919
NP
50V-10%
NP
50V-10%
R8905
1 2
SSC_XING_ENA=0, Single clock domain for all ports
R8904
4.7K-5%
21
0.01uF
C9918
0.01uF
X
+3.3V
21
REPLACE
X
R9133
1 2
1 2
1, Dual clock domain for upstream port
1 2
I2C_ADDR=70h
R8907
4.7K-5%
R8898
4.7K-5%
1 2
29
29
29
29
29
4.7K-5%
R9134
4.7K-5%
R8908
1 2
R8889
No Dual clock domain, REFCLK_CFC Left floating
R8896
4.7K-5%
1 2
R8897
4.7K-5%
1 2
0000 = Port 0 is Upstream
4.7K-5%
1 2
+3.3V
REPLACE
NP
R9138
X
1 2
1 2
4.7K-5%
R8895
4.7K-5%
1 2
R8902
NP
R9139
X
4.7K-5%
1 2
R8894
4.7K-5%
4.7K-5%
1 2
R8888
NP
R9140
X
4.7K-5%
1 2
R8901
1 2
R8892
1 2
R8899
4.7K-5%
4.7K-5%
1 2
4.7K-5%
R8891
4.7K-5%
4.7K-5%
1 2
R8900
1 2
1 2
4.7K-5%
+3.3V
REPLACE
R8890
4.7K-5%
1 2
96,138
CK_100M_PCIE_PEX_DP
CK_100M_PCIE_PEX_DN
CK_100M_PCIE_NH_2_DP
CK_100M_PCIE_NH_2_DN
R9128
1 2
4.7K-5%
R8893
1 2
4.7K-5%
MOD_PEX_NT_UPORT_SEL_0
MOD_PEX_NT_UPORT_SEL_1
MOD_PEX_NT_UPORT_SEL_2
MOD_PEX_NT_UPORT_SEL_3
R8903
4.7K-5%
1 2
MOD_PEX_FACTORY_TEST_3_N
MOD_PEX_FACTORY_TEST_4_N
MOD_PEX_FACTORY_TEST_5_N
MOD_PEX_TEST_MODE_1
MOD_PEX_TEST_MODE_2
MOD_PEX_TEST_MODE_3
MOD_PEX_FACTORY_TEST_2_N
MOD_PEX_FACTORY_TEST_1_N
MOD_PEX_FACTORY_TEST_6_N
MOD_PEX_SSC_XING_ENA
52
52
138
+3.3V
REPLACE
4.7K-5%
1 2
MOD_PEX_TMS
MOD_PEX_TRST_N
MOD_PEX_TCK
MOD_PEX_TDI
TP_MOD_PEX_TDO
PEX_PERST_N
NC_PEX_NT_RESET_N
NC_PEX_EECS_N
NC_PEX_EEDI
MOD_PEX_EEDO
NC_PEX_EESK
MOD_PEX_EEPR_N
96,138
MOD_PEX_MODE_SEL_0
MOD_PEX_MODE_SEL_1
MOD_PEX_UPORT_SEL_0
MOD_PEX_UPORT_SEL_1
MOD_PEX_UPORT_SEL_2
MOD_PEX_UPORT_SEL_3
29
29
4.7K-5%
29
29
29
MOD_PEX_TEST_MODE_0
I2C_PEX_SCL
I2C_PEX_SDA
MOD_PEX_I2C_ADDR_0
MOD_PEX_I2C_ADDR_1
MOD_PEX_I2C_ADDR_2
PEX_FATAL_ERR_N
PEX_PROCMON
MOD_PEX_PORTCFG_0
MOD_PEX_PORTCFG_1
MOD_PEX_PORTCFG_2
MOD_PEX_PORTCFG_3
MOD_PEX_PORTCFG_4
R9141
1 2
C10
JTAG_TMS
C9
JTAG_TRST_N
A9
JTAG_TCK
B9
JTAG_TDI
B10
JTAG_TDO
H2
PEX_PERST_N
D10
PEX_NT_RESET_N
K1
PEX_REFCLKP
K2
PEX_REFCLKN
K4
PEX_REFCLK_CFCP
K5
PEX_REFCLK_CFCN
J20
EE_CS_N
J21
EE_DI
G21
EE_DO
H22
EE_SK
J22
EE_PR_N
G4
N/C
B14
STRAP_NT_UPSTRM_PORT_SEL_0
A15
STRAP_NT_UPSTRM_PORT_SEL_1
A14
STRAP_NT_UPSTRM_PORT_SEL_2
C15
STRAP_NT_UPSTRM_PORT_SEL_3
D11
STRAP_MODE_SEL_0
E11
STRAP_MODE_SEL_1
A7
STRAP_UPSTRM_PORT_SEL_0
C7
STRAP_UPSTRM_PORT_SEL_1
E8
STRAP_UPSTRM_PORT_SEL_2
D7
STRAP_UPSTRM_PORT_SEL_3
J19
STRAP_PORTCFG_0
H19
STRAP_PORTCFG_1
F19
STRAP_PORTCFG_2
E19
STRAP_PORTCFG_3
D20
STRAP_PORTCFG_4
C11
STRAP_FACTORY_TEST3_N
C13
STRAP_FACTORY_TEST4_N
D13
STRAP_FACTORY_TEST5_N
B11
STRAP_TEST_MODE_0
A12
STRAP_TEST_MODE_1
B12
STRAP_TEST_MODE_2
C12
STRAP_TEST_MODE_3
K19
STRAP_FACTORY_TEST2_N
G3
STRAP_FACTORY_TEST1_N
F2
STRAP_FACTORY_TEST6_N
F1
STRAP_SSC_XING_ENA
K22
I2C_SCL
K20
I2C_SDA
L22
I2C_ADDR0
L21
I2C_ADDR1
L20
I2C_ADDR2
L19
FATAL_ERR_N
H1
WAKE_N
U_PCIE_SW
PEX8518AA
HETERO 2 OF 3
+3.3V
REPLACE
21
C9364
21
10uF
C9365
6.3V-20%
VDD33X
VDD33_A6
VDD33_A10
VDD33_A13
VDD33_A20
VDD33_B4
VDD33_C2
VDD33_D9
VDD33_D14
VDD33_D19
VDD33_D21
VDD33_E16
VDD33_F4
VDD33_F21
VDD33_G2
VDD33_H21
VDD33_K21
VDD33_M20
VDD33A
VTT_PEX_0
VTT_PEX_1
VTT_PEX_2
VTT_PEX_3
VTT_PEX_4
VTT_PEX_5
VTT_PEX_6
VTT_PEX_7
VSSA_PLL
VSS_J9
VSS_J10
VSS_J11
VSS_J12
VSS_J13
VSS_J14
VSS_K9
VSS_K10
VSS_K11
VSS_K12
VSS_K13
VSS_K14
VSS_L9
VSS_L10
VSS_L11
VSS_L12
VSS_L13
VSS_L14
VSS_M9
VSS_M10
VSS_M11
VSS_M12
VSS_M13
VSS_M14
VSS_N9
VSS_N10
VSS_N11
VSS_N12
VSS_N13
VSS_N14
VSS_P9
VSS_P10
VSS_P11
VSS_P12
VSS_P13
VSS_P14
.1uF
10V-10%
J3
A6
A10
A13
A20
B4
C2
D9
D14
D19
D21
E16
F4
F21
G2
H21
K21
M20
H3
N1
U1
AB5
AB9
AB13
AB17
V22
P22
H4
J9
J10
J11
J12
J13
J14
K9
K10
K11
K12
K13
K14
L9
L10
L11
L12
L13
L14
M9
M10
M11
M12
M13
M14
N9
N10
N11
N12
N13
N14
P9
P10
P11
P12
P13
P14
21
C9366
21
.1uF
C9367
10V-10%
VDD33A_PEX
.1uF
10V-10%
C9300
21
C9368
21
.1uF
10V-10%
.1uF
16V-10%
+3.3V
REPLACE
R9108
1 2
0 OHM-5%
+1.5V
REPLACE
+3.3V
REPLACE
+1.5V
REPLACE
A2
A4
A8
A11
A16
A18
C3
C21
E6
E10
E14
F5
G22
H5
J2
J18
K3
L1
L4
M3
M19
M22
N3
N4
N20
P3
P19
P20
R1
R4
R20
T3
T19
T22
U3
U4
U20
V3
V19
V20
W1
W5
W7
W9
W11
W13
W15
W17
W20
Y4
Y5
Y6
Y8
Y9
Y10
Y12
Y13
Y14
Y16
Y17
Y18
Y22
AA1
AB1
AB11
AB15
AB19
AB21
AB22
AB3
AB7
VSS_A2
VSS_A4
VSS_A8
VSS_A11
VSS_A16
VSS_A18
VSS_C3
VSS_C21
VSS_E6
VSS_E10
VSS_E14
VSS_F5
VSS_G22
VSS_H5
VSS_J2
VSS_J18
VSS_K3
VSS_L1
VSS_L4
VSS_M3
VSS_M19
VSS_M22
VSS_N3
VSS_N4
VSS_N20
VSS_P3
VSS_P19
VSS_P20
VSS_R1
VSS_R4
VSS_R20
VSS_T3
VSS_T19
VSS_T22
VSS_U3
VSS_U4
VSS_U20
VSS_V3
VSS_V19
VSS_V20
VSS_W1
VSS_W5
VSS_W7
VSS_W9
VSS_W11
VSS_W13
VSS_W15
VSS_W17
VSS_W20
VSS_Y4
VSS_Y5
VSS_Y6
VSS_Y8
VSS_Y9
VSS_Y10
VSS_Y12
VSS_Y13
VSS_Y14
VSS_Y16
VSS_Y17
VSS_Y18
VSS_Y22
VSS_AA1
VSS_AB1
VSS_AB11
VSS_AB15
VSS_AB19
VSS_AB21
VSS_AB22
VSS_AB3
VSS_AB7
U_PCIE_SW
PEX8518AA
HETERO 3 OF 3
D
VDD10S_J1
VDD10S_J4
VDD10S_L2
VDD10S_L3
VDD10S_M21
VDD10S_N5
VDD10S_P21
VDD10S_R2
VDD10S_R3
VDD10S_T20
VDD10S_U2
VDD10S_V18
VDD10S_V21
VDD10S_W2
VDD10S_W3
VDD10S_Y11
VDD10S_Y15
VDD10S_Y19
VDD10S_Y20
VDD10S_Y21
VDD10S_Y3
VDD10S_Y7
VDD10S_AA3
VDD10S_AA5
VDD10S_AA9
VDD10S_AA11
VDD10S_AA13
VDD10S_AA17
VDD10S_AA19
VDD10_E5
VDD10_E7
VDD10_E9
VDD10_E12
VDD10_E15
VDD10_E17
VDD10_G5
VDD10_H18
VDD10_J5
VDD10_K18
VDD10_M18
VDD10_T18
VDD10_U5
VDD10_V5
VDD10_V7
VDD10_V11
VDD10_V13
VDD10_V17
VDD10A_L5
VDD10A_R5
VDD10A_P18
VDD10A_V9
VDD10A_V15
VDD10X_G1
VDD10X_N2
VDD10X_AA7
VDD10X_AA15
VDD10X_T21
NC_D5
NC_E18
NC_Y1
NC_Y2
NC_AA20
NC_AB20
J1
J4
L2
L3
M21
N5
P21
R2
R3
T20
U2
V18
V21
W2
W3
Y11
Y15
Y19
Y20
Y21
Y3
Y7
AA3
AA5
AA9
AA11
AA13
AA17
AA19
E5
E7
E9
E12
E15
E17
G5
H18
J5
K18
M18
T18
U5
V5
V7
V11
V13
V17
PEX_VDD10A
L5
R5
P18
V9
V15
G1
N2
AA7
AA15
T21
D5
E18
Y1
Y2
AA20
AB20
+1V
1
2
R9919
1 2
0 OHM-5%
29
3
NC_PEX_D5
NC_PEX_E18
NC_PEX_Y1
NC_PEX_Y2
NC_PEX_AA20
NC_PEX_AB20
4
+1V
21
C9338
R9145
1 2
21
C9339
22uF 6.3V
R9144
4.7K-5%
1 2
21
C9344
22uF 6.3V
R9143
4.7K-5%
1 2
10uF
C9345
6.3V-20%
4.7K-5%
21
R9142
1 2
10uF
C9346
6.3V-20%
R9146
4.7K-5%
21
10uF
4.7K-5%
1 2
21
C9347
6.3V-20%
10uF
C9298
6.3V-20%
21
1uF
PCIE SWITCH
21
C9299
6.3V-20%
1uF
C9362
6.3V-20%
R9135
1 2
21
.1uF
21
C9356
10V-10%
.1uF
21
C9357
10V-10%
R9136
4.7K-5%
.1uF
C9358
10V-10%
1 2
21
R9137
4.7K-5%
1 2
.1uF
C9359
10V-10%
4.7K-5%
21
.1uF
10V-10%
21
C9360
.1uF
10V-10%
21
C9361
R9374
1 2
4.7K-5%
.1uF
C9363
10V-10%
4.7K-5%
21
MOD_PEX_WAKE_N
21
.1uF
21
C9291
10V-10%
.01uF
16V-10%
21
C9290
.01uF
21
C9285
16V-10%
.01uF
21
C9286
16V-10%
.01uF
16V-10%
Do NOT share VDD10A power vias with other 1.0V power pins
21
C9287
.01uF
16V-10%
21
C9288
.01uF
21
C9289
16V-10%
.01uF
16V-10%
21
C9308
C9309
.022uF
16V-10%
21
C9310
.022uF
16V-10%
21
29
.022uF
16V-10%
PEX_VDD10A
21
C9292
.01uF
16V-10%
21
C9311
.022uF
16V-10%
C9348
10uF
21
C9372
6.3V-20%
.1uF
10V-10%
21
C9371
TITLE
.1uF
10V-10%
21
C9369
.1uF
10V-10%
21
C9370
.1uF
10V-10%
INC.
21
C9294
.01uF
21
C9293
16V-10%
.01uF
16V-10%
ROUND ROCK,TEXAS
4
SCHEM,PLN,SV,PE_BULN
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
REV.
FP975
SHEET
X01
10/20/2006 29 OF 144
DCBA
Page 30
A B C
D
1
+VCORE_CPU1
+MEM_CPU1
21
C8933
21
C8934
22uF 6.3V
22uF 6.3V
C8973
21
10uF 6.3V
21
C8974
21
C8975
10uF 6.3V
21
C8976
10uF 6.3V
21
C8977
10uF 6.3V
21
C8981
10uF 6.3V
21
C8980
10uF 6.3V
10uF 6.3V
21
C8979
21
C8982
10uF 6.3V
21
C8978
10uF 6.3V
21
C8986
10uF 6.3V
21
C8985
10uF 6.3V
21
C8984
10uF 6.3V
21
C8987
10uF 6.3V
21
C8983
10uF 6.3V
21
C8989
10uF 6.3V
21
C8988
10uF 6.3V
C8880
10uF 6.3V
1 2
.22uF
10V-20%
1 2
C8881
.22uF
10V-20%
1 2
C8882
.22uF
10V-20%
21
C8787
.01uF
16V-10%
C8764
1 2
1800pF
50V-10%
+MEM_CPU1
+VTT_CPU1
21
C8793
.1uF
16V-10%
21
C8794
.1uF
C8795
16V-10%
+VTT_CPU1
21
.1uF
21
C8796
16V-10%
.1uF
16V-10%
21
C8797
.1uF
16V-10%
21
C8802
.1uF
16V-10%
21
C8801
.1uF
16V-10%
21
C8800
.1uF
16V-10%
21
C8799
.1uF
16V-10%
21
C8798
.1uF
16V-10%
21
C9835
.1uF
16V-10%
21
C9834
.1uF
16V-10%
1
2
21
C8991
+1.2V_VLDT +1.2V_VLDT +1.2V_VLDT
21
21
C8990
10uF 6.3V
21
10uF 6.3V
21
C8951
4.7uF
21
C8950
6.3V-10%
4.7uF
C8949
6.3V-10%
21
4.7uF
C8948
6.3V-10%
21
4.7uF
6.3V-10%
1 2
C8888
.22uF
10V-20%
21
1 2
C8887
.22uF
10V-20%
21
1 2
C8886
.22uF
10V-20%
1 2
C8885
.22uF
10V-20%
1 2
C8884
.22uF
10V-20%
1 2
C8883
.22uF
10V-20%
21
C8789
.01uF
16V-10%
21
C8788
.01uF
16V-10%
21
C8766
1 2
21
C8765
1800pF
50V-10%
1 2
1800pF
50V-10%
C9818
1 2
C9819
1800pF
50V-10%
1 2
C9820
1800pF
50V-10%
C9823
1 2
1 2
C9821
1800pF
50V-10%
C9824
1800pF
50V-10%
1 2
1 2
C9822
1800pF
50V-10%
C9825
1800pF
50V-10%
1 2
1 2
1800pF
50V-10%
1800pF
50V-10%
+MEM_CPU1
21
21
C8812
+VTT_CPU1
.1uF
21
C8811
16V-10%
.1uF
16V-10%
21
C8810
.1uF
16V-10%
21
C8809
.1uF
16V-10%
21
C8808
.1uF
16V-10%
21
C8807
.1uF
16V-10%
21
C8806
.1uF
16V-10%
21
C8805
.1uF
16V-10%
21
C8804
.1uF
16V-10%
21
C8803
.1uF
16V-10%
2
21
21
21
21
21
21
21
21
21
21
21
3
C8953
+VTT_CPU1
21
C8960
4.7uF
C8954
6.3V-10%
4.7uF
C8959
6.3V-10%
21
4.7uF
6.3V-10%
4.7uF
C8958
6.3V-10%
21
1 2
C8891
4.7uF
C8957
6.3V-10%
.22uF
C8892
10V-20%
21
4.7uF
1 2
.22uF
10V-20%
6.3V-10%
C8768
1 2
C8898
1 2
.22uF
C8769
1800pF
50V-10%
1 2
C8897
10V-20%
1 2
1800pF
.22uF
C8896
10V-20%
50V-10%
1 2
.22uF
C8952
1 2
C8895
10V-20%
4.7uF
C8947
6.3V-10%
.22uF
10V-20%
4.7uF
6.3V-10%
C8942
1 2
C8890
C8941
1000pF
50V-10%
1 2
1 2
.22uF
C8889
10V-20%
C8940
1000pF
50V-10%
1 2
1 2
.22uF
10V-20%
C8939
1000pF
50V-10%
1 2
C8767
1 2
1000pF
50V-10%
C8763
1800pF
50V-10%
C8772
1 2
1 2
1800pF
50V-10%
C8773
1800pF
50V-10%
1 2
C8955
C8774
1800pF
50V-10%
4.7uF
15,55,142
1 2
1800pF
C8956
6.3V-10%
C8775
1 2
50V-10%
4.7uF
6.3V-10%
VCORE_CPU1_NB
1800pF
50V-10%
C8893
1 2
.22uF
C8894
10V-20%
1 2
C9928
1 2
.22uF
.22uF
C9926
10V-20%
10V-20%
1 2
1800pF
50V-10%
C8770
1 2
21
C9930
C8771
1800pF
10uF 6.3V
1 2
50V-10%
21
C9931
10uF 6.3V
1800pF
50V-10%
21
C9932
21
C9933
10uF 6.3V
21
C9934
10uF 6.3V
10uF 6.3V
C9836
.1uF
16V-10%
C9837
.1uF
16V-10%
+VTT_CPU1
C8813
21
C8823
.1uF
16V-10%
.1uF
16V-10%
C8814
21
C8824
.1uF
16V-10%
.1uF
16V-10%
C8815
21
C8825
.1uF
16V-10%
.1uF
16V-10%
C8816
21
C8826
.1uF
16V-10%
.1uF
16V-10%
C8817
21
C8827
.1uF
16V-10%
.1uF
16V-10%
C8818
21
C8828
.1uF
16V-10%
.1uF
16V-10%
C8819
21
C8829
.1uF
16V-10%
.1uF
16V-10%
C8820
21
C8830
.1uF
16V-10%
.1uF
16V-10%
C8821
21
C8831
.1uF
16V-10%
.1uF
16V-10%
C8822
21
C8832
.1uF
16V-10%
.1uF
16V-10%
3
+VCORE_CPU1
1 2
C8900
.22uF
1 2
C8899
10V-20%
.22uF
10V-20%
2.5V-20%
+
330uF
1 2
2.5V-20%
330uF
C8920
+
C8921
1 2
2.5V-20%
+
330uF
1 2
2.5V-20%
C8922
+
330uF
ROOM = CPU1
2.5V-20%
+
1 2
C8923
330uF
C8924
1 2
2.5V-20%
+
330uF
1 2
C8925
2.5V-20%
820uF
+
1 2
2.5V-20%
C8755
820uF
+
1 2
2.5V-20%
C8756
820uF
+
1 2
2.5V-20%
C8757
820uF
+
1 2
C8758
2.5V-20%
820uF
+
1 2
2.5V-20%
820uF
C9597
+
21
C9598
+MEM_CPU1
PLACE BETWEEN DIMMS
21
C9496
21
C9495
10uF 6.3V
ROOM = CPU1DIMM
21
C9497
10uF 6.3V
21
C9498
10uF 6.3V
21
C9499
10uF 6.3V
21
C9500
10uF 6.3V
10uF 6.3V
MODULE:
DESC:
REV: OF
CPUS,FSB,NB,XDP0,XDP1
SEC
MCH
211
4
ROOM = CPU1_REG
Was this pulled from Fat Tire/Guiness
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
CPU1 Decoupling
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 30 OF 144
DCBA
4
Page 31
+VCORE_CPU2
A B C
D
+VTT_CPU2
1
21
C8935
+MEM_CPU2
21
C8992
21
C8936
22uF 6.3V
21
C8993
10uF 6.3V
22uF 6.3V
10uF 6.3V
21
C8968
21
C9009
4.7uF
C8969
6.3V-10%
C9008
10uF 6.3V
21
4.7uF
21
10uF 6.3V
21
C8970
6.3V-10%
21
C9007
4.7uF
C8971
6.3V-10%
21
C9010
10uF 6.3V
21
4.7uF
6.3V-10%
21
C9006
10uF 6.3V
C8908
21
C9004
10uF 6.3V
1 2
.22uF
10V-20%
21
C9003
10uF 6.3V
1 2
C8909
.22uF
C9002
10uF 6.3V
1 2
C8910
10V-20%
21
10uF 6.3V
.22uF
10V-20%
21
C9005
1 2
C8911
21
C9001
10uF 6.3V
.22uF
1 2
C8912
10V-20%
21
C8999
10uF 6.3V
.22uF
1 2
C8913
10V-20%
21
C8998
10uF 6.3V
.22uF
10V-20%
21
C8997
10uF 6.3V
21
C8790
21
C9000
10uF 6.3V
.01uF
C8791
16V-10%
21
C8996
10uF 6.3V
21
.01uF
16V-10%
21
C8995
10uF 6.3V
C8783
1 2
21
C8994
10uF 6.3V
C8784
1800pF
1 2
50V-10%
C8916
10uF 6.3V
C9826
1800pF
50V-10%
1 2
1 2
.22uF
C8915
10V-20%
C9827
1800pF
50V-10%
1 2
1 2
.22uF
10V-20%
C9828
1800pF
50V-10%
1 2
C8914
1 2
.22uF
10V-20%
C9829
1800pF
50V-10%
1 2
21
C8792
C9830
1800pF
50V-10%
.01uF
1 2
16V-10%
1800pF
50V-10%
C8785
1 2
1800pF
50V-10%
+MEM_CPU2
21
C8872
+MEM_CPU2
.1uF
21
C8871
16V-10%
+VTT_CPU2
.1uF
16V-10%
21
C8862
21
C8870
.1uF
16V-10%
.1uF
16V-10%
21
C8861
21
C8869
.1uF
16V-10%
.1uF
16V-10%
21
C8860
21
C8868
.1uF
16V-10%
.1uF
21
C8859
21
C8867
16V-10%
.1uF
16V-10%
.1uF
16V-10%
21
C8858
21
C8866
.1uF
16V-10%
.1uF
16V-10%
21
C8857
21
C8865
.1uF
16V-10%
.1uF
16V-10%
21
C8856
21
C8864
.1uF
16V-10%
.1uF
16V-10%
21
C8855
21
C8863
.1uF
16V-10%
.1uF
16V-10%
21
C8854
21
C9839
.1uF
16V-10%
.1uF
21
C8853
21
C9838
16V-10%
.1uF
16V-10%
.1uF
16V-10%
1
2
+1.2V_VLDT +1.2V_VLDT
21
C8965
+VTT_CPU2
4.7uF
C8966
6.3V-10%
21
4.7uF
6.3V-10%
1 2
C8905
.22uF
C8906
10V-20%
1 2
.22uF
10V-20%
C8780
1 2
C8781
1800pF
50V-10%
1 2
1800pF
50V-10%
21
C8967
4.7uF
21
C8972
6.3V-10%
4.7uF
6.3V-10%
1 2
C8917
.22uF
C8907
10V-20%
1 2
.22uF
10V-20%
C8782
1 2
C8786
1800pF
50V-10%
1 2
1800pF
50V-10%
19,55,141
VCORE_CPU2_NB
C9831
1 2
21
C9832
1800pF
50V-10%
21
1 2
C9833
1800pF
50V-10%
21
1 2
1800pF
50V-10%
21
+VTT_CPU2
2
21
C9840
21
.1uF
21
C9841
16V-10%
.1uF
21
C8843
16V-10%
+VTT_CPU2
.1uF
21
C8844
16V-10%
.1uF
21
C8845
16V-10%
.1uF
21
C8846
16V-10%
.1uF
21
C8847
16V-10%
.1uF
21
C8848
16V-10%
.1uF
21
C8849
16V-10%
.1uF
21
C8850
16V-10%
.1uF
21
C8851
16V-10%
.1uF
21
C8852
16V-10%
.1uF
16V-10%
3
NP
C8961
21
NP
21
4.7uF
C8962
6.3V-10%
+VCORE_CPU2
NP
4.7uF
C8963
6.3V-10%
21
NP
4.7uF
C8964
6.3V-10%
21
4.7uF
6.3V-10%
NP
C8901
1 2
NP
.22uF
C8902
10V-20%
NP
.22uF
C8904
10V-20%
1 2
NP
.22uF
C8903
10V-20%
1 2
ROOM = CPU2
1 2
.22uF
10V-20%
C8943
1 2
C8944
1000pF
50V-10%
1 2
C8945
1000pF
50V-10%
1 2
C8946
1000pF
50V-10%
1 2
1000pF
50V-10%
C8779
1 2
C8778
1800pF
50V-10%
1 2
C8777
1800pF
50V-10%
1 2
C8776
1800pF
50V-10%
1 2
1800pF
50V-10%
C9927
1 2
C9929
1800pF
50V-10%
1 2
.22uF
10V-20%
C9935
C9936
10uF 6.3V
C9938
10uF 6.3V
C9937
10uF 6.3V
C9939
10uF 6.3V
10uF 6.3V
21
C8833
+MEM_CPU2
21
21
.1uF
C8834
16V-10%
PLACE BETWEEN DIMMS
.1uF
C8835
16V-10%
21
21
21
.1uF
21
C8836
16V-10%
21
.1uF
21
C8837
16V-10%
21
.1uF
21
21
C8838
16V-10%
.1uF
21
C8839
16V-10%
.1uF
21
C8840
16V-10%
.1uF
21
C8841
16V-10%
.1uF
21
C8842
16V-10%
.1uF
16V-10%
3
4
1 2
C8918
.22uF
C8919
10V-20%
1 2
.22uF
10V-20%
2.5V-20%
+
330uF
1 2
2.5V-20%
330uF
C8929
+
1 2
C8928
2.5V-20%
+
330uF
1 2
2.5V-20%
C8930
2.5V-20%
+
330uF
1 2
TO DO: determine correct BULK parts
330uF
C8931
+
C8927
1 2
2.5V-20%
+
330uF
1 2
2.5V-20%
C8926
ROOM = CPU2_REG
820uF
+
1 2
2.5V-20%
820uF
C9599
+
2.5V-20%
1 2
820uF
C9600
C9506
1 2
+
2.5V-20%
C8762
820uF
+
1 2
2.5V-20%
C8761
820uF
+
1 2
2.5V-20%
C8760
820uF
+
1 2
C8759
C9505
10uF 6.3V
C9504
10uF 6.3V
C9503
10uF 6.3V
C9502
10uF 6.3V
C9501
10uF 6.3V
10uF 6.3V
ROOM = CPU2DIMM
MODULE:
DESC:
REV: OF
CPUS,FSB,NB,XDP0,XDP1
SEC
MCH
211
4
INC.
TITLE
ROUND ROCK,TEXAS
CPU2 Decoupling
SCHEM,PLN,SV,PE_BULN
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
REV.
FP975
SHEET
X01
10/20/2006 31 OF 144
DCBA
Page 32
A B C
D
1
2
3
4
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,33,34
13,34
13,34
13,33,34
13,33,34
13,33,34
13,34
13,34
13
13
CPU1_MEM_MA_BANK1
CPU1_MEM_MA_BANK0
CPU1_MEM_MA_BANK2
CPU1_MEM_MA_ADD15
CPU1_MEM_MA_ADD14
CPU1_MEM_MA_ADD13
CPU1_MEM_MA_ADD12
CPU1_MEM_MA_ADD11
CPU1_MEM_MA_ADD10
CPU1_MEM_MA_ADD9
CPU1_MEM_MA_ADD8
CPU1_MEM_MA_ADD7
CPU1_MEM_MA_ADD6
CPU1_MEM_MA_ADD5
CPU1_MEM_MA_ADD4
CPU1_MEM_MA_ADD3
CPU1_MEM_MA_ADD2
CPU1_MEM_MA_ADD1
CPU1_MEM_MA_ADD0
CPU1_MEM_MA0_CS_L1
CPU1_MEM_MA0_CS_L0
CPU1_MEM_MA_RAS_N
CPU1_MEM_MA_CAS_N
CPU1_MEM_MA_WE_N
CPU1_MEM_MA2_CS_L1
CPU1_MEM_MA2_CS_L0
NC_DIMM1_P138
NC_DIMM1_P137
CK_CPU1_MEM_MA0_DN
CK_CPU1_MEM_MA0_DP
190
173
174
196
176
177
179
180
182
183
188
193
192
221
220
138
137
186
185
171
CPU1_MEM_MA_CKE0
I2C_P1_DIMM1_SDA
I2C_P1_DIMM1_SCL
32,33
32,33
32,33
CPU1_DIMM_PD
CPU1_DIMM_PD
CPU1_DIMM_PD
119
120
101
240
239
+3.3V
REPLACE
13,34
52
52
238
32-34
13,34
13,34
13,33
13,33
13,33
13,33
13,33
13,33
X00_DT9812 SCH I2C address lines use pullup/pulldowns
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
33,34
13,33,34
V_MEM_CPU1_DIMM_VREF
CPU1_MEM_MA2_ODT0
CPU1_MEM_MA0_ODT0
CPU1_MEM_MA_CHECK7
CPU1_MEM_MA_CHECK6
CPU1_MEM_MA_CHECK5
CPU1_MEM_MA_CHECK4
CPU1_MEM_MA_CHECK3
CPU1_MEM_MA_CHECK2
CPU1_MEM_MA_CHECK1
CPU1_MEM_MA_CHECK0
CPU1_MEM_MA_DQS_17_DP
CPU1_MEM_MA_DQS_17_DN
CPU1_MEM_MA_DQS_16_DP
CPU1_MEM_MA_DQS_16_DN
CPU1_MEM_MA_DQS_15_DP
CPU1_MEM_MA_DQS_15_DN
CPU1_MEM_MA_DQS_14_DP
CPU1_MEM_MA_DQS_14_DN
CPU1_MEM_MA_DQS_13_DP
CPU1_MEM_MA_DQS_13_DN
CPU1_MEM_MA_DQS_12_DP
CPU1_MEM_MA_DQS_12_DN
CPU1_MEM_MA_DQS_11_DP
CPU1_MEM_MA_DQS_11_DN
CPU1_MEM_MA_DQS_10_DP
CPU1_MEM_MA_DQS_10_DN
CPU1_MEM_MA_DQS_9_DP
CPU1_MEM_MA_DQS_9_DN
CPU1_MEM_MA_DQS_8_DP
CPU1_MEM_MA_DQS_8_DN
CPU1_MEM_MA_DQS_7_DP
CPU1_MEM_MA_DQS_7_DN
CPU1_MEM_MA_DQS_6_DP
CPU1_MEM_MA_DQS_6_DN
CPU1_MEM_MA_DQS_5_DP
CPU1_MEM_MA_DQS_5_DN
CPU1_MEM_MA_DQS_4_DP
CPU1_MEM_MA_DQS_4_DN
CPU1_MEM_MA_DQS_3_DP
CPU1_MEM_MA_DQS_3_DN
CPU1_MEM_MA_DQS_2_DP
CPU1_MEM_MA_DQS_2_DN
CPU1_MEM_MA_DQS_1_DP
CPU1_MEM_MA_DQS_1_DN
CPU1_MEM_MA_DQS_0_DP
CPU1_MEM_MA_DQS_0_DN
CPU1_MEM_MA_ERR_N
CPU1_MEM_MA_PAR
NC_DIMM1_P102
195
168
167
162
161
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
114
113
105
104
102
SUB*_MW921
DQS's don't follow naming convention.
Check that we match the 4DIMM quad rank connection scheme
BA1
71
BA0
54
A16/BA2
A15
A14
A13
A12
57
A11
70
A10/AP
A9
A8
58
A7
A6
60
A5
61
A4
A3
63
A2
A1
A0
76
S1
S0
RAS
74
CAS
73
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
52
CKE0
SDA
SCL
SA2
SA1
SA0
VDDSPD
1
VREF
77
ODT1
ODT0
CB7
CB6
CB5
CB4
49
CB3
48
CB2
43
CB1
42
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
46
DQS8/NC
45
DQS8/NC
DQS7
DQS7
DQS6
DQS6
93
DQS5
92
DQS5
84
DQS4
83
DQS4
37
DQS3
36
DQS3
28
DQS2
27
DQS2
16
DQS1
15
DQS1
7
DQS0
6
DQS0
55
ERR_OUT
68
PAR_IN
TEST
J_DIMM1A
ranked DIMMs
to support quad
additional chip selects
CK2, CK2# are used for
X00_DT9841 SCH added note
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
NC
RESET
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU1_MEM_MA_DATA63
CPU1_MEM_MA_DATA62
CPU1_MEM_MA_DATA61
CPU1_MEM_MA_DATA60
CPU1_MEM_MA_DATA59
CPU1_MEM_MA_DATA58
CPU1_MEM_MA_DATA57
CPU1_MEM_MA_DATA56
CPU1_MEM_MA_DATA55
CPU1_MEM_MA_DATA54
CPU1_MEM_MA_DATA53
CPU1_MEM_MA_DATA52
CPU1_MEM_MA_DATA51
CPU1_MEM_MA_DATA50
CPU1_MEM_MA_DATA49
CPU1_MEM_MA_DATA48
CPU1_MEM_MA_DATA47
CPU1_MEM_MA_DATA46
CPU1_MEM_MA_DATA45
CPU1_MEM_MA_DATA44
CPU1_MEM_MA_DATA43
CPU1_MEM_MA_DATA42
CPU1_MEM_MA_DATA41
CPU1_MEM_MA_DATA40
CPU1_MEM_MA_DATA39
CPU1_MEM_MA_DATA38
CPU1_MEM_MA_DATA37
CPU1_MEM_MA_DATA36
CPU1_MEM_MA_DATA35
CPU1_MEM_MA_DATA34
CPU1_MEM_MA_DATA33
CPU1_MEM_MA_DATA32
CPU1_MEM_MA_DATA31
CPU1_MEM_MA_DATA30
CPU1_MEM_MA_DATA29
CPU1_MEM_MA_DATA28
CPU1_MEM_MA_DATA27
CPU1_MEM_MA_DATA26
CPU1_MEM_MA_DATA25
CPU1_MEM_MA_DATA24
CPU1_MEM_MA_DATA23
CPU1_MEM_MA_DATA22
CPU1_MEM_MA_DATA21
CPU1_MEM_MA_DATA20
CPU1_MEM_MA_DATA19
CPU1_MEM_MA_DATA18
CPU1_MEM_MA_DATA17
CPU1_MEM_MA_DATA16
CPU1_MEM_MA_DATA15
CPU1_MEM_MA_DATA14
CPU1_MEM_MA_DATA13
CPU1_MEM_MA_DATA12
CPU1_MEM_MA_DATA11
CPU1_MEM_MA_DATA10
CPU1_MEM_MA_DATA9
CPU1_MEM_MA_DATA8
CPU1_MEM_MA_DATA7
CPU1_MEM_MA_DATA6
CPU1_MEM_MA_DATA5
CPU1_MEM_MA_DATA4
CPU1_MEM_MA_DATA3
CPU1_MEM_MA_DATA2
CPU1_MEM_MA_DATA1
CPU1_MEM_MA_DATA0
NC_DIMM1_P19
CPU1_MEM_MA_RESET_N
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
13,33
+MEM_CPU1
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,33,34
14,34
14,34
14,33,34
14,33,34
14,33,34
14,34
14,34
14
14
14,34
52
52
+3.3V
REPLACE
32-34
14,34
14,34
14,33
14,33
14,33
14,33
14,33
X00_DT9812 SCH I2C address lines use pullup/pulldowns
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
33,34
14,33,34
CPU1_MEM_MB_BANK1
CPU1_MEM_MB_BANK0
CPU1_MEM_MB_BANK2
CPU1_MEM_MB_ADD15
CPU1_MEM_MB_ADD14
CPU1_MEM_MB_ADD13
CPU1_MEM_MB_ADD12
CPU1_MEM_MB_ADD11
CPU1_MEM_MB_ADD10
CPU1_MEM_MB_ADD9
CPU1_MEM_MB_ADD8
CPU1_MEM_MB_ADD7
CPU1_MEM_MB_ADD6
CPU1_MEM_MB_ADD5
CPU1_MEM_MB_ADD4
CPU1_MEM_MB_ADD3
CPU1_MEM_MB_ADD2
CPU1_MEM_MB_ADD1
CPU1_MEM_MB_ADD0
CPU1_MEM_MB0_CS_L1
CPU1_MEM_MB0_CS_L0
CPU1_MEM_MB_RAS_N
CPU1_MEM_MB_CAS_N
CPU1_MEM_MB_WE_N
CPU1_MEM_MB2_CS_L1
CPU1_MEM_MB2_CS_L0
NC_DIMM2_P138
NC_DIMM2_P137
CK_CPU1_MEM_MB0_DN
CK_CPU1_MEM_MB0_DP
CPU1_MEM_MB_CKE0
I2C_P1_DIMM2_SDA
I2C_P1_DIMM2_SCL
32,33
32,33
CPU1_DIMM_PD
CPU1_DIMM_PD
CPU1_DIMM_PU
33
V_MEM_CPU1_DIMM_VREF
CPU1_MEM_MB2_ODT0
CPU1_MEM_MB0_ODT0
CPU1_MEM_MB_CHECK7
CPU1_MEM_MB_CHECK6
CPU1_MEM_MB_CHECK5
CPU1_MEM_MB_CHECK4
CPU1_MEM_MB_CHECK3
CPU1_MEM_MB_CHECK2
CPU1_MEM_MB_CHECK1
CPU1_MEM_MB_CHECK0
CPU1_MEM_MB_DQS_17_DP
CPU1_MEM_MB_DQS_17_DN
CPU1_MEM_MB_DQS_16_DP
CPU1_MEM_MB_DQS_16_DN
CPU1_MEM_MB_DQS_15_DP
CPU1_MEM_MB_DQS_15_DN
CPU1_MEM_MB_DQS_14_DP
CPU1_MEM_MB_DQS_14_DN
CPU1_MEM_MB_DQS_13_DP
CPU1_MEM_MB_DQS_13_DN
CPU1_MEM_MB_DQS_12_DP
CPU1_MEM_MB_DQS_12_DN
CPU1_MEM_MB_DQS_11_DP
CPU1_MEM_MB_DQS_11_DN
CPU1_MEM_MB_DQS_10_DP
CPU1_MEM_MB_DQS_10_DN
CPU1_MEM_MB_DQS_9_DP
CPU1_MEM_MB_DQS_9_DN
CPU1_MEM_MB_DQS_8_DP
CPU1_MEM_MB_DQS_8_DN
CPU1_MEM_MB_DQS_7_DP
CPU1_MEM_MB_DQS_7_DN
CPU1_MEM_MB_DQS_6_DP
CPU1_MEM_MB_DQS_6_DN
CPU1_MEM_MB_DQS_5_DP
CPU1_MEM_MB_DQS_5_DN
CPU1_MEM_MB_DQS_4_DP
CPU1_MEM_MB_DQS_4_DN
CPU1_MEM_MB_DQS_3_DP
CPU1_MEM_MB_DQS_3_DN
CPU1_MEM_MB_DQS_2_DP
CPU1_MEM_MB_DQS_2_DN
CPU1_MEM_MB_DQS_1_DP
CPU1_MEM_MB_DQS_1_DN
CPU1_MEM_MB_DQS_0_DP
CPU1_MEM_MB_DQS_0_DN
CPU1_MEM_MB_ERR_N
CPU1_MEM_MB_PAR
NC_DIMM2_P102
190
71
54
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
76
193
192
74
73
221
220
138
137
186
185
171
52
119
120
101
240
239
238
1
77
195
168
167
162
161
49
48
43
42
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6
55
68
102
240 PIN DDR II DIMM
SUB*_MW921
I2C ID = A0 I2C ID = A2
CPU1 DIMMS 1A & 1B
ROOM = CPU1DIMM
BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
J_DIMM1B
A4
A3
A2
A1
A0
S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
ranked DIMMs
to support quad
additional chip selects
CKE1
CK2, CK2# are used for
CKE0
SDA
X00_DT9841 SCH added note
SCL
SA2
SA1
SA0
VDDSPD
VREF
ODT1
ODT0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
DQS0
DQS0
ERR_OUT
PAR_IN
TEST
240 PIN DDR II DIMM
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
NC
RESET
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU1_MEM_MB_DATA63
CPU1_MEM_MB_DATA62
CPU1_MEM_MB_DATA61
CPU1_MEM_MB_DATA60
CPU1_MEM_MB_DATA59
CPU1_MEM_MB_DATA58
CPU1_MEM_MB_DATA57
CPU1_MEM_MB_DATA56
CPU1_MEM_MB_DATA55
CPU1_MEM_MB_DATA54
CPU1_MEM_MB_DATA53
CPU1_MEM_MB_DATA52
CPU1_MEM_MB_DATA51
CPU1_MEM_MB_DATA50
CPU1_MEM_MB_DATA49
CPU1_MEM_MB_DATA48
CPU1_MEM_MB_DATA47
CPU1_MEM_MB_DATA46
CPU1_MEM_MB_DATA45
CPU1_MEM_MB_DATA44
CPU1_MEM_MB_DATA43
CPU1_MEM_MB_DATA42
CPU1_MEM_MB_DATA41
CPU1_MEM_MB_DATA40
CPU1_MEM_MB_DATA39
CPU1_MEM_MB_DATA38
CPU1_MEM_MB_DATA37
CPU1_MEM_MB_DATA36
CPU1_MEM_MB_DATA35
CPU1_MEM_MB_DATA34
CPU1_MEM_MB_DATA33
CPU1_MEM_MB_DATA32
CPU1_MEM_MB_DATA31
CPU1_MEM_MB_DATA30
CPU1_MEM_MB_DATA29
CPU1_MEM_MB_DATA28
CPU1_MEM_MB_DATA27
CPU1_MEM_MB_DATA26
CPU1_MEM_MB_DATA25
CPU1_MEM_MB_DATA24
CPU1_MEM_MB_DATA23
CPU1_MEM_MB_DATA22
CPU1_MEM_MB_DATA21
CPU1_MEM_MB_DATA20
CPU1_MEM_MB_DATA19
CPU1_MEM_MB_DATA18
CPU1_MEM_MB_DATA17
CPU1_MEM_MB_DATA16
CPU1_MEM_MB_DATA15
CPU1_MEM_MB_DATA14
CPU1_MEM_MB_DATA13
CPU1_MEM_MB_DATA12
CPU1_MEM_MB_DATA11
CPU1_MEM_MB_DATA10
CPU1_MEM_MB_DATA9
CPU1_MEM_MB_DATA8
CPU1_MEM_MB_DATA7
CPU1_MEM_MB_DATA6
CPU1_MEM_MB_DATA5
CPU1_MEM_MB_DATA4
CPU1_MEM_MB_DATA3
CPU1_MEM_MB_DATA2
CPU1_MEM_MB_DATA1
CPU1_MEM_MB_DATA0
NC_DIMM2_P19
CPU1_MEM_MB_RESET_N
PROPRIETARY NOTE
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
14,33
+MEM_CPU1
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
X01
SHEET
10/20/2006 32 OF 144
1
2
3
4
C
DBA
Page 33
A B C
D
1
2
3
4
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,32,34
13,34
13,34
13,32,34
13,32,34
13,32,34
13,34
13,34
13
13
13,34
52
52
+3.3V
REPLACE
32-34
13,34
13,34
13,32
13,32
13,32
13,32
13,32
X00_DT9812 SCH I2C address lines use pullup/pulldowns
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
32,34
13,32,34
CPU1_MEM_MA_BANK1
CPU1_MEM_MA_BANK0
CPU1_MEM_MA_BANK2
CPU1_MEM_MA_ADD15
CPU1_MEM_MA_ADD14
CPU1_MEM_MA_ADD13
CPU1_MEM_MA_ADD12
CPU1_MEM_MA_ADD11
CPU1_MEM_MA_ADD10
CPU1_MEM_MA_ADD9
CPU1_MEM_MA_ADD8
CPU1_MEM_MA_ADD7
CPU1_MEM_MA_ADD6
CPU1_MEM_MA_ADD5
CPU1_MEM_MA_ADD4
CPU1_MEM_MA_ADD3
CPU1_MEM_MA_ADD2
CPU1_MEM_MA_ADD1
CPU1_MEM_MA_ADD0
CPU1_MEM_MA1_CS_L1
CPU1_MEM_MA1_CS_L0
CPU1_MEM_MA_RAS_N
CPU1_MEM_MA_CAS_N
CPU1_MEM_MA_WE_N
CPU1_MEM_MA3_CS_L1
CPU1_MEM_MA3_CS_L0
NC_DIMM3_P138
NC_DIMM3_P137
CK_CPU1_MEM_MA1_DN
CK_CPU1_MEM_MA1_DP
CPU1_MEM_MA_CKE1
I2C_P1_DIMM3_SDA
I2C_P1_DIMM3_SCL
32,33
32,33
32,33
CPU1_DIMM_PD
CPU1_DIMM_PU
CPU1_DIMM_PD
V_MEM_CPU1_DIMM_VREF
CPU1_MEM_MA3_ODT0
CPU1_MEM_MA1_ODT0
CPU1_MEM_MA_CHECK7
CPU1_MEM_MA_CHECK6
CPU1_MEM_MA_CHECK5
CPU1_MEM_MA_CHECK4
CPU1_MEM_MA_CHECK3
CPU1_MEM_MA_CHECK2
CPU1_MEM_MA_CHECK1
CPU1_MEM_MA_CHECK0
CPU1_MEM_MA_DQS_17_DP
CPU1_MEM_MA_DQS_17_DN
CPU1_MEM_MA_DQS_16_DP
CPU1_MEM_MA_DQS_16_DN
CPU1_MEM_MA_DQS_15_DP
CPU1_MEM_MA_DQS_15_DN
CPU1_MEM_MA_DQS_14_DP
CPU1_MEM_MA_DQS_14_DN
CPU1_MEM_MA_DQS_13_DP
CPU1_MEM_MA_DQS_13_DN
CPU1_MEM_MA_DQS_12_DP
CPU1_MEM_MA_DQS_12_DN
CPU1_MEM_MA_DQS_11_DP
CPU1_MEM_MA_DQS_11_DN
CPU1_MEM_MA_DQS_10_DP
CPU1_MEM_MA_DQS_10_DN
CPU1_MEM_MA_DQS_9_DP
CPU1_MEM_MA_DQS_9_DN
CPU1_MEM_MA_DQS_8_DP
CPU1_MEM_MA_DQS_8_DN
CPU1_MEM_MA_DQS_7_DP
CPU1_MEM_MA_DQS_7_DN
CPU1_MEM_MA_DQS_6_DP
CPU1_MEM_MA_DQS_6_DN
CPU1_MEM_MA_DQS_5_DP
CPU1_MEM_MA_DQS_5_DN
CPU1_MEM_MA_DQS_4_DP
CPU1_MEM_MA_DQS_4_DN
CPU1_MEM_MA_DQS_3_DP
CPU1_MEM_MA_DQS_3_DN
CPU1_MEM_MA_DQS_2_DP
CPU1_MEM_MA_DQS_2_DN
CPU1_MEM_MA_DQS_1_DP
CPU1_MEM_MA_DQS_1_DN
CPU1_MEM_MA_DQS_0_DP
CPU1_MEM_MA_DQS_0_DN
CPU1_MEM_MA_ERR_N
CPU1_MEM_MA_PAR
SUB*_TM615
190
71
54
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
76
193
192
74
73
221
220
138
137
186
185
171
52
119
120
101
240
239
238
77
195
168
167
162
161
49
48
43
42
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
55
68
102
BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
CKE0
SDA
SCL
SA2
SA1
SA0
VDDSPD
1
VREF
ODT1
ODT0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
7
DQS0
6
DQS0
ERR_OUT
PAR_IN
TEST
240 PIN DDR II DIMM
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
J_DIMM2A
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
ranked DIMMs
to support quad
additional chip selects
CK2, CK2# are used for
DQ33
DQ32
DQ31
DQ30
X00_DT9841 SCH added note
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
NC
RESET
I2C ID = A4
same issues as on page 32
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU1_MEM_MA_RESET_N
CPU1_MEM_MA_DATA63
CPU1_MEM_MA_DATA62
CPU1_MEM_MA_DATA61
CPU1_MEM_MA_DATA60
CPU1_MEM_MA_DATA59
CPU1_MEM_MA_DATA58
CPU1_MEM_MA_DATA57
CPU1_MEM_MA_DATA56
CPU1_MEM_MA_DATA55
CPU1_MEM_MA_DATA54
CPU1_MEM_MA_DATA53
CPU1_MEM_MA_DATA52
CPU1_MEM_MA_DATA51
CPU1_MEM_MA_DATA50
CPU1_MEM_MA_DATA49
CPU1_MEM_MA_DATA48
CPU1_MEM_MA_DATA47
CPU1_MEM_MA_DATA46
CPU1_MEM_MA_DATA45
CPU1_MEM_MA_DATA44
CPU1_MEM_MA_DATA43
CPU1_MEM_MA_DATA42
CPU1_MEM_MA_DATA41
CPU1_MEM_MA_DATA40
CPU1_MEM_MA_DATA39
CPU1_MEM_MA_DATA38
CPU1_MEM_MA_DATA37
CPU1_MEM_MA_DATA36
CPU1_MEM_MA_DATA35
CPU1_MEM_MA_DATA34
CPU1_MEM_MA_DATA33
CPU1_MEM_MA_DATA32
CPU1_MEM_MA_DATA31
CPU1_MEM_MA_DATA30
CPU1_MEM_MA_DATA29
CPU1_MEM_MA_DATA28
CPU1_MEM_MA_DATA27
CPU1_MEM_MA_DATA26
CPU1_MEM_MA_DATA25
CPU1_MEM_MA_DATA24
CPU1_MEM_MA_DATA23
CPU1_MEM_MA_DATA22
CPU1_MEM_MA_DATA21
CPU1_MEM_MA_DATA20
CPU1_MEM_MA_DATA19
CPU1_MEM_MA_DATA18
CPU1_MEM_MA_DATA17
CPU1_MEM_MA_DATA16
CPU1_MEM_MA_DATA15
CPU1_MEM_MA_DATA14
CPU1_MEM_MA_DATA13
CPU1_MEM_MA_DATA12
CPU1_MEM_MA_DATA11
CPU1_MEM_MA_DATA10
CPU1_MEM_MA_DATA9
CPU1_MEM_MA_DATA8
CPU1_MEM_MA_DATA7
CPU1_MEM_MA_DATA6
CPU1_MEM_MA_DATA5
CPU1_MEM_MA_DATA4
CPU1_MEM_MA_DATA3
CPU1_MEM_MA_DATA2
CPU1_MEM_MA_DATA1
CPU1_MEM_MA_DATA0
NC_DIMM3_P19
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
13,32
X00_DT9812 SCH I2C address lines use pullup/pulldowns
+MEM_CPU1
CPU1 DIMMS 2A & 2B
+3.3V
REPLACE
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,32,34
14,34
14,34
14,32,34
14,32,34
14,32,34
14,34
14,34
14
14
14,34
52
52
32-34
14,34
14,34
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
32,34
14,32,34
CPU1_MEM_MB_BANK1
CPU1_MEM_MB_BANK0
CPU1_MEM_MB_BANK2
CPU1_MEM_MB_ADD15
CPU1_MEM_MB_ADD14
CPU1_MEM_MB_ADD13
CPU1_MEM_MB_ADD12
CPU1_MEM_MB_ADD11
CPU1_MEM_MB_ADD10
CPU1_MEM_MB_ADD9
CPU1_MEM_MB_ADD8
CPU1_MEM_MB_ADD7
CPU1_MEM_MB_ADD6
CPU1_MEM_MB_ADD5
CPU1_MEM_MB_ADD4
CPU1_MEM_MB_ADD3
CPU1_MEM_MB_ADD2
CPU1_MEM_MB_ADD1
CPU1_MEM_MB_ADD0
CPU1_MEM_MB1_CS_L1
CPU1_MEM_MB1_CS_L0
CPU1_MEM_MB_RAS_N
CPU1_MEM_MB_CAS_N
CPU1_MEM_MB_WE_N
CPU1_MEM_MB3_CS_L1
CPU1_MEM_MB3_CS_L0
NC_DIMM4_P138
NC_DIMM4_P137
CK_CPU1_MEM_MB1_DN
CK_CPU1_MEM_MB1_DP
CPU1_MEM_MB_CKE1
I2C_P1_DIMM4_SDA
I2C_P1_DIMM4_SCL
32,33
32,33
32,33
CPU1_DIMM_PD
CPU1_DIMM_PU
CPU1_DIMM_PU
V_MEM_CPU1_DIMM_VREF
CPU1_MEM_MB3_ODT0
CPU1_MEM_MB1_ODT0
CPU1_MEM_MB_CHECK7
CPU1_MEM_MB_CHECK6
CPU1_MEM_MB_CHECK5
CPU1_MEM_MB_CHECK4
CPU1_MEM_MB_CHECK3
CPU1_MEM_MB_CHECK2
CPU1_MEM_MB_CHECK1
CPU1_MEM_MB_CHECK0
CPU1_MEM_MB_DQS_17_DP
CPU1_MEM_MB_DQS_17_DN
CPU1_MEM_MB_DQS_16_DP
CPU1_MEM_MB_DQS_16_DN
CPU1_MEM_MB_DQS_15_DP
CPU1_MEM_MB_DQS_15_DN
CPU1_MEM_MB_DQS_14_DP
CPU1_MEM_MB_DQS_14_DN
CPU1_MEM_MB_DQS_13_DP
CPU1_MEM_MB_DQS_13_DN
CPU1_MEM_MB_DQS_12_DP
CPU1_MEM_MB_DQS_12_DN
CPU1_MEM_MB_DQS_11_DP
CPU1_MEM_MB_DQS_11_DN
CPU1_MEM_MB_DQS_10_DP
CPU1_MEM_MB_DQS_10_DN
CPU1_MEM_MB_DQS_9_DP
CPU1_MEM_MB_DQS_9_DN
CPU1_MEM_MB_DQS_8_DP
CPU1_MEM_MB_DQS_8_DN
CPU1_MEM_MB_DQS_7_DP
CPU1_MEM_MB_DQS_7_DN
CPU1_MEM_MB_DQS_6_DP
CPU1_MEM_MB_DQS_6_DN
CPU1_MEM_MB_DQS_5_DP
CPU1_MEM_MB_DQS_5_DN
CPU1_MEM_MB_DQS_4_DP
CPU1_MEM_MB_DQS_4_DN
CPU1_MEM_MB_DQS_3_DP
CPU1_MEM_MB_DQS_3_DN
CPU1_MEM_MB_DQS_2_DP
CPU1_MEM_MB_DQS_2_DN
CPU1_MEM_MB_DQS_1_DP
CPU1_MEM_MB_DQS_1_DN
CPU1_MEM_MB_DQS_0_DP
CPU1_MEM_MB_DQS_0_DN
CPU1_MEM_MB_ERR_N
CPU1_MEM_MB_PAR
NC_DIMM4_P102NC_DIMM3_P102
ROOM = CPU1DIMM
190
173
174
196
176
177
179
180
182
183
188
193
192
221
220
138
137
186
185
171
119
120
101
240
239
238
195
168
167
162
161
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
114
113
105
104
102
SUB*_TM615
BA1
71
BA0
54
A16/BA2
A15
A14
A13
A12
57
A11
70
A10/AP
A9
A8
58
A7
A6
60
A5
61
A4
A3
63
A2
A1
A0
76
S1
S0
RAS
74
CAS
73
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
52
CKE0
SDA
SCL
SA2
SA1
SA0
VDDSPD
1
VREF
77
ODT1
ODT0
CB7
CB6
CB5
CB4
49
CB3
48
CB2
43
CB1
42
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
46
DQS8/NC
45
DQS8/NC
DQS7
DQS7
DQS6
DQS6
93
DQS5
92
DQS5
84
DQS4
83
DQS4
37
DQS3
36
DQS3
28
DQS2
27
DQS2
16
DQS1
15
DQS1
7
DQS0
6
DQS0
55
ERR_OUT
68
PAR_IN
TEST
I2C ID = A6
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
J_DIMM2B
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
ranked DIMMs
to support quad
additional chip selects
CK2, CK2# are used for
DQ33
DQ32
DQ31
DQ30
X00_DT9841 SCH added note
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
RESET
240 PIN DDR II DIMM
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
NC
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU1_MEM_MB_DATA63
CPU1_MEM_MB_DATA62
CPU1_MEM_MB_DATA61
CPU1_MEM_MB_DATA60
CPU1_MEM_MB_DATA59
CPU1_MEM_MB_DATA58
CPU1_MEM_MB_DATA57
CPU1_MEM_MB_DATA56
CPU1_MEM_MB_DATA55
CPU1_MEM_MB_DATA54
CPU1_MEM_MB_DATA53
CPU1_MEM_MB_DATA52
CPU1_MEM_MB_DATA51
CPU1_MEM_MB_DATA50
CPU1_MEM_MB_DATA49
CPU1_MEM_MB_DATA48
CPU1_MEM_MB_DATA47
CPU1_MEM_MB_DATA46
CPU1_MEM_MB_DATA45
CPU1_MEM_MB_DATA44
CPU1_MEM_MB_DATA43
CPU1_MEM_MB_DATA42
CPU1_MEM_MB_DATA41
CPU1_MEM_MB_DATA40
CPU1_MEM_MB_DATA39
CPU1_MEM_MB_DATA38
CPU1_MEM_MB_DATA37
CPU1_MEM_MB_DATA36
CPU1_MEM_MB_DATA35
CPU1_MEM_MB_DATA34
CPU1_MEM_MB_DATA33
CPU1_MEM_MB_DATA32
CPU1_MEM_MB_DATA31
CPU1_MEM_MB_DATA30
CPU1_MEM_MB_DATA29
CPU1_MEM_MB_DATA28
CPU1_MEM_MB_DATA27
CPU1_MEM_MB_DATA26
CPU1_MEM_MB_DATA25
CPU1_MEM_MB_DATA24
CPU1_MEM_MB_DATA23
CPU1_MEM_MB_DATA22
CPU1_MEM_MB_DATA21
CPU1_MEM_MB_DATA20
CPU1_MEM_MB_DATA19
CPU1_MEM_MB_DATA18
CPU1_MEM_MB_DATA17
CPU1_MEM_MB_DATA16
CPU1_MEM_MB_DATA15
CPU1_MEM_MB_DATA14
CPU1_MEM_MB_DATA13
CPU1_MEM_MB_DATA12
CPU1_MEM_MB_DATA11
CPU1_MEM_MB_DATA10
CPU1_MEM_MB_DATA9
CPU1_MEM_MB_DATA8
CPU1_MEM_MB_DATA7
CPU1_MEM_MB_DATA6
CPU1_MEM_MB_DATA5
CPU1_MEM_MB_DATA4
CPU1_MEM_MB_DATA3
CPU1_MEM_MB_DATA2
CPU1_MEM_MB_DATA1
CPU1_MEM_MB_DATA0
NC_DIMM4_P19
CPU1_MEM_MB_RESET_N
PROPRIETARY NOTE
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
14,32
+MEM_CPU1
X00_DT9812 SCH I2C address lines use pullup/pulldowns
+3.3V
REPLACE
R9771
1 2
220-5%
R9772
1 2
220-5%
14,32
TITLE
SCHEM,PLN,SV,PE_BULN
DWG NO.
FP975
DATE
CPU1_DIMM_PU
CPU1_DIMM_PD
INC.
ROUND ROCK,TEXAS
1
2
3
32,33
32,33
4
REV.
X01
SHEET
33 OF 14410/20/2006
C
DBA
Page 34
A B C
D
1
2
3
13,32-34
13,33,34
13,32,34
13,32-34
13,33,34
13,32-34
13,32-34
13,32-34
13,32-34
13,32-34
13,32,34
13,32-34
13,33,34
13,32-34
13,32-34
13,32-34
13,32-34
13,32-34
13,32-34
13,32-34
13,32-34
13,32-34
13,32,34
13,33,34
14,32,34
14,32-34
14,32,34
14,33,34
13,32,34
13,32-34
13,32-34
13,32-34
13,32-34
13,32-34
13,33,34
13,32,34
14,32,34
14,33,34
14,33,34
14,32-34
14,32-34
CPU1_MEM_MA1_CS_L1
CPU1_MEM_MA0_CS_L1
CPU1_MEM_MA_ADD13
CPU1_MEM_MA1_ODT0
CPU1_MEM_MA_ADD6
CPU1_MEM_MA_ADD5
CPU1_MEM_MA_ADD8
CPU1_MEM_MA_ADD7
CPU1_MEM_MA_CAS_N
CPU1_MEM_MA0_ODT0
CPU1_MEM_MA_WE_N
CPU1_MEM_MA1_CS_L0
CPU1_MEM_MA_ADD11
CPU1_MEM_MA_ADD9
CPU1_MEM_MA_ADD12
CPU1_MEM_MA_BANK2
CPU1_MEM_MA_BANK0
CPU1_MEM_MA_BANK1
CPU1_MEM_MA_PAR
CPU1_MEM_MA_ADD0
CPU1_MEM_MA_ADD14
CPU1_MEM_MA_ADD15
CPU1_MEM_MA_CKE0
CPU1_MEM_MA_CKE1
CPU1_MEM_MB0_ODT0
CPU1_MEM_MB_ADD13
CPU1_MEM_MB0_CS_L1
CPU1_MEM_MB1_CS_L1
CPU1_MEM_MA0_CS_L0
CPU1_MEM_MA_RAS_N
13,32-34
CPU1_MEM_MA_ADD2
CPU1_MEM_MA_ADD1
CPU1_MEM_MA_ADD3
CPU1_MEM_MA_ADD4
CPU1_MEM_MA3_ODT0
CPU1_MEM_MA2_ODT0
CPU1_MEM_MB2_ODT0
CPU1_MEM_MB3_ODT0
CPU1_MEM_MB1_CS_L0
CPU1_MEM_MB_RAS_N
CPU1_MEM_MB_BANK0
CPU1_MEM_MA_ADD10
R9674
1 2
R9675
1 2
10-1%
1 2
10-1%
R9670
1 2
R9671
1 2
10-1%
1 2
10-1%
R9666
1 2
R9667
1 2
10-1%
1 2
10-1%
R9662
1 2
R9663
1 2
10-1%
1 2
10-1%
R9658
1 2
R9659
1 2
10-1%
1 2
10-1%
R9654
1 2
R9655
1 2
10-1%
1 2
10-1%
R9650
1 2
R9651
1 2
10-1%
1 2
10-1%
R9647
1 2
1 2
10-1%
R9643
1 2
R9644
1 2
10-1%
1 2
10-1%
R9639
1 2
R9640
1 2
10-1%
1 2
10-1%
R9635
1 2
R9636
1 2
10-1%
1 2
10-1%
R9672
R9673
1 2
10-1%
10-1%
R9668
R9669
1 2
10-1%
10-1%
R9664
R9665
1 2
10-1%
10-1%
R9660
R9661
1 2
10-1%
10-1%
R9656
R9657
1 2
10-1%
10-1%
R9652
R9653
1 2
10-1%
10-1%
R9648
R9649
1 2
10-1%
10-1%
R9645
R9646
1 2
10-1%
10-1%
R9641
R9642
1 2
10-1%
10-1%
R9637
R9638
1 2
10-1%
10-1%
R9634
10-1%
C9646
1 2
C9644
1 2
15pF
50V-5%
15pF
50V-5%
C9650
1 2
C9648
1 2
15pF
50V-5%
15pF
50V-5%
C9654
1 2
C9652
1 2
15pF
50V-5%
15pF
50V-5%
C9658
1 2
C9656
1 2
15pF
50V-5%
15pF
50V-5%
C9662
1 2
C9660
1 2
15pF
50V-5%
15pF
50V-5%
C9666
1 2
C9664
1 2
15pF
50V-5%
15pF
50V-5%
C9670
1 2
C9668
1 2
15pF
50V-5%
15pF
50V-5%
C9672
1 2
15pF
50V-5%
C9677
1 2
C9675
1 2
15pF
50V-5%
15pF
50V-5%
C9681
1 2
C9679
1 2
15pF
50V-5%
15pF
50V-5%
C9684
1 2
C9683
1 2
15pF
50V-5%
15pF
50V-5%
C9647
1 2
C9645
1 2
15pF
50V-5%
15pF
50V-5%
C9651
1 2
C9649
1 2
15pF
50V-5%
15pF
50V-5%
C9655
1 2
C9653
1 2
15pF
50V-5%
15pF
50V-5%
C9659
1 2
C9657
1 2
15pF
50V-5%
15pF
50V-5%
C9663
1 2
C9661
1 2
15pF
50V-5%
15pF
50V-5%
C9667
1 2
C9665
1 2
15pF
50V-5%
15pF
50V-5%
C9671
1 2
C9669
1 2
15pF
50V-5%
15pF
50V-5%
C9674
1 2
C9673
1 2
15pF
50V-5%
15pF
50V-5%
C9678
1 2
C9676
1 2
15pF
50V-5%
15pF
50V-5%
C9682
1 2
C9680
1 2
15pF
50V-5%
15pF
50V-5%
C9685
1 2
15pF
50V-5%
+MEM_CPU1
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,33,34
14,32,34
14,32-34
14,32-34
13,32,34
13,32,34
13,33,34
13,33,34
14,32,34
14,32,34
14,33,34
14,33,34
CPU1_MEM_MB_ADD0
CPU1_MEM_MB_PAR
CPU1_MEM_MB_BANK1
CPU1_MEM_MB_ADD10
CPU1_MEM_MB_ADD4
CPU1_MEM_MB_ADD3
CPU1_MEM_MB_ADD1
CPU1_MEM_MB_ADD2
CPU1_MEM_MB_ADD7
CPU1_MEM_MB_ADD8
CPU1_MEM_MB_ADD6
CPU1_MEM_MB_ADD5
CPU1_MEM_MB_BANK2
CPU1_MEM_MB_ADD12
CPU1_MEM_MB_ADD9
CPU1_MEM_MB_ADD11
CPU1_MEM_MB_CKE1
CPU1_MEM_MB_CKE0
CPU1_MEM_MB_ADD15
CPU1_MEM_MB_ADD14
CPU1_MEM_MA2_CS_L0
CPU1_MEM_MA2_CS_L1
CPU1_MEM_MA3_CS_L0
CPU1_MEM_MA3_CS_L1
CPU1_MEM_MB2_CS_L0
CPU1_MEM_MB2_CS_L1
CPU1_MEM_MB3_CS_L0
CPU1_MEM_MB3_CS_L1
+MEM_CPU1
R8721
1 2
R8722
1 2
C8742
C8746
49.9-1% 49.9-1%
21
.1uF
21
0.33uF 16V
1 2
1 2
1 2
1 2
1 2
1 2
1 2
16V-10%
20%
R9628
R9629
1 2
10-1%
1 2
10-1%
R9624
R9625
1 2
10-1%
1 2
10-1%
R9620
R9621
1 2
10-1%
1 2
10-1%
R9616
R9617
1 2
10-1%
1 2
10-1%
R9612
R9613
1 2
10-1%
1 2
10-1%
R9608
R9609
1 2
10-1%
1 2
10-1%
R9604
R9605
1 2
10-1%
1 2
10-1%
C8743
1 2
R9626
R9627
1 2
10-1%
10-1%
R9622
R9623
1 2
10-1%
10-1%
R9618
R9619
1 2
10-1%
10-1%
R9614
R9615
1 2
10-1%
10-1%
R9610
R9611
1 2
10-1%
10-1%
R9606
R9607
1 2
10-1%
10-1%
R9602
R9603
1 2
10-1%
10-1%
1000pF
50V-10%
C8744
1 2
1000pF
50V-10%
C9642
1 2
C9640
C9643
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
50V-5%
C9641
1 2
15pF
50V-5%
C9638
1 2
C9636
C9639
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
50V-5%
C9637
1 2
15pF
50V-5%
C9634
1 2
C9632
C9635
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
50V-5%
C9633
1 2
15pF
50V-5%
C9630
1 2
C9628
C9631
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
50V-5%
C9629
1 2
15pF
50V-5%
C9626
1 2
C9624
C9627
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
50V-5%
C9625
1 2
15pF
50V-5%
C9622
1 2
C9620
C9623
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
50V-5%
C9621
1 2
15pF
50V-5%
C9618
1 2
C9616
C9619
1 2
15pF
50V-5%
50V-5%
15pF
50V-5%
C9617
1 2
1 2
15pF
15pF
50V-5%
V_MEM_CPU1_DIMM_VREF
21
C8745
0.01uF
50V-10%
+MEM_CPU1
21
C8741
.1uF
16V-10%
32,33
14,33,34
14,32,34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,32-34
14,33,34
14,32,34
14,32-34
14,32-34
14,33,34
14,32,34
14,32,34
14,32-34
14,33,34
13,32-34
14,33,34
14,32,34
13,32,34
13,33,34
13,33,34
13,32,34
13,33,34
13,32,34
32-34
14,32-34
14,32-34
14,32-34
CPU1_MEM_MB_CKE1
CPU1_MEM_MB_CKE0
CPU1_MEM_MB_ADD15
CPU1_MEM_MB_ADD14
CPU1_MEM_MB_ADD7
CPU1_MEM_MB_ADD8
CPU1_MEM_MB_ADD6
CPU1_MEM_MB_ADD5
CPU1_MEM_MB_ADD4
CPU1_MEM_MB_ADD3
CPU1_MEM_MB_ADD1
CPU1_MEM_MB_ADD2
CPU1_MEM_MB_ADD0
CPU1_MEM_MB_PAR
CPU1_MEM_MB_BANK1
CPU1_MEM_MB_ADD10
CPU1_MEM_MB_BANK0
CPU1_MEM_MB_RAS_N
CPU1_MEM_MB1_CS_L0
CPU1_MEM_MB0_CS_L0
CPU1_MEM_MB_WE_N
CPU1_MEM_MB_CAS_N
CPU1_MEM_MB1_ODT0
CPU1_MEM_MB0_ODT0
CPU1_MEM_MB0_CS_L1
CPU1_MEM_MB_ADD13
CPU1_MEM_MB1_CS_L1
CPU1_MEM_MA_ADD13
CPU1_MEM_MB3_ODT0
CPU1_MEM_MB2_ODT0
CPU1_MEM_MA2_ODT0
CPU1_MEM_MA3_ODT0
CPU1_MEM_MA3_CS_L0
CPU1_MEM_MA2_CS_L1
CPU1_MEM_MA3_CS_L1
CPU1_MEM_MA2_CS_L0
CPU1_MEM_MB_ERR_N
CPU1_MEM_MB_ADD12
CPU1_MEM_MB_ADD9
CPU1_MEM_MB_ADD11
+VTT_CPU1
RN138
1
2
3
4
47-5%
8
7
6
5
13,33,34
13,32,34
13,32-34
13,32-34
CPU1_MEM_MA_CKE1
CPU1_MEM_MA_CKE0
CPU1_MEM_MA_ADD15
CPU1_MEM_MA_ADD14
RN155
1
2
3
4
47-5%
+VTT_CPU1
8
7
6
5
1
RN139
1
2
3
4
47-5%
8
7
6
5
13,32-34
13,32-34
13,32-34
13,32-34
CPU1_MEM_MA_ADD7
CPU1_MEM_MA_ADD8
CPU1_MEM_MA_ADD6
CPU1_MEM_MA_ADD5
RN141
1
2
3
4
47-5%
8
7
6
5
13,32-34
13,32-34
13,32-34
13,32-34
CPU1_MEM_MA_ADD4
CPU1_MEM_MA_ADD3
CPU1_MEM_MA_ADD1
CPU1_MEM_MA_ADD2
RN140
1
2
3
4
47-5%
8
7
6
5
13,32-34
13,32-34
13,32-34
13,32-34
CPU1_MEM_MA_ADD0
CPU1_MEM_MA_PAR
CPU1_MEM_MA_BANK1
CPU1_MEM_MA_ADD10
RN143
1
2
3
4
47-5%
8
7
6
5
13,32-34
13,32-34
13,33,34
13,32,34
CPU1_MEM_MA_BANK0
CPU1_MEM_MA_RAS_N
CPU1_MEM_MA1_CS_L0
CPU1_MEM_MA0_CS_L0
RN142
1
2
3
4
47-5%
8
7
6
5
13,32-34
13,32,34
13,32-34
13,33,34
13,33,34
CPU1_MEM_MA_WE_N
CPU1_MEM_MA0_ODT0
CPU1_MEM_MA_CAS_N
CPU1_MEM_MA1_ODT0
CPU1_MEM_MA1_CS_L1
RN147
1
2
3
4
47-5%
RN146
1
2
3
4
47-5%
8
7
13,32,34
CPU1_MEM_MA0_CS_L1
6
5
14,32,34
14,32,34
14,33,34
8
14,33,34
CPU1_MEM_MB2_CS_L0
CPU1_MEM_MB2_CS_L1
CPU1_MEM_MB3_CS_L0
CPU1_MEM_MB3_CS_L1
7
6
5
13,32-34
14,32-34
CPU1_MEM_MA_BANK2
CPU1_MEM_MB_BANK2
RN145
1
2
3
4
47-5%
8
7
6
5
+MEM_CPU1
32-34
13,32-34
13,32-34
13,32-34
CPU1_MEM_MA_ERR_N
CPU1_MEM_MA_ADD12
CPU1_MEM_MA_ADD9
CPU1_MEM_MA_ADD11
RN144
1
2
3
4
47-5%
8
7
6
5
R8586
CPU1_MEM_MA_ERR_R_N
13
1 2
CPU1_MEM_MA_ERR_N
22-5%
R8587
CPU1_MEM_MB_ERR_R_N
14
1 2
CPU1_MEM_MB_ERR_N
22-5%
RN154
1
2
3
4
47-5%
RN153
1
2
3
4
47-5%
RN152
1
2
3
4
47-5%
RN151
1
2
3
4
47-5%
RN150
1
2
3
4
47-5%
R8727
1 2
47-5%
R8726
1 2
47-5%
RN149
1
2
3
4
47-5%
R8724
1 2
47-5%
R8725
1 2
47-5%
1
2
3
4
RN148
47-5%
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
2
8
7
6
5
8
7
6
5
+MEM_CPU1
8
7
6
5
32-34
32-34
3
4
14,32,34
14,32-34
14,32-34
14,33,34
CPU1_MEM_MB0_CS_L0
CPU1_MEM_MB_WE_N
CPU1_MEM_MB_CAS_N
CPU1_MEM_MB1_ODT0
R9632
1 2
R9633
1 2
10-1%
1 2
10-1%
R9630
R9631
1 2
10-1%
10-1%
C9688
1 2
C9686
1 2
15pF
50V-5%
15pF
50V-5%
C9689
1 2
C9687
1 2
15pF
50V-5%
15pF
50V-5%
CPU1 DIMMS TERMINATION
ROOM = CPU1DIMM
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
X00_DT10369 SCH name fix
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DBA
MEM
SEC
4
REV.
X01
34 OF 14410/20/2006
Page 35
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
3
4
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 35 OF 144
DBA
MEM
4
Page 36
A B C
D
1
2
3
4
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,37,38
17,38
17,38
17,37,38
17,37,38
17,37,38
17,38
17,38
17
17
17,38
52
52
+3.3V
REPLACE
36-38
17,38
17,38
17,37
17,37
17,37
X00_DT9812 SCH I2C address lines use pullup/pulldowns
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
37,38
17,37,38
CPU2_MEM_MA_BANK1
CPU2_MEM_MA_BANK0
CPU2_MEM_MA_BANK2
CPU2_MEM_MA_ADD15
CPU2_MEM_MA_ADD14
CPU2_MEM_MA_ADD13
CPU2_MEM_MA_ADD12
CPU2_MEM_MA_ADD11
CPU2_MEM_MA_ADD10
CPU2_MEM_MA_ADD9
CPU2_MEM_MA_ADD8
CPU2_MEM_MA_ADD7
CPU2_MEM_MA_ADD6
CPU2_MEM_MA_ADD5
CPU2_MEM_MA_ADD4
CPU2_MEM_MA_ADD3
CPU2_MEM_MA_ADD2
CPU2_MEM_MA_ADD1
CPU2_MEM_MA_ADD0
CPU2_MEM_MA0_CS_L1
CPU2_MEM_MA0_CS_L0
CPU2_MEM_MA_RAS_N
CPU2_MEM_MA_CAS_N
CPU2_MEM_MA_WE_N
CPU2_MEM_MA2_CS_L1
CPU2_MEM_MA2_CS_L0
NC_DIMM5_P138
NC_DIMM5_P137
CK_CPU2_MEM_MA0_DN
CK_CPU2_MEM_MA0_DP
CPU2_MEM_MA_CKE0
I2C_P2_DIMM5_SDA
I2C_P2_DIMM5_SCL
36,37
36,37
36,37
CPU2_DIMM_PD
CPU2_DIMM_PD
CPU2_DIMM_PD
V_MEM_CPU2_DIMM_VREF
CPU2_MEM_MA2_ODT0
CPU2_MEM_MA0_ODT0
CPU2_MEM_MA_CHECK7
CPU2_MEM_MA_CHECK6
CPU2_MEM_MA_CHECK5
CPU2_MEM_MA_CHECK4
CPU2_MEM_MA_CHECK3
CPU2_MEM_MA_CHECK2
CPU2_MEM_MA_CHECK1
CPU2_MEM_MA_CHECK0
CPU2_MEM_MA_DQS_17_DP
CPU2_MEM_MA_DQS_17_DN
CPU2_MEM_MA_DQS_16_DP
CPU2_MEM_MA_DQS_16_DN
CPU2_MEM_MA_DQS_15_DP
CPU2_MEM_MA_DQS_15_DN
CPU2_MEM_MA_DQS_14_DP
CPU2_MEM_MA_DQS_14_DN
CPU2_MEM_MA_DQS_13_DP
CPU2_MEM_MA_DQS_13_DN
CPU2_MEM_MA_DQS_12_DP
CPU2_MEM_MA_DQS_12_DN
CPU2_MEM_MA_DQS_11_DP
CPU2_MEM_MA_DQS_11_DN
CPU2_MEM_MA_DQS_10_DP
CPU2_MEM_MA_DQS_10_DN
CPU2_MEM_MA_DQS_9_DP
CPU2_MEM_MA_DQS_9_DN
CPU2_MEM_MA_DQS_8_DP
CPU2_MEM_MA_DQS_8_DN
CPU2_MEM_MA_DQS_7_DP
CPU2_MEM_MA_DQS_7_DN
CPU2_MEM_MA_DQS_6_DP
CPU2_MEM_MA_DQS_6_DN
CPU2_MEM_MA_DQS_5_DP
CPU2_MEM_MA_DQS_5_DN
CPU2_MEM_MA_DQS_4_DP
CPU2_MEM_MA_DQS_4_DN
CPU2_MEM_MA_DQS_3_DP
CPU2_MEM_MA_DQS_3_DN
CPU2_MEM_MA_DQS_2_DP
CPU2_MEM_MA_DQS_2_DN
CPU2_MEM_MA_DQS_1_DP
CPU2_MEM_MA_DQS_1_DN
CPU2_MEM_MA_DQS_0_DP
CPU2_MEM_MA_DQS_0_DN
CPU2_MEM_MA_ERR_N
CPU2_MEM_MA_PAR
same issues as previous DIMM's
190
173
174
196
176
177
179
180
182
183
188
193
192
221
220
138
137
186
185
171
119
120
101
240
239
238
195
168
167
162
161
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
114
113
105
104
102
BA1
71
BA0
54
A16/BA2
A15
A14
A13
A12
57
A11
70
A10/AP
A9
A8
58
A7
A6
60
A5
61
A4
A3
63
A2
A1
A0
76
S1
S0
RAS
74
CAS
73
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
52
CKE0
SDA
SCL
SA2
SA1
SA0
VDDSPD
1
VREF
77
ODT1
ODT0
CB7
CB6
CB5
CB4
49
CB3
48
CB2
43
CB1
42
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
46
DQS8/NC
45
DQS8/NC
DQS7
DQS7
DQS6
DQS6
93
DQS5
92
DQS5
84
DQS4
83
DQS4
37
DQS3
36
DQS3
28
DQS2
27
DQS2
16
DQS1
15
DQS1
7
DQS0
6
DQS0
55
ERR_OUT
68
PAR_IN
TEST
SUB*_MW921
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
J_DIMM3A
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
ranked DIMMs
to support quad
additional chip selects
CK2, CK2# are used for
DQ33
DQ32
DQ31
X00_DT9841 SCH added note
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
RESET
240 PIN DDR II DIMM
I2C ID = A0
CPU2 DIMMS 3A & 3B
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
NC
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU2_MEM_MA_DATA63
CPU2_MEM_MA_DATA62
CPU2_MEM_MA_DATA61
CPU2_MEM_MA_DATA60
CPU2_MEM_MA_DATA59
CPU2_MEM_MA_DATA58
CPU2_MEM_MA_DATA57
CPU2_MEM_MA_DATA56
CPU2_MEM_MA_DATA55
CPU2_MEM_MA_DATA54
CPU2_MEM_MA_DATA53
CPU2_MEM_MA_DATA52
CPU2_MEM_MA_DATA51
CPU2_MEM_MA_DATA50
CPU2_MEM_MA_DATA49
CPU2_MEM_MA_DATA48
CPU2_MEM_MA_DATA47
CPU2_MEM_MA_DATA46
CPU2_MEM_MA_DATA45
CPU2_MEM_MA_DATA44
CPU2_MEM_MA_DATA43
CPU2_MEM_MA_DATA42
CPU2_MEM_MA_DATA41
CPU2_MEM_MA_DATA40
CPU2_MEM_MA_DATA39
CPU2_MEM_MA_DATA38
CPU2_MEM_MA_DATA37
CPU2_MEM_MA_DATA36
CPU2_MEM_MA_DATA35
CPU2_MEM_MA_DATA34
CPU2_MEM_MA_DATA33
CPU2_MEM_MA_DATA32
CPU2_MEM_MA_DATA31
CPU2_MEM_MA_DATA30
CPU2_MEM_MA_DATA29
CPU2_MEM_MA_DATA28
CPU2_MEM_MA_DATA27
CPU2_MEM_MA_DATA26
CPU2_MEM_MA_DATA25
CPU2_MEM_MA_DATA24
CPU2_MEM_MA_DATA23
CPU2_MEM_MA_DATA22
CPU2_MEM_MA_DATA21
CPU2_MEM_MA_DATA20
CPU2_MEM_MA_DATA19
CPU2_MEM_MA_DATA18
CPU2_MEM_MA_DATA17
CPU2_MEM_MA_DATA16
CPU2_MEM_MA_DATA15
CPU2_MEM_MA_DATA14
CPU2_MEM_MA_DATA13
CPU2_MEM_MA_DATA12
CPU2_MEM_MA_DATA11
CPU2_MEM_MA_DATA10
CPU2_MEM_MA_DATA9
CPU2_MEM_MA_DATA8
CPU2_MEM_MA_DATA7
CPU2_MEM_MA_DATA6
CPU2_MEM_MA_DATA5
CPU2_MEM_MA_DATA4
CPU2_MEM_MA_DATA3
CPU2_MEM_MA_DATA2
CPU2_MEM_MA_DATA1
CPU2_MEM_MA_DATA0
CPU2_MEM_MA_RESET_N
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
17,37
+MEM_CPU2
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,37,38
18,38
18,38
18,37,38
18,37,38
18,37,38
18,38
18,38
18
18
CPU2_MEM_MB_BANK1
CPU2_MEM_MB_BANK0
CPU2_MEM_MB_BANK2
CPU2_MEM_MB_ADD15
CPU2_MEM_MB_ADD14
CPU2_MEM_MB_ADD13
CPU2_MEM_MB_ADD12
CPU2_MEM_MB_ADD11
CPU2_MEM_MB_ADD10
CPU2_MEM_MB_ADD9
CPU2_MEM_MB_ADD8
CPU2_MEM_MB_ADD7
CPU2_MEM_MB_ADD6
CPU2_MEM_MB_ADD5
CPU2_MEM_MB_ADD4
CPU2_MEM_MB_ADD3
CPU2_MEM_MB_ADD2
CPU2_MEM_MB_ADD1
CPU2_MEM_MB_ADD0
CPU2_MEM_MB0_CS_L1
CPU2_MEM_MB0_CS_L0
CPU2_MEM_MB_RAS_N
CPU2_MEM_MB_CAS_N
CPU2_MEM_MB_WE_N
CPU2_MEM_MB2_CS_L1
CPU2_MEM_MB2_CS_L0
NC_DIMM6_P138
NC_DIMM6_P137
CK_CPU2_MEM_MB0_DN
CK_CPU2_MEM_MB0_DP
190
71
54
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
76
193
192
74
73
221
220
138
137
186
185
171
52
119
120
101
240
239
+3.3V
REPLACE
18,38
52
52
CPU2_MEM_MB_CKE0
I2C_P2_DIMM6_SDA
I2C_P2_DIMM6_SCL
36,37
36,37
CPU2_DIMM_PD
CPU2_DIMM_PD
CPU2_DIMM_PU
37
238
36-38
18,38
18,38
18,37
18,37
X00_DT9812 SCH I2C address lines use pullup/pulldowns
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
37,38
18,37,38
V_MEM_CPU2_DIMM_VREF
CPU2_MEM_MB2_ODT0
CPU2_MEM_MB0_ODT0
CPU2_MEM_MB_CHECK7
CPU2_MEM_MB_CHECK6
CPU2_MEM_MB_CHECK5
CPU2_MEM_MB_CHECK4
CPU2_MEM_MB_CHECK3
CPU2_MEM_MB_CHECK2
CPU2_MEM_MB_CHECK1
CPU2_MEM_MB_CHECK0
CPU2_MEM_MB_DQS_17_DP
CPU2_MEM_MB_DQS_17_DN
CPU2_MEM_MB_DQS_16_DP
CPU2_MEM_MB_DQS_16_DN
CPU2_MEM_MB_DQS_15_DP
CPU2_MEM_MB_DQS_15_DN
CPU2_MEM_MB_DQS_14_DP
CPU2_MEM_MB_DQS_14_DN
CPU2_MEM_MB_DQS_13_DP
CPU2_MEM_MB_DQS_13_DN
CPU2_MEM_MB_DQS_12_DP
CPU2_MEM_MB_DQS_12_DN
CPU2_MEM_MB_DQS_11_DP
CPU2_MEM_MB_DQS_11_DN
CPU2_MEM_MB_DQS_10_DP
CPU2_MEM_MB_DQS_10_DN
CPU2_MEM_MB_DQS_9_DP
CPU2_MEM_MB_DQS_9_DN
CPU2_MEM_MB_DQS_8_DP
CPU2_MEM_MB_DQS_8_DN
CPU2_MEM_MB_DQS_7_DP
CPU2_MEM_MB_DQS_7_DN
CPU2_MEM_MB_DQS_6_DP
CPU2_MEM_MB_DQS_6_DN
CPU2_MEM_MB_DQS_5_DP
CPU2_MEM_MB_DQS_5_DN
CPU2_MEM_MB_DQS_4_DP
CPU2_MEM_MB_DQS_4_DN
CPU2_MEM_MB_DQS_3_DP
CPU2_MEM_MB_DQS_3_DN
CPU2_MEM_MB_DQS_2_DP
CPU2_MEM_MB_DQS_2_DN
CPU2_MEM_MB_DQS_1_DP
CPU2_MEM_MB_DQS_1_DN
CPU2_MEM_MB_DQS_0_DP
CPU2_MEM_MB_DQS_0_DN
CPU2_MEM_MB_ERR_N
CPU2_MEM_MB_PAR
NC_DIMM6_P102NC_DIMM5_P102
1
77
195
168
167
162
161
49
48
43
42
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6
55
68
102
SUB*_MW921
I2C ID = A2
ROOM = CPU2DIMM
BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
J_DIMM3B
A3
A2
A1
A0
S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
ranked DIMMs
to support quad
additional chip selects
CKE1
CKE0
CK2, CK2# are used for
X00_DT9841 SCH added note
SDA
SCL
SA2
SA1
SA0
VDDSPD
VREF
ODT1
ODT0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
DQS0
DQS0
ERR_OUT
PAR_IN
TEST
240 PIN DDR II DIMM
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
NC
RESET
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU2_MEM_MB_DATA63
CPU2_MEM_MB_DATA62
CPU2_MEM_MB_DATA61
CPU2_MEM_MB_DATA60
CPU2_MEM_MB_DATA59
CPU2_MEM_MB_DATA58
CPU2_MEM_MB_DATA57
CPU2_MEM_MB_DATA56
CPU2_MEM_MB_DATA55
CPU2_MEM_MB_DATA54
CPU2_MEM_MB_DATA53
CPU2_MEM_MB_DATA52
CPU2_MEM_MB_DATA51
CPU2_MEM_MB_DATA50
CPU2_MEM_MB_DATA49
CPU2_MEM_MB_DATA48
CPU2_MEM_MB_DATA47
CPU2_MEM_MB_DATA46
CPU2_MEM_MB_DATA45
CPU2_MEM_MB_DATA44
CPU2_MEM_MB_DATA43
CPU2_MEM_MB_DATA42
CPU2_MEM_MB_DATA41
CPU2_MEM_MB_DATA40
CPU2_MEM_MB_DATA39
CPU2_MEM_MB_DATA38
CPU2_MEM_MB_DATA37
CPU2_MEM_MB_DATA36
CPU2_MEM_MB_DATA35
CPU2_MEM_MB_DATA34
CPU2_MEM_MB_DATA33
CPU2_MEM_MB_DATA32
CPU2_MEM_MB_DATA31
CPU2_MEM_MB_DATA30
CPU2_MEM_MB_DATA29
CPU2_MEM_MB_DATA28
CPU2_MEM_MB_DATA27
CPU2_MEM_MB_DATA26
CPU2_MEM_MB_DATA25
CPU2_MEM_MB_DATA24
CPU2_MEM_MB_DATA23
CPU2_MEM_MB_DATA22
CPU2_MEM_MB_DATA21
CPU2_MEM_MB_DATA20
CPU2_MEM_MB_DATA19
CPU2_MEM_MB_DATA18
CPU2_MEM_MB_DATA17
CPU2_MEM_MB_DATA16
CPU2_MEM_MB_DATA15
CPU2_MEM_MB_DATA14
CPU2_MEM_MB_DATA13
CPU2_MEM_MB_DATA12
CPU2_MEM_MB_DATA11
CPU2_MEM_MB_DATA10
CPU2_MEM_MB_DATA9
CPU2_MEM_MB_DATA8
CPU2_MEM_MB_DATA7
CPU2_MEM_MB_DATA6
CPU2_MEM_MB_DATA5
CPU2_MEM_MB_DATA4
CPU2_MEM_MB_DATA3
CPU2_MEM_MB_DATA2
CPU2_MEM_MB_DATA1
CPU2_MEM_MB_DATA0
NC_DIMM6_P19NC_DIMM5_P19
CPU2_MEM_MB_RESET_N
PROPRIETARY NOTE
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
18,37
+MEM_CPU2
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
X01
SHEET
10/20/2006 36 OF 144
1
2
3
4
C
DBA
Page 37
A B C
D
1
2
3
4
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,36,38
17,38
17,38
17,36,38
17,36,38
17,36,38
17,38
17,38
CPU2_MEM_MA_BANK1
CPU2_MEM_MA_BANK0
CPU2_MEM_MA_BANK2
CPU2_MEM_MA_ADD15
CPU2_MEM_MA_ADD14
CPU2_MEM_MA_ADD13
CPU2_MEM_MA_ADD12
CPU2_MEM_MA_ADD11
CPU2_MEM_MA_ADD10
CPU2_MEM_MA_ADD9
CPU2_MEM_MA_ADD8
CPU2_MEM_MA_ADD7
CPU2_MEM_MA_ADD6
CPU2_MEM_MA_ADD5
CPU2_MEM_MA_ADD4
CPU2_MEM_MA_ADD3
CPU2_MEM_MA_ADD2
CPU2_MEM_MA_ADD1
CPU2_MEM_MA_ADD0
CPU2_MEM_MA1_CS_L1
CPU2_MEM_MA1_CS_L0
CPU2_MEM_MA_RAS_N
CPU2_MEM_MA_CAS_N
CPU2_MEM_MA_WE_N
CPU2_MEM_MA3_CS_L1
CPU2_MEM_MA3_CS_L0
NC_DIMM7_P138
190
71
54
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
76
193
192
74
73
221
220
138
137
17
17
CK_CPU2_MEM_MA1_DN
CK_CPU2_MEM_MA1_DP
186
185
171
52
119
120
101
240
239
+3.3V
REPLACE
17,38
52
52
CPU2_MEM_MA_CKE1
I2C_P2_DIMM7_SDA
I2C_P2_DIMM7_SCL
36,37
36,37
36,37
CPU2_DIMM_PD
CPU2_DIMM_PU
CPU2_DIMM_PD
238
36-38
17,38
17,38
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
X00_DT9812 SCH I2C address lines use pullup/pulldowns
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
36,38
17,36,38
V_MEM_CPU2_DIMM_VREF
CPU2_MEM_MA3_ODT0
CPU2_MEM_MA1_ODT0
CPU2_MEM_MA_CHECK7
CPU2_MEM_MA_CHECK6
CPU2_MEM_MA_CHECK5
CPU2_MEM_MA_CHECK4
CPU2_MEM_MA_CHECK3
CPU2_MEM_MA_CHECK2
CPU2_MEM_MA_CHECK1
CPU2_MEM_MA_CHECK0
CPU2_MEM_MA_DQS_17_DP
CPU2_MEM_MA_DQS_17_DN
CPU2_MEM_MA_DQS_16_DP
CPU2_MEM_MA_DQS_16_DN
CPU2_MEM_MA_DQS_15_DP
CPU2_MEM_MA_DQS_15_DN
CPU2_MEM_MA_DQS_14_DP
CPU2_MEM_MA_DQS_14_DN
CPU2_MEM_MA_DQS_13_DP
CPU2_MEM_MA_DQS_13_DN
CPU2_MEM_MA_DQS_12_DP
CPU2_MEM_MA_DQS_12_DN
CPU2_MEM_MA_DQS_11_DP
CPU2_MEM_MA_DQS_11_DN
CPU2_MEM_MA_DQS_10_DP
CPU2_MEM_MA_DQS_10_DN
CPU2_MEM_MA_DQS_9_DP
CPU2_MEM_MA_DQS_9_DN
CPU2_MEM_MA_DQS_8_DP
CPU2_MEM_MA_DQS_8_DN
CPU2_MEM_MA_DQS_7_DP
CPU2_MEM_MA_DQS_7_DN
CPU2_MEM_MA_DQS_6_DP
CPU2_MEM_MA_DQS_6_DN
CPU2_MEM_MA_DQS_5_DP
CPU2_MEM_MA_DQS_5_DN
CPU2_MEM_MA_DQS_4_DP
CPU2_MEM_MA_DQS_4_DN
CPU2_MEM_MA_DQS_3_DP
CPU2_MEM_MA_DQS_3_DN
CPU2_MEM_MA_DQS_2_DP
CPU2_MEM_MA_DQS_2_DN
CPU2_MEM_MA_DQS_1_DP
CPU2_MEM_MA_DQS_1_DN
CPU2_MEM_MA_DQS_0_DP
CPU2_MEM_MA_DQS_0_DN
CPU2_MEM_MA_ERR_N
CPU2_MEM_MA_PAR
NC_DIMM7_P102
1
77
195
168
167
162
161
49
48
43
42
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6
55
68
102
SUB*_TM615
BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
J_DIMM4A
A4
A3
A2
A1
A0
S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
CK2, CK2# are used for
CKE0
SDA
SCL
SA2
SA1
SA0
VDDSPD
VREF
ODT1
ODT0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
ranked DIMMs
to support quad
additional chip selects
X00_DT9841 SCH added note
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
DQS0
DQS0
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
ERR_OUT
PAR_IN
TEST
RESET
240 PIN DDR II DIMM
I2C ID = A4
same issues as previous DIMM's
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
CPU2_MEM_MA_DATA63
CPU2_MEM_MA_DATA62
CPU2_MEM_MA_DATA61
CPU2_MEM_MA_DATA60
CPU2_MEM_MA_DATA59
CPU2_MEM_MA_DATA58
CPU2_MEM_MA_DATA57
CPU2_MEM_MA_DATA56
CPU2_MEM_MA_DATA55
CPU2_MEM_MA_DATA54
CPU2_MEM_MA_DATA53
CPU2_MEM_MA_DATA52
CPU2_MEM_MA_DATA51
CPU2_MEM_MA_DATA50
CPU2_MEM_MA_DATA49
CPU2_MEM_MA_DATA48
CPU2_MEM_MA_DATA47
CPU2_MEM_MA_DATA46
CPU2_MEM_MA_DATA45
CPU2_MEM_MA_DATA44
CPU2_MEM_MA_DATA43
CPU2_MEM_MA_DATA42
CPU2_MEM_MA_DATA41
CPU2_MEM_MA_DATA40
CPU2_MEM_MA_DATA39
CPU2_MEM_MA_DATA38
CPU2_MEM_MA_DATA37
CPU2_MEM_MA_DATA36
CPU2_MEM_MA_DATA35
CPU2_MEM_MA_DATA34
CPU2_MEM_MA_DATA33
CPU2_MEM_MA_DATA32
CPU2_MEM_MA_DATA31
CPU2_MEM_MA_DATA30
CPU2_MEM_MA_DATA29
CPU2_MEM_MA_DATA28
CPU2_MEM_MA_DATA27
CPU2_MEM_MA_DATA26
CPU2_MEM_MA_DATA25
CPU2_MEM_MA_DATA24
CPU2_MEM_MA_DATA23
CPU2_MEM_MA_DATA22
CPU2_MEM_MA_DATA21
CPU2_MEM_MA_DATA20
CPU2_MEM_MA_DATA19
CPU2_MEM_MA_DATA18
CPU2_MEM_MA_DATA17
CPU2_MEM_MA_DATA16
CPU2_MEM_MA_DATA15
CPU2_MEM_MA_DATA14
CPU2_MEM_MA_DATA13
CPU2_MEM_MA_DATA12
CPU2_MEM_MA_DATA11
CPU2_MEM_MA_DATA10
CPU2_MEM_MA_DATA9
CPU2_MEM_MA_DATA8
CPU2_MEM_MA_DATA7
CPU2_MEM_MA_DATA6
CPU2_MEM_MA_DATA5
CPU2_MEM_MA_DATA4
CPU2_MEM_MA_DATA3
CPU2_MEM_MA_DATA2
CPU2_MEM_MA_DATA1
CPU2_MEM_MA_DATA0
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
17,36
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
NC
18
CPU2_MEM_MA_RESET_N
17,36
CPU2 DIMMS 4A & 4B
+MEM_CPU2
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,36,38
18,38
18,38
18,36,38
18,36,38
18,36,38
18,38
18,38
18
18
CPU2_MEM_MB_BANK1
CPU2_MEM_MB_BANK0
CPU2_MEM_MB_BANK2
CPU2_MEM_MB_ADD15
CPU2_MEM_MB_ADD14
CPU2_MEM_MB_ADD13
CPU2_MEM_MB_ADD12
CPU2_MEM_MB_ADD11
CPU2_MEM_MB_ADD10
CPU2_MEM_MB_ADD9
CPU2_MEM_MB_ADD8
CPU2_MEM_MB_ADD7
CPU2_MEM_MB_ADD6
CPU2_MEM_MB_ADD5
CPU2_MEM_MB_ADD4
CPU2_MEM_MB_ADD3
CPU2_MEM_MB_ADD2
CPU2_MEM_MB_ADD1
CPU2_MEM_MB_ADD0
CPU2_MEM_MB1_CS_L1
CPU2_MEM_MB1_CS_L0
CPU2_MEM_MB_RAS_N
CPU2_MEM_MB_CAS_N
CPU2_MEM_MB_WE_N
CPU2_MEM_MB3_CS_L1
CPU2_MEM_MB3_CS_L0
NC_DIMM8_P138
NC_DIMM8_P137NC_DIMM7_P137
CK_CPU2_MEM_MB1_DN
CK_CPU2_MEM_MB1_DP
190
71
54
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
76
193
192
74
73
221
220
138
137
186
185
171
52
119
120
101
240
239
+3.3V
REPLACE
18,38
52
52
CPU2_MEM_MB_CKE1
I2C_P2_DIMM8_SDA
I2C_P2_DIMM8_SCL
36,37
36,37
36,37
CPU2_DIMM_PD
CPU2_DIMM_PU
CPU2_DIMM_PU
238
36-38
18,38
18,38
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
X00_DT9812 SCH I2C address lines use pullup/pulldowns
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
36,38
18,36,38
V_MEM_CPU2_DIMM_VREF
CPU2_MEM_MB3_ODT0
CPU2_MEM_MB1_ODT0
CPU2_MEM_MB_CHECK7
CPU2_MEM_MB_CHECK6
CPU2_MEM_MB_CHECK5
CPU2_MEM_MB_CHECK4
CPU2_MEM_MB_CHECK3
CPU2_MEM_MB_CHECK2
CPU2_MEM_MB_CHECK1
CPU2_MEM_MB_CHECK0
CPU2_MEM_MB_DQS_17_DP
CPU2_MEM_MB_DQS_17_DN
CPU2_MEM_MB_DQS_16_DP
CPU2_MEM_MB_DQS_16_DN
CPU2_MEM_MB_DQS_15_DP
CPU2_MEM_MB_DQS_15_DN
CPU2_MEM_MB_DQS_14_DP
CPU2_MEM_MB_DQS_14_DN
CPU2_MEM_MB_DQS_13_DP
CPU2_MEM_MB_DQS_13_DN
CPU2_MEM_MB_DQS_12_DP
CPU2_MEM_MB_DQS_12_DN
CPU2_MEM_MB_DQS_11_DP
CPU2_MEM_MB_DQS_11_DN
CPU2_MEM_MB_DQS_10_DP
CPU2_MEM_MB_DQS_10_DN
CPU2_MEM_MB_DQS_9_DP
CPU2_MEM_MB_DQS_9_DN
CPU2_MEM_MB_DQS_8_DP
CPU2_MEM_MB_DQS_8_DN
CPU2_MEM_MB_DQS_7_DP
CPU2_MEM_MB_DQS_7_DN
CPU2_MEM_MB_DQS_6_DP
CPU2_MEM_MB_DQS_6_DN
CPU2_MEM_MB_DQS_5_DP
CPU2_MEM_MB_DQS_5_DN
CPU2_MEM_MB_DQS_4_DP
CPU2_MEM_MB_DQS_4_DN
CPU2_MEM_MB_DQS_3_DP
CPU2_MEM_MB_DQS_3_DN
CPU2_MEM_MB_DQS_2_DP
CPU2_MEM_MB_DQS_2_DN
CPU2_MEM_MB_DQS_1_DP
CPU2_MEM_MB_DQS_1_DN
CPU2_MEM_MB_DQS_0_DP
CPU2_MEM_MB_DQS_0_DN
CPU2_MEM_MB_ERR_N
CPU2_MEM_MB_PAR
NC_DIMM8_P102
1
77
195
168
167
162
161
49
48
43
42
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6
55
68
102
SUB*_TM615
I2C ID = A6
ROOM = CPU1DIMM
BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
J_DIMM4B
A5
A4
A3
A2
A1
A0
S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
ranked DIMMs
to support quad
additional chip selects
CKE1
CK2, CK2# are used for
CKE0
SDA
SCL
X00_DT9841 SCH added note
SA2
SA1
SA0
VDDSPD
VREF
ODT1
ODT0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
DQS0
DQS0
ERR_OUT
PAR_IN
TEST
240 PIN DDR II DIMM
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
NC
RESET
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU2_MEM_MB_DATA63
CPU2_MEM_MB_DATA62
CPU2_MEM_MB_DATA61
CPU2_MEM_MB_DATA60
CPU2_MEM_MB_DATA59
CPU2_MEM_MB_DATA58
CPU2_MEM_MB_DATA57
CPU2_MEM_MB_DATA56
CPU2_MEM_MB_DATA55
CPU2_MEM_MB_DATA54
CPU2_MEM_MB_DATA53
CPU2_MEM_MB_DATA52
CPU2_MEM_MB_DATA51
CPU2_MEM_MB_DATA50
CPU2_MEM_MB_DATA49
CPU2_MEM_MB_DATA48
CPU2_MEM_MB_DATA47
CPU2_MEM_MB_DATA46
CPU2_MEM_MB_DATA45
CPU2_MEM_MB_DATA44
CPU2_MEM_MB_DATA43
CPU2_MEM_MB_DATA42
CPU2_MEM_MB_DATA41
CPU2_MEM_MB_DATA40
CPU2_MEM_MB_DATA39
CPU2_MEM_MB_DATA38
CPU2_MEM_MB_DATA37
CPU2_MEM_MB_DATA36
CPU2_MEM_MB_DATA35
CPU2_MEM_MB_DATA34
CPU2_MEM_MB_DATA33
CPU2_MEM_MB_DATA32
CPU2_MEM_MB_DATA31
CPU2_MEM_MB_DATA30
CPU2_MEM_MB_DATA29
CPU2_MEM_MB_DATA28
CPU2_MEM_MB_DATA27
CPU2_MEM_MB_DATA26
CPU2_MEM_MB_DATA25
CPU2_MEM_MB_DATA24
CPU2_MEM_MB_DATA23
CPU2_MEM_MB_DATA22
CPU2_MEM_MB_DATA21
CPU2_MEM_MB_DATA20
CPU2_MEM_MB_DATA19
CPU2_MEM_MB_DATA18
CPU2_MEM_MB_DATA17
CPU2_MEM_MB_DATA16
CPU2_MEM_MB_DATA15
CPU2_MEM_MB_DATA14
CPU2_MEM_MB_DATA13
CPU2_MEM_MB_DATA12
CPU2_MEM_MB_DATA11
CPU2_MEM_MB_DATA10
CPU2_MEM_MB_DATA9
CPU2_MEM_MB_DATA8
CPU2_MEM_MB_DATA7
CPU2_MEM_MB_DATA6
CPU2_MEM_MB_DATA5
CPU2_MEM_MB_DATA4
CPU2_MEM_MB_DATA3
CPU2_MEM_MB_DATA2
CPU2_MEM_MB_DATA1
CPU2_MEM_MB_DATA0
X00_DT9812 SCH I2C address lines use pullup/pulldowns
NC_DIMM8_P19NC_DIMM7_P19
CPU2_MEM_MB_RESET_N
PROPRIETARY NOTE
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
18,36
+MEM_CPU2
+3.3V
REPLACE
1 2
1 2
TITLE
DWG NO.
DATE
R9774
CPU2_DIMM_PU
220-5%
R9773
CPU2_DIMM_PD
220-5%
INC.
SCHEM,PLN,SV,PE_BULN
FP975
1
2
3
36,37
36,37
4
ROUND ROCK,TEXAS
REV.
X01
SHEET
37 OF 14410/20/2006
C
DBA
Page 38
A B C
D
1
2
3
17,37,38
17,36,38
17,36-38
17,37,38
17,36-38
17,36-38
17,36-38
17,36-38
17,36,38
17,36-38
17,36-38
17,37,38
17,36-38
17,36-38
17,36-38
17,36-38
17,36-38
17,36-38
17,36-38
17,36-38
17,36-38
17,36-38
17,36,38
17,37,38
18,36,38
18,36-38
18,36,38
18,37,38
17,36,38
17,36-38
17,36-38
17,36-38
17,36-38
17,36-38
17,36-38
17,37,38
17,36,38
18,36,38
18,37,38
18,36-38
18,36-38
18,37,38
CPU2_MEM_MA1_CS_L1
CPU2_MEM_MA0_CS_L1
CPU2_MEM_MA_ADD13
CPU2_MEM_MA1_ODT0
CPU2_MEM_MA_ADD5
CPU2_MEM_MA_ADD6
CPU2_MEM_MA_ADD8
CPU2_MEM_MA_ADD7
CPU2_MEM_MA0_ODT0
CPU2_MEM_MA_CAS_N
CPU2_MEM_MA_WE_N
CPU2_MEM_MA1_CS_L0
CPU2_MEM_MA_ADD11
CPU2_MEM_MA_ADD9
CPU2_MEM_MA_ADD12
CPU2_MEM_MA_BANK2
CPU2_MEM_MA_ADD10
CPU2_MEM_MA_BANK1
CPU2_MEM_MA_PAR
CPU2_MEM_MA_ADD0
CPU2_MEM_MA_ADD14
CPU2_MEM_MA_ADD15
CPU2_MEM_MA_CKE0
CPU2_MEM_MA_CKE1
CPU2_MEM_MB0_ODT0
CPU2_MEM_MB_ADD13
CPU2_MEM_MB0_CS_L1
CPU2_MEM_MB1_CS_L1
CPU2_MEM_MA0_CS_L0
CPU2_MEM_MA_RAS_N
CPU2_MEM_MA_BANK0
CPU2_MEM_MA_ADD2
CPU2_MEM_MA_ADD1
CPU2_MEM_MA_ADD3
CPU2_MEM_MA_ADD4
CPU2_MEM_MA3_ODT0
CPU2_MEM_MA2_ODT0
CPU2_MEM_MB2_ODT0
CPU2_MEM_MB3_ODT0
CPU2_MEM_MB_BANK0
CPU2_MEM_MB_RAS_N
CPU2_MEM_MB1_CS_L0
R9749
1 2
R9746
1 2
10-1%
1 2
10-1%
R9745
1 2
R9742
1 2
10-1%
1 2
10-1%
R9741
1 2
R9738
1 2
10-1%
1 2
10-1%
R9737
1 2
R9734
1 2
10-1%
1 2
10-1%
R9733
1 2
R9730
1 2
10-1%
1 2
10-1%
R9729
1 2
R9726
1 2
10-1%
1 2
10-1%
R9725
1 2
R9722
1 2
10-1%
1 2
10-1%
R9719
1 2
1 2
10-1%
R9718
1 2
R9715
1 2
10-1%
1 2
10-1%
R9714
1 2
R9711
1 2
10-1%
1 2
10-1%
R9710
1 2
R9708
1 2
10-1%
1 2
10-1%
R9747
R9748
1 2
10-1%
10-1%
R9743
R9744
1 2
10-1%
10-1%
R9739
R9740
1 2
10-1%
10-1%
R9735
R9736
1 2
10-1%
10-1%
R9731
R9732
1 2
10-1%
10-1%
R9727
R9728
1 2
10-1%
10-1%
R9723
R9724
1 2
10-1%
10-1%
R9720
R9721
1 2
10-1%
10-1%
R9716
R9717
1 2
10-1%
10-1%
R9712
R9713
1 2
10-1%
10-1%
R9709
10-1%
C9720
1 2
C9718
1 2
15pF
50V-5%
15pF
50V-5%
C9724
1 2
C9722
1 2
15pF
50V-5%
15pF
50V-5%
C9728
1 2
C9726
1 2
15pF
50V-5%
15pF
50V-5%
C9732
1 2
C9730
1 2
15pF
50V-5%
15pF
50V-5%
C9736
1 2
C9734
1 2
15pF
50V-5%
15pF
50V-5%
C9740
1 2
C9738
1 2
15pF
50V-5%
15pF
50V-5%
C9744
1 2
C9742
1 2
15pF
50V-5%
15pF
50V-5%
C9746
1 2
15pF
50V-5%
C9751
1 2
C9749
1 2
15pF
50V-5%
15pF
50V-5%
C9755
1 2
C9753
1 2
15pF
50V-5%
15pF
50V-5%
C9758
1 2
C9757
1 2
15pF
50V-5%
15pF
50V-5%
C9721
1 2
C9719
1 2
15pF
50V-5%
15pF
50V-5%
C9725
1 2
C9723
1 2
15pF
50V-5%
15pF
50V-5%
C9729
1 2
C9727
1 2
15pF
50V-5%
15pF
50V-5%
C9733
1 2
C9731
1 2
15pF
50V-5%
15pF
50V-5%
C9737
1 2
C9735
1 2
15pF
50V-5%
15pF
50V-5%
C9741
1 2
C9739
1 2
15pF
50V-5%
15pF
50V-5%
C9745
1 2
C9743
1 2
15pF
50V-5%
15pF
50V-5%
C9748
1 2
C9747
1 2
15pF
50V-5%
15pF
50V-5%
C9752
1 2
C9750
1 2
15pF
50V-5%
15pF
50V-5%
C9756
1 2
C9754
1 2
15pF
50V-5%
15pF
50V-5%
C9759
1 2
15pF
50V-5%
+MEM_CPU2
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,37,38
18,36,38
18,36-38
18,36-38
17,36,38
17,36,38
17,37,38
17,37,38
18,36,38
18,36,38
18,37,38
18,37,38
CPU2_MEM_MB_ADD0
CPU2_MEM_MB_PAR
CPU2_MEM_MB_BANK1
CPU2_MEM_MB_ADD10
CPU2_MEM_MB_ADD4
CPU2_MEM_MB_ADD3
CPU2_MEM_MB_ADD1
CPU2_MEM_MB_ADD2
CPU2_MEM_MB_ADD7
CPU2_MEM_MB_ADD8
CPU2_MEM_MB_ADD6
CPU2_MEM_MB_ADD5
CPU2_MEM_MB_BANK2
CPU2_MEM_MB_ADD12
CPU2_MEM_MB_ADD9
CPU2_MEM_MB_ADD11
CPU2_MEM_MB_CKE1
CPU2_MEM_MB_CKE0
CPU2_MEM_MB_ADD15
CPU2_MEM_MB_ADD14
CPU2_MEM_MA2_CS_L0
CPU2_MEM_MA2_CS_L1
CPU2_MEM_MA3_CS_L0
CPU2_MEM_MA3_CS_L1
CPU2_MEM_MB2_CS_L0
CPU2_MEM_MB2_CS_L1
CPU2_MEM_MB3_CS_L0
CPU2_MEM_MB3_CS_L1
+MEM_CPU2
R8730
1 2
49.9-1%49.9-1%
R8731
1 2
21
C8747
21
C8752
1 2
1 2
1 2
1 2
1 2
1 2
1 2
.1uF
16V-10%
20%
0.33uF 16V
R9703
R9700
1 2
10-1%
1 2
10-1%
R9699
R9696
1 2
10-1%
1 2
10-1%
R9695
R9692
1 2
10-1%
1 2
10-1%
R9691
R9688
1 2
10-1%
1 2
10-1%
R9687
R9684
1 2
10-1%
1 2
10-1%
R9683
R9680
1 2
10-1%
1 2
10-1%
R9679
R9676
1 2
10-1%
1 2
10-1%
C8749
1 2
R9701
R9702
1 2
10-1%
10-1%
R9697
R9698
1 2
10-1%
10-1%
R9693
R9694
1 2
10-1%
10-1%
R9689
R9690
1 2
10-1%
10-1%
R9685
R9686
1 2
10-1%
10-1%
R9681
R9682
1 2
10-1%
10-1%
R9677
R9678
1 2
10-1%
10-1%
1000pF
C8750
50V-10%
1 2
1000pF
50V-10%
C9716
1 2
C9714
C9717
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
C9715
50V-5%
50V-5%
C9712
1 2
C9710
C9713
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
C9711
50V-5%
50V-5%
C9708
1 2
C9706
C9709
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
C9707
50V-5%
50V-5%
C9704
1 2
C9702
C9705
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
C9703
50V-5%
50V-5%
C9700
1 2
C9698
C9701
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
C9699
50V-5%
50V-5%
C9696
1 2
C9694
C9697
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
C9695
50V-5%
50V-5%
C9692
1 2
C9690
C9693
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
C9691
50V-5%
50V-5%
V_MEM_CPU2_DIMM_VREF
21
C8751
0.01uF
50V-10%
1 2
15pF
1 2
15pF
1 2
15pF
1 2
15pF
1 2
15pF
1 2
15pF
1 2
15pF
21
C8748
+MEM_CPU2
.1uF
16V-10%
36,37
18,37,38
18,36,38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,36-38
18,37,38
18,36,38
18,36-38
18,36-38
18,37,38
18,36,38
18,36,38
18,36-38
18,37,38
17,37,38
18,37,38
18,36,38
17,36,38
17,37,38
17,37,38
17,36,38
17,37,38
17,36,38
36-38
18,36-38
18,36-38
18,36-38
CPU2_MEM_MB_CKE1
CPU2_MEM_MB_CKE0
CPU2_MEM_MB_ADD15
CPU2_MEM_MB_ADD14
CPU2_MEM_MB_ADD7
CPU2_MEM_MB_ADD8
CPU2_MEM_MB_ADD6
CPU2_MEM_MB_ADD5
CPU2_MEM_MB_ADD4
CPU2_MEM_MB_ADD3
CPU2_MEM_MB_ADD1
CPU2_MEM_MB_ADD2
CPU2_MEM_MB_ADD0
CPU2_MEM_MB_PAR
CPU2_MEM_MB_BANK1
CPU2_MEM_MB_ADD10
CPU2_MEM_MB_BANK0
CPU2_MEM_MB_RAS_N
CPU2_MEM_MB1_CS_L0
CPU2_MEM_MB0_CS_L0
CPU2_MEM_MB_WE_N
CPU2_MEM_MB_CAS_N
CPU2_MEM_MB1_ODT0
CPU2_MEM_MB0_ODT0
CPU2_MEM_MB0_CS_L1
CPU2_MEM_MB_ADD13
CPU2_MEM_MB1_CS_L1
CPU2_MEM_MA1_CS_L1
CPU2_MEM_MB3_ODT0
CPU2_MEM_MB2_ODT0
CPU2_MEM_MA2_ODT0
CPU2_MEM_MA3_ODT0
CPU2_MEM_MA3_CS_L0
CPU2_MEM_MA2_CS_L1
CPU2_MEM_MA3_CS_L1
CPU2_MEM_MA2_CS_L0
CPU2_MEM_MB_ERR_N
CPU2_MEM_MB_ADD12
CPU2_MEM_MB_ADD9
CPU2_MEM_MB_ADD11
+VTT_CPU2+VTT_CPU2
RN192
1
2
3
4
47-5%
8
7
6
5
17,37,38
17,36,38
17,36-38
17,36-38
CPU2_MEM_MA_CKE1
CPU2_MEM_MA_CKE0
CPU2_MEM_MA_ADD15
CPU2_MEM_MA_ADD14
RN191
1
2
3
4
47-5%
8
7
6
5
17,36-38
17,36-38
17,36-38
17,36-38
CPU2_MEM_MA_ADD7
CPU2_MEM_MA_ADD8
CPU2_MEM_MA_ADD6
CPU2_MEM_MA_ADD5
RN190
1
2
3
4
47-5%
8
7
6
5
17,36-38
17,36-38
17,36-38
17,36-38
CPU2_MEM_MA_ADD4
CPU2_MEM_MA_ADD3
CPU2_MEM_MA_ADD1
CPU2_MEM_MA_ADD2
RN189
1
2
3
4
47-5%
8
7
6
5
17,36-38
17,36-38
17,36-38
17,36-38
CPU2_MEM_MA_ADD0
CPU2_MEM_MA_PAR
CPU2_MEM_MA_BANK1
CPU2_MEM_MA_ADD10
RN188
1
2
3
4
47-5%
8
7
6
5
17,36-38
17,36-38
17,36,38
17,37,38
CPU2_MEM_MA_BANK0
CPU2_MEM_MA_RAS_N
CPU2_MEM_MA0_CS_L0
CPU2_MEM_MA1_CS_L0
RN194
1
2
3
4
47-5%
8
7
6
5
17,36-38
17,36-38
17,36,38
17,37,38
CPU2_MEM_MA_WE_N
CPU2_MEM_MA_CAS_N
CPU2_MEM_MA0_ODT0
CPU2_MEM_MA1_ODT0
RN183
1
2
3
4
47-5%
RN182
1
2
3
4
47-5%
8
7
6
5
1
8
7
6
5
RN181
1
2
3
4
47-5%
8
7
6
5
RN180
1
2
3
4
47-5%
8
7
6
5
RN179
1
2
3
4
47-5%
8
7
6
5
2
RN178
1
2
3
4
47-5%
8
7
6
5
R8733
17,36-38
CPU2_MEM_MA_ADD13
RN187
1
2
3
4
47-5%
RN186
1
2
3
4
47-5%
8
7
17,36,38
CPU2_MEM_MA0_CS_L1
6
5
18,36,38
18,36,38
18,37,38
8
18,37,38
CPU2_MEM_MB2_CS_L0
CPU2_MEM_MB2_CS_L1
CPU2_MEM_MB3_CS_L0
CPU2_MEM_MB3_CS_L1
7
6
5
17,36-38
CPU2_MEM_MA_BANK2
1 2
47-5%
R8732
1 2
47-5%
RN193
1
2
3
4
47-5%
R8735
1 2
8
7
6
5
47-5%
R8734
18,36-38
CPU2_MEM_MB_BANK2
RN185
1
2
3
4
47-5%
8
7
6
5
+MEM_CPU2
36-38
17,36-38
17,36-38
17,36-38
CPU2_MEM_MA_ERR_N
CPU2_MEM_MA_ADD12
CPU2_MEM_MA_ADD9
CPU2_MEM_MA_ADD11
1 2
47-5%
RN177
1
2
3
4
47-5%
8
7
6
5
+MEM_CPU2
3
RN184
1
2
3
4
47-5%
8
7
6
5
R8729
CPU2_MEM_MA_ERR_R_N
17
1 2
CPU2_MEM_MA_ERR_N
36-38
22-5%
R8728
CPU2_MEM_MB_ERR_R_N
18
1 2
CPU2_MEM_MB_ERR_N
36-38
22-5%
4
18,36,38
18,36-38
18,36-38
18,37,38
CPU2_MEM_MB0_CS_L0
CPU2_MEM_MB_WE_N
CPU2_MEM_MB_CAS_N
CPU2_MEM_MB1_ODT0
R9707
1 2
R9704
1 2
10-1%
1 2
10-1%
R9705
R9706
1 2
10-1%
10-1%
C9762
1 2
C9760
1 2
15pF
50V-5%
15pF
50V-5%
C9763
1 2
C9761
1 2
15pF
50V-5%
15pF
50V-5%
CPU2 DIMMS TERMINATION
ROOM = CPU2DIMM
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
X00_DT10369 SCH name fix
TITLE
DWG NO.
DATE
MODULE:
MEM
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
SEC
4
REV.
X01
38 OF 14410/20/2006
C
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2
3
3
4
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
MEM
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DBA
SEC
4
REV.
X01
39 OF 14410/20/2006
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1
2
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3
3
4
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DBA
MEM
SEC
4
REV.
X01
40 OF 14410/20/2006
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D
1
1
2
2
This Page Intentionally Left Blank
3
3
4
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DBA
MEM
SEC
4
REV.
X01
41 OF 14410/20/2006
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1
1
2
2
This Page Intentionally Left Blank
3
3
4
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DBA
MEM
SEC
4
REV.
X01
42 OF 14410/20/2006
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D
1
1
2
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This Page Intentionally Left Blank
3
3
4
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DBA
MEM
SEC
4
REV.
X01
43 OF 14410/20/2006
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1
2
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3
4
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DBA
MEM
SEC
4
REV.
X01
44 OF 14410/20/2006
Page 45
1
A B C
Place series R's within 0.5 inch of U8002
Place shut R within 100 mil of series R's
ICS932S805
All Unused Clock Outputs Can be Turned Off
R9427
1 2
47.5-1%
CK_200M_CPU1_C_DP
D
14
1
2
3
21
C8674
22pF
50V-5%
14.31818MHz
+3.3V
REPLACE
X5
12
+3.3V
REPLACE
L1820
BLM21AH601
21
21
C8673
L1819
BLM21AH601
1 2
C8738
22pF
50V-5%
21
10uF 6.3V
138
52
52
45
MOD_CLKGEN_VCC3
C8682
CLKGEN_PD_N
I2C_CLKGEN_SDA
I2C_CLKGEN_SCL
MOD_CLKGEN_SSC_EN
MOD_CLKGEN_VDDSRC
21
.1uF
R8661
1 2
2.2-5%
21
C8683
16V-10%
R8678
1-1%
.1uF
16V-10%
1 2
C8739
21
21
C8677
MOD_CLKGEN_VDDA
.1uF
16V-10%
10uF 6.3V
21
C8678
MOD_CLKGEN_XTALI
MOD_CLKGEN_XTALO
+3.3V
REPLACE
R8716
1 2
475-1%
21
C8687
MOD_CLKGEN_VDD48M
.1uF
.1uF
21
C8679
16V-10%
16V-10%
.1uF
MOD_CLKGEN_IREF
21
C8686
C8680
16V-10%
.1uF
16V-10%
21
.1uF
C8688
R8641
1 2
4.7K-5%
21
C8685
16V-10%
1 2
.1uF
C8684
16V-10%
C8681
.047uF
16V-10%
Through SMBus For EMI Consideration
R9425
U8002
1
XTALI
2
XTALO
19
PD_N
14
SDATA
13
SCLK
60
SPREAD_EN
23
IREF
3
VDDREF
15
VDDPCI
64
VDD25MHZ
21
.1uF
16V-10%
21
.1uF
16V-10%
7
GNDREF
18
GNDPCI
20
GND
61
GND25MHZ
8
VDD48MHZ
24
VDDA_24
31
VDDSRC_31
39
VDDSRC_39
41
VDDCPU1
49
VDDCPU2
55
VDDCPU3
12
GND48MHZ
32
GNDSRC
40
GND_40
48
GND_48
54
GND_54
21
VDDA_21
22
GNDA
ICS932S805
CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1
CPUCLK8T2
CPUCLK8C2
CPUCLK8T3
CPUCLK8C3
CPUCLK8T4
CPUCLK8C4
CPUCLK8T5
CPUCLK8C5
CPUCLK8T6
CPUCLK8C6
48MHZ_0
48MHZ_1
48MHZ_2
FS3/PCICLK0
PCICLK1
25MHZ_0
25MHZ_1
FS0/REF0
FS1/REF1
FS2/REF2
SRCCLKT0
SRCCLKC0
SRCCLKT1
SRCCLKC1
SRCCLKT2
SRCCLKC2
SRCCLKT3
SRCCLKC3
SRCCLKT4
SRCCLKC4
SRCCLKT5
SRCCLKC5
43
42
45
44
47
46
51
50
53
52
57
56
59
58
9
10
11
16
17
63
62
4
5
6
25
26
27
28
29
30
34
33
36
35
38
37
MOD_CLKGEN_K8CLK_0_DP
MOD_CLKGEN_K8CLK_0_DN
MOD_CLKGEN_K8CLK_1_DP
MOD_CLKGEN_K8CLK_1_DN
NC_CLKGEN_K8CLK_2_DP
NC_CLKGEN_K8CLK_2_DN
NC_CLKGEN_K8CLK_3_DP
NC_CLKGEN_K8CLK_3_DN
NC_CLKGEN_K8CLK_4_DP
NC_CLKGEN_K8CLK_4_DN
MOD_CLKGEN_K8CLK_5_DP
MOD_CLKGEN_K8CLK_5_DN
MOD_CLKGEN_K8CLK_6_DP
MOD_CLKGEN_K8CLK_6_DN
R8662
MOD_CLKGEN_CK48M
NC_CLKGEN_48M_1
NC_CLKGEN_48M_2
MOD_CLKGEN_PCICLK0
MOD_CLKGEN_PCICLK1
TP_CLKGEN_25M_0
NC_CLKGEN_25M_1
MOD_CLKGEN_REF0
MOD_CLKGEN_REF1
MOD_CLKGEN_REF2
MOD_CLKGEN_SRCCLK_0_DP
MOD_CLKGEN_SRCCLK_0_DN
MOD_CLKGEN_SRCCLK_1_DP
MOD_CLKGEN_SRCCLK_1_DN
MOD_CLKGEN_SRCCLK_2_DP CK_100M_PCIE_PEX_C_DP
MOD_CLKGEN_SRCCLK_2_DN
MOD_CLKGEN_SRCCLK_3_DP
MOD_CLKGEN_SRCCLK_3_DN
MOD_CLKGEN_SRCCLK_4_DP
MOD_CLKGEN_SRCCLK_4_DN
MOD_CLKGEN_SRCCLK_5_DP
MOD_CLKGEN_SRCCLK_5_DN
62-5%
R9492
1 2
33-5%
R9271
1 2
33-5%
R8673
1 2
33-5%
R8675
1 2
33-5%
R9175
1 2
33-5%
R8948
1 2
33-5%
R8949
1 2
33-5%
R8951
1 2
33-5%
1 2
47.5-1%
R9408
1 2
15-1%
R9424
1 2
47.5-1%
R9426
1 2
47.5-1%
R9406
1 2
15-1%
21
R8677
1 2
220-5%
R8676
1 2
33-5%
R8671
1 2
33-5%
R8672
1 2
33-5%
R8674
1 2
33-5%
R9174
1 2
33-5%
R8946
1 2
33-5%
R8947
1 2
33-5%
R8950
1 2
33-5%
R9428
1 2
R9409
1 2
15-1%
R9429
1 2
R9407
1 2
15-1%
261-1%
CK_200M_CPU1_C_DN
CK_200M_NH_C_DP
CK_200M_NH_C_DN
CK_200M_CPU2_C_DP
261-1%
CK_200M_CPU2_C_DN
CK_200M_SH_C_DP
CK_200M_SH_C_DN
CK_48M_SH_USB
NOTE: USB Clock is 2.5V, not 3.3V
CK_33M_SMARTVU
CK_33M_SH
14
22
22
18
18
53
53
49
45,55
51
CK_14M_SH
CK_14M_SIO
CK_100M_PCIE_NH_A_DP
CK_100M_PCIE_NH_A_DN
CK_100M_PCIE_NH_B_DP
CK_100M_PCIE_NH_B_DN
CK_100M_PCIE_PEX_C_DN
CK_100M_PCIE_LOM1_DP
CK_100M_PCIE_LOM1_DN
CK_100M_PCIE_LOM2_DP
CK_100M_PCIE_LOM2_DN
CK_100M_PCIE_ROMB_DP
CK_100M_PCIE_ROMB_DN
R8621
1 2
8.2K-5%
R8620
1 2
8.2K-5%
R8618
1 2
8.2K-5%
+3.3V
REPLACE
45,51
66
24
24
24
24
29
29
81
81
83
83
70
70
2
3
4
FREQUENCY
FS2 FS1 FS0 CPU MHz
0 0
0 0
10
0 1 1
1 0
1
1 0
1
0
1
1
0
1
0
0
1
1
Hi-Z
X/6
180.00
220.00
100.00
133.33
166.67
200.00
45
Default Strapping
Spread Spectrum Clock Enabled
Can be Disabled through SMBus
MOD_CLKGEN_SSC_EN
Debug Jumper for Disable SSC
R8624
1 2
8.2K-5%
R8623
NP
1 2
8.2K-5%
NP
1 2
J7
X
X
+3.3V
REPLACE
SMBUS ADDRESS 0xD2
FS3=1 CPU OverClock Enable
FS3=0 CPU OverClock Disable
45,55
45,51
CK_33M_SMARTVU
CK_14M_SH
FS0
R9240
NP
1 2
8.2K-5%
R8817
1 2
8.2K-5%
R8818
NP
1 2
8.2K-5%
X
X
+3.3V
REPLACE
R8627
1 2
R4197
49.9-1%
1 2
R8625
49.9-1%
1 2
R8626
49.9-1%
1 2
R8823
49.9-1%
1 2
R8826
49.9-1%
1 2
ROOM=CLOCK_ICS932S805
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
R9094
49.9-1%
1 2
R9093
49.9-1%
1 2
R8824
49.9-1%
1 2
R8825
49.9-1%
1 2
R8827
49.9-1%
1 2
R8828
49.9-1%
1 2
TITLE
DWG NO.
DATE
49.9-1%
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 45 OF 144
DB410B, DB1200, DB800
SEC
CK
41
4
C
DBA
Page 46
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
3
4
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
CK
DB410B, DB1200, DB800
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 46 OF 144
DBA
42
4
Page 47
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
3
4
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
CK
DB410B, DB1200G, DB800
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DBA
43
4
REV.
X01
47 OF 14410/20/2006
Page 48
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
CK
DB410B, DB1900G, DB800
SEC
44
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 48 OF 144
DCBA
4
Page 49
A B C
D
1
2
3
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
NC_MOD_SB_PCIX_133M_AD0
NC_MOD_SB_PCIX_133M_AD1
NC_MOD_SB_PCIX_133M_AD2
NC_MOD_SB_PCIX_133M_AD3
NC_MOD_SB_PCIX_133M_AD4
NC_MOD_SB_PCIX_133M_AD5
NC_MOD_SB_PCIX_133M_AD6
NC_MOD_SB_PCIX_133M_AD7
NC_MOD_SB_PCIX_133M_AD8
NC_MOD_SB_PCIX_133M_AD9
NC_MOD_SB_PCIX_133M_AD10
NC_MOD_SB_PCIX_133M_AD11
NC_MOD_SB_PCIX_133M_AD12
NC_MOD_SB_PCIX_133M_AD13
NC_MOD_SB_PCIX_133M_AD14
NC_MOD_SB_PCIX_133M_AD15
NC_MOD_SB_PCIX_133M_AD16
NC_MOD_SB_PCIX_133M_AD17
NC_MOD_SB_PCIX_133M_AD18
NC_MOD_SB_PCIX_133M_AD19
NC_MOD_SB_PCIX_133M_AD20
NC_MOD_SB_PCIX_133M_AD21
NC_MOD_SB_PCIX_133M_AD22
NC_MOD_SB_PCIX_133M_AD23
NC_MOD_SB_PCIX_133M_AD24
NC_MOD_SB_PCIX_133M_AD25
NC_MOD_SB_PCIX_133M_AD26
NC_MOD_SB_PCIX_133M_AD27
NC_MOD_SB_PCIX_133M_AD28
NC_MOD_SB_PCIX_133M_AD29
NC_MOD_SB_PCIX_133M_AD30
NC_MOD_SB_PCIX_133M_AD31
MOD_SH_PCIX_133M_AD32
MOD_SH_PCIX_133M_AD33
MOD_SH_PCIX_133M_AD34
MOD_SH_PCIX_133M_AD35
MOD_SH_PCIX_133M_AD36
MOD_SH_PCIX_133M_AD37
MOD_SH_PCIX_133M_AD38
MOD_SH_PCIX_133M_AD39
MOD_SH_PCIX_133M_AD40
MOD_SH_PCIX_133M_AD41
MOD_SH_PCIX_133M_AD42
MOD_SH_PCIX_133M_AD43
MOD_SH_PCIX_133M_AD44
MOD_SH_PCIX_133M_AD45
MOD_SH_PCIX_133M_AD46
MOD_SH_PCIX_133M_AD47
MOD_SH_PCIX_133M_AD48
MOD_SH_PCIX_133M_AD49
MOD_SH_PCIX_133M_AD50
MOD_SH_PCIX_133M_AD51
MOD_SH_PCIX_133M_AD52
MOD_SH_PCIX_133M_AD53
MOD_SH_PCIX_133M_AD54
MOD_SH_PCIX_133M_AD55
MOD_SH_PCIX_133M_AD56
MOD_SH_PCIX_133M_AD57
MOD_SH_PCIX_133M_AD58
MOD_SH_PCIX_133M_AD59
MOD_SH_PCIX_133M_AD60
MOD_SH_PCIX_133M_AD61
MOD_SH_PCIX_133M_AD62
MOD_SH_PCIX_133M_AD63
NC_MOD_SB_PCIX_133M_CBE0_N
NC_MOD_SB_PCIX_133M_CBE1_N
NC_MOD_SB_PCIX_133M_CBE2_N
NC_MOD_SB_PCIX_133M_CBE3_N
MOD_SH_PCIX_133M_CBE4_N
MOD_SH_PCIX_133M_CBE5_N
MOD_SH_PCIX_133M_CBE6_N
MOD_SH_PCIX_133M_CBE7_N
MOD_SH_PCIX_133M_FRAME_N
MOD_SH_PCIX_133M_IRDY_N
MOD_SH_PCIX_133M_DEVSEL_N
MOD_SH_PCIX_133M_TRDY_N
MOD_SH_PCIX_133M_STOP_N
MOD_SH_PCIX_133M_PERR_N
MOD_SH_PCIX_133M_SERR_N
NC_MOD_SH_PCIX_133M_PAR
MOD_SH_PCIX_133M_REQ64_N
MOD_SH_PCIX_133M_ACK64_N
MOD_SH_PCIX_133M_PAR64
MOD_SH_PCIX_133M_LOCK_N
NC_MOD_SH_PCIX_133M_RST_OUT
E3
K5
E1
K3
E2
J6
D1
J4
J5
C2
H5
B1
G4
A2
G5
B3
A5
E6
C5
D5
A6
E7
B7
C6
A7
E8
C7
F7
A8
C8
B9
D9
R3
U3
R1
V4
R2
U5
P1
U4
N3
T5
N1
T3
N2
R6
M1
R5
L3
R4
L1
P5
L2
P3
K1
N6
J3
N5
J1
N4
J2
M5
H1
M3
C1
F3
C4
D7
L6
G1
L5
G2
B5
E5
D3
A4
C3
E4
G6
A3
F1
L4
G3
F5
A10
PCIX_AD0
PCIX_AD1
PCIX_AD2
PCIX_AD3
PCIX_AD4
PCIX_AD5
PCIX_AD6
PCIX_AD7
PCIX_AD8
PCIX_AD9
PCIX_AD10
PCIX_AD11
PCIX_AD12
PCIX_AD13
PCIX_AD14
PCIX_AD15
PCIX_AD16
PCIX_AD17
PCIX_AD18
PCIX_AD19
PCIX_AD20
PCIX_AD21
PCIX_AD22
PCIX_AD23
PCIX_AD24
PCIX_AD25
PCIX_AD26
PCIX_AD27
PCIX_AD28
PCIX_AD29
PCIX_AD30
PCIX_AD31
PCIX_AD32
PCIX_AD33
PCIX_AD34
PCIX_AD35
PCIX_AD36
PCIX_AD37
PCIX_AD38
PCIX_AD39
PCIX_AD40
PCIX_AD41
PCIX_AD42
PCIX_AD43
PCIX_AD44
PCIX_AD45
PCIX_AD46
PCIX_AD47
PCIX_AD48
PCIX_AD49
PCIX_AD50
PCIX_AD51
PCIX_AD52
PCIX_AD53
PCIX_AD54
PCIX_AD55
PCIX_AD56
PCIX_AD57
PCIX_AD58
PCIX_AD59
PCIX_AD60
PCIX_AD61
PCIX_AD62
PCIX_AD63
PCIX_CBE_L0
PCIX_CBE_L1
PCIX_CBE_L2
PCIX_CBE_L3
PCIX_CBE_L4
PCIX_CBE_L5
PCIX_CBE_L6
PCIX_CBE_L7
PCIX_FRAME_L
PCIX_IRDY_L
PCIX_DEVSEL_L
PCIX_TRDY_L
PCIX_STOP_L
PCIX_PERR_L
PCIX_SERR_L
PCIX_PAR
PCIX_REQ64_L
PCIX_ACK64_L
PCIX_PAR64
PCIX_LOCK_L
PCIX_RST_OUT
U_SB
PCI-X
SATA_TXDP1
SATA_TXDN1
SATA_TXDP2
SATA_TXDN2
SATA_TXDP3
SATA_TXDN3
SATA_TXDP4
SATA_TXDN4
SATA_RXDP1
SATA_RXDN1
SATA_RXDP2
SATA_RXDN2
SATA_RXDP3
SATA_RXDN3
SATA_RXDP4
SATA_RXDN4
SATA_XTALI
SATA_XTALO
SATA_XTALVDD
SATA_PLLTEST
SATA_FSTEST
SATA_GPIO0
SATA_GPIO1
SATA_GPIO2
SATA_GPIO3
S_TST_EN0
S_TST_EN1
USB1P
USB1N
USB2P
USB2N
USB3P
USB3N
USB4P
USB4N
USB_MONCDR
USB_MONPLL
USB_OVRCUR
USB_PWREN
USB_RREF
T26
T25
U26
U25
V26
V25
W26
W25
R22
R23
T22
T23
U23
U22
V23
V22
P25
P26
P21
N23
N24
L26
L24
M26
M25
M22
M24
AB2
AB1
Y5
Y4
AC2
AC1
AA5
AA4
Y3
Y6
AE2
AF2
W3
MOD_SH_SATA_0_TX_C_DP
MOD_SH_SATA_0_TX_C_DN
MOD_SH_SATA_1_TX_C_DP
MOD_SH_SATA_1_TX_C_DN
TP_MOD_SH_SATA_2_TX_DP
TP_MOD_SH_SATA_2_TX_DN
TP_MOD_SH_SATA_3_TX_DP
TP_MOD_SH_SATA_3_TX_DN
MOD_SH_SATA_0_RX_C_DP
MOD_SH_SATA_0_RX_C_DN
MOD_SH_SATA_1_RX_C_DP
MOD_SH_SATA_1_RX_C_DN
TP_MOD_SH_SATA_2_RX_DP
TP_MOD_SH_SATA_2_RX_DN
TP_MOD_SH_SATA_3_RX_DP
TP_MOD_SH_SATA_3_RX_DN
MOD_SH_SATA_XTAL1
MOD_SH_SATA_XTAL0
MOD_SB_SATA_XTALVDD
TP_MOD_SB_SATA_PLLTEST
TP_MOD_SB_SATA_FSTEST
MOD_SB_SATA_GPIO0
MOD_SB_SATA_GPIO1
MOD_SB_SATA_GPIO2
MOD_SB_SATA_GPIO3
RAC_CONN_USB20_DP
RAC_CONN_USB20_DN
MOD_SH_USB_P2_DP
MOD_SH_USB_P2_DN
MOD_SH_USB_P3_DP
MOD_SH_USB_P3_DN
MOD_SH_USB_P4_DP
MOD_SH_USB_P4_DN
TP_MOD_SH_USB_MONCDR
TP_MOD_SH_USB_MONPLL
MOD_SB_USB_OVRCUR
NC_USB_PWREN
MOD_SB_USB_RREF
C8663
1 2
132
132
132
132
X00_DT9856_km
132
132
132
132
L1821
1 2
68nH 600mA
4.7uF
6.3V-10%
49
49
49
49
R8720
1 2
4.7K-5%
92
92
58
58
58
58
70
70
R8743
1 2
10K-1%
C8753
1 2
15pF
50V-5%
R8719
1 2
4.7K-5%
+2.5V
REPLACE
C8689
58
Output
Input
Input/Output
Series resistor
Series resistor with pull-down
Defaults outputting low
Defaults outputting high
VAux rail
VBat rail
Open-drain
1
Intel recommended NC
U8015
PCIIRQ_VIDEO
PCIIRQ_L6
PCIIRQ_L2
PCIIRQ_L4
PCIIRQ_L3
PCIIRQ_L5
PCIIRQ_L1
PCIIRQ_L0
SER_PCI_IRQ15_0
NC_QH_N_PIN7
49,98
49
25,49
25,49
25,49
49
25,49
25,49
49,50
21
C9541
X13
1 2
25MHz
22pF
50V-5%
21
C9542
22pF
50V-5%
+3.3V
REPLACE
49
53
MOD_SB_PIRQ_LATCH
PCI_IRQ_CLK
R9097
2.7K-5%
.1uF
1 2
C9303
16V-10%
QH
11
A
12
B
13
C
14
D
3
E
4
F
5
G
6
H
9
7
1
SH/LD_N
15
CLK_INH
2
CLK
21
10
16
SER
VCC
8
GND
QH_N
SN74LV165APWR
2
.1uF
1 2
16V-10%
49
49
49
49
49,98
49
49
25,49
25,49
25,49
25,49
25,49
MOD_SB_SATA_GPIO0
MOD_SB_SATA_GPIO1
MOD_SB_SATA_GPIO2
MOD_SB_SATA_GPIO3
PCIIRQ_VIDEO
PCIIRQ_L6
PCIIRQ_L5
PCIIRQ_L4
PCIIRQ_L3
PCIIRQ_L2
PCIIRQ_L1
PCIIRQ_L0
+3.3V
REPLACE
R8926
1 2
R8927
4.7K-5%
1 2
R8925
4.7K-5%
1 2
4.7K-5%
R8928
4.7K-5%
1 2
R8912
1 2
R8914
4.7K-5%
1 2
R8913
4.7K-5%
1 2
R8915
4.7K-5%
1 2
4.7K-5%
R8916
1 2
R8918
4.7K-5%
1 2
R8917
4.7K-5%
1 2
R8919
4.7K-5%
1 2
4.7K-5%
3
21
C9814
.1uF
16V-10%
SOUTH HUB PCIX
4
49
49,50
50
66,67
50
50
50
50
50
MOD_SB_PIRQ_LATCH
SER_PCI_IRQ15_0
PIRQ2_PU
MOD_SB_SER_ISA_IRQ_N
K23
K24
K25
K26
MOD_SH_PCIX_133M_PCIXCAP1
MOD_SH_PCIX_133M_PCIXCAP2
MOD_SH_PCIX_133M_M66EN
MOD_SH_PCIX_133M_REQL0
MOD_SH_PCIX_133M_REQL1
PIRQLATCH
PIRQ1
PIRQ2
ISA_SERIRQ
T1
PCICAP1
U2
PCICAP2
H3
P_M66EN
E9
PCIX_REQ_L0
F9
PCIX_REQ_L1
SB_HT1000
HETERO 1 OF 5
XTALI_USB
XTALO_USB
PCIXCLK2
PCIXCLK1
PCIXCLKFBIN
PCIXCLKFBOUT
PCIX_GNT_L0
PCIX_GNT_L1
Y2
Y1
U1
V2
CK_48M_SH_USB
NC_MOD_SB_XTAL0_USB
MOD_SB_PCIX_133M_CLK2
MOD_SB_PCIX_133M_CLK1
V6
R9125
V1
C9
A9
1 2
22-5%
NC_MOD_SB_PCIX_133M_GNT0_N
NC_MOD_SB_PCIX_133M_GNT1_N
45
R9352
1 2
R9351
1 2
4.7K-5%
4.7K-5%
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
X01
SHEET
10/20/2006 49 OF 144
DBA
4
Page 50
A B C
D
1
+3.3V
REPLACE
R9367
1 2
8.2K-5%
R9369
1 2
8.2K-5%
R9368
1 2
8.2K-5%
R9370
1 2
SER_PCI_IRQ15_0
PIRQ2_PU
MOD_SH_PCIX_133M_REQL0
MOD_SH_PCIX_133M_REQL1
49
49
49
49
Termination Resistors for PCIX
+3.3V
REPLACE
49
49
49
49
49
49
49
49
MOD_SH_PCIX_133M_AD32
MOD_SH_PCIX_133M_AD33
MOD_SH_PCIX_133M_AD34
MOD_SH_PCIX_133M_AD35
MOD_SH_PCIX_133M_AD36
MOD_SH_PCIX_133M_AD37
MOD_SH_PCIX_133M_AD38
MOD_SH_PCIX_133M_AD39
1
RN220
2
3
4
8.2K
1
RN214
2
3
4
8.2K
8
7
6
5
8
7
6
5
+3.3V
REPLACE
1
2
+3.3V
REPLACE
R9371
1 2
8.2K-5%
R9372
1 2
8.2K-5%
R9355
1 2
8.2K-5%
R9357
1 2
8.2K-5%
R9359
1 2
8.2K-5%
R9373
1 2
8.2K-5%
R9356
1 2
8.2K-5%
R9358
1 2
8.2K-5%
MOD_SH_PCIX_133M_PCIXCAP1
MOD_SH_PCIX_133M_PCIXCAP2
MOD_SH_PCIX_133M_M66EN
MOD_SH_PCIX_133M_DEVSEL_N
MOD_SH_PCIX_133M_IRDY_N
MOD_SH_PCIX_133M_FRAME_N
MOD_SH_PCIX_133M_TRDY_N
MOD_SH_PCIX_133M_STOP_N
49
49
49
49
49
49
49
49
49
49
49
49
MOD_SH_PCIX_133M_AD40
MOD_SH_PCIX_133M_AD41
MOD_SH_PCIX_133M_AD42
MOD_SH_PCIX_133M_AD43
49
49
49
49
49
49
49
49
49
49
49
49
MOD_SH_PCIX_133M_AD44
MOD_SH_PCIX_133M_AD45
MOD_SH_PCIX_133M_AD46
MOD_SH_PCIX_133M_AD47
MOD_SH_PCIX_133M_AD48
MOD_SH_PCIX_133M_AD49
MOD_SH_PCIX_133M_AD50
MOD_SH_PCIX_133M_AD51
MOD_SH_PCIX_133M_AD52
MOD_SH_PCIX_133M_AD53
MOD_SH_PCIX_133M_AD54
MOD_SH_PCIX_133M_AD55
1
RN218
2
3
4
8.2K
8
7
6
5
R9387
1 2
8.2K-5%
R9389
1 2
R9388
1 2
8.2K-5%
SH_SLP_S1_L
SH_SLP_S3_L
SH_SLP_S5_L
51
51
51
8.2K-5%
1
RN219
2
3
4
8.2K
1
RN215
2
3
4
8.2K
1
RN216
2
3
4
8.2K
8
7
6
5
51
MOD_SH_IDE_PDDREQ
51
8
51
7
6
51
MOD_SH_IDE_IRQ14_N
MOD_SH_IDE_PDDACK_N
R10117
1 2
0-5%
5
MOD_SH_IDE_PDIORDY
51
51
8
7
6
51
51
51
5
MOD_SH_IDE_PDIOR_N
MOD_SH_IDE_PDIOW_N
MOD_SH_IDE_PDA0
MOD_SH_IDE_PDA1
MOD_SH_IDE_PDA2
R10123
1 2
47-5%
1 2
1 2
R10116
1 2
0-5%
R10124
1 2
47-5%
R10113
0-5%
R10121
47-5%
R10115
1 2
0-5%
R10114
1 2
0-5%
R10122
1 2
47-5%
MOD_SH_IDE_PDIORDY_R
MOD_SH_IDE_PDDREQ_R
MOD_SH_IDE_PDDACK_N_R
MOD_SH_IDE_PDA0_R
MOD_SH_IDE_PDA1_R
MOD_SH_IDE_PDA2_R
R9390
1 2
SLPBTTN
8.2K-5%
MOD_SH_IDE_IRQ14_N_R
MOD_SH_IDE_PDIOR_N_R
MOD_SH_IDE_PDIOW_N_R
70
70
70
70
70
70
70
70
70
51
2
3
8.2K-5%
R9361
1 2
8.2K-5%
R9362
1 2
8.2K-5%
R9364
1 2
8.2K-5%
R9360
1 2
8.2K-5%
R9831
1 2
8.2K-5%
R9363
1 2
8.2K-5%
MOD_SH_PCIX_133M_PERR_N
MOD_SH_PCIX_133M_SERR_N
MOD_SH_PCIX_133M_PAR64
MOD_SH_PCIX_133M_ACK64_N
MOD_SH_PCIX_133M_REQ64_N
MOD_SH_PCIX_133M_LOCK_N
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
MOD_SH_PCIX_133M_AD56
MOD_SH_PCIX_133M_AD57
MOD_SH_PCIX_133M_AD58
MOD_SH_PCIX_133M_AD59
MOD_SH_PCIX_133M_AD60
MOD_SH_PCIX_133M_AD61
MOD_SH_PCIX_133M_AD62
MOD_SH_PCIX_133M_AD63
MOD_SH_PCIX_133M_CBE4_N
MOD_SH_PCIX_133M_CBE5_N
MOD_SH_PCIX_133M_CBE6_N
MOD_SH_PCIX_133M_CBE7_N
R9939
51
1
RN217
2
3
4
8.2K
1
RN221
2
3
4
8.2K
1
RN222
2
3
4
8.2K
8
51
7
6
5
8
51
51
51
51
51
7
6
5
51
51
51
51
8
7
51
6
5
51
51
51
51
MOD_SH_IDE_PDD0
MOD_SH_IDE_PDD1
MOD_SH_IDE_PDD2
MOD_SH_IDE_PDD3
MOD_SH_IDE_PDD4
MOD_SH_IDE_PDD5
MOD_SH_IDE_PDD6
MOD_SH_IDE_PDD7
MOD_SH_IDE_PDD8
MOD_SH_IDE_PDD9
MOD_SH_IDE_PDD10
MOD_SH_IDE_PDD11
MOD_SH_IDE_PDD12
MOD_SH_IDE_PDD13
MOD_SH_IDE_PDD14
MOD_SH_IDE_PDD15
1 2
47-5%
R9941
1 2
47-5%
R9943
1 2
47-5%
R9945
1 2
47-5%
R9947
1 2
47-5%
R9949
1 2
47-5%
R9951
1 2
47-5%
R9953
1 2
47-5%
R9940
1 2
47-5%
R9942
1 2
47-5%
R9944
1 2
47-5%
R9946
1 2
47-5%
R9948
1 2
47-5%
R9950
1 2
47-5%
R9952
1 2
47-5%
R9954
1 2
MOD_SH_IDE_PDD0_R
MOD_SH_IDE_PDD1_R
MOD_SH_IDE_PDD2_R
MOD_SH_IDE_PDD3_R
MOD_SH_IDE_PDD4_R
MOD_SH_IDE_PDD5_R
MOD_SH_IDE_PDD6_R
MOD_SH_IDE_PDD7_R
MOD_SH_IDE_PDD8_R
MOD_SH_IDE_PDD9_R
MOD_SH_IDE_PDD10_R
MOD_SH_IDE_PDD11_R
MOD_SH_IDE_PDD12_R
MOD_SH_IDE_PDD13_R
MOD_SH_IDE_PDD14_R
MOD_SH_IDE_PDD15_R
70
70
70
70
70
70
70
70
70
70
70
70
70
70
3
70
70
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
47-5%
TITLE
DWG NO.
DATE
MODULE:
ESB
DESC:
REV: OF
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE2950
REV.
FP975
X01
SHEET
10/20/2006 50 OF 144
DCBA
4
Page 51
1
2
NP0
0-5%
R9524
12
0-5%
R9547
25,51,138
25,51,55,138
96,138
96,138
96,138
96,138
86,87
66,123,138
66,70
55,66-68,86,96,138
55,66-68,86,96,138
55,66-68,86,96,138
55,66-68,86,96,138
55,66-68,86,96,138
68
51
51
51
58
51
51
51
66
67
67
66
66
51
70
70
NP0
NP0
12
A B C
0-5%
I2C_ISO_BMC_SH_VAUX_SCL
12
R9525
NOTE: place these I2C resistors as close as possible to U_SB
0-5%
R9548
51,55,66
51,55
45
66
66
I2C_ISO_BMC_SH_VAUX_SDA
JP_I2C_DBG_SH_SDA
JP_I2C_DBG_SH_SCL
NP0
12
MOD_LPC_PLANAR_TYPE_0
MOD_SH_GEVENT1_PU
GC_ALERT_N
GC_FATAL_N
MOD_SH_GEVENT4_PU
MOD_SH_GEVENT5_PU
MOD_SH_GEVENT6
MOD_SH_GEVENT7
GPE_NMI_N
MOD_LPC_GPI_BRD_REV0
MOD_LPC_GPI_BRD_REV1
MOD_LPC_GPI_BRD_REV2
MOD_SH_GEVENT12
MOD_SH_GEVENT13
GPE_SOFT_NMI_SMI_SCI1
BMC_SMI_N
HEATSINK_PRES_N
MOD_LPC_GPI_FVS_2_N
MOD_LPC_GPI_FVS_1_N
CTRLPNL_PRES_N
GPE_SOFT_NMI_SMI_SCI2
SIO_SMI_N
SCAN_TEST_MODE
MOD_SH_IDE_PDCS3_N
MOD_SH_IDE_PDCS1_N
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME_N
LPC_LDRQ0_N
LPC_LDRQ1_N
CK_14M_SH
NC_MOD_SH_SPEAKER
KB_A20GATE_N
KB_RST_N
55
55
AB23
AA16
AB16
AA26
AA25
AA24
AB25
AA23
AC24
D24
GEVENT0
D25
GEVENT1
E23
GEVENT2
E24
GEVENT3
E26
GEVENT4
F24
GEVENT5/ROMCS_L
F25
GEVENT6/XRC_L
F26
GEVENT7/XWC_L
G23
GEVENT8/CS0_L
G24
GEVENT9/CS1_L/SMGT_PWOFF
AD3
GEVENT10/CS2_L/WDRST_L
G26
GEVENT11/SMI_L/XTAL2_L/MDO
H21
GEVENT12/NMI_L/XTAL1_L
H22
GEVENT13/INIT_L/XTAL0_L
H23
GEVENT14_PPIRQ0/XAD0
H24
GEVENT15_PPIRQ1/XAD1
H25
GEVENT16_PPIRQ2/XAD2
H26
GEVENT17/PPIRQ3/XAD3
J22
GEVENT18/PPIRQ4/XAD4
J24
GEVENT19/PPIRQ5/XAD5
J26
GEVENT20/PPIRQ6/XAD6
K22
GEVENT21/PPIRQ7/XAD7
SCAN_TEST_MODE
IDE_CS_L1
IDE_CS_L0
LPC_LAD0
LPC_LAD1
LPC_LAD2
Y22
LPC_LAD3
Y21
LPC_FRAME_L
LPC_LDRQ0
LPC_LDRQ1
OSC14MHZ
D26
SPKR
M21
KBD_A20M_L
E22
KBD_INIT_L
91
91
DT11510_change net names_jd
U_SB
IDE_D0
IDE_D1
IDE_D2
IDE_D3
IDE_D4
IDE_D5
IDE_D6
IDE_D7
IDE_D8
IDE_D9
IDE_D10
IDE_D11
IDE_D12
IDE_D13
IDE_D14
IDE_D15
IDE_A0
IDE_A1
IDE_A2
IDE_DMACK_L
IDE_DMARQ
IDE_IRQ14
IDE_IORDY
IDE_IOR_L
IDE_IOW_L
HT_PLL_AVDD
HT_PLL_AGND
HT_PLL_DVDD
HT_PLL_DGND
SATA_FS_AVDD
SATA_FS_AGND
AA18
AD19
AF21
AF22
AD20
AD21
AC20
AB20
AC21
AE22
AF23
AA19
AE20
AC19
AF20
AF19
AC16
AC17
AA17
AD17
AC18
AB18
AE18
AF18
AD18
L16
K16
K15
K14
T17
R17
MOD_SH_IDE_PDD0
MOD_SH_IDE_PDD1
MOD_SH_IDE_PDD2
MOD_SH_IDE_PDD3
MOD_SH_IDE_PDD4
MOD_SH_IDE_PDD5
MOD_SH_IDE_PDD6
MOD_SH_IDE_PDD7
MOD_SH_IDE_PDD8
MOD_SH_IDE_PDD9
MOD_SH_IDE_PDD10
MOD_SH_IDE_PDD11
MOD_SH_IDE_PDD12
MOD_SH_IDE_PDD13
MOD_SH_IDE_PDD14
MOD_SH_IDE_PDD15
SATA_FS_AVDD
50
50
50
50
50
50
50
50,51
50
50
50
50
50
50
50
50
MOD_SH_IDE_PDA0
MOD_SH_IDE_PDA1
MOD_SH_IDE_PDA2
MOD_SH_IDE_PDDACK_N
MOD_SH_IDE_PDDREQ
MOD_SH_IDE_IRQ14_N
MOD_SH_IDE_PDIORDY
MOD_SH_IDE_PDIOR_N
MOD_SH_IDE_PDIOW_N
HT_PLL_AVDD
HT_PLL_DVDD
HT_PLL_DGND
51
50
50
50
50
50,51
50,51
50,51
50
50
51
50,51
50,51
50,51
50,51
MOD_SH_IDE_PDIORDY
MOD_SH_IDE_IRQ14_N
MOD_SH_IDE_PDDREQ
6.3V-10%
4.7uF
SCAN_TEST_MODE
51
4.7K-5%
R9861
MOD_SH_IDE_PDD7
+1.2V_VLDT_SB
C8740
12
6.3V-10%
12
R8718
5.6K-5%
51,54,57,139
+1.2V
REPLACE
4.7uF
C9049
4.7K-5%
R9862
R8723
1 2
10K-5%
21
R8835
12
100-1%
1 2
+3.3V
REPLACE
SATA_PLL_AVDD
51
51
21
C9764
HT_PLL_AVDD
+3.3V
REPLACE
NP
2.7K-5%
8.2K-5%
.1uF
16V-10%
X
21
12
C9447
1 2
C9765
R8761
R8757
4.7uF
21
NP
2.7K-5%
X
21
8.2K-5%
12
6.3V-10%
.1uF
16V-10%
NP
2.7K-5%
R8760
8.2K-5%
R8756
1 2
68nH 600mA
C9443
R8762
X
21
MOD_LPC_GPI_BRD_REV2
MOD_LPC_GPI_BRD_REV1
MOD_LPC_GPI_BRD_REV0
R8758
12
L1841
1 2
4.7uF
1 2
6.3V-10%
25,51,138
25,51,55,138
L1837
68nH 600mA
+1.2V
REPLACE
21
C9486
51
51
51
0.01uF
D
50V-10%
+1.2V_VLDT_SB
21
C9482
0.01uF
000
001
010
011
X00
X01
X02
X03
Board Rev ID
51
51
51
GC_ALERT_N
GC_FATAL_N
MOD_SH_GEVENT1_PU
MOD_SH_GEVENT4_PU
MOD_SH_GEVENT5_PU
50V-10%
R9418
4.7K-5%
1 2
R9419
1 2
51,54,57,139
+3.3V
REPLACE
R9415
1 2
4.7K-5%
4.7K-5%
R9416
1 2
R9417
1 2
4.7K-5%
1
4.7K-5%
2
3
52
52
X01_DTXXXXX
+1.2V
REPLACE
1
2
3
2 1
50
50
50
50
66
C8696
HDR 1X3
J_I2C_SB
I2C_SH_MAIN_SCL
I2C_SH_MAIN_SDA
+1.2V
REPLACE
50V-10%
0.01uF
96,138
96,138
96,138
68nH 600mA
SYSTEM_PWRGOOD_SH
45
L1828
RESET_SB_N
RESET_CF9_N
SH_SLP_S1_L
SH_SLP_S3_L
SH_SLP_S5_L
SLPBTTN
SIO_WAKEUP
CK_33M_SH
TP_MOD_SB_USB_PLLBYPASS
X00_DT9846_km
12
6.3V-10%
4.7uF
12
C8670
C9776
PCI_PLL_AVDD
21
.1uF
16V-10%
AC23
PWGD
AD22
RESET_I_L
AB22
CPU_RST_OUT_L
G22
SCL0
F22
SDA0
L21
SLP_S1_L
L22
SLP_S3_L
L23
SLP_S5_L
N21
SLPBTTN
D23
SIO_WAKEUP
AE24
PCI_PLL_BYPASS
AE1
USB_PLL_BYPASS
T15
PCI_PLL_AVDD
U15
PCI_PLL_AGND
SATA_FS_DVDD
SATA_FS_DGND
SATA_PLL_AVDD
SATA_PLL_AGND
SATA_PLL_DVDD
SATA_PLL_DGND
PCIX_PLL_AVDD
PCIX_PLL_AGND
USB_PLL_AVDD
U16
U17
P17
P16
M17
N17
P11
P10
R10
SATA_PLL_AVDD
PCIX_PLL_AVDD
USB_PLL_AVDD
51
51
SATA_FS_DVDD
SATA_FS_DGND
51
SATA_PLL_DVDD
SATA_PLL_DGND
+1.2V
REPLACE
6.3V-10%
4.7uF
12
C9050
1
+1.2V
REPLACE
51
SATA_FS_AVDD
21
C9773
.1uF
16V-10%
C9444
1 2
1 2
68nH 600mA
4.7uF
6.3V-10%
L1838
21
0.01uF
50V-10%
3
+1.2V
REPLACE
51
USB_PLL_AVDD
C9774
L1839
1 2
68nH 600mA
21
1 2
4.7uF
6.3V-10%
C9445
.1uF
16V-10%
21
C9484
0.01uF
50V-10%
4
50V-10%
0.01uF
2 1
C8697
L1829
68nH 600mA
+2.5V
REPLACE
50V-10%
0.01uF
12
2 1
6.3V-10%
4.7uF
C8698
USB_VDD12
21
C8671
C9778
12
L1830
68nH 600mA
.1uF
16V-10%
12
6.3V-10%
4.7uF
12
U10
W5
C8672
USB_VDD12
USB_VDD25
21
C9777
.1uF
16V-10%
SB_HT1000
HETERO 3 OF 5
USB_PLL_AGND
USB_VDD3_1
USB_VDD3_2
USB_VDD3_3
USB_VDD3_4
USB_VDD3_5
T10
W2
AA2
AB3
AB5
AD2
C9786
SOUTH HUB
+1.2V
L1840
PCIX_PLL_AVDD
51
21
+3.3V
REPLACE
1 2
21
.1uF
21
C9784
16V-10%
.1uF
16V-10%
21
C9783
.1uF
16V-10%
21
C9787
.1uF
21
C9785
16V-10%
.1uF
21
C8669
16V-10%
10uF 6.3V
L1851
68nH 600mA
21
C8695
0.01uF
50V-10%
+3.3V
REPLACE
R10137
1 2
4.7K-5%
R10138
1 2
C9775
4.7K-5%
C9446
.1uF
16V-10%
1 2
1 2
68nH 600mA
4.7uF
6.3V-10%
21
C9485
0.01uF
50V-10%
REPLACE
MODULE:
DESC:
REV: OF
SEC
ESB
4
51,55,66
51,55
LPC_LDRQ0_N
LPC_LDRQ1_N
INC.
X01_DTXXXXX
TITLE
SCHEM,PLN,SV,PE_BULN
ROUND ROCK,TEXAS
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
FP975
DCBA
REV.
X01
SHEET
51 OF 14410/20/2006
Page 52
1
A B C
+3.3V
REPLACE
+3.3V
REPLACE
4.7K-5%
+3.3V
REPLACE
R9528
100K-5%
1 2
100K-5%
I2C_SH_MAIN_SDA
I2C_SH_MAIN_SCL
51,52
51,52
+3.3V
REPLACE
21
C8875
.1uF
16V-10%
21
C8876
.1uF
16V-10%
52,66
52,66
R8784
4.7K-5%
R8786
4.7K-5%
R8788
I2C_SIO_CHNL_SEL0
I2C_SIO_CHNL_SEL1
4.7K-5%
R8773
4.7K-5%
R8777
4.7K-5%
R8778
12
12
12
4.7K-5%
R8776
4.7K-5%
R8770
4.7K-5%
R8772
4.7K-5%
R8769
66
52,66
52,66
85
45
29
I2C_NH_SDA
25
85
45
29
I2C_NH_SCL
25
12
4.7K-5%
R8775
4.7K-5%
12
R8771
4.7K-5%
12
R8779
12
GPO_I2C_MUX_SEL0
I2C_SIO_CHNL_SEL0
I2C_SIO_CHNL_SEL1
I2C_TOE_SDA
I2C_CLKGEN_SDA
I2C_PEX_SDA
I2C_TOE_SCL
I2C_CLKGEN_SCL
I2C_PEX_SCL
12
12
12
R8809
1 2
0-5%
R8810
1 2
0-5%
+3.3V
REPLACE
R8768
1 2
4.7K-5%
1
15
14
2
3
4
5
6
13
12
11
10
U8004
EA_N
EB_N
S0
S1
IA3
IA2
IA1
IA0
IB3
IB2
IB1
IB0
PI3B3253QE
VCC
GND
YA
YB
16
8
7
9
R9527
1 2
R8793
1 2
0-5%
R8794
1 2
0-5%
12
4.7K-5%
R8783
12
12
12
4.7K-5%
R8787
GPO_I2C_MUX_SEL1
66
67
52
52
67
52
52
4.7K-5%
R8782
12
12
I2C_TPM_SDA
I2C_P2_DIMM_SDA
I2C_P1_DIMM_SDA
I2C_TPM_SCL
I2C_P2_DIMM_SCL
I2C_P1_DIMM_SCL
4.7K-5%
R8781
4.7K-5%
R8785
D
12
1
+3.3V
REPLACE
12
+3.3V
REPLACE
R8780
1 2
4.7K-5%
1
15
14
2
3
4
5
6
13
12
11
10
U8005
EA_N
EB_N
S0
S1
IA3
IA2
IA1
IA0
IB3
IB2
IB1
IB0
PI3B3253QE
VCC
GND
YA
YB
16
8
7
9
R8795
1 2
0-5%
R8796
1 2
0-5%
I2C_SH_MAIN_SDA
I2C_SH_MAIN_SCL
51,52
51,52
21
C8873
.1uF
16V-10%
21
C8874
.1uF
16V-10%
2
U8004 Truth Table
Enable Select
Ea
H
X
L
L
L
L
Eb
X
H
L
L
L
L
S1 S0
X
X
L
L
H
H
2
U80045Truth Table
Enable Select
Ya
X
X
L
H
L
H
Hi-Z
X
IA0
IA1
IA2
IA3
Yb
Hi-Z
IB0
IB1
IB2
IB3
Ea
X
HT2100
PCIe switch
clock gen
TOE
H
X
L
L
L
L
Eb
X
H
L
L
L
L
S1 S0
X
X
L
L
H
H
X
X
L
H
L
H
Ya
Hi-Z
X
IA0
IA1
IA2
IA3
Yb
Hi-Z
IB0
IB1
IB2
IB3
X
P1 DIMMS
P2 DIMMS
TPM
3
36
36
37
37
37
36
36
37
I2C_P2_DIMM5_SDA
I2C_P2_DIMM6_SDA
I2C_P2_DIMM7_SDA
I2C_P2_DIMM8_SDA
I2C_P2_DIMM5_SCL
I2C_P2_DIMM6_SCL
I2C_P2_DIMM7_SCL
I2C_P2_DIMM8_SCL
R9396
1 2
0-5%
R8805
1 2
0-5%
R9397
1 2
0-5%
R8808
1 2
0-5%
R8804
1 2
0-5%
R8803
1 2
0-5%
R8807
1 2
0-5%
R8806
1 2
0-5%
I2C_P2_DIMM_SDA
I2C_P2_DIMM_SCL
52
52
32
32
33
33
32
32
33
33
I2C_P1_DIMM1_SDA
I2C_P1_DIMM2_SDA
I2C_P1_DIMM3_SDA
I2C_P1_DIMM4_SDA
I2C_P1_DIMM1_SCL
I2C_P1_DIMM2_SCL
I2C_P1_DIMM3_SCL
I2C_P1_DIMM4_SCL
R9398
1 2
0-5%
R8799
1 2
0-5%
R9399
1 2
0-5%
R8802
1 2
0-5%
R8797
1 2
0-5%
R8798
1 2
0-5%
R8801
1 2
0-5%
R8800
1 2
0-5%
I2C_P1_DIMM_SDA
I2C_P1_DIMM_SCL
52
3
52
4
I2C MUX
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
ESB
DESC:
REV: OF
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
X01
SHEET
10/20/2006 52 OF 144
DCBA
4
Page 53
1
2
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
98
53,98
53,98
53,98
53,98
53,98
53
53
53,98
53
96,138
53
53
53,98
53
A B C
U_SB
PCI32_AD0
PCI32_AD1
PCI32_AD2
PCI32_AD3
PCI32_AD4
PCI32_AD5
PCI32_AD6
PCI32_AD7
PCI32_AD8
PCI32_AD9
PCI32_AD10
PCI32_AD11
PCI32_AD12
PCI32_AD13
PCI32_AD14
PCI32_AD15
PCI32_AD16
PCI32_AD17
PCI32_AD18
PCI32_AD19
PCI32_AD20
PCI32_AD21
PCI32_AD22
PCI32_AD23
PCI32_AD24
PCI32_AD25
PCI32_AD26
PCI32_AD27
PCI32_AD28
PCI32_AD29
PCI32_AD30
PCI32_AD31
PCI32_CBE0_N
PCI32_CBE1_N
PCI32_CBE2_N
PCI32_CBE3_N
PCI32_FRAME_N
PCI32_IRDY_N
PCI32_DEVSEL_N
PCI32_TRDY_N
PCI32_STOP_N
MOD_SH_PCI32_PERR_N
MOD_SH_PCI32_SERR_N
PCI32_PAR
MOD_SH_PCI32_PLOCK_N
SB_PCI_RST_N
MOD_SH_PU_PREQ1_N
MOD_SH_PU_PREQ2_N
PCI32_PREQ3_N
MOD_SH_PU_PREQ4_N
AC14
PCI_AD00
AE16
PCI_AD01
AA13
PCI_AD02
AF16
PCI_AD03
AD14
PCI_AD04
AD15
PCI_AD05
AA12
PCI_AD06
AF15
PCI_AD07
AE15
PCI_AD08
AC13
PCI_AD09
AF14
PCI_AD10
AD13
PCI_AD11
AF13
PCI_AD12
AC12
PCI_AD13
AE13
PCI_AD14
AD12
PCI_AD15
AD10
PCI_AD16
AE9
PCI_AD17
AA10
PCI_AD18
AF8
PCI_AD19
AC9
PCI_AD20
AD7
PCI_AD21
AA9
PCI_AD22
AF7
PCI_AD23
AD8
PCI_AD24
AF6
PCI_AD25
AC8
PCI_AD26
AD5
PCI_AD27
AB8
PCI_AD28
AF5
PCI_AD29
AC7
PCI_AD30
AE5
PCI_AD31
AB12
PCI_CBE_L0
AF12
PCI_CBE_L1
AF9
PCI_CBE_L2
AE7
PCI_CBE_L3
AC10
PCI_FRAME_L
AD9
PCI_IRDY_L
AF10
PCI_DEVSEL_L
AB10
PCI_TRDY_L
AC11
PCI_STOP_L
AF11
PCI_PERR_L
AD11
PCI_SERR_L
AA11
PCI_PAR
AE11
PCI_LOCK_L
AB14
PCI_RST_O
AF3
PCI_REQ_L1
AF4
PCI_REQ_L2
AE3
PCI_REQ_L3
AD4
PCI_REQ_L4
HT_CADIN_L0
HT_CADIN_H0
HT_CADIN_L1
HT_CADIN_H1
HT_CADIN_L2
HT_CADIN_H2
HT_CADIN_L3
HT_CADIN_H3
HT_CADIN_L4
HT_CADIN_H4
HT_CADIN_L5
HT_CADIN_H5
HT_CADIN_L6
HT_CADIN_H6
HT_CADIN_L7
HT_CADIN_H7
HT_CLKIN_L
HT_CLKIN_H
HT_CLTIN_L
HT_CTLIN_H
HT_CADOUT_L0
HT_CADOUT_H0
HT_CADOUT_L1
HT_CADOUT_H1
HT_CADOUT_L2
HT_CADOUT_H2
HT_CADOUT_L3
HT_CADOUT_H3
HT_CADOUT_L4
HT_CADOUT_H4
HT_CADOUT_L5
HT_CADOUT_H5
HT_CADOUT_L6
HT_CADOUT_H6
HT_CADOUT_L7
HT_CADOUT_H7
E20
F20
D19
E19
E18
F18
E17
F17
E15
F15
E14
F14
E13
D13
F12
E12
D16
E16
F11
E11
A16
B16
A17
B17
A18
B18
A19
B19
B21
A21
B22
A22
B23
A23
B24
A24
HT_AD_NBLB_SBL0_0_DN
HT_AD_NBLB_SBL0_0_DP
HT_AD_NBLB_SBL0_1_DN
HT_AD_NBLB_SBL0_1_DP
HT_AD_NBLB_SBL0_2_DN
HT_AD_NBLB_SBL0_2_DP
HT_AD_NBLB_SBL0_3_DN
HT_AD_NBLB_SBL0_3_DP
HT_AD_NBLB_SBL0_4_DN
HT_AD_NBLB_SBL0_4_DP
HT_AD_NBLB_SBL0_5_DN
HT_AD_NBLB_SBL0_5_DP
HT_AD_NBLB_SBL0_6_DN
HT_AD_NBLB_SBL0_6_DP
HT_AD_NBLB_SBL0_7_DN
HT_AD_NBLB_SBL0_7_DP
HT_CL_NBLB_SBL0_0_DN
HT_CL_NBLB_SBL0_0_DP
HT_CT_NBLB_SBL0_0_DN
HT_AD_SBL0_NBLB_0_DN
HT_AD_SBL0_NBLB_0_DP
HT_AD_SBL0_NBLB_1_DN
HT_AD_SBL0_NBLB_1_DP
HT_AD_SBL0_NBLB_2_DN
HT_AD_SBL0_NBLB_2_DP
HT_AD_SBL0_NBLB_3_DN
HT_AD_SBL0_NBLB_3_DP
HT_AD_SBL0_NBLB_4_DN
HT_AD_SBL0_NBLB_4_DP
HT_AD_SBL0_NBLB_5_DN
HT_AD_SBL0_NBLB_5_DP
HT_AD_SBL0_NBLB_6_DN
HT_AD_SBL0_NBLB_6_DP
HT_AD_SBL0_NBLB_7_DN
HT_AD_SBL0_NBLB_7_DP
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
SB STRAPPING
GNT1X: MOD_SH_PGNT1_N
1 = Delay spinning of SATA Drv
0= Sim Spin of all SATA Drv
GNT2X: MOD_SH_PGNT2_N
0= ROM on XBUS enable
1= ROM on LPC
GNT3X: PCI32_GNT3_N
0=PCIX 133 MHz
1= PCIX 100 Mhaz
PCIGNT4: MOD_SH_PGNT4_N
0= SB1 test mode
1 = SB1 functional mode
53,98
53
MOD_SH_PGNT2_N
53
53
MOD_SH_PGNT4_N
MOD_SH_PGNT1_N
PCI32_GNT3_N
R9879
1 2
NP
R9883
X
1 2
R9880
1 2
8.2K-5%
8.2K-5%
NP
R9885
X
1 2
8.2K-5%
NP
R9881
X
1 2
8.2K-5%
R9886
1 2
+3.3V
REPLACE
R9882
1 2
8.2K-5%
NP
R9884
X
1 2
8.2K-5%
8.2K-5%
8.2K-5%
+3.3V
REPLACE
R8533
1 2
8.2K-5%
R8530
1 2
8.2K-5%
R8524
1 2
8.2K-5%
R8522
1 2
8.2K-5%
R8520
1 2
8.2K-5%
R8519
1 2
8.2K-5%
R8759
1 2
8.2K-5%
R8529
1 2
8.2K-5%
R8531
1 2
8.2K-5%
R8523
1 2
8.2K-5%
R8521
1 2
8.2K-5%
R8518
1 2
8.2K-5%
R8517HT_CT_NBLB_SBL0_0_DP
1 2
8.2K-5%
PCI32_STOP_N
MOD_SH_PCI32_PERR_N
MOD_SH_PCI32_SERR_N
PCI32_FRAME_N
MOD_SH_PCI32_PLOCK_N
PCI32_TRDY_N
PCI32_IRDY_N
PCI32_DEVSEL_N
MOD_SH_PU_PREQ4_N
MOD_SH_PU_PREQ2_N
MOD_SH_PU_PREQ1_N
PCI32_PREQ3_N
PCI32_PAR
D
53,98
53
53
1
53,98
53
53,98
53,98
53,98
53
53
53
53,98
53,98
2
3
86
53
66
138
+2.5V
REPLACE
CK_33M_BMC
PCICLK_BUFF
CK_33M_SIO
CK_33M_CPLD
R9126
1 2
22-5%
53
53
53,98
53
1 2
53
53
MOD_SH_PGNT1_N
MOD_SH_PGNT2_N
PCI32_GNT3_N
MOD_SH_PGNT4_N
R9905
1 2
22-5%
R9906
22-5%
1 2
CK_200M_SH_DP
CK_200M_SH_DN
PCICLK_FB_OUT
R9904
22-5%
PCICLK_FB_IN
R9907
1 2
22-5%
AD6
PCI_GNT_L1
AA8
PCI_GNT_L2
AC6
PCI_GNT_L3
AC5
PCI_GNT_L4
AC26
PCICLK1
AD26
PCICLK2
AD25
PCICLK3
AE26
PCICLK4
AD23
PCICLKFBIN
A12
HT_REFCLK_P
B12
HT_REFCLK_N
AF25
PCICLKFBOUT
F21
VLDT25
SB_HT1000
HETERO 2 OF 5
HT_CLKOUT_L
HT_CLKOUT_H
HT_CLTOUT_L
HT_CTLOUT_H
HT_LDSTOP_L
HT_CALRN
HT_CAL_RP
HT_PLLTEST_N
HT_PLLTEST_P
HT_RXVDD25
C20
B20
B25
A25
D22
B13
A13
B14
A14
K13
1 2
C8614
1 2
HT_CK_SBL0_NBLB_0_DN
HT_CK_SBL0_NBLB_0_DP
HT_CT_SBL0_NBLB_0_DN
HT_CT_SBL0_NBLB_0_DP
SH_LDTSTOP_CPLD_N
R8585
475-1%
NC_MOD_SB_TP0
NC_MOD_SB_TP1
L1852
1 2
68nH 600mA
4.7uF
6.3V-10%
96,138
21
C9227
+2.5V
REPLACE
.1uF
10V-10%
23
23
23
23
53
+3.3V
REPLACE
PCICLK_BUFF
CLKIN
1
CLKOUT
8
GND
4
VDD3.3V
6
U8011
1Y_0
1Y_1
1Y_2
1Y_3
PCI_IRQ_CLK
CK_33M_TPM
CK_33M_FWH
CK_33M_VIDEO
49
67
68
98
3
R8864
3
2
5
7
22-5%
1 2
R8866
1 2
R8863
22-5%
22-5%
1 2
R8865
22-5%
1 2
4
45
45
CK_200M_SH_C_DP
CK_200M_SH_C_DN
C8938
21
0.01uF
50V-10%
C9351
21
0.01uF
50V-10%
R8792
1 2
150-1%
R8763
1 2
100-1%
R9098
1 2
100-1%
CK_200M_SH_DP
CK_200M_SH_DN
53
53
SOUTH HUB PCI and NT HT CONNECTION
SCHEM,PLN,SV,PE_BULN
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
NP
1uF 6.3V
1 2
C9014
X
21
C9229
.1uF
10V-10%
CLOCK DRIVER
CDCVF2505
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
ESB
SEC
4
REV.
X01
53 OF 14410/20/2006
DCBA
Page 54
A B C
D
1
2
3
+1.2V
REPLACE
ROOM = SB
+3.3V
REPLACE
D4
VDD3_1
D8
VDD3_2
F6
VDD3_3
F8
VDD3_4
F23
VDD3_5
H4
VDD3_6
H6
VDD3_7
J23
VDD3_8
K6
VDD3_9
M4
VDD3_10
M6
VDD3_11
M23
VDD3_12
P6
VDD3_13
T4
VDD3_14
T6
VDD3_15
V3
VDD3_16
Y23
VDD3_17
AB7
VDD3_18
AB9
VDD3_19
AB11
VDD3_20
AB13
VDD3_21
AB15
VDD3_22
AB17
VDD3_23
AB19
VDD3_24
AB21
VDD3_25
AB24
VDD3_26
AC4
VDD3_27
AD24
VDD3_28
AE25
VDD3_29
K11
VCORE1
L12
VCORE2
L14
VCORE3
M11
VCORE4
M13
VCORE5
M15
VCORE6
N10
VCORE7
N12
VCORE8
N14
VCORE9
N16
VCORE10
P13
VCORE11
P15
VCORE12
R12
VCORE13
R14
VCORE14
R16
VCORE15
T11
VCORE16
T13
VCORE17
U_SB
SB_HT1000
HETERO 4 OF 5
VLDT2
VLDT3
VLDT4
VLDT5
VLDT6
VLDT7
VLDT8
VLDT9
VLDT10
VESD_1
VESD_2
VESD_3
VESD_4
VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5
RSVD1
RSVD2
VSATA_1
VSATA_2
VSATA_3
VSATA_4
VSATA_5
VSATA_6
VSATA_7
VSATA_8
VSATA_9
A11
A15
B26
C15
C22
C24
D10
D21
F10
J21
AA7
AA15
AA20
K17
L10
U12
U14
W21
B10
AA22
P22
P24
R25
T24
U21
V24
W23
Y24
Y26
+3.3V
REPLACE
+2.5V
REPLACE
NC_RSVD1_B10
NC_RSVD2_AA22
C9015
+1.2V_VLDT_SB
21
10uF
1 2
C9199
1uF 6.3V
16V 10%
21
C9614
C9613
.1uF
10V-10%
21
51,57,139
.1uF
10V-10%
21
C9612
21
C9231
.1uF
10V-10%
.1uF
10V-10%
21
C9615
R9544
0 OHM-5%
.1uF
10V-10%
21
C9066
21
21
C9230
10uF
16V 10%
+1.2V
REPLACE
.1uF
10V-10%
21
C9200
0.01uF
50V-10%
POWER AND GROUND
U_SB
A1
A20
A26
B2
B4
B6
B8
B11
B15
C10
C11
C12
C13
C14
C16
C17
C18
C19
C21
C23
C25
C26
D2
D6
D11
D12
D14
D15
D17
D18
D20
E10
E21
E25
F2
F4
F13
F16
F19
G21
G25
H2
J25
K2
K4
K10
K12
K21
L11
L13
L15
L17
L25
M2
M10
M12
M14
M16
N11
N13
N15
N22
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72
GND73
GND74
GND75
GND76
GND77
GND78
GND79
GND80
GND81
GND82
GND83
GND84
GND85
GND86
GND87
GND88
GND89
GND90
GND91
GND92
GND93
GND94
GND95
GND96
GND97
GND98
GND99
GND100
GND101
GND102
GND103
GND104
GND105
GND106
GND107
GND108
GND109
GND110
GND111
GND112
GND113
GND114
GND115
GND116
GND117
GND118
GND119
SB_HT1000
HETERO 5 OF 5
N25
N26
P2
P4
P12
P14
P23
R11
R13
R15
R21
R24
R26
T2
T12
T14
T16
T21
U6
U11
U13
U24
V5
V21
W1
W4
W6
W22
W24
Y25
AA1
AA3
AA6
AA14
AA21
AB4
AB6
AB26
AC3
AC15
AC22
AC25
AD1
AD16
AE4
AE6
AE8
AE10
AE12
AE14
AE17
AE19
AE21
AE23
AF1
AF17
AF24
AF26
MODULE:
DESC:
REV: OF
SEC
1
2
3
ESB
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
4
REV.
X01
54 OF 14410/20/2006
Page 55
1
2
A B C
DEBUG
55,138
55,138
55,138
MOD_OMNIVU_LED_0_N
MOD_OMNIVU_LED_2_N
MOD_OMNIVU_LED_4_N
55,138
55,138
55,138
55,138
55,138
55,138
MOD_OMNIVU_LED_0_N
MOD_OMNIVU_LED_1_N
MOD_OMNIVU_LED_2_N
MOD_OMNIVU_LED_3_N
MOD_OMNIVU_LED_4_N
MOD_OMNIVU_LED_5_N
DumbVu LEDs
J_DV_LED
NP
1
3
5
2
4
6
X
J_LPC_DEBUG
DS2
2 1
RED
DS1
12
RED
DS3
12
RED
DS4
2 1
RED
DS5
2 1
RED
DS6
12
RED
MOD_OMNIVU_LED_1_N
MOD_OMNIVU_LED_3_N
MOD_OMNIVU_LED_5_N
NP0
NP0
NP0
NP0
NP0
NP0
R9201
1 2
220-5%
R9197
1 2
220-5%
R9198
1 2
220-5%
R9196
1 2
220-5%
R9199
1 2
220-5%
R9200
1 2
220-5%
55,138
55,138
55,138
+3.3V_AUX
REPLACE
NP0
NP0
NP0
NP0
NP0
NP0
55,139
15,30,55,142
TP41
TEST
TP39
TEST
19,31,55,141
R9790
1 2
0-5%
+3.3V_AUX
REPLACE
55,67,120,138
+3.3V
REPLACE
TP40
VCORE_CPU1_NB
R9787
1 2
142
1 2
VCORE_CPU1_NB_FEEDBACK
0-5%
R9788
0-5%
+VCORE_CPU2
TP38
TEST
VCORE_CPU2_NB
VCORE_CPU2_NB_GND
141
R9789
1 2
0-5%
55
55,138
25,51,55,138
PLANAR_TYPE_0
SYSTEM_PWRGOOD_DEBUG
+1.2V_VLDT
TEST
R9785
1 2
0-5%
MARG_1P2V_VLDT_GND
1P2V_VLDT_FEEDBACK
R9784
1 2
0-5%
+VCORE_CPU1
TP37
TEST
VCORE_CPU1_NB_GND
MARG_VCORE_CPU1_GND
VCORE_CPU2_NB_FEEDBACK
MARG_VCORE_CPU2_GND
PS1_PG
GC_FATAL_N
MARG_3P3V_GND
2x5 SM HEADER
J_VMARG_CNTLNP
1
3 4
5 6
7 8
9
X
2x5 SM HEADER
J_VMARG_A
1
3 4
5 6
7 8
9
2x5 SM HEADER
J_VMARG_E1
1
3 4
5 6
7 8
9
2x5 SM HEADER
J_VMARG_E2
1
2
3 4
5 6
7 8
9
10
MOD_SIO_PS_ON_N
2
SIO_PWRBTN_N
10
POT_RAIL
+1.2V
REPLACE
TP42
TEST
2
MARG_1P2V_GND
1P2V_FEEDBACK
3P3V_FEEDBACK
10
2
V_MEM_CPU1_VREF
MARG_V_MEM_CPU1_VREF_GND
V_MEM_CPU1_VREF_FEEDBACK
10
VCORE_CPU1_FEEDBACK
V_MEM_CPU2_VREF
MARG_V_MEM_CPU2_VREF_GND
V_MEM_CPU2_VREF_FEEDBACK
VCORE_CPU2_FEEDBACK
55,58,66,138
55
14,55
18,55
1 2
18
55,66,138
R9847
1 2
0-5%
55,110
55,114
R9786
1 2
0-5%
R9791
0-5%
R9783
1 2
0-5%
Voltage Margining
+5V
REPLACE
X01_DTXXXXX
117
TP46
14
119
TEST
+MEM_CPU2
TP51
TEST
TP50
TEST
TP49
TEST
TP48
TEST
TP15
TEST
TP16
TEST
TP17
TEST
TP11
TEST
TP14
TEST
TP12
TEST
TP9
TEST
R10109
1 2
112
0-5% 0-5%
MOD_LOM1_P2V5AUX
MOD_LOM1_P1V2AUX
MOD_LOM2_P2V5AUX
MOD_LOM2_P1V2AUX
1P2V_FEEDBACK
3P3V_FEEDBACK
1P2V_VLDT_FEEDBACK
VCORE_CPU1_NB
V_MEM_CPU1_VREF
VCORE_CPU2_NB
V_MEM_CPU2_VREF
MARG_MEM_CPU2_GND
MEM_CPU2_FEEDBACK
NTP_JVMARG_D_7
NTP_JVMARG_D_9
81,82,133
81,82,133
83,84,133
55,110
55,114
55,139
15,30,55,142
19,31,55,141
J_VMARG_D
1
2
3 4
5 6
7 8
9
10
2x5 SM HEADER
55
83,84,133
TP18
TEST
TP19
TEST
TP20
TEST
TP21
TEST
TP22
TEST
TP23
TEST
TP24
TEST
14,55
18,55
MARG_MEM_CPU1_GND
MEM_CPU1_FEEDBACK
NTP_JVMARG_D_10
D
PLANAR_TYPE_0
MOD_SIO_PS_ON_N
SIO_PWRBTN_N
POT_RAIL
PLANAR_TYPE_0
PS1_PG
SYSTEM_PWRGOOD_DEBUG
GC_FATAL_N
+MEM_CPU1
TP45
TEST
1 2
R10110
113
+3.3V
NP
X
55,66,138
55,58,66,138
55
55
55,67,120,138
55,138
25,51,55,138
REPLACE
R10119
1 2
R10120
1 2
1
4.7K-5% 4.7K-5%
2
3
+5V
REPLACE
51,55,66-68,86,96,138
51,55,66-68,86,96,138
86,87,89,91
+3.3V
REPLACE
55,66,138
25
25
86,138
JP_I2C_DBG_NH_SCL
JP_I2C_DBG_NH_SDA
J_PURPLEHAZE
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
2x10
2.54mm PITCH
NC_ESB_ISO
PLT_RST_SIO_N
LPC_LAD1
LPC_LAD3
11 12
13 14
15 16
17 18
NC_TRST
19
21 22
I2C_BMC_SEG2_VAUX_SDA
BMC_RST_JMPR_N
23 24
25 26
2x13 SM HEADER
PLT_RST_FWH_N
CK_33M_SMARTVU
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
LPC_LFRAME_N
LPC_LDRQ1_N
LPC_LDRQ0_N
1
2
3 4
5 6
7 8
9
10
20
68,138
45,55
51,55,66-68,86,96,138
51,55,66-68,86,96,138
51,55,66-68,86,96,138
51,55,66-68,86,96,138
51,55,66-68,86,96,138
51
51,66
CK_33M_SMARTVU
FWH_ID0
H_INIT_N
LPC_LAD0
LPC_LAD2
LPC_LFRAME_N
NC_VJTAG
JP_I2C_DBG_SH_SCL
JP_I2C_DBG_SH_SDA
NC_TMS
NC_TDONC_TDI
I2C_BMC_SEG2_VAUX_SCL
X01_DTXXXXX
ORIGINAL SMVU connector
45,55
55,68
55,68,138
51,55,66-68,86,96,138
51,55,66-68,86,96,138
51,55,66-68,86,96,138
51
51
86,87,89,91
+3.3V
REPLACE
+5V
REPLACE
TP36
TEST
TP35
TEST
+2.5V
REPLACE
TP43
+VDDA_CPU2
TEST
+1V
1 2R9795
0-5%
R9793
1 2
0-5%
1 2
55,140
X01_DTXXXXX
MARG_VDDA_CPU2_GND
111
R9794
VDDA_CPU2_FEEDBACK
MARG_V2P5_GND
0-5%
MARG_1PV_GND
1PV_FEEDBACK
NTP_J_VMARG_B_7
NTP_J_VMARG_B_9
depop'd margin connectors
J_VMARG_C
1
3 4
5 6
7 8
9
2x5 SM HEADER
J_VMARG_B
1
3 4
5 6
7 8
9
2x5 SM HEADER
2
10
TP34
TEST
MARG_VDDA_CPU1_GND
VDDA_CPU1_FEEDBACK
2P5V_FEEDBACK
TP44
TEST
2
MARG_1P5V_GND
1P5V_FEEDBACK
10
NTP_JVMARG_B_10
+VDDA_CPU1
+1.5V
REPLACE
R9792
1 2
111
55,111
R9817
1 2
55,140
0-5%
0-5%
TP5
TP2
TP4
TEST
TEST
TEST
2P5V_FEEDBACK
1P5V_FEEDBACK
TP52
TEST
TP53
TEST
TP54
TEST
TP55
TEST
TP47
TEST
TP6
TEST
TP13
TP7
TEST
TP1
TEST
1PV_FEEDBACK
TP28
TEST
TEST
TP27
TEST
TP26
TEST
TP10
TEST
TP25
TEST
TP29
TEST
TP30
TEST
TP8
TEST
TP31
TEST
TP33
TEST
TP32
TEST
TP3
TEST
55,111
55,140
55,140
X01_DTXXXXX
3
4
55,66,138
51,55,66-68,86,96,138
51,55,66-68,86,96,138
51,55,66-68,86,96,138
51,55,66-68,86,96,138
51,55,66-68,86,96,138
PLT_RST_SIO_N
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME_N
WARNING: THIS PINOUT IS WRONG
WARNING: THIS PINOUT IS WRONG
WARNING: THIS PINOUT IS WRONG
R9459
1 2
WARNING: THIS PINOUT IS WRONG
0-5%
NP
J_SMVU
4
6
8
10
12
14
X
45,55
R9456
1 2
0-5%
R9455
1 2
R9458
1 2
0-5%
CK_33M_SMARTVU
0-5%
R9457
1 2
0-5%
HEADER
WARNING: THIS PINOUT IS WRONG
2X7
X01_DTXXXXX
WARNING: THIS PINOUT IS WRONG
WARNING: THIS PINOUT IS WRONG
12
3
5
7
9
11
13
H_INIT_N
21
C9779
.1uF
55,68,138
FWH_ID0
55,68
NC_LPC_SMVU
16V-10%
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
MODULE:
DESC:
REV: OF
SEC
INC.
ROUND ROCK,TEXAS
TITLE
SCHEM,PLN,SV,PE_BULN
DWG NO.
FP975
DATE
SHEET
10/20/2006 55 OF 144
REV.
ESB
TEST
4
X01
Page 56
A B C
D
1
1
2
2
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 56 OF 144
DCBA
ESB
4
Page 57
A B C
ROOM = SB
+3.3V
REPLACE
D
1
6.3V-20%
100uF
1 2
+3.3V
REPLACE
C9060
C2293
1 2
C2292
1uF 6.3V
1 2
C2291
1uF 6.3V
1 2
C2290
1uF 6.3V
1 2
1uF 6.3V
+1.2V
REPLACE
6.3V-20%
100uF
1 2
C9063
6.3V-20%
100uF
C9023
1 2
1uF 6.3V
C9062
1 2
C9020
1 2
C2278
1 2
1uF 6.3V
C9016
1 2
1 2
1uF 6.3V
1uF 6.3V
C9021
C9017
1 2
1 2
1uF 6.3V
1uF 6.3V
C9024
C9018
1 2
1 2
1uF 6.3V
1uF 6.3V
C9022
C9019
1uF 6.3V
C9245
1 2
21
.1uF
1uF 6.3V
21
C9244
10V-10%
.1uF
10V-10%
C9239
21
C9247
21
.1uF
10V-10%
.1uF
C923821
10V-10%
21
C9246
21
.1uF
.1uF
C9235
10V-10%
21
C9243
10V-10%
21
.1uF
.1uF
C9234
10V-10%
21
C9242
10V-10%
21
.1uF
10V-10%
21
.1uF
C9241
10V-10%
220uF-10V
1 2
C9217
+
.1uF
C9240
10V-10%
220uF-10V
1 2
C9216
21
.1uF
21
C9237
10V-10%
.1uF
21
C9236
10V-10%
+
.1uF
10V-10%
1
2
+1.2V
REPLACE
6.3V-20%
100uF
1 2
C9061
C2858
1 2
C2857
1uF 6.3V
1 2
C2856
1uF 6.3V
1 2
C2855
1uF 6.3V
1 2
C2860
1uF 6.3V
1 2
21
C9232
1uF 6.3V
.1uF
C9233
10V-10%
+3.3V
REPLACE
+2.5V
REPLACE
21
.1uF
10V-10%
21
C9064
C9025
22uF
16V 20%
1 2
C9026
1uF 6.3V
1 2
C9027
1uF 6.3V
1 2
C9028
1uF 6.3V
1 2
1uF 6.3V
21
C2299
.1uF
21
C2298
10V-10%
.1uF
21
C2297
10V-10%
SB_IDE
.1uF
21
C2296
10V-10%
.1uF
21
C2295
10V-10%
.1uF
10V-10%
2
3
62,66,67,69,123
VBAT
6.3V-20%
100uF
1 2
C9065
C9032
1 2
+1.2V_VLDT_SB
C9029
1 2
1uF 6.3V
1uF 6.3V
C9030
1 2
C9033
1uF 6.3V
1 2
51,54,139
C9031
1uF 6.3V
1 2
21
C9251
1uF 6.3V
.1uF
C9250
10V-10%
21
.1uF
21
C9255
10V-10%
.1uF
21
C9254
10V-10%
.1uF
21
C9249
10V-10%
.1uF
21
C9248
10V-10%
.1uF
21
C9253
10V-10%
.1uF
21
C9252
10V-10%
.1uF
C9256
10V-10%
.1uF
21
C9795
10V-10%
.1uF
C9796
10V-10%
.1uF
C9797
10V-10%
21
.1uF
21
C9798
10V-10%
21
220uF-10V
+
.1uF
10V-10%
1 2
C9218
3
4
12
C9440
.1uF
16V-10%
12
C9439
.1uF
16V-10%
SOUTH HUB DECOUPLING
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 57 OF 144
ESB
4
DCBA
Page 58
A B C
+5V
REPLACE
D
1
220uF-6.3V
1 2
C3641
+
220uF-6.3V
1 2
C8601
+
+5V
REPLACE
21
R10118
21
C3589
USB 2.0 Connection
0 OHM-5%
U1138
1
GND
2
IN OUT_1
3
4
EN_2
TPS2062DGN
.1uF
16V-10%
L1853
1 2
FERRITE
1812-3.0A
21
R5936
1K-5%
EPAD
OC_1
OUT_2EN_1
OC_2
9
8
7
6
5
GOES TO SH OC W/ FILTERING CAPS
NP
R9825
X
NP
R9819
X
1 2
NP
NP
R9826
X
0-5%
1 2
1 2
4.7K-5%8.2K-5%
MOD_SB_USB_OVRCUR
R9827
0-5%
NP
21
X
0 OHM-5%
ROOM=USB_BACK1
MOD_SB_USB_OVRCUR
C185
49,58
USB AND BUTTONS
49,58
220uF-6.3V
1 2
C3214
21
.1uF
+
10V-10%
REAR_USB_DISABLE_N
58,66
+5V
REPLACE
CIRCUIT FOR DISABLING REAR USB PORT 1
U8039
14
MOD_SH_USB_P3_DN
MOD_SH_USB_P3_DP
49,58
49,58
U8039
14
3 4
74LCX07
1 2
74LCX07
58,66
CIRCUIT FOR DISABLING REAR USB PORT 2
REAR_USB_DISABLE_N
+5V
REPLACE
U8039
14
11 10
74LCX07
+5V
REPLACE
U8039
14
13 12
74LCX07
MOD_SH_USB_P2_DN
MOD_SH_USB_P2_DP
49,58
1
49,58
2
SILKSCREEN=USB1
J_USB1
1
2
3
4
USB
J_USB2
1
2
3
4
USB
SILKSCREEN=USB2
MOD_SH_USB_P2_L_DN
MOD_SH_USB_P2_L_DP
<500 mils
length matched +/-10 mils
MOD_SH_USB_P3_L_DN
MOD_SH_USB_P3_L_DP
21
NP
D1088
X
1 2
NP
D1089
X
1 2
ESD SUPPRESSOR
1 2
NP
D1090
X
ESD SUPPRESSOR
1 2
21
NP
D1091
X
1 2
ESD SUPPRESSOR
1 2
NP
ESD SUPPRESSOR
X
C3351
1 2
470pF
50V-10%
21
C1000
.1uF
10V-10%
R9824
X
1 2
+5V
REPLACE
L22
L21
0-5%
1
23
1
23
MOD_SH_USB_P2_DN
MOD_SH_USB_P2_DP
length matched +/-10 mils
MOD_SH_USB_P3_DN
MOD_SH_USB_P3_DP
length matched +/-10 mils
49,58
49,58
49,58
49,58
R9963
1 2
4.7K-5%
SPARE GATES
1 2
+5V
REPLACE
U8039
14
5 6
4.7K-5%
+5V
REPLACE
U8039
14
9 8
74LCX07 74LCX07
NC_U8039_PIN8
R9964
NC_U8039_PIN6
R9967
1 2
14
3
74LCX07
4.7K-5%
U8044NP
4
NC_U8044_PIN4
X
R9968
1 2
R9965
4.7K-5%
1 2
4.7K-5%
+5V
REPLACE
14
5 6
74LCX07
+5V
REPLACE
14
1 2
74LCX07
U8044NP
NC_U8044_PIN6
X
U8044NP
NC_U8044_PIN2
X
R9966
1 2
+5V
REPLACE
U8044NP
14
9 8
74LCX07
4.7K-5%
2
NC_U8044_PIN8
X
4
0-5%
4
3
70
BTN_NMI_N
+3.3V_AUX
REPLACE
12
R5141
8.2K-5%
1 2
R5164
1K-1%
RC=0.92ms
Chokes are subbed with 0 ohm resistors
EMI has approved this
R5126
1 2
100-1%
GPE_NMI_N
GOES TO SB
Switch BMC Vesb
1
1
1
0
0
0 Z
51
3.3V1
44-56mV
0
3.3V
Z
3.0V
1
8-20mV
0
100-225mV
SW_REG_DUMP1
TL1015AF160QG
+3.3V
REPLACE
R9148
+3.3V_AUX
REPLACE
12
R9086
21
GOES TO SYSTEM CPLD
8.2K-5%
CPLD_REG_DUMP1_N
138
49,58
SW_REG_DUMP2
TL1015AF160QG
MOD_SB_USB_OVRCUR
+3.3V_AUX
21
REPLACE
12
R9087
GOES TO SYSTEM CPLD
8.2K-5%
CPLD_REG_DUMP2_N
1 2
138
4.7K-5%
3
67,70
BTN_PWR_ON_N
SW_PWR
+3.3V_AUX
REPLACE
12
R5142
8.2K-5%
1 2
R5163
21
C3211
.1uF
RC=0.92ms
10V-10%
R5123
1 2
R5125
1 2
100-1%
BMC_NMIBTN_N
GOES TO BMC (Schmitt Input)
1 = NMIBTN Disable
0 = NMIBTN Toggle
Z = NMIBTN Normal Mode
GOES TO SIO
SIO_PWRBTN_N
1
1
1
0
0
86
BMCSwitch
1 3.3V
0
Z
1
0
Z0
55,66,138
Vesb
44-56mV
3.3V
3.0V
8-20mV
100-225mV
R9099
SW_RST
1
2
1 2
100-1%
3
4
+3.3V_AUX
REPLACE
12
R437
8.2K-5%
GOES TO SYSTEM CPLD AND SB
RESET_BTN_N
138
R9100
1 2
100-1%
MODULE:
DESC:
REV: OF
SB
SEC
4
TL1015AF160QG
1K-1%
21
21
C3212
.1uF
10V-10%
100-1%
R5124
1 2
100-1%
BMC_PWRBTN_N
GOES TO BMC (Schmitt Input)
1 = PWRBTN Disable
0 = PWRBTN Toggle
Z = PWRBTN Normal Mode
86
PUSH BUTTON
R5589
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
1 2
100-1%
ROOM=SW
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 58 OF 144
4
DCBA
Page 59
A B C
D
1
2
66
59,66
59,66
59,66
66
66
66,96
66
66
66
66
59,66
66
59,66
FLP_HDSEL_N
FLP_RDATA_N
FLP_WP_N
FLP_TRK0_N
FLP_WGATE_N
FLP_WDATA_N
FLOPPY_PRES_N
FLP_STEP_N
FLP_DENSEL
FLP_DIR_N
FLP_MTR0_N
NC_FLP_PIN18
NC_FLP_PIN19
NC_FLP_PIN20
FLP_DSKCHG_N
FLP_DR0_N
FLP_INDEX_N
+5V
REPLACE
J_FLOPPY
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
ROOM = FLOPPY
+5V
REPLACE
RN75
1
1
2
3
45
1K
R1880
6
7
8
1K-1%
1 2
FLP_INDEX_N
59,66
2
FLP_TRK0_N
FLP_WP_N
FLP_RDATA_N
FLP_DSKCHG_N
59,66
59,66
59,66
59,66
3
ZIF SMT RA
MOLEX/AMP
BOTTOM CONTACT
SILKSCREEN=FLOPPY
PHYSICAL DIFFERENCE
SUB=POP2
REQUIRES COMBO FOOTPRINT
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
M2LB_Change_Note:
Removed IDE connector.
Changed floppy connector.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
ESB
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
SEC
4
REV.
X01
59 OF 14410/20/2006
DCBA
Page 60
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
ESB
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 60 OF 144
DCBA
4
Page 61
A B C
D
1
1
2
2
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
MODULE:
DESC:
REV: OF
SEC
ESB
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 61 OF 144
DCBA
4
Page 62
A B C
D
1
57,66,67,69,123
62,69
86
INTRUDED_COVER
VBAT
VFPCP
2N7002
To reset intrusion detect,
drive Low value. During
all other times, signal
shall be tri-state by uC.
70
INTRUSION_COVER_N
Open (1)
Shorted (0) = Intruded
Chassis Intrusion Detect
ROOM=INTRUS
+3.3V_AUX
REPLACE
BAR43
D1049
1
31
R1770
1 2
1 2
U73
4
VHC14
1K-1%
R1769
1K-1%
50V-10%
BAR43
1000pF
31
Q102
1 2
C1781
D67
14
U73
9
D
3
8
VHC14
1
VFPCP
G
S
2
62,69
2N7002
G
1
Q101
S
2
D
3
R1801
1 2
33-5%
270K-5%
R1863
21
50V-10%
1000pF
1 2
R1771
1 2
1K-1%
16V-10%
C1779
1000pF
14
1
R1883
NP
1 2
0-5%
C1780
U73
2
VHC14
0-5%
X
5
1 2
R1882
14
U73
6
VHC14
14
3
It is not the true
= Not Intruded
21
todo:clay says maximum is 50pf
Intrusion signal.
This signal gates PME#.
16V-10%
.1uF
C1662
1 2
INTRUSION_COVER_VAUX_N
77
62
1 2
Q1886
1
G
2N7002
8.2K-5%
R4970
D
3
S
2
MOD_ESB_P3V3AUX_PWRGOOD_N
16V-10%
MOD_ESB_P3V3AUX_PWRGOOD
.1uF
1 2
C2574
3.3VAUX_PWRGOOD INVERTER
62
2
C788
2 1
.01uF
16V-10%
+3.3V_AUX
REPLACE
14
U63
11
VHC14
R633
1 2
3.01K-1%
+3.3V_AUX
REPLACE
12
C535
10
1uF 6.3V
MOD_ESB_VFPCP_OSC_5V
+3.3V_AUX
REPLACE
R348
1 2
43.2-1%
21
C187
D4
31
BAR43 BAR43
.1uF
16V-10%
D5
2
+3.3V_AUX
REPLACE
3.3v AUXGOOD GENERATION
ECAD: Place
by U1084
NP
U1085
809T
3
(3.08V)
VCC
RESET_N
GND
1
2
16V-10%
.1uF
31
12
.1uF
C188
1 2
R166
16V-10%
1M-5%
R218
1 2
Q8
VFPCP
100-1%
62,69
C2542
12
16V-10%
.1uF
12
C2541
21
R4205
X
1K-5%
14
U1084
1
+3.3V_AUX
REPLACE
2
VHC14
33-5%
X
NP
1 2
R4214
14
U1084
3
VHC14
+3.3V_AUX
REPLACE
4
NP
4.7K-5%
1 2
X
R4206
1 2
33-5%
R4218
V_P3P3AUX_PG
+3.3V_AUX
REPLACE
C3380
1 2
1uF 6.3V
86,138
3
62
MOD_ESB_P3V3AUX_PWRGOOD_N
ROOM=VFPCP
VOLTAGE DOUBLER FOR 6V AUX POWER
+12V
REPLACE
1 2
+3.3V_AUX
REPLACE
R5419
DO we need this anymore
1
G
2N7002
D
3
13
14
U1084
12
MOD_ESB_P3V3AUX_PWRGOOD
1 2
8.2K-5%
R5519
62
14
R4834
1 2
S
2
0-5%
11
U1084
10
VHC14 VHC14
MOD_ESB_U1084_P10
3
X00_DT9854 SCH removed NC from net name to connect to above circuit
ROOM=3VAUXPG
4
138
SYSTEM_PWRGOOD_FETS
1 2
Q1921
1
G
2N7002
8.2K-5%
R4972
D
3
S
2
Q1922
1
G
2N7002
D
3
S
2
SYSTEM PWRGOOD 6V
1 2
3.01K-1%3.92K-1%
8.2K-5%
R4974
1 2
R4973
SYSTEM_PWRGOOD_FETS_6V
C3205
1 2
220pF
50V-10%
C3206
1 2
220pF
50V-10%
91
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
ESB
SEC
4
REV.
X01
62 OF 14410/20/2006
DCBA
Page 63
A B C
D
1
1
2
2
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 63 OF 144
DCBA
I2C
4
Page 64
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
3
M2LB_Change_Note:
Removed SLOT circuitry.
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
ESB
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 64 OF 144
DCBA
4
Page 65
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
M2LB_Change_Note:
Deleted everything for PCIX SLOT 2.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
ESB
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
SEC
4
REV.
X01
65 OF 14410/20/2006
Page 66
+3.3V_AUX
REPLACE
A B C
R8391
+3.3V
REPLACE
66
FLP_MTR0_N_R
1 2
22-5%
FLP_MTR0_N
59
+3.3V
REPLACE
R9752
R9766
4.7K-5% 0-5%
NP
12
1 2
0-5%
X
R9753
NP
1 2
X
R9751
1 2
1K-1%
D
+3.3V
REPLACE
8
6
7
1
2
3
16V-10%
51,66,123,138
55,66,138
18,20,66,138
1 2
.1uF
51,70
66,70
66,143
51,66
51,66
14,138
NP
50V-10%
330pF
X
NP
R4770
X
66,95
66,98
10uF 6.3V
C2437
NP
50V-10%
C3147
1 2
21
DISABLE_VIDEO
330pF
NP
49.9-1%
16V-10%
C3173
12
51,66
51,66
GPE_SOFT_NMI_SMI_SCI1
C3143
1 2
X
R4774
X
49.9-1%
1 2
SIO_DTRB_N
.1uF
GPE_SOFT_NMI_SMI_SCI2
HEATSINK_PRES_N
CTRLPNL_PRES_N
CPU1_SPLIT_CTRL2
KB_A20GATE_N
MOD_SIO_PS_ON_N
CPU1_PRES_N
CPU2_PRES_N
NP
50V-10%
330pF
X
NP
R4771
X
1 2
1 2
21
C2436
C3144
49.9-1%
16V-10%
.1uF
KB_RST_N
FRONT_USB_DISABLE_N
NP
50V-10%
330pF
X
NP
R4772
X
1 2
1 2
21
+3.3V
REPLACE
R9843
1 2
NP
R9844
X
1 2
16V-10%
C2435
C3145
1 2
.1uF
X00_DT9807 SCH CPU1_PRES Pullup
NP
50V-10%
330pF
X
NP
R4773
49.9-1%
X
4.7K-5%8.2K-5%
16V-10%
C2434
.1uF
R9979
1 2
1 2
8.2K-5%
1 2
NC_RN118_PIN3
FLP_WP_N
FLP_TRK0_N
FLP_DSKCHG_N
FLP_INDEX_N
FLP_RDATA_N
C3146
49,66,67
49.9-1%
51,66,123,138
1 2
C9517
16V-10%
C2433
1 2
.1uF
R10127
8.2K-5%
1 2
MOD_SB_SER_ISA_IRQ_N
1 4
15pF
50V-5%
X01_DTXXXXX
16V-10%
C2432
1 2
+3.3V
REPLACE
X12
32KHz
.1uF
8
7
6
5
RN117
1
2
3
4
59,66
59,66
59,66
59,66
59,66
X01_DTXXXXX
HEATSINK_PRES_N
C2431
21
8.2K
16V-10%
C9518
1 2
1 2
.1uF
+3.3V_AUX
6
7
8
RN118
3
2
1
SIO_XTAL1
15pF
50V-5%
C9547
REPLACE
NC_RN118_PIN6
5
8.2K
4
+3.3V
REPLACE
R10140
1 2
SIO_XTAL2
+5V
REPLACE
66
66
66
66
66
66
66
66
66
R9550
4.7K-5%
1 2
4.7K-5%
66
66
MOD_LPC_MSE_DATA
MOD_LPC_MSE_CLK
FLP_DIR_N_R
FLP_STEP_N_R
FLP_WDATA_N_R
FLP_WGATE_N_R
FLP_HDSEL_N_R
FLP_DR0_N_R
FLP_DENSEL_R
+3.3V_AUX
REPLACE
R9551
4.7K-5%
1 2
+3.3V_AUX
REPLACE
NP
X
R10141
1 2
NP
8.2K-5%
143
143
143
J_PS2
X
H2X4
R8392
22-5%
R8393
1 2
22-5%
R8394
22-5%
R8395
1 2
22-5%
R8396
22-5%
R8397
1 2
22-5%
R8398
22-5%
NC_RN225_PIN6
5 4
8.2K
NC_RN225_PIN3
MOD_LPC_KB_DATA
21
43
MOD_LPC_KB_CLK
65
87
57,62,67,69,123
21
FLP_DIR_N
FLP_STEP_N
21
FLP_WDATA_N
FLP_WGATE_N
21
FLP_HDSEL_N
FLP_DR0_N
21
FLP_DENSEL
8
7
6
RN225
3
2
1
66
66
66
66
66
66
+5V
REPLACE
8.2K
59
59
59
59
59
59
59,66
7
6
5 4
3
2
18,20,66,138
4.7K-5%
R9842
VBAT
66
66
59,66
66
51,66
66
51,66
66
66
66
66
59,66
59,66
59,66
66
59,66
45
51,55,67,68,86,96,138
51,55,67,68,86,96,138
51,55,67,68,86,96,138
51,55,67,68,86,96,138
8
51,55,67,68,86,96,138
RN116
1
MOD_LPC_KB_DATA
MOD_LPC_KB_CLK
MOD_LPC_MSE_DATA
MOD_LPC_MSE_CLK
51,66
51,66
58,66
67
67
70,96
59,96
77
77
CPU1_SPLIT_CTRL1
52
52
12
R9422
1 2
FLP_DENSEL_R
FLP_DRATE0
FLP_INDEX_N
FLP_MTR0_N_R
GPE_SOFT_NMI_SMI_SCI1
FLP_DR0_N_R
GPE_SOFT_NMI_SMI_SCI2
FLP_DIR_N_R
FLP_STEP_N_R
FLP_WDATA_N_R
FLP_WGATE_N_R
FLP_TRK0_N
FLP_WP_N
FLP_RDATA_N
FLP_HDSEL_N_R
FLP_DSKCHG_N
CK_14M_SIO
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME_N
51,55
55,138
53
49,66,67
51,66
51,66
REAR_USB_DISABLE_N
CPU2_PRES_N
MOD_LPC_GPI_NVRAM_CLR_N
MOD_LPC_GPI_EN_PASSWD_N
CDROM_PRES_N
FLOPPY_PRES_N
CPU2_SPLIT_CTRL2
CPU2_SPLIT_CTRL1
WAKE_A_SIO_N
WAKE_B_SIO_N
NC_SIO_GP44
GPO_I2C_MUX_SEL0
GPO_I2C_MUX_SEL1
66,81
66,83
66
66
4.7K-5%
LPC_LDRQ0_N
PLT_RST_SIO_N
CK_33M_SIO
MOD_SB_SER_ISA_IRQ_N
SIO_WAKEUP
SIO_SMI_N
KB_RST_N
KB_A20GATE_N
INTRUDER_N
DISABLE_ETHERNET_1
DISABLE_ETHERNET_2
SIO_XTAL1
SIO_XTAL2
+3.3V
REPLACE
+3.3V_AUX
REPLACE
SIO_XOSEL
58
GP40/DRVDEN0
59
GP41/DRVDEN1_N
70
INDEX_N
60
MTR0_N
56
SBCLK/GP36/MTR1_N
63
DS0_N
57
SBDATA/GP37/DS1_N
64
DIR_N
66
STEP_N
67
WDATA_N
68
WGATE_N
71
TRK0_N
72
WRTPRT_N
73
RDATA_N
69
HDSEL_N
62
DSKCHG_N
19
CLOCKI
20
LAD0
21
LAD1
22
LAD2
24
LAD3
26
LFRAME_N
27
LDRQ_N
28
PCI_RESET_N
30
PCI_CLK
31
SER_IRQ
14
IO_PME_N/GP42
6
IO_SMI_N/GP46
74
KDAT
75
KCLK
76
MDAT
77
MCLK
78
KBDRST_N
79
A20M
32
XAD0/GP10
33
XAD1/GP14
34
XAD2/GP15
35
XAD3/GP17
36
XAD4/GP20
38
XAD5/GP21
39
XAD6/GP23
40
XAD7/GP25
42
XCS0_N/GP27
43
XRD_N/GP43
44
XWR_N/GP44
45
XALE0/GP45
46
XALE1/GP75
47
XALE2/GP76
48
INTRUDER_N/GP26/SEC_WE_N
17
SMBCLK/GP60
18
SMBDATA/GP61
50
XTAL1
51
XTAL2
54
XOSEL
55
VCC1
12
VTR2_12
25
VTR2_25
41
VTR2_41
65
VTR2_65
82
VTR2_82
99
VTR2_99
121
VTR2_121
49
VBAT
U_SIO
SCH4307
X00_DT10009 SCH cpld jtag
84
PD0
85
PD1
86
PD2
87
PD3
88
PD4
89
PD5
90
PD6
91
PD7
SLCT
PE
BUSY
RXD1
TXD1
GP66
GP64
81
83
92
93
94
96
97
98
100
111
112
113
114
116
117
118
119
120
122
123
124
125
126
127
128
4
13
29
9
1
2
3
8
11
5
15
16
53
104
106
108
105
107
109
110
101
102
103
7
10
23
37
61
80
95
115
52
INIT_N
SLCTIN_N
ACK_N
ERROR_N
ALF_N
STROBE_N
DSR1_N
RTS1_N
CTS1_N
DTR1_N
RI1_N
DCD1_N
RI2_N/GP50
DCD2_N/GP51
RXD2/GP52
TXD2/GP53
DSR2_N/GP54
RTS2_N/GP55/SYSOPT1
CTS2_N/GP56
DTR2_N/GP57/FWHSEL
PGOOD_IN
BLINK_LED/GP31
GP24_SYSOPT0_N
PWRBTN_IN_N/GP62
GP63/RING_N
GP33/WDO
PS_ON_N/GP67
TRI_COM1_N
GP30/INT_N
GP16/TDEADLY
PROCHOT
PWM1/GP22
PWM2/GP11
PWM3/GP74
GP85/FAN_TACH1
GP12/FAN_TACH2
GP73/FAN_TACH3
FAN_TACH4
GP70/FAN_TACH5
GP71/FAN_TACH6
GP72/FAN_TACH7
GP13/FAN_TACH8
VSS_10
VSS_23
VSS_37
VSS_61
VSS_80
VSS_95
VSS_115
AVSS_52
SIO_SLCT
SIO_PE
SIO_PD6
SIO_CPLD_TDI
SIO_CPLD_TCK
SIO_CPLD_TMS
NC_SIO_RPRN_PD3
NC_SIO_RPRN_PD4
NC_SIO_RPRN_PD5
SIO_PD6
NC_SIO_RPRN_PD7
NC_SIO_RPRN_INIT_N
NC_SIO_RPRN_SLIN_N
SIO_SLCT
MOD_LPC_RPRN_BUSY_PU
SIO_CPLD_TDO
MOD_LPC_RPRN_ERR_PU_N
NC_SIO_RPRN_AFD_N
NC_SIO_RPRN_STB_N
X00_DT9953 SCH needed NC's
SIO_SINA
SIO_SOUTA
SIO_DSRA_N
SIO_RTSA_N
SIO_CTSA_N
SIO_DTRA_N
SIO_RIA_N
SIO_DCDA_N
SIO_RIB_N
SIO_DCDB_N
SIO_SINB
SIO_SOUTB
SIO_DSRB_N
SIO_RTSB_N
SIO_CTSB_N
SIO_DTRB_N
SYSTEM_PWRGOOD_SIO
NC_SIO_BLINK_LED
LPC_MOD_SYSOPT0_N
BMC_PROGRAM_N
SIO_PWRBTN_N
MOD_LPC_RISER_1_TYPE_1U
MOD_LPC_RISER_2_TYPE_1U
MOD_LPC_RISER_1_TYPE_EXP_N
MOD_SIO_PS_ON_N
SIO_TRI_COM1_N
RAC_PRES_N
MOD_LPC_RISER_2_REV
SIO_PROCHOT
NC_SIO_GP22
CPU1_SPLIT_CTRL2
NC_SIO_GP74
MOD_LPC_GPO_FWH_WP_N
FRONT_USB_DISABLE_N
BMC_RDY_N
SIO_FAN_TACH4
I2C_SIO_CHNL_SEL0
I2C_SIO_CHNL_SEL1
DISABLE_VIDEO
BMC_RESET_N
66
66
66
SIO_PE
86,89,95
55,58,138
66,68,71
66,68,72
68,71,138
55,66,138
66
136
136
136
66
66
66
66
136
66
95
95
95
95
95
95
95
95
95
95
95
95
95
95
66,95
138
86,92
68,72
66
66,143
68
66,70
86,87
66
52
52
66,98
86
51,66
66
66
66
95
66,68,72
66,68,71
58,66
RN97
1
2
NP
R5525
X
1 2
SIO_WAKEUP
SIO_FAN_TACH4
SIO_TRI_COM1_N
SIO_PROCHOT
REAR_USB_DISABLE_N
8.2K
3
4 5
MOD_LPC_RPRN_ERR_PU_N
MOD_LPC_RPRN_BUSY_PU
+3.3V
REPLACE
NP
R4951
X
8.2K-5%
MOD_LPC_RISER_2_TYPE_1U
MOD_LPC_RISER_1_TYPE_1U
1 2
NP
R9832
X
1 2
R9959
8.2K-5%
4.7K-5%
4.7K-5%
R9421
8.2K-5%
R8819
1 2
NC_RN97_3
NC_RN97_1
8.2K-5%
1 2
SIO_SMI_N
FLP_DENSEL
FLP_DRATE0
R9911
12
12
R9830
1 2
NP
8.2K-5%
4.7K-5%
R9448
4.7K-5%
4.7K-5%
R9262
+3.3V
REPLACE
R8929
X
1 2
4.7K-5%
R9765
4.7K-5%
R9764
12
12
4.7K-5%
R9310
+3.3V
REPLACE
4.7K-5%
12
12
66
66
51,66
59,66
+3.3V
REPLACE
66
+3.3V_AUX
REPLACE
12
+3.3V_AUX
REPLACE
+3.3V
REPLACE
1
2
3
4
66,81
66,83
DISABLE_ETHERNET_1
DISABLE_ETHERNET_2
R4816
1 2
R4817
4.7K-5%
1 2
R4941
1 2
4.7K-5%
4.7K-5%
PORT NAME
CONFIG PORT
INDEX PORT
DATA PORT
SYSOPT0 = 0
SYSOPT1 = 1
0X02E
0X02E
INDEX PORT + 1
SUPER I/O
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
MODULE:
DESC:
REV: OF
M2LB_Change_Note:
R4942 changed to pulldown.
Added series resistors to SIO FLPY outputs.
SEC
LPC
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
4
REV.
X01
66 OF 14410/20/2006
Page 67
A B C
StMicro Atmel Sinosun
D
JUMPERS
1
12
NOPOPPOPPin
1
2
3
5
7
8
9
R9520
R8931
R9375
R9521
C9593
R9152
R9228
R9376
C9592
R8930
R8931
R9375
R9521 R9521
C9593
R9153
R842
R9228
R9531 R9376
C9592
R9520
C9593
R842R842
NOPOPPOPNOPOPPOP
R8930R8930
R8931
R9375
R9520
R9152R9152 R9228
C9592
+3.3V
REPLACE
R4212
1 2
8.2K-5%
R4213
1 2
8.2K-5%
SILKSCREEN1=NVRAM_CLR
SILKSCREEN2=PWRD_CLR
J_PSWD_NVRM
1
3
5
2
4
6
MOD_LPC_GPI_EN_PASSWD_N
MOD_LPC_GPI_NVRAM_CLR_N
NC_HEADER_6NC_HEADER_5
ADD1=ADD*_81526
ADD2=ADD*_81526
66
1
66
2
3
PLT_RST_TPM_N
138
13
14
15
19
Float
R8932
R?
C?
+3.3V
REPLACE
R8820
4.7K-5%
1 2
51,55,66,68,86,96,138
51,55,66,68,86,96,138
51,55,66,68,86,96,138
51,55,66,68,86,96,138
51,55,66,68,86,96,138
1 2
R9529
33-5%
53
49,66
R9376
R?
C?
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME_N
CK_33M_TPM
MOD_SB_SER_ISA_IRQ_N
R8932
1 2
4.7K-5%
FloatFloat
FloatFloat
R8932R8932
R?
C?
26
LAD0
23
LAD1
20
LAD2
17
LAD3
28
LPCPD
22
LFRAME
16
LRESET
21
LCLK
27
SERIRQ
15
CLKRUN/GPIO15
4
GND_4
11
GND_11
18
GND_18
25
GND_25
U_TPM
NOTE: these i2c pu's are only for the contengency that a future TPM device will
have these pins as i2c AND we do not want this device on the i2c bus
VDD_10
VDD_19
VDD_24
3VSB
VBAT
NC_V
PP/GPIO7
GPIO6
SM_DAT/GPIO1
SM_CLK/GPIO2
TESTBI/BADD/GPIO9
TESTI
XTALI/32K
XTALO
NP
21
R9526
X
10
19
24
5
12
3
7
NC_TPM_GPIO6
6
1
2
9
8
13
NC_TPM_PIN14
14
+3.3V
1K-5%
TPM_PP_GPIO7
REPLACE
VBAT_TPM
+3.3V
REPLACE
21
R9597
21
C9611
0 OHM-5%
.1uF
16V-10%
+3.3V
REPLACE
NP
R9808
X
1 2
+3.3V
REPLACE
NP
R9807
X
4.7K-5%
1 2
+3.3V_AUX
+3.3V
REPLACE
4.7K-5%
R9520
NP
0 OHM-5%
Current Atmel device does not support SMB but future revs may
NP
REPLACE
21
R9521
21
X
R9008
1 2
X
0-5%
0 OHM-5%
21
C9593
NP
.1uF
16V-10%
R9007
1 2
0-5%
X
+3.3V
REPLACE
R9531
21
C9592
.1uF
16V-10%
I2C_TPM_SDA
I2C_TPM_SCL
81526 are the jumper plugs
+3.3V
REPLACE
R4370
1 2
8.2K-5%
R4371
1 2
8.2K-5%
MOD_LPC_GPI_FVS_1_N
MOD_LPC_GPI_FVS_2_N
51
51
2
J_FVS
1
58,70
0-5%
1 2
0-5%
NP
R9530
VBAT
12
X
52
52
57,62,66,69,123
BTN_PWR_ON_N
81526 are the jumper plugs28
3
2
4
PS1_PG
55,120,138
3
TPM1.2
GENERIC SYMBOL / NO SUPPLIER DATA
SUB=SUB*_DH580
+3.3V
REPLACE
NP
R9152
X
1 2
R9228
1 2
4.7K-5%
TPM_BADDR
0-5%
R9376
1 2
R842
100-5%
1 2
R9375
4.7K-5%
1 2
R8930
10K-5%
1 2
R9153
4.7K-5%
1 2
4.7K-5%
R8931
1 2
4.7K-5%
MODULE:
DESC:
REV: OF
SEC
LPC
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 67 OF 144
DCBA
4
Page 68
1
A B C
ROOM=FWH
C291
1 2
.1uF
16V-10%
+3.3V
REPLACE
C288
1 2
.1uF
C289
16V-10%
D
LPC Resistor Strappings
+3.3V
REPLACE
21
1
.1uF
1 2
C290
16V-10%
.1uF
1 2
16V-10%
51
MOD_LPC_PLANAR_TYPE_0
R8225
4.7K-5%
2
R8933
1 2
X01_DTXXXXX
MOD_LPC_GPO_FWH_WP_N
66
4.7K-5%
1
2
3
4
55
55,138
51,55,66,67,86,96,138
51,55,66,67,86,96,138
51,55,66,67,86,96,138
51,55,66,67,86,96,138
51,55,66,67,86,96,138
RN9
8.2K
FWH_ID0
PLT_RST_FWH_N
8
7
6
5
+3.3V
REPLACE
R448
1 2
53
PROPAGATION_DELAY=L:S::500
PROPAGATION_DELAY=L:S::500
1 2
8.2K-5%8.2K-5%
1 2
MOD_LPC_IC
CK_33M_FWH
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME_N
MOD_LPC_ID1
MOD_LPC_ID3
MOD_LPC_TBL_N
R376
470-5%
R375
MOD_LPC_WP_N
U_FWH
10
VCC1
31
VCC2
39
VCCA
11
VPP
2
IC
12
RST_N
9
CLK
25
FWH0
26
FWH1
27
FWH2
28
FWH3
38
FWH4
24
ID0
23
ID1
22
ID2
21
ID3
20
TBL_N
19
WP_N
29
GND1
30
GND2
40
GNDA
M50FW080
TSOP40
82802AC - 8Mb
SUB*_DN768
FGPI4
FPGI3
FPGI2
FPGI1
FPGI0
RFU1
RFU2
RFU3
RFU4
RFU5
INIT_N
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
7
15
16
17
18
32
33
34
35
36
37
1
3
4
5
6
8
13
14
MOD_LPC_FGPI4
MOD_LPC_FGPI3
MOD_LPC_FGPI2
MOD_LPC_FGPI1
MOD_LPC_FGPI0
NC_MOD_LPC_RFU1
NC_MOD_LPC_RFU2
NC_MOD_LPC_RFU3
NC_MOD_LPC_RFU4
NC_MOD_LPC_RFU5
H_INIT_N
NC_MOD_LPC_NC1
NC_MOD_LPC_NC2
NC_MOD_LPC_NC3
NC_MOD_LPC_NC4
NC_MOD_LPC_NC5
NC_MOD_LPC_NC6
NC_MOD_LPC_NC7
NC_MOD_LPC_NC8
55,138
1 2
8.2K-5%
1
2
3
4
R449
RN8
8.2K
8
7
6
5
+3.3V
REPLACE
66,72
66,72
66,71
MOD_LPC_RISER_2_REV
MOD_LPC_RISER_2_TYPE_1U
MOD_LPC_RISER_1_TYPE_1U
RISER_2_TYPE_EXP_N
72
66,71,138
71,138
1 - Bullion
0- Not Used
MOD_LPC_RISER_1_TYPE_EXP_N
MOD_LPC_RISER_HS_PRES_N
Riser Types
RISER HS PRES
+3.3V_AUX
REPLACE
R5336
- Pulled up on Bullion
- routed to riser when riser is present
- Pulled up on Bullion
- routed to riser when riser is present
1 2
20K-5%
R5337
1 2
R5338
20K-5%
1 2
20K-5%
R5132
1 2
R5131
20K-5%
1 2
NP
R9423
X
1 2
+3.3V_AUX
REPLACE
20K-5%
4.7K-5%
R5133
1 2
2
20K-5%
3
470-5%
SUB=NP*
R10145
1 2
X01_DTXXXXX
H9356---Single Vendor AVL
FWH Prog Part
DN768
Riser Rev
- Pulled up on Bullion
- routed to riser when riser is present
Things to check from BMC/CPLD module
- DEBUG_ERROR_LEVEL_(1:0) sent to CPLD. Maybe send directly to LEDs
- BMC_PROGRAM_N pulled up in BMC module
- Serial Port A signals driven by CPLD. Add external PU/PD
- Serial Port B signals driven by CPLD. Add external PU/PD
- BMC_RESET_N pulled up in BMC module
- BMC_RDY_N pulled up in BMC module
3
4
Disk Prog
Blank Part
NK451
DN774
TITLE
M2LB_Change_Note:
Changed planar type stuffing options.
Changed R4343 to pulldown.
MODULE:
DESC:
REV: OF
SEC
INC.
ROUND ROCK,TEXAS
LPC
4
FIRMWARE HUB
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
REV.
X01
68 OF 14410/20/2006
Page 69
A B C
D
1
62
1
VFPCP
2
4
TH/SMT SKT
3V COIN
-+
325
MOD_LPC_BAT_P
Required by
product safety
R75
1 2
SILKSCREEN=BATTERY
1
BAT
1K-1%
SUB*_1311P
ADD*_75481_BATTERY
MOD_LPC_1N914_ANODE
D78
1 3
1N914
+3.3V_AUX
REPLACE
1 2
470pF
C541
D77
1N914
10uF 6.3V
50V-10%
Required by
product safety
R74
1 2
1K-1%
31
VBAT
C781
21
57,62,66,67,123
MOD_LPC_ESM_VBAT
D14
Q17
D
3
31
BAR43
LOAD RESISTOR TO DETECT MISSING BATTERY
G
1
S
MOD_LPC_FET_SOURCE
2
2N7002
R352
1 2
R353
1 2
MOD_LPC_10M
R645
1 2
200K-1%
10M-5%
10M-5%
16V-10%
.1uF
1 2
A2D_BAT
C307
86
2
3
ROOM=BATT
COIN BATTERY
3
Battery
4
Micro-Vu circuitry removed
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
SEC
LPC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 69 OF 144
DCBA
4
Page 70
A B C
This is not a standard PCIexpress pinout.
Never plug a PCIexpress card directly into this connector.
J_SIDEPLANE
D
PCI EXPRESS CONNECTOR
1
2
X01_DTXXXXX
120,138
91
91
49,70
49,70
66,70
58
28
28
62
28
28
28
28
28
28
138
50
I2C_BMC_PERC_VAUX_SCL
I2C_BMC_PERC_VAUX_SDA
MOD_SH_USB_P4_DN
MOD_SH_USB_P4_DP
NC_STORAGE_PWRGOOD
FRONT_USB_DISABLE_N
NC_MOD_IO_J_ROMB_B10
BTN_NMI_N
PS_ENABLE_CPLD_N
EXP_PEX_3_SB_0_DP
EXP_PEX_3_SB_0_DN
INTRUSION_COVER_N
EXP_PEX_3_SB_1_DP
EXP_PEX_3_SB_1_DN
EXP_PEX_3_SB_2_DP
EXP_PEX_3_SB_2_DN
EXP_PEX_3_SB_3_DP
EXP_PEX_3_SB_3_DN
PLT_RST_IDE_N
MOD_SH_IDE_PDDREQ_R
B1
+12V_1
B2 A2
+12V_2 +12V_3
B4
GND_B4
B5
SMCLK
B6
SMDATA
B7
GND_B7
B8
+3.3V_1
B9
JTAG_TRST
B11
WAKE
B12
RSVD_B12
B13
GND_B13
B14
PETP0
B15
PETN0
B16
GND_B16
B17
PRSNT2_X1
B18
GND_B18
B19
PETP1
B20
PETN1
B21
GND_B21
B22
GND_B22
B23
PETP2
B24
PETN2
B25
GND_B25
B26
GND_B26
B27
PETP3
B28
PETN3
B29
GND_B29
B30
RSVD_B30
B31
PRSNT2_X4
B32
GND_B32
PRSNT1
+12V_4+12V_5
GND_A4
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
+3.3V_2
+3.3V_3+3.3V_AUX
PERST
GND_A12
REFCLK+
REFCLKÂGND_A15
PERP0
PERN0
GND_A18
RSVD_A19
GND_A20
PERP1
PERN1
GND_A23
GND_A24
PERP2
PERN2
GND_A27
GND_A28
PERP3
PERN3
GND_A31
RSVD_A32
A1
A3B3
A4
A5
A6
A7
A8
A9
A10B10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
NC_SIDEPLANE_A2
CDROM_PRES_N
TP_SIDEPLANE_TCK
TP_SIDEPLANE_TDI
CTRLPNL_MUX_S0
CTRLPNL_MUX_S1
BTN_PWR_ON_N
BTN_ID_RAW_N
CK_100M_PCIE_ROMB_DP
CK_100M_PCIE_ROMB_DN
EXP_PEX_3_NB_0_DP
EXP_PEX_3_NB_0_DN
SAS_PERST_N
EXP_PEX_3_NB_1_DP
EXP_PEX_3_NB_1_DN
EXP_PEX_3_NB_2_DP
EXP_PEX_3_NB_2_DN
EXP_PEX_3_NB_3_DP
EXP_PEX_3_NB_3_DN
STORAGE_ADAPTER_PRES_N
66,96
DT9968
86
86
58,67
93
28
28
96,138
28
28
28
28
28
28
45
45
95,96
FOR SIDEPLANE
(PERC5/SAS HBA & CONTROL PANEL
From PEX8518 PORT 3
CIRCUIT FOR DISABLING FRONT USB PORT
+5V
REPLACE
U8044NP
14
66,70
FRONT_USB_DISABLE_N
13 12
74LCX07
X
MOD_SH_USB_P4_DN
49,70
1
2
3
4
+3.3V_AUX
REPLACE
138
50
50
50
50
IRQ pullup on SH page
50
50
+5VAUX
+5V
REPLACE
SIDEPLANE_PRES_N
50
50
50
50
50
50
50
50
MOD_SH_IDE_PDIOW_N_R
MOD_SH_IDE_PDIOR_N_R
MOD_SH_IDE_PDIORDY_R
MOD_SH_IDE_IRQ14_N_R
MOD_SH_IDE_PDA1_R
106
105
105
MOD_SH_IDE_PDD7_R
MOD_SH_IDE_PDD6_R
MOD_SH_IDE_PDD5_R
MOD_SH_IDE_PDD4_R
MOD_SH_IDE_PDD3_R
MOD_SH_IDE_PDD2_R
MOD_SH_IDE_PDD1_R
MOD_SH_IDE_PDD0_R
MOD_SH_IDE_PDDACK_N_R
+3.3V
REPLACE
FRONT_VSYNC
FRONT_RED
FRONT_BLUE
86
86
CTRLPNL_CLK
CTRLPNL_DATA
+3.3V_AUX
8.2K-5%
REPLACE
1 2
R8297
B33
PETP4
B34
PETN4
B35
GND_B35
B36
GND_B36
B37
PETP5
B38
PETN5
B39
GND_B39
B40
GND_B40
B41
PETP6
B42
PETN6
B43
GND_B43
B44
GND_B44
B45
PETP7
B46
PETN7
B47
GND_B47
B48
PRSNT2_X8
B49
GND_B49
B50
PETP8
B51
PETN8
B52
GND_B52
B53
GND_B53
B54
PETP9
B55
PETN9
B56
GND_B56
B57
GND_B57
B58
PETP10
B59
PETN10
B60
GND_B60
B61
GND_B61
B62
PETP11
B63
PETN11
B64
GND_B64
B65
GND_B65
B66
PETP12
B67
PETN12
B68
GND_B68
B69
GND_B69
B70
PETP13
B71
PETN13
B72
GND_B72
B73
GND_B73
B74
PETP14
B75
PETN14
B76
GND_B76
B77
GND_B77
B78
PETP15
B79
PETN15
B80
GND_B80
B81
PRSNT2_X16
B82
RSVD_B82
PCI-E 16X CONNECTOR
PCI-E SPECIFICATION 1.0a
3.1mm PIN LENGTH
SILKSCREEN=STORAGE_SIDEPLANE
RSVD_A33
GND_A34
PERP4
PERN4
GND_A37
GND_A38
PERP5
PERN5
GND_A41
GND_A42
PERP6
PERN6
GND_A45
GND_A46
PERP7
PERN7
GND_A49
RSVD_A50
GND_A51
PERP8
PERN8
GND_A54
GND_A55
PERP9
PERN9
GND_A58
GND_A59
PERP10
PERN10
GND_A62
GND_A63
PERP11
PERN11
GND_A66
GND_A67
PERP12
PERN12
GND_A70
GND_A71
PERP13
PERN13
GND_A74
GND_A75
PERP14
PERN14
GND_A78
GND_A79
PERP15
PERN15
GND_A82
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
MOD_SH_IDE_PDD8_R
MOD_SH_IDE_PDD9_R
MOD_SH_IDE_PDD10_R
MOD_SH_IDE_PDD11_R
MOD_SH_IDE_PDD12_R
MOD_SH_IDE_PDD13_R
MOD_SH_IDE_PDD14_R
MOD_SH_IDE_PDD15_R
NC_CK_PWRDN_N
MOD_SH_IDE_PDA2_R
MOD_SH_IDE_PDCS3_N
MOD_SH_IDE_PDA0_R
MOD_SH_IDE_PDCS1_N
CTRLPNL_PRES_N
FRONT_MONITOR_PRES_N
I2C_VIDFRONT_5V_SCL
I2C_VIDFRONT_5V_SDA
FRONT_HSYNC
FRONT_GREEN
I2C_BMC_SEG3_VAUX_SCL
I2C_BMC_SEG3_VAUX_SDA
+5V
REPLACE
+12V
REPLACE
50
50
50
50
50
50
50
50
50
51
50
51
105
105
106
105
86,87,91,120
86,87,91,120
+3.3V
REPLACE
21
C2833
105
.1uF
16V-10%
21
C2832
.1uF
16V-10%
51,66
U8044NP
14
11 10
74LCX07
X
+12V
REPLACE
2 1
C502
+3.3V
REPLACE
C990
MOD_SH_USB_P4_DP
10uF
16V 10%
+5V
REPLACE
1 2
C8458
1 2
.1uF
16V-10%
22uF 6.3V
21
C628
21
C349
21
C626
.1uF
.1uF
49,70
.1uF
16V-10%
21
C503
16V-10%
21
C350
16V-10%
21
C627
10uF
16V 10%
.1uF
16V-10%
.1uF
16V-10%
21
C3167
21
C629
+5VAUX
1 2
C8459
.1uF
16V-10%
.1uF
16V-10%
.1uF
16V-10%
TITLE
21
1 2
21
.1uF
10uF
4.7uF
C3136
C8456
+3.3V_AUX
REPLACE
C820
16V-10%
16V 10%
6.3V-10%
MODULE:
DESC:
REV: OF
IO
SIDEPLANE AND RISER
SEC
INC.
ROUND ROCK,TEXAS
3
4
ROOM=PCIE_ROMB
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 70 OF 144
DCBA
Page 71
A B C
D
1
Defined by PCI-e CEM Spec
Rev 1.0a
SB_C
SB
T
R
NH or SH
NB
PCI-e Controller
T
R
PCI-e Card Connector
This is not a standard PCIexpress pinout.
Never plug a PCIexpress card directly into this connector.
J_RISER1
X00_DT9913 SCH
138
71,138
68,138
96,138
+3.3V
REPLACE
+3.3V_AUX
REPLACE
V_P1P5_RISER_EN
V_P1P5_RISER_PG
MOD_LPC_RISER_HS_PRES_N
NC_PEWIDTH_0
MOD_SB_RISER_1_REV
NC_RISER1_B1
NC_RISER1_B2
NC_RISER1_B4
B1
+12V_1
B2 A2
+12V_2 +12V_3
B4
GND_B4
B5
SMCLK
B6
SMDATA
B7
GND_B7
B8
+3.3V_1
B9
JTAG_TRST
B11
WAKE
B12
RSVD_B12
B13
GND_B13
B14
PETP0
B15
PETN0
B16
GND_B16
B17
PRSNT2_X1
B18
GND_B18
PRSNT1
+12V_4+12V_5
GND_A4
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
+3.3V_2
+3.3V_3+3.3V_AUX
PERST
GND_A12
REFCLK+
REFCLKÂGND_A15
PERP0
PERN0
GND_A18
A1
A3B3
A4
A5
A6
A7
A8
A9
A10B10
A11
A12
A13
A14
A15
A16
A17
A18
NC_RISER1_A2
NC_RISER1_A3
+3.3V
REPLACE
CK_100M_PCIE_NH_1_DP
CK_100M_PCIE_NH_1_DN
Bullion needs to send +1.8V to PCIX riser
RISER 1
1
Left X/e
NH Port 0(x8),1(x4)
24
24
2
3
4
SB = SouthBound
NB = NorthBound
*Corvette also matches this
+12V
REPLACE
8.06K-1% 3.01K-1% 8.06K-1% 3.01K-1%
12
12
+12V
REPLACE
12
12
R9775
V_P1P5_RISER_PG
R9780
R8276
V_P5_RISER_PG
R8277
T = Transmit
R = Receive
71,138
71,138
138
+3.3V_AUX
REPLACE
1 2
8.2K-5%
R5488
66,68
66,68,138
+12V
REPLACE
MOD_LPC_RISER_1_TYPE_1U
MOD_LPC_RISER_1_TYPE_EXP_N
+3.3V
REPLACE
SYSTEM_PWRGOOD_RISER1
27
27
27
27
96,138
138
27
27
27
27
27
27
27
27
138
27
27
27
27
27
27
27
27
27
27
27
27
EXP_NH_1_SB_0_DP
EXP_NH_1_SB_0_DN
EXP_NH_1_SB_1_DP
EXP_NH_1_SB_1_DN
RISER1_PERST_N
PLT_RST_RISER1_N
EXP_NH_1_SB_2_DP
EXP_NH_1_SB_2_DN
EXP_NH_1_SB_3_DP
EXP_NH_1_SB_3_DN
EXP_NH_0_SB_0_DP
EXP_NH_0_SB_0_DN
EXP_NH_0_SB_1_DP
EXP_NH_0_SB_1_DN
EXP_NH_0_SB_2_DP
EXP_NH_0_SB_2_DN
EXP_NH_0_SB_3_DP
EXP_NH_0_SB_3_DN
EXP_NH_0_SB_4_DP
EXP_NH_0_SB_4_DN
EXP_NH_0_SB_5_DP
EXP_NH_0_SB_5_DN
EXP_NH_0_SB_6_DP
EXP_NH_0_SB_6_DN
EXP_NH_0_SB_7_DP
EXP_NH_0_SB_7_DN
138
RISER_LEFT_PRES_N
V_P5_RISER_EN
B19
PETP1
B20
PETN1
B21
GND_B21
B22
GND_B22
B23
PETP2
B24
PETN2
B25
GND_B25
B26
GND_B26
B27
PETP3
B28
PETN3
B29
GND_B29
B30
RSVD_B30
B31
PRSNT2_X4
B32
GND_B32
B33
PETP4
B34
PETN4
B35
GND_B35
B36
GND_B36
B37
PETP5
B38
PETN5
B39
GND_B39
B40
GND_B40
B41
PETP6
B42
PETN6
B43
GND_B43
B44
GND_B44
B45
PETP7
B46
PETN7
B47
GND_B47
B48
PRSNT2_X8
B49
GND_B49
B50
PETP8
B51
PETN8
B52
GND_B52
B53
GND_B53
B54
PETP9
B55
PETN9
B56
GND_B56
B57
GND_B57
B58
PETP10
B59
PETN10
B60
GND_B60
B61
GND_B61
B62
PETP11
B63
PETN11
B64
GND_B64
B65
GND_B65
B66
PETP12
B67
PETN12
B68
GND_B68
B69
GND_B69
B70
PETP13
B71
PETN13
B72
GND_B72
B73
GND_B73
B74
PETP14
B75
PETN14
B76
GND_B76
B77
GND_B77
B78
PETP15
B79
PETN15
B80
GND_B80
B81
PRSNT2_X16
B82
RSVD_B82
RSVD_A19
GND_A20
GND_A23
GND_A24
GND_A27
GND_A28
GND_A31
RSVD_A32
RSVD_A33
GND_A34
GND_A37
GND_A38
GND_A41
GND_A42
GND_A45
GND_A46
GND_A49
RSVD_A50
GND_A51
GND_A54
GND_A55
GND_A58
GND_A59
GND_A62
GND_A63
GND_A66
GND_A67
GND_A70
GND_A71
GND_A74
GND_A75
GND_A78
GND_A79
GND_A82
PCI-E 16X CONNECTOR
PCI-E SPECIFICATION 1.0a
3.1mm PIN LENGTH
SILKSCREEN=RISER1
P18_DT9100_jp
P19_DT9176_rt_swap_symbol
PERP1
PERN1
PERP2
PERN2
PERP3
PERN3
PERP4
PERN4
PERP5
PERN5
PERP6
PERN6
PERP7
PERN7
PERP8
PERN8
PERP9
PERN9
PERP10
PERN10
PERP11
PERN11
PERP12
PERN12
PERP13
PERN13
PERP14
PERN14
PERP15
PERN15
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
NH_PCIE_A_WAKE_N
CK_100M_PCIE_NH_0_DP
CK_100M_PCIE_NH_0_DN
EXP_NH_1_NB_0_DP
EXP_NH_1_NB_0_DN
EXP_NH_1_NB_1_DP
EXP_NH_1_NB_1_DN
I2C_CHIPSET_SCL
I2C_CHIPSET_SDA
EXP_NH_1_NB_2_DP
EXP_NH_1_NB_2_DN
EXP_NH_1_NB_3_DP
EXP_NH_1_NB_3_DN
EXP_NH_0_NB_0_DP
EXP_NH_0_NB_0_DN
EXP_NH_0_NB_1_DP
EXP_NH_0_NB_1_DN
V_P5_RISER_PG
EXP_NH_0_NB_4_DP
EXP_NH_0_NB_4_DN
EXP_NH_0_NB_5_DP
EXP_NH_0_NB_5_DN
EXP_NH_0_NB_6_DP
EXP_NH_0_NB_6_DN
EXP_NH_0_NB_7_DP
EXP_NH_0_NB_7_DN
EXP_NH_0_NB_2_DP
EXP_NH_0_NB_2_DN
EXP_NH_0_NB_3_DP
EXP_NH_0_NB_3_DN
77,81,83
24
24
24
24
24
24
72
72
24
24
24
24
24
24
24
24
71,138
24
24
24
24
24
24
24
24
24
24
24
+3.3V
24
REPLACE
+12V
REPLACE
+12V
REPLACE
Place caps near J_RISER1
21
+3.3V
REPLACE
C478
2 1
10uF
16V 10%
C596
Place caps near J_RISER1
21
C983
1 2
22uF 6.3V
+3.3V_AUX
REPLACE
C479
1 2
C195
22uF 6.3V
.1uF
16V-10%
Place cap near J_RISER1
21
C813
4.7uF
6.3V-10%
.1uF
21
C196
TITLE
21
C597
16V-10%
.1uF
16V-10%
.1uF
16V-10%
21
C3168
MODULE:
DESC:
REV: OF
21
C598
.1uF
16V-10%
.1uF
1 2
C599
16V-10%
INC.
SCHEM,PLN,SV,PE_BULN
21
C3137
.1uF
16V-10%
.1uF
16V-10%
IO
SIDEPLANE AND RISER
2
SEC
10
ROUND ROCK,TEXAS
2
3
4
ROOM=PCIE_RISER1
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
FP975
DCBA
REV.
X01
SHEET
71 OF 14410/20/2006
Page 72
A B C
D
1
2
Defined by PCI-e CEM Spec
Rev 1.0a
SB_C
SB
T
R
NB
ESB2 or MCH
PCI-e Controller
NB = NorthBound
*Corvette also matches this
T
R
T = TransmitSB = SouthBound
R = Receive
PCI-e Card Connector
138
+3.3V_AUX
REPLACE
NP
1 2
8.2K-5%
R6017
X
138
96,138
71
71
This is not a standard PCIexpress pinout.
Never plug a PCIexpress card directly into this connector.
+3.3V_AUX
REPLACE
NC_J_RISER2_B22
NC_J_RISER2_B23
SHROUD_PRES
NC_J_RISER2_B25
PLT_RST_RISER2_N
I2C_CHIPSET_SCL
I2C_CHIPSET_SDA
Side B
NC_N12V_RISER
NC_RISER2_B2
NC_RISER2_B3
NC_RISER2_B4
+3.3V
REPLACE
RISER2_PERST_N
B1
+12V_1
B2 A2
+12V_2 +12V_3
B4
GND_B4
B5
SMCLK
B6
SMDATA
B7
GND_B7
B8
+3.3V_1
B9
JTAG_TRST
B11
WAKE
B12
RSVD_B12
B13
GND_B13
B14
PETP0
B15
PETN0
B16
GND_B16
B17
PRSNT2_X1
B18
GND_B18
B19
PETP1
B20
PETN1
B21
GND_B21
B22
GND_B22
B23
PETP2
B24
PETN2
B25
GND_B25
B26
GND_B26
B27
PETP3
B28
PETN3
B29
GND_B29
B30
RSVD_B30
B31
PRSNT2_X4
B32
GND_B32
J_RISER2
PRSNT1
+12V_4+12V_5
GND_A4
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
+3.3V_2
+3.3V_3+3.3V_AUX
PERST
GND_A12
REFCLK+
REFCLKÂGND_A15
PERP0
PERN0
GND_A18
RSVD_A19
GND_A20
PERP1
PERN1
GND_A23
GND_A24
PERP2
PERN2
GND_A27
GND_A28
PERP3
PERN3
GND_A31
RSVD_A32
A1
A3B3
A4
A5
A6
A7
A8
A9
A10B10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
Side A
NC_RISER2_A2
NC_RISER2_A3
NC_RISER2_A4
NC_RISER2_A5
NC_J_RISER2_A23
NC_J_RISER2_A24
NC_J_RISER2_A26
NC_J_RISER2_A27
NC_MOD_LPC_RISER_HS_PRES_N
NH_PCIE_B_WAKE_N
MOD_LPC_RISER_2_TYPE_1U
+3.3V
REPLACE
77
66,68
RISER 2
Center
NH Port 3
+12V
REPLACE
Place caps near J_RISER2
12
C477
10uF
16V 10%
C476
2 1
10uF
16V 10%
21
C592
.1uF
16V-10%
21
C593
.1uF
16V-10%
21
C594
.1uF
16V-10%
21
C595
.1uF
16V-10%
21
C8310
.1uF
16V-10%
1
2
3
4
ROOM=PCIE_RISER2
138
+3.3V_AUX
REPLACE
1 2
8.2K-5%
R5461
NC_CK_100M_PCIE_SLOT4_DP
NC_CK_100M_PCIE_SLOT4_DN
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
EXP_NH_3_SB_7_DN
EXP_NH_3_SB_7_DP
EXP_NH_3_SB_6_DN
EXP_NH_3_SB_6_DP
EXP_NH_3_SB_5_DN
EXP_NH_3_SB_5_DP
NC_PEWIDTH_1
EXP_NH_3_SB_4_DN
EXP_NH_3_SB_4_DP
EXP_NH_3_SB_1_DN
EXP_NH_3_SB_1_DP
EXP_NH_3_SB_0_DN
EXP_NH_3_SB_0_DP
EXP_NH_3_SB_3_DN
EXP_NH_3_SB_3_DP
EXP_NH_3_SB_2_DP
EXP_NH_3_SB_2_DN
+12V
REPLACE
RISER_CENTER_PRES_N
NC_RISER2_B72
NC_RISER2_B74
B33
PETP4
B34
PETN4
B35
GND_B35
B36
GND_B36
B37
PETP5
B38
PETN5
B39
GND_B39
B40
GND_B40
B41
PETP6
B42
PETN6
B43
GND_B43
B44
GND_B44
B45
PETP7
B46
PETN7
B47
GND_B47
B48
PRSNT2_X8
B49
GND_B49
B50
PETP8
B51
PETN8
B52
GND_B52
B53
GND_B53
B54
PETP9
B55
PETN9
B56
GND_B56
B57
GND_B57
B58
PETP10
B59
PETN10
B60
GND_B60
B61
GND_B61
B62
PETP11
B63
PETN11
B64
GND_B64
B65
GND_B65
B66
PETP12
B67
PETN12
B68
GND_B68
B69
GND_B69
B70
PETP13
B71
PETN13
B72
GND_B72
B73
GND_B73
B74
PETP14
B75
PETN14
B76
GND_B76
B77
GND_B77
B78
PETP15
B79
PETN15
B80
GND_B80
B81
PRSNT2_X16
B82
RSVD_B82
PCI-E 16X CONNECTOR
PCI-E SPECIFICATION 1.0a
3.1mm PIN LENGTH
SILKSCREEN=RISER2
P18_DT9100_jp
P19_DT9176_rt_swap_symbol
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
RSVD_A33
GND_A34
PERP4
PERN4
GND_A37
GND_A38
PERP5
PERN5
GND_A41
GND_A42
PERP6
PERN6
GND_A45
GND_A46
PERP7
PERN7
GND_A49
RSVD_A50
GND_A51
PERP8
PERN8
GND_A54
GND_A55
PERP9
PERN9
GND_A58
GND_A59
PERP10
PERN10
GND_A62
GND_A63
PERP11
PERN11
GND_A66
GND_A67
PERP12
PERN12
GND_A70
GND_A71
PERP13
PERN13
GND_A74
GND_A75
PERP14
PERN14
GND_A78
GND_A79
PERP15
PERN15
GND_A82
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
RISER_2_TYPE_EXP_N
CK_100M_PCIE_NH_3_DP
CK_100M_PCIE_NH_3_DN
EXP_NH_3_NB_7_DN
EXP_NH_3_NB_7_DP
EXP_NH_3_NB_6_DN
EXP_NH_3_NB_6_DP
EXP_NH_3_NB_5_DN
EXP_NH_3_NB_5_DP
MOD_LPC_RISER_2_REV
EXP_NH_3_NB_4_DN
EXP_NH_3_NB_4_DP
EXP_NH_3_NB_3_DP
EXP_NH_3_NB_3_DN
EXP_NH_3_NB_2_DP
EXP_NH_3_NB_2_DN
EXP_NH_3_NB_1_DP
EXP_NH_3_NB_1_DN
EXP_NH_3_NB_0_DP
EXP_NH_3_NB_0_DN
SYSTEM_PWRGOOD_RISER2
NC_RISER2_A72
NC_RISER2_A73
NC_V_P1V5_PXH_PG
NC_V_P1V5_PXH_EN
NOTE: Center Riser is PCIe only, no need to PXH pwr signals
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
138
68
66,68
+12V
REPLACE
+3.3V
REPLACE
C982
1 2
22uF 6.3V
+3.3V_AUX
REPLACE
21
C814
4.7uF
21
C194
.1uF
16V-10%
21
C192
.1uF
16V-10%
21
C3169
.1uF
Place caps near J_RISER2
Place cap near J_RISER2
6.3V-10%
M2LB_Change_Note:
Replaced SLOT with RISER.
TITLE
DWG NO.
DATE
16V-10%
MODULE:
DESC:
REV: OF
SIDEPLANE AND RISER
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 72 OF 144
3
IO
103
4
DCBA
Page 73
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
3
4
ROOM=PCIX
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
SCHEM,PLN,SV,PE_BULN
ESB
X01
INC.
ROUND ROCK,TEXAS
FP975
SHEET
DCBA
SEC
4
REV.
73 OF 14410/20/2006
Page 74
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
IO
PCI-E AND HP
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 74 OF 144
DCBA
105
4
Page 75
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
3
M2LB_Change_Note:
Removed HP circuitry.
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
IO
SEC
PCI-E AND HP
106
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 75 OF 144
DCBA
4
Page 76
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
M2LB_Change_Note:
Removed HP circuitry.
MODULE:
DESC:
REV: OF
IO
PCI-E AND HP
SEC
3
107
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 76 OF 144
DCBA
4
Page 77
A B C
D
1
D
3
BSS138
1
+3.3V_AUX
REPLACE
21
SG
R4191
10K-5%
1 2
21
R4196
10K-5%
2
62
INTRUSION_COVER_VAUX_N
R4189
1 2
1K-1%
MOD_INTRUSION_COVER_VAUX_1_N
Q1884
BSS138
1
G
D
3
S
2
+3.3V_AUX
REPLACE
WAKE_A_SIO_N
66
2
NH_PCIE_A_WAKE_N
21
71,81,83
3
R9804
1 2
1K-1%
Q8069
BSS138
1
G
R9814
1 2
D
3
S
2
10K-5%
R9815
10K-5%
WAKE_B_SIO_N
NH_PCIE_B_WAKE_N
66
3
72
4
ROOM=PCIE_HP
2N7002 is N-FET Vgs = up to 3.0V depend on vendor
Dell PN 16155, 05168, 3282E, D1052, G5996, K5451, 1035D
It is a cheap part, $0.012 to $0.015
BSH111, DPN R1878 is N-FET Vgs = 1.3V
It may be cheap part
BSS138, DPN R5841 is N-FET Vgs = 1.6V
It is a cheap part, $0.0225, $0.029
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
IO
SEC
PCI-E AND HP
108
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 77 OF 144
4
DCBA
Page 78
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
M2LB_Change_Note:
Removed HP circuitry.
MODULE:
DESC:
REV: OF
IO
PCI-E AND HP
SEC
3
109
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 78 OF 144
DCBA
4
Page 79
A B C
D
1
1
2
2
This Page Intentionally Left Blank
3
3
M2LB_Change_Note:
Removed HP circuitry.
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
IO
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 79 OF 144
DCBA
PCI-E AND HP
1010
4
Page 80
A B C
D
1
94
94
X00_DT10000 SCH change to AUX
MOD_BMC_FAN11_TACH_R
MOD_BMC_FAN12_TACH_R
+3.3V_AUX
REPLACE
R9866
100-5%
R8014
1 2
+3.3V_AUX
REPLACE
R9867
100-5%
R8011
1 2
8.2K-5%8.2K-5% 8.2K-5% 8.2K-5%8.2K-5%
POP3
1 2
8.2K-5%
POP3
POP3
1 2
8.2K-5%
POP3
21
R8045
21
R8042
1K-1%
R9849
1K-1%
R9850
BAT54SW
K2
A1
12
3
POP3
A2/K1
D8006
12
1
ZONE 1 - CPU1 Fan
MOD_BMC_FAN11_TACH
POP3
16V-10%
.01uF
C8024
21
BAT54SW
K2
A1
2 1
3
POP3
A2/K1
D8007
12
ZONE 1 - CPU1/Mem FAn
MOD_BMC_FAN12_TACH
POP3
16V-10%
.01uF
C8023
86,88
86,88
2
3
London Fans
Location PS2 PS1 CPU2 CPU2 CPU1 CPU1/Mem
Connector 6 5 1 2 3 4
Tach 6 5 1 2 3 4
Zone 3 3 1 1 2 2
Berlin Fans
Location PS CPU2 CPU1 Mem
Connector 1 2 3 4
Tach 5,6,13,14 1,2,9,10 3,7,11,15 4,8,12,16
Zone 3 2 1 1
smr_03_12_05 - changed BOM options on fan circuits
80
80
80
80
86,88
86,88
21
C8566
MOD_BMC_FAN13_TACH_PRE
MOD_BMC_FAN14_TACH_PRE
MOD_BMC_FAN15_TACH_PRE
MOD_BMC_FAN16_TACH_PRE
NC_MOD_BMC_FANMUX_10 NC_MOD_BMC_FANMUX_9
NC_MOD_BMC_FANMUX_11
NC_MOD_BMC_FANMUX_12
NC_MOD_BMC_FANMUX_13
MOD_BMC_TACH_MUX_SEL0
MOD_BMC_TACH_MUX_SEL1
.1uF
10V-10%
+3.3V_AUX
REPLACE
X00_DT10000 SCH change to AUX
R8071
1K-1%
1 2
POP3
R8072
1 2
16
6
5
4
3
10
11
12
13
14
2
1
15
1K-1%
POP3
VCC
IA0
IA1
IA2
IA3
IB0
IB1
IB2
IB3
S0
S1
EA_N
EB_N
5C3253
U8001
YA
YB
GND
+3.3V_AUX
REPLACE
K2
BAT54SW
3
A2/K1
D8008
A1
12
R9868
100-5%
21
1K-1%
POP3
12
R9851
21
94
MOD_BMC_FAN13_TACH_R
+3.3V_AUX
R8013
1 2
REPLACE
POP3
1 2
8.2K-5%
POP3
R9869
100-5%
R8043
21
1K-1%
BAT54SW
K2
2 1
3
POP3
A2/K1
D8009
A1
POP3
16V-10%
.01uF
ZONE 3 - PSU Fan
MOD_BMC_FAN13_TACH_PRE
C8026
21
2
80
12
R9852
R8012
1 2
94
7
MOD_BMC_FAN13_TACH
86,88
MOD_BMC_FAN14_TACH_R
+3.3V_AUX
REPLACE
POP3
1 2
8.2K-5%
POP3
R9870
100-5%
R8044
21
1K-1%
POP3
16V-10%
.01uF
BAT54SW
K2
A1
2 1
3
A2/K1
12
POP3
D8010
ZONE 3 - PSU Fan
MOD_BMC_FAN14_TACH_PRE
C8025
21
80
R9853
R8015
9
94
MOD_BMC_FAN15_TACH_R
1 2
8
+3.3V_AUX
REPLACE
POP3
1 2
8.2K-5%
POP3
R9865
100-5%
R8040
21
1K-1%
POP3
K2
BAT54SW
3
A2/K1
D8005
POP3
A1
12
ZONE 1 - CPU1 Fan
MOD_BMC_FAN15_TACH_PRE
16V-10%
.01uF
C8021
21
80
3
12
R9848
ZONE 1 - CPU1/Mem Fan
MOD_BMC_FAN16_TACH_PRE
C8022
80
94
MOD_BMC_FAN16_TACH_R
R8010
1 2
8.2K-5%
POP3
1 2
8.2K-5%
POP3
R8041
POP3
16V-10%
.01uF
4
X00_DT9867 SCH V node for diode
X00_DT10011 SCH series R increase to 8.2k
+12V
REPLACE
21
C8003
POP3
10uF
16V 10%
C8004
1 2
POP3
10uF
21
C8005
16V 10%
POP3
10uF
C8002
1 2
16V 10%
POP3
10uF
16V 10%
M2LB_Change_Note:
Changed fan circuitry.
Continued on Sheet 94.
TITLE
21
MODULE:
DESC:
BMC
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FANS
SEC
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
REV.
FP975
X01
SHEET
10/20/2006 80 OF 144
DCBA
Page 81
A B C
D
descriptive ROOMs (p.81-85)
including 49.9 ohms on ethernet term
NOTE: for debug only, removed for production
+3.3V
1
2
DT10090_add dbg led_jd
SUB=NP0
NH_PCIE_A_WAKE_N
74LVC1G04
NOTE: check current delivery of led driver
138
R6036
1K-1%
1 2
82
82
82
82
82
82
82
82
LAN_AUX
U8035
2
81
LOM1_PERST_N
MOD_LOM1_EXP_PEX_1_NB_0_C_DP
MOD_LOM1_EXP_PEX_1_NB_0_C_DN
MOD_LOM1_EXP_PEX_1_NB_1_C_DP
MOD_LOM1_EXP_PEX_1_NB_1_C_DN
MOD_LOM1_EXP_PEX_1_NB_2_C_DP
MOD_LOM1_EXP_PEX_1_NB_2_C_DN
MOD_LOM1_EXP_PEX_1_NB_3_C_DP
MOD_LOM1_EXP_PEX_1_NB_3_C_DN
SUB=NP0
5
4
3
MOD_LOM1_REFCLK_SEL_UMP_MSB
NC_MOD_LOM1_PWR_IND_N
NC_MOD_LOM1_ATTN_IND_N
81
45
45
28
28
28
28
28
28
28
28
R9776
1 2
200-5%
12
DS7
SUB=NP0
MOD_LOM1_ATTN_BTTN_N
CK_100M_PCIE_LOM1_DP
CK_100M_PCIE_LOM1_DN
EXP_PEX_1_SB_0_DP
EXP_PEX_1_SB_0_DN
EXP_PEX_1_SB_1_DP
EXP_PEX_1_SB_1_DN
EXP_PEX_1_SB_2_DP
EXP_PEX_1_SB_2_DN
EXP_PEX_1_SB_3_DP
EXP_PEX_1_SB_3_DN
+3.3V
LAN_AUX
LED, GREEN
MOD_LOM1_PCIESDSVDD
MOD_LOM1_EPBPLLVDD
MOD_LOM1_SDSPLLVDD
J16
DC_J16/SERPLL_VDDL
M16
DC_M16/EPBPLL_VDDL
M18
PCIE_SDSVDD/PCIE_TXVDDL
N20
DC_N20/PCIE_TXVDDL
P18
DC_P18/PCIE_TXVDDL
R20
DC_R20/PCIE_TXVDDL
U20
DC_U20/PCIE_RXVDDL
V18
DC_V18/PCIE_RXVDDL
W20
DC_W20/PCIE_RXVDDL
Y18
DC_Y18/PCIE_RXVDDL
C18
VDDIO_C18
C2
VDDIO_C2
C4
VDDIO_C4
C7
VDDIO_C7
H3
VDDIO_H3
N3
VDDIO_N3
V12
VDDIO_V12
V2
VDDIO_V2
V4
VDDIO_V4
V8
VDDIO_V8
N5
REFCLK_SEL/GPIO7
E1
PCIE_RST_N
F1
PWR_IND_LED_N
G1
ATTN_IND_LED_N
F2
ATTN_BTTN_N
T19
PCIE_REFCLK_P
T20
PCIE_REFCLK_N
M19
PCIE_TD0_P
M20
PCIE_TD0_N
N17
DC_N17/PCIE_TD1_P
N18
DC_N18/PCIE_TD1_N
P19
DC_P19/PCIE_TD2_P
P20
DC_P20/PCIE_TD2_N
R17
DC_R17/PCIE_TD3_P
R18
DC_R18/PCIE_TD3_N
Y19
PCIE_RD0_P
Y20
PCIE_RD0_N
W17
DC_W17/PCIE_RD1_P
W18
DC_W18/PCIE_RD1_N
V19
DC_V19/PCIE_RD2_P
V20
DC_V20/PCIE_RD2_N
U17
DC_U17/PCIE_RD3_P
U18
DC_U18/PCIE_RD3_N
82
82
82
ROOM=LOM1
D5
E10
E11
E12
E13
E14
VDDC_D5
VDDC_E10
VDDC_E11
VDDC_E12
VDDC_E13
E15E4E5E6E7
VDDC_E4
VDDC_E14
VDDC_E5
VDDC_E15
F10
VDDC_E6
VDDC_E7
VDDC_F10
F11
F12
F13
VDDC_F11
VDDC_F12
VDDC_F13
F14
F15
F16F5F6F7F8F9G14G5G6
VDDC_F5
VDDC_F6
VDDC_F14
VDDC_F15
VDDC_F16
VDDC_F7
U_LOM1
BCM5708C_RB2,REV B2
HETERO 1 OF 3
VDDC_F8
VDDC_F9
VDDC_G14
H14H4H6
VDDC_G5
VDDC_G6
VDDC_H14
55,81,82,133
J14J6K14K6L14L6M14M6N14N4N6
VDDC_H4
VDDC_H6
VDDC_K6
VDDC_J14
VDDC_K14
VDDC_L6
VDDC_L14
VDDC_M14
MOD_LOM1_P1V2AUX
P14
P15P5P6
VDDC_J6
VDDC_M6
VDDC_N14
VDDC_N4
VDDC_N6
VDDC_P14
VDDC_P15
R13R5R6R7T4T5T8U5U8
VDDC_P5
VDDC_P6
VDDC_R5
VDDC_R6
VDDC_R7
VDDC_R13
VDDC_T4
55,81,82,133
VDDP_D16
VDDP_E16
VDDC_T5
VDDC_T8
VDDC_U5
VDDC_U8
BIASVDD/BIAS_VDDH
DC_F17/XTAL_VDDL
XTALVDD/XTAL_VDDH
PCIEPLL_VDDL
GPHY_PLLVDD/GPHYPLL_VDDL
AVDD_D11/GPHY_VDDH
AVDD_C13/GPHY_VDDH
AVDD_C12/GPHY_VDDH
AVDD_C11/GPHY_VDDH
AVDDL_C14/GPHY_VDDL
AVDDL_D12/GPHY_VDDL
AVDDL_D14/GPHY_VDDL
AVDDL_D13/GPHY_VDDL
AVDDL_E20/GMACPLL_VDDL
SPD1000LED_N
TRAFFICLED_N
GPHY_TVCOI/TEST_CLK_OUT
VDDP_K5
VDDP_L5
VDDP_U12
VDDP_T12
MOD_LOM1_GMACPLL_VDDL
REGSUP12
REGCNTL12
REGSEN12
VAUX_PRSNT
REGSUP25
REGOUT25
LINKLED_N
SPD100LED_N
TRD3_N
TRD3_P
TRD2_N
TRD2_P
TRD1_N
TRD1_P
TRD0_N
TRD0_P
MOD_LOM1_P2V5AUX
D16
E16
K5
L5
U12
T12
A15
F17
F18
T17
A17
D11
C13
C12
C11
C14
D12
D14
D13
E20
D19
C20
D20
A20
D18
D17
A1
A4
A3
B2
B10
A10
B11
A11
B12
A12
B13
A13
B16
MOD_LOM1_BIASVDD
MOD_LOM1_XTALVDDL
MOD_LOM1_XTALVDD
MOD_LOM1_PCIEPLLVDD
MOD_LOM1_GPHYPLLVDD
MOD_LOM1_P2V5AUX_AVDD
MOD_LOM1_REGCTL12
MOD_LOM1_REGSEN12
MOD_LOM1_P2V5AUX
MOD_LOM1_LINKLED_N
MOD_LOM1_ACTLED_N
21
C2958
MOD_LOM1_P1V2AUX_AVDD
MOD_LOM1_VAUX_PRES
MOD_LOM1_TRD4_N
MOD_LOM1_TRD4_P
MOD_LOM1_TRD3_N
MOD_LOM1_TRD3_P
MOD_LOM1_TRD2_N
MOD_LOM1_TRD2_P
MOD_LOM1_TRD1_N
MOD_LOM1_TRD1_P
MOD_LOM1_GPHY_TVCOI
.1uF
C2957
10V-10%
21
C3194
21
.1uF
21
.1uF
C2917
10V-10%
1 2
C2962
10V-10%
81
4.7uF
6.3V-10%
.1uF
16V-10%
C2964
81
MOD_LOM1_GMACPLL_VDDL
R4625
X
1 2
5721J: pop
82
82
82
82
replaced symbol
82
L1772
21
1 2
+3.3V
R4565
1 2
BLM21AH601
.1uF
C2961
10V-10%
R4566
4.7K-5%
21
C2918
4.7uF
R4561
X
4.7K-5%
1 2
21
C2916
21
.1uF
R9956
1 2
0-5%
55,81,82,133
82
82
82
82
82
82
82
82
4.7uF
6.3V-10%
C2965
10V-10%
82
82
LAN_AUX
5721J: no-pop filter
21
C2949
0-5%
21
21
.1uF
10V-10%
+3.3V
LAN_AUX
C2963
6.3V-10%
R4560
X
4.7K-5%
1 2
MOD_LOM1_P2V5AUX
21
C2915
21
4.7K-5%
21
.1uF
C2913
10V-10%
BLM11A601S
4.7uF
6.3V-10%
.1uF
10V-10%
Depop on 5708
+3.3V
LAN_AUX
4.7uF
6.3V-10%
L1771
MJD45H11
MJD45H11
C3161
L1770
10uH 165MA
21
1
Q1937
1
Q1902
21
C2966
10uF 6.3V
Flash type selection
NP
MOD_LOM1_P1V2AUX
21
55,81,82,133
MOD_LOM1_P1V2AUX
+3.3V
LAN_AUX
3
21
C2959
4
3
4
MOD_LOM1_P1V2AUX
21
.1uF
10V-10%
.1uF
LAN_AUX VR
21
C2914
10V-10%
4.7uF
6.3V-10%
55,81,82,133
1
55,81,82,133
2
55,81,82,133
3
4
drive level and frequency deviation.
match load capacitance, negative resistance,
the crystal circuit characterization to
These values will need to be changed after
values for these loading caps.
These are the starting
RIN ROUT
5721J:
5708:
C2910
R4553
1 2
0 Ohm 200 Ohm
20 Ohm 20 Ohm
MOD_LOM1_XTALI_R
21
27pF 50V
NP
R4564
X
4.7K-5%
1 2
R4555
1 2
X9
1 2
25MHz
+3.3V
LAN_AUX
R4554
4.7K-5%
4.7K-5%
71,77,81,83
R4563
21
C2909
27pF 50V
+3.3V
REPLACE
R5456
X
4.7K-5%
1 2
MOD_LOM1_REFCLK_SEL_UMP_MSB
4.7K-5%
1 2
MOD_LOM1_ATTN_BTTN_N
4.7K-5%
1 2
R4591
20-1%
R4590
20-1%
MOD_LOM1_XTALO_R
83,87
83,87
5708: Pop R4554
5721: Pop R5456
MOD_LOM1_UMP_LSB
RIN
ROUT
I2C_ISO_NIC_SCL
I2C_ISO_NIC_SDA
81
81
81
NH_PCIE_A_WAKE_N
TP_MOD_LOM1_TMS
TP_MOD_LOM1_TDO
TP_MOD_LOM1_TDI
TP_MOD_LOM1_TCK
MOD_LOM1_TRST_N
MOD_LOM1_XTALI
MOD_LOM1_XTALO
F3
WAKE_N
C6
TMS
E2
TDO
B20
TDI
D1
TCK
B6
TRST_N
F20
XTALI/XTAL_P
F19
XTALO/XTAL_N
R4626
1 2
0-5%
R4627
1 2
0-5%
SMB_CLK
SMB_DATA
A5
A2
R4557
X
MOD_LOM1_SMB_CLK
MOD_LOM1_SMB_DATA
NC_MII_SHARE0_MDC
NC_MII_SHARE0_MDIO
NC_MII_SHARE0_MDINT
LOM1_CK25_OUT
85
NC_MOD_LOM1_HARD_RST_OUT
NC_MOD_LOM1_EXT_PAUSE_IN
MII_SHARE0_RXD0
92
MII_SHARE0_RXD1
92
NC_MII_SHARE0_RXER
1 2
+3.3V
LAN_AUX
4.7K-5%
R4556
X
1 2
4.7K-5%
DC_J1/EXT_MDC
DC_J2/EXT_MDIO
DC_J3/EXT_MDINT_N
DC_K1/CLK25_OUT
DC_K2/HARD_RST_OUT_N
DC_K3/EXT_PAUSE_IN
DC_L1/UMP_RXD_0
J1
J2J3K1K2K3L1L2L3M1
DC_L2/UMP_RXD_1
DC_L3/UMP_RXER
DC_M1/UMP_RXD_2
DC_M2/UMP_RXD_3
DC_M3/UMP_COL
DC_N1/UMP_RXCLK
DC_P1/UMP_TXCLK
DC_P2/UMP_RXDV
DC_P3/UMP_CRS
DC_R1/UMP_TXEN
DC_R2/UMP_TXER
DC_T1/UMP_TXD_0
DC_T2/UMP_TXD_1
DC_U1/UMP_TXD_2
M2M3N1
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
P1
P2
P3P4R1
R2
T1
T2T3U1
U2
DC_G3/PCIE_LINKUP_LED_N
DC_P4/GPIO6
DC_R4/GPIO5
DC_U2/UMP_TXD_3
DC_G2/DL_ACTIVE_LED_N
G3
G2
DC_T3/GPIO4
DC_R3/GPIO3
R4
R3
DC_W14/PLAY_DEAD
W14
DC_Y14/PCIE_DIS
Y14
DISABLE_ETHERNET_1
TP_MOD_LOM1_PLAY_DEAD
SHARED_BOOT_MODE_N
MOD_LOM1_GPIO4_PU
MOD_LOM1_GPIO5_PU
MOD_LOM1_UMP_LSB
NC_MOD_LOM1_PCIE_LINKUP
NC_MOD_LOM1_DL_ACTIVE
MII_SHARE0_TXD3_R
MII_SHARE0_TXD2_R
MII_SHARE0_TXD1_R
MII_SHARE0_TXD0_R
NC_MII_SHARE0_TXER
MII_SHARE0_TXEN_R
NC_MII_SHARE0_CRS
MII_SHARE0_RXDV
LOM1_SHARE0_CK25_TX
LOM1_SHARE0_CK25_RX
NC_MII_SHARE0_COL
MII_SHARE0_RXD3
MII_SHARE0_RXD2
EEDATA/DC
EECLK/DC
GPIO0_TEST_CLK/GPIO0
GPIO1
GPIO2/SEL_VAUX_N
SCLK
SI
SO
CS_N
RDAC
66
83,92
81
81
81
92
92
92
92
81,87
92
92
85
85
92
92
B8
A8
A18
A19
B19
B5
A6
B4
A7
B14
81
81
81
MOD_LOM1_EEDATA
MOD_LOM1_EECLK
NIC_ISO_ALERT1_N
MOD_LOM1_SMBUS_LSB
LOM1_SEL_VAUX_N
MOD_LOM1_SCK
MOD_LOM1_SI
MOD_LOM1_SO
MOD_LOM1_CS_N
MOD_LOM1_RDAC
R4633
1 2
MOD_LOM1_GPIO4_PU
MOD_LOM1_GPIO5_PU
NIC_ISO_ALERT1_N
MOD_LOM1_SMBUS_LSB
1.27K-1%
R5634
1 2
81
81
81
81
21
R5633
4.7K-5%
81,87
81
R4559
R5263
4.7K-5%
1 2
85
4.7K-5%
1 2
B:XF050,L:TF848
+3.3V
LAN_AUX
R4777
1 2
NP
4.7K-5%
R5265
X
R5264
1 2
1 2
4.7K-5%
M2LB_Change_Note:
Programmed EEPROM different.
4.7K-5%
TITLE
DWG NO.
DATE
R5019
4.7K-5%
1 2
WC179
N5119
R5021
1 2
IC, PROG
IC, FLSH
DSK PROG
4.7K-5%
MOD_LOM1_SO
81
MOD_LOM1_SCK
81
MOD_LOM1_CS_N
81
MODULE:
DESC:
REV: OF
INC.
SCHEM,PLN,SV,PE_BULN
FP975
10/20/2006 81 OF 144
R5020
X
4.7K-5%
MOD_LOM1_SI
81
2
3
4 5
SUB*_HY283
4.7K-5%
1 2
U1101
SCK
RESET
SC WP
AT45DB011B
ROUND ROCK,TEXAS
SHEET
R5022
1 2
SEC
4.7K-5%
MOD_LOM1_CS_N
+3.3V
LAN_AUX
81
SOSI
7
GND
6
VCC
X01_DTXXXXX
1 2
REV.
MOD_LOM1_SCK
MOD_LOM1_SI
MOD_LOM1_SO
R4776
LOM1
X01
1 2
3
81
81
81
81
4.7K-5%
4
DCBA
Page 82
1
2
3
4
81
81
81
81
81
81
81
81
Common 2.5V Filters
MOD_LOM1_BIASVDD
MOD_LOM1_XTALVDD
MOD_LOM1_PCIEPLLVDD
MOD_LOM1_PCIESDSVDD
.1uF
1 2
C3023
EXP_PEX_1_NB_0_DP
28
EXP_PEX_1_NB_0_DN
28
EXP_PEX_1_NB_1_DP
28
EXP_PEX_1_NB_1_DN
28
EXP_PEX_1_NB_2_DP
28
EXP_PEX_1_NB_2_DN
28
EXP_PEX_1_NB_3_DP
28
EXP_PEX_1_NB_3_DN
28
1 2
C3022
16V-10%
MOD_LOM1_GPHYPLLVDD
MOD_LOM1_XTALVDDL
MOD_LOM1_EPBPLLVDD
MOD_LOM1_SDSPLLVDD
A B C
L1777
BLM11A601S
21
.1uF
1 2
C2979
1 2
C2978
16V-10%
.1uF
16V-10%
C2924
C2923
Common 1.2V Filters
.1uF
1 2
C3024
.1uF
C3021
16V-10%
1 2
.1uF
16V-10%
1 2
C3020
Populate for 5708
1 2
C2969
.1uF
1 2
C2968
1 2
C2967
16V-10%
.1uF
16V-10%
C2920
C2919
4.7uF
21
4.7uF
21
C2930
16V-10%
1 2
C2980
.1uF
16V-10%
.1uF
C2921
16V-10%
21
4.7uF
21
4.7uF
6.3V-10%
BLM11A601S
6.3V-10%
4.7uF
6.3V-10%
21
.1uF
C2926
16V-10%
21
C2925
21
6.3V-10%
6.3V-10%
4.7uF
4.7uF
6.3V-10%
L1776
10uH 165MA
10uH 165MA
16V-10%
16V-10%
16V-10%
16V-10%
21
21
L1781
10uH 165MA
BLM21AH601
4.7uF
6.3V-10%
10uH 165MA
6.3V-10%
L1775
BLM11A601S
L1774
L1773
C2956
1 2
.1uF
C2954
1 2
.1uF
C2952
1 2
.1uF
C2951
1 2
.1uF
16V-10%
16V-10%
16V-10%
16V-10%
MOD_LOM1_P2V5AUX
21
MOD_LOM1_P1V2AUX
L1779
21
L1778
21
21
MOD_LOM1_P1V2AUX
21
21
C2955
1 2
.1uF
C2953
1 2
.1uF
C2960
1 2
.1uF
C3399
1 2
.1uF
MOD_LOM1_EXP_PEX_1_NB_0_C_DP
MOD_LOM1_EXP_PEX_1_NB_0_C_DN
MOD_LOM1_EXP_PEX_1_NB_1_C_DP
MOD_LOM1_EXP_PEX_1_NB_1_C_DN
MOD_LOM1_EXP_PEX_1_NB_2_C_DP
MOD_LOM1_EXP_PEX_1_NB_2_C_DN
MOD_LOM1_EXP_PEX_1_NB_3_C_DP
MOD_LOM1_EXP_PEX_1_NB_3_C_DN
200mA
Ferrites
replaced symbol
55,81,82,133
55,81,82,133
55,81,82,133
A14
A16
A9
B15
B17
B18
B3
B7
B9
C10
C15
C16
C17
C19
C9
D10
D15
D3
E17
E18
E19
G10
G11
G12
G13
G17
G18
G19
G20
G7
G8
G9
H10
H11
H12
H13
H17
H2
H7
H8
H9
J10
J11
J12
J13
J15
J19
J20
J7
J8
J9
K10
K11
K12
K13
K17
K7
K8
K9
L10
L11
L12
VSS_A14
VSS_A16
VSS_A9
VSS_B15
VSS_B17
VSS_B18
VSS_B3
VSS_B7
VSS_B9
VSS_C10
VSS_C15
VSS_C16
VSS_C17
VSS_C19
VSS_C9
VSS_D10
VSS_D15
VSS_D3
VSS_E17
VSS_E18
VSS_E19
VSS_G10
VSS_G11
VSS_G12
VSS_G13
VSS_G17
VSS_G18
VSS_G19
VSS_G20
VSS_G7
VSS_G8
VSS_G9
VSS_H10
VSS_H11
VSS_H12
VSS_H13
VSS_H17
VSS_H2
VSS_H7
VSS_H8
VSS_H9
VSS_J10
VSS_J11
VSS_J12
VSS_J13
VSS_J15
VSS_J19
VSS_J20
VSS_J7
VSS_J8
VSS_J9
VSS_K10
VSS_K11
VSS_K12
VSS_K13
VSS_K17
VSS_K7
VSS_K8
VSS_K9
VSS_L10
VSS_L11
VSS_L12
U_LOM1
VSS_L13
VSS_L15
VSS_L16
VSS_L17
VSS_L18
VSS_L19
VSS_L20
VSS_L7
VSS_L8
VSS_L9
VSS_M10
VSS_M11
VSS_M12
VSS_M13
VSS_M15
VSS_M17
VSS_M7
VSS_M8
VSS_M9
VSS_N10
VSS_N11
VSS_N12
VSS_N13
VSS_N15
VSS_N16
VSS_N19
VSS_N2
VSS_N7
VSS_N8
VSS_N9
VSS_P10
VSS_P11
VSS_P12
VSS_P13
VSS_P16
VSS_P17
VSS_P7
VSS_P8
VSS_P9
VSS_R14
VSS_R15
VSS_R16
VSS_R19
VSS_T14
VSS_T18
VSS_U14
VSS_U15
VSS_U16
VSS_U19
VSS_U3
VSS_V14
VSS_V15
VSS_V16
VSS_V17
VSS_W12
VSS_W15
VSS_W16
VSS_W19
VSS_W3
VSS_W8
VSS_Y15
VSS_Y16
VSS_Y17
BCM5708C_RB2,REV B2
HETERO 3 OF 3
81
81
81
81
81
81
5708: E-JTAG interface to core
81
81
Depop on 5721J
R4569
1 2
4.7K-5%
+3.3V
REPLACE
L13
L15
L16
L17
L18
L19
L20
L7
L8
L9
M10
M11
M12
M13
M15
M17
M7
M8
M9
N10
N11
N12
N13
N15
N16
N19
N2
N7
N8
N9
P10
P11
P12
P13
P16
P17
P7
P8
P9
R14
R15
R16
R19
T14
T18
U14
U15
U16
U19
U3
V14
V15
V16
V17
W12
W15
W16
W19
W3
W8
Y15
Y16
Y17
5721J Debug Interface
5721J: no-pop
MOD_LOM1_ETRST_N
NOTE: for debug only, removed for production
MOD_LOM1_5708_UART_TXD
82
MOD_LOM2_5708_UART_RXD
84
+3.3V
REPLACE
R5790
1 2
X
0-5%
R5791
1 2
X
0-5%
5708 Debug Interface
TP_MOD_LOM1_5708_MODE0
TP_MOD_LOM1_5708_MODE1
TP_MOD_LOM1_5708_MODE2
TP_MOD_LOM1_5708_MODE3
TP_MOD_LOM1_5708_MODE4
82
82
MOD_LOM1_5708_UART_TXD
MOD_LOM1_5708_UART_RXD
TP_MOD_LOM1_MODE0
TP_MOD_LOM1_MODE1
TP_MOD_LOM1_MODE2
TP_MOD_LOM1_MODE3
TP_MOD_LOM1_5721_UART_TXD
TP_MOD_LOM1_5721_UART_RXD
82
R4670
1 2
MOD_LOM1_ETRST_N
TP_MOD_LOM1_ETDO
TP_MOD_LOM1_ETMS
TP_MOD_LOM1_ETCK
TP_MOD_LOM1_ETDI
TP_MOD_LOM1_CLKIN_SEL
NC_MOD_LOM1_D9
NC_MOD_LOM1_E8
NC_MOD_LOM1_E9
TP_MOD_LOM1_XTAL_ADJ3
0-5%
TP_MOD_LOM1_XTAL_ADJ2
TP_MOD_LOM1_XTAL_ADJ0
82
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
NC_MOD_LOM1_H1
NC_MOD_LOM1_H18
NC_MOD_LOM1_H19
NC_MOD_LOM1_H20
NC_MOD_LOM1_J18
NC_MOD_LOM1_J17
NC_MOD_LOM1_K15
NC_MOD_LOM1_K16
NC_MOD_LOM1_K18
DT10090_add dbg hdr_jd
J8
1
3
5
ROOM=LOM1
SUB=NP0
81
81
81
81
81
81
81
81
MOD_LOM1_TRDTCT1
MOD_LOM1_TRD1_P
MOD_LOM1_TRD1_N
MOD_LOM1_TRD2_P
MOD_LOM1_TRD2_N
MOD_LOM1_TRD3_P
MOD_LOM1_TRD3_N
MOD_LOM1_TRD4_P
MOD_LOM1_TRD4_N
W1
W2
W4
W7
Y1
Y2
Y3
Y4
Y5
D7
C3
D6
D4
C5
H5
M5
G15
G16
H15
H16
T16
Y10
B1
C1
D2
E3
F4
C8
D8
D9
E8
E9
G4
H1
H18
H19
H20
J4
J5
J18
J17
K15
K16
K18
2
MOD_LOM1_5708_UART_RXD
4
6
MOD_LOM2_5708_UART_TXD
R4642
1 2
PCIVDDIO_W1/DC
PCIVDDIO_W2/DC
PCIVDDIO_W4/DC
PCIVDDIO_W7/DC
PCIVDDIO_Y1/DC
PCIVDDIO_Y2/DC
PCIVDDIO_Y3/DC
PCIVDDIO_Y4/DC
PCIVDDIO_Y5/DC
NC_D7/NC_MODE_0
NC_C3/NC_MODE_1
NC_D6/NC_MODE_2
NC_D4/NC_MODE_3
NC_C5/NC_MODE_4
DC_H5/UART_TXD
DC_M5/UART_RXD
NC_MODE_0/NC
NC_MODE_1/NC
NC_MODE_2/NC
NC_MODE_3/NC
UART_TXD/DC_T16
UART_RXD/DC_Y10
DC_B1/DC_ETRST_N
DC_C1/DC_ETDO
DC_D2/NC_ETMS
DC_E3/NC_ETCK
DC_F4/NC_ETDI
DC_C8/XTAL_BYPASS
DC_D8/CLKIN_SEL
NC_D9
NC_E8
NC_E9
NC_G4
NC_H1
NC_H18
NC_H19
NC_H20
NC_J4
NC_J5
NC_J18
NC_J17
NC_K15
NC_K16
NC_K18
R4640
49.9-1%
21
C3016
1 2
.1uF
10V-10%
R4639
49.9-1%
ROOM=LOM1
55,81,82,133
1 2
C3015
MOD_LOM1_TRDTCT2
BCM5708C_RB2,REV B2
1 2
21
.1uF
HETERO 2 OF 3
R4638
49.9-1%
49.9-1%
10V-10%
U_LOM1
R4637
1 2
C3014
82
84
MOD_LOM1_P2V5AUX
R4636
49.9-1%
1 2
21
.1uF
MOD_LOM1_TRDTCT3
R4641
49.9-1%
1 2
10V-10%
NC_K19
NC_K20
NC_R10
NC_R11
NC_R12
NC_T10
NC_T11
NC_T13
NC_T15
NC_U10
NC_U11
NC_U13
NC_V10
NC_V11
NC_V13
NC_W10
NC_W11
NC_W13
NC_Y11
NC_Y12
NC_Y13
49.9-1%
21
C3013
NC_K4
NC_L4
NC_M4
NC_R8
NC_R9
NC_T6
NC_T7
NC_T9
NC_U4
NC_U6
NC_U7
NC_U9
NC_V1
NC_V3
NC_V5
NC_V6
NC_V7
NC_V9
NC_W5
NC_W6
NC_W9
NC_Y6
NC_Y7
NC_Y8
NC_Y9
R4635
1 2
.1uF
K19
K20
K4
L4
M4
R10
R11
R12
R8
R9
T10
T11
T13
T15
T6
T7
T9
U10
U11
U13
U4
U6
U7
U9
V1
V10
V11
V13
V3
V5
V6
V7
V9
W10
W11
W13
W5
W6
W9
Y11
Y12
Y13
Y6
Y7
Y8
Y9
C3012
49.9-1%
MOD_LOM1_TRDTCT4
10V-10%
NC_MOD_LOM1_K19
NC_MOD_LOM1_K20
TP_MOD_LOM1_XTAL_ADJ1
NC_MOD_LOM1_L4
NC_MOD_LOM1_M4
NC_MOD_LOM1_R10
NC_MOD_LOM1_R11
NC_MOD_LOM1_R12
NC_MOD_LOM1_R8
NC_MOD_LOM1_R9
NC_MOD_LOM1_T10
NC_MOD_LOM1_T11
NC_MOD_LOM1_T13
NC_MOD_LOM1_T15
NC_MOD_LOM1_T6
NC_MOD_LOM1_T7
NC_MOD_LOM1_T9
NC_MOD_LOM1_U10
NC_MOD_LOM1_U11
NC_MOD_LOM1_U13
NC_MOD_LOM1_U4
NC_MOD_LOM1_U6
NC_MOD_LOM1_U7
NC_MOD_LOM1_U9
NC_MOD_LOM1_V1
NC_MOD_LOM1_V10
NC_MOD_LOM1_V11
NC_MOD_LOM1_V13
NC_MOD_LOM1_V3
NC_MOD_LOM1_V5
NC_MOD_LOM1_V6
NC_MOD_LOM1_V7
NC_MOD_LOM1_V9
NC_MOD_LOM1_W10
NC_MOD_LOM1_W11
NC_MOD_LOM1_W13
NC_MOD_LOM1_W5
NC_MOD_LOM1_W6
NC_MOD_LOM1_Y10
NC_MOD_LOM1_Y11
NC_MOD_LOM1_Y12
NC_MOD_LOM1_Y13
NC_MOD_LOM1_Y6
NC_MOD_LOM1_Y7
NC_MOD_LOM1_Y8
NC_MOD_LOM1_Y9
D
+3.3V
LAN_AUX
R4594
1 2
200-5%
R5332
1 2
0 OHM
MOD_LOM1_CT_P2V5AUX_FIL
.1uF
C3011
10V-10%
21
21
.1uF
C3010
10V-10%
21
LAN_AUX
.1uF
C3009
10V-10%
+3.3V
21
.1uF
55,81,82,133
MOD_LOM1_ACTLED_R
MOD_LOM1_LINKLED_N
10V-10%
81
MOD_LOM1_P1V2AUX
MOD_LOM1_ACTLED_N
81
NP
X
1 2
C3101
R4595
1 2
200-5%
21
21
4.7uF
C3017
6.3V-10%
4.7uF
C3001
6.3V-10%
C2929
C2927
470pF
NP
X
1 2
C3103
1 2
1 2
50V-10%
470pF
50V-10%
.1uF
1 2
C3008
16V-10%
.1uF
1 2
C3000
16V-10%
NP
X
1 2
C3102
NP
X
1 2
C3104
.1uF
.1uF
470pF
50V-10%
J_ETH1
13
14
16
17 SH1
15
470pF
50V-10%
1 2
C3007
16V-10%
1 2
C2999
16V-10%
C1
A1
11
TRD1+
12
TRCT1
10
TRD1-
4
TRD2+
6
TRCT2
5
TRD2-
3
TRD3+
1
TRCT3
2
TRD3-
8
TRD4+
7
TRCT4
9
TRD4-
GREEN
ORANGE
MOD_LOM1_LINKLED_R
NOTE: on the 5721J some of these
decoupling capacitors can be depopped
--consult your local SNaC Engineer
.1uF
1 2
C3006
16V-10%
.1uF
1 2
C2998
16V-10%
YELLOW
COMMON
RJ45 MAGNETIC JACK W/2 LED'S
.1uF
C3005
16V-10%
.1uF
C2997
16V-10%
.1uF
1 2
1 2
C3004
16V-10%
.1uF
C2996
16V-10%
1 2
1 2
4x75ohms
1000pF 2kV
.1uF
1 2
C3003
16V-10%
.1uF
1 2
C2995
16V-10%
.1uF
C3002
16V-10%
.1uF
C2994
16V-10%
RJ45
Shield
1 2
1 2
.1uF
.1uF
1
2
3
6
4
5
7
8
SH1
SH2
SH2
1 2
C2982
16V-10%
1 2
C2981
16V-10%
1
2
.1uF
16V-10%
.1uF
16V-10%
3
+3.3V
LAN_AUX
21
C2922
+3.3V
REPLACE
21
C2928
X
4.7uF
C2977
6.3V-10%
4.7uF
C2986
6.3V-10%
.1uF
1 2
C2993
.1uF
1 2
1 2
C2976
16V-10%
No-pop for 5708.
.1uF
C2985
16V-10%
.1uF
1 2
.1uF
1 2
1 2
C2992
16V-10%
1 2
C2975
16V-10%
1 2
C2984
16V-10%
.1uF
C2991
16V-10%
.1uF
C2974
16V-10%
.1uF
C2983
16V-10%
.1uF
1 2
1 2
1 2
C2990
16V-10%
.1uF
C2973
16V-10%
.1uF
16V-10%
.1uF
1 2
1 2
NS: Populating some 0.1uF's
since 3.3V is still being
routed to this chip.
MODULE:
DESC:
REV: OF
C2989
16V-10%
.1uF
C2972
16V-10%
.1uF
1 2
1 2
C2988
16V-10%
.1uF
C2971
16V-10%
.1uF
1 2
1 2
C2987
16V-10%
.1uF
C2970
16V-10%
SEC
.1uF
1 2
1 2
16V-10%
.1uF
16V-10%
2 2
C3018
C3019
1 2
1 2
LOM1
.1uF
16V-10%
.1uF
16V-10%
4
INC.
TITLE
SCHEM,PLN,SV,PE_BULN
DWG NO.
FP975
DATE
ROUND ROCK,TEXAS
REV.
X01
SHEET
10/20/2006 82 OF 144
DCBA
Page 83
A B C
D
1
83
138
MOD_LOM2_REFCLK_SEL_UMP_MSB
LOM2_PERST_N
+3.3V
LAN_AUX
MOD_LOM2_PCIESDSVDD
MOD_LOM2_EPBPLLVDD
MOD_LOM2_SDSPLLVDD
J16
DC_J16/SERPLL_VDDL
M16
DC_M16/EPBPLL_VDDL
M18
PCIE_SDSVDD/PCIE_TXVDDL
N20
DC_N20/PCIE_TXVDDL
P18
DC_P18/PCIE_TXVDDL
R20
DC_R20/PCIE_TXVDDL
U20
DC_U20/PCIE_RXVDDL
V18
DC_V18/PCIE_RXVDDL
W20
DC_W20/PCIE_RXVDDL
Y18
DC_Y18/PCIE_RXVDDL
C18
VDDIO_C18
C2
VDDIO_C2
C4
VDDIO_C4
C7
VDDIO_C7
H3
VDDIO_H3
N3
VDDIO_N3
V12
VDDIO_V12
V2
VDDIO_V2
V4
VDDIO_V4
V8
VDDIO_V8
N5
REFCLK_SEL/GPIO7
E1
PCIE_RST_N
84
84
84
ROOM=LOM2
D5
E10
E11
E12
E13
E14
VDDC_D5
VDDC_E10
VDDC_E11
VDDC_E12
VDDC_E13
E15E4E5E6E7
VDDC_E4
VDDC_E14
VDDC_E5
VDDC_E15
F10
VDDC_E6
VDDC_E7
VDDC_F10
F11
F12
F13
VDDC_F11
VDDC_F12
VDDC_F13
F14
F15
F16F5F6F7F8F9G14G5G6
VDDC_F5
VDDC_F6
VDDC_F14
VDDC_F15
VDDC_F16
VDDC_F7
VDDC_F8
VDDC_F9
VDDC_G14
H14H4H6
VDDC_G5
VDDC_G6
VDDC_H14
55,83,84,133
J14J6K14K6L14L6M14M6N14N4N6
VDDC_H4
VDDC_H6
VDDC_K6
VDDC_J14
VDDC_K14
VDDC_L6
VDDC_L14
VDDC_M14
MOD_LOM2_P1V2AUX
P14
P15P5P6
VDDC_J6
VDDC_M6
VDDC_N14
VDDC_N4
VDDC_N6
VDDC_P14
VDDC_P15
R13R5R6R7T4T5T8U5U8
VDDC_P5
VDDC_P6
VDDC_R5
VDDC_R6
VDDC_R7
VDDC_R13
VDDC_T4
55,83,84,133
VDDP_D16
VDDP_E16
VDDC_T5
VDDC_T8
VDDC_U5
VDDC_U8
BIASVDD/BIAS_VDDH
DC_F17/XTAL_VDDL
XTALVDD/XTAL_VDDH
PCIEPLL_VDDL
GPHY_PLLVDD/GPHYPLL_VDDL
AVDD_D11/GPHY_VDDH
AVDD_C13/GPHY_VDDH
AVDD_C12/GPHY_VDDH
AVDD_C11/GPHY_VDDH
AVDDL_C14/GPHY_VDDL
AVDDL_D12/GPHY_VDDL
AVDDL_D14/GPHY_VDDL
AVDDL_D13/GPHY_VDDL
AVDDL_E20/GMACPLL_VDDL
VDDP_K5
VDDP_L5
VDDP_U12
VDDP_T12
MOD_LOM2_GMACPLL_VDDL
MOD_LOM2_P2V5AUX
D16
E16
K5
L5
U12
T12
A15
F17
F18
T17
A17
D11
C13
C12
C11
C14
D12
D14
D13
E20
MOD_LOM2_BIASVDD
MOD_LOM2_XTALVDDL
MOD_LOM2_XTALVDD
MOD_LOM2_PCIEPLLVDD
MOD_LOM2_GPHYPLLVDD
MOD_LOM2_P2V5AUX_AVDD
21
C3239
MOD_LOM2_P1V2AUX_AVDD
.1uF
C3238
10V-10%
21
C3236
21
.1uF
21
.1uF
C3222
10V-10%
21
C3242
10V-10%
83
4.7uF
6.3V-10%
.1uF
10V-10%
C3244
83
MOD_LOM2_GMACPLL_VDDL
R5096
X
1 2
5721J: pop
84
84
84
84
replaced symbol
84
L1801
21
C3221
21
4.7uF
6.3V-10%
.1uF
C3245
10V-10%
BLM21AH601
21
.1uF
C3241
10V-10%
5721J: no-pop filter
0-5%
21
21
NP2
21
C3237
MOD_LOM2_P2V5AUX
21
.1uF
C3220
10V-10%
.1uF
C3218
10V-10%
4.7uF
21
BLM11A601S
6.3V-10%
4.7uF
6.3V-10%
L1800
L1799
10uH 165MA
MOD_LOM2_P1V2AUX
21
MOD_LOM2_P1V2AUX
21
55,83,84,133
+3.3V
LAN_AUX
55,83,84,133
1
55,83,84,133
LAN_AUX VR
2
84
84
84
84
84
84
84
84
NC_MOD_LOM2_PWR_IND_N
NC_MOD_LOM2_ATTN_IND_N
R9410
MOD_LOM2_EXP_PEX_2_NB_0_C_DP
MOD_LOM2_EXP_PEX_2_NB_0_C_DN
MOD_LOM2_EXP_PEX_2_NB_1_C_DP
MOD_LOM2_EXP_PEX_2_NB_1_C_DN
MOD_LOM2_EXP_PEX_2_NB_2_C_DP
MOD_LOM2_EXP_PEX_2_NB_2_C_DN
MOD_LOM2_EXP_PEX_2_NB_3_C_DP
MOD_LOM2_EXP_PEX_2_NB_3_C_DN
1K-1%
1 2
83
45
45
28
28
28
28
28
28
28
28
MOD_LOM2_ATTN_BTTN_N
CK_100M_PCIE_LOM2_DP
CK_100M_PCIE_LOM2_DN
EXP_PEX_2_SB_0_DP
EXP_PEX_2_SB_0_DN
EXP_PEX_2_SB_1_DP
EXP_PEX_2_SB_1_DN
EXP_PEX_2_SB_2_DP
EXP_PEX_2_SB_2_DN
EXP_PEX_2_SB_3_DP
EXP_PEX_2_SB_3_DN
F1
PWR_IND_LED_N
G1
ATTN_IND_LED_N
F2
ATTN_BTTN_N
T19
PCIE_REFCLK_P
T20
PCIE_REFCLK_N
M19
PCIE_TD0_P
M20
PCIE_TD0_N
N17
DC_N17/PCIE_TD1_P
N18
DC_N18/PCIE_TD1_N
P19
DC_P19/PCIE_TD2_P
P20
DC_P20/PCIE_TD2_N
R17
DC_R17/PCIE_TD3_P
R18
DC_R18/PCIE_TD3_N
Y19
PCIE_RD0_P
Y20
PCIE_RD0_N
W17
DC_W17/PCIE_RD1_P
W18
DC_W18/PCIE_RD1_N
V19
DC_V19/PCIE_RD2_P
V20
DC_V20/PCIE_RD2_N
U17
DC_U17/PCIE_RD3_P
U18
DC_U18/PCIE_RD3_N
U_LOM2
BCM5708C_RB2,REV B2
HETERO 1 OF 3
REGSUP12
REGCNTL12
REGSEN12
VAUX_PRSNT
REGSUP25
REGOUT25
LINKLED_N
SPD100LED_N
SPD1000LED_N
TRAFFICLED_N
TRD3_N
TRD3_P
TRD2_N
TRD2_P
TRD1_N
TRD1_P
TRD0_N
TRD0_P
GPHY_TVCOI/TEST_CLK_OUT
D19
C20
D20
A20
D18
D17
A1
A4
A3
B2
B10
A10
B11
A11
B12
A12
B13
A13
B16
MOD_LOM2_REGCTL12
MOD_LOM2_VAUX_PRES
MOD_LOM2_P2V5AUX
MOD_LOM2_LINKLED_N
MOD_LOM2_ACTLED_N
MOD_LOM2_TRD4_N
MOD_LOM2_TRD4_P
MOD_LOM2_TRD3_N
MOD_LOM2_TRD3_P
MOD_LOM2_TRD2_N
MOD_LOM2_TRD2_P
MOD_LOM2_TRD1_N
MOD_LOM2_TRD1_P
MOD_LOM2_GPHY_TVCOI
55,83,84,133
84
84
84
84
84
84
84
84
84
R9957MOD_LOM2_REGSEN12
1 2
1 2
84
+3.3V
LAN_AUX
R5113
0-5%
R5114
4.7K-5%
21
C3223
R5110
X
4.7K-5%
1 2
4.7uF
6.3V-10%
4.7K-5%
1 2
+3.3V
LAN_AUX
C3243
R5109
X
1 2
21
.1uF
10V-10%
Depop on 5708
4.7K-5%
MJD45H11
Q1938
MJD45H11
Q1925
21
C3322
+3.3V
LAN_AUX
1
1
C3246
10uF 6.3V
21
3
C3240
4
3
4
MOD_LOM2_P1V2AUX
21
.1uF
10V-10%
Flash type selection
NP
.1uF
10V-10%
21
C3219
4.7uF
6.3V-10%
2
55,83,84,133
3
4
5721J:
5708:
C3217
R5103
drive level and frequency deviation.
match load capacitance, negative resistance,
the crystal circuit characterization to
These values will need to be changed after
values for these loading caps.
These are the starting
RIN ROUT
0 Ohm 200 Ohm
20 Ohm 20 Ohm
MOD_LOM2_XTALI_R
X10
1 2
25MHz
21
27pF 50V
+3.3V
LAN_AUX
NP
1 2
R5112
X
4.7K-5%
1 2
R5105
1 2
R5104
4.7K-5%
4.7K-5%
1 2
21
C3216
+3.3V
R5457
X
4.7K-5%
71,77,81
R5111
27pF 50V
REPLACE
4.7K-5%
1 2
MOD_LOM2_REFCLK_SEL_UMP_MSB
4.7K-5%
1 2
R5148
20-1%
R5149
20-1%
MOD_LOM2_XTALO_R
81,87
81,87
5708: Pop R5104
5721: Pop 5457
MOD_LOM2_ATTN_BTTN_N
MOD_LOM2_UMP_LSB
I2C_ISO_NIC_SCL
I2C_ISO_NIC_SDA
RIN
ROUT
NH_PCIE_A_WAKE_N
TP_MOD_LOM2_TMS
TP_MOD_LOM2_TDO
TP_MOD_LOM2_TDI
TP_MOD_LOM2_TCK
MOD_LOM2_TRST_N
MOD_LOM2_XTALI
MOD_LOM2_XTALO
83
83
83
F3
WAKE_N
C6
TMS
E2
TDO
B20
TDI
D1
TCK
B6
TRST_N
F20
XTALI/XTAL_P
F19
XTALO/XTAL_N
R5097
1 2
0-5%
R5098
1 2
0-5%
SMB_CLK
SMB_DATA
A5
A2
R5107
MOD_LOM2_SMB_CLK
MOD_LOM2_SMB_DATA
NC_MII_SHARE1_MDC
NC_MII_SHARE1_MDIO
NC_MII_SHARE1_MDINT
LOM2_CK25_OUT
85
NC_MOD_LOM2_HARD_RST_OUT
NC_MOD_LOM2_EXT_PAUSE_IN
MII_SHARE1_RXD0
92
MII_SHARE1_RXD1
92
NC_MII_SHARE1_RXER
X
1 2
+3.3V
LAN_AUX
4.7K-5%
R5106
X
1 2
4.7K-5%
DC_J1/EXT_MDC
DC_J2/EXT_MDIO
DC_J3/EXT_MDINT_N
DC_K1/CLK25_OUT
DC_K2/HARD_RST_OUT_N
DC_K3/EXT_PAUSE_IN
DC_L1/UMP_RXD_0
J1
J2J3K1K2K3L1L2L3M1
DC_L2/UMP_RXD_1
DC_L3/UMP_RXER
DC_M1/UMP_RXD_2
DC_M2/UMP_RXD_3
DC_M3/UMP_COL
DC_N1/UMP_RXCLK
DC_P1/UMP_TXCLK
DC_P2/UMP_RXDV
DC_P3/UMP_CRS
DC_R1/UMP_TXEN
DC_R2/UMP_TXER
DC_T1/UMP_TXD_0
DC_T2/UMP_TXD_1
DC_U1/UMP_TXD_2
M2M3N1
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
P1
P2
P3P4R1
R2
T1
T2T3U1
U2
DC_G3/PCIE_LINKUP_LED_N
DC_P4/GPIO6
DC_R4/GPIO5
DC_U2/UMP_TXD_3
DC_G2/DL_ACTIVE_LED_N
G3
G2
DC_T3/GPIO4
DC_R3/GPIO3
R4
R3
DC_W14/PLAY_DEAD
W14
DC_Y14/PCIE_DIS
Y14
DISABLE_ETHERNET_2
TP_MOD_LOM2_PLAY_DEAD
SHARED_BOOT_MODE_N
MOD_LOM2_GPIO4_PU
MOD_LOM2_GPIO5_PU
MOD_LOM2_UMP_LSB
NC_MOD_LOM2_PCIE_LINKUP
NC_MOD_LOM2_DL_ACTIVE
MII_SHARE1_TXD3_R
MII_SHARE1_TXD2_R
MII_SHARE1_TXD1_R
MII_SHARE1_TXD0_R
NC_MII_SHARE1_TXER
MII_SHARE1_TXEN_R
NC_MII_SHARE1_CRS
MII_SHARE1_RXDV
LOM2_SHARE1_CK25_TX
LOM2_SHARE1_CK25_RX
NC_MII_SHARE1_COL
MII_SHARE1_RXD3
MII_SHARE1_RXD2
EEDATA/DC
EECLK/DC
GPIO0_TEST_CLK/GPIO0
GPIO1
GPIO2/SEL_VAUX_N
SCLK
SI
SO
CS_N
RDAC
66
81,92
83
83
83
92
92
92
92
83,87
92
92
85
85
92
92
B8
A8
A18
A19
B19
B5
A6
B4
A7
B14
83
83
83
MOD_LOM2_EEDATA
MOD_LOM2_EECLK
NIC_ISO_ALERT2_N
MOD_LOM2_SMBUS_LSB
LOM2_SEL_VAUX_N
MOD_LOM2_SCK
MOD_LOM2_SI
MOD_LOM2_SO
MOD_LOM2_CS_N
MOD_LOM2_RDAC
R5152
1 2
MOD_LOM2_GPIO4_PU
MOD_LOM2_GPIO5_PU
NIC_ISO_ALERT2_N
MOD_LOM2_SMBUS_LSB
1.27K-1%
83
83
83
83
R563621R5635
1 2
4.7K-5%
83,87
83
R5266
4.7K-5%
1 2
85
R5108
1 2
4.7K-5%
B:XF050,L:TF848
+3.3V
LAN_AUX
R5116
1 2
R5267
4.7K-5%
NP
R5268
X
1 2
1 2
4.7K-5%
4.7K-5%
M2LB_Change_Note:
Programmed EEPROM different.
TITLE
DWG NO.
DATE
R5101
1 2
UC137
N5119
IC, PROG
IC, FLSH
DSK PROG
4.7K-5%
MOD_LOM2_SO
83
MOD_LOM2_SCK
83
MOD_LOM2_CS_N
83
INC.
SCHEM,PLN,SV,PE_BULN
FP975
10/20/2006 83 OF 144
R5099
4.7K-5%
1 2
MOD_LOM2_SI
83
2
3
4 5
MODULE:
DESC:
REV: OF
R5100
X
4.7K-5%
1 2
U1109
SCK
RESET
SC WP
AT45DB011B
SUB*_HY283
R5102
4.7K-5%
1 2
MOD_LOM2_CS_N
81
SOSI
7
GND
6
VCC
4.7K-5%
MOD_LOM2_SCK
MOD_LOM2_SI
MOD_LOM2_SO
+3.3V
LAN_AUX
1 2
SEC
ROUND ROCK,TEXAS
REV.
X01
SHEET
83
83
83
83
R5115
1 2
LOM2
3
4.7K-5%
4
DCBA
Page 84
1
2
3
4
83
83
83
83
83
83
83
83
Common 2.5V Filters
MOD_LOM2_BIASVDD
MOD_LOM2_XTALVDD
MOD_LOM2_PCIEPLLVDD
MOD_LOM2_PCIESDSVDD
.1uF
1 2
C3303
EXP_PEX_2_NB_0_DP
28
EXP_PEX_2_NB_0_DN
28
EXP_PEX_2_NB_1_DP
28
EXP_PEX_2_NB_1_DN
28
EXP_PEX_2_NB_2_DP
28
EXP_PEX_2_NB_2_DN
28
EXP_PEX_2_NB_3_DP
28
EXP_PEX_2_NB_3_DN
28
1 2
C3302
10V-10%
MOD_LOM2_GPHYPLLVDD
MOD_LOM2_XTALVDDL
MOD_LOM2_EPBPLLVDD
MOD_LOM2_SDSPLLVDD
A B C
L1806
BLM11A601S
21
.1uF
1 2
C3259
1 2
C3258
10V-10%
.1uF
10V-10%
C3229
C3228
Common 1.2V Filters
.1uF
1 2
C3304
1 2
.1uF
10V-10%
1 2
C3300
.1uF
C3301
10V-10%
Populate for 5708
1 2
C3249
.1uF
1 2
C3248
1 2
C3247
10V-10%
.1uF
10V-10%
C3225
C3224
Populate for 5708
4.7uF
21
4.7uF
21
C3235
10V-10%
1 2
C3260
.1uF
10V-10%
.1uF
C3226
10V-10%
21
4.7uF
21
4.7uF
6.3V-10%
BLM11A601S
6.3V-10%
4.7uF
6.3V-10%
21
.1uF
C3231
10V-10%
21
C3230
21
6.3V-10%
6.3V-10%
4.7uF
4.7uF
6.3V-10%
L1805
10uH 165MA
10uH 165MA
10V-10%
10V-10%
10V-10%
10V-10%
21
21
L1809
BLM21AH601
4.7uF
6.3V-10%
L1807
10uH 165MA
6.3V-10%
L1804
BLM11A601S
L1803
L1802
10uH 165MA
C3312
1 2
C3310
1 2
.1uF
C3309
1 2
.1uF
C3307
1 2
.1uF
C3306
1 2
.1uF
10V-10%
C3308
1 2
10V-10%
C3311
1 2
10V-10%
C3305
1 2
10V-10%
MOD_LOM2_P2V5AUX
21
MOD_LOM2_P1V2AUX
L1808
21
21
21
MOD_LOM2_P1V2AUX
X01_DTXXXXX
21
21
MOD_LOM2_EXP_PEX_2_NB_0_C_DP
.1uF
MOD_LOM2_EXP_PEX_2_NB_0_C_DN
MOD_LOM2_EXP_PEX_2_NB_1_C_DP
.1uF
MOD_LOM2_EXP_PEX_2_NB_1_C_DN
MOD_LOM2_EXP_PEX_2_NB_2_C_DP
.1uF
MOD_LOM2_EXP_PEX_2_NB_2_C_DN
MOD_LOM2_EXP_PEX_2_NB_3_C_DP
.1uF
MOD_LOM2_EXP_PEX_2_NB_3_C_DN
200mA
Ferrites
replaced symbol
55,83,84,133
55,83,84,133
55,83,84,133
A14
A16
A9
B15
B17
B18
B3
B7
B9
C10
C15
C16
C17
C19
C9
D10
D15
D3
E17
E18
E19
G10
G11
G12
G13
G17
G18
G19
G20
G7
G8
G9
H10
H11
H12
H13
H17
H2
H7
H8
H9
J10
J11
J12
J13
J15
J19
J20
J7
J8
J9
K10
K11
K12
K13
K17
K7
K8
K9
L10
L11
L12
VSS_A14
VSS_A16
VSS_A9
VSS_B15
VSS_B17
VSS_B18
VSS_B3
VSS_B7
VSS_B9
VSS_C10
VSS_C15
VSS_C16
VSS_C17
VSS_C19
VSS_C9
VSS_D10
VSS_D15
VSS_D3
VSS_E17
VSS_E18
VSS_E19
VSS_G10
VSS_G11
VSS_G12
VSS_G13
VSS_G17
VSS_G18
VSS_G19
VSS_G20
VSS_G7
VSS_G8
VSS_G9
VSS_H10
VSS_H11
VSS_H12
VSS_H13
VSS_H17
VSS_H2
VSS_H7
VSS_H8
VSS_H9
VSS_J10
VSS_J11
VSS_J12
VSS_J13
VSS_J15
VSS_J19
VSS_J20
VSS_J7
VSS_J8
VSS_J9
VSS_K10
VSS_K11
VSS_K12
VSS_K13
VSS_K17
VSS_K7
VSS_K8
VSS_K9
VSS_L10
VSS_L11
VSS_L12
U_LOM2
VSS_L13
VSS_L15
VSS_L16
VSS_L17
VSS_L18
VSS_L19
VSS_L20
VSS_L7
VSS_L8
VSS_L9
VSS_M10
VSS_M11
VSS_M12
VSS_M13
VSS_M15
VSS_M17
VSS_M7
VSS_M8
VSS_M9
VSS_N10
VSS_N11
VSS_N12
VSS_N13
VSS_N15
VSS_N16
VSS_N19
VSS_N2
VSS_N7
VSS_N8
VSS_N9
VSS_P10
VSS_P11
VSS_P12
VSS_P13
VSS_P16
VSS_P17
VSS_P7
VSS_P8
VSS_P9
VSS_R14
VSS_R15
VSS_R16
VSS_R19
VSS_T14
VSS_T18
VSS_U14
VSS_U15
VSS_U16
VSS_U19
VSS_U3
VSS_V14
VSS_V15
VSS_V16
VSS_V17
VSS_W12
VSS_W15
VSS_W16
VSS_W19
VSS_W3
VSS_W8
VSS_Y15
VSS_Y16
VSS_Y17
BCM5708C_RB2,REV B2
HETERO 3 OF 3
83
83
83
83
83
83
5708: E-JTAG interface to core
Depop on 5721J
83
MOD_LOM2_ETRST_N
83
R5166
1 2
4.7K-5%
L13
L15
L16
L17
L18
L19
L20
L7
L8
L9
M10
M11
M12
M13
M15
M17
M7
M8
M9
N10
N11
N12
N13
N15
N16
N19
N2
N7
N8
N9
P10
P11
P12
P13
P16
P17
P7
P8
P9
R14
R15
R16
R19
T14
T18
U14
U15
U16
U19
U3
V14
V15
V16
V17
W12
W15
W16
W19
W3
W8
Y15
Y16
Y17
ROOM=LOM2
+3.3V
REPLACE
R5792
1 2
X
0-5%
R5793
1 2
X
0-5%
5708 Debug Interface
TP_MOD_LOM2_5708_MODE0
TP_MOD_LOM2_5708_MODE1
TP_MOD_LOM2_5708_MODE2
TP_MOD_LOM2_5708_MODE3
TP_MOD_LOM2_5708_MODE4
82
82
5721J Debug Interface
5721J: no-pop
84
MOD_LOM2_5708_UART_TXD
MOD_LOM2_5708_UART_RXD
TP_MOD_LOM2_MODE0
TP_MOD_LOM2_MODE1
TP_MOD_LOM2_MODE2
TP_MOD_LOM2_MODE3
TP_MOD_LOM2_5721_UART_TXD
TP_MOD_LOM2_5721_UART_RXD
84
R5151
1 2
MOD_LOM2_ETRST_N
TP_MOD_LOM2_ETDO
TP_MOD_LOM2_ETMS
TP_MOD_LOM2_ETCK
TP_MOD_LOM2_ETDI
TP_MOD_LOM2_CLKIN_SEL
TP_MOD_LOM2_XTAL_ADJ3
0-5%
TP_MOD_LOM2_XTAL_ADJ2
TP_MOD_LOM2_XTAL_ADJ0
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
MOD_LOM2_TRDTCT1
NC_MOD_LOM2_D9
NC_MOD_LOM2_E8
NC_MOD_LOM2_E9
NC_MOD_LOM2_H1
NC_MOD_LOM2_H18
NC_MOD_LOM2_H19
NC_MOD_LOM2_H20
NC_MOD_LOM2_J18
NC_MOD_LOM2_J17
NC_MOD_LOM2_K15
NC_MOD_LOM2_K16
NC_MOD_LOM2_K18
83
83
83
83
83
83
83
83
MOD_LOM2_TRD1_P
MOD_LOM2_TRD1_N
MOD_LOM2_TRD2_P
MOD_LOM2_TRD2_N
MOD_LOM2_TRD3_P
MOD_LOM2_TRD3_N
MOD_LOM2_TRD4_P
MOD_LOM2_TRD4_N
R5160
1 2
C3296
W1
PCIVDDIO_W1/DC
W2
PCIVDDIO_W2/DC
W4
PCIVDDIO_W4/DC
W7
PCIVDDIO_W7/DC
Y1
PCIVDDIO_Y1/DC
Y2
PCIVDDIO_Y2/DC
Y3
PCIVDDIO_Y3/DC
Y4
PCIVDDIO_Y4/DC
Y5
PCIVDDIO_Y5/DC
D7
NC_D7/NC_MODE_0
C3
NC_C3/NC_MODE_1
D6
NC_D6/NC_MODE_2
D4
NC_D4/NC_MODE_3
C5
NC_C5/NC_MODE_4
H5
DC_H5/UART_TXD
M5
DC_M5/UART_RXD
G15
NC_MODE_0/NC
G16
NC_MODE_1/NC
H15
NC_MODE_2/NC
H16
NC_MODE_3/NC
T16
UART_TXD/DC_T16
Y10
UART_RXD/DC_Y10
B1
DC_B1/DC_ETRST_N
C1
DC_C1/DC_ETDO
D2
DC_D2/NC_ETMS
E3
DC_E3/NC_ETCK
F4
DC_F4/NC_ETDI
C8
DC_C8/XTAL_BYPASS
D8
DC_D8/CLKIN_SEL
D9
NC_D9
E8
NC_E8
E9
NC_E9
G4
NC_G4
H1
NC_H1
H18
NC_H18
H19
NC_H19
H20
NC_H20
J4
NC_J4
J5
NC_J5
J18
NC_J18
J17
NC_J17
K15
NC_K15
K16
NC_K16
K18
NC_K18
R5158
49.9-1%
1 2
21
.1uF
10V-10%
R5157
49.9-1%
1 2
MOD_LOM2_TRDTCT2
BCM5708C_RB2,REV B2
R5156
49.9-1%
1 2
21
C3295
.1uF
10V-10%
U_LOM2
HETERO 2 OF 3
55,83,84,133
R5155
49.9-1%
1 2
C3294
MOD_LOM2_P2V5AUX
R5154
49.9-1%
1 2
21
.1uF
MOD_LOM2_TRDTCT3
R5159
49.9-1%
1 2
10V-10%
NC_K19
NC_K20
NC_R10
NC_R11
NC_R12
NC_T10
NC_T11
NC_T13
NC_T15
NC_U10
NC_U11
NC_U13
NC_V10
NC_V11
NC_V13
NC_W10
NC_W11
NC_W13
NC_Y11
NC_Y12
NC_Y13
49.9-1%
21
C3293
NC_K4
NC_L4
NC_M4
NC_R8
NC_R9
NC_T6
NC_T7
NC_T9
NC_U4
NC_U6
NC_U7
NC_U9
NC_V1
NC_V3
NC_V5
NC_V6
NC_V7
NC_V9
NC_W5
NC_W6
NC_W9
NC_Y6
NC_Y7
NC_Y8
NC_Y9
21
R5153
1 2
MOD_LOM2_TRDTCT4
.1uF
K19
K20
K4
L4
M4
R10
R11
R12
R8
R9
T10
T11
T13
T15
T6
T7
T9
U10
U11
U13
U4
U6
U7
U9
V1
V10
V11
V13
V3
V5
V6
V7
V9
W10
W11
W13
W5
W6
W9
Y11
Y12
Y13
Y6
Y7
Y8
Y9
C3292
49.9-1%
10V-10%
NC_MOD_LOM2_K19
NC_MOD_LOM2_K20
TP_MOD_LOM2_XTAL_ADJ1
NC_MOD_LOM2_L4
NC_MOD_LOM2_M4
NC_MOD_LOM2_R10
NC_MOD_LOM2_R11
NC_MOD_LOM2_R12
NC_MOD_LOM2_R8
NC_MOD_LOM2_R9
NC_MOD_LOM2_T10
NC_MOD_LOM2_T11
NC_MOD_LOM2_T13
NC_MOD_LOM2_T15
NC_MOD_LOM2_T6
NC_MOD_LOM2_T7
NC_MOD_LOM2_T9
NC_MOD_LOM2_U10
NC_MOD_LOM2_U11
NC_MOD_LOM2_U13
NC_MOD_LOM2_U4
NC_MOD_LOM2_U6
NC_MOD_LOM2_U7
NC_MOD_LOM2_U9
NC_MOD_LOM2_V1
NC_MOD_LOM2_V10
NC_MOD_LOM2_V11
NC_MOD_LOM2_V13
NC_MOD_LOM2_V3
NC_MOD_LOM2_V5
NC_MOD_LOM2_V6
NC_MOD_LOM2_V7
NC_MOD_LOM2_V9
NC_MOD_LOM2_W10
NC_MOD_LOM2_W11
NC_MOD_LOM2_W13
NC_MOD_LOM2_W5
NC_MOD_LOM2_W6
NC_MOD_LOM2_Y10
NC_MOD_LOM2_Y11
NC_MOD_LOM2_Y12
NC_MOD_LOM2_Y13
NC_MOD_LOM2_Y6
NC_MOD_LOM2_Y7
NC_MOD_LOM2_Y8
NC_MOD_LOM2_Y9
.1uF
C3291
10V-10%
+3.3V
LAN_AUX
R5118
1 2
200-5%
R5150
1 2
0 OHM
MOD_LOM2_CT_P2V5AUX_FIL
21
.1uF
C3290
10V-10%
21
LAN_AUX
.1uF
C3289
10V-10%
+3.3V
21
55,83,84,133
.1uF
10V-10%
MOD_LOM2_ACTLED_N
83
MOD_LOM2_ACTLED_R
R5119
1 2
200-5%
MOD_LOM2_LINKLED_N
83
MOD_LOM2_P1V2AUX
21
C3234
C3232
+3.3V
LAN_AUX
C3227
+3.3V
C3233
X
4.7uF
21
4.7uF
21
4.7uF
REPLACE
21
4.7uF
NP
X
1 2
C3313
NP
C3315
1 2
C3297
6.3V-10%
1 2
C3281
6.3V-10%
1 2
C3257
6.3V-10%
1 2
C3266
6.3V-10%
NP
X
1 2
C3314
470pF
50V-10%
NP
X
470pF
1 2
.1uF
.1uF
.1uF
No-pop for 5708.
.1uF
X
C3316
50V-10%
1 2
C3288
10V-10%
1 2
C3280
10V-10%
1 2
C3273
1 2
C3256
10V-10%
1 2
C3265
10V-10%
TITLE
DWG NO.
DATE
1 2
.1uF
.1uF
.1uF
.1uF
.1uF
D
470pF
50V-10%
J_ETH2
13
14
16
17 SH1
15
470pF
50V-10%
1 2
C3287
10V-10%
1 2
C3279
10V-10%
1 2
C3272
10V-10%
1 2
C3255
10V-10%
1 2
C3264
10V-10%
C1
A1
11
TRD1+
12
TRCT1
10
TRD1-
4
TRD2+
6
TRCT2
5
TRD2-
3
TRD3+
1
TRCT3
2
TRD3-
8
TRD4+
7
TRCT4
9
TRD4-
GREEN
ORANGE
MOD_LOM2_LINKLED_R
NOTE: on the 5721J some of these
decoupling capacitors can be depopped
--consult your local SNaC Engineer
.1uF
1 2
C3286
10V-10%
.1uF
1 2
C3278
10V-10%
.1uF
1 2
C3271
10V-10%
.1uF
1 2
C3254
10V-10%
.1uF
1 2
C3263
10V-10%
YELLOW
COMMON
RJ45 MAGNETIC JACK W/2 LED'S
.1uF
C3285
10V-10%
.1uF
C3277
10V-10%
.1uF
C3270
10V-10%
.1uF
C3253
10V-10%
.1uF
10V-10%
.1uF
1 2
1 2
1 2
1 2
NS: Populating some 0.1uF's
since 3.3V is still being
routed to this chip.
MODULE:
DESC:
REV: OF
C3284
10V-10%
.1uF
C3276
10V-10%
.1uF
C3269
10V-10%
.1uF
C3252
10V-10%
1 2
1 2
1 2
1 2
4x75ohms
1000pF 2kV
.1uF
1 2
C3283
10V-10%
.1uF
1 2
C3275
10V-10%
.1uF
1 2
C3268
10V-10%
.1uF
1 2
C3251
10V-10%
.1uF
C3282
10V-10%
.1uF
C3274
10V-10%
.1uF
C3267
10V-10%
.1uF
C3250
10V-10%
SEC
RJ45
Shield
.1uF
1 2
.1uF
1 2
.1uF
1 2
.1uF
1 2
2 2
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
84 OF 14410/20/2006
1
2
3
6
4
5
7
8
SH1
SH2
SH2
1 2
C3262
10V-10%
1 2
C3261
10V-10%
1 2
C3298
10V-10%
1 2
C3299
10V-10%
1
2
.1uF
10V-10%
.1uF
10V-10%
3
.1uF
10V-10%
.1uF
10V-10%
LOM2
4
DCBA
Page 85
A B C
D
1
OP-AMP CIRCUIT CALCULATIONS
Range calculations made using the following:
3.3VAux Supply +/-5%
All resistors defined tolerance
3.3VAux Vref = 3.3V *3.24K/((11K+3.24K) = 0.7508V nominal
11K(+1%) and 3.24K (-1%), at 3.3V(-5%)
11K(-1%) and 3.24K (+1%), at 3.3V(+5%)
0.7023V - Min
0.8006V - Max
+3.3V
LAN_AUX
1 2
C3350
+3.3V
LAN_AUX
.1uF
16V-10%
81
LOM1_CK25_OUT
U1117NP
2
GND
3
2A
SN74LVC2G34
R5799
1 2
33-5%
61
1Y1A
5
VCC
4
2Y
X
+3.3V
LAN_AUX
MOD_LOM_SHARE0_CK25_BUF
MOD_LOM_SHARE0_CLK_BUF
R5280
NP
1 2
R5282
NP
1 2
33-5%
X
X
LOM1_SHARE0_CK25
LOM1_SHARE0_CLK
Split near the pins
R5794
NP
1 2
0-5%
R5795
NP
1 2
0-5%33-5%
92
Split near the pins
LOM1_SHARE0_CK25_TX
X
LOM1_SHARE0_CK25_RX
X
81
81
1
2
+3.3V_AUX
REPLACE
21
R5307
MOD_LOM_P0V76_REF_SEL_VAUX
R5269
1 2
3.24K-1% 11K-1%
81
83
OR'd inputs
LOM1_SEL_VAUX_N
LOM2_SEL_VAUX_N
3.3VAux Vref
NP
R5645
X
1 2
NP
1K-1%
R5646
X
1 2
R5244
1 2
127K-1%
R5245
1 2
127K-1%
1K-1%
R5315
1 2
3
2
71.5K-1%
+5VAUX
8
+
V+
V-
-
4
R5243
1 2
487K-1%
U1119
LM393
1
OUT
P19_DT9197_rt_swap_out_sub_U1119
+3.3V_AUX
REPLACE
1 2
4.7K-5%
R5306
+5VAUX
.1uF
1 2
C3349
LOM_SEL_VAUX_N
16V-10%
138
1 2
C3393
.1uF
16V-10%
83
LOM2_CK25_OUT
U1118NP
2
GND
3
2A
SN74LVC2G34
R5798
1 2
33-5%
61
1Y1A
5
VCC
4
2Y
X
+3.3V
LAN_AUX
MOD_LOM_SHARE1_CK25_BUF
MOD_LOM_SHARE1_CLK_BUF
Keep term resistors ~1" from source.
R5281
NP
1 2
LOM2_SHARE1_CK25
X
R5283
NP
1 2
33-5%
X
LOM2_SHARE1_CLK
R5797
NP
1 2
X
0-5%
R5796
NP
1 2
X
0-5%33-5%
92
(DT7971 for L/B.)
Resistors depopulated for B0 silicon. For A0 silicon,
populate resistors and buffers, and depop R5799 and R5798.
LOM2_SHARE1_CK25_TX
LOM2_SHARE1_CK25_RX
83
83
2
3
DT9855_use 1% res_jd
+3.3V_AUX
REPLACE
R5299
1 2
Vref = 3V
R5246
1 2
100K-1% 10K-5%
Populate on Atlanta,
for LOMs that are unused.
+3.3V
LAN_AUX
MOD_LOM_P3V_VREF_SWITCH
R5302
1 2
1K-1%
16V-10%
NP
1000pF
21
X
C3348
+5VAUX
5
+
6
-
R5247
1 2
100K-1%
8
U1119
LM393
V+
V-
4
LOM 3.3V SWITCHOVER CIRCUIT
1
2
3
4
+12V
REPLACE
+3.3V
LAN_AUX
21
1 2
1K-1%
7
OUT
R5303
MII_I2C_SWITCH_N
87,92
+3.3V_AUX
REPLACE
21
R3942
Q1798
D
3
330-5%
R5787
1
G
R3943
3.01K-1%
1 2
Q1797
D
3
S
2
2N7002
3.01K-1%
MOD_LOM_P12V_PS_PWRGOOD
td_on = 20ns
td_off = 20ns
+3.3V_AUX
REPLACE
16V-20%
100uF
+3.3V
REPLACE
1 2
+
C3581
Q1814
1
S1
2
G1
3
S2
4 5
G2 DRN4
SI4501DY
DRN1
DRN2
DRN3
8
7
6
5
+3.3V
LAN_AUX
8
7
6
3
22uF 6.3V
10V-10%
1 2
C2194
.1uF
2 1
C2155
4
Comparator Driving I2C and MII Output Enable at 90.90f LAN_AUX
I2C Address: AC
85
85
+3.3V
REPLACE
1 2
220-5%
MOD_LOM_I2C_SH_SEG1_SDA
MOD_LOM_I2C_SH_SEG1_SCL
R5325
MOD_LOM_TOE_KEY_PWR
52
52
J_TOE_KEY
1
1
2
2
3
3
4
4
RJ-22
SM VERT
DT9947_changes series term to 0 ohm_jd
R5493
I2C_TOE_SCL
I2C_TOE_SDA
May need to change to thru hole.
1 2
0-5%
R5494
1 2
0-5%
TOE HW key
MOD_LOM_I2C_SH_SEG1_SCL
MOD_LOM_I2C_SH_SEG1_SDA
85
85
138
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
LOM_SWITCH_N
1
G
2N7002
S
2
R3871
1 2
1K-1%
DUAL N & P CHANNEL FETS
12V ON GATE1 ENABLES +3.3V TO DRN PINS
0V ON GATE 2 ENABLES +3.3V_AUX TO DRN PINS
For Everglades inrush issue
TITLE
SCHEM,PLN,SV,PE_BULN
DWG NO.
FP975
DATE
10/20/2006 85 OF 144
MODULE:
DESC:
REV: OF
SEC
2 2
INC.
ROUND ROCK,TEXAS
REV.
X01
SHEET
LOM
4
DCBA
Page 86
1
2
3
+3.3V_AUX
REPLACE
R468
1 2
MOD_BMC_A0_PU
88
87,138
87,138
87,138
87,138
87,138
87,138
87,138
87,138
87,138
87
87
87,138
80,88
87,88
88,138
80,88
+3.3V_AUX
REPLACE
R9846
MOD_BMC_INTRUS_SWITCH_PRES_N
87
MOD_BMC_MII_CBL_PRES_PLNR_N
92
+3.3V_AUX
REPLACE
1 2
8.2K-5%
MOD_BMC_A1
MOD_BMC_A2
MOD_BMC_A3
MOD_BMC_A4
MOD_BMC_A5
MOD_BMC_A6
87
MOD_BMC_A7
87
MOD_BMC_A8
87
MOD_BMC_A9
87
MOD_BMC_A10
87
MOD_BMC_A11
87
MOD_BMC_A12
87
MOD_BMC_A13
87
MOD_BMC_A14
87
MOD_BMC_A15
87
MOD_BMC_A16
87
MOD_BMC_A17_PU
88
MOD_BMC_FAN1_TACH
94
MOD_BMC_FAN2_TACH
94
MOD_BMC_FAN3_TACH
94
MOD_BMC_FAN4_TACH
94
MOD_BMC_FAN5_TACH
94
MOD_BMC_FAN6_TACH
94
87
87
87
87
87
87
87
87
87
87
87
87
MOD_BMC_HIGH_WR_N
MOD_BMC_LOW_WR_N
MOD_BMC_RD_N
MOD_BMC_TACH_MUX_SEL0
MOD_BMC_SRAM_CS_N
MOD_BMC_EXGP_CS_N
MOD_BMC_TACH_MUX_SEL1
69
66,92
86,88
88,138
86,88
1 2
BLM18BD601SN1_PB
A B C
8.2K-5%
MOD_BMC_NMI_N_PU
MOD_BMC_D0
MOD_BMC_D1
MOD_BMC_D2
MOD_BMC_D3
MOD_BMC_D4
MOD_BMC_D5
MOD_BMC_D6
MOD_BMC_D7
MOD_BMC_D8
MOD_BMC_D9
MOD_BMC_D10
MOD_BMC_D11
MOD_BMC_D12
MOD_BMC_D13
MOD_BMC_D14
MOD_BMC_D15
A2D_BAT
RAC_PRES_N
PS1_PSMI_R
MOD_BMC_CPLD_INT_N
PS2_PSMI_R
L10
10V-10%
.1uF
10V-10%
C313
21
X00_DT9863 SCH directional symbols
11
NMI
112
P10/PW0/A0/AD0
110
P11/PW1/A1/AD1
109
P12/PW2/A2/AD2
108
P13/PW3/A3/AD3
107
P14/PW4/A4/AD4
106
P15/PW5/A5/AD5
105
P16/PW6/A6/AD6
104
P17/PW7/A7/AD7
103
P20/PW8/A8/AD8
102
P21/PW9/A9/AD9
101
P22/PW10/A10/AD10
100
P23/PW11/A11/AD11
99
P24/PW12/A12/AD12
98
P25/PW13/A13/AD13
97
P26/PW14/A14/AD14
96
P27/PW15/A15/AD15
41
PA0/KIN8/EVENT0/SSEOI/A16
40
PA1/KIN9/EVENT1/SSE2I/A17
39
PA2/KIN10/EVENT2/A18
38
PA3/KIN11/EVENT3/A19
37
PA4/KIN12/EVENT4/A20
35
PA5/KIN13/EVENT5/A21
34
PA6/KIN14/EVENT6/A22
33
PA7/KIN15/EVENT7/A23
78
P60/KIN0/FTCI/D0
79
P61/KIN1/FTOA/D1
80
P62/KIN2/FTIA/D2
81
P63/KIN3/FTIB/D3
82
P64/KIN4/FTIC/D4
83
P65/KIN5/FTID/D5
84
P66/KIN6/FTOB/D6
85
P67/KIN7/D7
121
P30/WUE8/D8
122
P31/WUE9/D9
123
P32/WUE10/D10
124
P33/WUE11/D11
125
P34/WUE12/D12
126
P35/WUE13/D13
127
P36/WUE14/D14
128
P37/WUE15/D15
20
P94/HWR
24
P90/LWR
21
P93/RD
22
P92/CPCS1
17
P97/WAIT/CS256
19
P95/AS/IOS
23
P91/AH
68
P70/AN0
69
P71/AN1
70
P72/EXIRQ2/AN2
71
P73/EXIRQ3/AN3
72
P74/EXIRQ4/AN4
73
P75/EXIRQ5/AN5
74
P76/EXIRQ6/AN6/DA0
75
P77/EXIRQ7/AN7/DA1
76
AVCC
77
AVREF
.1uF
C314
67
AVSS
21
SUB*_UP626
U_BMC
HITACHI 2177 BMC
HETERO 1 OF 2
PE3/LAD3
PE2/LAD2
PE1/LAD1
PE0/LAD0
PE4/LFRAME
PE5/LRESET
PE6/LCLK
PE7/SERIRQ
PD5/LPCPD
PD4/CLKRUN
PD3/GA20
PD2/PME
PD1/LSMI
PD0/LSCI
P50/IRQ8/TXD0
P51/IRQ9/RXDO
P52/IRQ10/IRTXD/TXD1
P53/IRQ11/IRRXD/RXD1
P54/IRQ12/TXD2
P55/IRQ13/RXD2
P56/IRQ14/PWX0
P57/IRQ15/PWX1
PC6/PWX2
PC7/PWX3
PB0/EVENT8
PB1/EVENT9
PB2/EVENT10
PB3/EVENT11
PB4/EVENT12
PB5/EVENT13
PB6/EVENT14
PB7/EVENT15
P81/EXIRQ9/SDA0
P80/EXIRQ8/SCL0
P83/EXIRQ11/SDA1
P82/EXIRQ10/SCL1
PC1/SDA2
PC0/SCL2
PC3/SDA3
PC2/SCL3
PC5/SDA4
PC4/SCL4
PD7/SDA5
PD6/SCL5
P40/IRQ0/TMI0
P41/IRQ1/TMI1
P42/IRQ2/TMO0
P43/IRQ3/TMO1
P44/IRQ4/TMIX
P45/IRQ5/TMIY
P46/IRQ6/TMOX
P47/IRQ7/TMOY
PF0/EXPW0
PF1/EXPW1
PF2/EXPW2
P85/EXIRQ13/EXTMI1/SCK1
P86/EXIRQ14/EXTMIX/SCK2
P87/EXIRQ15/EXTMIY/ADTRIG
P84/EXIRQ12/EXTMI0/SCK0
55
56
57
58
54
53
52
51
61
62
63
64
65
66
16
15
133
134
136
137
5
6
26
25
120
119
118
117
116
115
114
113
49
50
47
48
31
32
29
30
27
28
59
60
129
130
131
132
138
2
3
4
94
93
92
45
44
43
46
PLT_RST_BMC_CPLD_N
MOD_BMC_GPIO_51
MOD_BMC_GPIO_61
DO NOT USE PINS 51, 61, 62
MOD_BMC_GPIO_62
BMC_V_P3P3AUX_CPLD_EN
CTRLPNL_MUX_S1
CTRLPNL_MUX_S0
MOD_BMC_CTS0_N
MOD_BMC_RTS0_N
MOD_BMC_DSR0_N
MOD_BMC_DTR0_N
MOD_BMC_PWM_1
MOD_BMC_PWM_2
MOD_BMC_PWM_3
MOD_BMC_PWM_4
MOD_BMC_FAN7_TACH
MOD_BMC_FAN8_TACH
MOD_BMC_FAN9_TACH
MOD_BMC_FAN10_TACH
MOD_BMC_FAN11_TACH
MOD_BMC_FAN12_TACH
MOD_BMC_FAN13_TACH
MOD_BMC_FAN14_TACH
I2C_BMC_IPMB_VAUX_SDA
I2C_BMC_IPMB_VAUX_SCL
I2C_BMC_NIC_VAUX_SDA
I2C_BMC_NIC_VAUX_SCL
I2C_BMC_SEG2_VAUX_SDA
I2C_BMC_SEG2_VAUX_SCL
I2C_BMC_SEG3_VAUX_SDA
I2C_BMC_SEG3_VAUX_SCL
I2C_BMC_SEG4_VAUX_SDA
I2C_BMC_SEG4_VAUX_SCL
I2C_BMC_SEG5_VAUX_SDA
I2C_BMC_SEG5_VAUX_SCL
MOD_BMC_NIC_ALERT1_N
MOD_BMC_NIC_ALERT2_N
MOD_BMC_IPMB_RST_N
MOD_BMC_ID_BUTTON_DB_N
MOD_BMC_RI0_N
MOD_BMC_DCD0_N
INTRUDED_COVER
SYSTEM_EN_BMC_N
MOD_BMC_SYS_PWRGOOD_ESM
NC_MOD_BMC_P46
X00_DT9914 SCH
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
LPC_LFRAME_N
CK_33M_BMC
BMC_SMI_N
MOD_BMC_SOUT
MOD_BMC_SIN
BMC_NMIBTN_N
BMC_PWRBTN_N
CTRLPNL_CLK
CTRLPNL_DATA
BMC_RDY_N
51,55,66-68,96,138
51,55,66-68,96,138
51,55,66-68,96,138
51,55,66-68,96,138
51,55,66-68,96,138
138
53
88
88
88
88
70
51,87
70
95
95
95
95
95
95
138
138
138
138
88,94
88,94
88,94
88,94
80,88
80,88
80,88
88
87,91,92
87,91,92
87,91,92
87,91,92
55,87,89,91
55,87,89,91
70,87,91,120
70,87,91,120
87,91,120
87,91,120
87,91
87,91
58
58
87,91,92
87,91,92
70
70
92
93
95
66,87
95
62
96,138
96,138
21
R5194
100-5%
R5193
1 2
10V-10%
.1uF
C315
21
86
86
MOD_BMC_GPIO_18
88
MOD_BMC_REAL_RST_N
86
88
88
66,89,95
89
100-5%
10V-10%
.1uF
MOD_BMC_XTAL
MOD_BMC_EXTAL
NC_PLLCAP
NC_RES0
MOD_BMC_STBY
MOD_BMC_FWE
BMC_PROGRAM_N
MOD_BMC_MD2_N
1 2
C798
+3.3V_AUX
REPLACE
36
86
13
143
144
140
141
18
142
12
135
10
9
14
1
VCC_1
VCC_36
VCC_86
VCL
XTAL
EXTAL
PLLCAP
PFSEL
P96/PHI/EXCL
8
RES
RESO
STBY
FWE
MD0
MD1
MD2
HITACHI 2177 BMC
22uF 6.3V
1 2
U_BMC
HETERO 2 OF 2
+3.3V_AUX
REPLACE
10V-10%
C583
.1uF
21
VSS_7
VSS_42
VSS_95
VSS_111
VSS_139
ETRST
10V-10%
.1uF
C310
ETCK
ETDI
ETDO
ETMS
21
7
42
95
111
139
91
90
89
88
87
10V-10%
.1uF
C311
21
C312
ECAD: Place these components as close to the BMC as possible
MOD_BMC_TRST_N
MOD_BMC_TCLK
MOD_BMC_TDI
MOD_BMC_TDO
MOD_BMC_TMS
MOD_BMC_HUDI_RST_N
89
66
+3.3V_AUX
REPLACE
R5067
BMC_RESET_N
8.2K-5%
1 2
J_BMC_RST
21
NP0
+5VAUX
89
89
89
89
89
R712
1 2
160-5%
21
C355
P19_DT9231_jp_swap symbol
+3.3V_AUX
REPLACE
R4368
1 2
62,138
8.2K-5%
RESET: Allows HUDI to RESET BMC for DEBUG
R581
1 2
R751
1 2
M2LB_Change_Note:
Changed J_BRST to right-angle part
MOD_BMC_INTRUS_SWITCH_PRES_N name not changed.
D
BMC has 4X PLL
R679
1 2
R4870
1 2
10M-5%
X4
21
18pF
50V-5%
7.3728MHz
21
C356
BMC CRYSTAL
+3.3V_AUX
REPLACE
+3.3V_AUX
143U1108
1
REPLACE
2
74VHC08
148U1108
9
10
74VHC08
+3.3V_AUX
REPLACE
146U1108
4
5
74VHC08
BMC_RST_JMPR_N
55,138
V_P3P3AUX_PG
NOTE: Keep 4.7k pulldown
Even when BMC is not PopulatedAR2087
4.75K-1%
D79
TL431ACD
1
8
2
3
6
7
14.7K-1%
3.3V Reference Circuit for A/D converter
75-1%
R680
1 2
0-5%
18pF
50V-5%
ROOM=BMCRST
+3.3V_AUX
REPLACE
1411U1108
12
13
74VHC08
10uF 6.3V
C782
21
MOD_BMC_XTAL
MOD_BMC_EXTAL
86
86
+3.3V_AUX
REPLACE
10V-10%
.1uF
MOD_BMC_REAL_RST_N
R5047
1 2
4.7K-5%
MOD_BMC_AVREF
10V-10%
.1uF
C309
21
ROOM=BMCREF
MODULE:
DESC:
REV: OF
SEC
21
C308
86
86
1
2
3
BMC
4
120
120
PS1_PSMI
PS2_PSMI
MOD_BMC_AVREF
86
NP
1 2
NP
1 2
R9980
0-5%
R9981
0-5%
PS1_PSMI_R
X
PS2_PSMI_R
X
86,88
86,88
X01_DTXXXXX
Configure CPLD pin for no pullup
Denotes Input Only Pin
Denotes Pin Configured as Input
Denotes Pin Configured as Output
Denotes Pin Configured as Input/Output
Denotes Open-drain
Denotes Schmitt Trigger Input
ROOM=2178pins AR2084eq/gnt
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
SCHEM,PLN,SV,PE_BULN
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
REV.
FP975
X01
SHEET
10/20/2006 86 OF 144
DCBA
4
Page 87
A B C
NC_BMC_SRAM_22
NC_BMC_SRAM_23
NC_BMC_SRAM_28
+3.3V_AUX
REPLACE
+3.3V_AUX
REPLACE
D
+3.3V_AUX
REPLACE
1
86,87
86,87
86,87
86,87,138
86,87
86,87,138
ROOM = BMCSRAM
MOD_BMC_HIGH_WR_N
MOD_BMC_LOW_WR_N
MOD_BMC_HIGH_WR_N
MOD_BMC_RD_N
MOD_BMC_LOW_WR_N
MOD_BMC_RD_N
+3.3V_AUX
REPLACE
143U22
1
2
74VHC08
+3.3V_AUX
REPLACE
146U22
4
5
74VHC08
+3.3V_AUX
REPLACE
148U22
9
10
74VHC08
+3.3V_AUX
REPLACE
10V-10%
.1uF
MOD_BMC_WR_N
MOD_BMC_SRAM_BHE_N
MOD_BMC_SRAM_BLE_N
21
C317
87,138
87
87
86,138
86,138
86,138
86,138
86,138
86
86
86
86
86
86
86
86
86
86
86
86,88
87
87
86,87,138
87,138
MOD_BMC_A1
MOD_BMC_A2
MOD_BMC_A3
MOD_BMC_A4
MOD_BMC_A5
MOD_BMC_A6
MOD_BMC_A7
MOD_BMC_A8
MOD_BMC_A9
MOD_BMC_A10
MOD_BMC_A11
MOD_BMC_A12
MOD_BMC_A13
MOD_BMC_A14
MOD_BMC_A15
MOD_BMC_A16
MOD_BMC_SRAM_CS_N
MOD_BMC_SRAM_BLE_N
MOD_BMC_SRAM_BHE_N
MOD_BMC_RD_N
MOD_BMC_WR_N
44
43
42
27
26
25
21
20
19
18
39
40
41
17
5
4
3
2
1
6
24
U_BMC_SRAM
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
CS_N
BLE_N
BHE_N
OE_N
WE_N
SRAM,64kx16
NC_22
NC_23
NC_28
VDD1
VDD2
VSS1
VSS2
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
22
23
28
33
11
12
34
7
8
9
10
13
14
15
16
29
30
31
32
35
36
37
38
10V-10%
.1uF
MOD_BMC_D0
MOD_BMC_D1
MOD_BMC_D2
MOD_BMC_D3
MOD_BMC_D4
MOD_BMC_D5
MOD_BMC_D6
MOD_BMC_D7
MOD_BMC_D8
MOD_BMC_D9
MOD_BMC_D10
MOD_BMC_D11
MOD_BMC_D12
MOD_BMC_D13
MOD_BMC_D14
MOD_BMC_D15
21
C316
1uF 6.3V
1 2
C542
22uF 6.3V
1 2
86,138
86,138
86,138
86,138
86
86
86
86
86
86
86
86
86
86
86
86
C584
86,91,92
86,91,92
ROOM = 2178
I2C_BMC_IPMB_VAUX_SDA
I2C_BMC_IPMB_VAUX_SCL
86,87,91,92
86,87,91,92
55,86,89,91
55,86,89,91
70,86,91,120
70,86,91,120
86,91,120
86,91,120
86,91
86,91
I2C_BMC_NIC_VAUX_SDA
I2C_BMC_NIC_VAUX_SCL
I2C_BMC_SEG2_VAUX_SDA
I2C_BMC_SEG2_VAUX_SCL
I2C_BMC_SEG3_VAUX_SDA
I2C_BMC_SEG3_VAUX_SCL
I2C_BMC_SEG4_VAUX_SDA
I2C_BMC_SEG4_VAUX_SCL
I2C_BMC_SEG5_VAUX_SDA
I2C_BMC_SEG5_VAUX_SCL
R843
1 2
R848
4.7K-5%
1 2
R345
4.7K-5%
1 2
R346
4.7K-5%
1 2
R851
4.7K-5%
1 2
R852
4.7K-5%
1 2
PULL-UPS for I2C Busses
R850
4.7K-5%
1 2
R849
4.7K-5%
1 2
21
R846
4.7K-5%
21
R847
2.7K-5%
R845
2.7K-5%
1 2
R844
4.7K-5%
1 2
1
4.7K-5%
2
3
ROOM = 2178
x00_EW_10-07-2004 - Changed NPs to Dummy Symbols.
DT8323_NS_depop R513 and R4798
86,87,91,92
86,87,91,92
66,86
51,86
MOD_BMC_NIC_ALERT1_N
MOD_BMC_NIC_ALERT2_N
BMC_RDY_N
GPE_NMI_BUTTON_N
INTRUDED_COVER
IPMB_RST_N
RAC_PRES_N
ID_BUTTON_DB_N
MOD_BMC_INTRUSION_SWITCH_PRES_N
SHARENIC_CBL_PRES_TO_PLANAR_N
LED_ID_AMBER
LED_ID_BLUE
NMI_BUTTON_DISABLE
PWR_BUTTON_DISABLE
BMC_SMI_N
NP
1 2
8.2K-5%
R513
X
NP
1 2
8.2K-5%
R4798
X
BMC SRAM
+3.3V_AUX
REPLACE
1 2
8.2K-5%
R512
+3.3V
REPLACE
1 2
8.2K-5%
R520
85,92
MII_I2C_SWITCH_N
81,83
81,83
I2C_ISO_NIC_SCL
I2C_ISO_NIC_SDA
NIC_ISO_ALERT1_N
81
NP
NP
NP
1K-5%
S
2
R5465
X
21
G
1
R5404
1 2
0-5%
D1101
1 3
BAR43
Q1933
BSS138
D
3
X
X
NP
NP
1K-5%
X
G
S
2
NP
1 2
R5466
BSS138
1
R5405
0-5%
D1102
1 3
BAR43
Q1934
D
3
X
21
X
1K-5%
NP
S
2
NP
NP
X
21
G
1
R5406
1 2
0-5%
D1103
1 3
R5467
BSS138
Q1935
D
3
X
I2C_BMC_NIC_VAUX_SCL
I2C_BMC_NIC_VAUX_SDA
NP
1 2
1K-5%
NP
X
G
1
R5468
BSS138
Q1936
MOD_BMC_NIC_ALERT1_N
86,87,91,92
86,87,91,92
86,87,91,92
2
3
4
MOD_BMC_INTRUS_SWITCH_PRES_N
86
1 2
8.2K-5%
NOTE: If Intrusion Switch is not on a Cable, use PD to always show present
R5410
SIGNALS EXTERNAL TO BMC MODULE
FAKE RESISTORS are USED FOR REFERENCE SCHEMATICS
IF THE BMC PIN FUNCTION IS NOT USED IT MUST BE PULLED UP WITH A REAL RESISTOR
IF THE BMC PIN FUNCTION IS USED THEN THE FAKE PULLUP IS USED FOR REFERENCE
NIC_ISO_ALERT2_N
83
ROOM = 2178
BAR43
X
S
2
D
3
MOD_BMC_NIC_ALERT2_N
X
R5407
NP
D1104
1 3
BAR43
ISOLATION FOR LOM I2C BUS and ALERT LINES
M2LB_Change_Note:
R5410 changed to pull-down.
MOD_BMC_INTRUS_SWITCH_PRES_N name not changed.
21
0-5%
X
TITLE
86,87,91,92
MODULE:
DESC:
REV: OF
SEC
INC.
ROUND ROCK,TEXAS
BMC
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 87 OF 144
DCBA
Page 88
A B C
FAKE RESISTORS are USED FOR REFERENCE SCHEMATICS
D
1
86,94
86,94
86,94
86,94
80,86
80,86
80,86
86
IF THE BMC PIN FUNCTION IS NOT USED IT MUST BE PULLED UP WITH A REAL RESISTOR
IF THE BMC PIN FUNCTION IS USED THEN THE FAKE PULLUP IS USED FOR REFERENCE
BMC_FAN1_TACH
BMC_FAN2_TACH
BMC_FAN3_TACH
BMC_FAN4_TACH
BMC_FAN5_TACH
BMC_FAN6_TACH
MOD_BMC_FAN7_TACH
MOD_BMC_FAN8_TACH
MOD_BMC_FAN9_TACH
MOD_BMC_FAN10_TACH
MOD_BMC_FAN11_TACH
MOD_BMC_FAN12_TACH
MOD_BMC_FAN13_TACH
MOD_BMC_FAN14_TACH
+3.3V_AUX
REPLACE
1 2
8.2K-5%
R8294
SUB=POP2
8.2K-5%
1 2
R476
SUB=POP2
1 2
8.2K-5%
R477
SUB=POP2
1 2
8.2K-5%
R478
SUB=POP2
1 2
8.2K-5%
R480
SUB=POP2
1 2
8.2K-5%
R479
SUB=POP2
1 2
8.2K-5%
R482
SUB=POP2
1 2
8.2K-5%
R481
86
86
86,138
86
86
86
86
86
86
86
MOD_BMC_A17_PU
MOD_BMC_A0_PU
MOD_BMC_CPLD_INT_N
MOD_BMC_GPIO_130
MOD_BMC_GPIO_18
PS1_PSMI_R
PS2_PSMI_R
MOD_BMC_GPIO_51
MOD_BMC_GPIO_61
MOD_BMC_GPIO_62
BMC_V_P3P3AUX_CPLD_EN
1 2
8.2K-5%
R4614
1 2
8.2K-5%
R495
1 2
8.2K-5%
R5397
+3.3V_AUX
REPLACE
8.2K-5%
1 2
R499
1 2
8.2K-5%
R5095
1 2
8.2K-5%
R5242
1 2
8.2K-5%
R496
1 2
8.2K-5%
R483
1 2
8.2K-5%
R485
1 2
8.2K-5%
R498
1
2
+3.3V_AUX
FANSPEED_1
FANSPEED_2
FANSPEED_3
FANSPEED_4
x00_EW_10-07-2004 - Changed NPs to Dummy Symbols.
x00_EW_10-07-2004 - Changed PS_FAN_DACn TO MOD_BMC_GPI_[74|75]
FAN TACH and PWM: Configurable per platform
ROOM = 2178
86,87
86,138
86
86
MOD_BMC_SRAM_CS_N
MOD_BMC_EXGP_CS_N
MOD_BMC_STBY
MOD_BMC_FWE
+3.3V_AUX
REPLACE
1 2
8.2K-5%
R517
1 2
8.2K-5%
R516
1 2
8.2K-5%
R518
1 2
8.2K-5%
R519
INTERNAL SIGNALS
2
ROOM=2178
3
DELL
ODM
LEAVE Resistor populated if pin is not being used
BMC_TYPE1 BMC_TYPE0
0 0
0
0
0 0
0
0
0
1
1
10
SYSTEM_TYPE2 SYSTEM_TYPE0SYSTEM_TYPE1
00
0
0 1 0
1
1 1
1 0
1 1 Melbourne
00 0
1 1
00 1
11 0
1
THESE SHOULD NOT BE MODIFIED
0
10
000 0
Berlin
London
Montreal HA
placeholder 1U Green
Bullion
Guiness / Montreal EC
conflict
Oslo
Barcelona / Mexico City
conflict
MOD_BMC_TYPE0
95
MOD_BMC_SYSTEM_TYPE0
95
MOD_BMC_SYSTEM_TYPE1
95
MOD_BMC_SYSTEM_TYPE2
95
1 2
100-5%
R4521
+3.3V_AUX
REPLACE
1 2
8.2K-5%
100-5%
R8364
POP2
1 2
R4518
100-5%
1 2
8.2K-5%
R524
R4517
80,86
80,86
MOD_BMC_TACH_MUX_SEL0
MOD_BMC_TACH_MUX_SEL1
R5390
1 2
2.2K-5%
R5391
1 2
3
2.2K-5%
4
BMC and SYSTEM TYPE SELECTION
MOD_BMC_TYPE1 is HARD CODED IN THE CPLD AS a 0
ROOM=ID
x00_EW_10-07-2004 - Changed NPs to Dummy Symbols.
POP3
21
FAN TACH MUX SELECT LINES for 1U system
smr_03_12_05 - changed BOM options on R8364 and R4518
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
M2LB_Change_Note:
Modified TACH pull-ups.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
BMC
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 88 OF 144
4
DCBA
Page 89
A B C
+3.3V_AUX
REPLACE
+3.3V_AUX
REPLACE
D
1
1 8
4.7K-5%
RN22
4.7K-5%
MOD_BMC_TCLK
86
MOD_BMC_TRST_N
86
MOD_BMC_TDO
86
MOD_BMC_HUDI_RST_N
86
MOD_BMC_TMS
86
MOD_BMC_TDI
86
RESET SENSE LINE TO HUDI
X00_DT9869 SCH TDO / TDI pullup swap
4.7K-5%
2 7
RN22
3 6
BMC HUDI JTAG
EMN: PLACE IN ACCESSIBLE AREA ON TOP LAYER
RN22
4 5
4.7K-5%
RN22
4.7K-5%
R853
12
J_HUDI_BMC
1
3
5
7
ROOM=BMCSRAM
21
ROOM=HUDI
+3.3V_AUX
REPLACE
2
4
6
8
109
1211
1413
MOD_BMC_SENSE_HUDI_GND_N
89
55,86,87,89,91
55,86,87,89,91
I2C_BMC_SEG2_VAUX_SDA
+3.3V_AUX
REPLACE
I2C_BMC_SEG2_VAUX_SCL
R4400
12
8.2K-5%
R4407
12
8.2K-5%
R4793
12
8.2K-5%
R4794
12
8.2K-5%
R9755
1 2
0-5%
R9754
1 2
0-5%
1
SCL
16
SDA
6
TACH1
7
TACH2
4
TACH3
9
TACH4/ADDRESS_SELECT/THERM_N
15
PWM1
5
PWM2/SMBALERT_N
8
PWM3/ADDRESS_ENABLE_N
ADDR = 2Eh
UCPU_TEMP
ADT7460
VCC
GND
D1+
D1ÂD2+
D2-
2.5V/SMBALERT_N
3
2
13
12
11
10
14
1 2
C3158
.1uF
10V-10%
1 2
C2795
1 2
C2794
C3159
2200pf
50V-10%
2200pf
50V-10%
4.7uF
16V-10%
R4402
0-5%
R4406
0-5%
R4522
1 2
0-5%
R4401
1 2
0-5%
1
12
12
MOD_CPU1_THERMDA
MOD_CPU1_THERMDC
MOD_CPU2_THERMDA
MOD_CPU2_THERMDC
14
14
18
18
2
+3.3V_AUX
REPLACE
R527
1 2
8.2K-5%
81526 are the jumper plugs
R528
1 2
8.2K-5%
21
J2
BMC BOOT MODE SEL JUMPER
89
MOD_BMC_SENSE_HUDI_GND_N
BMC_PROGRAM_N
NP0
66,86,95
+3.3V_AUX
REPLACE
1411U22
12
13
74VHC08
MOD_BMC_MD2_N
BMC BOOT OPTIONS
PROGRAM = 1, MD2 = 1: Normal Mode
PROGRAM = 0, MD2 = 0: Boot Mode
PROGRAM = 1, MD2 = 0: HUDI Mode
86
55,86,87,89,91
55,86,87,89,91
R9443
12
8.2K-5%
I2C_BMC_SEG2_VAUX_SDA
I2C_BMC_SEG2_VAUX_SCL
R9757
1 2
NC_TMP75_3
0-5%
R9756
1 2
0-5%
NC_P5_UCPU_TEMP
NC_P15_UCPU_TEMP
LOCATION SET BY THERMAL TEAM
U_PLNR_TEMP
1
2
SCL
3
ALERT_N
4 5
GND A2
NC_P14_UCPU_TEMP
8
VCCSDA
7
A0
6
A1
+3.3V_AUX
REPLACE
NP
X
1 2
C2796
2200pf
50V-10%
NP
X
1 2
C2797
2200pf
50V-10%
2
3
10V-10%
.1uF
21
C318
100-5%
21
R4795
+3.3V_AUX
REPLACE
U3
1
A0
2
A1
3 6
A2 SCL
4
GND
24C02
TSSOP8
SUB*_JW343
VCC
WC_N
SDA
TMP75AID
ADDR = 90
1 2
100-5%
R4523
ROOM = PLANAR_TEMP
ROOM=BMCFRU
R9759
8
7
5
X01_DTXXXXX
1 2
0-5%
R9758
1 2
0-5%
I2C_BMC_SEG2_VAUX_SCL
I2C_BMC_SEG2_VAUX_SDA
55,86,87,89,91
55,86,87,89,91
3
TEMPERATURE SENSORS FOR CPU AND AMBIENT
4
PROGRAMMED PN
BLANK PN
DSK, PROG
BMC LOG/FRU SEEPROM
JW343
HN191
DR020
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
M2LB_Change_Note:
Changed J_2 to right-angle part
MODULE:
DESC:
REV: OF
TITLE
SCHEM,PLN,SV,PE_BULN
DWG NO.
DATE
FP975
10/20/2006 89 OF 144
BMC
SEC
4
INC.
ROUND ROCK,TEXAS
REV.
X01
SHEET
DCBA
Page 90
A B C
D
1
+3.3V_AUX
REPLACE
R450
1 2
8.2K-5%
R451
1 2
16V-10%
.1uF
1uF 6.3V
95
95
95
95
95
95
95
95
8.2K-5%
MOD_BMC_COM1_C1+
C292
21
MOD_BMC_COM1_C1ÂMOD_BMC_COM1_C2+
1 2
C540
MOD_BMC_COM1_C2-
MOD_BMC_SER_SOUTA
MOD_BMC_SER_DTRA_N
MOD_BMC_SER_RTSA_N
MOD_BMC_SER_DCDA_N
MOD_BMC_SER_RIA_N
MOD_BMC_SER_SINA
MOD_BMC_SER_DSRA_N
MOD_BMC_SER_CTSA_N
NC_MOD_COM1_U29_20
MOD_BMC_COM1_FORCEON
MOD_BMC_COM1_FORCEOFF_N
Com1
28
C1+
24
C1-
1
C2+
2
C2-
14
T1IN
13
T2IN
12
T3IN
19
R1OUT
18
R2OUT
17
R3OUT
16
R4OUT
15
R5OUT
20
R2OUTB
23
FORCEON
22
FORCEOFF_N
MAX3243ECAI
U70
INVALID_N
VCC
V+
V-
T1OUT
T2OUT
T3OUT
R1IN
R2IN
R3IN
R4IN
R5IN
GND
+3.3V_AUX
REPLACE
26
27
3
9
MOD_BMC_COM1_SOUTA
10
MOD_BMC_COM1_DTRA
11
MOD_BMC_COM1_RTSA
4
MOD_BMC_COM1_DCDA
5
MOD_BMC_COM1_RIA
6
MOD_BMC_COM1_SINA
7
MOD_BMC_COM1_DSRA
8
MOD_BMC_COM1_CTSA
21
25
NC_MOD_BMC_COM1_INVALID_N
MOD_BMC_COM1_MAX3243_VPLUS
MOD_BMC_COM1_MAX3243_VMINUS
90
90
90
90
90
90
90
90
ROOM=COMMPORT
1uF 6.3V
1 2
C539
1uF 6.3V
1 2
C538
1uF 6.3V
1 2
C537
MOD_BMC_COM1_DCDA
90
MOD_BMC_COM1_DSRA
90
MOD_BMC_COM1_SINA
90
MOD_BMC_COM1_RTSA
90
MOD_BMC_COM1_SOUTA
90
MOD_BMC_COM1_CTSA
90
MOD_BMC_COM1_DTRA
90
MOD_BMC_COM1_RIA
90
50V-10%
1 2
470pF
C1010
50V-10%
1 2
470pF
C1012
If 0 Ohm not good, Sub with 99477
50V-10%
1 2
470pF
C1014
50V-10%
1 2
470pF
C1015
R4187
1 2
0-5%
R4186
1 2
0-5%
R4185
1 2
0-5%
R4184
1 2
0-5%
R4183
1 2
0-5%
R4182
1 2
0-5%
R4181
1 2
0-5%
R4180
1 2
0-5%
MOD_BMC_COM1_DCDA_L
MOD_BMC_COM1_DSRA_L
MOD_BMC_COM1_SINA_L
MOD_BMC_COM1_RTSA_L
MOD_BMC_COM1_SOUTA_L
MOD_BMC_COM1_CTSA_L
MOD_BMC_COM1_DTRA_L
MOD_BMC_COM1_RIA_L
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
90
MOD_BMC_COM1_DCDA_L
MOD_BMC_COM1_DSRA_L
MOD_BMC_COM1_SINA_L
MOD_BMC_COM1_RTSA_L
MOD_BMC_COM1_SOUTA_L
MOD_BMC_COM1_CTSA_L
MOD_BMC_COM1_DTRA_L
MOD_BMC_COM1_RIA_L
NC_MOD_BMC_J_COM1_10
NC_MOD_BMC_J_COM1_11
ADD1=ADD*_01157
ADD=ADD*_01157
1
6
2
7
3
8
4
9
5
10
11
1
J_COM1
1
6
2
7
3
8
4
9
5
NC1
NC2
DSUB
2
X00_DT9914 SCH PECI GONE
50V-10%
470pF
1 2
C1011
50V-10%
470pF
1 2
C1009
50V-10%
1 2
470pF
C1013
50V-10%
470pF
1 2
C1016
ROOM=COMMPORT
SERIAL PORT CONNECTOR
2
COM PORT
3
3
M2LB_Change_Note:
Changed part for J_COM1.
4
ROOM=JUMPERS
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
BMC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
SEC
4
REV.
X01
90 OF 14410/20/2006
Page 91
1
A B C
BMC I2C MUX & Header
MUX INSTALLED MUX NOT INSTALLED
POP
R9479
R9478
R9481
R9480
R5497
R9519
R4462
C3116
POP
R9515
R9516
R9517
R9518
Q8062
Q8063
Q8064
Q8065
NOPOP
R9483
R9482
R4667
R4666
NOPOP
R9479
R9478
R9481
R9480
R5497
R4666
R4462
C3116
R4667
NOPOP POP
R9515
R9516
R9517
R9518
Q8062
Q8063
Q8064
Q8065
R9519
R9483
R9482
62,91
SYSTEM_PWRGOOD_FETS_6V
+3.3V_AUX
REPLACE
NP0
R9516
1K-5%
D
DT11510_change net names_jd
I2C_ISO_BMC_NH_VAUX_SCL
2N7002
NP0
S
2
21
G
1
D
3
I2C_ISO_BMC_SH_VAUX_SCL
Q8062
2N7002
NP0
S
NP0
R9515
21
G
1
2
1K-5%
25
1
51
2
86,87,91
86,87,91
I2C_BMC_SEG5_VAUX_SCL
I2C_BMC_SEG5_VAUX_SDA
NP
R9483
X
NP0
NP0
D
3
DT11874_shift i2c connections to mux_jd
R9462
1 2
R9519
8.2K-5%
1 2
Q8063
8.2K-5%
+3.3V_AUX
REPLACE
NP
R9482
0-5%
X
1 2
0-5%
1 2
NP0
1 2
R9479
NP0
0-5%
R9478
NP0
1 2
0-5%
U_BMC_I2C
7
YA
9
YB
8
GND
VCC
IA0
IA1
IA2
IA3
IB0
IB1
IB2
IB3
S0
S1
EA_N
EB_N
16
6
5
4
3
10
11
12
13
14
2
1
15
NP0
1 2
NP0
1 2
R9480
0-5%
R9481
0-5%
NC_U_BMC_I2C_P6
I2C_BMC_NH_VAUX_SCL
NC_U_BMC_I2C_P10
I2C_BMC_SH_VAUX_SCL
I2C_BMC_PERC_VAUX_SCL
I2C_BMC_SH_VAUX_SDA
I2C_BMC_PERC_VAUX_SDA
MOD_I2C_MUX_SEL0
MOD_I2C_MUX_SEL1
70
DT11876_change net names_jd
I2C_BMC_NH_VAUX_SDA
70
95
95
NP0
2 1
C3116
.1uF
16V-10%
86,87,92
86,87,92
55,86,87,89
70,86,87,120
86,87,120
86,87,91
86,87,92
I2C_BMC_IPMB_VAUX_SCL
I2C_BMC_NIC_VAUX_SCL
I2C_BMC_SEG2_VAUX_SCL
I2C_BMC_SEG3_VAUX_SCL
I2C_BMC_SEG4_VAUX_SCL
I2C_BMC_SEG5_VAUX_SCL
MOD_BMC_NIC_ALERT2_N
+3.3V_AUX
REPLACE
NP0
J_I2C_DBG
3
5
7
9
11
13
15
21
4
6
8
10
12
14
16
I2C_BMC_IPMB_VAUX_SDA
I2C_BMC_NIC_VAUX_SDA
I2C_BMC_SEG2_VAUX_SDA
I2C_BMC_SEG3_VAUX_SDA
I2C_BMC_SEG4_VAUX_SDA
I2C_BMC_SEG5_VAUX_SDA
MOD_BMC_NIC_ALERT1_N
86,87,92
86,87,92
55,86,87,89
70,86,87,120
86,87,120
86,87,91
86,87,92
2
3
Enable Select
Ea
H
X
L
L
Eb
X
H
L
L
S1 S0
X
X
L
L
5C3253
NP0
100-5%
1 2
R5497
NP
R4667
X
1 2
NP
R4666
X
2.2K-5%
1 2
2.2K-5%
NP0
R9518
1K-5%
Q8065
NP0
3
D
21
1
G
2
S
2N7002
I2C_ISO_BMC_NH_VAUX_SDA
SYSTEM_PWRGOOD_FETS_6V
Q8064
Ya
62,91
Yb
NP0
Hi-Z
IB0
IB1
X
R9517
NC
HT2100
NP0
1K-5%
21
1
G
3
D
2
S
X
X
L
H
Hi-Z
X
IA0
IA1
25
3
L
L
L
L
H
H
L
H
IA2
IA3
IB2
IB3
HT1000
PERC
2N7002
I2C_ISO_BMC_SH_VAUX_SDA
51
MODULE:
BMC
DESC:
REV: OF
SEC
4
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
X01
SHEET
10/20/2006 91 OF 144
DBA
4
Page 92
A B C
San Marco Management Connectors
D
PLANAR MII CONN
1
2
+3.3V
REPLACE
92
95
95
95
95
95
86,87,91,92
86,87,91
86,87,91
KEY
PLANAR RAC CONN
J_DRAC5_MGMT
1
RAC_CONN_USB20_DP
49
I2C_RACVID_SCL
105
MOD_BMC_I2C_IPMB_RAC_SDA
MOD_BMC_RAC_SERIAL_RX
MOD_BMC_RAC_SERIAL_TX
MOD_BMC_RAC_SERIAL_CTS
MOD_BMC_RAC_SERIAL_DSR
MOD_BMC_RAC_SERIAL_RI
NC_NIC_FML_SDA
MOD_BMC_NIC_ALERT1_N
I2C_BMC_NIC_VAUX_SDA
I2C_BMC_NIC_VAUX_SCL
DRAC_TWO_LOMS
NP
1 2
100-5%
R5980
X
SILKSCREEN=RAC_CONN1
3
5
7 8
9
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29
31 32
33 34
35 36
37 38
39
41 42
43 44
45 46
47 48
49
2x25 2MM VERT
SHR LATCH SLOT
2
4
6
10
20
30
40
50
+3.3V_AUX
REPLACE
+3.3V
RAC_CONN_USB20_DN
RAC_VID_RED
RAC_VID_GREEN
RAC_VID_BLUE
RAC_VID_HSYNC
RAC_VID_VSYNC
I2C_RACVID_SDA
REPLACE
49
98,105
98,105
98,105
98
98
105
MOD_BMC_I2C_IPMB_RAC_SCL
MOD_BMC_RAC_SERIAL_RTS
MOD_BMC_RAC_SERIAL_DTR
MOD_BMC_RAC_SERIAL_DCD
MOD_BMC_IPMB_RST_N
95
95
95
92
+3.3V_AUX
REPLACE
12
R4748
8.2K-5%
ROOM=DRAC
+3.3V_AUX
REPLACE
12
R4750
RAC_PRES_N
8.2K-5%
86
66,86,92
MII_SHARE1_TXD3_R
83
MII_SHARE1_TXD2_R
83
12
R5188
J_DRAC5_MII
MOD_BMC_MII_CBL_PRES_RAC_N
MII_SHARE1_RXDV
83
LOM2_SHARE1_CLK
85
MII_SHARE1_RXD3
83
MII_SHARE1_RXD2
85,87
83
MII_SHARE1_RXD1
83
MII_SHARE1_RXD0
83
MOD_BMC_MII_SHARE1_TXD3
92
MOD_BMC_MII_SHARE1_TXD2
92
MOD_BMC_MII_SHARE1_TXD1
92
MOD_BMC_MII_SHARE1_TXD0
92
MII_SHARE0_RXDV
81
MII_I2C_SWITCH_N
MOD_BMC_MII_SHARE1_TXD3
21
MOD_BMC_MII_SHARE1_TXD2
SILKSCREEN=RAC_CONN2
200-5%
Place these R's close to the LOM and length match the TX lines
R5284
1 2
33-5%
R5285
1
3
5 6
7 8
9
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29
31 32
33 34
35 36
37 38
39
41 42
43 44
2x22 2MM VERT
SHR LATCH SLOT
92
92
2
4
10
20
30
40
MII_SHARE0_TXD3_R
81
MII_SHARE0_TXD2_R
81
MOD_BMC_MII_SHARE1_TXEN
MOD_BMC_MII_SHARE0_TXEN
LOM1_SHARE0_CLK
MII_SHARE0_RXD3
MII_SHARE0_RXD2
MII_SHARE0_RXD1
MII_SHARE0_RXD0
MOD_BMC_MII_SHARE0_TXD3
MOD_BMC_MII_SHARE0_TXD2
MOD_BMC_MII_SHARE0_TXD1
MOD_BMC_MII_SHARE0_TXD0
MOD_BMC_MII_CBL_PRES_PLNR_N
R5290
33-5%
R5291
1 2
92
92
85
81
81
81
81
92
92
92
92
21
MOD_BMC_MII_SHARE0_TXD3
MOD_BMC_MII_SHARE0_TXD2
R5175
+3.3V_AUX
REPLACE
1
2
8.2K-5%
1
86,92
2
92
92
3
4
Pulldown used if LOM2 is not 5708
X00_DT9931 SCH signal name change
86,87,91,92
92
92
86,92
66,86,92
MOD_BMC_NIC_ALERT1_N
MOD_BMC_MII_CBL_PRES_PLNR_N
RAC_PRES_N
ONLY POPULATE IF NEED ONLY 1 ALERT LINE
MOD_BMC_I2C_IPMB_RAC_SCL
MOD_BMC_I2C_IPMB_RAC_SDA
ADD=ADD*_NC153
ADD1=ADD*_MW624
ADD2=ADD*_NC153
ADD3=ADD*_HF606
P23_DT9266_jp_Changed standoff and added screw
R5120
NP
1 2
0-5%
R3618
1 2
R3619
1 2
Depop U1130 if R4818 is populated
Depop R4818 if U1130 is populated
ALWAYS LEAVE R4827 and R4748 populated
X
0-5%
0-5%
MOD_BMC_NIC_ALERT2_N
I2C_BMC_IPMB_VAUX_SCL
I2C_BMC_IPMB_VAUX_SDA
NC153 = standoff w/ latch
MW624 = New style standoff w/ latch
NC153 = standoff w/ latch
HF606 = Screw for MW624
+3.3V_AUX
REPLACE
14
1
2
U1130
3
74VHC32
86,87,91
86,87,91
86,87,91
ISO_SHARED_BOOT_MODE_N
+3.3V
LAN_AUX
R5955
1 2
BAR43
31
4.7K-5%
SHARED_BOOT_MODE_N
D1112
81,83
+3.3V_AUX
REPLACE
R5637
1 2
220-5%
MII_SHARE1_TXD1_R
83
MII_SHARE1_TXD0_R
83
MII_SHARE1_TXEN_R
83
+3.3V_AUX
REPLACE
C3536
+3.3V_AUX
REPLACE
14
4
5
+3.3V_AUX
9
10
+3.3V_AUX
12
13
U1130
74VHC32
REPLACE
14
U1130
74VHC32
REPLACE
14
U1130
74VHC32
6
8
11
33-5%
R5286
1 2
33-5%
R5287
33-5%
R5288
1 2
33-5%
NOTE: RX and TX BITS are SWIZZLED. DRAWING shows SAN MARCO CONNECTORn parts as PROE symbols
21
.1uF
16V-10%
NC_OR_6
NC_OR_8
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
NC_OR_11
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
MOD_BMC_MII_SHARE1_TXD1
21
MOD_BMC_MII_SHARE1_TXD0
MOD_BMC_MII_SHARE1_TXEN
SHARENIC_CBL_PRES_RAC_N
MII_SHARE1_TXEN
MII_SHARE1_CLK
MII_SHARE1_TXD3
MII_SHARE1_TXD2
MII_SHARE1_TXD1
MII_SHARE1_TXD0
MII_SHARE1_RXD3
MII_SHARE1_RXD2
MII_SHARE1_RXD1
MII_SHARE1_RXD0
MII_SHARE0_TXEN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
92
92
92
SAN MARCO CONNECTOR
PROPRIETARY NOTE
81
81
81
MII_SHARE0_TXD1_R
MII_SHARE0_TXD0_R
MII_SHARE0_TXEN_R
MII_SHARE1_RXDV
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
MII_SHARE0_RXDV
MII_SHARE0_CLK
MII_SHARE0_TXD3
MII_SHARE0_TXD2
MII_SHARE0_TXD1
MII_SHARE0_TXD0
MII_SHARE0_RXD3
MII_SHARE0_RXD2
MII_SHARE0_RXD1
MII_SHARE0_RXD0
MII_CBL_PRES_PLNR_N
TITLE
DWG NO.
DATE
33-5%
R5289
33-5%
R5292
1 2
33-5%
R5293
33-5%
21
MOD_BMC_MII_SHARE0_TXD1
MOD_BMC_MII_SHARE0_TXD0
21
MOD_BMC_MII_SHARE0_TXEN
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
92
92
92
3
BMC
SEC
4
REV.
X01
92 OF 14410/20/2006
C
DBA
Page 93
A B C
+3.3V_AUX
REPLACE
12
D
1
FROM CONTROL PANEL
70
BTN_ID_RAW_N
A B
1 2
3 4
GND_1 GND_2
WHITE PUSHBUTTON
SPST SWITCH
P19_DT9231_jp_swap symbol
SW_ID
R5143
8.2K-5%
R5165
1K-5%
RC=0.92ms
21
21
C3213
.1uF
16V-10%
1 2
REAR ID BUTTON
R5127
100-5%
GOES TO BMC (Schmitt Input)
MOD_BMC_ID_BUTTON_DB_N
ROOM=CYC_REAR
86
1
2
93,138
MOD_BMC_LED_ID_BLUE
ROOM=CYC_REAR
+3.3V_AUX
REPLACE
NP
Q15
R5443
X
1 2
8.2K-5%
21
R5459
D
1
G
S
2N7002
4.7K-5%
MOD_BMC_2N7002_D1
3
2
100-5%
1 2
R221
1 2
100-5%
R222
USING MORE RESISTORS
TO WITHSTAND SHORT CIRCUIT ON CONNECTOR
OR DRAC3 AC ADAPTER PLUGGED IN
+5VAUX
2
R464
1 2
8.2K-5%
MOD_BMC_3906_C1
MOD_BMC_3906_B
3906
MOD_BMC_68
1
Q1
3
1 2
68-5% 68-5%
R635
1 2
R634
L35
BLM11A601S
U38
CATH1
1
CATH2
3
COMMON1
COMMON2
CATH3
1
3
2
4
CATH4
6
J_CYC
BZA462A
MOD_BMC_CATH3
R678
1 2
0-5%
21
MOD_BMC_AMBER_CATH_REAR
2
5
1 2
100-5%
AB
MOD_BMC_3906_C2
1 2
100-5%
R223
R224
+3.3V_AUX
REPLACE
2
3
39-5%
Q2
1 2
39-5%
R268
MOD_BMC_L_39R_82R
1
3906
MOD_BMC_3906_B2
1 2
R269
R465
1 2
8.2K-5%
MOD_BMC_2N7002_D3
Q16
D
3
1
G
S
2
2N7002
+3.3V_AUX
NP
R5458
1 2
REPLACE
R5444
X
1 2
4.7K-5%
8.2K-5%
MOD_BMC_LED_ID_AMBER
2
93,138
3
X00_DT9868 SCH cleanup
MOD_BMC_CYC_BLUE_DRV
93
93,138
MOD_BMC_LED_ID_AMBER
1
G
2N7002
1 2
68-5%68-5%
Q13
D
3
S
2
1 2
R637
MOD_BMC_2N7002_D2
R636
C298
Place C298, C299 and L35, L36 close to J_CYC
.1uF
2 1
16V-10%
BLUE: 23 mA @3.8V
AMBER: 23 mA @2.1V
center pin is AMBER+
MOD_BMC_BLUE_CATH_REAR
DC PWR JACK
C299
2 1
MOD_BMC_CYC_AMB_DRV
93
BLM11A601S
.1uF
16V-10%
L36
21
SUB*_4M970
68-5%
MOD_BMC_2N7002_D4
3
2
2N7002
1 2
Q14
D
S
R356
68-5%
1
G
1 2
R357
SUB*_4M970
TO DO: need to create 82.5 ohm 1206 in new library
MOD_BMC_LED_ID_BLUE
93,138
3
4
MOD_BMC_CYC_BLUE_DRV
93
MOD_BMC_CYC_AMB_DRV
93
REAR ID LED & REAR CYCLOPS CONNECTOR
ID Button / Rear Cyclops
LED_CYC
BLUE
1
3
AMB
LED
BLU/AMB
2
MODULE:
DESC:
REV: OF
SEC
BMC
4
INC.
TITLE
SCHEM,PLN,SV,PE_BULN
ROUND ROCK,TEXAS
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
REV.
FP975
SHEET
X01
10/20/2006 93 OF 144
DCBA
Page 94
A B C
D
X00_DT10000 SCH change to AUX
1
2
J01_jp_Changed to the 2x6 fan connector
+12V
REPLACE
94
BMC_FAN5_TACH_R
MOD_BMC_FAN13_TACH_R
MOD_BMC_FAN1_TACH_R
MOD_BMC_FAN9_TACH_R
MOD_BMC_FAN3_TACH_R
MOD_BMC_FAN11_TACH_R
MOD_BMC_FAN4_TACH_R
MOD_BMC_FAN12_TACH_R
+12V
REPLACE
+12V
REPLACE
+12V
REPLACE
138
94,120
80
94
94
94
94
94
80
94
94
80
MOD_BMC_FANSPEED_5_N
MOD_BMC_FAN_3
MOD_BMC_FAN_2
MOD_BMC_FAN_1
MOD_BMC_FAN_4
1U Fan Connectors
J_FAN1U_1
2 1
4 3
6 5
8 7
10 9
12 11
HDR 2X6 SHR
2MM WTB
J_FAN1U_2
2 1
4 3
6 5
8 7
10 9
12 11
HDR 2X6 SHR
2MM WTB
J_FAN1U_3
2 1
4 3
6 5
8 7
10 9
12 11
HDR 2X6 SHR
2MM WTB
J_FAN1U_4
2 1
4 3
6 5
8 7
10 9
12 11
HDR 2X6 SHR
2MM WTB
+3.3V
REPLACE
R9978
1 2
100-5%
SUB=POP2
POP3
POP3
POP3
POP3
1K-1%
12
R9973
SUB=POP2
Q8076
BSS138
1
G
BMC_FAN6_TACH_R
MOD_BMC_FAN14_TACH_R
MOD_BMC_FAN2_TACH_R
MOD_BMC_FAN10_TACH_R
MOD_BMC_FAN7_TACH_R
MOD_BMC_FAN15_TACH_R
MOD_BMC_FAN8_TACH_R
MOD_BMC_FAN16_TACH_R
D
3
SUB=POP2
S
2
94,120
80
94
94
94
80
94
80
BMC_FAN_5
ZONE 5- PSU FANS
+12V
REPLACE
+12V
REPLACE
+12V
REPLACE
+12V
REPLACE
120
138
138
138
138
MOD_BMC_FANSPEED_1_N
MOD_BMC_FANSPEED_2_N
MOD_BMC_FANSPEED_3_N
MOD_BMC_FANSPEED_4_N
+3.3V
REPLACE
R9974
1 2
100-5%
SUB=POP2
+3.3V
REPLACE
R9975
1 2
100-5%
SUB=POP2
+3.3V
REPLACE
R9976
1 2
100-5%
SUB=POP2
+3.3V
REPLACE
R9977
1 2
100-5%
SUB=POP2
1K-1%
R9969
SUB=POP2
Q8072
1K-1%
R9970
SUB=POP2
Q8073
1K-1%
R9971
SUB=POP2
Q8074
1K-1%
R9972
SUB=POP2
Q8075
2U Fan Connectors
J01_DT7798_SMR - added 2u Fan bracket to BOM (MC848)
ZONE 1 - CPU2 MEM
12
BSS138
1
G
12
BSS138
1
G
12
BSS138
1
G
12
BSS138
1
G
MOD_BMC_FAN_1
D
3
SUB=POP2
S
2
MOD_BMC_FAN_2
D
3
SUB=POP2
S
2
MOD_BMC_FAN_3
D
3
SUB=POP2
S
2
MOD_BMC_FAN_4
D
3
SUB=POP2
S
2
94
ZONE 2 - CPU2
94
ZONE 3 - CPU1
94
ZONE 4 - CPU1 MEM
94
ADD=ADD7_MC848
J_FAN2U_1
2 1
2 1
4 3
4 3
POP2
HL44020
CONN, 2x2
J_FAN2U_2
2 1
2 1
4 3
4 3
POP2
HL44020
CONN, 2x2
J_FAN2U_3
2 1
2 1
4 3
4 3
POP2
HL44020
CONN, 2x2
J_FAN2U_4
2 1
2 1
4 3
POP2
HL44020
CONN, 2x2
+12V
REPLACE
+12V
REPLACE
+12V
REPLACE
+12V
REPLACE
94
94
94
94
MOD_BMC_FAN1_TACH_R
MOD_BMC_FAN2_TACH_R
MOD_BMC_FAN3_TACH_R
MOD_BMC_FAN4_TACH_R4 3
+3.3V_AUX
+3.3V_AUX
REPLACE
1 2
R4914
1 2
+3.3V_AUX
REPLACE
1 2
R4916
1 2
+3.3V_AUX
REPLACE
R4913
+3.3V_AUX
REPLACE
1 2
8.2K-5% 8.2K-5%8.2K-5%
1 2
R4915
REPLACE
1 2
8.2K-5%
100-5%
Fan Tachs
R5998
K2
100-5%
R5989
R4953
1 2
8.2K-5%
R5999
100-5%
R5990
R4954
1 2
8.2K-5%
R10139
21
100-5%
R5991
R4955
1 2
8.2K-5%
R6001
100-5%
R5992
R4956
1 2
8.2K-5%
R6002
21
R5993
1K-1%1K-1%1K-1%
1 2
1 2
1 2
1K-1%
1 2
1K-1%
1 2
BAT54SW
12
3
A2/K1
D1078
BAT54SW
K2
2 1
3
A2/K1
BAT54SW
K2
3
A2/K1
BAT54SW
K2
2 1
3
A2/K1
D1081
BAT54SW
K2
2 1
3
A2/K1
D8001
A1
D1079
D1080
12
A1
A1
A1
A1
50V-10%
4700pF
50V-10%
4700pF
1 2
50V-10%
4700pF
1 2
50V-10%
4700pF
1 2
ZONE 1 - CPU2 Fan
MOD_BMC_FAN1_TACH
1 2
C1792
P18_DT9071_jp
ZONE 1 - CPU2 Fan
MOD_BMC_FAN2_TACH
C1789
ZONE 2 - CPU1 Fan
MOD_BMC_FAN3_TACH
C1790
ZONE 2 - CPU1/Mem Fan
MOD_BMC_FAN4_TACH
C1791
1
86
86
86
2
86
3
4
+3.3V_AUX
REPLACE
PSU Fan Tachs
R6004
1 2
100-5%
R4918
94,120
1 2
BMC_FAN6_TACH_R
R4958
1 2
8.2K-5%
+3.3V_AUX
REPLACE
R9872
100-5%
POP3
8.2K-5% 8.2K-5%
R4957
1 2
MOD_BMC_FAN7_TACH_R
94
R4917
1 2
8.2K-5%
POP3
London
FANSPEED_1_R (ZONE 1) ==> CPU2 Fans
FANSPEED_2_R (ZONE 2) ==> CPU1/Mem Fans
FANSPEED_3_R (ZONE 3) ==> PSU Fans
ZONE 3 - PSU1 FAN
R8002
94,120
BMC_FAN5_TACH_R
+3.3V_AUX
REPLACE
X00_DT10000 SCH change to AUX
+3.3V_AUX
R6005
1K-1%
K2
BAT54SW
3
A2/K1
D1084
REPLACE
R9874
21
A1
12
100-5%
1K-1%
12
R9857
BAT54SW
K2
2 1
3
POP3
A2/K1
D8012
A1
94
R8018
MOD_BMC_FAN8_TACH_R
1 2
R8016
ZONE 3 - PSU2 Fan
94
MOD_BMC_FAN6_TACH
50V-10%
4700pF
1 2
BAT54SW
21
1K-1%
K2
2 1
3
A2/K1
POP3
D1083
A1
C1788
86
MOD_BMC_FAN9_TACH_R
+3.3V_AUX
REPLACE
12
R9855
ZONE 3 - CPU1 Fan
R8017
POP3
16V-10%
MOD_BMC_FAN7_TACH
.01uF
C851
86,88
94
MOD_BMC_FAN10_TACH_R
1 2
POP3
1 2
8.2K-5%8.2K-5%
R8048
1 2
8.2K-5%
R9873
100-5%
POP3
R8047
1 2
8.2K-5%
POP3
POP3
21
1K-1%
R9856
16V-10%
.01uF
POP3
BAT54SW
A1
12
POP3
K2
3
A2/K1
D8011
12
16V-10%
POP3
.01uF
21
ZONE 2 - CPU2 Fan
MOD_BMC_FAN9_TACH
C8027
X00_DT10011 SCH series R increase to 8.2k
21
ZONE 2 - CPU2 Fan
MOD_BMC_FAN10_TACH
C8028
21
X00_DT9867 SCH V node for diode
86,88
86,88
X00_DT9867 SCH V node for diode
1 2
1 2
8.2K-5%
R8046
1 2
8.2K-5%
R9871
100-5%
POP3
8.2K-5%
R8049
1 2
8.2K-5%
POP3
50V-10%
4700pF
1 2
MOD_BMC_FAN5_TACH
C8029
86
BAT54SW
A1
12
3
POP3
K2
3
A2/K1
D8013
21
1K-1%
12
R9854
ZONE 1 - CPU1 Fan
POP3
16V-10%
M2LB_Change_Note:
Changed fan circuitry.
Continued on Sheet 80.
.01uF
21
MOD_BMC_FAN8_TACH
C8030
86,88
MODULE:
DESC:
REV: OF
BMC
SEC
FANS
4
INC.
TITLE
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
Berlin
FANSPEED_1_R (ZONE 1) ==> CPU1/Mem Fans
FANSPEED_2_R (ZONE 2) ==> CPU2 Fans
FANSPEED_3_R (ZONE 3) ==> PSU Fans
ROOM=FANS
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
FP975
DCBA
REV.
X01
SHEET
94 OF 14410/20/2006
Page 95
A B C
D
1
2
CPLD SIGNAL TERMINATION
ECAD: Place These Series R's next to U_CPLD_SLV pins
R8962
SHIFTY_BMC_DATA_UP_R
95
MOD_I2C_MUX_SEL0_R
138
MOD_I2C_MUX_SEL1_R
138
VID_SECURITY_BLANK_N_R
95
MOD_BMC_DSR0_N_R
95
MOD_BMC_CTS0_N_R
95
MOD_BMC_SIN_R
95
MOD_BMC_SER_SOUTA_R
95
MOD_BMC_SER_DTRA_N_R
95
PG_TO_BMC_VDD3V_STBY
138
95
MOD_BMC_SER_RTSA_N_R
1 2
33-5%
R8963
1 2
33-5%
R8955
33-5%
R8953
1 2
33-5%
R8964
33-5%
R9571
33-5%
R8957
33-5%
R8956
1 2
33-5%
21
R8954
33-5%
R8952
1 2
33-5%
21
R9570
21
33-5%
21
21
21
PG_TO_BMC_VDD3V_STBY_R
SHIFTY_BMC_DATA_UP
MOD_I2C_MUX_SEL0
MOD_I2C_MUX_SEL1
VID_SECURITY_BLANK_N
MOD_BMC_DSR0_N
MOD_BMC_CTS0_N
MOD_BMC_SIN
MOD_BMC_SER_SOUTA
MOD_BMC_SER_DTRA_N
MOD_BMC_SER_RTSA_N
138
91
X00_DT9963 SCH
91
106
86
86
86
90
90
X00_DT9966 SCH
95
X00_DT9964 SCH
90
SIO_SOUTA
66
SIO_SINA
66
SIO_RTSA_N
66
SIO_CTSA_N
66
SIO_DTRA_N
66
SIO_DSRA_N
66
SIO_DCDA_N
66
SIO_RIA_N
66
SIO_SOUTB
66
SIO_SINB
66
SIO_RTSB_N
66
SIO_CTSB_N
66
SIO_DTRB_N
66
SIO_DSRB_N
66
SIO_DCDB_N
66
SIO_RIB_N
66
jp_P01_1890_Removed VTT selection circuit.
U_CPLD_SLV
91
IO1/A0/GOE0
92
IO2/A1
93
IO3/A2
94
IO4/A3
97
IO5/A4
98
IO6/A5
99
IO7/A6
100
IO8/A7
3
IO9/A8
4
IO10/A9
5
IO11/A10
6
IO12/A11
8
IO13/A12
9
IO14/A13
10
IO15/A14
11
IO16/A15
IO1/C0
IO2/C1
IO3/C2
IO4/C3
IO5/C4
IO6/C5
IO7/C6
IO8/C7
IO9/C8
IO10/C9
IO11/C10
IO12/C11
IO13/C12
IO14/C13
IO15/C14
IO16/C15
41
42
43
44
47
48
49
50
53
54
55
56
58
59
60
61
SHIFTY_BMC_CLK_R
138
SHIFTY_BMC_LATCH_R
138
SHIFTY_BMC_DATA_DN_R
138
NC_SLV_CPLD_60
NC_SLV_CPLD_61
ECAD: Place These Series R's next to U_CPLD_MSTR pins
Check if this matches up with Fat Tire
MOD_BMC_SER_SOUTA_R
MOD_BMC_SER_SINA
MOD_BMC_SER_RTSA_N_R
MOD_BMC_SER_CTSA_N
MOD_BMC_SER_DTRA_N_R
MOD_BMC_SER_DSRA_N
MOD_BMC_SER_DCDA_N
MOD_BMC_SER_RIA_N
MOD_BMC_SYSTEM_TYPE0
MOD_BMC_SYSTEM_TYPE1
MOD_BMC_SYSTEM_TYPE2
MOD_BMC_TYPE0
FLIGHT_RECORDER_RX
FLIGHT_RECORDER_TX
95
90
95
90
95
90
90
90
88
88
88
88
138
138
R8960
1 2
33-5%
R8958
1 2
33-5%
R8959
1 2
33-5%
SHIFTY_BMC_CLK
SHIFTY_BMC_LATCH
SHIFTY_BMC_DATA_DN
95
95
95
1
2
MOD_BMC_SOUT
86
MOD_BMC_SIN_R
95
MOD_BMC_RTS0_N
86
MOD_BMC_CTS0_N_R
95
MOD_BMC_DTR0_N
86
MOD_BMC_DSR0_N_R
95
MOD_BMC_DCD0_N
86
MOD_BMC_RI0_N
86
MOD_BMC_RAC_SERIAL_TX
92
MOD_BMC_RAC_SERIAL_RX
92
MOD_BMC_RAC_SERIAL_RTS
92
MOD_BMC_RAC_SERIAL_CTS
92
MOD_BMC_RAC_SERIAL_DTR
92
MOD_BMC_RAC_SERIAL_DSR
92
MOD_BMC_RAC_SERIAL_DCD
92
MOD_BMC_RAC_SERIAL_RI
92
NC_SLV_CPLD_12
NC_SLV_CPLD_23
NC_SLV_CPLD_27
37
IO1/B0
36
IO2/B1
35
IO3/B2
34
IO4/B3
31
IO5/B4
30
IO6/B5
29
IO7/B6
28
IO8/B7
22
IO9/B8
21
IO10/B9
20
IO11/B10
19
IO12/B11
17
IO13/B12
15
IO15/B14
14
IO16/B15
12
I_12
23
I_23
27
I_27
IO1/D0/GOE1
IO2/D1
IO3/D2
IO4/D3
IO5/D4
IO6/D5
IO7/D6
IO8/D7
IO9/D8
IO10/D9
IO11/D10
IO12/D11
IO13/D12
IO14/D13IO14/B13
IO15/D14
IO16/D15
I_62
I_73
I_77
87
86
85
84
81
80
79
78
72
71
70
69
67
6616
65
64
62
73
77
NC_SLV_CPLD_87
NC_SLV_CPLD_86
NC_SLV_CPLD_85
NC_SLV_CPLD_84
NC_SLV_CPLD_79
NC_SLV_CPLD_78
NC_SLV_CPLD_72
NC_SLV_CPLD_71
NC_SLV_CPLD_69
NC_SLV_CPLD_73
NC_SLV_CPLD_77
BMC_PROGRAM_N
VID_SECURITY_BLANK_N_R
STORAGE_ADAPTER_PRES_N
SHIFTY_BMC_DATA_UP_R
SHIFTY_BMC_DATA_DN
SHIFTY_BMC_LATCH
SHIFTY_BMC_CLK
BACKPLANE_PRES_N
66,86,89
95
70,96
95
95
95
95
120
3
PG_TO_BMC_VDD3V_STBY_R
95
NC_SLV_CPLD_89
NC_SLV_CPLD_38
NC_SLV_CPLD_39
89
CLK0_I
38
CLK1_I
39
CLK2_I
88
CLK3_I
46
GND_1_46
57
GND_1_57
68
GND_1_68
82
GND_1_82
7
GND_0_7
18
GND_0_18
32
GND_0_32
96
GND_0_96
1
GND_1
26
GND_26
76
GND_76
SUB*_DR023
ISPM4064V 75T100C
TCK
TDI
TDO
TMS
VCC01_45
VCC01_63
VCC01_83
VCCO0_13
VCCO0_33
VCCO0_95
VCC_25
VCC_40
VCC_75GND_51
VCC_90
24
2
74
52
45
63
83
13
33
95
25
40
7551
90
CPLD_MASTER_TO_SLAVE_TDO
CPLD_SLAVE_TO_BANANA_TDO
CPLD_TCK
CPLD_TMS
136,138
138
136
136,138
+3.3V_AUX
REPLACE
3
X00_DT10009 SCH cpld jtag
4
ROOM = SLAVE
21
C9153
.1uF
16V-10%
21
C9150
C9156
.1uF
16V-10%
X01_DTXXXXX
BMC
+3.3V_AUX
REPLACE
PROGRAMMED PN
DR023
Configure CPLD pin for no pullup
Denotes Input Only Pin
MODULE:
DESC:
REV: OF
SEC
Denotes Pin Configured as Input
1uF 6.3V
1 2
21
1uF 6.3V
C9034
1 2
1uF 6.3V
C9036
1 2
C9035
.1uF
16V-10%
BLANK PN
DSK, PROG
P3890
NP397
Denotes Pin Configured as Output
Denotes Pin Configured as Input/Output
Denotes Open-drain
Denotes Schmitt Trigger Input
4
INC.
ROUND ROCK,TEXAS
TITLE
SCHEM,PLN,SV,PE_BULN
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
FP975
REV.
X01
SHEET
95 OF 14410/20/2006
DCBA
Page 96
A B C
CPLD misc pullups and pulldowns
for both master and slave CPLDs
+3.3V_AUX
REPLACE
D
1
86,138
86,138
115,138
114,138
MOD_BMC_SYS_PWRGOOD_ESM
SYSTEM_EN_BMC_N
V_P5_EN
V_P3P3_EN
+3.3V_AUX
REPLACE
R9577
1 2
+3.3V
REPLACE
8.2K-5%
R9578
1 2
R9552
8.2K-5%
1 2
R9553
4.7K-5%
1 2
4.7K-5%
138
MOD_BMC_DBG_JUMPER_N
R9579
NP
1 2
8.2K-5%
X
1 2
J_CPLD_DBG
24,138
29,138
70,138
71,138
72,138
NH_MRST_0_N
PEX_PERST_N
SAS_PERST_N
RISER1_PERST_N
RISER2_PERST_N
R9538
+3.3V_AUX
REPLACE
1K-1%
1 2
R9537
1 2
1K-1%
R9534
1 2
+3.3V
REPLACE
1K-1%
R9535
1 2
1K-1%
R9536
1 2
1
1K-1%
2
51,55,66-68,86,138
51,55,66-68,86,138
51,55,66-68,86,138
51,55,66-68,86,138
51,55,66-68,86,138
51,138
51,138
51,138
51,138
29,138
was "other" 2.5V symbol
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
LPC_LFRAME_N
MOD_SH_GEVENT6
MOD_SH_GEVENT7
MOD_SH_GEVENT12
MOD_SH_GEVENT13
PEX_PROCMON
R9554
1 2
R9555
4.7K-5%
1 2
R9556
4.7K-5%
+2.5V
REPLACE
1 2
R9557
4.7K-5%
1 2
R9558
4.7K-5%
1 2
4.7K-5%
R9562
1 2
R9563
4.7K-5%
1 2
R9564
4.7K-5%
1 2
R9561
4.7K-5%
1 2
R9912
4.7K-5%
1 2
+3.3V
REPLACE
4.7K-5%
66,70
59,66
28,138
28,138
28,138
28,138
28,138
28,138
28,138
28,138
71,138
CDROM_PRES_N
FLOPPY_PRES_N
PEX_LANE_GOOD_0_N
PEX_LANE_GOOD_3_N
PEX_LANE_GOOD_4_N
PEX_LANE_GOOD_7_N
PEX_LANE_GOOD_8_N
PEX_LANE_GOOD_11_N
PEX_LANE_GOOD_12_N
PEX_LANE_GOOD_15_N
MOD_SB_RISER_1_REV
R9580
1 2
8.2K-5%
R9581
1 2
8.2K-5%
R9585
1 2
8.2K-5%
R9586
1 2
8.2K-5%
R9587
1 2
8.2K-5%
R9588
1 2
8.2K-5%
R9592
1 2
8.2K-5%
R9591
1 2
8.2K-5%
R9590
1 2
8.2K-5%
R9589
1 2
8.2K-5%
+3.3V
REPLACE
R5060
1 2
2
20K-5%
3
53,138
51,138
51,138
25,138
20,138
25,138
51,138
53,138
SH_LDTSTOP_CPLD_N
RESET_SB_N
SYSTEM_PWRGOOD_SH
SYSTEM_PWRGOOD_NH
RESET_HDT_N
NH_RST_N
RESET_CF9_N
SB_PCI_RST_N
R9566
1 2
NP
R9532
4.7K-5%
X
NP
21
R9541
1K-1%
1 2
X
NP
2.7K-5%
R9542
X
21
NP
R9543
2.7K-5%
X
21
2.7K-5%
R9567
1 2
NP
R9533
4.7K-5%
X
+5V
REPLACE
1K-1%
1 2
R9568
1 2
R9569
4.7K-5%
1 2
4.7K-5%
X00_DT11505 SCH
X00_DT9908 SCH add pullup
+3.3V
REPLACE
ROOM = SLAVE
note: yes, this is a stuff option
119,143
117,143
142,143
141,143
V_VCORE_CPU1_PG
V_VCORE_CPU2_PG
V_VCORE_CPU1_NB_PG
V_VCORE_CPU2_NB_PG
R9560
1 2
R9559
1 2
R10073
4.7K-5%8.2K-5%
1 2
R10074
1 2
4.7K-5%
70,95
X00_DT11173 SCH removed lvl buffering circuit
STORAGE_ADAPTER_PRES_N
R9593
1 2
8.2K-5%
3
4
SYSTEM_PWRGOOD_CPU2
18
SYSTEM_PWRGOOD_CPU1
14
CPU2_LDTSTOP_N
18
CPU1_LDTSTOP_N
14
RST_CPU2_N
18
RST_CPU1_N
14
R9899
1 2
100-1%
R9901
1 2
100-1%
R9903
1 2
100-1%
X00_DT10315 SCH
R9898
1 2
100-1%
R9900
1 2
100-1%
R9902
1 2
100-1%
SYSTEM_PWRGOOD_CPU2_R
SYSTEM_PWRGOOD_CPU1_R
CPU2_LDTSTOP_R_N
CPU1_LDTSTOP_R_N
RST_CPU2_R_N
RST_CPU1_R_N
138
138
138
138
138
138
ROOM = BANANA
R10087
1 2
R10086
8.2K-5% 4.7K-5%
1 2
R10085
1 2
R10084
8.2K-5% 4.7K-5%
1 2
8.2K-5%
138,143
138,143
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
V_VCORE_CPU1_COMBO_PG
V_VCORE_CPU2_COMBO_PG
+3.3V
REPLACE
R10076
1 2
TITLE
DWG NO.
DATE
R10075
4.7K-5%
1 2
4.7K-5%
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
OMNIVU
SEC
4
REV.
X01
96 OF 14410/20/2006
C
DBA
Page 97
A B C
D
1
1
2
TABLE OF CONTENTS
Page 1. - Title Page
2
Page 2. - RN50 PCI Interface
Page 3. - Strapping Options
Page 4. - Video Memory
Page 5. - RN50 Power Blocks
Page 6. - Video Module Voltage Circuit
Page 7. - Revision History
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
VIDEO CONTROLLER
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 97 OF 144
DCBA
VID
71
4
Page 98
A B C
U_ATI
+3.3V
REPLACE
D
1
2
NOTE: Video Idsel is change to ad20 to be compatable with Fat Tire/Guiness BIOS
Q1799
3
D
1
G
53,98
PCI32_AD20
DT10115_change idsel to ad20_jd
+12V
REPLACE
R4946
1 2
Q1800
4.7K-5%
D
3
1
G
S
2
66
DISABLE_VIDEO
2N7002
NOTE: In fat tire video reset is controlled via CPLD, CPLD has SB PCI reset as an input
+3.3V
REPLACE
2
S
MOD_VID_ISO_IDSEL
2N7002
R4672
1 2
8.2K-5%
Q1801
D
1
G
S
2N7002
53
53
53
53
53
R4664
1 2
MOD_VID_IDSEL
98
100-1%
3
2
98
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53,98
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
138
53
53
53
53
53
53
53
53
49
MOD_VID_PCI32_SERR_N
98
PCI32_AD0
PCI32_AD1
PCI32_AD2
PCI32_AD3
PCI32_AD4
PCI32_AD5
PCI32_AD6
PCI32_AD7
PCI32_AD8
PCI32_AD9
PCI32_AD10
PCI32_AD11
PCI32_AD12
PCI32_AD13
PCI32_AD14
PCI32_AD15
PCI32_AD16
PCI32_AD17
PCI32_AD18
PCI32_AD19
PCI32_AD20
PCI32_AD21
PCI32_AD22
PCI32_AD23
PCI32_AD24
PCI32_AD25
PCI32_AD26
PCI32_AD27
PCI32_AD28
PCI32_AD29
PCI32_AD30
PCI32_AD31
PCI32_CBE0_N
PCI32_CBE1_N
PCI32_CBE2_N
PCI32_CBE3_N
CK_33M_VIDEO
PLT_RST_VID_N
PCI32_PREQ3_N
PCI32_GNT3_N
PCI32_PAR
PCI32_STOP_N
PCI32_DEVSEL_N
PCI32_TRDY_N
PCI32_IRDY_N
PCI32_FRAME_N
PCIIRQ_VIDEO
MOD_VID_IDSEL
NC_MOD_VID_PCI32_VREF
AB21
AA21
Y21
AB20
AA20
Y20
AB19
Y19
AB18
AA18
Y18
AB17
AA17
Y17
AB16
AA16
Y13
AA12
Y12
AB11
AA11
Y11
AB10
AA10
Y9
AB8
AA8
Y8
AB7
AA7
Y7
AA6
AA19
AB15
AA13
AA9
Y16
AB5
AB14
Y5
AA15
AA5
Y15
AA14
AB13
Y14
W18
Y6
Y10
W5
AD_0
AD_1
AD_2
AD_3
AD_4
AD_5
AD_6
AD_7
AD_8
AD_9
AD_10
AD_11
AD_12
AD_13
AD_14
AD_15
AD_16
AD_17
AD_18
AD_19
AD_20
AD_21
AD_22
AD_23
AD_24
AD_25
AD_26
AD_27
AD_28
AD_29
AD_30
AD_31
C/BE0
C/BE1
C/BE2
C/BE3
PCICLK
RESET
REQ
GNT
PAR
STOP
DEVSEL
TRDY
IRDY
FRAME
INTROUT
SERR
IDSEL
NC
PCI
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
LCDDATA_0
LCDDATA_1
LCDDATA_2
LCDDATA_3
LCDDATA_4
LCDDATA_5
LCDDATA_6
LCDDATA_7
LCDDATA_8
LCDDATA_9
LCDDATA_10
LCDDATA_11
LCDDATA_12
LCDDATA_13
LCDDATA_14
LCDDATA_15
LCDDATA_16
LCDDATA_17
EXT TMDS/GPIO/ROM
LCDDATA_18
LCDDATA_19
LCDDATA_20
LCDDATA_21
LCDDATA_22
LCDDATA_23
LCDCNTL_0
LCDCNTL_1
LCDCNTL_2
LCDCNTL_3
LCDVDDR4SEL
A12
C11
B11
A11
C10
B10
A10
C9
B9
A9
C8
B8
A8
C7
B7
C20
A19
B19
C19
A18
B18
C18
A17
B17
C17
A16
B16
C16
A15
B15
C15
A14
B14
C14
A13
B13
C13
B12
C12
B21
C21
A20
B20
D15
F22
R
G21
G
G22
B
MOD_VID_GPIO0
MOD_VID_GPIO1
MOD_VID_GPIO2
MOD_VID_GPIO3
MOD_VID_GPIO4
MOD_VID_GPIO5
MOD_VID_GPIO6
MOD_VID_GPIO7
MOD_VID_GPIO8
99
99
99
99
99
99
99
99
99
MOD_VID_GPIO9
MOD_VID_GPIO10
MOD_VID_GPIO11
MOD_VID_GPIO12
MOD_VID_GPIO13
MOD_VID_GPIO14
99
99
99
99
99
NC_MOD_VID_LCDDATA_0
NC_MOD_VID_LCDDATA_1
NC_MOD_VID_LCDDATA_2
NC_MOD_VID_LCDDATA_3
NC_MOD_VID_LCDDATA_4
NC_MOD_VID_LCDDATA_5
NC_MOD_VID_LCDDATA_6
NC_MOD_VID_LCDDATA_7
NC_MOD_VID_LCDDATA_8
NC_MOD_VID_LCDDATA_9
NC_MOD_VID_LCDDATA_10
NC_MOD_VID_LCDDATA_11
NC_MOD_VID_LCDDATA_12
NC_MOD_VID_LCDDATA_13
NC_MOD_VID_LCDDATA_14
NC_MOD_VID_LCDDATA_15
NC_MOD_VID_LCDDATA_16
NC_MOD_VID_LCDDATA_17
NC_MOD_VID_LCDDATA_18
NC_MOD_VID_LCDDATA_19
NC_MOD_VID_LCDDATA_20
NC_MOD_VID_LCDDATA_21
NC_MOD_VID_LCDDATA_22
NC_MOD_VID_LCDDATA_23
NC_MOD_VID_LCDCNTL_0
NC_MOD_VID_LCDCNTL_1
NC_MOD_VID_LCDCNTL_2
NC_MOD_VID_LCDCNTL_3
VID_RED
VID_GREEN
VID_BLUE
105
105
105
R4966
1 2
8.2K-5%
1
2
3
98
98
98
MOD_VID_PCI32_SERR_N
MOD_VID_CRT2_DDCDAT
MOD_VID_CRT2_DDCCLK
R4194
1 2
8.2K-5%
R4967
1 2
8.2K-5%
R4968
1 2
8.2K-5%
C2151
1 2
10pF
50V-5%
C2152
1 2
10pF
50V-5%
R3927
1 2
1M-5%
X8
VID_HSYNC
VID_VSYNC
VID_RSET
I2C_VIDDDC_SDA
I2C_VIDDCC_SCL
RAC_VID_RED
RAC_VID_GREEN
RAC_VID_BLUE
106
106
105
105
105
92,105
92,105
92,105
3
RSET
R2
G2
B2
T22
U22
F21
T21
T20
K21
L22
L21
HSYNC
VSYNC
DAC1DAC2
VGADDCDAT
VGADDCCLK
MOD_VID_XTALIN
27MHz
1 2
MOD_VID_XTALOUT
U21
V21
XTALIN
XTALOUT
CLK
RAC_VID_HSYNC
RAC_VID_VSYNC
92
92
MOD_VID_R2SET
MOD_VID_CRT2_DDCDAT
MOD_VID_CRT2_DDCCLK
R3855
1 2
499-1%
98
98
MOD_VID_TESTEN
MOD_VID_TEST_MCLK
MOD_VID_TEST_YCLK
V22
TESTEN
Y3
TEST_MCLK
AA3
TEST_YCLK
H2SYNC
V2SYNC
R2SET
CRT2DDCDAT
CRT2DDCCLK
P21
P20
K22
R21
R20
4
1K-1%
R3834
R3856
1 2
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
0-5%
R3857
1 2
0-5%
1 2
RN50_V1P2
GRAPHICS CONTROLLER
HETERO 1 OF 4
TITLE
DWG NO.
DATE
ROOM = VIDEO
MODULE:
DESC:
REV: OF
VIDEO CONTROLLER
SEC
INC.
ROUND ROCK,TEXAS
SCHEM,PLN,SV,PE_BULN
REV.
FP975
SHEET
X01
10/20/2006 98 OF 144
DCBA
VID
72
4
Page 99
A B C
D
1
2
RN50 Strapping Options
GPIO VALUE
GPIO(13:11)
GPIO(8) 0 ID_ENABLED
000
001
010
011
100
101
110
111
SELECTION DESCRIPTION
X
X
No ROM
reserved
reserved
reserved
reserved
Atmel AT25F1024
ST Micro M25P10/P05
NexFlash NX25F011B/15B
MOD_VID_GPIO0
98
MOD_VID_GPIO1
98
MOD_VID_GPIO2
98
R5203
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
X
R3957
R5204
X
R3956
R5205
X
R3955
NP*
NP*
NP*
+3.3V
REPLACE
98
98
MOD_VID_GPIO7
MOD_VID_GPIO8
R5210
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
X
R3970
R5211
X
R3967
NP*
NP*
+3.3V
REPLACE
1
2
3
ID_DISABLED1
00
01
10
11
01
10
11
0
1
0
1
X
VGA_DISABLED
PCI_66MHz
X
X
X00
PCI_33MHz ( PLL Bypass )
X1_CLKSKEW
0 tap delay
1 tap delay
2 tap delay
3 tap delay
PCIFBSKEW
0 tap delay
1 tap delay
2 tap delay
3 tap delay
GPIO(7) VGA_ENABLED
GPIO(4)
GPIO(3:2)
GPIO(1:0)
MOD_VID_GPIO3
98
MOD_VID_GPIO4
98
MOD_VID_GPIO5
98
MOD_VID_GPIO6
98
8.2K-5%
R5206
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
X
R3953
R3960
R5207
X
R5208
X
R3951
R5209
X
R3950
NP*
NP*
NP*
NP*
98
98
98
98
98
MOD_VID_GPIO10
MOD_VID_GPIO11
MOD_VID_GPIO12
MOD_VID_GPIO13
MOD_VID_GPIO14
R5212
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
8.2K-5%
1 2
X
R3965
R5213
X
R3964
R5214
X
R3954
R5215
X
R3972
R5216
X
R3966
NP*
NP*
NP*
NP*
3
NP*
4
Note: Only GPIO used for strapping are listed in the table.
GPIO14, 10, 9, 6 and 5 are not used in device configuration.
8.2K-5%
TITLE
ROOM = VIDEO
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SEC
VID
VIDEO CONTROLLER
73
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
SCHEM,PLN,SV,PE_BULN
FP975
SHEET
DCBA
REV.
X01
99 OF 14410/20/2006
Page 100
A B C
D
1
2
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
MOD_VID_MEM_DQ0_R
MOD_VID_MEM_DQ1_R
MOD_VID_MEM_DQ2_R
MOD_VID_MEM_DQ3_R
MOD_VID_MEM_DQ4_R
MOD_VID_MEM_DQ5_R
MOD_VID_MEM_DQ6_R
MOD_VID_MEM_DQ7_R
MOD_VID_MEM_DQ8_R
MOD_VID_MEM_DQ9_R
MOD_VID_MEM_DQ10_R
MOD_VID_MEM_DQ11_R
MOD_VID_MEM_DQ12_R
MOD_VID_MEM_DQ13_R
MOD_VID_MEM_DQ14_R
MOD_VID_MEM_DQ15_R
A5
A6
C5
A4
C4
A2
A3
D3
E1
F2
G3
F3
E3
D2
C1
B1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
U_ATI
MEMORY INTERFACE
MEM_VREFD
MEM_VREFS
MEMVMODE_0
MEMVMODE_1
RN50_V1P2
GRAPHICS CONTROLLER
HETERO 2 OF 4
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
DQM0
DQM1
QS0
QS1
ODT
RAS
CAS
WE
CS0
CKE
ROMCS
CLK1
CLK1
MEMTEST
P1
N1
P2
T3
R1
R3
P3
M1
M3
U3
T1
T2
M2
L3
L1
N3
C3
G1
B4
D1
H1
K3
J3
J1
K2
K1
A7
H2
H3
AA2
Y2
V3
V2
AA1
MOD_VID_MEM_A0_R
MOD_VID_MEM_A1_R
MOD_VID_MEM_A2_R
MOD_VID_MEM_A3_R
MOD_VID_MEM_A4_R
MOD_VID_MEM_A5_R
MOD_VID_MEM_A6_R
MOD_VID_MEM_A7_R
MOD_VID_MEM_A8_R
MOD_VID_MEM_A9_R
MOD_VID_MEM_A10_R
MOD_VID_MEM_A11_R
MOD_VID_MEM_A12_R
100
100
100
100
100
100
100
100
100
100
100
100
100
NC_MOD_VID_MEM_A13
MOD_VID_MEM_A14_R
MOD_VID_MEM_A15_R
MOD_VID_MEM_DQM0_R
MOD_VID_MEM_DQM1_R
MOD_VID_MEM_QS0_R
MOD_VID_MEM_QS1_R
100
100
100
100
100
100
MOD_VID_MEM_ODT_R
MOD_VID_MEM_RAS_R_N
MOD_VID_MEM_CAS_R_N
MOD_VID_MEM_WE_R_N
MOD_VID_MEM_CS_R_N
MOD_VID_MEM_CKE_R
100
100
100
100
100
NC_MOD_VID_ROMCSB
MOD_VID_CK_250M_VIDMEM_R_DP
MOD_VID_CK_250M_VIDMEM_R_DN
MOD_VID_P0V9_VREF_MEMD
MOD_VID_P0V9_VREF_MEMS
MOD_VID_MEM_VMODE0
MOD_VID_MEM_VMODE1
MOD_VID_MEMTEST
2
R5171
1
A13 is not hooked up since it is not
needed for any memory size used
in the foreseeable future
8Mx16, 16Mx16, 32Mx16 and 64Mx16 parts
don't require the use of A13
100
100
102
102
R3899
45.3 -1%
1 2
21
C3183
.1uF
R8745
1 2
0-5%
4.7K-5%
21
C3182
16V-10%
.1uF
MOD_VID_MEM_ODT
R3898
1 2
4.7K-5%
DT10091_swap signals to assist layout_jd
16V-10%
21
C3181
.1uF
16V-10%
21
C3180
100
MOD_VID_V_P1P8_VIDEO
.1uF
16V-10%
21
C3179
MOD_VID_MEM_TERM
100
.1uF
16V-10%
MOD_VID_V_P1P8_MEM_VIDEO
21
C3178
.1uF
16V-10%
101,102,134
R8739
10-1%
21
100,101,134
100,101,134
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
R8736
R8737
102
MOD_VID_MEM_ODT
MOD_VID_CK_250M_VIDMEM_DP
MOD_VID_CK_250M_VIDMEM_DN
MOD_VID_MEM_CKE
MOD_VID_MEM_CS_N
MOD_VID_MEM_RAS_N
MOD_VID_MEM_CAS_N
MOD_VID_MEM_WE_N
MOD_VID_MEM_DQM0
MOD_VID_MEM_A14
MOD_VID_MEM_A15
NC_U1070_L1
MOD_VID_MEM_A0
MOD_VID_MEM_A1
MOD_VID_MEM_A2
MOD_VID_MEM_A3
MOD_VID_MEM_A4
MOD_VID_MEM_A5
MOD_VID_MEM_A6
MOD_VID_MEM_A7
MOD_VID_MEM_A8
MOD_VID_MEM_A9
MOD_VID_MEM_A10
MOD_VID_MEM_A11
MOD_VID_MEM_A12
MOD_VID_MEM_DQM1
MOD_VID_MEM_QS1
MOD_VID_MEM_UDQS_N
MOD_VID_V_P1P8_MEM_VIDEO
4.99K-1%4.99K-1%
1 2
21
1 2
C8754
.1uF
16V-10%
MOD_VID_P0V9_VREF_MEM
U1070
K9
ODT
J8
CK
K8
CK_N
K2
CKE
L8
CS_N
K7
RAS_N
L7
CAS_N
K3
WE_N
F3 F7
LDM LDQS
L2
BA0
L3
BA1
L1
NC
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10/AP
P7
A11
R2
A12
B3
UDM
B7
UDQS
A8
UDQS_N
A1
VDD_A1
E1
VDD_E1
J9
VDD_J9
M9
VDD_M9
R1
VDD_R1
J1
VDDL
A9
VDDQ_A9
C1
VDDQ_C1
C3
VDDQ_C3
C7
VDDQ_C7
C9
VDDQ_C9
E9
VDDQ_E9
G1
VDDQ_G1
G3
VDDQ_G3
G7
VDDQ_G7
G9
VDDQ_G9
J2
VREF
NC_A2
NC_E2
NC_R3
NC_R7
NC_R8
LDQS_N
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VSS_A3
VSS_E3
VSS_J3
VSS_N1
VSS_P9
VSSDL
VSSQ_A7
VSSQ_B2
VSSQ_B8
VSSQ_D2
VSSQ_D8
VSSQ_E7
VSSQ_F2
VSSQ_F8
VSSQ_H2
VSSQ_H8
A2
E2
R3
R7
R8
E8
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
A3
E3
J3
N1
P9
J7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
NC_MOD_VID_MEM_NC_A2
NC_MOD_VID_MEM_NC_E2
NC_MOD_VID_MEM_NC_R3
NC_MOD_VID_MEM_NC_R7
NC_MOD_VID_MEM_NC_R8
MOD_VID_MEM_LDQS_N
MOD_VID_MEM_QS0
R8740
10-1%
MOD_VID_MEM_DQ0
MOD_VID_MEM_DQ1
MOD_VID_MEM_DQ2
MOD_VID_MEM_DQ3
MOD_VID_MEM_DQ4
MOD_VID_MEM_DQ5
MOD_VID_MEM_DQ6
MOD_VID_MEM_DQ7
MOD_VID_MEM_DQ8
MOD_VID_MEM_DQ9
MOD_VID_MEM_DQ10
MOD_VID_MEM_DQ11
MOD_VID_MEM_DQ12
MOD_VID_MEM_DQ13
MOD_VID_MEM_DQ14
MOD_VID_MEM_DQ15
100
MOD_VID_MEM_TERM
21
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
1
100
2
3
4
MOD_VID_MEM_DQM1_R
100
MOD_VID_MEM_DQM0_R
100
MOD_VID_MEM_QS1_R
100
MOD_VID_MEM_QS0_R
100
MOD_VID_MEM_CKE_R
100
MOD_VID_MEM_CS_R_N
100
MOD_VID_MEM_RAS_R_N
100
MOD_VID_MEM_CAS_R_N
100
MOD_VID_MEM_WE_R_N
100
R3928
1 2
22-5%
R3929
1 2
22-5%
R3930
1 2
22-5%
R3931
1 2
22-5%
R3858
1 2
22-5%
R3859
1 2
22-5%
R3860
1 2
22-5%
R3861
1 2
22-5%
R3862
1 2
22-5%
MOD_VID_MEM_DQM1
MOD_VID_MEM_DQM0
MOD_VID_MEM_QS1
MOD_VID_MEM_QS0
MOD_VID_MEM_CKE
MOD_VID_MEM_CS_N
MOD_VID_MEM_RAS_N
MOD_VID_MEM_CAS_N
MOD_VID_MEM_WE_N
This pin is used to control the variable
drive capability of the memory section
I/Os. It is connected to memory VSS
through a 45 ohm +/- 1% resistor.
100
100
100
100
100
100
100
100
100
MOD_VID_CK_250M_VIDMEM_R_DP
100
MOD_VID_CK_250M_VIDMEM_R_DN
100
R3863
1 2
22-5%
R3864
1 2
22-5%
MOD_VID_CK_250M_VIDMEM_DP
R4921
1 2
49.9-1%
C2161
21
.01uF
16V-10%
R4922
1 2
49.9-1%
MOD_VID_CK_250M_VIDMEM_DN
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
100
100
RN82
MOD_VID_MEM_A2_R
100
MOD_VID_MEM_A1_R
100
MOD_VID_MEM_A0_R
100
MOD_VID_MEM_A3_R
100
1
2
3
4
22 Ohm
8
7
6
5
MOD_VID_MEM_A2
MOD_VID_MEM_A1
MOD_VID_MEM_A0
MOD_VID_MEM_A3
RN85
MOD_VID_MEM_A12_R
100
NC_MOD_VID_RN2 NC_MOD_VID_RN7
MOD_VID_MEM_A14_R
100
MOD_VID_MEM_A15_R
100
1
2
3
4
22 Ohm
8
7
6
5
MOD_VID_MEM_A12
MOD_VID_MEM_A14
MOD_VID_MEM_A15
R5510
MOD_VID_MEM_A4_R
100
1 2
MOD_VID_MEM_A4
22-5%
R5511
MOD_VID_MEM_A5_R
100
1 2
MOD_VID_MEM_A5
22-5%
R5513
MOD_VID_MEM_A6_R
100
1 2
MOD_VID_MEM_A6
22-5%
R5512
MOD_VID_MEM_A7_R
100
1 2
MOD_VID_MEM_A7
22-5%
R5517
MOD_VID_MEM_A8_R
100
1 2
MOD_VID_MEM_A8
22-5%
R5516
MOD_VID_MEM_A9_R
100
1 2
MOD_VID_MEM_A9
22-5%
R5515
MOD_VID_MEM_A10_R
100
1 2
MOD_VID_MEM_A10
22-5%
R5514
MOD_VID_MEM_A11_R
100
1 2
MOD_VID_MEM_A11
22-5%
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
K4N51163QC - 84 FBGA
32Mx16 DDR2-533 SDRAM
MOD_VID_MEM_DQ3_R
100
MOD_VID_MEM_DQ4_R
100
MOD_VID_MEM_DQ1_R
100
MOD_VID_MEM_DQ6_R
100
MOD_VID_MEM_DQ11_R
100
MOD_VID_MEM_DQ12_R
100
MOD_VID_MEM_DQ9_R
100
MOD_VID_MEM_DQ14_R
100
MOD_VID_MEM_DQ15_R
100
MOD_VID_MEM_DQ8_R
100
MOD_VID_MEM_DQ13_R
100
MOD_VID_MEM_DQ10_R
100
MOD_VID_MEM_DQ7_R
100
MOD_VID_MEM_DQ0_R
100
MOD_VID_MEM_DQ5_R
100
MOD_VID_MEM_DQ2_R
100
1
RN87
2
3
4
33-5%
1
RN89
2
3
4
33-5%
1
RN88
2
3
4
33-5%
1
RN86
2
3
4
33-5%
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
MOD_VID_MEM_DQ3
MOD_VID_MEM_DQ4
MOD_VID_MEM_DQ1
MOD_VID_MEM_DQ6
MOD_VID_MEM_DQ11
MOD_VID_MEM_DQ12
MOD_VID_MEM_DQ9
MOD_VID_MEM_DQ14
MOD_VID_MEM_DQ15
MOD_VID_MEM_DQ8
MOD_VID_MEM_DQ13
MOD_VID_MEM_DQ10
MOD_VID_MEM_DQ7
MOD_VID_MEM_DQ0
MOD_VID_MEM_DQ5
MOD_VID_MEM_DQ2
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
3
ROOM = VIDEO
MODULE:
DESC:
REV: OF
VIDEO CONTROLLER
SEC
VID
74
4
INC.
TITLE
SCHEM,PLN,SV,PE_BULN
DWG NO.
FP975
DATE
ROUND ROCK,TEXAS
REV.
X01
SHEET
10/20/2006 100 OF 144
DCBA
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