MSI MS-9181 Schematics

A B C

Dell Controlled Print

D

REVISIONS

1

2

3

SUB=NP Always no-pop SUB=NP0 Populate only for debug

BOM options

0 = 5708 Production 1 = 5708 development

2 = LOM2 5721J 3 = CTPM Sinosun Populated

4 = ROW TPM ST Populated 6 = LOM1 5721J

7 = Adds London Parts 8 = Adds Berlin Parts 9 = Adds System Test debug components (non-production)

BOM Instructions

Builds 0, 1, and 2 are leveraged from Montreal builds 7 and 8 are specfic to london/berlin

Build 3 is specific to China TPM (CTPM) In order to build a proper BOM, you must run a combo build To build london for production (ROW TPM), use builds 0, 4 and 7

To build london for production (CTPM), use builds 0, 3 and 7 To build a 5708 debug build for london (ROW TPM) use builds 1,4 and 7

To build Berlin for production (ROW TPM), use builds 0,4 and 8 To build Berlin for production (CTPM), use builds 0, 3 and 8

To build a 5708 debug build for berlin (ROW TPM) use builds 1,4 and 8 Only add build 5 if you want microview parts

London system test build (With ROW TPM) is a combined build of 0479 London system test build (With CTPM) is a combined build of 0379

Berlin system test build (With ROW TPM) is a combined build of 0489 Berlin system test build (With CTPM) is a combined build of 0389

REV

X00

PNR724925

229098 09/07/2007

INITIAL PROTOTYPE RELEASE INITIAL PRODUCTION RELEASE

DESCRIPTIONECO DATE

TABLE OF CONTENTS

Page 1-11. Page 12-15. Page 16-19. Page 20-21. Page 22-29. Page 30-31. Page 32-39. Page 40-43.

Page 45. Page 46-47.

Page 59. Page 60. Page 61. Page 62. Page 63. Page 64-65. Page 66. Page 67. Page 68. Page 69. Page 70. Page 71-73. Page 74-79. Page 81-82. Page 83-84. Page 85. Page 86-88 Page 89. BMC - temp sensors/debug port Page 90. Page 91. Page 92. Page 93. Page 80, 94. Page 95. Page 96. Page 97-103. Page 104-107. Page 108-119. Page 120. Page 121. Page 122. Page 123. Page 124. Page 125. Impedance Coupons (48SE, 50SE, 75D, 85D)

Page 126-127. Page 128-129. Page 130-135. Page 136.

BLOCK DIAGRAMS Processor 0 Processor 1 XDP0 and GTL Translation Blackford MCH CPU decoupling FB DIMMs (8) Blank FBD ResetPage 44. Clock Generator: CK410B Clock buffer: DB1200 Clock buffer: DB800Page 48. ESB2Page 49-57. USB Connectors and ButtonsPage 58. Floppy Connector Blank (LAI Connectors if there is room) SATA Connectors Voltage Doubler and Intusion Detect ESB2 I2C MUX and Header Blank Super I/O TPM, PCI Reset, Jumpers Firmware Hub Coin Cell Battery Sideplane (PERC5/I, Control Panel, IDE) Risers (3) Blank, PME to Wake on Page 77 Broadcom LOM 1 Broadcom LOM 2 LOM power switch BMC

COM port BMC I2C MUX and Header San Marco Connectors (Mgmt, MII) Rear ID, Cyclops Fan Connectors and Tach BMC - CPLD, master and slave OmniIVu- CPLD and header Video RN50 Video Output VRDs Power Connectors Power LED Power sequencing and VRD enable chaining Ground Clips Impedance Coupons (90D, 95D, 100D)

System powergood and Reset buffering Second source CPLDs Blank, strappings, SATA, OV/UV +1.8V Current sense

APPROVED

JINTO JOSE02/25/2007 JINTO JOSEA00

1

2

3

4

EXPORT RESTRICTION:

THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.

Berlin MLK PWA (CTPM): XR362

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

M2LB_Change_Note: 1 - 11, 13, 17, 24, 28, 29, 32 - 43,

45 - 51, 53, 54, 58 - 61, 64 - 66, 68, 70 - 81, 83, 86 - 88, 89, 90, 94, 95, 106, 108 - 128

PROPRIETARY NOTE

London MLK PWA (ROW): HX368London MLK PWA (CTPM): RU411 Berlin MLK PWA (ROW): TT740 PWB: JN309 SCH: HX601 London MLK ASSY: WY108 Berlin MLK ASSY: CR344

DRAWN

DESIGNED

CHECKED

APPROVED

RELEASED

SHOBHIT CHAHAR SHOBHIT CHAHAR JINTO N JOSE JINTO N JOSE

04/04/2007 04/04/2007 06/15/2007 06/15/2007

A CURRENT ISSUE OF THIS DRAWING MUST INCLUDE A COPY OF THE FOLLOWING ECO'S: ECO

ECO ECO ECO ECO ECO ECO ECO

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

DATE DATE DATE DATE DATE DATE DATE DATE

INC.

ROUND ROCK,TEXAS

HX601

DATE

SHEET

9/7/2007 1 OF 136

09/07/2007229098

4

REV.

A00

DCBA

A B C

D

1

2

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

P19_DT9214_rt_update_block_diagram

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

9/7/2007 2 OF 136

DCBA

4

A00

A B C

D

1

2

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

P19_DT9214_rt_update_block_diagram

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

9/7/2007 3 OF 136

DCBA

4

A00

A B C

D

1

2

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

9/7/2007 4 OF 136

DCBA

4

A00

A B C

D

1

2

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

9/7/2007 5 OF 136

DCBA

4

A00

A B C

D

1

2

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

9/7/2007 6 OF 136

DCBA

4

A00

A B C

D

1

2

3

4

Powerup Timing- VRDs

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

9/7/2007 7 OF 136

DCBA

4

A00

A B C

D

1

2

3

4

Power up Timing - Chipset

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

9/7/2007 8 OF 136

DCBA

4

A00

A B C

D

1

2

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

9/7/2007 9 OF 136

DCBA

4

A00

A B C

D

1

2

3

4

JTAG Block Diagram

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 10 OF 136

DCBA

4

A B C

D

1

2

3

4

NOTE: this is not completely up to date

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 11 OF 136

DCBA

4

1

2

3

A B C

J_CPU0

MOD_MCH_FSB0_A16_N

22

MOD_MCH_FSB0_A15_N

22

MOD_MCH_FSB0_A14_N

22

MOD_MCH_FSB0_A13_N

22

MOD_MCH_FSB0_A12_N

22

MOD_MCH_FSB0_A11_N

22

MOD_MCH_FSB0_A10_N

22

MOD_MCH_FSB0_A9_N

22

MOD_MCH_FSB0_A8_N

22

MOD_MCH_FSB0_A7_N

22

MOD_MCH_FSB0_A6_N

22

MOD_MCH_FSB0_A5_N

22

MOD_MCH_FSB0_A4_N

22

MOD_MCH_FSB0_A3_N

22

MOD_MCH_FSB0_REQ_4_N

22

MOD_MCH_FSB0_REQ_3_N

22

MOD_MCH_FSB0_REQ_2_N

22

MOD_MCH_FSB0_REQ_1_N

22

MOD_MCH_FSB0_REQ_0_N

22

MOD_MCH_FSB0_ADSTB_0_N

22

MOD_MCH_FSB0_D15_N

22

MOD_MCH_FSB0_D14_N

22

MOD_MCH_FSB0_D13_N

22

MOD_MCH_FSB0_D12_N

22

MOD_MCH_FSB0_D11_N

22

MOD_MCH_FSB0_D10_N

22

MOD_MCH_FSB0_D9_N

22

MOD_MCH_FSB0_D8_N

22

MOD_MCH_FSB0_D7_N

22

MOD_MCH_FSB0_D6_N

22

MOD_MCH_FSB0_D5_N

22

MOD_MCH_FSB0_D4_N

22

MOD_MCH_FSB0_D3_N

22

MOD_MCH_FSB0_D2_N

22

MOD_MCH_FSB0_D1_N

22

MOD_MCH_FSB0_D0_N

22

MOD_MCH_FSB0_DBI_0_N

22

MOD_MCH_FSB0_DSTBN_0_N

22

MOD_MCH_FSB0_DSTBP_0_N

22

MOD_MCH_FSB0_D31_N

22

MOD_MCH_FSB0_D30_N

22

MOD_MCH_FSB0_D29_N

22

MOD_MCH_FSB0_D28_N

22

MOD_MCH_FSB0_D27_N

22

MOD_MCH_FSB0_D26_N

22

MOD_MCH_FSB0_D25_N

22

MOD_MCH_FSB0_D24_N

22

MOD_MCH_FSB0_D23_N

22

MOD_MCH_FSB0_D22_N

22

MOD_MCH_FSB0_D21_N

22

MOD_MCH_FSB0_D20_N

22

MOD_MCH_FSB0_D19_N

22

MOD_MCH_FSB0_D18_N

22

MOD_MCH_FSB0_D17_N

22

MOD_MCH_FSB0_D16_N

22

MOD_MCH_FSB0_DBI_1_N

22

MOD_MCH_FSB0_DSTBN_1_N

22

MOD_MCH_FSB0_DSTBP_1_N

22

W5

A16_N

V4

A15_N

V5

A14_N

U4

A13_N

U5

A12_N

T4

A11_N

U6

A10_N

T5

A9_N

R4

A8_N

M4

A7_N

L4

A6_N

L5

A5_N

P6

A4_N

M5

A3_N

J6

REQ_4_N

K6

REQ_3_N

M6

REQ_2_N

J5

REQ_1_N

K4

REQ_0_N

R6 AD5

ADSTB0_N ADSTB1_N

D11

D15_N

C12

D14_N

B12

D13_N

D8

D12_N

C11

D11_N

B10

D10_N

A11

D9_N

A10

D8_N

A7

D7_N

B7

D6_N

B6

D5_N

A5

D4_N

C6

D3_N

A4

D2_N

C5

D1_N

B4

D0_N

A8

DBI0_N

C8

DSTBN0_N

B9

DSTBP0_N

G15

D31_N

F15

D30_N

G14

D29_N

F14

D28_N

G13

D27_N

E13

D26_N

D13

D25_N

F12

D24_N

F11

D23_N

D10

D22_N

E10

D21_N

D7

D20_N

E9

D19_N

F9

D18_N

F8

D17_N

G9

D16_N

G11

DBI1_N

G12

DSTBN1_N

E12

DSTBP1_N

A35_N A34_N A33_N A32_N A31_N A30_N A29_N A28_N A27_N A26_N A25_N A24_N A23_N A22_N A21_N A20_N A19_N A18_N A17_N

D47_N D46_N D45_N D44_N D43_N D42_N D41_N D40_N D39_N D38_N D37_N D36_N D35_N D34_N D33_N D32_N

DBI2_N DSTBN2_N DSTBP2_N

D63_N D62_N D61_N D60_N D59_N D58_N D57_N D56_N D55_N D54_N D53_N D52_N D51_N D50_N D49_N D48_N

DBI3_N DSTBN3_N DSTBP3_N

INTEL LGA771 PINOUT

HETERO 2 OF 9

SILKSCREEN=CPU1

ADD*_PR288

AJ6 AJ5 AH5 AH4 AG5 AG4 AG6 AF4 AF5 AB4 AC5 AB5 AA5 AD6 AA4 Y4 Y6 W6 AB6

G22 D22 E22 G21 F21 E21 F20 E19 E18 F18 F17 G17 G18 E16 E15 G16 D19 G20 G19

B22 A22 A19 B19 B21 C21 B18 A17 B16 C18 B15 C14 C15 A14 D17 D20 C20 A16 C17

MOD_MCH_FSB0_A35_N MOD_MCH_FSB0_A34_N MOD_MCH_FSB0_A33_N MOD_MCH_FSB0_A32_N MOD_MCH_FSB0_A31_N MOD_MCH_FSB0_A30_N MOD_MCH_FSB0_A29_N MOD_MCH_FSB0_A28_N MOD_MCH_FSB0_A27_N MOD_MCH_FSB0_A26_N MOD_MCH_FSB0_A25_N MOD_MCH_FSB0_A24_N MOD_MCH_FSB0_A23_N MOD_MCH_FSB0_A22_N MOD_MCH_FSB0_A21_N MOD_MCH_FSB0_A20_N MOD_MCH_FSB0_A19_N MOD_MCH_FSB0_A18_N MOD_MCH_FSB0_A17_N

MOD_MCH_FSB0_ADSTB_1_N

MOD_MCH_FSB0_D47_N MOD_MCH_FSB0_D46_N MOD_MCH_FSB0_D45_N MOD_MCH_FSB0_D44_N MOD_MCH_FSB0_D43_N MOD_MCH_FSB0_D42_N MOD_MCH_FSB0_D41_N MOD_MCH_FSB0_D40_N MOD_MCH_FSB0_D39_N MOD_MCH_FSB0_D38_N MOD_MCH_FSB0_D37_N MOD_MCH_FSB0_D36_N MOD_MCH_FSB0_D35_N MOD_MCH_FSB0_D34_N MOD_MCH_FSB0_D33_N

MOD_MCH_FSB0_D32_N MOD_MCH_FSB0_DBI_2_N MOD_MCH_FSB0_DSTBN_2_N MOD_MCH_FSB0_DSTBP_2_N

MOD_MCH_FSB0_D63_N

MOD_MCH_FSB0_D62_N

MOD_MCH_FSB0_D61_N

MOD_MCH_FSB0_D60_N

MOD_MCH_FSB0_D59_N

MOD_MCH_FSB0_D58_N

MOD_MCH_FSB0_D57_N

MOD_MCH_FSB0_D56_N

MOD_MCH_FSB0_D55_N

MOD_MCH_FSB0_D54_N

MOD_MCH_FSB0_D53_N

MOD_MCH_FSB0_D52_N

MOD_MCH_FSB0_D51_N

MOD_MCH_FSB0_D50_N

MOD_MCH_FSB0_D49_N

MOD_MCH_FSB0_D48_N MOD_MCH_FSB0_DBI_3_N MOD_MCH_FSB0_DSTBN_3_N MOD_MCH_FSB0_DSTBP_3_N

22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22

22

22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22

22 22 22

22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22

22 22 22

Processor 0 heatsink retention modules

ST1

NC_MOD_MCH_ST1_1 NC_MOD_MCH_ST1_2

10

1 2 3 4 5 6 7 8 9

NC1 NC2 GND_V1 GND_V2 GND_V3 GND_V4 GND_V5 GND_V6 GND_V7 GND_V8

BRACKET RETENTION SUPPORT, GROUNDED

ADD1=ADD*_JC664

ADD2=ADD*_JC664

ADD3=ADD*_JC664

NOTE : heatsink retention clips needing a single trace to each pin, not solid

connection concern doesn't apply to the CPU HS brackets

Nocona-T Dempsy-T Dempsy/WoodcrestPlatform Change

requiredrequired

Use "LE" Blackford

Pull down reserved pin F6

Pull down MS_ID[1:0] to Vss

Isolate LL_ID[1:0]

Manually set VR loadline

required

optional

required required

required

Mechanical Parts on the following pages: 12, 16

Socket J part numbers:

DescriptionDell p/n

Y9236

P9381

Leaded Socket J - SKT,LGA,771P,G,SF,ZIF,SL,SM Vendors:

Foxconn PN: PE077107-1041-01 Tyco PN: 1747890-1

Lead-free socket J - SKT,LGA,771P,G,SF,ZIF,SL,SM Vendors:

Foxconn PN: PE077127-1041-01 Tyco PN: 1-1747890-1

D

CPU Heatsink

frame screws

ADD4=ADD*_RC078 ADD5=ADD*_RC078 ADD6=ADD*_RC078 ADD7=ADD*_RC078

1

CPU Heatsink

clip asm

ADD8=ADD*_H3668 ADD9=ADD*_H3668

2

No use LGA771Use LGA775

No use real blackford

No treat as reserved and leave pin No Connect

No revert back to POR

3

4

ROOM=PROC0

ECAD NOTE: Please put triangle pointing to pin1

CPU0_REG

NC_CPU0_REG_1 NC_CPU0_REG_2

1 2

COMMON NEG

REG07 A NGO COUPON TEST

ROOM=PROC0

PROCESSOR 0

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

HX601

SHEET

12 OF 1369/7/2007

DBA

CPUS,FSB,NB,XDP0,XDP1

SEC

REV.

A00

MCH

211

4

A B C

D

9-7-2007_16:36

1

2

3

13,117 13,117 13,117 13,117 13,117 13,117

13,117

15

15,17,21,54

NP

X

1 2

C8600

15,95,117,128

MLK: Routed to CPLD for CPU Identification

13,95,117,128

FSB0_VID_6 FSB0_VID_5 FSB0_VID_4 FSB0_VID_3 FSB0_VID_2 FSB0_VID_1

FSB0_VID_0

MOD_MCH_CPU0_BSEL_2

20

MOD_MCH_CPU0_BSEL_1

20

MOD_MCH_CPU0_BSEL_0

20

MOD_MCH_FSB0_GTLREF_DATA_CORE1

15

MOD_MCH_FSB0_GTLREF_ADD_CORE1

15

MOD_MCH_FSB0_GTLREF_DATA_CORE0

15

MOD_MCH_FSB0_GTLREF_ADD_CORE0

CPU_PWRGOOD

15 15 15

100pF

50V-5%

15 15 15 15 15

13,117 13,117 13,117 13,117 13,117 13,117 13,117

15 15 15

117 117 117 117

13,89 13,89

**

CPU0_VCC_DIE_SENSE CPU0_VCC_DIE_SENSE2 CPU0_VSS_DIE_SENSE CPU0_VSS_DIE_SENSE2

CPU0_PRES_N CPU0_THERMD_A_1

89

CPU0_THERMD_A_2

89

CPU0_THERMD_C_12 CPU0_THERMD_C_12

*

NC_MOD_MCH_FSB0_DBR_N

*

NC_MOD_MCH_FSB0_ITP_CLK1

*

NC_MOD_MCH_FSB0_ITP_CLK0 NC_MOD_MCH_FSB0_RSVD_Y1 MOD_MCH_FSB0_TESTBUS

15

MOD_MCH_FSB0_COMP_3

MOD_MCH_FSB0_COMP_1

MOD_MCH_FSB0_COMP_0

FSB0_VID_6 FSB0_VID_5 FSB0_VID_4 FSB0_VID_3 FSB0_VID_2 FSB0_VID_1 FSB0_VID_0 FSB0_VID_SELECT

MOD_MCH_V_VTT_FSB0_VCCA MOD_MCH_V_VSS_FSB0_VSSA MOD_MCH_V_1V5_FSB0_VCCPLL

21

R4248

R4247

MOD_MCH_FSB0_COMP_5

MOD_MCH_FSB0_COMP_4

MOD_MCH_FSB0_COMP_2

511-1%

1 2

MOD_MCH_FSB0_COMP_7 MOD_MCH_FSB0_COMP_6

511-1%

R4249

1 2

+CPU_VTT

21

R4250

511-1%

R4251

1 2

21

R4252

511-1%

+CPU_VTT

511-1%

R26

R4253

G30 H30 G29

F2 H2

G10

H1 N1

AE3

Y3 T2 J2 R1 G2 T1

A13

AM5 AL4 AK4 AL6 AM3 AL5 AM2 AN7

A23 B23 D23 C23 AN3 AL8 AN4 AL7 AM6

AE8 AL1 AJ7 AK1 AH7 AC2 AJ3 AK3

Y1

AH2

511-1%

1 2

J_CPU0

BSEL2 BSEL1 BSEL0 GTLREF_DATA_CORE1 GTLREF_ADD_CORE1 GTLREF_DATA_CORE0 GTLREF_ADD_CORE0 PWRGOOD COMP7 COMP6 COMP5 COMP4 COMP3 COMP2 COMP1 COMP0

VID6 VID5 VID4 VID3 VID2 VID1 VID0 VID_SELECT

VCCA VSSA VCCPLL VCCIOPLL VCC_DIE_SENSE VCC_DIE_SENSE2 VSS_DIE_SENSE VSS_DIE_SENSE2 VTTPWRGD

SKTOCC_N THERMDA THERMDA2 THERMDC THERMDC2 DBR_N ITP_CLK1 ITP_CLK0 BOOT_SELECT TEST_BUS

INTEL LGA771 PINOUT

HETERO 3 OF 9

SILKSCREEN=CPU1

51-5%

1 2

MOD_MCH_XDP0_TDI_CPU0

MLK: Pull Up Added on XDP0_TDI_CPU0 signal

VTT_A25 VTT_A26 VTT_B25 VTT_B26 VTT_B27 VTT_B28 VTT_B29 VTT_B30 VTT_C25 VTT_C26 VTT_C27 VTT_C28 VTT_C29 VTT_C30 VTT_D25 VTT_D26 VTT_D27 VTT_D28 VTT_D29

VTT_D30 VTT_E30/NC_E30 VTT_F30/NC_F30

VTT_OUT_1 VTT_OUT_0

VTT_SEL

LL_ID1 LL_ID0 MS_ID1 MS_ID0

A25 A26 B25 B26 B27 B28 B29 B30 C25 C26 C27 C28 C29 C30 D25 D26 D27 D28 D29 D30 E30 F30

AA1 J1 F27

AA2 V2 V1 W1

13,21

+CPU_VTT

MOD_MCH_VTT_CPU_PWRGOOD

NC_MOD_MCH_FSB0_VTT_OUT_1 NC_MOD_MCH_FSB0_VTT_OUT_0

MOD_MCH_VTT_SEL_CPU0

MOD_MCH_CPU0_LL_ID1_R

MOD_MCH_CPU0_LL_ID0_R CPU0_MS_ID1 CPU0_MS_ID0

15,17,20

13,95,128 13,95,128

15,22

45 45

15,17,54 15,17,54 15,17,20 15,17,54 15,17,54 15,17,54 15,17,54

15,17,54

17,21 13,21

17,21,24 17,21,24

15,20

15,17,54

15,20 15,20

MOD_MCH_FSB0_TESTHI_11

15

MOD_MCH_FSB0_TESTHI_10

15

21 21

15

MLK: VTT_SEL Signal going to VTT REG Ckt

109

R5498

0-5%

12

R5499

12

0-5%

MOD_MCH_FSB0_BPMB_2_N MOD_MCH_FSB0_BPMB_3_N

MOD_MCH_FSB0_TESTHI_02_07

MOD_MCH_FSB0_TESTHI_00_01

CPU0_LL_ID1

Depop for dempsyT

MOD_MCH_XDP0_TCK0 MOD_MCH_XDP0_TDI_CPU0 MOD_MCH_XDP0_TDO_CPU0

21

MOD_MCH_XDP0_TMS MOD_MCH_XDP0_TRST_N

MOD_MCH_CPU0_IERR_N FSB_FERR_N MOD_MCH_CPU0_PROCHOT_N MOD_MCH_CPU0_THERMTRIP_N

CPU0_LL_ID0

MOD_MCH_FSB0_RST_N MOD_MCH_FSB0_RSP_N

22

MOD_MCH_FSB0_BPRI_N

22

MOD_MCH_FSB0_TRDY_N

22

MOD_MCH_FSB0_DEFER_N

22

MOD_MCH_FSB0_RS_0_N

22

MOD_MCH_FSB0_RS_1_N

22 22

MOD_MCH_FSB0_RS_2_N

CK_333M_CPU0_N CK_333M_CPU0_P

FSB_SMI_N FSB_A20M_N

MOD_MCH_CPU_FORCEPR_N

FSB_INTR FSB_NMI FSB_IGNNE_N FSB_STPCLK_N

FSB_INIT_N

117

+3.3V

G23

RESET_N

H4

RSP_N

G8

BPRI_N

E3

TRDY_N

G7

DEFER_N

B3

RS0_N

F5

RS1_N

A3

RS2_N

G28

BCLK1

P2

SMI_N

K3

A20M_N

AK6

FORCEPR_N

K1

LINT0

L1

LINT1

N2

IGNNE_N

M3

STPCLK_N

P3

INIT_N

AE1

TCK

AD1

TDI

AF1

TDO

AC1

TMS

AG1

TRST_N

AB2

IERR_N

R3

FERR/PBE_N

AL2

PROCHOT_N

M2

THRMTRIP_N

L2

TESTHI11

P1

TESTHI10

G4

TESTHI09/BPMB2_N

G3

TESTHI08/BPMB3_N

F24

TESTHI07

G24

TESTHI06

G26

TESTHI05

G27

TESTHI04

G25

TESTHI03

F25

TESTHI02

W3

TESTHI01

F26

TESTHI00

J_CPU0

INTEL LGA771 PINOUT

HETERO 1 OF 9

SILKSCREEN=CPU1

J_CPU0

Clovertown

INTEL LGA771 PINOUT

HETERO 4 OF 9

SILKSCREEN=CPU1

ADS_N BNR_N

HIT_N DBSY_N DRDY_N HITM_N LOCK_N

BINIT_N MCERR_N

AP1_NBCLK0

AP0_N

BR1_N

BR0_N

DP3_N

DP2_N

DP1_N

DP0_N

BPM5_N BPM4_N

BPM3_N BPM2_N BPM1_N BPM0_N

D2 C2 D4 B2 C1 E4 C3 AD3 AB3

U3F28 U2 H5 F3

J17 H16 H15 J16

AG3 AF2 AG2 AD2 AJ1 AJ2

RSVD_C9/BPMB1_N

RSVD_E1/NC_E1

RSVD_W2/TESTIN1

MOD_MCH_FSB0_BPM_5_N MOD_MCH_FSB0_BPM_4_N MOD_MCH_FSB0_BPM_3_N MOD_MCH_FSB0_BPM_2_N MOD_MCH_FSB0_BPM_1_N MOD_MCH_FSB0_BPM_0_N

RSVD_A20 RSVD_AC4 RSVD_AE4 RSVD_AE6 RSVD_B13

RSVD_D1 RSVD_D14 RSVD_D16 RSVD_E23 RSVD_E24

RSVD_E5

RSVD_E6

RSVD_E7 RSVD_F23 RSVD_F29

RSVD_F6

PECI RSVD_G6 RSVD_J3 RSVD_N4 RSVD_N5 RSVD_P5

RSVD_AN5 RSVD_AN6

MOD_MCH_FSB0_ADS_N MOD_MCH_FSB0_BNR_N MOD_MCH_FSB0_HIT_N MOD_MCH_FSB0_DBSY_N MOD_MCH_FSB0_DRDY_N MOD_MCH_FSB0_HITM_N MOD_MCH_FSB0_LOCK_N MOD_MCH_FSB0_BINIT_N MOD_MCH_FSB0_MCERR_N

MOD_MCH_FSB0_AP_1_N MOD_MCH_FSB0_AP_0_N MOD_MCH_FSB0_BREQ_1_N MOD_MCH_FSB0_BREQ_0_N

MOD_MCH_FSB0_DP_3_N MOD_MCH_FSB0_DP_2_N MOD_MCH_FSB0_DP_1_N MOD_MCH_FSB0_DP_0_N

A20 AC4 AE4 AE6 B13 C9 D1 D14 D16 E23 E24 E1 E5 E6 E7 F23 F29 F6 G5 G6 J3 N4 N5 P5 AN5 AN6 W2

NC_MOD_MCH_FSB0_RSVD_A20 NC_MOD_MCH_FSB0_RSVD_AC24 NC_MOD_MCH_FSB0_RSVD_AE24 NC_MOD_MCH_FSB0_RSVD_AE6 NC_MOD_MCH_FSB0_RSVD_B13

NC_MOD_MCH_FSB0_RSVD_D1 NC_MOD_MCH_FSB0_RSVD_D14 NC_MOD_MCH_FSB0_RSVD_D16 NC_MOD_MCH_FSB0_RSVD_E23 NC_MOD_MCH_FSB0_RSVD_E24 NC_MOD_MCH_FSB0_RSVD_E1 NC_MOD_MCH_FSB0_RSVD_E5 NC_MOD_MCH_FSB0_RSVD_E6 NC_MOD_MCH_FSB0_RSVD_E7 NC_MOD_MCH_FSB0_RSVD_F23 NC_MOD_MCH_FSB0_RSVD_F29

PECI_CPU NC_MOD_MCH_FSB0_RSVD_G6 NC_MOD_MCH_FSB0_RSVD_J3 NC_MOD_MCH_FSB0_RSVD_N4 NC_MOD_MCH_FSB0_RSVD_N5 NC_MOD_MCH_FSB0_RSVD_P5 NC_MOD_MCH_FSB0_RSVD_AN5 NC_MOD_MCH_FSB0_RSVD_AN6

MOD_MCH_CPU0_TESTIN

22 22 22 22 22 22 22 22 22

22 22 15,22 15,22

22 22 22 22

21,22 21,22 21 21 21 21

MOD_MCH_FSB0_BPMB_1_N

MOD_MCH_FSB0_F6_PD_DEMPSY_T

17,90

14,15

Don't care for NoconaT Populate for DempseyT Depop for Dempsey/Woodcrest

NP

R5495

X

2 1

1

2

21

3

49.9-1%

4

Do not place VTT_SEL or CPU_PRES_N on 3v3Aux, VTT_SEL is used in main domain VRD logic, CPU_PRES_N is used on 3v3 part during development. The rest are placed on 3v3 to simplify routing, no need for 3v3 aux near CPU.ort (leave LL_ID float)

ECAD: VCC/VSS_DIE_SENSE LINES

Route DIFF @ 25mil thick /5 mil space, same length, 20mil to other sigs Follow PDG 0.7 256-257

ECAD: CPU THERMD_C_12 to be routed as 2 nets, differentially with A_1 and A_2. Only bring nets together as they enter sensor

* NOTE: DBR and ITP_CLK are outputs from a in-socket debugger- Dell has no plans for this debug model.mpsey-T support8 ** NOTE: WW10 MOW documents that bootselect is being removed

and to leave pin floating

ROOM=PROC0

13,95,117,128

13,95,128 13,95,128

CPU0_PRES_N CPU0_MS_ID1 CPU0_MS_ID0

R211

1 2

4.7K-5%

R4829

NP

R5503

X

1 2

2 1

R4828

4.7K-5%

1 2

NP

R5502

X

49.9-1%

2 1

Depop for dempsyT

4.7K-5%49.9-1%

Pop for DempseyT

PROCESSOR 0

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

M2LB_Change_Note: Changed PECI_CPU1 to PECI_CPU.

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

HX601

DATE

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

INC.

ROUND ROCK,TEXAS

REV.

A00

SHEET

13 OF 1369/7/2007

MCH

211

4

C

DBA

A B C

D

1

2

3

21

13,15

NC_J_CPU0_A24.

NC_J_CPU0_E29 MOD_MCH_FSB0_BPMB_0_N MOD_MCH_CPU0_TESTIN

AA8

AB8 AC23 AC24 AC25 AC26 AC27 AC28 AC29 AC30

AC8 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30

AD8 AE11 AE12 AE14 AE15 AE18 AE19 AE21 AE22 AE23

AE9 AF11 AF12 AF14 AF15 AF18 AF19 AF21 AF22

AF8

AF9 AG11 AG12 AG14 AG15 AG18 AG19 AG21 AG22 AG25 AG26 AG27 AG28 AG29 AG30

AG8

AG9 AH11

VCC_AA8 VCC_AB8 VCC_AC23 VCC_AC24 VCC_AC25 VCC_AC26 VCC_AC27 VCC_AC28 VCC_AC29 VCC_AC30 VCC_AC8 VCC_AD23 VCC_AD24 VCC_AD25 VCC_AD26 VCC_AD27 VCC_AD28 VCC_AD29 VCC_AD30 VCC_AD8 VCC_AE11 VCC_AE12 VCC_AE14 VCC_AE15 VCC_AE18 VCC_AE19 VCC_AE21 VCC_AE22 VCC_AE23 VCC_AE9 VCC_AF11 VCC_AF12 VCC_AF14 VCC_AF15 VCC_AF18 VCC_AF19 VCC_AF21 VCC_AF22 VCC_AF8 VCC_AF9 VCC_AG11 VCC_AG12 VCC_AG14 VCC_AG15 VCC_AG18 VCC_AG19 VCC_AG21 VCC_AG22 VCC_AG25 VCC_AG26 VCC_AG27 VCC_AG28 VCC_AG29 VCC_AG30 VCC_AG8 VCC_AG9 VCC_AH11

SILKSCREEN=CPU1

A24 E29

G1 U1

J_CPU0

INTEL LGA771 PINOUT

HETERO 5 OF 9

J_CPU0

VSS_A24/RSVD VSS_E29/RSVD VSS_G1/BPMB0_N VSS_U1/TESTIN2

Clovertown

INTEL LGA771 PINOUT

HETERO 9 OF 9

VCC_AH12 VCC_AH14 VCC_AH15 VCC_AH18 VCC_AH19 VCC_AH21 VCC_AH22 VCC_AH25 VCC_AH26 VCC_AH27 VCC_AH28 VCC_AH29 VCC_AH30

VCC_AH8

VCC_AH9 VCC_AJ11 VCC_AJ12 VCC_AJ14 VCC_AJ15 VCC_AJ18 VCC_AJ19 VCC_AJ21 VCC_AJ22 VCC_AJ25 VCC_AJ26

VCC_AJ8

VCC_AJ9 VCC_AK11 VCC_AK12 VCC_AK14 VCC_AK15 VCC_AK18 VCC_AK19 VCC_AK21 VCC_AK22 VCC_AK25 VCC_AK26

VCC_AK8

VCC_AK9 VCC_AL11 VCC_AL12 VCC_AL14 VCC_AL15 VCC_AL18 VCC_AL19 VCC_AL21 VCC_AL22 VCC_AL25 VCC_AL26 VCC_AL29 VCC_AL30

VCC_AL9 VCC_AM11 VCC_AM12

AH12 AH14 AH15 AH18 AH19 AH21 AH22 AH25 AH26 AH27 AH28 AH29 AH30 AH8 AH9 AJ11 AJ12 AJ14 AJ15 AJ18 AJ19 AJ21 AJ22 AJ25 AJ26 AJ8 AJ9 AK11 AK12 AK14 AK15 AK18 AK19 AK21 AK22 AK25 AK26 AK8 AK9 AL11 AL12 AL14 AL15 AL18 AL19 AL21 AL22 AL25 AL26 AL29 AL30

AL9 AM11 AM12

M23 M24 M25 M26 M27 M28 M29 M30 M8 N23 N24 N25 N26 N27 N28 N29 N30 N8 P8 R8 T23 T24 T25 T26 T27 T28 T29 T30 T8 U23 U24 U25 U26 U27 U28 U29 U30 U8 V8 W23 W24 W25 W26 W27 W28 W29 W30 W8 Y8 Y23 Y24 Y25 Y26 Y27 Y28 Y29 Y30

+CPU_VID0

A12 A15 A18

A2

A21

A6

A9 AA23 AA24 AA25 AA26 AA27 AA28 AA29

AA3

AA30

AA6 AA7

AB1 AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30

AB7

AC3

AC6

AC7

AD4

AD7 AE10 AE13 AE16 AE17

AE2 AE20 AE24 AE25 AE26 AE27 AE28 AE29 AE30

AE5

AE7 AF10 AF13 AF16 AF17 AF20 AF23 AF24 AF25 AF26 AF27 AF28 AF29

AF3 AF30

AF6

AF7 AG10 AG13 AG16 AG17

VSS_A12 VSS_A15 VSS_A18 VSS_A2 VSS_A21

VSS_A6 VSS_A9 VSS_AA23 VSS_AA24 VSS_AA25 VSS_AA26 VSS_AA27 VSS_AA28 VSS_AA29 VSS_AA3 VSS_AA30 VSS_AA6 VSS_AA7 VSS_AB1 VSS_AB23 VSS_AB24 VSS_AB25 VSS_AB26 VSS_AB27 VSS_AB28 VSS_AB29 VSS_AB30 VSS_AB7 VSS_AC3 VSS_AC6 VSS_AC7 VSS_AD4 VSS_AD7 VSS_AE10 VSS_AE13 VSS_AE16 VSS_AE17 VSS_AE2 VSS_AE20 VSS_AE24 VSS_AE25 VSS_AE26 VSS_AE27 VSS_AE28 VSS_AE29 VSS_AE30 VSS_AE5 VSS_AE7 VSS_AF10 VSS_AF13 VSS_AF16 VSS_AF17 VSS_AF20 VSS_AF23 VSS_AF24 VSS_AF25 VSS_AF26 VSS_AF27 VSS_AF28 VSS_AF29 VSS_AF3 VSS_AF30 VSS_AF6 VSS_AF7 VSS_AG10 VSS_AG13 VSS_AG16 VSS_AG17

SILKSCREEN=CPU1

J_CPU0

INTEL LGA771 PINOUT

HETERO 7 OF 9

VSS_AG20 VSS_AG23 VSS_AG24

VSS_AG7

VSS_AH1 VSS_AH10 VSS_AH13 VSS_AH16 VSS_AH17 VSS_AH20 VSS_AH23 VSS_AH24

VSS_AH3

VSS_AH6

VSS_AJ10 VSS_AJ13 VSS_AJ16 VSS_AJ17 VSS_AJ20 VSS_AJ23 VSS_AJ24 VSS_AJ27 VSS_AJ28 VSS_AJ29 VSS_AJ30

VSS_AJ4

VSS_AK10 VSS_AK13 VSS_AK16 VSS_AK17

VSS_AK2 VSS_AK20 VSS_AK23 VSS_AK24 VSS_AK27 VSS_AK28 VSS_AK29 VSS_AK30

VSS_AK5

VSS_AK7 VSS_AL10 VSS_AL13 VSS_AL16 VSS_AL17 VSS_AL20 VSS_AL23 VSS_AL24 VSS_AL27 VSS_AL28

VSS_AL3

VSS_AM1 VSS_AM10 VSS_AM13 VSS_AM16 VSS_AM17 VSS_AM20 VSS_AM23 VSS_AM24 VSS_AM27 VSS_AM28

VSS_AM4

VSS_AM7 VSS_AN01 VSS_AN02 VSS_AN10 VSS_AN13 VSS_AN16

AG20 AG23 AG24 AG7 AH1 AH10 AH13 AH16 AH17 AH20 AH23 AH24 AH3 AH6

AJ10 AJ13 AJ16 AJ17 AJ20 AJ23 AJ24 AJ27 AJ28 AJ29 AJ30 AJ4

AK10 AK13 AK16 AK17 AK2 AK20 AK23 AK24 AK27 AK28 AK29 AK30 AK5 AK7 AL10 AL13 AL16 AL17 AL20 AL23 AL24 AL27 AL28 AL3

AM1 AM10 AM13 AM16 AM17 AM20 AM23 AM24 AM27 AM28 AM4 AM7 AN1 AN2 AN10 AN13 AN16

AN17 AN20 AN23 AN24

B1 B11 B14 B17 B20 B24

B8

B5 C10 C13 C16 C19 C22 C24

C4

C7 D12 D15 D18 D21 D24

D3

D5

D6

D9 E11 E14 E17

E2 E20 E25 E26 E27 E28

E8

F1 F10 F13 F16 F19 F22

F4

F7

H10 H11 H12 H13 H14 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27 H28 H29

VSS_AN17 VSS_AN20 VSS_AN23 VSS_AN24 VSS_B1 VSS_B11 VSS_B14 VSS_B17 VSS_B20 VSS_B24 VSS_B5 VSS_B8 VSS_C10 VSS_C13 VSS_C16 VSS_C19 VSS_C22 VSS_C24 VSS_C4 VSS_C7 VSS_D12 VSS_D15 VSS_D18 VSS_D21 VSS_D24 VSS_D3 VSS_D5 VSS_D6 VSS_D9 VSS_E11 VSS_E14 VSS_E17 VSS_E2 VSS_E20 VSS_E25 VSS_E26 VSS_E27 VSS_E28

VSS_E8 VSS_F1 VSS_F10 VSS_F13 VSS_F16 VSS_F19 VSS_F22 VSS_F4 VSS_F7

VSS_H10 VSS_H11 VSS_H12 VSS_H13 VSS_H14 VSS_H17 VSS_H18 VSS_H19 VSS_H20 VSS_H21 VSS_H22 VSS_H23 VSS_H24 VSS_H25 VSS_H26 VSS_H27 VSS_H28 VSS_H29

J_CPU0

INTEL LGA771 PINOUT

HETERO 8 OF 9

SILKSCREEN=CPU1

VSS_H3 VSS_H6 VSS_H7 VSS_H8 VSS_H9 VSS_J4 VSS_J7 VSS_K2 VSS_K5

VSS_K7 VSS_L23 VSS_L24 VSS_L25 VSS_L26 VSS_L27 VSS_L28 VSS_L29

VSS_L3 VSS_L30

VSS_L6

VSS_L7

VSS_M1

VSS_M7

VSS_N3

VSS_N6

VSS_N7 VSS_P23 VSS_P24 VSS_P25 VSS_P26 VSS_P27 VSS_P28 VSS_P29 VSS_P30

VSS_P4

VSS_P7

VSS_R2 VSS_R23 VSS_R24 VSS_R25 VSS_R26 VSS_R27 VSS_R28 VSS_R29 VSS_R30

VSS_R5

VSS_R7

VSS_T3

VSS_T6

VSS_T7

VSS_U7 VSS_V23 VSS_V24 VSS_V25 VSS_V26 VSS_V27 VSS_V28 VSS_V29

VSS_V3 VSS_V30

VSS_V6

VSS_V7

VSS_W4

VSS_W7

VSS_Y2

VSS_Y5

VSS_Y7

9-7-2007_16:36

H3 H6 H7 H8 H9 J4 J7 K2 K5 K7 L23 L24 L25 L26 L27 L28 L29 L3 L30 L6 L7 M1 M7 N3 N6 N7 P23 P24 P25 P26 P27 P28 P29 P30 P4 P7 R2 R23 R24 R25 R26 R27 R28 R29 R30 R5 R7 T3 T6 T7

U7 V23 V24 V25 V26 V27 V28 V29 V3 V30 V6 V7 W4 W7 Y2 Y5 Y7

1

2

3

+CPU_VID0+CPU_VID0

+CPU_VTT

21

+CPU_VID0

21

AM14 AM15 AM18 AM19 AM21 AM22 AM25 AM26 AM29 AM30

AM8

AM9 AN11 AN12 AN14 AN15 AN18 AN19 AN21 AN22 AN25 AN26

AN8

AN9

J10

J11

J12

J13

J14

J15

J18

J19

J20

J21

J22

J23

J24

J25

J26

J27

J28

J29

J30

J8

J9 K23 K24 K25 K26 K27 K28 K29 K30

K8

L8

VCC_AM14 VCC_AM15 VCC_AM18 VCC_AM19 VCC_AM21 VCC_AM22 VCC_AM25 VCC_AM26 VCC_AM29 VCC_AM30 VCC_AM8 VCC_AM9 VCC_AN11 VCC_AN12 VCC_AN14 VCC_AN15 VCC_AN18 VCC_AN19 VCC_AN21 VCC_AN22 VCC_AN25 VCC_AN26 VCC_AN8 VCC_AN9 VCC_J10 VCC_J11 VCC_J12 VCC_J13 VCC_J14 VCC_J15 VCC_J18 VCC_J19 VCC_J20 VCC_J21 VCC_J22 VCC_J23 VCC_J24 VCC_J25 VCC_J26 VCC_J27 VCC_J28 VCC_J29 VCC_J30 VCC_J8 VCC_J9 VCC_K23 VCC_K24 VCC_K25 VCC_K26 VCC_K27 VCC_K28 VCC_K29 VCC_K30 VCC_K8 VCC_L8

INTEL LGA771 PINOUT

SILKSCREEN=CPU1

J_CPU0

VCC_M23 VCC_M24 VCC_M25 VCC_M26 VCC_M27 VCC_M28 VCC_M29 VCC_M30

VCC_M8 VCC_N23 VCC_N24 VCC_N25 VCC_N26 VCC_N27 VCC_N28 VCC_N29 VCC_N30

VCC_N8

VCC_P8

VCC_R8 VCC_T23 VCC_T24 VCC_T25 VCC_T26 VCC_T27 VCC_T28 VCC_T29 VCC_T30

VCC_T8 VCC_U23 VCC_U24 VCC_U25 VCC_U26 VCC_U27 VCC_U28 VCC_U29 VCC_U30

VCC_U8

VCC_V8 VCC_W23 VCC_W24 VCC_W25 VCC_W26 VCC_W27 VCC_W28 VCC_W29 VCC_W30

VCC_W8

VCC_Y8 VCC_Y23 VCC_Y24 VCC_Y25 VCC_Y26 VCC_Y27 VCC_Y28 VCC_Y29 VCC_Y30

HETERO 6 OF 9

Room = PROC0_VTT_CAPS_22UF

C2568

1 2

+CPU_VTT

C2566

22uF 6.3V

21

C2567

1 2

22uF 6.3V

C2565

22uF 6.3V

21

dell p/n C5127

22uF 6.3V

21

Room = PROC0_VTT_CAPS_1uF dell p/n D8579

C2547

1 2

C2546

1uF 6.3V

C2548

1 2

1uF 6.3V

C2545

1uF 6.3V

C2543

1uF 6.3V

C2544

1 2

1uF 6.3V

4

ROOM=PROC0

SILKSCREEN=CPU1

+CPU_VTT

21

C2587

.1uF

C2586

10V-10%

21

.1uF

C2585

10V-10%

21

TODO: Intel: VTT decoup reqs TBDetero

.1uF

C2588

10V-10%

MODULE: DESC: REV: OF

21

Room = PROC0_VTT_CAPS_P1UF

CPUS,FSB,NB,XDP0,XDP1

SEC

dell p/n J5734

.1uF

C2583

10V-10%

.1uF

C2584

10V-10%

.1uF

C2582

10V-10%

.1uF

10V-10%

INC.

ROUND ROCK,TEXAS

TITLE

MCH

211

4

PROCESSOR 0

SCHEM, PLN, SV, PE2950, MLK

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

REV.

HX601

SHEET

A00

9/7/2007 14 OF 136

DCBA

A B C

D

1

MOD_MCH_FSB0_GTLREF_DATA/ ADD (800mV @1.2V VTT) (733mV @1.1V VTT)

Place components: Group associate components together and as physically close to the associated pin as possbile with the 220pf cap closest to the pin

Make traces wide as possible >12mils

ROOM = PROC0_VREF_CORE1

CPU0 GTL VREF

+CPU_VTT

R4379

1 2

49.9-1%

R4386

1 2

21

R4354

680-5%

SUB=NP0

100-1%

TP_MOD_MCH_FSB0_GTLREF_DATA_R

NET_PHYSICAL_TYPE=30MIL

0-5%

R5270

0-5%

R5414

C2601

1 2

1uF 6.3V

Place termination close to CPU 0 at end of bus

rewired 5271 and 5270. Added C3396 C3395 R5415 and R5414

MOD_MCH_FSB0_GTLREF_DATA_CORE1

21

MOD_MCH_FSB0_GTLREF_ADD_CORE1

21

1 2

220pF

50V-10%

C2746

1 2

220pF

50V-10%

ECAD: Place 220pf caps under CPU ECAD: Route <1.5" trace. ECAD: Route at 30-50milscs (& Paris) DT#2256

C3395

PROPAGATION_DELAY=L:S::1000 NET_PHYSICAL_TYPE=50MILS

13

+CPU_VTT

+3.3V

1 2

51-5%

R4677

R139

R5978

4.7K-5%

NP

1 2

4.7K-5%

1 2

51-5%

21

R210

R140

21

X

FSB0_VID_SELECT

MOD_MCH_FSB0_BREQ_1_N

MOD_MCH_FSB0_BREQ_0_N

MOD_MCH_CPU0_IERR_N

1

13,95,117,128

13,22

13,20

2

MOD_MCH_V_VTT_FSB0_VCCA / VSS

Place components: Route trace from one of the L to pin A23 of the CPU. Route a trace from the other L to pin of cap. Place cap between CPU.A23 and VSSA.

Make traces wide as possible >12mils

ROOM = PROC0_VREF_CORE0

+CPU_VTT

R4378

21

49.9-1%

L1759 & L1758 = dell p/n: N3305

L1759

10uH 165MA

26ohm+/-30%

L1758

1 2

10uH 165MA

R4385

1 2

R4353

680-5%

SUB=NP0

100-1%

21

TP_MOD_MCH_FSB0_GTLREF_ADD_R

21

NET_PHYSICAL_TYPE=30MIL

0-5%

1 2

R5271

0-5%

1 2

R5415

21

C2600

1uF 6.3V

MOD_MCH_V_VTT_FSB0_VCCA

12

C2569

22uF 6.3V

MOD_MCH_V_VSS_FSB0_VSSA

C2745

1 2

220pF

C3396

50V-10%

1 2

220pF

50V-10%

MOD_MCH_FSB0_GTLREF_DATA_CORE0

PROPAGATION_DELAY=L:S::1000 NET_PHYSICAL_TYPE=50MILS

MOD_MCH_FSB0_GTLREF_ADD_CORE0

PROPAGATION_DELAY=L:S::1000 NET_PHYSICAL_TYPE=50MILS

ECAD: Place 220pf caps under CPU

ECAD: Route <1.5" trace.

ECAD: Route at 30-50mils

13

51-5%

R4679

1 2

51-5%

R252

NP

1 2

220-5%

R246

NP

1 2

220-5%

R250

NP

1 2

220-5%

R1861

NP

1 2

220-5%

R4928

51-5%

X

R248

NP

220-5%

X

R247

NP

220-5%

X

R249

NP

220-5%

X

R125

1 2

51-5%

R92

1 2

150-1%

R5632

21

R138

51-5%

MOD_MCH_CPU0_PROCHOT_N

MOD_MCH_CPU0_THERMTRIP_N

21

MOD_MCH_FSB0_RST_N

X

21

X

21

X

CPU_PWRGOOD

21

MOD_MCH_VTT_CPU_PWRGOOD

FSB_SMI_N

FSB_A20M_N

FSB_NMI

FSB_INTR

FSB_INIT_N

FSB_IGNNE_N

FSB_STPCLK_N

FSB_FERR_N

13,20

13,22

13,17,54

BSEL PU's on Translation page

13,17,21,54

13,17,20

2

3

MOD_MCH_V_1V5_FSB0_VCCPLL

Place components: Group associate components together and as physically close to the associated pin as possbile with one of the 0.1uF cap closest to the pin

Make traces wide as possible >12mils

Route VCCIOPLL in parrallel to VSSA.

+CPU_VTT

Inductor stats: DCR (worst case) = .338 ohms SRF=30MHz 10uH +/- 10%& AR409 DT#2287

+1.5V

R4237

1 2

ROOM = PROCO_1V5_VCC

220mA Total

0-5%

6.3V-10%

4.7uF

21

C2575

ROOM = PROC0_VTT_VCC

CT:250mA, WC:125mA

6.3V-10%

4.7uF

C2577

21

50V-10%

0.01uF

C2569 = Dell p/n: C5127

MOD_MCH_V_1V5_FSB0_VCCPLL

21

50V-10%

C2950

0.01uF

C2589

21

P19_DT9175_jp

13

301-1%

X01_DT5560_SMR - deleted notes

R4244

21

MOD_MCH_FSB0_TESTHI_11

R4240

1 2

51-5%

R4245

1 2

51-5%

R4243

51-5%

R5805

1 2

MOD_MCH_FSB0_TESTHI_10

21

MOD_MCH_FSB0_TESTHI_02_07

MOD_MCH_FSB0_TESTHI_00_01

MOD_MCH_CPU0_TESTIN

13

3

13

13,14

4

R5252

49.9-1%

R5251

49.9-1%

R5249

49.9-1%

R4299

49.9-1%

per MOW WW11 comp[7:4] now 50ohm +/- 15 ohm

21

R5253

1 2

21

49.9-1%

R5250

1 2

49.9-1%

R5248

1 2

49.9-1%

R4300

1 2

49.9-1%

MOD_MCH_FSB0_COMP_7

MOD_MCH_FSB0_COMP_6

MOD_MCH_FSB0_COMP_5

MOD_MCH_FSB0_COMP_4

MOD_MCH_FSB0_COMP_3

MOD_MCH_FSB0_COMP_2

MOD_MCH_FSB0_COMP_1

MOD_MCH_FSB0_COMP_0

X01_DT5511_SMR - added constraints to comp signalsm intel

PROPAGATION_DELAY=L:S::1200

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=15MIL

PROPAGATION_DELAY=L:S::1000 NET_PHYSICAL_TYPE=15MIL

13

13,17,20

ECAD: Total length of trace < 6"

17

PSMI

MOD_MCH_CPU_FORCEPR_N

Note: FORCEPR has internal termination

MOD_MCH_FSB1_TESTBUS

+CPU_VTT

NP

R4588

X

1 2

1K-1%

1 2

0-5%

R95

MOD_MCH_FSB0_TESTBUS

13

51-5%

TITLE

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

INC.

ROUND ROCK,TEXAS

MCH

211

4

SCHEM, PLN, SV, PE2950, MLK

ROOM=PROC0

todo: can 1k be 5%?

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

REV.

HX601

SHEET

A00

9/7/2007 15 OF 136

DCBA

A B C

D

Processor 1 heatsink retention modules

ST2

1

2

22 22 22 22 22 22

22 22 22 22 22 22 22 22 22 22 22 22 22 22

MOD_MCH_FSB1_A16_N MOD_MCH_FSB1_A15_N MOD_MCH_FSB1_A14_N MOD_MCH_FSB1_A13_N MOD_MCH_FSB1_A12_N MOD_MCH_FSB1_A11_N MOD_MCH_FSB1_A10_N MOD_MCH_FSB1_A9_N MOD_MCH_FSB1_A8_N MOD_MCH_FSB1_A7_N MOD_MCH_FSB1_A6_N MOD_MCH_FSB1_A5_N MOD_MCH_FSB1_A4_N

MOD_MCH_FSB1_A3_N MOD_MCH_FSB1_REQ_4_N MOD_MCH_FSB1_REQ_3_N MOD_MCH_FSB1_REQ_2_N MOD_MCH_FSB1_REQ_1_N MOD_MCH_FSB1_REQ_0_N MOD_MCH_FSB1_ADSTB_0_N

J_CPU1

W5

A16_N

V4

A15_N

V5

A14_N

U4

A13_N

U5

A12_N

T4

A11_N

U6

A10_N

T5

A9_N

R4

A8_N

M4

A7_N

L4

A6_N

L5

A5_N

P6

A4_N

M5

A3_N

J6

REQ_4_N

K6

REQ_3_N

M6

REQ_2_N

J5

REQ_1_N

K4

REQ_0_N

R6 AD5

ADSTB0_N ADSTB1_N

A35_N A34_N A33_N A32_N A31_N A30_N A29_N A28_N A27_N A26_N A25_N A24_N A23_N A22_N A21_N A20_N A19_N A18_N A17_N

AJ6 AJ5 AH5 AH4 AG5 AG4 AG6 AF4 AF5 AB4 AC5 AB5 AA5 AD6 AA4 Y4 Y6 W6 AB6

MOD_MCH_FSB1_A35_N MOD_MCH_FSB1_A34_N MOD_MCH_FSB1_A33_N MOD_MCH_FSB1_A32_N MOD_MCH_FSB1_A31_N MOD_MCH_FSB1_A30_N MOD_MCH_FSB1_A29_N MOD_MCH_FSB1_A28_N MOD_MCH_FSB1_A27_N MOD_MCH_FSB1_A26_N MOD_MCH_FSB1_A25_N MOD_MCH_FSB1_A24_N MOD_MCH_FSB1_A23_N MOD_MCH_FSB1_A22_N MOD_MCH_FSB1_A21_N MOD_MCH_FSB1_A20_N MOD_MCH_FSB1_A19_N MOD_MCH_FSB1_A18_N MOD_MCH_FSB1_A17_N

MOD_MCH_FSB1_ADSTB_1_N

22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22

22

NC_MOD_MCH_ST2_1 NC_MOD_MCH_ST2_2

1

NC1

2

NC2

3

GND_V1

4

GND_V2

5

GND_V3

6

GND_V4

7

GND_V5

8

GND_V6

9

GND_V7

10

GND_V8

BRACKET RETENTION SUPPORT, GROUNDED

CPU Heatsink frame screws

ADD4=ADD*_RC078 ADD5=ADD*_RC078 ADD6=ADD*_RC078 ADD7=ADD*_RC078

CPU Heatsink

ADD8=ADD*_H3668 ADD9=ADD*_H3668

ADD1=ADD*_JC664

ADD2=ADD*_JC664

ADD3=ADD*_JC664

NOTE : heatsink retention clips needing a single trace to each pin, not solid

connection concern *doesn't* apply to the CPU HS brackets

Nocona-T

Platform Change

Dempsy-T

1

clip asm

Dempsy/Woodcrest

2

3

22 22 22

22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22

MOD_MCH_FSB1_D15_N MOD_MCH_FSB1_D14_N MOD_MCH_FSB1_D13_N MOD_MCH_FSB1_D12_N MOD_MCH_FSB1_D11_N MOD_MCH_FSB1_D10_N MOD_MCH_FSB1_D9_N MOD_MCH_FSB1_D8_N MOD_MCH_FSB1_D7_N MOD_MCH_FSB1_D6_N MOD_MCH_FSB1_D5_N MOD_MCH_FSB1_D4_N MOD_MCH_FSB1_D3_N MOD_MCH_FSB1_D2_N MOD_MCH_FSB1_D1_N

MOD_MCH_FSB1_D0_N MOD_MCH_FSB1_DBI_0_N MOD_MCH_FSB1_DSTBN_0_N MOD_MCH_FSB1_DSTBP_0_N

MOD_MCH_FSB1_D31_N

MOD_MCH_FSB1_D30_N

MOD_MCH_FSB1_D29_N

MOD_MCH_FSB1_D28_N

MOD_MCH_FSB1_D27_N

MOD_MCH_FSB1_D26_N

MOD_MCH_FSB1_D25_N

MOD_MCH_FSB1_D24_N

MOD_MCH_FSB1_D23_N

MOD_MCH_FSB1_D22_N

MOD_MCH_FSB1_D21_N

MOD_MCH_FSB1_D20_N

MOD_MCH_FSB1_D19_N

MOD_MCH_FSB1_D18_N

MOD_MCH_FSB1_D17_N

MOD_MCH_FSB1_D16_N MOD_MCH_FSB1_DBI_1_N MOD_MCH_FSB1_DSTBN_1_N MOD_MCH_FSB1_DSTBP_1_N

D11 C12 B12

D8 C11 B10 A11 A10

A7

B7

B6

A5

C6

A4

C5

B4

A8

C8

B9

G15 F15 G14 F14 G13 E13 D13 F12 F11 D10 E10

D7

E9

F9

F8

G9 G11 G12 E12

D15_N D14_N D13_N D12_N D11_N D10_N D9_N D8_N D7_N D6_N D5_N D4_N D3_N D2_N D1_N D0_N DBI0_N DSTBN0_N DSTBP0_N

D31_N D30_N D29_N D28_N D27_N D26_N D25_N D24_N D23_N D22_N D21_N D20_N D19_N D18_N D17_N D16_N DBI1_N DSTBN1_N DSTBP1_N

D47_N D46_N D45_N D44_N D43_N D42_N D41_N D40_N D39_N D38_N D37_N D36_N D35_N D34_N D33_N D32_N

DBI2_N DSTBN2_N DSTBP2_N

D63_N D62_N D61_N D60_N D59_N D58_N D57_N D56_N D55_N D54_N D53_N D52_N D51_N D50_N D49_N D48_N

DBI3_N DSTBN3_N DSTBP3_N

G22 D22 E22 G21 F21 E21 F20 E19 E18 F18 F17 G17 G18 E16 E15 G16 D19 G20 G19

B22 A22 A19 B19 B21 C21 B18 A17 B16 C18 B15 C14 C15 A14 D17 D20 C20 A16 C17

MOD_MCH_FSB1_D47_N MOD_MCH_FSB1_D46_N MOD_MCH_FSB1_D45_N MOD_MCH_FSB1_D44_N MOD_MCH_FSB1_D43_N MOD_MCH_FSB1_D42_N MOD_MCH_FSB1_D41_N MOD_MCH_FSB1_D40_N MOD_MCH_FSB1_D39_N MOD_MCH_FSB1_D38_N MOD_MCH_FSB1_D37_N MOD_MCH_FSB1_D36_N MOD_MCH_FSB1_D35_N MOD_MCH_FSB1_D34_N MOD_MCH_FSB1_D33_N

MOD_MCH_FSB1_D32_N MOD_MCH_FSB1_DBI_2_N MOD_MCH_FSB1_DSTBN_2_N MOD_MCH_FSB1_DSTBP_2_N

MOD_MCH_FSB1_D63_N

MOD_MCH_FSB1_D62_N

MOD_MCH_FSB1_D61_N

MOD_MCH_FSB1_D60_N

MOD_MCH_FSB1_D59_N

MOD_MCH_FSB1_D58_N

MOD_MCH_FSB1_D57_N

MOD_MCH_FSB1_D56_N

MOD_MCH_FSB1_D55_N

MOD_MCH_FSB1_D54_N

MOD_MCH_FSB1_D53_N

MOD_MCH_FSB1_D52_N

MOD_MCH_FSB1_D51_N

MOD_MCH_FSB1_D50_N

MOD_MCH_FSB1_D49_N

MOD_MCH_FSB1_D48_N MOD_MCH_FSB1_DBI_3_N MOD_MCH_FSB1_DSTBN_3_N MOD_MCH_FSB1_DSTBP_3_N

22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22

22 22 22

requiredrequired

Use "LE" Blackford

Pull down reserved pin F6

Pull down MS_ID[1:0] to Vss

Isolate LL_ID[1:0]

Manually set VR loadline

required

optional

required

Mechanical Parts on the following pages: 12, 16

Socket J part numbers:

Dell p/n

Y9236

P9381

Description

Leaded Socket J - SKT,LGA,771P,G,SF,ZIF,SL,SM

Vendors:

Foxconn PN: PE077107-1041-01 Tyco PN: 1747890-1

Lead-free socket J - SKT,LGA,771P,G,SF,ZIF,SL,SM

Vendors:

No use LGA771Use LGA775

No use real blackford

No treat as reserved, leave pin No Connect

No revert back to POR

3

4

ROOM=PROC1

INTEL LGA771 PINOUT

HETERO 2 OF 9

SILKSCREEN=CPU2

ADD*_PR288

ECAD NOTE: Please put triangle pointing to pin1

NC_CPU1_REG_1

CPU1_REG

1 2

COMMON NEG

REG07 A NGO COUPON TEST

NC_CPU1_REG_2

Foxconn PN: PE077127-1041-01 Tyco PN: 1-1747890-1

PROCESSOR 1

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

HX601

SHEET

16 OF 1369/7/2007

CPUS,FSB,NB,XDP0,XDP1

SEC

REV.

A00

MCH

211

4

C

DBA

A B C

+CPU_VTT

D

1

2

3

21

R4255

R4260

17,119 17,119 17,119 17,119 17,119 17,119 17,119

13,15,21,54

NP

X

1 2

C8599

19,95,119,128

MLK: Routed to CPLD for CPU Identification

17,21,95,119,128

Do not place VTT_SEL or CPU_PRES_N on 3v3Aux, VTT_SEL is used in main domain VRD logic, CPU_PRES_N is used on 3v3 part during development. The rest are placed on 3v3 to simply routing, no need for 3v3 aux near CPU.

FSB1_VID_6 FSB1_VID_5 FSB1_VID_4 FSB1_VID_3 FSB1_VID_2 FSB1_VID_1 FSB1_VID_0

20 20 20 19 19 19 19

100pF

50V-5%

17,119 17,119 17,119 17,119 17,119 17,119 17,119

119 119 119 119

17,89 17,89

**

MOD_MCH_CPU1_BSEL_2 MOD_MCH_CPU1_BSEL_1 MOD_MCH_CPU1_BSEL_0 MOD_MCH_FSB1_GTLREF_DATA_CORE1 MOD_MCH_FSB1_GTLREF_ADD_CORE1 MOD_MCH_FSB1_GTLREF_DATA_CORE0 MOD_MCH_FSB1_GTLREF_ADD_CORE0 CPU_PWRGOOD

19 19 19 19 19 19 19 19

19 19 19

89 89

15

MOD_MCH_FSB1_COMP_7 MOD_MCH_FSB1_COMP_6 MOD_MCH_FSB1_COMP_5 MOD_MCH_FSB1_COMP_4 MOD_MCH_FSB1_COMP_3 MOD_MCH_FSB1_COMP_2 MOD_MCH_FSB1_COMP_1 MOD_MCH_FSB1_COMP_0

FSB1_VID_6 FSB1_VID_5 FSB1_VID_4 FSB1_VID_3 FSB1_VID_2 FSB1_VID_1 FSB1_VID_0 FSB1_VID_SELECT

MOD_MCH_V_VTT_FSB1_VCCA MOD_MCH_V_VSS_FSB1_VSSA MOD_MCH_V_1V5_FSB1_VCCPLL

CPU1_VCC_DIE_SENSE CPU1_VCC_DIE_SENSE2 CPU1_VSS_DIE_SENSE CPU1_VSS_DIE_SENSE2

CPU1_PRES_N

CPU1_THERMD_A_2 CPU1_THERMD_C_12 CPU1_THERMD_C_12 NC_MOD_MCH_FSB1_DBR_N

*

NC_MOD_MCH_FSB1_ITP_CLK1

*

NC_MOD_MCH_FSB1_ITP_CLK0

*

NC_MOD_MCH_FSB1_RSVD_Y1

MOD_MCH_FSB1_TESTBUS

511-1%

PROC1

R4256

1 2

21

R4257

511-1%

R4259

1 2

21

R4258

511-1%

R4254

G30 H30 G29

G10

AE3

A13

AM5 AL4 AK4 AL6 AM3 AL5 AM2 AN7

A23 B23 D23 C23 AN3 AL8 AN4 AL7 AM6

AE8 AL1 AJ7 AK1 AH7 AC2 AJ3 AK3

AH2

511-1%

1 2

J_CPU1

BSEL2 BSEL1 BSEL0

F2

GTLREF_DATA_CORE1

H2

GTLREF_ADD_CORE1 GTLREF_DATA_CORE0

H1

GTLREF_ADD_CORE0

N1

PWRGOOD COMP7

Y3

COMP6

T2

COMP5

J2

COMP4

R1

COMP3

G2

COMP2

T1

COMP1 COMP0

VID6 VID5 VID4 VID3 VID2 VID1 VID0 VID_SELECT

VCCA VSSA VCCPLL VCCIOPLL VCC_DIE_SENSE VCC_DIE_SENSE2 VSS_DIE_SENSE VSS_DIE_SENSE2 VTTPWRGD

SKTOCC_N THERMDA THERMDA2 THERMDC THERMDC2 DBR_N ITP_CLK1 ITP_CLK0

Y1

BOOT_SELECT TEST_BUS

INTEL LGA771 PINOUT

HETERO 3 OF 9

SILKSCREEN=CPU2

VTT_E30/NC_E30 VTT_F30/NC_F30

VTT_OUT_1 VTT_OUT_0

VTT_A25 VTT_A26 VTT_B25 VTT_B26 VTT_B27 VTT_B28 VTT_B29 VTT_B30 VTT_C25 VTT_C26 VTT_C27 VTT_C28 VTT_C29 VTT_C30 VTT_D25 VTT_D26 VTT_D27 VTT_D28 VTT_D29 VTT_D30

VTT_SEL

LL_ID1 LL_ID0 MS_ID1 MS_ID0

A25 A26 B25 B26 B27 B28 B29 B30 C25 C26 C27 C28 C29 C30 D25 D26 D27 D28 D29 D30 E30 F30

AA1 J1 F27

AA2 V2 V1 W1

* NOTE: DBR and ITP_CLK are outputs from a in-socket debugger- Dell has no plans for this debug model.

** NOTE: WW10 MOW documents that bootselect is being removed and to leave pin floating

+CPU_VTT

MOD_MCH_VTT_CPU_PWRGOOD

NC_MOD_MCH_FSB1_VTT_OUT_1 NC_MOD_MCH_FSB1_VTT_OUT_0CPU1_THERMD_A_1

MOD_MCH_VTT_SEL_CPU1

MOD_MCH_CPU1_LL_ID1_R

MOD_MCH_CPU1_LL_ID0_R CPU1_LL_ID0

CPU1_MS_ID1 CPU1_MS_ID0

19,21,22

45 45

13,15,54 13,15,54 13,15,20 13,15,54 13,15,54 13,15,54 13,15,54

13,15,54

13,21

21

21 13,21,24 13,21,24

19,20

13,15,54

19,20 19,20

19

13,15,20

19

109

MLK: VTT_SEL Signal going to VTT REG Ckt

17,95,128 17,95,128

17,21,95,119,128

17,95,128 17,95,128

R5501

0-5%

12

NP for DempseyT

CPU1_PRES_N CPU1_MS_ID1 CPU1_MS_ID0

MOD_MCH_FSB1_RST_N MOD_MCH_FSB1_RSP_N

22

MOD_MCH_FSB1_BPRI_N

22

MOD_MCH_FSB1_TRDY_N

22

MOD_MCH_FSB1_DEFER_N

22

MOD_MCH_FSB1_RS_0_N

22

MOD_MCH_FSB1_RS_1_N

22

MOD_MCH_FSB1_RS_2_N

22

CK_333M_CPU1_N CK_333M_CPU1_P

FSB_SMI_N FSB_A20M_N

MOD_MCH_CPU_FORCEPR_N

FSB_INTR FSB_NMI FSB_IGNNE_N FSB_STPCLK_N

FSB_INIT_N

MOD_MCH_XDP0_TCK0 MOD_MCH_XDP0_TDI_CPU1 MOD_MCH_XDP0_TDO_CPU1 MOD_MCH_XDP0_TMS MOD_MCH_XDP0_TRST_N

MOD_MCH_CPU1_IERR_N FSB_FERR_N MOD_MCH_CPU1_PROCHOT_N MOD_MCH_CPU1_THERMTRIP_N

MOD_MCH_FSB1_TESTHI_11 MOD_MCH_FSB1_TESTHI_10

MOD_MCH_FSB1_BPMB_2_N

21

MOD_MCH_FSB1_BPMB_3_N

21

MOD_MCH_FSB1_TESTHI_02_07

MOD_MCH_FSB1_TESTHI_00_01

R5500

0-5%

J_CPU1

G23

RESET_N

H4

RSP_N

G8

BPRI_N

E3

TRDY_N

G7

DEFER_N

B3

RS0_N

F5

RS1_N

A3

RS2_N

G28

BCLK1

P2

SMI_N

K3

A20M_N

AK6

FORCEPR_N

K1

LINT0

L1

LINT1

N2

IGNNE_N

M3

STPCLK_N

P3

INIT_N

AE1

TCK

AD1

TDI

AF1

TDO

AC1

TMS

AG1

TRST_N

AB2

IERR_N

R3

FERR/PBE_N

AL2

PROCHOT_N

M2

THRMTRIP_N

INTEL LGA771 PINOUT

HETERO 1 OF 9

SILKSCREEN=CPU2

J_CPU1

L2

TESTHI11

P1

TESTHI10

G4

TESTHI09/BPMB2_N

G3

TESTHI08/BPMB3_N

F24

TESTHI07

G24

TESTHI06

G26

TESTHI05

G27

TESTHI04

G25

TESTHI03

F25

TESTHI02

W3

TESTHI01

F26

TESTHI00

12

CPU1_LL_ID1

119

R213

1 2

4.7K-5%

R5629

1 2

+3.3V

R4831

4.7K-5%

1 2

4.7K-5%

INTEL LGA771 PINOUT

SILKSCREEN=CPU2

ADS_N BNR_N

HIT_N DBSY_N DRDY_N HITM_N LOCK_N

BINIT_N MCERR_N

AP1_NBCLK0

AP0_N

BR1_N

BR0_N

DP3_N

DP2_N

DP1_N

DP0_N

BPM5_N BPM4_N

BPM3_N BPM2_N BPM1_N BPM0_N

Clovertown

HETERO 4 OF 9

D2 C2 D4 B2 C1 E4 C3 AD3 AB3

U3F28 U2 H5 F3

J17 H16 H15 J16

AG3 AF2 AG2 AD2 AJ1 AJ2

NP for DempseyT

MOD_MCH_FSB1_ADS_N MOD_MCH_FSB1_BNR_N MOD_MCH_FSB1_HIT_N MOD_MCH_FSB1_DBSY_N MOD_MCH_FSB1_DRDY_N MOD_MCH_FSB1_HITM_N MOD_MCH_FSB1_LOCK_N MOD_MCH_FSB1_BINIT_N MOD_MCH_FSB1_MCERR_N

MOD_MCH_FSB1_AP_1_N MOD_MCH_FSB1_AP_0_N MOD_MCH_FSB1_BREQ_1_N MOD_MCH_FSB1_BREQ_0_N

MOD_MCH_FSB1_DP_3_N MOD_MCH_FSB1_DP_2_N MOD_MCH_FSB1_DP_1_N MOD_MCH_FSB1_DP_0_N

MOD_MCH_FSB1_BPM_5_N MOD_MCH_FSB1_BPM_4_N MOD_MCH_FSB1_BPM_3_N MOD_MCH_FSB1_BPM_2_N MOD_MCH_FSB1_BPM_1_N MOD_MCH_FSB1_BPM_0_N

RSVD_A20 RSVD_AC4 RSVD_AE4 RSVD_AE6 RSVD_B13

RSVD_C9/BPMB1_N

RSVD_D1 RSVD_D14 RSVD_D16 RSVD_E23 RSVD_E24

RSVD_E1/NC_E1

RSVD_E5

RSVD_E6

RSVD_E7 RSVD_F23 RSVD_F29

RSVD_F6

PECI RSVD_G6 RSVD_J3 RSVD_N4 RSVD_N5 RSVD_P5

RSVD_AN5 RSVD_AN6

RSVD_W2/TESTIN1

M2LB_Change_Note: Changed PECI_CPU2 to PECI_CPU.

Added 100pF to CPU_PWRGOOD.

A20 AC4 AE4 AE6 B13 C9 D1 D14 D16 E23 E24 E1 E5 E6 E7 F23 F29 F6 G5 G6 J3 N4 N5 P5 AN5 AN6 W2

22 22 22 22 22 22 22 22 22

22 22 19,22 19,22

22 22 22 22

21,22 21,22 21 21 21 21

NC_MOD_MCH_FSB1_RSVD_A20 NC_MOD_MCH_FSB1_RSVD_AC24 NC_MOD_MCH_FSB1_RSVD_AE24 NC_MOD_MCH_FSB1_RSVD_AE6 NC_MOD_MCH_FSB1_RSVD_B13

MOD_MCH_FSB1_BPMB_1_N NC_MOD_MCH_FSB1_RSVD_D1 NC_MOD_MCH_FSB1_RSVD_D14 NC_MOD_MCH_FSB1_RSVD_D16 NC_MOD_MCH_FSB1_RSVD_E23 NC_MOD_MCH_FSB1_RSVD_E24 NC_MOD_MCH_FSB1_RSVD_E1 NC_MOD_MCH_FSB1_RSVD_E5 NC_MOD_MCH_FSB1_RSVD_E6 NC_MOD_MCH_FSB1_RSVD_E7 NC_MOD_MCH_FSB1_RSVD_F23 NC_MOD_MCH_FSB1_RSVD_F29

MOD_MCH_FSB1_F6_PD_DEMPSY-T PECI_CPU NC_MOD_MCH_FSB1_RSVD_G6 NC_MOD_MCH_FSB1_RSVD_J3 NC_MOD_MCH_FSB1_RSVD_N4 NC_MOD_MCH_FSB1_RSVD_N5 NC_MOD_MCH_FSB1_RSVD_P5 NC_MOD_MCH_FSB1_RSVD_AN5 NC_MOD_MCH_FSB1_RSVD_AN6 MOD_MCH_CPU1_TESTIN

Don't care for NoconaT Populate for DempseyT/NoconaT Depop for Dempsey/Woodcrest

13,90

18,19

NP

R5496

X

2 1

21

49.9-1%

1

2

3

4

ECAD: VCC/VSS_DIE_SENSE LINES

Route DIFF @ 25mil thick /5 mil space, same length, 20mil to other sigs Follow PDG 0.7 256-257

ROOM=PROC1

POP for DempsyT

NP

R5505

X

2 1

NP

R5504

X

49.9-1%

2 1

C

PROCESSOR 1

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS

49.9-1%

ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 17 OF 136

DBA

MCH

211

4

A B C

D

1

2

3

21

17,19

AA8

AB8 AC23 AC24 AC25 AC26 AC27 AC28 AC29 AC30

AC8 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30

AD8 AE11 AE12 AE14 AE15 AE18 AE19 AE21 AE22 AE23

AE9 AF11 AF12 AF14 AF15 AF18 AF19 AF21 AF22

AF8

AF9 AG11 AG12 AG14 AG15 AG18 AG19 AG21 AG22 AG25 AG26 AG27 AG28 AG29 AG30

AG8

AG9 AH11

NC_J_CPU1_A24

NC_J_CPU1_E29 MOD_MCH_FSB1_BPMB_0_N MOD_MCH_CPU1_TESTIN

VCC_AA8 VCC_AB8 VCC_AC23 VCC_AC24 VCC_AC25 VCC_AC26 VCC_AC27 VCC_AC28 VCC_AC29 VCC_AC30 VCC_AC8 VCC_AD23 VCC_AD24 VCC_AD25 VCC_AD26 VCC_AD27 VCC_AD28 VCC_AD29 VCC_AD30 VCC_AD8 VCC_AE11 VCC_AE12 VCC_AE14 VCC_AE15 VCC_AE18 VCC_AE19 VCC_AE21 VCC_AE22 VCC_AE23 VCC_AE9 VCC_AF11 VCC_AF12 VCC_AF14 VCC_AF15 VCC_AF18 VCC_AF19 VCC_AF21 VCC_AF22 VCC_AF8 VCC_AF9 VCC_AG11 VCC_AG12 VCC_AG14 VCC_AG15 VCC_AG18 VCC_AG19 VCC_AG21 VCC_AG22 VCC_AG25 VCC_AG26 VCC_AG27 VCC_AG28 VCC_AG29 VCC_AG30 VCC_AG8 VCC_AG9 VCC_AH11

SILKSCREEN=CPU2

J_CPU1

INTEL LGA771 PINOUT

HETERO 5 OF 9

A24

VSS_A24/RSVD

E29

VSS_E29/RSVD

G1

VSS_G1/BPMB0_N

U1

VSS_U1/TESTIN2

Clovertown

INTEL LGA771 PINOUT

HETERO 9 OF 9

VCC_AH12 VCC_AH14 VCC_AH15 VCC_AH18 VCC_AH19 VCC_AH21 VCC_AH22 VCC_AH25 VCC_AH26 VCC_AH27 VCC_AH28 VCC_AH29 VCC_AH30

VCC_AH8

VCC_AH9 VCC_AJ11 VCC_AJ12 VCC_AJ14 VCC_AJ15 VCC_AJ18 VCC_AJ19 VCC_AJ21 VCC_AJ22 VCC_AJ25 VCC_AJ26

VCC_AJ8

VCC_AJ9 VCC_AK11 VCC_AK12 VCC_AK14 VCC_AK15 VCC_AK18 VCC_AK19 VCC_AK21 VCC_AK22 VCC_AK25 VCC_AK26

VCC_AK8

VCC_AK9 VCC_AL11 VCC_AL12 VCC_AL14 VCC_AL15 VCC_AL18 VCC_AL19 VCC_AL21 VCC_AL22 VCC_AL25 VCC_AL26 VCC_AL29 VCC_AL30

VCC_AL9 VCC_AM11 VCC_AM12

J_CPU1

AH12 AH14 AH15 AH18 AH19 AH21 AH22 AH25 AH26 AH27 AH28 AH29 AH30 AH8 AH9 AJ11 AJ12 AJ14 AJ15 AJ18 AJ19 AJ21 AJ22 AJ25 AJ26 AJ8 AJ9 AK11 AK12 AK14 AK15 AK18 AK19 AK21 AK22 AK25 AK26 AK8 AK9 AL11 AL12 AL14 AL15 AL18 AL19 AL21 AL22 AL25 AL26 AL29 AL30

AL9 AM11 AM12

9-7-2007_16:36

M23 M24 M25 M26 M27 M28 M29 M30 M8 N23 N24 N25 N26 N27 N28 N29 N30 N8 P8 R8 T23 T24 T25 T26 T27 T28 T29 T30 T8 U23 U24 U25 U26 U27 U28 U29 U30 U8 V8 W23 W24 W25 W26 W27 W28 W29 W30 W8 Y8 Y23 Y24 Y25 Y26 Y27 Y28 Y29 Y30

+CPU_VID1

A12 A15 A18

A2

A21

A6

A9 AA23 AA24 AA25 AA26 AA27 AA28 AA29

AA3

AA30

AA6 AA7

AB1 AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30

AB7

AC3

AC6

AC7

AD4

AD7 AE10 AE13 AE16 AE17

AE2 AE20 AE24 AE25 AE26 AE27 AE28 AE29 AE30

AE5

AE7 AF10 AF13 AF16 AF17 AF20 AF23 AF24 AF25 AF26 AF27 AF28 AF29

AF3 AF30

AF6

AF7 AG10 AG13 AG16 AG17

VSS_A12 VSS_A15 VSS_A18 VSS_A2 VSS_A21

VSS_A6 VSS_A9 VSS_AA23 VSS_AA24 VSS_AA25 VSS_AA26 VSS_AA27 VSS_AA28 VSS_AA29 VSS_AA3 VSS_AA30 VSS_AA6 VSS_AA7 VSS_AB1 VSS_AB23 VSS_AB24 VSS_AB25 VSS_AB26 VSS_AB27 VSS_AB28 VSS_AB29 VSS_AB30 VSS_AB7 VSS_AC3 VSS_AC6 VSS_AC7 VSS_AD4 VSS_AD7 VSS_AE10 VSS_AE13 VSS_AE16 VSS_AE17 VSS_AE2 VSS_AE20 VSS_AE24 VSS_AE25 VSS_AE26 VSS_AE27 VSS_AE28 VSS_AE29 VSS_AE30 VSS_AE5 VSS_AE7 VSS_AF10 VSS_AF13 VSS_AF16 VSS_AF17 VSS_AF20 VSS_AF23 VSS_AF24 VSS_AF25 VSS_AF26 VSS_AF27 VSS_AF28 VSS_AF29 VSS_AF3 VSS_AF30 VSS_AF6 VSS_AF7 VSS_AG10 VSS_AG13 VSS_AG16 VSS_AG17

SILKSCREEN=CPU2

J_CPU1

INTEL LGA771 PINOUT

HETERO 7 OF 9

VSS_AG20 VSS_AG23 VSS_AG24

VSS_AG7

VSS_AH1 VSS_AH10 VSS_AH13 VSS_AH16 VSS_AH17 VSS_AH20 VSS_AH23 VSS_AH24

VSS_AH3

VSS_AH6

VSS_AJ10 VSS_AJ13 VSS_AJ16 VSS_AJ17 VSS_AJ20 VSS_AJ23 VSS_AJ24 VSS_AJ27 VSS_AJ28 VSS_AJ29 VSS_AJ30

VSS_AJ4

VSS_AK10 VSS_AK13 VSS_AK16 VSS_AK17

VSS_AK2 VSS_AK20 VSS_AK23 VSS_AK24 VSS_AK27 VSS_AK28 VSS_AK29 VSS_AK30

VSS_AK5

VSS_AK7 VSS_AL10 VSS_AL13 VSS_AL16 VSS_AL17 VSS_AL20 VSS_AL23 VSS_AL24 VSS_AL27 VSS_AL28

VSS_AL3

VSS_AM1 VSS_AM10 VSS_AM13 VSS_AM16 VSS_AM17 VSS_AM20 VSS_AM23 VSS_AM24 VSS_AM27 VSS_AM28

VSS_AM4

VSS_AM7 VSS_AN01 VSS_AN02 VSS_AN10 VSS_AN13 VSS_AN16

AG20 AG23 AG24 AG7 AH1 AH10 AH13 AH16 AH17 AH20 AH23 AH24 AH3 AH6

AJ10 AJ13 AJ16 AJ17 AJ20 AJ23 AJ24 AJ27 AJ28 AJ29 AJ30 AJ4

AK10 AK13 AK16 AK17 AK2 AK20 AK23 AK24 AK27 AK28 AK29 AK30 AK5 AK7 AL10 AL13 AL16 AL17 AL20 AL23 AL24 AL27 AL28 AL3

AM1 AM10 AM13 AM16 AM17 AM20 AM23 AM24 AM27 AM28 AM4 AM7 AN1 AN2 AN10 AN13 AN16

AN17 AN20 AN23 AN24

B1 B11 B14 B17 B20 B24

B8

B5 C10 C13 C16 C19 C22 C24

C4

C7 D12 D15 D18 D21 D24

D3

D5

D6

D9 E11 E14 E17

E2 E20 E25 E26 E27 E28

E8

F1 F10 F13 F16 F19 F22

F4

F7

H10 H11 H12 H13 H14 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27 H28 H29

VSS_AN17 VSS_AN20 VSS_AN23 VSS_AN24 VSS_B1 VSS_B11 VSS_B14 VSS_B17 VSS_B20 VSS_B24 VSS_B5 VSS_B8 VSS_C10 VSS_C13 VSS_C16 VSS_C19 VSS_C22 VSS_C24 VSS_C4 VSS_C7 VSS_D12 VSS_D15 VSS_D18 VSS_D21 VSS_D24 VSS_D3 VSS_D5 VSS_D6 VSS_D9 VSS_E11 VSS_E14 VSS_E17 VSS_E2 VSS_E20 VSS_E25 VSS_E26 VSS_E27 VSS_E28

VSS_E8 VSS_F1 VSS_F10 VSS_F13 VSS_F16 VSS_F19 VSS_F22 VSS_F4 VSS_F7

VSS_H10 VSS_H11 VSS_H12 VSS_H13 VSS_H14 VSS_H17 VSS_H18 VSS_H19 VSS_H20 VSS_H21 VSS_H22 VSS_H23 VSS_H24 VSS_H25 VSS_H26 VSS_H27 VSS_H28 VSS_H29

SILKSCREEN=CPU2

J_CPU1

INTEL LGA771 PINOUT

HETERO 8 OF 9

VSS_H3 VSS_H6 VSS_H7 VSS_H8 VSS_H9 VSS_J4 VSS_J7 VSS_K2 VSS_K5

VSS_K7 VSS_L23 VSS_L24 VSS_L25 VSS_L26 VSS_L27 VSS_L28 VSS_L29

VSS_L3 VSS_L30

VSS_L6

VSS_L7

VSS_M1

VSS_M7

VSS_N3

VSS_N6

VSS_N7 VSS_P23 VSS_P24 VSS_P25 VSS_P26 VSS_P27 VSS_P28 VSS_P29 VSS_P30

VSS_P4

VSS_P7

VSS_R2 VSS_R23 VSS_R24 VSS_R25 VSS_R26 VSS_R27 VSS_R28 VSS_R29 VSS_R30

VSS_R5

VSS_R7

VSS_T3

VSS_T6

VSS_T7

VSS_U7 VSS_V23 VSS_V24 VSS_V25 VSS_V26 VSS_V27 VSS_V28 VSS_V29

VSS_V3 VSS_V30

VSS_V6

VSS_V7

VSS_W4

VSS_W7

VSS_Y2

VSS_Y5

VSS_Y7

H3 H6 H7 H8 H9 J4 J7 K2 K5 K7 L23 L24 L25 L26 L27 L28 L29 L3 L30 L6 L7 M1 M7 N3 N6 N7 P23 P24 P25 P26 P27 P28 P29 P30 P4 P7 R2 R23 R24 R25 R26 R27 R28 R29 R30 R5 R7 T3 T6 T7

U7 V23 V24 V25 V26 V27 V28 V29 V3 V30 V6 V7 W4 W7 Y2 Y5 Y7

1

2

3

+CPU_VID1+CPU_VID1

+CPU_VTT

+CPU_VID1

AM14 AM15 AM18 AM19 AM21 AM22 AM25 AM26 AM29 AM30

AM8

AM9 AN11 AN12 AN14 AN15 AN18 AN19 AN21 AN22 AN25 AN26

AN8

AN9

J10

J11

J12

J13

J14

J15

J18

J19

J20

J21

J22

J23

J24

J25

J26

J27

J28

J29

J30

J8

J9 K23 K24 K25 K26 K27 K28 K29 K30

K8

L8

VCC_AM14 VCC_AM15 VCC_AM18 VCC_AM19 VCC_AM21 VCC_AM22 VCC_AM25 VCC_AM26 VCC_AM29 VCC_AM30 VCC_AM8 VCC_AM9 VCC_AN11 VCC_AN12 VCC_AN14 VCC_AN15 VCC_AN18 VCC_AN19 VCC_AN21 VCC_AN22 VCC_AN25 VCC_AN26 VCC_AN8 VCC_AN9 VCC_J10 VCC_J11 VCC_J12 VCC_J13 VCC_J14 VCC_J15 VCC_J18 VCC_J19 VCC_J20 VCC_J21 VCC_J22 VCC_J23 VCC_J24 VCC_J25 VCC_J26 VCC_J27 VCC_J28 VCC_J29 VCC_J30 VCC_J8 VCC_J9 VCC_K23 VCC_K24 VCC_K25 VCC_K26 VCC_K27 VCC_K28 VCC_K29 VCC_K30 VCC_K8 VCC_L8

J_CPU1

VCC_M23 VCC_M24 VCC_M25 VCC_M26 VCC_M27 VCC_M28 VCC_M29 VCC_M30

VCC_M8 VCC_N23 VCC_N24 VCC_N25 VCC_N26 VCC_N27 VCC_N28 VCC_N29 VCC_N30

VCC_N8

VCC_P8

VCC_R8 VCC_T23 VCC_T24 VCC_T25 VCC_T26 VCC_T27 VCC_T28 VCC_T29 VCC_T30

VCC_T8 VCC_U23 VCC_U24 VCC_U25 VCC_U26 VCC_U27 VCC_U28 VCC_U29 VCC_U30

VCC_U8

VCC_V8 VCC_W23 VCC_W24 VCC_W25 VCC_W26 VCC_W27 VCC_W28 VCC_W29 VCC_W30

VCC_W8

VCC_Y8 VCC_Y23 VCC_Y24 VCC_Y25 VCC_Y26 VCC_Y27 VCC_Y28 VCC_Y29 VCC_Y30

INTEL LGA771 PINOUT

HETERO 6 OF 9

SILKSCREEN=CPU2

Room = PROC1_VTT_CAPS_22uF

C2570

1 2

+CPU_VTT

21

C2571

22uF 6.3V

21

C2572

1 2

22uF 6.3V

21

C2573

22uF 6.3V

21

dell p/n C5127

22uF 6.3V

21

Room = PROC1_VTT_CAPS_1uF dell p/n D8579

C2551

1 2

C2552

1uF 6.3V

C2553

1 2

1uF 6.3V

C2554

1uF 6.3V

C2555

1uF 6.3V

C2556

1 2

1uF 6.3V

4

ROOM=PROC1

SILKSCREEN=CPU2

+CPU_VTT

21

C2591

.1uF

C2592

10V-10%

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

MCH

211

4

21

.1uF

C2593

10V-10%

21

.1uF

C2594

10V-10%

21

.1uF

C2596

10V-10%

21

.1uF

C259721C2595

10V-10%

.1uF

10V-10%

.1uF

10V-10%

Room = PROC1_VTT_CAPS_p1UF dell p/n J5734

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT

AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE

OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE

LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH

USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

PROCESSOR 1

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

HX601

DATE

9/7/2007 18 OF 136

INC.

ROUND ROCK,TEXAS

REV.

A00

SHEET

DCBA

1

A B C

MOD_MCH_FSB1_GTLREF_DATA/ ADD (800mV @1.2V VTT) (733mV @1.1V VTT)

Place components: Group associate components together and as physically close to the associated pin as possbile with the 220pf cap closest to the pin

Make traces wide as possible >12mils

CPU1 GTL VREF

ROOM = PROC1_VREF_CORE1

+CPU_VTT

R4302

1 2

49.9-1%

R4282

1 2

680-5%

SUB=NP0

MOD_FSB1_GTLREF_49P9

21

R4306

100-1%

TP_MOD_MCH_FSB1_GTLREF_DATA_R

NET_PHYSICAL_TYPE=30MIL

0-5%

21

C2581

1 2

C2558

1 2

R5273

R5416

1uF 6.3V

220pF

50V-10%

ECAD: Follow PDG topoolgies for all sigs, esp: Thermtrip, Prochot, IERR, FERR/PBE

ECAD: Place termination close to CPU 1

C3397

1 2

220pF

50V-10%

MOD_MCH_FSB1_GTLREF_DATA_CORE1

PROPAGATION_DELAY=L:S::1000 NET_PHYSICAL_TYPE=50MILS

MOD_MCH_FSB1_GTLREF_ADD_CORE1

PROPAGATION_DELAY=L:S::1000 NET_PHYSICAL_TYPE=50MILS

ECAD: Place 220pf caps under CPU ECAD: Route <1.5" trace. ECAD: Route at 30-50mils

17

+CPU_VTT

R154

1 2

51-5%

R4661

1 2

R155

21

51-5%

MOD_MCH_FSB1_BREQ_1_N

MOD_MCH_FSB1_BREQ_0_N

MOD_MCH_CPU1_IERR_N

D

1

17,22

17,20

2

ROOM = PROC1_VREF_CORE0

+CPU_VTT

R5387

49.9-1%

R4355

680-5%

SUB=NP0

21

MOD_FSB0_GTLREF_49P9

R4387

1 2

100-1%

TP_MOD_MCH_FSB1_GTLREF_ADD_R

21

NET_PHYSICAL_TYPE=30MIL

0-5%

1 2

R5417

0-5%

1 2

R5272

21

C2602

1uF 6.3V

C2747

1 2

220pF

50V-10%

C3398

1 2

MOD_MCH_FSB1_GTLREF_DATA_CORE0

PROPAGATION_DELAY=L:S::1000 NET_PHYSICAL_TYPE=50MILS

MOD_MCH_FSB1_GTLREF_ADD_CORE0

PROPAGATION_DELAY=L:S::1000 NET_PHYSICAL_TYPE=50MILS

ECAD: Place 220pf caps under CPU

220pF

50V-10%

ECAD: Route <1.5" trace.

17

51-5%

R4682

1 2

51-5%

R153

21

51-5%

R151

51-5%

R4929

51-5%

R4246

1 2

51-5%

21

R147

1 2

51-5%

21

MOD_MCH_CPU1_PROCHOT_N

MOD_MCH_CPU1_THERMTRIP_N

MOD_MCH_FSB1_RST_N

MOD_MCH_FSB1_TESTHI_11

MOD_MCH_FSB1_TESTHI_10

MOD_MCH_FSB1_TESTHI_02_07

17,21,22

17

17,20

17

2

3

MOD_MCH_V_VTT_FSB1_VCCA / VSS

Place components: Route trace from one of the L to pin A23 of the CPU. Route a trace from the other L to pin of cap. Place cap between CPU.A23 and VSSA.

Make traces wide as possible >12mils

MOD_MCH_V_1V5_FSB1_VCCPLL

Place components: Group associate components together and as physically close to the associated pin as possbile with one of the 1.uF cap closest to the pin

ROOM = PROC1_VTT_VCC

+CPU_VTT

L31

10uH 165MA

26ohm+/-30%

L32

1 2

10uH 165MA

21

C980

1 2

22uF 6.3V

MOD_MCH_V_VTT_FSB1_VCCA

MOD_MCH_V_VSS_FSB1_VSSA

220mA Total

TODO: Verify cap ESL and ESR per 275 or PDG

ECAD: Route at 30-50milsAR409 DT#228709 DT#2287

17

R141

51-5%

+3.3V

21

R5979

4.7K-5%

R212

NP

1 2

4.7K-5%

R5806

1 2

51-5%

MOD_MCH_FSB1_TESTHI_00_01

21

FSB1_VID_SELECT

X

MOD_MCH_CPU1_TESTIN

17

17,95,119,128

17,18

3

4

Make traces wide as possible >12mils

+CPU_VTT

R5256

49.9-1%

R5255

49.9-1%

R5259

49.9-1%

R5260

49.9-1%

per MOW WW11 comp[7:4] now 50ohm +/- 15 ohm

21

R5257

1 2

21

49.9-1%

R5254

1 2

49.9-1%

R5258

1 2

49.9-1%

R5261

1 2

49.9-1%

MOD_MCH_FSB1_COMP_7

MOD_MCH_FSB1_COMP_6

MOD_MCH_FSB1_COMP_5

MOD_MCH_FSB1_COMP_4

MOD_MCH_FSB1_COMP_3

MOD_MCH_FSB1_COMP_2

MOD_MCH_FSB1_COMP_1

MOD_MCH_FSB1_COMP_0

PROPAGATION_DELAY=L:S::1200

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=15MIL

17

ROOM = PROC1_1V5_VCC

ROOM=PROC1

+1.5V

R97

1 2

0-5%

6.3V-10%

4.7uF

21

C362

CT:250mA, WC:125mA

6.3V-10%

4.7uF

21

50V-10%

C810

0.01uF

21

50V-10%

0.01uF

C824

21

P19_DT9175_jp

MOD_MCH_V_1V5_FSB1_VCCPLL

C825

17

PROCESSOR 1

TITLE

MODULE: DESC: REV: OF

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

MCH

CPUS,FSB,NB,XDP0,XDP1

SEC

211

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

REV.

HX601

SHEET

A00

9/7/2007 19 OF 136

DCBA

A B C

D

1

Keep popped

MOD_MCH_CPU0_BSEL_2

13

MOD_MCH_CPU0_BSEL_1

13

MOD_MCH_CPU0_BSEL_0

R3872

1 2

+CPU_VTT

R3873

470-5%

21

R3874

470-5%

1 2

470-5%

R3882

1 2

2.7K-5%

R3881

2.7K-5%

R3880

1 2

2.7K-5%

13,15,17

+3.3V

To MCH

To board CPLD

+3.3V

R3843

Q1811

3904

1

21

1K-1%

1 2

3

2

Q1813

3904

1

R3844

1K-1%

1 2

3

Q1812

2

3904

1

R3845

1K-1%

1 2

14 U1127

CPU0_BSEL_2_3V_N

CPU0_BSEL_1_3V_N

CPU0_BSEL_0_3V_N

3

20,95,128

20,95,129

20,95,129 20,95,129

CPU0_BSEL_0_3V_N

CPU1_BSEL_0_3V_N

2 3

74VHC02

1

ROOM=BSEL_TRANS

2

R5432

1.5K-1%

R5426

1.5K-1%

21

MOD_MCH_PSEL_0_1V5

FREQ_SEL_0

R5429

1 2

1.24K-1%

R5433

1 2

To clk generators

1.24K-1%

22

45,46

VTT_CPU_PWRGOOD

128

ROOM=PROC0

No cost difference between NOR and NAND

FSEL SPEC

MOD_MCH_VTT_CPU_PWRGOOD

+3.3V_AUX

21

Q3934

R5930

Q3935

3904

1

1K-1%

3904

1

3

2

3

2

1

2

ROOM=PROC0_BSEL_TRANSL

+CPU_VTT

Keep popped

MOD_MCH_CPU1_BSEL_2

17

MOD_MCH_CPU1_BSEL_1

17

MOD_MCH_CPU1_BSEL_0

17

R3988

1 2

470-5%

R3989

21

470-5%

R3990

1 2

470-5%

R4685

1 2

2.7K-5%

R4684

2.7K-5%

R4683

1 2

2.7K-5%

3.6V < 2.0V

0.35V

21

R5959

MAX

11 12

1K-1%

+3.3V

14 U1127

74VHC02

13,15,17

TEST NORMAL NORMAL

13

NC_U1127_PIN13

MOD_MCH_CPU_FORCEPR_N

+3.3V_AUX

R5958

1 2

Q3948

1K-1%

2

3

3904

1

MIN MODE

2.0V

0.7V

+3.3V

Note: CPU#_BSEL to CPLDs must have a pull-up

regardless of which proc controls clk

20,95,128 20,95,128

CPU0_BSEL_1_3V_N CPU1_BSEL_1_3V_N

+3.3V

14 U1127

5 6

74VHC02

R5434

1.5K-1%

R5427

4

1.5K-1%

21

MOD_MCH_PSEL_1_1V5

To MCH

FREQ_SEL_1

To clk generators

45

22

VIH_FS

VIH_FS VIL_FS -0.3V

To board CPLD

R4675

Q1913

3904

1

21

1K-1%

1 2

3

2

Q1914

3904

1

R4674

1K-1%

1 2

3

Q1915

2

3904

1

R4673

1K-1%

1 2

CPU1_BSEL_2_3V_N

CPU1_BSEL_1_3V_N

CPU1_BSEL_0_3V_N

3

2

20,95,128

20,95,129

20,95,128 20,95,128

CPU0_BSEL_2_3V_N CPU1_BSEL_2_3V_N

+3.3V

14 U1127

8 9

74VHC02

10

R5436

21

1.5K-1%

R5428

21

1.5K-1%

R5430

1.24K-1%

1 2

MOD_MCH_PSEL_2_1V5

R5435

1 2

1.24K-1%

To MCH

FREQ_SEL_2

22

45

To clk generators

R5423

1 2

1K-1%

+3.3V_AUX

3

ROOM=PROC1_BSEL_TRANSL

BSEL2, BSEL1, BSEL0, Processor Bus Speed 0, 0, 0, 1066MHz 0, 0, 1, 533MHz 0, 1, ?, 667MHz? 0, 1, ?, 667MHz? 1, 0, 0, 1333MHz

ROOM=PROC0_TRANS ROOM=PROC1_TRANS

13,15

MOD_MCH_CPU0_THERMTRIP_N

MOD_MCH_CPU0_PROCHOT_N

MOD_MCH_CPU0_IERR_N

ECAD: the components within each circuit need to stay clumped

+3.3V

21

To Debug CPLD

R3875

2.7K-5%

R4936

1 2

2.7K-5%

R3877

3

2

1K-1%

Q1808

3904

R3840

1

R3838

Q1806

3904

21

1

1K-1%

1 2

3

2

Q1920

3904

1

R4907

1K-1%

1 2

CPU0_THRMTRIP_3V

CPU0_PROCHOT_3V

CPU0_IERR_3V

3

95,128

96

95,129

17,19

C3408

1 2

1uF 6.3V

MOD_MCH_CPU1_THERMTRIP_N

MOD_MCH_CPU1_PROCHOT_N

MOD_MCH_CPU1_IERR_N

R5431

TODO: REMOVE PROCHOT IF NOT NEEDED

1.24K-1%

1 2

R4587

2.7K-5%

R4935

2.7K-5%

R3991

1 2

2.7K-5%

R5437

21

1 2

Q1904

3904

1

1.24K-1%

+3.3V

R4540

1 2

3

2

1K-1%

Q1919

3904

1

R4906

1 2

3

2

1K-1%

Q1818

3904

95,128

1

CPU_FORCEPR_N

21

R3981

1K-1%

3

2

1 2

CPU1_THRMTRIP_3V

CPU1_PROCHOT_3V

CPU1_IERR_3V

R5965

0-5%

Q3947

3904

1

3

2

ROOM=PROC0

95,128

96

95,129

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

2

3

MCH

211

4

2.7K-5%

FSB0&1: PU's & GTL LEVEL TRANSLATION

2

INC.

4

ROUND ROCK,TEXAS

TITLE

SCHEM, PLN, SV, PE2950, MLK

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

REV.

HX601

SHEET

A00

9/7/2007 20 OF 136

DCBA

A B C

D

9-7-2007_16:37

ROOM=XDP

ECAD: Place zero ohms near CPU1 to mimize stub ECAD: BPMS must daisy chain, no stubs!

1

13,15,17,54

24,30,53,63,71,72,91,96

2

I2C_CHIPSET_SDA

I2C_CHIPSET_SCL

CPU_PWRGOOD

POP9

17,21,22 17,21,22

R4800

1 2

0-5%

R5274

0-5%

R5275

1 2

0-5%

MOD_MCH_FSB1_BPM_5_N MOD_MCH_FSB1_BPM_4_N

17,21 17,21

17,21 18,21

21

MOD_MCH_FSB1_BPM_3_N MOD_MCH_FSB1_BPM_2_N

MOD_MCH_FSB1_BPM_1_N MOD_MCH_FSB1_BPM_0_N

NC_MOD_MCH_XDP0_23

MOD_MCH_FSB1_BPMB_3_N MOD_MCH_FSB1_BPMB_2_N

MOD_MCH_FSB1_BPMB_1_N MOD_MCH_FSB1_BPMB_0_N

MOD_MCH_XDP0_PWRGOOD

NC_MOD_MCH_XDP0_41

NC_MOD_MCH_XDP0_45 NC_MOD_MCH_XDP0_47

21,24 13,17

MOD_MCH_XDP0_TCK1 MOD_MCH_XDP0_TCK0

MOD_MCH_XDP0_SDA_R MOD_MCH_XDP0_SCL_R

21

R4511

51-5%

R4510

+CPU_VTT

ECAD: Terminate JTAG TCK0, TMS, TRST_N 51ohm PD/U's within 1" of end of last terminated CPU ECAD: Terminate JTAG TCK1- 51ohm PD's within 1" of level translation ckt

J_XDP0_CPU

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59

2X30 MICRO-SOCKET CONN

POP9

51-5%

1 2

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60

MOD_MCH_FSB0_BPM_5_N

MOD_MCH_FSB0_BPM_4_N

MOD_MCH_FSB0_BPM_3_N MOD_MCH_FSB0_BPM_2_N

MOD_MCH_FSB0_BPM_1_N MOD_MCH_FSB0_BPM_0_N

NC_MOD_MCH_XDP0_27NC_MOD_MCH_XDP0_21 NC_MOD_MCH_XDP0_24

MOD_MCH_FSB0_BPMB_3_N MOD_MCH_FSB0_BPMB_2_N

MOD_MCH_FSB0_BPMB_1_N MOD_MCH_FSB0_BPMB_0_N

CK_333M_XDP0_P CK_333M_XDP0_N

MOD_MCH_XDP0_CPURST_N_R RESET_BTN_N

MOD_MCH_XDP0_TDO_MAIN MOD_MCH_XDP0_TRST_N MOD_MCH_XDP0_TDI_MAIN MOD_MCH_XDP0_TMS

21

R1006

51-5%

Depop R1006 for first rev

46,47 46,47

ECAD: Placement of TDI PU is arbitrary

13,21,22 13,21,22

13,21 13,21

+CPU_VTT

51-5%

R4512

51-5%

1 2

POP9

21 30,54,58,95,128

21 13,17,21,24 21 13,17,21,24

13,21 13,21

13,21 14,21

+CPU_VTT

21

R4822

XDP_BCLK

MLK: 0 ohm Res R25 added to reduce the stub on TDI MCH & ESB Signals

ECAD: Place PU's within 1" of corresponding PROC

CPU 0 or 1 JTAG jumper

JTAG CHAIN BUSTERS

NP

1 2

MOD_MCH_XDP0_TDI_MAIN

21

24

21

MOD_MCH_XDP0_TDO_MCH

MOD_MCH_XDP0_TDO_ESB

R4663

1 2

0-5% 0-5%

NP

R25

0-5%

X

1 2

NP

1 2

R5752

0-5%

R5751

X X

ROOM = MCH

ECAD: place by MCH and GTL level shifters to reduce stubs

NP

0-5%

NP

1 2

R5753

X

+CPU_VTT

MOD_MCH_XDP0_TDI_CPU0

MOD_MCH_XDP0_TDI_MCH

MOD_MCH_XDP0_TDI_ESB

NP

R5750

X

R5754

X

12

0-5%

1 2

MOD_MCH_XDP0_TDO_MAIN

13

1

24

21

2

3

4

+CPU_VTT

R994

NP

1 2

51-5%

R996

1 2

51-5%

R998

1 2

51-5%

R5807

1 2

51-5%

R5809

1 2

51-5%

R1002

NP

51-5%

R1004

51-5%

R1001

51-5%

R5814

1 2

51-5%

R5812

1 2

51-5%

X

21

X

21

BPM[4:5]# sigs - XDP:BNB:2.2

MOD_MCH_FSB0_BPM_5_N

R995

NP

1 2

51-5%

R5808

51-5%

R997

R999

51-5%

R5810

51-5%

R1003

51-5%

R1005

51-5%

R1000

51-5%

R5813

51-5%

R5811

51-5%

21

X

21

X

21

MOD_MCH_FSB0_BPM_4_N

MOD_MCH_FSB0_BPM_3_N

MOD_MCH_FSB0_BPM_2_N

MOD_MCH_FSB0_BPM_1_N

MOD_MCH_FSB0_BPM_0_N

MOD_MCH_FSB0_BPMB_3_N

MOD_MCH_FSB0_BPMB_2_N

MOD_MCH_FSB0_BPMB_1_N

MOD_MCH_FSB0_BPMB_0_N

MOD_MCH_FSB1_BPM_5_N

MOD_MCH_FSB1_BPM_4_N

MOD_MCH_FSB1_BPM_3_N

MOD_MCH_FSB1_BPM_2_N

MOD_MCH_FSB1_BPM_1_N

MOD_MCH_FSB1_BPM_0_N

MOD_MCH_FSB1_BPMB_3_N

MOD_MCH_FSB1_BPMB_2_N

MOD_MCH_FSB1_BPMB_1_N

MOD_MCH_FSB1_BPMB_0_N

13,21,22

13,21

14,21

17,21,22

17,21

18,21

ECAD: Place PU near translator <1"

GTL side of translator ESB2 side of translator

13,17,21,24 13,17,21,24

21,24

21

MOD_MCH_XDP0_TRST_N MOD_MCH_XDP0_TMS MOD_MCH_XDP0_TCK1 MOD_MCH_XDP0_TDI_ESB

MOD_MCH_XDP0_TDO_ESB NC_MOD_MCH_U_JTAG_T_2_3 NC_MOD_MCH_U_JTAG_T_2_5 NC_MOD_MCH_U_JTAG_T_2_6

XDP 0 header and logic

NP

21

R4823

X

51-5%

+3.3V

NP

R4745

X

+CPU_VTT

R4821

1 2

NP

R4744

X

1 2

1K-1%

1 2

ECAD: Place PU near translator <1"

51-5%

+3.3V

NP

1K-1%

NP

2

A0

3

A1

5

A2

6

A3

1

DIR

14 7

VCC GND1

NP

2

A0

3

A1

5

A2

6

A3

1

DIR

VCC GND1

NP

U_JTAG_T_1

GTLREF

GND2 GND3

GTL2005

U_JTAG_T_2

GTLREF

GND2 GND3

GTL2005

13

B0

12

B1

10

B2

9

B3

4

8

X

11

13

B0

12

B1

10

B2

9

B3

4

714 8

X

11

XDP0_TRST_N_3V XDP0_TMS_3V XDP0_TCK1_3V XDP0_TDI_ESB_3V

XDP0_TDO_ESB_3V MOD_MCH_U_JTAG_T_2_PD

NP

R4746

X

1 2

53 53 53 53

53

1K-1%

MOD_MCH_XDP0_TDI_CPU1

17

MOD_MCH_XDP0_TDO_CPU0

MOD_MCH_XDP0_TDO_CPU1

13,21

17,21

17,19,22

MOD_MCH_XDP0_TDO_CPU0

MOD_MCH_XDP0_TDO_CPU1

MOD_MCH_FSB1_RST_N

+CPU_VTT

NP

21

R4769

X

NP

R4775

X

1 2

13,21

17,21 21

100-1% 49.9-1%

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

R4499

R4498

1 2

0-5%

NP

POP9

0-5%

1 2

MOD_MCH_XDP0_TDO_MAIN

X

U_XDP_QS

1

B1

2

GND

NC7SB3157

POP9

S: L -> A= B0; H -> A=B1

R4797

1 2

1K-1%

POP9

MOD_MCH_XDP0_CPURST_N_R

TITLE

DWG NO.

DATE

R3832

Do not use header if QS populated, see XDP JTAG pdf

6

S

5

VCC

43

AB0

51-5%

1 2

WARNING:

J_XDP_JTAG

1 2 3

X

+3.3V

CPU1_PRES_N

MOD_MCH_XDP0_TDO_MAIN

MODULE: DESC: REV: OF

NP

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

HX601

SHEET

21

3

17,95,119,128

21

MCH

CPUS,FSB,NB,XDP0,XDP1

SEC

211

4

REV.

A00

21 OF 1369/7/2007

C

DBA

A B C

D

1

2

3

12 12 12 12

MOD_MCH_FSB0_D63_N

12

MOD_MCH_FSB0_D62_N

12

MOD_MCH_FSB0_D61_N

12

MOD_MCH_FSB0_D60_N

12

MOD_MCH_FSB0_D59_N

12

MOD_MCH_FSB0_D58_N

12

MOD_MCH_FSB0_D57_N

12

MOD_MCH_FSB0_D56_N

12

MOD_MCH_FSB0_D55_N

12

MOD_MCH_FSB0_D54_N

12

MOD_MCH_FSB0_D53_N

12

MOD_MCH_FSB0_D52_N

12

MOD_MCH_FSB0_D51_N

12

MOD_MCH_FSB0_D50_N

12

MOD_MCH_FSB0_D49_N

12

MOD_MCH_FSB0_D48_N

12

MOD_MCH_FSB0_D47_N

12

MOD_MCH_FSB0_D46_N

12

MOD_MCH_FSB0_D45_N

12

MOD_MCH_FSB0_D44_N

12

MOD_MCH_FSB0_D43_N

12

MOD_MCH_FSB0_D42_N

12

MOD_MCH_FSB0_D41_N

12

MOD_MCH_FSB0_D40_N

12

MOD_MCH_FSB0_D39_N

12

MOD_MCH_FSB0_D38_N

12

MOD_MCH_FSB0_D37_N

12

MOD_MCH_FSB0_D36_N

12

MOD_MCH_FSB0_D35_N

12

MOD_MCH_FSB0_D34_N

12

MOD_MCH_FSB0_D33_N

12

MOD_MCH_FSB0_D32_N

12

MOD_MCH_FSB0_D31_N

12

MOD_MCH_FSB0_D30_N

12

MOD_MCH_FSB0_D29_N

12

MOD_MCH_FSB0_D28_N

12

MOD_MCH_FSB0_D27_N

12

MOD_MCH_FSB0_D26_N

12

MOD_MCH_FSB0_D25_N

12

MOD_MCH_FSB0_D24_N

12

MOD_MCH_FSB0_D23_N

12

MOD_MCH_FSB0_D22_N

12

MOD_MCH_FSB0_D21_N

12

MOD_MCH_FSB0_D20_N

12

MOD_MCH_FSB0_D19_N

12

MOD_MCH_FSB0_D18_N

12

MOD_MCH_FSB0_D17_N

12

MOD_MCH_FSB0_D16_N

12

MOD_MCH_FSB0_D15_N

12

MOD_MCH_FSB0_D14_N

12

MOD_MCH_FSB0_D13_N

12

MOD_MCH_FSB0_D12_N

12

MOD_MCH_FSB0_D11_N

12

MOD_MCH_FSB0_D10_N

12

MOD_MCH_FSB0_D9_N

12

MOD_MCH_FSB0_D8_N

12

MOD_MCH_FSB0_D7_N

12

MOD_MCH_FSB0_D6_N

12

MOD_MCH_FSB0_D5_N

12

MOD_MCH_FSB0_D4_N

12

MOD_MCH_FSB0_D3_N

12

MOD_MCH_FSB0_D2_N

12

MOD_MCH_FSB0_D1_N

12

MOD_MCH_FSB0_D0_N

12

MOD_MCH_FSB0_DBI_3_N MOD_MCH_FSB0_DBI_2_N MOD_MCH_FSB0_DBI_1_N MOD_MCH_FSB0_DBI_0_N

MOD_MCH_FSB0_DSTBP_3_N MOD_MCH_FSB0_DSTBP_2_N MOD_MCH_FSB0_DSTBP_1_N MOD_MCH_FSB0_DSTBP_0_N

AE37 AE36 AH36 AG36 AF38 AE38 AH38 AJ38 AJ37 AG35 AK36 AL37 AL36 AL38 AJ34 AF37 AE28 AD29 AF28 AC31 AE29 AC30 AD30 AE31 AE32 AD35 AF33 AG32 AF31 AE34 AG30 AG33 AM37 AK35 AM34 AM38 AP38 AN36 AL35 AN35 AP36 AT37 AU36 AP34 AT36 AP35 AL34 AN33 AJ33 AG27 AG29 AM33 AH31 AJ30 AH32 AJ31 AL31 AK30 AN32 AH29 AK29 AH28 AL29 AJ28

AH37 AF30 AP37 AL32

AH35 AD33 AR38 AK33

FSB0_D_63_N FSB0_D_62_N FSB0_D_61_N FSB0_D_60_N FSB0_D_59_N FSB0_D_58_N FSB0_D_57_N FSB0_D_56_N FSB0_D_55_N FSB0_D_54_N FSB0_D_53_N FSB0_D_52_N FSB0_D_51_N FSB0_D_50_N FSB0_D_49_N FSB0_D_48_N FSB0_D_47_N FSB0_D_46_N FSB0_D_45_N FSB0_D_44_N FSB0_D_43_N FSB0_D_42_N FSB0_D_41_N FSB0_D_40_N FSB0_D_39_N FSB0_D_38_N FSB0_D_37_N FSB0_D_36_N FSB0_D_35_N FSB0_D_34_N FSB0_D_33_N FSB0_D_32_N FSB0_D_31_N FSB0_D_30_N FSB0_D_29_N FSB0_D_28_N FSB0_D_27_N FSB0_D_26_N FSB0_D_25_N FSB0_D_24_N FSB0_D_23_N FSB0_D_22_N FSB0_D_21_N FSB0_D_20_N FSB0_D_19_N FSB0_D_18_N FSB0_D_17_N FSB0_D_16_N FSB0_D_15_N FSB0_D_14_N FSB0_D_13_N FSB0_D_12_N FSB0_D_11_N FSB0_D_10_N FSB0_D_9_N FSB0_D_8_N FSB0_D_7_N FSB0_D_6_N FSB0_D_5_N FSB0_D_4_N FSB0_D_3_N FSB0_D_2_N FSB0_D_1_N FSB0_D_0_N

FSB0_DBI_3_N FSB0_DBI_2_N FSB0_DBI_1_N FSB0_DBI_0_N

FSB0_DSTBP_3_N FSB0_DSTBP_2_N FSB0_DSTBP_1_N FSB0_DSTBP_0_N

U_MCH

FSB0_A_35_N FSB0_A_34_N FSB0_A_33_N FSB0_A_32_N FSB0_A_31_N FSB0_A_30_N FSB0_A_29_N FSB0_A_28_N FSB0_A_27_N FSB0_A_26_N FSB0_A_25_N FSB0_A_24_N FSB0_A_23_N FSB0_A_22_N FSB0_A_21_N FSB0_A_20_N FSB0_A_19_N FSB0_A_18_N FSB0_A_17_N FSB0_A_16_N FSB0_A_15_N FSB0_A_14_N FSB0_A_13_N FSB0_A_12_N FSB0_A_11_N FSB0_A_10_N

FSB0_A_9_N FSB0_A_8_N FSB0_A_7_N FSB0_A_6_N FSB0_A_5_N FSB0_A_4_N FSB0_A_3_N

FSB0_REQ_4_N FSB0_REQ_3_N FSB0_REQ_2_N FSB0_REQ_1_N FSB0_REQ_0_N

FSB0_ADSTB_1_N FSB0_ADSTB_0_N

FSB0_BPRI_N FSB0_DEFER_N FSB0_RESET_N

FSB0_RS_2_N

FSB0_RS_1_N

FSB0_RS_0_N

FSB0_RSP_N

FSB0_TRDY_N

FSB0_ADS_N FSB0_AP_1_N FSB0_AP_0_N

FSB0_BINIT_N

FSB0_BNR_N

FSB0_BPM_5_N

FSB0_BPM_4_N FSB0_BREQ_1_N FSB0_BREQ_0_N

FSB0_DBSY_N FSB0_DP_3_N FSB0_DP_2_N FSB0_DP_1_N FSB0_DP_0_N FSB0_DRDY_N

FSB0_HIT_N FSB0_HITM_N FSB0_LOCK_N

FSB0_MCERR_N

AV22 AU22 AR22 AP22 AV24 AT23 AU23 AV25 AT24 AR25 AU26 AT26 AT27 AU25 AU28 AR24 AR27 AP25 AV28 AF22 AG23 AF25 AH22 AL22 AJ22 AG24 AM22 AH23 AP26 AN26 AM25 AN24 AL25

AJ25 AJ24 AK24 AH25 AL26

AP23 AL23

AU34 AV34 AN30 AU31 AL28 AV31 AN27 AT32

AU29 AK26 AH26 AK27 AV30 AP29 AR28 AG26 AM28 AR30 AN29 AP31 AT33 AR31 AT29 AU32 AV33 AT30 AJ27

MOD_MCH_FSB0_A35_N MOD_MCH_FSB0_A34_N MOD_MCH_FSB0_A33_N MOD_MCH_FSB0_A32_N MOD_MCH_FSB0_A31_N MOD_MCH_FSB0_A30_N MOD_MCH_FSB0_A29_N MOD_MCH_FSB0_A28_N MOD_MCH_FSB0_A27_N MOD_MCH_FSB0_A26_N MOD_MCH_FSB0_A25_N MOD_MCH_FSB0_A24_N MOD_MCH_FSB0_A23_N MOD_MCH_FSB0_A22_N MOD_MCH_FSB0_A21_N MOD_MCH_FSB0_A20_N MOD_MCH_FSB0_A19_N MOD_MCH_FSB0_A18_N MOD_MCH_FSB0_A17_N MOD_MCH_FSB0_A16_N MOD_MCH_FSB0_A15_N MOD_MCH_FSB0_A14_N MOD_MCH_FSB0_A13_N MOD_MCH_FSB0_A12_N MOD_MCH_FSB0_A11_N MOD_MCH_FSB0_A10_N MOD_MCH_FSB0_A9_N MOD_MCH_FSB0_A8_N MOD_MCH_FSB0_A7_N MOD_MCH_FSB0_A6_N MOD_MCH_FSB0_A5_N MOD_MCH_FSB0_A4_N MOD_MCH_FSB0_A3_N

MOD_MCH_FSB0_REQ_4_N MOD_MCH_FSB0_REQ_3_N MOD_MCH_FSB0_REQ_2_N MOD_MCH_FSB0_REQ_1_N MOD_MCH_FSB0_REQ_0_N

MOD_MCH_FSB0_ADSTB_1_N MOD_MCH_FSB0_ADSTB_0_N

MOD_MCH_FSB0_BPRI_N MOD_MCH_FSB0_DEFER_N MOD_MCH_FSB0_RST_N MOD_MCH_FSB0_RS_2_N MOD_MCH_FSB0_RS_1_N MOD_MCH_FSB0_RS_0_N MOD_MCH_FSB0_RSP_N MOD_MCH_FSB0_TRDY_N

MOD_MCH_FSB0_ADS_N MOD_MCH_FSB0_AP_1_N MOD_MCH_FSB0_AP_0_N MOD_MCH_FSB0_BINIT_N MOD_MCH_FSB0_BNR_N MOD_MCH_FSB0_BPM_5_N MOD_MCH_FSB0_BPM_4_N MOD_MCH_FSB0_BREQ_1_N MOD_MCH_FSB0_BREQ_0_N MOD_MCH_FSB0_DBSY_N MOD_MCH_FSB0_DP_3_N MOD_MCH_FSB0_DP_2_N MOD_MCH_FSB0_DP_1_N MOD_MCH_FSB0_DP_0_N MOD_MCH_FSB0_DRDY_N MOD_MCH_FSB0_HIT_N MOD_MCH_FSB0_HITM_N MOD_MCH_FSB0_LOCK_N MOD_MCH_FSB0_MCERR_N

12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12

12 12 12 12 12

12 12

13 13 13,15 13 13 13 13 13

13 13 13 13 13

13,15 13,15 13 13 13 13 13 13 13 13 13 13

13,21 13,21

MOD_MCH_FSB1_D63_N

16

MOD_MCH_FSB1_D62_N

16

MOD_MCH_FSB1_D61_N

16

MOD_MCH_FSB1_D60_N

16

MOD_MCH_FSB1_D59_N

16

MOD_MCH_FSB1_D58_N

16

MOD_MCH_FSB1_D57_N

16

MOD_MCH_FSB1_D56_N

16

MOD_MCH_FSB1_D55_N

16

MOD_MCH_FSB1_D54_N

16

MOD_MCH_FSB1_D53_N

16

MOD_MCH_FSB1_D52_N

16

MOD_MCH_FSB1_D51_N

16

MOD_MCH_FSB1_D50_N

16

MOD_MCH_FSB1_D49_N

16

MOD_MCH_FSB1_D48_N

16

MOD_MCH_FSB1_D47_N

16

MOD_MCH_FSB1_D46_N

16

MOD_MCH_FSB1_D45_N

16

MOD_MCH_FSB1_D44_N

16

MOD_MCH_FSB1_D43_N

16

MOD_MCH_FSB1_D42_N

16

MOD_MCH_FSB1_D41_N

16

MOD_MCH_FSB1_D40_N

16

MOD_MCH_FSB1_D39_N

16

MOD_MCH_FSB1_D38_N

16

MOD_MCH_FSB1_D37_N

16

MOD_MCH_FSB1_D36_N

16

MOD_MCH_FSB1_D35_N

16

MOD_MCH_FSB1_D34_N

16

MOD_MCH_FSB1_D33_N

16

MOD_MCH_FSB1_D32_N

16

MOD_MCH_FSB1_D31_N

16

MOD_MCH_FSB1_D30_N

16

MOD_MCH_FSB1_D29_N

16

MOD_MCH_FSB1_D28_N

16

MOD_MCH_FSB1_D27_N

16

MOD_MCH_FSB1_D26_N

16

MOD_MCH_FSB1_D25_N

16

MOD_MCH_FSB1_D24_N

16

MOD_MCH_FSB1_D23_N

16

MOD_MCH_FSB1_D22_N

16

MOD_MCH_FSB1_D21_N

16

MOD_MCH_FSB1_D20_N

16

MOD_MCH_FSB1_D19_N

16

MOD_MCH_FSB1_D18_N

16

MOD_MCH_FSB1_D17_N

16

MOD_MCH_FSB1_D16_N

16

MOD_MCH_FSB1_D15_N

16

MOD_MCH_FSB1_D14_N

16

MOD_MCH_FSB1_D13_N

16

MOD_MCH_FSB1_D12_N

16

MOD_MCH_FSB1_D11_N

16

MOD_MCH_FSB1_D10_N

16

MOD_MCH_FSB1_D9_N

16

MOD_MCH_FSB1_D8_N

16

MOD_MCH_FSB1_D7_N

16

MOD_MCH_FSB1_D6_N

16

MOD_MCH_FSB1_D5_N

16

MOD_MCH_FSB1_D4_N

16

MOD_MCH_FSB1_D3_N

16

MOD_MCH_FSB1_D2_N

16

MOD_MCH_FSB1_D1_N

16

MOD_MCH_FSB1_D0_N

16

MOD_MCH_FSB1_DBI_3_N

16

MOD_MCH_FSB1_DBI_2_N

16

MOD_MCH_FSB1_DBI_1_N

16

MOD_MCH_FSB1_DBI_0_N

16

MOD_MCH_FSB1_DSTBP_3_N

16

MOD_MCH_FSB1_DSTBP_2_N

16

MOD_MCH_FSB1_DSTBP_1_N

16

MOD_MCH_FSB1_DSTBP_0_N

16

AF16 AG14 AJ16 AJ15 AG15 AF15 AJ13 AL16 AP16 AH16 AN15 AL14 AM15 AN14 AM16 AH14 AP14 AR12 AR13 AP11 AP13 AT12 AT11 AV12 AV10 AU10

AV9 AT8 AR9 AT9 AU8

AV7 AK12 AL13 AL11 AM13 AN11 AM12 AN12

AN9

AN8

AP8

AM9

AM6

AK9

AN6

AL8

AL7

AU5

AR7

AU7

AR6

AT6

AV4

AV6

AT5

AT3

AT2

AR4

AR3

AR1

AP4

AP5

AP1

AH13 AU11 AK11

AP7

AK15 AR10 AM10

AU4

FSB1_D_63_N FSB1_D_62_N FSB1_D_61_N FSB1_D_60_N FSB1_D_59_N FSB1_D_58_N FSB1_D_57_N FSB1_D_56_N FSB1_D_55_N FSB1_D_54_N FSB1_D_53_N FSB1_D_52_N FSB1_D_51_N FSB1_D_50_N FSB1_D_49_N FSB1_D_48_N FSB1_D_47_N FSB1_D_46_N FSB1_D_45_N FSB1_D_44_N FSB1_D_43_N FSB1_D_42_N FSB1_D_41_N FSB1_D_40_N FSB1_D_39_N FSB1_D_38_N FSB1_D_37_N FSB1_D_36_N FSB1_D_35_N FSB1_D_34_N FSB1_D_33_N FSB1_D_32_N FSB1_D_31_N FSB1_D_30_N FSB1_D_29_N FSB1_D_28_N FSB1_D_27_N FSB1_D_26_N FSB1_D_25_N FSB1_D_24_N FSB1_D_23_N FSB1_D_22_N FSB1_D_21_N FSB1_D_20_N FSB1_D_19_N FSB1_D_18_N FSB1_D_17_N FSB1_D_16_N FSB1_D_15_N FSB1_D_14_N FSB1_D_13_N FSB1_D_12_N FSB1_D_11_N FSB1_D_10_N FSB1_D_9_N FSB1_D_8_N FSB1_D_7_N FSB1_D_6_N FSB1_D_5_N FSB1_D_4_N FSB1_D_3_N FSB1_D_2_N FSB1_D_1_N FSB1_D_0_N

FSB1_DBI_3_N FSB1_DBI_2_N FSB1_DBI_1_N FSB1_DBI_0_N

FSB1_DSTBP_3_N FSB1_DSTBP_2_N FSB1_DSTBP_1_N FSB1_DSTBP_0_N

U_MCH

FSB1_A_35_N FSB1_A_34_N FSB1_A_33_N FSB1_A_32_N FSB1_A_31_N FSB1_A_30_N FSB1_A_29_N FSB1_A_28_N FSB1_A_27_N FSB1_A_26_N FSB1_A_25_N FSB1_A_24_N FSB1_A_23_N FSB1_A_22_N FSB1_A_21_N FSB1_A_20_N FSB1_A_19_N FSB1_A_18_N FSB1_A_17_N FSB1_A_16_N FSB1_A_15_N FSB1_A_14_N FSB1_A_13_N FSB1_A_12_N FSB1_A_11_N FSB1_A_10_N

FSB1_A_9_N FSB1_A_8_N FSB1_A_7_N FSB1_A_6_N FSB1_A_5_N FSB1_A_4_N FSB1_A_3_N

FSB1_REQ_4_N FSB1_REQ_3_N FSB1_REQ_2_N FSB1_REQ_1_N FSB1_REQ_0_N

FSB1_ADSTB_1_N FSB1_ADSTB_0_N

FSB1_BPRI_N FSB1_DEFER_N FSB1_RESET_N

FSB1_RS_2_N

FSB1_RS_1_N

FSB1_RS_0_N

FSB1_RSP_N

FSB1_TRDY_N

FSB1_ADS_N FSB1_AP_1_N FSB1_AP_0_N

FSB1_BINIT_N

FSB1_BNR_N

FSB1_BPM_5_N

FSB1_BPM_4_N FSB1_BREQ_1_N FSB1_BREQ_0_N

FSB1_DBSY_N FSB1_DP_3_N FSB1_DP_2_N FSB1_DP_1_N FSB1_DP_0_N FSB1_DRDY_N

FSB1_HIT_N FSB1_HITM_N FSB1_LOCK_N

FSB1_MCERR_N

AC3 AC4 AD2 AE1 AE2 AE4 AD3 AF3 AF1 AJ3 AH1 AH2 AD5 AC6 AE5 AD6 AH5 AG5 AF4 AA12 AC7 AB10 AC9 AD8 AF6 AB11 AE7 AF7 AG8 AH8 AC12 AD9 AD12

AE10 AF9 AJ6 AD11 AG9

AG3 AC10

AJ10 AJ9 AE11 AL5 AL1 AK5 AK2 AK6

AP2 AG10 AG12 AJ4 AK3 AN3 AN2 AM1 AL2 AM4 AF13 AF12 AJ12 AG11 AM3 AK8 AJ7 AL4 AH11

MOD_MCH_FSB1_A35_N MOD_MCH_FSB1_A34_N MOD_MCH_FSB1_A33_N MOD_MCH_FSB1_A32_N MOD_MCH_FSB1_A31_N MOD_MCH_FSB1_A30_N MOD_MCH_FSB1_A29_N MOD_MCH_FSB1_A28_N MOD_MCH_FSB1_A27_N MOD_MCH_FSB1_A26_N MOD_MCH_FSB1_A25_N MOD_MCH_FSB1_A24_N MOD_MCH_FSB1_A23_N MOD_MCH_FSB1_A22_N MOD_MCH_FSB1_A21_N MOD_MCH_FSB1_A20_N MOD_MCH_FSB1_A19_N MOD_MCH_FSB1_A18_N MOD_MCH_FSB1_A17_N MOD_MCH_FSB1_A16_N MOD_MCH_FSB1_A15_N MOD_MCH_FSB1_A14_N MOD_MCH_FSB1_A13_N MOD_MCH_FSB1_A12_N MOD_MCH_FSB1_A11_N MOD_MCH_FSB1_A10_N MOD_MCH_FSB1_A9_N MOD_MCH_FSB1_A8_N MOD_MCH_FSB1_A7_N MOD_MCH_FSB1_A6_N MOD_MCH_FSB1_A5_N MOD_MCH_FSB1_A4_N MOD_MCH_FSB1_A3_N

MOD_MCH_FSB1_REQ_4_N MOD_MCH_FSB1_REQ_3_N MOD_MCH_FSB1_REQ_2_N MOD_MCH_FSB1_REQ_1_N MOD_MCH_FSB1_REQ_0_N

MOD_MCH_FSB1_ADSTB_1_N MOD_MCH_FSB1_ADSTB_0_N

MOD_MCH_FSB1_BPRI_N MOD_MCH_FSB1_DEFER_N MOD_MCH_FSB1_RST_N MOD_MCH_FSB1_RS_2_N MOD_MCH_FSB1_RS_1_N MOD_MCH_FSB1_RS_0_N MOD_MCH_FSB1_RSP_N MOD_MCH_FSB1_TRDY_N

MOD_MCH_FSB1_ADS_N MOD_MCH_FSB1_AP_1_N MOD_MCH_FSB1_AP_0_N MOD_MCH_FSB1_BINIT_N

MOD_MCH_FSB1_BNR_N MOD_MCH_FSB1_BPM_5_N MOD_MCH_FSB1_BPM_4_N

MOD_MCH_FSB1_BREQ_1_N MOD_MCH_FSB1_BREQ_0_N MOD_MCH_FSB1_DBSY_N MOD_MCH_FSB1_DP_3_N MOD_MCH_FSB1_DP_2_N MOD_MCH_FSB1_DP_1_N MOD_MCH_FSB1_DP_0_N MOD_MCH_FSB1_DRDY_N MOD_MCH_FSB1_HIT_N MOD_MCH_FSB1_HITM_N MOD_MCH_FSB1_LOCK_N MOD_MCH_FSB1_MCERR_N

16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16

16 16 16 16 16

17 17

17,19,21

17 17 17 17

17

17 17 17 17 17

17,19 17,19 17 17 17 17 17 17 17 17 17 17

1

2

16 16

17,21 17,21

3

4

12 12 12 12

CK_333M_MCH_P

45

CK_333M_MCH_N

45

MOD_MCH_FSB0_DSTBN_3_N MOD_MCH_FSB0_DSTBN_2_N MOD_MCH_FSB0_DSTBN_1_N MOD_MCH_FSB0_DSTBN_0_N

AH34 AD32 AR37 AK32

AN17 AP17

FSB0_DSTBN_3_N FSB0_DSTBN_2_N FSB0_DSTBN_1_N FSB0_DSTBN_0_N

CORECLKP CORECLKN

ECAD: Place VREF caps as close as possible to MCH pin

GREENCREEK REV 3.1

HETERO 4 OF 11

PSEL_2 PSEL_1 PSEL_0

FSB0_VREF_AF34 FSB0_VREF_AM27 FSB0_VREF_AM30

AB1 AB2 AC1

AF34

MOD_MCH_PSEL_2_1V5 MOD_MCH_PSEL_1_1V5 MOD_MCH_PSEL_0_1V5

MOD_MCH_FSB0_VREF

20 20 20

28

AM27 AM30

C2753

1 2

220pF

50V-10%

C2752

1 2

220pF

50V-10%

C2749

1 2

220pF

50V-10%

ROOM = MCH_FSB0_VREF_CAPS

MCH CPU interface

MOD_MCH_FSB1_DSTBN_3_N

16

MOD_MCH_FSB1_DSTBN_2_N

16

MOD_MCH_FSB1_DSTBN_1_N

16

MOD_MCH_FSB1_DSTBN_0_N

16

28 28 28

MOD_MCH_CORE_VCCA

MOD_MCH_FSB_VCCA

MOD_MCH_CORE_VSSA

AK14 AP10 AL10

AT17 AU17 AU16

FSB1_DSTBN_3_N FSB1_DSTBN_2_N FSB1_DSTBN_1_N

AU3

FSB1_DSTBN_0_N

COREVCCA FSBVCCA COREVSSA

FSB1_VREF_AH4 FSB1_VREF_AN5

FSB1_VREF_AT14

GREENCREEK REV 3.1

HETERO 5 OF 11

ECAD: Place VREF caps as close as possible to MCH pin

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

FSBCRES FSBODTCRES FSBSLWCRES FSBSLWCTRL

AT35 AR34 AU35 AV13

AH4 AN5 AT14

MOD_MCH_FSB_CRES MOD_MCH_FSB_ODTCRES MOD_MCH_FSB_SLWCRES MOD_MCH_FSB_SLWCTRL

MOD_MCH_FSB1_VREF

1 2

220pF

50V-10%

C2750

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

DATE

9/7/2007 22 OF 136

C2751

1 2

HX601

220pF

50V-10%

C2748

1 2

28 28 28 28

28

ROOM = MCH_FSB1_VREF_CAPS

220pF

50V-10%

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

INC.

ROUND ROCK,TEXAS

REV.

A00

SHEET

MCH

211

4

C

DBA

A B C

D

1

2

FBD_CH0_MCH_NB_13_P

32

FBD_CH0_MCH_NB_12_P

32

FBD_CH0_MCH_NB_11_P

32

FBD_CH0_MCH_NB_10_P

32

FBD_CH0_MCH_NB_9_P

32

FBD_CH0_MCH_NB_8_P

32

FBD_CH0_MCH_NB_7_P

32

FBD_CH0_MCH_NB_6_P

32

FBD_CH0_MCH_NB_5_P

32

FBD_CH0_MCH_NB_4_P

32

FBD_CH0_MCH_NB_3_P

32

FBD_CH0_MCH_NB_2_P

32

FBD_CH0_MCH_NB_1_P

32

FBD_CH0_MCH_NB_0_P

32

FBD_CH0_MCH_NB_13_N

32

FBD_CH0_MCH_NB_12_N

32

FBD_CH0_MCH_NB_11_N

32

FBD_CH0_MCH_NB_10_N

32

FBD_CH0_MCH_NB_9_N

32

FBD_CH0_MCH_NB_8_N

32

FBD_CH0_MCH_NB_7_N

32

FBD_CH0_MCH_NB_6_N

32

FBD_CH0_MCH_NB_5_N

32

FBD_CH0_MCH_NB_4_N

32

FBD_CH0_MCH_NB_3_N

32

FBD_CH0_MCH_NB_2_N

32

FBD_CH0_MCH_NB_1_N

32

FBD_CH0_MCH_NB_0_N

32

V29 U30 U36 V35 W34 U33 V32 T31 W28 U28 V27

AB31

Y30 Y27

V30 U31 U37 V36 W35 U34 V33 T32 W29 T28 U27

AB32

Y31 Y28

FBD0NBIP_13 FBD0NBIP_12 FBD0NBIP_11 FBD0NBIP_10 FBD0NBIP_9 FBD0NBIP_8 FBD0NBIP_7 FBD0NBIP_6 FBD0NBIP_5 FBD0NBIP_4 FBD0NBIP_3 FBD0NBIP_2 FBD0NBIP_1 FBD0NBIP_0

FBD0NBIN_13 FBD0NBIN_12 FBD0NBIN_11 FBD0NBIN_10 FBD0NBIN_9 FBD0NBIN_8 FBD0NBIN_7 FBD0NBIN_6 FBD0NBIN_5 FBD0NBIN_4 FBD0NBIN_3 FBD0NBIN_2 FBD0NBIN_1 FBD0NBIN_0

U_MCH

Chan 0

Branch 0

FBD0SBOP_9 FBD0SBOP_8 FBD0SBOP_7 FBD0SBOP_6 FBD0SBOP_5 FBD0SBOP_4 FBD0SBOP_3 FBD0SBOP_2 FBD0SBOP_1 FBD0SBOP_0

FBD0SBON_9 FBD0SBON_8 FBD0SBON_7 FBD0SBON_6 FBD0SBON_5 FBD0SBON_4 FBD0SBON_3 FBD0SBON_2 FBD0SBON_1 FBD0SBON_0

AA36 AC34 AB35 AB37 AA38 Y36 Y34 AA32 V38 W32

AA35 AC33 AB34 AC37 AB38 Y37 Y33 AA33 W38 W31

FBD_CH0_MCH_SB_9_P FBD_CH0_MCH_SB_8_P FBD_CH0_MCH_SB_7_P FBD_CH0_MCH_SB_6_P FBD_CH0_MCH_SB_5_P FBD_CH0_MCH_SB_4_P FBD_CH0_MCH_SB_3_P FBD_CH0_MCH_SB_2_P FBD_CH0_MCH_SB_1_P FBD_CH0_MCH_SB_0_P

FBD_CH0_MCH_SB_9_N FBD_CH0_MCH_SB_8_N FBD_CH0_MCH_SB_7_N FBD_CH0_MCH_SB_6_N FBD_CH0_MCH_SB_5_N FBD_CH0_MCH_SB_4_N FBD_CH0_MCH_SB_3_N FBD_CH0_MCH_SB_2_N FBD_CH0_MCH_SB_1_N FBD_CH0_MCH_SB_0_N

32 32 32 32 32 32 32 32 32 32

FBD_CH2_MCH_NB_13_P

34

FBD_CH2_MCH_NB_12_P

34

FBD_CH2_MCH_NB_11_P

34

FBD_CH2_MCH_NB_10_P

34

FBD_CH2_MCH_NB_9_P

34

FBD_CH2_MCH_NB_8_P

34

FBD_CH2_MCH_NB_7_P

34

FBD_CH2_MCH_NB_6_P

34

FBD_CH2_MCH_NB_5_P

34

FBD_CH2_MCH_NB_4_P

34

FBD_CH2_MCH_NB_3_P

34

FBD_CH2_MCH_NB_2_P

34

FBD_CH2_MCH_NB_1_P

34

FBD_CH2_MCH_NB_0_P

34

FBD_CH2_MCH_NB_13_N

34

FBD_CH2_MCH_NB_12_N

34

FBD_CH2_MCH_NB_11_N

34

FBD_CH2_MCH_NB_10_N

34

FBD_CH2_MCH_NB_9_N

34

FBD_CH2_MCH_NB_8_N

34

FBD_CH2_MCH_NB_7_N

34

FBD_CH2_MCH_NB_6_N

34

FBD_CH2_MCH_NB_5_N

34

FBD_CH2_MCH_NB_4_N

34

FBD_CH2_MCH_NB_3_N

34

FBD_CH2_MCH_NB_2_N

34

FBD_CH2_MCH_NB_1_N

34

FBD_CH2_MCH_NB_0_N

34

C31

FBD2NBIP_13

B32

FBD2NBIP_12

D38

FBD2NBIP_11

C37

FBD2NBIP_10

C36

FBD2NBIP_9

B35

FBD2NBIP_8

C34

FBD2NBIP_7

B33

FBD2NBIP_6

B30

FBD2NBIP_5

B29

FBD2NBIP_4

C28

FBD2NBIP_3

B27

FBD2NBIP_2

B26

FBD2NBIP_1

C25

FBD2NBIP_0

B31

FBD2NBIN_13

A32

FBD2NBIN_12

E38

FBD2NBIN_11

D37

FBD2NBIN_10

B36

FBD2NBIN_9

A35

FBD2NBIN_8

B34

FBD2NBIN_7

A33

FBD2NBIN_6

A30

FBD2NBIN_5

A29

FBD2NBIN_4

B28

FBD2NBIN_3

A27

FBD2NBIN_2

A26

FBD2NBIN_1

B25

FBD2NBIN_0

U_MCH

Branch 1

Chan 2

FBD2SBOP_9 FBD2SBOP_8 FBD2SBOP_7 FBD2SBOP_6 FBD2SBOP_5 FBD2SBOP_4 FBD2SBOP_3 FBD2SBOP_2 FBD2SBOP_1 FBD2SBOP_0

FBD2SBON_9 FBD2SBON_8 FBD2SBON_7 FBD2SBON_6 FBD2SBON_5 FBD2SBON_4 FBD2SBON_3 FBD2SBON_2 FBD2SBON_1 FBD2SBON_0

E33 J32 H33 G34 D34 F32 D31 E30 F29 G28

E34 J33 H34 G35 D35 F33 D32 E31 F30 G29

FBD_CH2_MCH_SB_9_P FBD_CH2_MCH_SB_8_P FBD_CH2_MCH_SB_7_P FBD_CH2_MCH_SB_6_P FBD_CH2_MCH_SB_5_P FBD_CH2_MCH_SB_4_P FBD_CH2_MCH_SB_3_P FBD_CH2_MCH_SB_2_P FBD_CH2_MCH_SB_1_P FBD_CH2_MCH_SB_0_P

FBD_CH2_MCH_SB_9_N FBD_CH2_MCH_SB_8_N FBD_CH2_MCH_SB_7_N FBD_CH2_MCH_SB_6_N FBD_CH2_MCH_SB_5_N FBD_CH2_MCH_SB_4_N FBD_CH2_MCH_SB_3_N FBD_CH2_MCH_SB_2_N FBD_CH2_MCH_SB_1_N FBD_CH2_MCH_SB_0_N

34 34 34 34 34 34 34 34 34 34

1

2

3

33 33 33 33 33 33 33 33 33 33 33 33 33 33

46,47 46,47

FBD_CH1_MCH_NB_13_P FBD_CH1_MCH_NB_12_P FBD_CH1_MCH_NB_11_P FBD_CH1_MCH_NB_10_P FBD_CH1_MCH_NB_9_P FBD_CH1_MCH_NB_8_P FBD_CH1_MCH_NB_7_P FBD_CH1_MCH_NB_6_P FBD_CH1_MCH_NB_5_P FBD_CH1_MCH_NB_4_P FBD_CH1_MCH_NB_3_P FBD_CH1_MCH_NB_2_P FBD_CH1_MCH_NB_1_P FBD_CH1_MCH_NB_0_P

FBD_CH1_MCH_NB_13_N FBD_CH1_MCH_NB_12_N FBD_CH1_MCH_NB_11_N FBD_CH1_MCH_NB_10_N FBD_CH1_MCH_NB_9_N FBD_CH1_MCH_NB_8_N FBD_CH1_MCH_NB_7_N FBD_CH1_MCH_NB_6_N FBD_CH1_MCH_NB_5_N FBD_CH1_MCH_NB_4_N FBD_CH1_MCH_NB_3_N FBD_CH1_MCH_NB_2_N FBD_CH1_MCH_NB_1_N FBD_CH1_MCH_NB_0_N

CK_167M_BRANCH0_P CK_167M_BRANCH0_N

K31

FBD1NBIP_13

M32

FBD1NBIP_12

G38

FBD1NBIP_11

H36

FBD1NBIP_10

F36

FBD1NBIP_9

J35

FBD1NBIP_8

K34

FBD1NBIP_7

L33

FBD1NBIP_6

L30

FBD1NBIP_5

M29

FBD1NBIP_4

N28

FBD1NBIP_3

L27

FBD1NBIP_2

M26

FBD1NBIP_1

P27

FBD1NBIP_0

K32

FBD1NBIN_13

N32

FBD1NBIN_12

H38

FBD1NBIN_11

H37

FBD1NBIN_10

F37

FBD1NBIN_9

K35

FBD1NBIN_8

L34

FBD1NBIN_7

M33

FBD1NBIN_6

L31

FBD1NBIN_5

M30

FBD1NBIN_4

N29

FBD1NBIN_3

L28

FBD1NBIN_2

M27

FBD1NBIN_1

P28

FBD1NBIN_0

R38

FBD01CLKP

T38

FBD01CLKN

Chan 1

FBD1SBOP_9 FBD1SBOP_8 FBD1SBOP_7 FBD1SBOP_6 FBD1SBOP_5 FBD1SBOP_4 FBD1SBOP_3 FBD1SBOP_2 FBD1SBOP_1 FBD1SBOP_0

FBD1SBON_9 FBD1SBON_8 FBD1SBON_7 FBD1SBON_6 FBD1SBON_5 FBD1SBON_4 FBD1SBON_3 FBD1SBON_2 FBD1SBON_1 FBD1SBON_0

SPD0SMBCLK

SPD0SMBDATA

N38 R33 P34 R36 P37 N34 M35 K38 L36 J36

N37 R32 P33 R35 P36 N35 M36 L38 L37 J37

H13 G13

FBD_CH1_MCH_SB_9_P FBD_CH1_MCH_SB_8_P FBD_CH1_MCH_SB_7_P FBD_CH1_MCH_SB_6_P FBD_CH1_MCH_SB_5_P FBD_CH1_MCH_SB_4_P FBD_CH1_MCH_SB_3_P FBD_CH1_MCH_SB_2_P FBD_CH1_MCH_SB_1_P FBD_CH1_MCH_SB_0_P

FBD_CH1_MCH_SB_9_N FBD_CH1_MCH_SB_8_N FBD_CH1_MCH_SB_7_N FBD_CH1_MCH_SB_6_N FBD_CH1_MCH_SB_5_N FBD_CH1_MCH_SB_4_N FBD_CH1_MCH_SB_3_N FBD_CH1_MCH_SB_2_N FBD_CH1_MCH_SB_1_N FBD_CH1_MCH_SB_0_N

I2C_FBD_CH0_SCL I2C_FBD_CH0_SDA

33 33 33 33 33 33 33 33 33 33

MCH SM BUS 1 CH 0)

32 32

FBD_CH3_MCH_NB_13_P

35

FBD_CH3_MCH_NB_12_P

35

FBD_CH3_MCH_NB_11_P

35

FBD_CH3_MCH_NB_10_P

35

FBD_CH3_MCH_NB_9_P

35

FBD_CH3_MCH_NB_8_P

35

FBD_CH3_MCH_NB_7_P

35

FBD_CH3_MCH_NB_6_P

35

FBD_CH3_MCH_NB_5_P

35

FBD_CH3_MCH_NB_4_P

35

FBD_CH3_MCH_NB_3_P

35

FBD_CH3_MCH_NB_2_P

35

FBD_CH3_MCH_NB_1_P

35

FBD_CH3_MCH_NB_0_P

35

FBD_CH3_MCH_NB_13_N

35

FBD_CH3_MCH_NB_12_N

35

FBD_CH3_MCH_NB_11_N

35

FBD_CH3_MCH_NB_10_N

35

FBD_CH3_MCH_NB_9_N

35

FBD_CH3_MCH_NB_8_N

35

FBD_CH3_MCH_NB_7_N

35

FBD_CH3_MCH_NB_6_N

35

FBD_CH3_MCH_NB_5_N

35

FBD_CH3_MCH_NB_4_N

35

FBD_CH3_MCH_NB_3_N

35

FBD_CH3_MCH_NB_2_N

35

FBD_CH3_MCH_NB_1_N

35

FBD_CH3_MCH_NB_0_N

35

46,47 46,47

CK_167M_BRANCH1_P CK_167M_BRANCH1_N

D20

FBD3NBIP_13

C21

FBD3NBIP_12

D25

FBD3NBIP_11

E24

FBD3NBIP_10

F23

FBD3NBIP_9

A24

FBD3NBIP_8

D23

FBD3NBIP_7

B22

FBD3NBIP_6

D19

FBD3NBIP_5

A19

FBD3NBIP_4

B18

FBD3NBIP_3

C17

FBD3NBIP_2

F18

FBD3NBIP_1

G20

FBD3NBIP_0

C20

FBD3NBIN_13

B21

FBD3NBIN_12

D26

FBD3NBIN_11

E25

FBD3NBIN_10

F24

FBD3NBIN_9

B24

FBD3NBIN_8

C23

FBD3NBIN_7

A22

FBD3NBIN_6

E19

FBD3NBIN_5

B19

FBD3NBIN_4

C18

FBD3NBIN_3

D17

FBD3NBIN_2

E18

FBD3NBIN_1

F20

FBD3NBIN_0

D28

FBD23CLKP

E28

FBD23CLKN

Chan 3

FBD3SBOP_9 FBD3SBOP_8 FBD3SBOP_7 FBD3SBOP_6 FBD3SBOP_5 FBD3SBOP_4 FBD3SBOP_3 FBD3SBOP_2 FBD3SBOP_1 FBD3SBOP_0

FBD3SBON_9 FBD3SBON_8 FBD3SBON_7 FBD3SBON_6 FBD3SBON_5 FBD3SBON_4 FBD3SBON_3 FBD3SBON_2 FBD3SBON_1 FBD3SBON_0

SPD2SMBCLK

SPD2SMBDATA

H22 K19 H18 G19 J21 G23 J24 H25 G26 D22

H21 K18 J18 H19 J20 G22 J23 H24 G25 E22

F15 E15

FBD_CH3_MCH_SB_9_P FBD_CH3_MCH_SB_8_P FBD_CH3_MCH_SB_7_P FBD_CH3_MCH_SB_6_P FBD_CH3_MCH_SB_5_P FBD_CH3_MCH_SB_4_P FBD_CH3_MCH_SB_3_P FBD_CH3_MCH_SB_2_P FBD_CH3_MCH_SB_1_P FBD_CH3_MCH_SB_0_P

FBD_CH3_MCH_SB_9_N FBD_CH3_MCH_SB_8_N FBD_CH3_MCH_SB_7_N FBD_CH3_MCH_SB_6_N FBD_CH3_MCH_SB_5_N FBD_CH3_MCH_SB_4_N FBD_CH3_MCH_SB_3_N FBD_CH3_MCH_SB_2_N FBD_CH3_MCH_SB_1_N FBD_CH3_MCH_SB_0_N

I2C_FBD_CH2_SCL I2C_FBD_CH2_SDA

35 35 35 35 35 35 35 35 35 35

MCH SM BUS 3 CH 2)

34 34

3

4

28 28

MOD_MCH_FBD_BRANCH0_VCCA MOD_MCH_FBD_BRANCH0_VSSA

ROOM=MCH_I2C_PU

T35

FBD01VCCA

T34

FBD01VSSA

SUB*_UX211

P23_DT9261_jp

GREENCREEK REV 3.1

HETERO 1 OF 11

SPD1SMBCLK

SPD1SMBDATA

FBDICOMPBIAS

FBDRESIN

FBDBGBIASEXT

J16 K15

F35 E36 E37

I2C_FBD_CH1_SCL I2C_FBD_CH1_SDA

33 33

MCH SM BUS 2 CH 1)

MOD_MCH_FBD_ICOMP_BIAS MOD_MCH_FBD_RESIN MOD_MCH_FBD_BGBIAS_EXT

28 28 28

MCH FBD interface

28 28

MOD_MCH_FBD_BRANCH1_VCCA MOD_MCH_FBD_BRANCH1_VSSA

E27 F27

FBD23VCCA FBD23VSSA

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

GREENCREEK REV 3.1

HETERO 2 OF 11

SPD3SMBCLK

SPD3SMBDATA

H15 H16

TITLE

DWG NO.

DATE

I2C_FBD_CH3_SCL I2C_FBD_CH3_SDA

MCH SM BUS 4 CH 3)

MODULE: DESC: REV: OF

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

HX601

SHEET

35 35

CPUS,FSB,NB,XDP0,XDP1

SEC

REV.

A00

MCH

211

4

C

9/7/2007 23 OF 136

DBA

A B C

ECAD: MCH: Ensure accessable test point pads on TESTHI (top or bot)

+3.3V

NP

D

NP

1

2

3

EXP_MCH_0_NB_3_P

50

EXP_MCH_0_NB_2_P

50

EXP_MCH_0_NB_1_P

50

EXP_MCH_0_NB_0_P

50

EXP_MCH_0_NB_3_N

50

EXP_MCH_0_NB_2_N

50

EXP_MCH_0_NB_1_N

50

EXP_MCH_0_NB_0_N

50

EXP_MCH_2_NB_3_P

50

EXP_MCH_2_NB_2_P

50

EXP_MCH_2_NB_1_P

50

EXP_MCH_2_NB_0_P

50

EXP_MCH_2_NB_3_N

50

EXP_MCH_2_NB_2_N

50

EXP_MCH_2_NB_1_N

50

EXP_MCH_2_NB_0_N

50

EXP_MCH_3_NB_3_P

70

EXP_MCH_3_NB_2_P

70

EXP_MCH_3_NB_1_P

70

EXP_MCH_3_NB_0_P

70

EXP_MCH_3_NB_3_N

70

EXP_MCH_3_NB_2_N

70

EXP_MCH_3_NB_1_N

70

EXP_MCH_3_NB_0_N

70

EXP_MCH_4_NB_3_P

72

EXP_MCH_4_NB_2_P

72

EXP_MCH_4_NB_1_P

72

EXP_MCH_4_NB_0_P

72

EXP_MCH_4_NB_3_N

72

EXP_MCH_4_NB_2_N

72

EXP_MCH_4_NB_1_N

72

EXP_MCH_4_NB_0_N

72

EXP_MCH_5_NB_3_P

72

EXP_MCH_5_NB_2_P

72

EXP_MCH_5_NB_1_P

72

EXP_MCH_5_NB_0_P

72

EXP_MCH_5_NB_3_N

72

EXP_MCH_5_NB_2_N

72

EXP_MCH_5_NB_1_N

72

EXP_MCH_5_NB_0_N

72

EXP_MCH_6_NB_3_P

71

EXP_MCH_6_NB_2_P

71

EXP_MCH_6_NB_1_P

71

EXP_MCH_6_NB_0_P

71

EXP_MCH_6_NB_3_N

71

EXP_MCH_6_NB_2_N

71

EXP_MCH_6_NB_1_N

71

EXP_MCH_6_NB_0_N

71

EXP_MCH_7_NB_3_P

71

EXP_MCH_7_NB_2_P

71

EXP_MCH_7_NB_1_P

71

EXP_MCH_7_NB_0_P

71

EXP_MCH_7_NB_3_N

71

EXP_MCH_7_NB_2_N

71

EXP_MCH_7_NB_1_N

71

EXP_MCH_7_NB_0_N

71

AA5 AB8

Y4 Y10 AA6 AB7

Y3

Y9

T1

P3

N4

T5

U1

R3

P4

R5

U9

W7

V5

V2 U10

W8

V6

W2

K10 D10 G11 F12 L10 E10 F11 E12

G7

F8

C9 H10

H7

G8

B9 G10

J8

F6

E4

C6

K8

F5

E3

C5

K4

H3

D1

F3

L4

H4

E1

F2

PE0RP_3 PE0RP_2 PE0RP_1 PE0RP_0 PE0RN_3 PE0RN_2 PE0RN_1 PE0RN_0

PE2RP_3 PE2RP_2 PE2RP_1 PE2RP_0 PE2RN_3 PE2RN_2 PE2RN_1 PE2RN_0

PE3RP_3 PE3RP_2 PE3RP_1 PE3RP_0 PE3RN_3 PE3RN_2 PE3RN_1 PE3RN_0

PE4RP_3 PE4RP_2 PE4RP_1 PE4RP_0 PE4RN_3 PE4RN_2 PE4RN_1 PE4RN_0

PE5RP_3 PE5RP_2 PE5RP_1 PE5RP_0 PE5RN_3 PE5RN_2 PE5RN_1 PE5RN_0

PE6RP_3 PE6RP_2 PE6RP_1 PE6RP_0 PE6RN_3 PE6RN_2 PE6RN_1 PE6RN_0

PE7RP_3 PE7RP_2 PE7RP_1 PE7RP_0 PE7RN_3 PE7RN_2 PE7RN_1 PE7RN_0

U_MCH

PE0TP_3 PE0TP_2 PE0TP_1 PE0TP_0 PE0TN_3 PE0TN_2 PE0TN_1 PE0TN_0

PE2TP_3 PE2TP_2 PE2TP_1 PE2TP_0 PE2TN_3 PE2TN_2 PE2TN_1 PE2TN_0

PE3TP_3 PE3TP_2 PE3TP_1 PE3TP_0 PE3TN_3 PE3TN_2 PE3TN_1 PE3TN_0

PE4TP_3 PE4TP_2 PE4TP_1 PE4TP_0 PE4TN_3 PE4TN_2 PE4TN_1 PE4TN_0

PE5TP_3 PE5TP_2 PE5TP_1 PE5TP_0 PE5TN_3 PE5TN_2 PE5TN_1 PE5TN_0

PE6TP_3 PE6TP_2 PE6TP_1 PE6TP_0 PE6TN_3 PE6TN_2 PE6TN_1 PE6TN_0

PE7TP_3 PE7TP_2 PE7TP_1 PE7TP_0 PE7TN_3 PE7TN_2 PE7TN_1 PE7TN_0

AA8 AB4 AA3 Y7 AA9 AB5 AA2 Y6

R2 N1 U4 T8 T2 P1 T4 T7

V8 U6 W5 U3 V9 U7 W4 V3

J11 C11 C12 H12 K11 D11 B12 J12

D7 D8 F9 J9 E7 C8 E9 H9

H6 C3 D5 M9 J6 C2 D4 M8

J5 K7 G2 G5 K5 L7 G1 G4

MOD_MCH_EXP_MCH_0_SB_3_P_C MOD_MCH_EXP_MCH_0_SB_2_P_C MOD_MCH_EXP_MCH_0_SB_1_P_C MOD_MCH_EXP_MCH_0_SB_0_P_C MOD_MCH_EXP_MCH_0_SB_3_N_C MOD_MCH_EXP_MCH_0_SB_2_N_C MOD_MCH_EXP_MCH_0_SB_1_N_C MOD_MCH_EXP_MCH_0_SB_0_N_C

MOD_MCH_EXP_MCH_2_SB_3_P_C MOD_MCH_EXP_MCH_2_SB_2_P_C MOD_MCH_EXP_MCH_2_SB_1_P_C MOD_MCH_EXP_MCH_2_SB_0_P_C MOD_MCH_EXP_MCH_2_SB_3_N_C MOD_MCH_EXP_MCH_2_SB_2_N_C MOD_MCH_EXP_MCH_2_SB_1_N_C MOD_MCH_EXP_MCH_2_SB_0_N_C

MOD_MCH_EXP_MCH_3_SB_3_P_C MOD_MCH_EXP_MCH_3_SB_2_P_C MOD_MCH_EXP_MCH_3_SB_1_P_C MOD_MCH_EXP_MCH_3_SB_0_P_C MOD_MCH_EXP_MCH_3_SB_3_N_C MOD_MCH_EXP_MCH_3_SB_2_N_C MOD_MCH_EXP_MCH_3_SB_1_N_C MOD_MCH_EXP_MCH_3_SB_0_N_C

MOD_MCH_EXP_MCH_4_SB_3_P_C MOD_MCH_EXP_MCH_4_SB_2_P_C MOD_MCH_EXP_MCH_4_SB_1_P_C MOD_MCH_EXP_MCH_4_SB_0_P_C MOD_MCH_EXP_MCH_4_SB_3_N_C MOD_MCH_EXP_MCH_4_SB_2_N_C MOD_MCH_EXP_MCH_4_SB_1_N_C MOD_MCH_EXP_MCH_4_SB_0_N_C

MOD_MCH_EXP_MCH_5_SB_3_P_C MOD_MCH_EXP_MCH_5_SB_2_P_C MOD_MCH_EXP_MCH_5_SB_1_P_C MOD_MCH_EXP_MCH_5_SB_0_P_C MOD_MCH_EXP_MCH_5_SB_3_N_C MOD_MCH_EXP_MCH_5_SB_2_N_C MOD_MCH_EXP_MCH_5_SB_1_N_C MOD_MCH_EXP_MCH_5_SB_0_N_C

MOD_MCH_EXP_MCH_6_SB_3_P_C MOD_MCH_EXP_MCH_6_SB_2_P_C MOD_MCH_EXP_MCH_6_SB_1_P_C MOD_MCH_EXP_MCH_6_SB_0_P_C MOD_MCH_EXP_MCH_6_SB_3_N_C MOD_MCH_EXP_MCH_6_SB_2_N_C MOD_MCH_EXP_MCH_6_SB_1_N_C MOD_MCH_EXP_MCH_6_SB_0_N_C

MOD_MCH_EXP_MCH_7_SB_3_P_C MOD_MCH_EXP_MCH_7_SB_2_P_C MOD_MCH_EXP_MCH_7_SB_1_P_C MOD_MCH_EXP_MCH_7_SB_0_P_C MOD_MCH_EXP_MCH_7_SB_3_N_C MOD_MCH_EXP_MCH_7_SB_2_N_C MOD_MCH_EXP_MCH_7_SB_1_N_C MOD_MCH_EXP_MCH_7_SB_0_N_C

29 29 29 29 29 29 29 29

24,126

SYSTEM_PWRGOOD_MCH

126

52,95,129 52,95,129 52,95,129

NC_MOD_MCH_RSVD_D29 NC_MOD_MCH_RSVD_H1 NC_MOD_MCH_RSVD_J3 NC_MOD_MCH_RSVD_L3 NC_MOD_MCH_RSVD_L6 NC_MOD_MCH_RSVD_M2 NC_MOD_MCH_RSVD_M3 NC_MOD_MCH_RSVD_M5 NC_MOD_MCH_RSVD_M6 NC_MOD_MCH_RSVD_M11 NC_MOD_MCH_RSVD_M12 NC_MOD_MCH_RSVD_N2 NC_MOD_MCH_RSVD_N5 NC_MOD_MCH_RSVD_N7 NC_MOD_MCH_RSVD_N8 NC_MOD_MCH_RSVD_N10 NC_MOD_MCH_RSVD_P6 NC_MOD_MCH_RSVD_P7 NC_MOD_MCH_RSVD_P9 NC_MOD_MCH_RSVD_P10 NC_MOD_MCH_RSVD_R6 NC_MOD_MCH_RSVD_R8 NC_MOD_MCH_RSVD_R9 NC_MOD_MCH_RSVD_T37 NC_MOD_MCH_RSVD_W1 NC_MOD_MCH_RSVD_Y1 NC_MOD_MCH_RSVD_AE8 NC_MOD_MCH_RSVD_AG2 NC_MOD_MCH_RSVD_AG6 NC_MOD_MCH_RSVD_AH7

NC_MOD_MCH_RSVD_AJ1 NC_MOD_MCH_RSVD_AK17 NC_MOD_MCH_RSVD_AK23 NC_MOD_MCH_RSVD_AM7 NC_MOD_MCH_RSVD_AM24 NC_MOD_MCH_RSVD_AM31 NC_MOD_MCH_RSVD_AN23 NC_MOD_MCH_RSVD_AP28 NC_MOD_MCH_RSVD_AP32 NC_MOD_MCH_RSVD_AR15 NC_MOD_MCH_RSVD_AR16 NC_MOD_MCH_RSVD_AR33 NC_MOD_MCH_RSVD_AV27

PLT_RST_MCH_N

MCH_ESB_ERR_2_N MCH_ESB_ERR_1_N MCH_ESB_ERR_0_N

H17 G17

D2 A5 E6

D29

H1 J3 L3 L6 M2 M3 M5

M6 M11 M12

N2

N5

N7

N8 N10

P6

P7

P9 P10

R6

R8

R9 T37

W1

Y1 AE8 AG2 AG6 AH7

AJ1

AK17 AK23

AM7

AM24 AM31 AN23 AP28 AP32 AR15 AR16 AR33 AV27

PWRGOOD RESETI_N

ERR_2_N ERR_1_N ERR_0_N

RSVD_D29 RSVD_H1 RSVD_J3 RSVD_L3 RSVD_L6 RSVD_M2 RSVD_M3 RSVD_M5 RSVD_M6 RSVD_M11 RSVD_M12 RSVD_N2 RSVD_N5 RSVD_N7 RSVD_N8 RSVD_N10 RSVD_P6 RSVD_P7 RSVD_P9 RSVD_P10 RSVD_R6 RSVD_R8 RSVD_R9 RSVD_T37 RSVD_W1 RSVD_Y1 RSVD_AE8 RSVD_AG2 RSVD_AG6 RSVD_AH7

RSVD_AJ1 RSVD_AK17 RSVD_AK23 RSVD_AM7 RSVD_AM24 RSVD_AM31 RSVD_AN23 RSVD_AP28 RSVD_AP32 RSVD_AR15 RSVD_AR16 RSVD_AR33 RSVD_AV27

U_MCH

MOD_MCH_I2C_CHIPSET_SCL_R

MOD_MCH_I2C_CHIPSET_SDA_R

MOD_MCH_I2C_ESB2_SEG3_SCL_R MOD_MCH_I2C_ESB2_SEG3_SDA_R

MOD_MCH_XDP0_TCK1_R MOD_MCH_XDP0_TDI_MCH MOD_MCH_XDP0_TDO_MCH MOD_MCH_XDP0_TMS_R

MOD_MCH_SYSPWR_XDP0_TRST_N

NC_TDIOANODE NC_TDIOCATHODE

MOD_MCH_XDP1_D_15_N MOD_MCH_XDP1_D_14_N MOD_MCH_XDP1_D_13_N MOD_MCH_XDP1_D_12_N MOD_MCH_XDP1_D_11_N MOD_MCH_XDP1_D_10_N MOD_MCH_XDP1_D_9_N MOD_MCH_XDP1_D_8_N MOD_MCH_XDP1_D_7_N MOD_MCH_XDP1_D_6_N MOD_MCH_XDP1_D_5_N MOD_MCH_XDP1_D_4_N MOD_MCH_XDP1_D_3_N MOD_MCH_XDP1_D_2_N MOD_MCH_XDP1_D_1_N MOD_MCH_XDP1_D_0_N

MOD_MCH_XDP1_DSTBP_N MOD_MCH_XDP1_DSTBN_N

MOD_MCH_XDP1_RDY_N

MOD_MCH_XDP1_ODTCRES MOD_MCH_XDP1_SLWCRES MOD_MCH_XDP1_COMCRES

MOD_MCH_TESTHI_AC36

TCK TDI TDO TMS

K14 J14

K13 L12

A6 B7 B6 A7 A8

A4 B4

E16 D16 A15 C16 A16 A14 B15 D15 B14 B13 E14 A12 D13 A10 B10 A11

C14 C13

A17

G14 J15 F14

AC36

W10 W11 Y12 AA11

SM BUS 0 Slave

SM BUS 6 HP CTRL

Intel confirmed, leave MCH TDIODE floatingDT_ID#1915

See table on PP25 regarding AC36 pull-up

CFGSMBCLK

CFGSMBDATA

GPIOSMBCLK

GPIOSMBDATA

TRST_N

TDIOANODE

TDIOCATHODE

XDPD_15_N XDPD_14_N XDPD_13_N XDPD_12_N XDPD_11_N XDPD_10_N

XDPD_9_N XDPD_8_N XDPD_7_N XDPD_6_N XDPD_5_N XDPD_4_N XDPD_3_N XDPD_2_N XDPD_1_N XDPD_0_N

XDPDSTBP_N XDPDSTBN_N

XDPRDY_N

XDPODTCRES XDPSLWCRES XDPCOMCRES

TESTHI_AC36

PEWIDTH_3_W10 PEWIDTH_2_W11 PEWIDTH_1_Y12

PEWIDTH_0_AA11

MOD_MCH_PEWIDTH_3 MOD_MCH_PEWIDTH_2

PEWIDTH_1

PEWIDTH_0

R4271

X

30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30

30 30

30

30 30 30

R4273

1 2

4.7K-5%

NP

13,17,21

X

R4272

X

1 2

24 21,24 21 24 24

21,24

21

PEWIDTH[3:0] Port0(ESI) Port2 Port3 Port4 Port5 Port6 Port7 0000 x4 x4 x4 x4 x4 x4 x4 0001 x4 x4 x4 x4 x4 |-- x8 --| 0010 x4 x4 x4 |-- x8 --| x4 x4 0011 x4 x4 x4 |-- x8 --| |-- x8 --| 0100 x4 x4 x4 |----- x16 ---------| others Reserved 1000 x4 |-- x8 --| x4 x4 x4 x4 1001 x4 |-- x8 --| x4 x4 |-- x8 --| 1010 x4 |-- x8 --| |-- x8 --| x4 x4 1011 x4 |-- x8 --| |-- x8 --| |-- x8 --| 1100 x4 |-- x8 --| |------ x16 --------| others Reserved 1111 All port widths determined by link

4.7K-5%

1 2

NP

R4274

4.7K-5%

X

MOD_MCH_XDP0_TMS

From XDP0

MOD_MCH_XDP0_TCK1

PEWIDTH

negotiation.<don't work 10/24/04>

4.7K-5%

1 2

R3603

1 2

R3604

1 2

0-5%

R3605

1 2

0-5%

MOD_MCH_XDP0_TDI_MCH

0-5%

R3606

1 2

0-5%

NP

1 2

NP

1 2

+1.5V

NP

R4747

X

I2C_CHIPSET_SCL

I2C_CHIPSET_SDA

I2C_ESB2_SEG3_SCL

I2C_ESB2_SEG3_SDA

+CPU_VTT

21

R4824

R5760

X

0-5%

R5759

X

0-5%

1K-1%

1 2

R5089

1 2

21

51-5%

R5761

MOD_MCH_XDP0_TCK1_R

1K-1%

R4840

1 2

72

51-5%

MOD_MCH_XDP0_TMS_R

21

R5762

1K-1%

71

21,30,53,63,71,72,91,96

63,96

To MCH

51-5%

+3.3V

1

24

2

3

4

45 45

28 28

24,126

CK_100M_MCH_P CK_100M_MCH_N

MOD_MCH_PE_VCCA MOD_MCH_PE_VSSA

SYSTEM_PWRGOOD_MCH

J2

PECLKP

K2

PECLKN

K1

PEVCCA

L1

PEVSSA

GREENCREEK REV 3.1

HETERO 3 OF 11

ECAD: Note special routing for PEVSSBG

+CPU_VTT

NP

21

NP

330-5%

Q3910

3904

NP

1K-1%

R5442

12

X

NP

Q3909

3904

1

X

R5463

X

3

2

PEICOMPI PERCOMPO

PEVCCBG PEVSSBG

1

X

+CPU_VTT

NP

R5460

X

3

2

R12 P12

R11 N11

1 2

51-5%

MOD_MCH_PE_COMP

MOD_MCH_PE_VCCBG

13,17,21

Depop R1006 when R5508 is populated

MOD_MCH_XDP0_TRST_N

28

P18_DT9082_jp

0-5%

R5508

21

1K-1%

1 2

R4350

1 2

R4351

5.1K-5%

TESTHI_V3REF_G16 TESTHI_V3REF_F17

GREENCREEK REV 3.1

HETERO 6 OF 11

G16 F17

MOD_MCH_TESTHI_V3REF_G16 MOD_MCH_TESTHI_V3REF_F17

1K-1%

R5091

1 2

M2LB_Change_Note: PEWIDTH_0 connected to lower-left riser to indicate if Ports 6 and 7 are bifricated. They are never bifricated with the present risers. PEWIDTH_1 connected to center (a.k.a. right) riser to indicate if Ports 4 and 5 are bifricated. They are never bifricated

with the present risers, but would be bifricated in a 4-slot London configuration.

R5090

1 2

R5657

1K-1%

P18_DT9079_jp

MCH & PCI EXPRESS

MOD_MCH_SYSPWR_XDP0_TRST_N

21

24

PROPRIETARY NOTE

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

INC.

NP

R5464

X

1 2

20K-5%

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

HX601

SHEET

REV.

A00

9/7/2007 24 OF 136

MCH

211

4

C

DBA

A B C

D

1

2

3

4

+3.3V

Thermal Sensor VCC in

+1.5V +1.5V

U_MCH

L16 L17 L18 L19 M16 M17 M18 N17 N19 P16 P18 P20 P22 P24 R15 R17 R19 R21 R23 T16 T18 T20 T22 T24 U15 U17 U19 U21 U23 V16 V18 V20 V22 V24 W15 W17 W19 W21 W23 Y16 Y18 Y20 Y22

Y24 AA15 AA17 AA19 AA21 AA23 AB16 AB18 AB20 AB22 AB24 AC15 AC17 AC19 AC21 AC23 AL17

AA13 AB13 AB14 AC25 AC26 AD26 AE35 AH10

L24

F13

VCC_L16 VCC_L17 VCC_L18 VCC_L19 VCC_M16 VCC_M17 VCC_M18 VCC_N17 VCC_N19 VCC_P16 VCC_P18 VCC_P20 VCC_P22 VCC_P24 VCC_R15 VCC_R17 VCC_R19 VCC_R21 VCC_R23 VCC_T16 VCC_T18 VCC_T20 VCC_T22 VCC_T24 VCC_U15 VCC_U17 VCC_U19 VCC_U21 VCC_U23 VCC_V16 VCC_V18 VCC_V20 VCC_V22 VCC_V24 VCC_W15 VCC_W17 VCC_W19 VCC_W21 VCC_W23 VCC_Y16 VCC_Y18 VCC_Y20 VCC_Y22 VCC_Y24 VCC_AA15 VCC_AA17 VCC_AA19 VCC_AA21 VCC_AA23 VCC_AB16 VCC_AB18 VCC_AB20 VCC_AB22 VCC_AB24 VCC_AC15 VCC_AC17 VCC_AC19 VCC_AC21 VCC_AC23 VCC_AL17

VCCSF_AA13 VCCSF_AB13 VCCSF_AB14 VCCSF_AC25 VCCSF_AC26 VCCSF_AD26 VCCSF_AE35 VCCSF_AH10

VCCSEN_L24

V3REF_F13

VCCFBD_A20 VCCFBD_E20 VCCFBD_E23 VCCFBD_F25 VCCFBD_H20 VCCFBD_H23 VCCFBD_K21 VCCFBD_K22 VCCFBD_K23 VCCFBD_L20 VCCFBD_L21 VCCFBD_L22 VCCFBD_L23 VCCFBD_M20 VCCFBD_M21 VCCFBD_M22 VCCFBD_M23 VCCFBD_M24 VCCFBD_M25 VCCFBD_N20 VCCFBD_N21 VCCFBD_N22 VCCFBD_N23 VCCFBD_N24 VCCFBD_N25 VCCFBD_N26 VCCFBD_P25 VCCFBD_P26 VCCFBD_R25 VCCFBD_T25 VCCFBD_T26 VCCFBD_T27 VCCFBD_U25 VCCFBD_U26 VCCFBD_V25 VCCFBD_V26 VCCFBD_W25 VCCFBD_W26 VCCFBD_Y25

VCCFBD_Y26 VCCFBD_AA25 VCCFBD_AA26 VCCFBD_AA27 VCCFBD_AB25 VCCFBD_AB26

VCCPE_G12 VCCPE_J10

VCCPE_L2

VCCPE_L8 VCCPE_L13 VCCPE_L14 VCCPE_L15 VCCPE_M13 VCCPE_M14 VCCPE_M15

VCCPE_N6 VCCPE_N12 VCCPE_N13 VCCPE_N14 VCCPE_N15 VCCPE_P13 VCCPE_P14

VCCPE_R4 VCCPE_R10 VCCPE_R13 VCCPE_R14 VCCPE_T13 VCCPE_T14

VCCPE_U2

VCCPE_U8 VCCPE_U13 VCCPE_U14 VCCPE_V13 VCCPE_V14

VCCPE_W6 VCCPE_W12 VCCPE_W13 VCCPE_W14 VCCPE_Y13 VCCPE_Y14

GREENCREEK REV 3.1

HETERO 7 OF 11

A20 E20 E23 F25 H20 H23 K21 K22 K23 L20 L21 L22 L23 M20 M21 M22 M23 M24 M25 N20 N21 N22 N23 N24 N25 N26 P25 P26 R25 T25 T26 T27 U25 U26 V25 V26 W25 W26 Y25 Y26 AA25 AA26 AA27 AB25 AB26

G12 J10 L2 L8 L13 L14 L15 M13 M14 M15 N6 N12 N13 N14 N15 P13 P14 R4 R10 R13 R14 T13 T14 U2 U8 U13 U14 V13 V14 W6 W12 W13 W14 Y13 Y14

+CPU_VTT

AC13 AC14 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AE13 AE14 AE15 AE16 AE17 AE18 AE19 AE20 AE21 AE22 AE23 AE24 AE25 AE26 AF18 AF19 AF20 AF21 AG18 AG19 AG20 AG21 AH18 AH19 AH20 AH21 AJ18 AJ19 AJ20 AJ21 AK18 AK19 AK20 AK21 AL18 AL19 AL20 AL21 AM18 AM19 AM20 AM21 AN18 AN19 AN20 AN21 AP18 AP19 AP20 AP21 AR18 AR19 AR20 AR21 AT18 AT19 AT20 AT21 AU18 AU19 AU20 AU21 AV18 AV19 AV20 AV21

VTT_AC13 VTT_AC14 VTT_AD13 VTT_AD14 VTT_AD15 VTT_AD16 VTT_AD17 VTT_AD18 VTT_AD19 VTT_AD20 VTT_AD21 VTT_AD22 VTT_AD23 VTT_AD24 VTT_AD25 VTT_AE13 VTT_AE14 VTT_AE15 VTT_AE16 VTT_AE17 VTT_AE18 VTT_AE19 VTT_AE20 VTT_AE21 VTT_AE22 VTT_AE23 VTT_AE24 VTT_AE25 VTT_AE26 VTT_AF18 VTT_AF19 VTT_AF20 VTT_AF21 VTT_AG18 VTT_AG19 VTT_AG20 VTT_AG21 VTT_AH18 VTT_AH19 VTT_AH20 VTT_AH21 VTT_AJ18 VTT_AJ19 VTT_AJ20 VTT_AJ21 VTT_AK18 VTT_AK19 VTT_AK20 VTT_AK21 VTT_AL18 VTT_AL19 VTT_AL20 VTT_AL21 VTT_AM18 VTT_AM19 VTT_AM20 VTT_AM21 VTT_AN18 VTT_AN19 VTT_AN20 VTT_AN21 VTT_AP18 VTT_AP19 VTT_AP20 VTT_AP21 VTT_AR18 VTT_AR19 VTT_AR20 VTT_AR21 VTT_AT18 VTT_AT19 VTT_AT20 VTT_AT21 VTT_AU18 VTT_AU19 VTT_AU20 VTT_AU21 VTT_AV18 VTT_AV19 VTT_AV20 VTT_AV21

U_MCH

GREENCREEK REV 3.1

HETERO 8 OF 11

VSS_C30 VSS_C32 VSS_C33 VSS_C35 VSS_C38

VSS_D3 VSS_D6

VSS_D9 VSS_D12 VSS_D14 VSS_D18 VSS_D21 VSS_D24 VSS_D27 VSS_D30 VSS_D33 VSS_D36

VSS_E2

VSS_E5

VSS_E8 VSS_E11 VSS_E13 VSS_E17 VSS_E21 VSS_E26 VSS_E29 VSS_E32 VSS_E35

VSS_F1

VSS_F4

VSS_F7 VSS_F10 VSS_F16 VSS_F19 VSS_F21 VSS_F22 VSS_F26 VSS_F28 VSS_F31 VSS_F34 VSS_F38

VSS_G3

VSS_G6

VSS_G9 VSS_G15 VSS_G18 VSS_G21 VSS_G24 VSS_G27 VSS_G30 VSS_G31 VSS_G32 VSS_G33 VSS_G36 VSS_G37

VSS_H2

VSS_H5

VSS_H8 VSS_H11 VSS_H14 VSS_H26 VSS_H27 VSS_H28 VSS_H29 VSS_H30 VSS_H31 VSS_H32 VSS_H35

VSS_J1

VSS_J4

VSS_J7 VSS_J13 VSS_J17 VSS_J19 VSS_J22 VSS_J25 VSS_J26 VSS_J27 VSS_J28 VSS_J29 VSS_J30 VSS_J31 VSS_J34 VSS_J38

VSS_K3

VSS_K6

VSS_K9 VSS_K12 VSS_K16 VSS_K17 VSS_K20 VSS_K24 VSS_K25 VSS_K26 VSS_K27

C30 C32 C33 C35 C38 D3 D6 D9 D12 D14 D18 D21 D24 D27 D30 D33 D36 E2 E5 E8 E11 E13 E17 E21 E26 E29 E32 E35 F1 F4 F7 F10 F16 F19 F21 F22 F26 F28 F31 F34 F38 G3 G6 G9 G15 G18 G21 G24 G27 G30 G31 G32 G33 G36 G37 H2 H5 H8 H11 H14 H26 H27 H28 H29 H30 H31 H32 H35 J1 J4 J7 J13 J17 J19 J22 J25 J26 J27 J28 J29 J30 J31 J34 J38 K3 K6 K9 K12 K16 K17 K20 K24 K25 K26 K27

U_MCH

AM5

AM8 AM11 AM14 AM17 AM23 AM26 AM29 AM32 AM35 AM36

AN1

AN4

AN7 AN10 AN13 AN16 AN22 AN25 AN28 AN31 AN34 AN37 AN38

AP3

AP6

AP9 AP12 AP15 AP24 AP27 AP30 AP33

AR2

AR5

AR8 AR11 AR14 AR17 AR23 AR26 AR29 AR32 AR35 AR36

AT1

AT4

AT7 AT10 AT13 AT15 AT16 AT22 AT25 AT28 AT31 AT34 AT38

AU2

AU6

AU9 AU12 AU13 AU14 AU15 AU24 AU27 AU30 AU33 AU37

AV3

AV5

AV8 AV11 AV14 AV15 AV16 AV17 AV23 AV26 AV29 AV32 AV35 AV36

VSS_AM5 VSS_AM8 VSS_AM11 VSS_AM14 VSS_AM17 VSS_AM23 VSS_AM26 VSS_AM29 VSS_AM32 VSS_AM35 VSS_AM36 VSS_AN1 VSS_AN4 VSS_AN7 VSS_AN10 VSS_AN13 VSS_AN16 VSS_AN22 VSS_AN25 VSS_AN28 VSS_AN31 VSS_AN34 VSS_AN37 VSS_AN38 VSS_AP3 VSS_AP6 VSS_AP9 VSS_AP12 VSS_AP15 VSS_AP24 VSS_AP27 VSS_AP30 VSS_AP33 VSS_AR2 VSS_AR5 VSS_AR8 VSS_AR11 VSS_AR14 VSS_AR17 VSS_AR23 VSS_AR26 VSS_AR29 VSS_AR32 VSS_AR35 VSS_AR36 VSS_AT1 VSS_AT4 VSS_AT7 VSS_AT10 VSS_AT13 VSS_AT15 VSS_AT16 VSS_AT22 VSS_AT25 VSS_AT28 VSS_AT31 VSS_AT34 VSS_AT38 VSS_AU2 VSS_AU6 VSS_AU9 VSS_AU12 VSS_AU13 VSS_AU14 VSS_AU15 VSS_AU24 VSS_AU27 VSS_AU30 VSS_AU33 VSS_AU37 VSS_AV3 VSS_AV5 VSS_AV8 VSS_AV11 VSS_AV14 VSS_AV15 VSS_AV16 VSS_AV17 VSS_AV23 VSS_AV26 VSS_AV29 VSS_AV32 VSS_AV35 VSS_AV36

GREENCREEK REV 3.1

HETERO 9 OF 11

VSS_AD36 VSS_AD37 VSS_AD38

VSS_AE12 VSS_AE27 VSS_AE30 VSS_AE33

VSS_AF10 VSS_AF11 VSS_AF14 VSS_AF17 VSS_AF23 VSS_AF24 VSS_AF26 VSS_AF27 VSS_AF29 VSS_AF32 VSS_AF35 VSS_AF36

VSS_AG13 VSS_AG16 VSS_AG17 VSS_AG22 VSS_AG25 VSS_AG28 VSS_AG31 VSS_AG34 VSS_AG37 VSS_AG38

VSS_AH12 VSS_AH15 VSS_AH24 VSS_AH27 VSS_AH30 VSS_AH33

VSS_AJ11 VSS_AJ14 VSS_AJ17 VSS_AJ23 VSS_AJ26 VSS_AJ29 VSS_AJ32 VSS_AJ35 VSS_AJ36

VSS_AK10 VSS_AK13 VSS_AK16 VSS_AK22 VSS_AK25 VSS_AK28 VSS_AK31 VSS_AK34 VSS_AK37 VSS_AK38

VSS_AL12 VSS_AL15 VSS_AL24 VSS_AL27 VSS_AL30 VSS_AL33

VSS_AH17

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

VSS_AE3 VSS_AE6 VSS_AE9

VSS_AF2 VSS_AF5 VSS_AF8

VSS_AG1 VSS_AG4 VSS_AG7

VSS_AH3 VSS_AH6 VSS_AH9

VSS_AJ2 VSS_AJ5 VSS_AJ8

VSS_AK1 VSS_AK4 VSS_AK7

VSS_AL3 VSS_AL6 VSS_AL9

VSS_AM2

AD36 AD37 AD38 AE3 AE6 AE9 AE12 AE27 AE30 AE33 AF2 AF5 AF8 AF10 AF11 AF14 AF17 AF23 AF24 AF26 AF27 AF29 AF32 AF35 AF36 AG1 AG4 AG7 AG13 AG16 AG17 AG22 AG25 AG28 AG31 AG34 AG37 AG38 AH3 AH6 AH9 AH12 AH15 AH24 AH27 AH30 AH33 AJ2 AJ5 AJ8 AJ11 AJ14 AJ17 AJ23 AJ26 AJ29 AJ32 AJ35 AJ36 AK1 AK4 AK7 AK10 AK13 AK16 AK22 AK25 AK28 AK31 AK34 AK37 AK38 AL3 AL6 AL9 AL12 AL15 AL24 AL27 AL30 AL33 AM2 AH17

Perlim MCH current numbers

(02/01/05-AR#500):

Core = 13.14A PCIe = 2.02A FBD = 5.71A Snoop = 2.15A

Current PDG indicates this should be PU. However, if early samples are received, AC36 is still cared and requires a PD. If the parts are not early samples, then this pin is NC'ed internally to the MCH and it doesn't matter. M/L/B have this PD with email permission from Intel in case early samples are received in the future. Barcelona has this PU. Both are OK.

P19_DT9172_rt_added_AC36_explanation

TESTHI_AC36 use

ProcessorVersion GC-LE GC-LE BNB-LE/A0 BNB-LE/A0 BNB-B0 BNB-B0

GC-B1

BNB-B2 + Don't care (PU/PD)

GC-B2 +

Nocona/DempseyT

Dempsey

Nocona/DempseyT

Dempsey

Nocona/DempseyT

Dempsey

Dempsey, WC/CL

MCH Power & Ground

INC.

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

HX601

DATE

9/7/2007 25 OF 136

AC36 pulled to 1.5V Must Float pulled to 1.5V Must Float Must Float pulled to 1.5V PD to GND

Don't care (PU/PD)

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

ROUND ROCK,TEXAS

REV.

A00

SHEET

1

2

3

MCH

211

4

C

DBA

A B C

U_MCH

D

1

2

3

4

V17 V19 V21 V23 V28 V31 V34 V37

W3

W9 W16 W18 W20 W22 W24 W27 W30 W33 W36 W37

Y2

Y5

Y8 Y11 Y15 Y17 Y19 Y21 Y23 Y29 Y32 Y35 Y38 AA1 AA4 AA7

AA10 AA14 AA16 AA18 AA20 AA22 AA24 AA28 AA29 AA30 AA31 AA34 AA37

AB3 AB6 AB9

AB12 AB15 AB17 AB19 AB21 AB23 AB27 AB28 AB29 AB30 AB33 AB36

AC2 AC5 AC8

AC11 AC16 AC18 AC20 AC22 AC24 AC27 AC28 AC29 AC32 AC35 AC38

AD1 AD4 AD7

AD10 AD27 AD28 AD31 AD34

VSS_V17 VSS_V19 VSS_V21 VSS_V23 VSS_V28 VSS_V31 VSS_V34 VSS_V37 VSS_W3 VSS_W9 VSS_W16 VSS_W18 VSS_W20 VSS_W22 VSS_W24 VSS_W27 VSS_W30 VSS_W33 VSS_W36 VSS_W37 VSS_Y2 VSS_Y5 VSS_Y8 VSS_Y11 VSS_Y15 VSS_Y17 VSS_Y19 VSS_Y21 VSS_Y23 VSS_Y29 VSS_Y32 VSS_Y35 VSS_Y38 VSS_AA1 VSS_AA4 VSS_AA7 VSS_AA10 VSS_AA14 VSS_AA16 VSS_AA18 VSS_AA20 VSS_AA22 VSS_AA24 VSS_AA28 VSS_AA29 VSS_AA30 VSS_AA31 VSS_AA34 VSS_AA37 VSS_AB3 VSS_AB6 VSS_AB9 VSS_AB12 VSS_AB15 VSS_AB17 VSS_AB19 VSS_AB21 VSS_AB23 VSS_AB27 VSS_AB28 VSS_AB29 VSS_AB30 VSS_AB33 VSS_AB36 VSS_AC2 VSS_AC5 VSS_AC8 VSS_AC11 VSS_AC16 VSS_AC18 VSS_AC20 VSS_AC22 VSS_AC24 VSS_AC27 VSS_AC28 VSS_AC29 VSS_AC32 VSS_AC35 VSS_AC38 VSS_AD1 VSS_AD4 VSS_AD7 VSS_AD10 VSS_AD27 VSS_AD28 VSS_AD31 VSS_AD34

VSS_K28 VSS_K29 VSS_K30 VSS_K33 VSS_K36 VSS_K37

VSS_L5 VSS_L11 VSS_L26 VSS_L29 VSS_L32 VSS_L35

VSS_M1

VSS_M4

VSS_M7 VSS_M10 VSS_M19 VSS_M28 VSS_M31 VSS_M34 VSS_M37 VSS_M38

VSS_N3

VSS_N9 VSS_N16 VSS_N18 VSS_N27 VSS_N30 VSS_N31 VSS_N33 VSS_N36

VSS_P2

VSS_P5

VSS_P8 VSS_P11 VSS_P15 VSS_P17 VSS_P19 VSS_P21 VSS_P23 VSS_P29 VSS_P30 VSS_P31 VSS_P32 VSS_P35 VSS_P38

VSS_R1

VSS_R7 VSS_R16 VSS_R18 VSS_R20 VSS_R22 VSS_R24 VSS_R26 VSS_R27 VSS_R28 VSS_R29 VSS_R30 VSS_R31 VSS_R34 VSS_R37

VSS_T3

VSS_T6

VSS_T9 VSS_T10 VSS_T11 VSS_T12 VSS_T15 VSS_T17 VSS_T19 VSS_T21 VSS_T23 VSS_T29 VSS_T30 VSS_T33 VSS_T36

VSS_U5 VSS_U11 VSS_U12 VSS_U16 VSS_U18 VSS_U20 VSS_U22 VSS_U24 VSS_U29 VSS_U32 VSS_U35 VSS_U38

VSS_V1

VSS_V4

VSS_V7 VSS_V10 VSS_V11 VSS_V12 VSS_V15

K28 K29 K30 K33 K36 K37 L5 L11 L26 L29 L32 L35 M1 M4 M7 M10 M19 M28 M31 M34 M37 M38 N3 N9 N16 N18 N27 N30 N31 N33 N36 P2 P5 P8 P11 P15 P17 P19 P21 P23 P29 P30 P31 P32 P35 P38 R1 R7 R16 R18 R20 R22 R24 R26 R27 R28 R29 R30 R31 R34 R37 T3 T6 T9 T10 T11 T12 T15 T17 T19 T21 T23 T29 T30 T33 T36 U5 U11 U12 U16 U18 U20 U22 U24 U29 U32 U35 U38 V1 V4 V7 V10 V11 V12 V15

A3

A9 A13 A18 A21 A23 A25 A28 A31 A34 A36

B2

B3

B5

B8 B11 B16 B17 B20 B23 B37

C1

C4

C7 C10 C15 C19 C22 C24 C26 C27 C29

VSS_A3 VSS_A9 VSS_A13 VSS_A18 VSS_A21 VSS_A23 VSS_A25 VSS_A28 VSS_A31 VSS_A34 VSS_A36 VSS_B2 VSS_B3 VSS_B5 VSS_B8 VSS_B11 VSS_B16 VSS_B17 VSS_B20 VSS_B23 VSS_B37 VSS_C1 VSS_C4 VSS_C7 VSS_C10 VSS_C15 VSS_C19 VSS_C22 VSS_C24 VSS_C26 VSS_C27 VSS_C29

U_MCH

GREENCREEK REV 3.1

HETERO 11 OF 11

NC_MCH_REG_1

VSSSEN_L25

VSSQUIET_L9

L25

L9

MCH_REG

1 2

COMMON NEG

REG07 A NGO COUPON TEST

NC_MCH_REG_2

TITLE

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

INC.

ROUND ROCK,TEXAS

1

2

3

MCH

211

4

GREENCREEK REV 3.1

HETERO 10 OF 11

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 26 OF 136

DCBA

+1.5V

A B C

ROOM = MCH

D

+CPU_VTT

1

C2563

1 2

21

C2608

C2617

1 2

21

C2562

1uF 6.3V

C2609

1 2

1uF 6.3V

21

C2616

1uF 6.3V

C2564

1 2

1uF 6.3V

21

C2607

1uF 6.3V

C2618

1 2

1uF 6.3V

21

C2561

1uF 6.3V

C2610

1 2

1uF 6.3V

21

C2615

1uF 6.3V

21

C2559

1uF 6.3V

C2605

1 2

1uF 6.3V

21

C2620

1uF 6.3V

C2560

1 2

1uF 6.3V

21

C2606

1uF 6.3V

C2619

1 2

1uF 6.3V

21

C2604

1uF 6.3V

C2611

1 2

1uF 6.3V

21

C2614

1uF 6.3V

C2603

1 2

1uF 6.3V

21

C2612

1uF 6.3V

C2613

1 2

1uF 6.3V

ROOM = MCH_CAPS_CORE_1UF

1uF 6.3V

21

C2767

1 2

C2768

10uF 6.3V

ROOM = MCH_CAPS_CORE_10UF

10uF 6.3V

+1.5V

D1071

2 1

MBRS130LT3

+3.3V

Room = MCH_CAPS_VTT_1UF

Room = MCH_CAPS_VTT_10UF

21

C2663

C2670

1 2

C2664

1 2

1uF 6.3V

21

C2669

1uF 6.3V

21

C2782

21

C2662

1uF 6.3V

C2671

1 2

1uF 6.3V

1 2

C2781

10uF 6.3V

C2665

1 2

1uF 6.3V

21

C2668

1uF 6.3V

1 2

C2780

10uF 6.3V

C2660

1 2

1uF 6.3V

21

C2673

1uF 6.3V

21

C2779

10uF 6.3V

21

C2661

1uF 6.3V

C2672

1 2

1uF 6.3V

10uF 6.3V

C2666

1 2

1uF 6.3V

21

C2667

1uF 6.3V

1

1uF 6.3V

2

+1.5V

C2635

1 2

21

C2634

1uF 6.3V

MCH VCC caps

21

C2638

1uF 6.3V

C2636

1 2

1uF 6.3V

21

C2633

1uF 6.3V

C2637

1 2

1uF 6.3V

21

C2632

1uF 6.3V

C2631

1 2

1uF 6.3V

21

C2640

1uF 6.3V

21

C2639

1 2

1uF 6.3V

MCH FSB VTT caps

+3.3V

C2674

1 2

2

1uF 6.3V

3

C2626

C2622

1 2

C2627

1 2

1uF 6.3V

21

C2621

1uF 6.3V

C2625

1uF 6.3V

C2628

1 2

1uF 6.3V

1 2

C2774

C2623

1uF 6.3V

C2773

10uF 6.3V

MCH FBD caps

1 2

1uF 6.3V

1 2

10uF 6.3V

C2624

1 2

C2771

C2629

1 2

1uF 6.3V

21

C2772

10uF 6.3V

C2630

1uF 6.3V

21

C2770

10uF 6.3V

C2642

1uF 6.3V

1 2

C2769

10uF 6.3V

C2641

1 2

1uF 6.3V

10uF 6.3V

Room = MCH_CAPS_FBD_1UF

1uF 6.3V

Room = MCH_CAPS_FBD_10UF

Intel indicates these can be depoped for BNB.

MCH MISC Decoupling

3

Encourage keeping all caps regardless of BNB or GrnCrk

4

+1.5V

Room = MCH_CAPS_PCIE_1UF

21

C2648

1uF 6.3V

1 2

C2775

10uF 6.3V

C2647

1 2

1uF 6.3V

Room = MCH_CAPS_PCIE_10UF

10uF 6.3V

C2651

1 2

C2645

1 2

21

C2650

1uF 6.3V1uF 6.3V

21

C2644

C2652

1 2

1uF 6.3V

C2646

1 2

1uF 6.3V

21

C2649

1uF 6.3V

21

C2643

1uF 6.3V

21

C2654

1uF 6.3V

C2653

1 2

1uF 6.3V

21

C2776

MCH EXPRESS caps

TODO: Place final decoupling when Intel gets it done.

+1.5V

Room = MCH_CAPS_SF_1UF

21

C2657

1 2

C2777

C2658

1 2

1uF 6.3V

21

C2778

10uF 6.3V

21

C2656

1uF 6.3V

C2659

1uF 6.3V

ROOM = MCH_CAPS_SF_10UF

10uF 6.3V

MCH VCC Snoop Filter Caps

1 2

C2655

1 2

1uF 6.3V

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

MCH DECOUPLING

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

HX601

DATE

9/7/2007 27 OF 136

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

INC.

ROUND ROCK,TEXAS

REV.

A00

SHEET

MCH

211

4

C

DBA

1

+1.5V

R4358

1 2

ECAD: ROUTE CORE_VSSA BETWEEN CORE_VCCA AND FSB_VCCA (SPACE 10MIL)

.499-1%

A B C

MOD_MCH_CORE_VCCA_L

PROPAGATION_DELAY=L:S::200

NET_PHYSICAL_TYPE=25MIL

L1760

1 2

4.7uH 80mA

28.9mA

D

ROOM=MCH_VREF_FSB0

R4357

+CPU_VTT

+1.5V

MOD_MCH_CORE_VCCA

PROPAGATION_DELAY=L:S::700

NET_PHYSICAL_TYPE=25MIL

21

22

R4841

1 2

PDG 5.7.3.4

R4376

1 2

649-1%

21

R4381

MOD_MCH_FSB_CRES

PROPAGATION_DELAY=L:S::1000

49.9-1%

22

R4383

1 2

49.9-1%

R4392

1 2

680-5%

SUB=NP0

MOD_MCH_FSB0_VREF_R

NET_PHYSICAL_TYPE=50MILS

21

100-1%

NC_TP_MOD_MCH_FSB0_VREF_R

NET_PHYSICAL_TYPE=30MIL

R4335

1 2

0-5%

21

C2676

1uF 6.3V

MOD_MCH_FSB0_VREF

PROPAGATION_DELAY=L:S::1500 NET_PHYSICAL_TYPE=50MILS

ECAD: Route <1.5" trace.

ECAD: Route at 30-50mils

22

1

+1.5V

21

R4359

+1.5V

.499-1%

MOD_MCH_FSB_VCCA_L

PROPAGATION_DELAY=L:S::200

NET_PHYSICAL_TYPE=25MIL

L1761

21

4.7uH 80mA

28.9mA

ROOM=MCH_FILTER_FSB

ECAD: ROUTE EACH FBD VCCA/VSSA AS DIFF PAIR (SPACE 10MIL)

C2755

C2763

1 2

C2754

22uF 6.3V22uF 6.3V

C2762

.1uF

10V-10%

MOD_MCH_CORE_VSSA

NET_PHYSICAL_TYPE=25MIL

21

.1uF

10V-10%

MOD_MCH_FSB_VCCA

PROPAGATION_DELAY=L:S::700

NET_PHYSICAL_TYPE=25MIL

22

MCH - FSB/CORE PLL/COMP/VREF CKTS

NP

R4992

X

MOD_MCH_FSB_ODTCRES

PROPAGATION_DELAY=L:S::1000

MOD_MCH_FSB_SLWCRES

PROPAGATION_DELAY=L:S::1000

MOD_MCH_FSB_SLWCTRL

PROPAGATION_DELAY=L:S::1000

Could pull-down MOD_MCH_FSB_SLWCTRL for debug

1K-1% 1K-1%

1 2

TODO: get guidance on max lengths, not in PDG

+1.5V

22

This one was actually routed to 121 mils, so I bumped it to 130

+CPU_VTT

R4382

1 2

49.9-1%

R4391

R4356

680-5%

SUB=NP0

MOD_MCH_FSB1_VREF_R

NET_PHYSICAL_TYPE=50MILS PROPAGATION_DELAY=L:S::130

100-1%

1 2

NC_TP_MOD_MCH_FSB1_VREF_R

21

NET_PHYSICAL_TYPE=30MIL

21

C2675

R4334

1 2

0-5%

1uF 6.3V

ROOM=MCH_VREF_FSB1

MOD_MCH_FSB1_VREF

PROPAGATION_DELAY=L:S::1500 NET_PHYSICAL_TYPE=50MILS

ECAD: Route <1.5" trace.

ECAD: Route at 30-50mils

22

2

R4360

1 2

0.402-1%

MOD_MCH_FBD_BRANCH0_VCCA_L

PROPAGATION_DELAY=L:S::200

NET_PHYSICAL_TYPE=25MIL

ROOM=MCH_FILTER_FBD_01

+1.5V

R4361

1 2

0.402-1%

MOD_MCH_FBD_BRANCH1_VCCA_L

PROPAGATION_DELAY=L:S::200

NET_PHYSICAL_TYPE=25MIL

ROOM=MCH_FILTER_FBD_23

L1762

1 2

4.7uH 80mA

60mA

L1763

4.7uH 80mA

60mA

MOD_MCH_FBD_BRANCH0_VCCA

PROPAGATION_DELAY=L:S::1200

10uF 6.3V

1 2

21

10uF 6.3V

1 2

10uF 6.3V

C3353

10uF 6.3V

C3354

21

C2756

C2758

21

C2757

21

C2759

.1uF

10V-10%

.1uF

10V-10%

NET_PHYSICAL_TYPE=50MIL

MOD_MCH_FBD_BRANCH0_VSSA

PROPAGATION_DELAY=L:S::1200

NET_PHYSICAL_TYPE=50MIL

MOD_MCH_FBD_BRANCH1_VCCA

PROPAGATION_DELAY=L:S::1200

NET_PHYSICAL_TYPE=50MIL

MOD_MCH_FBD_BRANCH1_VSSA

PROPAGATION_DELAY=L:S::1200

NET_PHYSICAL_TYPE=50MIL

23

R4388

1 2

21

R4349

100-1%

51.1-1%

21

R4389

R4337

1 2

R4390

100-1%

121-1%

100-1%

1 2

MOD_MCH_FBD_RESIN

PROPAGATION_DELAY=L:S::1000

MOD_MCH_FBD_BGBIAS_EXT

PROPAGATION_DELAY=L:S::1000

MOD_MCH_FBD_ICOMP_BIAS

PROPAGATION_DELAY=L:S::1000

ROOM = MCH

2

23

3

Derating for L = 90

+1.5V

21

R4362

.499-1%

ECAD: ROUTE PE VCCA/VSSA AS DIFF PAIR (SPACE 10MIL)

MOD_MCH_PE_VCCA_L

PROPAGATION_DELAY=L:S::200

NET_PHYSICAL_TYPE=25MIL

ROOM = MCH_FILTER_PCIE

L1764

4.7uH 80mA

30.9mA

MCH - FBD PLL/COMP CKTS

2.5V 0.6mA Reference Voltage off 3.3V supply

TODO: Evaulate putting in a lower mA Inductor (trio)

ECAD: ROUTE PE VCCA/VSSA AS DIFF PAIR (SPACE 10MIL)

ROOM = MCH

+1.5V

21

C2760

22uF 6.3V

21

C2761

.1uF

10V-10%

MOD_MCH_PE_VCCA

PROPAGATION_DELAY=L:S::700

NET_PHYSICAL_TYPE=50MIL

MOD_MCH_PE_VSSA

PROPAGATION_DELAY=L:S::700

NET_PHYSICAL_TYPE=50MIL

24

R4323

24.9-1%

1 2

MOD_MCH_PE_COMP

PROPAGATION_DELAY=L:S::1000

24

NET_PHYSICAL_TYPE=20MIL

P2V5_VREF

56

21

C3321

22uF 6.3V

+3.3V

R5121

1 2

1

TL431ACD

6

7

160-5%

(2.5V)

D1085

2

3

R5128

1 2

.499-1%

8

dell p/n = 1X621

NET_PHYSICAL_TYPE=15MIL

MOD_MCH_PE_VCCBG_L

L1811

4.7uH 80mA

0.6mA

21

C3209

1 2

C3210

22uF 6.3V

(0.6mA)

outputs 2.5V

MOD_MCH_PE_VCCBG

PROPAGATION_DELAY=L:S::1200

NET_PHYSICAL_TYPE=15MIL

21

.1uF

16V-10%

ECAD:PROPAGATION_DELAY=L:S::700 ECAD: NET_PHYSICAL_TYPE=15mil

MOD_MCH_PE_VSSBG0

24

3

4

MCH - PE PLL/COMP/BAND GAP CKTS

Filter implemented per 0.7 PDG pag275-280, 10.4.2.1

MCH - Analog/ BandGap/ Comp Ckts

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

ROOM = MCH_VREF_PCIE

M2LB_Change_Note:

ROOM = MCH

Removed constraint on MOD_MCH_FSB0_VREF_R.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 28 OF 136

DCBA

MCH

211

4

A B C

C885

MOD_MCH_EXP_MCH_0_SB_0_N_C

24

21

EXP_MCH_0_SB_0_N

49

D

1

2

MCH TO ESB2

ROOM = LAI_MCH

MOD_MCH_EXP_MCH_0_SB_0_P_C

24

MOD_MCH_EXP_MCH_0_SB_1_N_C

24

MOD_MCH_EXP_MCH_0_SB_1_P_C

24

MOD_MCH_EXP_MCH_0_SB_2_N_C

24

MOD_MCH_EXP_MCH_0_SB_2_P_C

24

MOD_MCH_EXP_MCH_0_SB_3_N_C

24

MOD_MCH_EXP_MCH_0_SB_3_P_C

24

MOD_MCH_EXP_MCH_2_SB_0_N_C

24

MOD_MCH_EXP_MCH_2_SB_0_P_C

24

MOD_MCH_EXP_MCH_2_SB_1_N_C

24

MOD_MCH_EXP_MCH_2_SB_1_P_C

24

MOD_MCH_EXP_MCH_2_SB_2_N_C

24

MOD_MCH_EXP_MCH_2_SB_2_P_C

24

MOD_MCH_EXP_MCH_2_SB_3_N_C

24

MOD_MCH_EXP_MCH_2_SB_3_P_C

24

.1uF

10V-10%

C883

21

.1uF

10V-10%

C887

21

.1uF

10V-10%

C889

21

.1uF

10V-10%

C877

.1uF

10V-10%

C875

.1uF

10V-10%

C879

.1uF

10V-10%

C881

.1uF

10V-10%

C884

21

EXP_MCH_0_SB_0_P

49

.1uF

10V-10%

EXP_MCH_0_SB_1_N

49

C886

21

.1uF

10V-10%

EXP_MCH_0_SB_1_P

EXP_MCH_0_SB_2_N

49

1

49

C888

21

EXP_MCH_0_SB_2_P

49

.1uF

10V-10%

EXP_MCH_0_SB_3_N

49

C890

21

EXP_MCH_0_SB_3_P

49

.1uF

10V-10%

ROMB X4

21

C876

21

.1uF

21

10V-10%

C878

21

.1uF

21

10V-10%

C880

21

.1uF

21

10V-10%

C882

21

.1uF

10V-10%

EXP_MCH_2_SB_0_N

EXP_MCH_2_SB_0_P

EXP_MCH_2_SB_1_N

EXP_MCH_2_SB_1_P

EXP_MCH_2_SB_2_N

EXP_MCH_2_SB_2_P

EXP_MCH_2_SB_3_N

EXP_MCH_2_SB_3_P

49

ROOM = PCIE_ROMB_X4

MOD_MCH_EXP_MCH_3_SB_0_N_C

24

MOD_MCH_EXP_MCH_3_SB_0_P_C

24

MOD_MCH_EXP_MCH_3_SB_1_N_C

24

MOD_MCH_EXP_MCH_3_SB_1_P_C

24

MOD_MCH_EXP_MCH_3_SB_2_N_C

24

MOD_MCH_EXP_MCH_3_SB_2_P_C

24

MOD_MCH_EXP_MCH_3_SB_3_N_C

24

MOD_MCH_EXP_MCH_3_SB_3_P_C

24

C869

21

.1uF

10V-10%

C867

21

.1uF

10V-10%

C871

21

.1uF

10V-10%

C873

21

.1uF

10V-10%

C868

21

.1uF

10V-10%

C870

21

.1uF

10V-10%

C872

21

.1uF

10V-10%

C874

21

.1uF

10V-10%

EXP_MCH_3_SB_0_N

EXP_MCH_3_SB_0_P

EXP_MCH_3_SB_1_N

EXP_MCH_3_SB_1_P

EXP_MCH_3_SB_2_N

EXP_MCH_3_SB_2_P

EXP_MCH_3_SB_3_N

EXP_MCH_3_SB_3_P

70

2

3

X8 SLOT

ROOM = PCIE_RISER2_X8

MOD_MCH_EXP_MCH_4_SB_0_N_C

24

MOD_MCH_EXP_MCH_4_SB_0_P_C

24

MOD_MCH_EXP_MCH_4_SB_1_N_C

24

MOD_MCH_EXP_MCH_4_SB_1_P_C

24

MOD_MCH_EXP_MCH_4_SB_2_N_C

24

MOD_MCH_EXP_MCH_4_SB_2_P_C

24

MOD_MCH_EXP_MCH_4_SB_3_N_C

24

MOD_MCH_EXP_MCH_4_SB_3_P_C

24

C917

21

.1uF

10V-10%

C915

21

.1uF

10V-10%

C919

21

.1uF

10V-10%

C921

21

.1uF

10V-10%

C916

21

.1uF

10V-10%

C918

21

.1uF

10V-10%

C920

21

.1uF

10V-10%

C922

21

.1uF

10V-10%

EXP_MCH_4_SB_0_N

EXP_MCH_4_SB_0_P

EXP_MCH_4_SB_1_N

EXP_MCH_4_SB_1_P

EXP_MCH_4_SB_2_N

EXP_MCH_4_SB_2_P

EXP_MCH_4_SB_3_N

EXP_MCH_4_SB_3_P

72

MOD_MCH_EXP_MCH_5_SB_0_N_C

24

MOD_MCH_EXP_MCH_5_SB_0_P_C

24

MOD_MCH_EXP_MCH_5_SB_1_N_C

24

MOD_MCH_EXP_MCH_5_SB_1_P_C

24

MOD_MCH_EXP_MCH_5_SB_2_N_C

24

MOD_MCH_EXP_MCH_5_SB_2_P_C

24

MOD_MCH_EXP_MCH_5_SB_3_N_C

24

MOD_MCH_EXP_MCH_5_SB_3_P_C

24

C909

21

.1uF

10V-10%

C907

21

.1uF

10V-10%

C911

21

.1uF

10V-10%

C913

21

.1uF

10V-10%

C908

21

.1uF

10V-10%

C910

21

.1uF

10V-10%

C912

21

.1uF

10V-10%

C914

21

.1uF

10V-10%

EXP_MCH_5_SB_0_N

EXP_MCH_5_SB_0_P

EXP_MCH_5_SB_1_N

EXP_MCH_5_SB_1_P

EXP_MCH_5_SB_2_N

EXP_MCH_5_SB_2_P

EXP_MCH_5_SB_3_N

EXP_MCH_5_SB_3_P

72

3

4

x8 Slot

ROOM = PCIE_RISER1_X8

C901

MOD_MCH_EXP_MCH_6_SB_0_N_C

24

MOD_MCH_EXP_MCH_6_SB_0_P_C

24

MOD_MCH_EXP_MCH_6_SB_1_N_C

24

MOD_MCH_EXP_MCH_6_SB_1_P_C

24

MOD_MCH_EXP_MCH_6_SB_2_N_C

24

MOD_MCH_EXP_MCH_6_SB_2_P_C

24

MOD_MCH_EXP_MCH_6_SB_3_N_C

24

MOD_MCH_EXP_MCH_6_SB_3_P_C

24

21

.1uF

10V-10%

C899

21

.1uF

10V-10%

C903

21

.1uF

10V-10%

C905

21

.1uF

10V-10%

C900

21

.1uF

10V-10%

C902

21

.1uF

10V-10%

C904

21

.1uF

10V-10%

C906

21

EXP_MCH_6_SB_0_N

EXP_MCH_6_SB_0_P

EXP_MCH_6_SB_1_N

EXP_MCH_6_SB_1_P

EXP_MCH_6_SB_2_N

EXP_MCH_6_SB_2_P

EXP_MCH_6_SB_3_N

EXP_MCH_6_SB_3_P

71

.1uF

10V-10%

Only the PCIe caps for the TX side are contained within the Sub-System Mod

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

MCH - PCIE TX CAPS

MOD_MCH_EXP_MCH_7_SB_0_N_C

24

MOD_MCH_EXP_MCH_7_SB_0_P_C

24

MOD_MCH_EXP_MCH_7_SB_1_N_C

24

MOD_MCH_EXP_MCH_7_SB_1_P_C

24

MOD_MCH_EXP_MCH_7_SB_2_N_C

24

MOD_MCH_EXP_MCH_7_SB_2_P_C

24

MOD_MCH_EXP_MCH_7_SB_3_N_C

24

MOD_MCH_EXP_MCH_7_SB_3_P_C

24

M2LB_Change_Note: Changed ROOM names, boxes, and text.

C893

.1uF

10V-10%

C891

.1uF

10V-10%

C895

.1uF

10V-10%

C897

.1uF

10V-10%

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

1 21

SEC

21

MCH

C892

.1uF

10V-10%

C894

.1uF

10V-10%

C896

.1uF

10V-10%

C898

.1uF

10V-10%

TITLE

DWG NO.

DATE

EXP_MCH_7_SB_0_N

21

EXP_MCH_7_SB_0_P

EXP_MCH_7_SB_1_N

21

EXP_MCH_7_SB_1_P

EXP_MCH_7_SB_2_N

21

EXP_MCH_7_SB_2_P

EXP_MCH_7_SB_3_N

21

EXP_MCH_7_SB_3_P

71

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

A00

SHEET

9/7/2007 29 OF 136

4

DCBA

A B C

D

1

2

+3.3V

21

R3686

R3687

1 2

330-5%330-5%

MOD_MCH_XDP1_CLKREF

21

C1981

Note: .0052W > 1/32W. Need 1/16W resistor

21,24,53,63,71,72,91,96

.1uF

16V-10%

126

SYSTEM_PWRGOOD_XDP1

I2C_CHIPSET_SDA

I2C_CHIPSET_SCL

30

NP0

R5279

1 2

0-5%

R5278

0-5%

R5277

1 2

0-5%

MOD_MCH_SYSTEM_PWRGOOD

21

24 24

45 30

MOD_MCH_XDP1_DSTBP_N MOD_MCH_XDP1_RDY_N

MOD_MCH_XDP1_D_0_N MOD_MCH_XDP1_D_1_N

MOD_MCH_XDP1_D_2_N MOD_MCH_XDP1_D_3_N

NC_MOD_MCH_XDP1_21 NC_MOD_MCH_XDP1_23 NC_MOD_MCH_XDP1_24

MOD_MCH_XDP1_D_4_N MOD_MCH_XDP1_D_5_N

MOD_MCH_XDP1_D_6_N MOD_MCH_XDP1_D_7_N

NC_ESB_TP0

CK_33M_XDP1 MOD_MCH_XDP1_CLKREF

MOD_MCH_XDP1_SDA_R MOD_MCH_XDP1_SCL_R NC_MOD_MCH_XDP1_55 NC_MOD_MCH_XDP1_57

J_XDP1_MCH

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60

+1.5V

MOD_MCH_XDP1_DSTBN_N

NC_MOD_MCH_XDP1_6

MOD_MCH_XDP1_D_8_N MOD_MCH_XDP1_D_9_N

MOD_MCH_XDP1_D_10_N MOD_MCH_XDP1_D_11_N

NC_MOD_MCH_XDP1_22

MOD_MCH_XDP1_D_12_N MOD_MCH_XDP1_D_13_N

MOD_MCH_XDP1_D_14_N MOD_MCH_XDP1_D_15_N

CK_333M_XDP1_P CK_333M_XDP1_N

NC_MOD_MCH_XDP1_52 NC_MOD_MCH_XDP1_54 NC_MOD_MCH_XDP1_56 NC_MOD_MCH_XDP1_58

549-1%

R4336

1 2

R4384

1 2

24

24 24

ROOM = MCH

24 24

46,47

XDP_BCLK

46,47

MOD_MCH_PLT_RST_XDP1_N PLT_RST_XDP1_N

RESET_BTN_N

ECAD: Place series resistor at split from the rest of the trace

R5276

1 2

21,54,58,95,128

P46 is an input and should be tied to the system reset

P48 is an output from the XDP to reset the systemb

0-5%

NP0

MOD_MCH_XDP1_COMCRES

NET_PHYSICAL_TYPE=15MIL PROPAGATION_DELAY=L:S::1200

49.9-1%

MOD_MCH_XDP1_ODTCRES

MOD_MCH_XDP1_SLWCRES

NET_PHYSICAL_TYPE=15MIL PROPAGATION_DELAY=L:S::1200

126

24

1

24

2

2X30 MICRO-SOCKET CONN

NP0

ROOM = XDP1

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

MCH - XDP

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 30 OF 136

DCBA

MCH

211

4

A B C

0.7 PDG p262 covers CPU decoupling requirements

D

ECAD: Place as many 10uF caps under CPU as possible ECAD: EE: All caps in CPU cavity must be X7R

1

+CPU_VID1

10uF 6.3V

C723

21

NOTE: caps in box are X6S

10uF 6.3V

C724

21

ECAD: Place these 12 caps in CPU socket cavity

10uF 6.3V

C725

21

10uF 6.3V

C726

21

10uF 6.3V

21

C727

10uF 6.3V

C729

21

10uF 6.3V

C732

21

10uF 6.3V

C733

21

10uF 6.3V

C734

21

ECAD: Place similar numbers of caps on all 4 sides of CPU.

ROOM = PROC1_10UF_X6S

new caps are c3400 C3401 C3402 and C3403s from Intel DT#2282

ROOM = PROC1_10UF

1

0.7 PDG, Table 10-9 Min Caps (Per CPU)

17 - 560uF 9 - 10uF inside proc cavity - X6S min

41- 10uF outside proc cavity - X5R min

advance information from Paris team: 45 10uF caps outside proc cavity

2

+CPU_VID0

21

C708

10uF 6.3V

C2696

21

10uF 6.3V

1 2

C709

ECAD: Place on back side of planar

10uF 6.3V

C2695

21

ECAD: Place on back side of planar

10uF 6.3V

1 2

C710

10uF 6.3V

C2694

21

10uF 6.3V

1 2

10uF 6.3V

21

NOTE: caps in box are X6S

C711

C2693

10uF 6.3V

C695

21

10uF 6.3V

1 2

C2697

10uF 6.3V

C707

21

10uF 6.3V

1 2

C2687

10uF 6.3V

C712

21

10uF 6.3V

1 2

C2685

10uF 6.3V

C713

21

10uF 6.3V

1 2

C2692

10uF 6.3V

C714

21

10uF 6.3V

1 2

C2691

10uF 6.3V

C715

21

10uF 6.3V

1 2

C2690

10uF 6.3V

C716

21

10uF 6.3V

1 2

C2689

10uF 6.3V

C746

21

10uF 6.3V

1 2

C2688

10uF 6.3V

C747

21

10uF 6.3V

1 2

C2686

10uF 6.3V

21

1 2

C2684

C2698

10uF 6.3V

21

1 2

C2678

C2704

10uF 6.3V

21

1 2

C2679

C2703

10uF 6.3V

21

1 2

C2680

C2702

10uF 6.3V

21

1 2

C2681

C2701

10uF 6.3V

1 2

C2682

C2700

10uF 6.3V

21

1 2

C2683

C2699

10uF 6.3V

C3400

21

10uF 6.3V

C728

21

10uF 6.3V

C3401

21

10uF 6.3V

C730

21

10uF 6.3V

21

10uF 6.3V

C731

21

10uF 6.3V

C3402

C3403

21

2

3

10uF 6.3V

C735

21

10uF 6.3V 10uF 6.3V

C2716

21

10uF 6.3V

C751

21

ECAD: Place these 12 caps in CPU socket cavity

10uF 6.3V 10uF 6.3V

C2715

21

ECAD: Place on back side of planar

10uF 6.3V

C750

21

C2714

21

10uF 6.3V

C736

21

10uF 6.3V 10uF 6.3V

C2713

21

10uF 6.3V

C737

21

10uF 6.3V

1 2

C2717

10uF 6.3V

C738

21

10uF 6.3V

1 2

C2707

10uF 6.3V

1 2

C2705

10uF 6.3V

1 2

C2712

10uF 6.3V

C741

21

10uF 6.3V

1 2

C2711

10uF 6.3V

C742

21

10uF 6.3V

1 2

C2710

10uF 6.3V

C743

21

10uF 6.3V

1 2

C2709

10uF 6.3V

1 2

C2708

10uF 6.3V

1 2

C2706

ROOM = PROC0_10UF_X6S

ROOM = PROC0_10UF

10uF 6.3V

1 2

C2718

10uF 6.3V

1 2

C2724

10uF 6.3V

1 2

C2723

10uF 6.3V

1 2

C2722

ECAD: Hook up VCCSENSE per Intel PDG

10uF 6.3V

1 2

C2721

10uF 6.3V

1 2

C2720

10uF 6.3V

1 2

C2719

10uF 6.3V

C3406

21

10uF 6.3V

C3405

21

10uF 6.3V

C3404

21

3

10uF 6.3V

C3407

21

4

1 2

C2733

C2734

1 2

ECAD: Place on back side of planar

10uF 6.3V10uF 6.3V

1 2

C2735

1 2

C2736

10uF 6.3V

C2732

21

10uF 6.3V

C2742

21

10uF 6.3V

C2744

21

10uF 6.3V

C2737

21

10uF 6.3V

C2738

21

10uF 6.3V

C2739

21

10uF 6.3V

C2740

21

10uF 6.3V

C2741

21

10uF 6.3V

C2743

21

10uF 6.3V

C2731

21

10uF 6.3V

C2725

21

10uF 6.3V

C2726

21

10uF 6.3V

C2727

21

10uF 6.3V

C2728

21

10uF 6.3V

C2729

21

10uF 6.3V

C2730

21

10uF 6.3V

C744

21

10uF 6.3V

C740

21

10uF 6.3V

C739

21

new caps are C3406 C3405 C3404 and C3407

TITLE

MODULE: DESC: REV: OF

CPUS,FSB,NB,XDP0,XDP1

SEC

INC.

ROUND ROCK,TEXAS

MCH

211

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

CPU Decoupling

DWG NO.

DATE

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 31 OF 136

DCBA

A B C

CHANNEL 0 DIMM0

D

1

2

3

46,47 46,47

33,36,37,44

23 23 23 23 23 23 23 23 23 23 23 23 23 23

23 23 23 23 23 23 23 23 23 23

CK_167M_DIMM00_P CK_167M_DIMM00_N

NC_MOD_MEM_FBD_CH0_D0_VID1 NC_MOD_MEM_FBD_CH0_D0_VID0

MOD_MEM_FBD_BR0_RST_N

NC_MOD_MEM_FBD_CH0_D0_207 NC_MOD_MEM_FBD_CH0_D0_206 NC_MOD_MEM_FBD_CH0_D0_165 NC_MOD_MEM_FBD_CH0_D0_164 NC_MOD_MEM_FBD_CH0_D0_87 NC_MOD_MEM_FBD_CH0_D0_86 NC_MOD_MEM_FBD_CH0_D0_45 NC_MOD_MEM_FBD_CH0_D0_44

FBD_CH0_MCH_NB_13_P FBD_CH0_MCH_NB_12_P FBD_CH0_MCH_NB_11_P FBD_CH0_MCH_NB_10_P FBD_CH0_MCH_NB_9_P FBD_CH0_MCH_NB_8_P FBD_CH0_MCH_NB_7_P FBD_CH0_MCH_NB_6_P FBD_CH0_MCH_NB_5_P FBD_CH0_MCH_NB_4_P FBD_CH0_MCH_NB_3_P FBD_CH0_MCH_NB_2_P FBD_CH0_MCH_NB_1_P FBD_CH0_MCH_NB_0_P

FBD_CH0_MCH_NB_13_N FBD_CH0_MCH_NB_12_N FBD_CH0_MCH_NB_11_N FBD_CH0_MCH_NB_10_N FBD_CH0_MCH_NB_9_N FBD_CH0_MCH_NB_8_N FBD_CH0_MCH_NB_7_N FBD_CH0_MCH_NB_6_N FBD_CH0_MCH_NB_5_N FBD_CH0_MCH_NB_4_N FBD_CH0_MCH_NB_3_N FBD_CH0_MCH_NB_2_N FBD_CH0_MCH_NB_1_N FBD_CH0_MCH_NB_0_N

FBD_CH0_MCH_SB_9_P FBD_CH0_MCH_SB_8_P FBD_CH0_MCH_SB_7_P FBD_CH0_MCH_SB_6_P FBD_CH0_MCH_SB_5_P FBD_CH0_MCH_SB_4_P FBD_CH0_MCH_SB_3_P FBD_CH0_MCH_SB_2_P FBD_CH0_MCH_SB_1_P FBD_CH0_MCH_SB_0_P

FBD_CH0_MCH_SB_9_N FBD_CH0_MCH_SB_8_N FBD_CH0_MCH_SB_7_N FBD_CH0_MCH_SB_6_N FBD_CH0_MCH_SB_5_N FBD_CH0_MCH_SB_4_N FBD_CH0_MCH_SB_3_N FBD_CH0_MCH_SB_2_N FBD_CH0_MCH_SB_1_N FBD_CH0_MCH_SB_0_N

Silkscreen: DIMM1

J_DIMM_00

40

PNP_13

48

PNP_12

66

PNP_11

63

PNP_10

60

PNP_9

57

PNP_8

54

PNP_7

51

PNP_6

37

PNP_5

34

PNP_4

31

PNP_3

28

PNP_2

25

PNP_1

22

PNP_0

41

PNN_13

49

PNN_12

67

PNN_11

64

PNN_10

61

PNN_9

58

PNN_8

55

PNN_7

52

PNN_6

38

PNN_5

35

PNN_4

32

PNN_3

29

PNN_2

26

PNN_1

23

PNN_0

90

PSP_9

102

PSP_8

99

PSP_7

96

PSP_6

93

PSP_5

82

PSP_4

79

PSP_3

76

PSP_2

73

PSP_1

70

PSP_0

91

PSN_9

103

PSN_8

100

PSN_7

97

PSN_6

94

PSN_5

83

PSN_4

80

PSN_3

77

PSN_2

74

PSN_1

71

PSN_0

228 120

SCKP SCL

229

SCKN

16

VID1

136

VID0

17

RESET_N

SNP_13 SNP_12 SNP_11 SNP_10

SNP_9 SNP_8 SNP_7 SNP_6 SNP_5 SNP_4 SNP_3 SNP_2 SNP_1 SNP_0

SNN_13 SNN_12 SNN_11 SNN_10

SNN_9 SNN_8 SNN_7 SNN_6 SNN_5 SNN_4 SNN_3 SNN_2 SNN_1 SNN_0

SSP_9 SSP_8 SSP_7 SSP_6 SSP_5 SSP_4 SSP_3 SSP_2 SSP_1 SSP_0

SSN_9 SSN_8 SSN_7 SSN_6 SSN_5 SSN_4 SSN_3 SSN_2 SSN_1 SSN_0

RFU_20

207

RFUCLK_207

206

RFUCLK_206

165

RFUCLK_165

164

RFUCLK_164

87

RFUCLK_87

86

RFUCLK_86

45

RFUCLK_45

44

RFUCLK_44

RFU_19 RFU_106 RFU_105 RFU_137 RFU_139 RFU_140 RFU_225 RFU_226

SDA

SA2 SA1 SA0

160 168 186 183 180 177 174 171 157 154 151 148 145 142

161 169 187 184 181 178 175 172 158 155 152 149 146 143

210 222 219 216 213 202 199 196 193 190

211 223 220 217 214 203 200 197 194 191

119

i2c addressing defined by Montreal_I2C_Map_v0p8.pdf

118 240 239

20 19 106 105 137 139 140 225 226

MOD_MEM_FBD_CH0_D0_NB_13_P MOD_MEM_FBD_CH0_D0_NB_12_P MOD_MEM_FBD_CH0_D0_NB_11_P MOD_MEM_FBD_CH0_D0_NB_10_P

MOD_MEM_FBD_CH0_D0_NB_9_P MOD_MEM_FBD_CH0_D0_NB_8_P MOD_MEM_FBD_CH0_D0_NB_7_P MOD_MEM_FBD_CH0_D0_NB_6_P MOD_MEM_FBD_CH0_D0_NB_5_P MOD_MEM_FBD_CH0_D0_NB_4_P MOD_MEM_FBD_CH0_D0_NB_3_P MOD_MEM_FBD_CH0_D0_NB_2_P MOD_MEM_FBD_CH0_D0_NB_1_P MOD_MEM_FBD_CH0_D0_NB_0_P

MOD_MEM_FBD_CH0_D0_NB_13_N MOD_MEM_FBD_CH0_D0_NB_12_N MOD_MEM_FBD_CH0_D0_NB_11_N MOD_MEM_FBD_CH0_D0_NB_10_N

MOD_MEM_FBD_CH0_D0_NB_9_N MOD_MEM_FBD_CH0_D0_NB_8_N MOD_MEM_FBD_CH0_D0_NB_7_N MOD_MEM_FBD_CH0_D0_NB_6_N MOD_MEM_FBD_CH0_D0_NB_5_N MOD_MEM_FBD_CH0_D0_NB_4_N MOD_MEM_FBD_CH0_D0_NB_3_N MOD_MEM_FBD_CH0_D0_NB_2_N MOD_MEM_FBD_CH0_D0_NB_1_N MOD_MEM_FBD_CH0_D0_NB_0_N

MOD_MEM_FBD_CH0_D0_SB_9_P MOD_MEM_FBD_CH0_D0_SB_8_P MOD_MEM_FBD_CH0_D0_SB_7_P MOD_MEM_FBD_CH0_D0_SB_6_P MOD_MEM_FBD_CH0_D0_SB_5_P MOD_MEM_FBD_CH0_D0_SB_4_P MOD_MEM_FBD_CH0_D0_SB_3_P MOD_MEM_FBD_CH0_D0_SB_2_P MOD_MEM_FBD_CH0_D0_SB_1_P MOD_MEM_FBD_CH0_D0_SB_0_P

MOD_MEM_FBD_CH0_D0_SB_9_N MOD_MEM_FBD_CH0_D0_SB_8_N MOD_MEM_FBD_CH0_D0_SB_7_N MOD_MEM_FBD_CH0_D0_SB_6_N MOD_MEM_FBD_CH0_D0_SB_5_N MOD_MEM_FBD_CH0_D0_SB_4_N MOD_MEM_FBD_CH0_D0_SB_3_N MOD_MEM_FBD_CH0_D0_SB_2_N MOD_MEM_FBD_CH0_D0_SB_1_N MOD_MEM_FBD_CH0_D0_SB_0_N

MOD_MEM_I2C_FBD_CH0_SCL MOD_MEM_I2C_FBD_CH0_SDA

i2c address A0 1010 (000) 0

MOD_MEM_I2C_ADD_PD_GND

NC_MOD_MEM_FBD_CH0_D0_20

NC_MOD_MEM_FBD_CH0_D0_19 NC_MOD_MEM_FBD_CH0_D0_106 NC_MOD_MEM_FBD_CH0_D0_105 NC_MOD_MEM_FBD_CH0_D0_137 NC_MOD_MEM_FBD_CH0_D0_139 NC_MOD_MEM_FBD_CH0_D0_140 NC_MOD_MEM_FBD_CH0_D0_225 NC_MOD_MEM_FBD_CH0_D0_226

33-39

36 36 36 36 36 36 36 36 36 36 36 36 36 36

36 36 36 36 36 36 36 36 36 36

32,36,44

+1.8V +1.5V +0.9V

J_DIMM_00

91

VCC_9VDD_1

2 3 5 6

7 121 122 123 125 126 127 108 109 111 112 113 115 116 236 235 233 232 231

4

8

11 14 18 21 24 27 30 33 36 39 42 43 46 47 50 53 56 59 62 65 68 69 72 75 78 81 84 85 88 89 92 95

98 101 104 107 110 114

VDD_2 VDD_3 VDD_5 VDD_6 VDD_7 VDD_121 VDD_122 VDD_123 VDD_125 VDD_126 VDD_127 VDD_108 VDD_109 VDD_111 VDD_112 VDD_113 VDD_115 VDD_116 VDD_236 VDD_235 VDD_233 VDD_232 VDD_231

VSS_4 VSS_8 VSS_11 VSS_14 VSS_18 VSS_21 VSS_24 VSS_27 VSS_30 VSS_33 VSS_36 VSS_39 VSS_42 VSS_43 VSS_46 VSS_47 VSS_50 VSS_53 VSS_56 VSS_59 VSS_62 VSS_65 VSS_68 VSS_69 VSS_72 VSS_75 VSS_78 VSS_81 VSS_84 VSS_85 VSS_88 VSS_89 VSS_92 VSS_95 VSS_98 VSS_101 VSS_104 VSS_107 VSS_110 VSS_114

VCC_10 VCC_12

VCC_13 VCC_129 VCC_130 VCC_132 VCC_133

VTT_15 VTT_117 VTT_135 VTT_237

VDD_SPD

VSS_124 VSS_128 VSS_131 VSS_134 VSS_138 VSS_141 VSS_144 VSS_147 VSS_150 VSS_153 VSS_156 VSS_159 VSS_162 VSS_163 VSS_166 VSS_167 VSS_170 VSS_173 VSS_176 VSS_179 VSS_182 VSS_185 VSS_188 VSS_189 VSS_192 VSS_195 VSS_198 VSS_201 VSS_204 VSS_205 VSS_208 VSS_209 VSS_212 VSS_215 VSS_218 VSS_221 VSS_224 VSS_227 VSS_230 VSS_234

10 12 13 129 130 132 133

15 117 135 237

238

124 128 131 134 138 141 144 147 150 153 156 159 162 163 166 167 170 173 176 179 182 185 188 189 192 195 198 201 204 205 208 209 212 215 218 221 224 227 230 234

+3.3V

21

C2871

.1uF

10V-10%

C3420

1 2

21

C3419

1uF 6.3V

21

C3459

1uF 6.3V

22uF 6.3V

+1.8V

21

C3458

C3421

22uF 6.3V

+1.5V

21

1uF 6.3V

C273

1 2

21

C3460

22uF 6.3V

+1.8V

NP

C752

X

+1.5V

C754

1 2

+0.9V

C412

1 2

1

1 2

22uF 6.3V

2

22uF 6.3V

3

1uF 6.3V

4

32,36,44

FBD CHANNEL DIMM REV 36

HETERO 1 OF 2

White latch

MOD_MEM_I2C_FBD_CH0_SCL

MOD_MEM_I2C_FBD_CH0_SDA

R5923

1 2

47-5%

R5922

1 2

47-5%

I2C_FBD_CH0_SCL

I2C_FBD_CH0_SDA

23

ROOM=DIMM1

23

FBD CHANNEL DIMM REV 36

HETERO 2 OF 2

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

A00

SHEET

9/7/2007 32 OF 136

MEM

4

C

DBA

A B C

CHANNEL 1 DIMM0

+1.8V +1.5V +0.9V +3.3V

Silkscreen: DIMM2

J_DIMM_10

D

1

2

3

46,47 46,47

32,36,37,44

23 23 23 23 23 23 23 23 23 23 23 23 23 23

23 23 23 23 23 23 23 23 23 23

CK_167M_DIMM10_P CK_167M_DIMM10_N

NC_MOD_MEM_FBD_CH1_D0_VID1 NC_MOD_MEM_FBD_CH1_D0_VID0

MOD_MEM_FBD_BR0_RST_N

NC_MOD_MEM_FBD_CH1_D0_207 NC_MOD_MEM_FBD_CH1_D0_206 NC_MOD_MEM_FBD_CH1_D0_165 NC_MOD_MEM_FBD_CH1_D0_164 NC_MOD_MEM_FBD_CH1_D0_87 NC_MOD_MEM_FBD_CH1_D0_86 NC_MOD_MEM_FBD_CH1_D0_45 NC_MOD_MEM_FBD_CH1_D0_44

FBD_CH1_MCH_NB_13_P FBD_CH1_MCH_NB_12_P FBD_CH1_MCH_NB_11_P FBD_CH1_MCH_NB_10_P FBD_CH1_MCH_NB_9_P FBD_CH1_MCH_NB_8_P FBD_CH1_MCH_NB_7_P FBD_CH1_MCH_NB_6_P FBD_CH1_MCH_NB_5_P FBD_CH1_MCH_NB_4_P FBD_CH1_MCH_NB_3_P FBD_CH1_MCH_NB_2_P FBD_CH1_MCH_NB_1_P FBD_CH1_MCH_NB_0_P

FBD_CH1_MCH_NB_13_N FBD_CH1_MCH_NB_12_N FBD_CH1_MCH_NB_11_N FBD_CH1_MCH_NB_10_N FBD_CH1_MCH_NB_9_N FBD_CH1_MCH_NB_8_N FBD_CH1_MCH_NB_7_N FBD_CH1_MCH_NB_6_N FBD_CH1_MCH_NB_5_N FBD_CH1_MCH_NB_4_N FBD_CH1_MCH_NB_3_N FBD_CH1_MCH_NB_2_N FBD_CH1_MCH_NB_1_N FBD_CH1_MCH_NB_0_N

FBD_CH1_MCH_SB_9_P FBD_CH1_MCH_SB_8_P FBD_CH1_MCH_SB_7_P FBD_CH1_MCH_SB_6_P FBD_CH1_MCH_SB_5_P FBD_CH1_MCH_SB_4_P FBD_CH1_MCH_SB_3_P FBD_CH1_MCH_SB_2_P FBD_CH1_MCH_SB_1_P FBD_CH1_MCH_SB_0_P

FBD_CH1_MCH_SB_9_N FBD_CH1_MCH_SB_8_N FBD_CH1_MCH_SB_7_N FBD_CH1_MCH_SB_6_N FBD_CH1_MCH_SB_5_N FBD_CH1_MCH_SB_4_N FBD_CH1_MCH_SB_3_N FBD_CH1_MCH_SB_2_N FBD_CH1_MCH_SB_1_N FBD_CH1_MCH_SB_0_N

40

PNP_13

48

PNP_12

66

PNP_11

63

PNP_10

60

PNP_9

57

PNP_8

54

PNP_7

51

PNP_6

37

PNP_5

34

PNP_4

31

PNP_3

28

PNP_2

25

PNP_1

22

PNP_0

41

PNN_13

49

PNN_12

67

PNN_11

64

PNN_10

61

PNN_9

58

PNN_8

55

PNN_7

52

PNN_6

38

PNN_5

35

PNN_4

32

PNN_3

29

PNN_2

26

PNN_1

23

PNN_0

90

PSP_9

102

PSP_8

99

PSP_7

96

PSP_6

93

PSP_5

82

PSP_4

79

PSP_3

76

PSP_2

73

PSP_1

70

PSP_0

91

PSN_9

103

PSN_8

100

PSN_7

97

PSN_6

94

PSN_5

83

PSN_4

80

PSN_3

77

PSN_2

74

PSN_1

71

PSN_0

228 120

SCKP SCL

229

SCKN

16

VID1

136

VID0

17

RESET_N

SNP_13 SNP_12 SNP_11 SNP_10

SNP_9 SNP_8 SNP_7 SNP_6 SNP_5 SNP_4 SNP_3 SNP_2 SNP_1 SNP_0

SNN_13 SNN_12 SNN_11 SNN_10

SNN_9 SNN_8 SNN_7 SNN_6 SNN_5 SNN_4 SNN_3 SNN_2 SNN_1 SNN_0

SSP_9 SSP_8 SSP_7 SSP_6 SSP_5 SSP_4 SSP_3 SSP_2 SSP_1 SSP_0

SSN_9 SSN_8 SSN_7 SSN_6 SSN_5 SSN_4 SSN_3 SSN_2 SSN_1 SSN_0

RFU_20

207

RFUCLK_207

206

RFUCLK_206

165

RFUCLK_165

164

RFUCLK_164

87

RFUCLK_87

86

RFUCLK_86

45

RFUCLK_45

44

RFUCLK_44

RFU_19 RFU_106 RFU_105 RFU_137 RFU_139 RFU_140 RFU_225 RFU_226

SDA

SA2 SA1 SA0

160 168 186 183 180 177 174 171 157 154 151 148 145 142

161 169 187 184 181 178 175 172 158 155 152 149 146 143

210 222 219 216 213 202 199 196 193 190

211 223 220 217 214 203 200 197 194 191

119

118 240 239

20 19 106 105 137 139 140 225 226

MOD_MEM_FBD_CH1_D0_NB_13_P MOD_MEM_FBD_CH1_D0_NB_12_P MOD_MEM_FBD_CH1_D0_NB_11_P MOD_MEM_FBD_CH1_D0_NB_10_P

MOD_MEM_FBD_CH1_D0_NB_9_P MOD_MEM_FBD_CH1_D0_NB_8_P MOD_MEM_FBD_CH1_D0_NB_7_P MOD_MEM_FBD_CH1_D0_NB_6_P MOD_MEM_FBD_CH1_D0_NB_5_P MOD_MEM_FBD_CH1_D0_NB_4_P MOD_MEM_FBD_CH1_D0_NB_3_P MOD_MEM_FBD_CH1_D0_NB_2_P MOD_MEM_FBD_CH1_D0_NB_1_P MOD_MEM_FBD_CH1_D0_NB_0_P

MOD_MEM_FBD_CH1_D0_NB_13_N MOD_MEM_FBD_CH1_D0_NB_12_N MOD_MEM_FBD_CH1_D0_NB_11_N MOD_MEM_FBD_CH1_D0_NB_10_N

MOD_MEM_FBD_CH1_D0_NB_9_N MOD_MEM_FBD_CH1_D0_NB_8_N MOD_MEM_FBD_CH1_D0_NB_7_N MOD_MEM_FBD_CH1_D0_NB_6_N MOD_MEM_FBD_CH1_D0_NB_5_N MOD_MEM_FBD_CH1_D0_NB_4_N MOD_MEM_FBD_CH1_D0_NB_3_N MOD_MEM_FBD_CH1_D0_NB_2_N MOD_MEM_FBD_CH1_D0_NB_1_N MOD_MEM_FBD_CH1_D0_NB_0_N

MOD_MEM_FBD_CH1_D0_SB_9_P MOD_MEM_FBD_CH1_D0_SB_8_P MOD_MEM_FBD_CH1_D0_SB_7_P MOD_MEM_FBD_CH1_D0_SB_6_P MOD_MEM_FBD_CH1_D0_SB_5_P MOD_MEM_FBD_CH1_D0_SB_4_P MOD_MEM_FBD_CH1_D0_SB_3_P MOD_MEM_FBD_CH1_D0_SB_2_P MOD_MEM_FBD_CH1_D0_SB_1_P MOD_MEM_FBD_CH1_D0_SB_0_P

MOD_MEM_FBD_CH1_D0_SB_9_N MOD_MEM_FBD_CH1_D0_SB_8_N MOD_MEM_FBD_CH1_D0_SB_7_N MOD_MEM_FBD_CH1_D0_SB_6_N MOD_MEM_FBD_CH1_D0_SB_5_N MOD_MEM_FBD_CH1_D0_SB_4_N MOD_MEM_FBD_CH1_D0_SB_3_N MOD_MEM_FBD_CH1_D0_SB_2_N MOD_MEM_FBD_CH1_D0_SB_1_N MOD_MEM_FBD_CH1_D0_SB_0_N

MOD_MEM_I2C_FBD_CH1_SCL MOD_MEM_I2C_FBD_CH1_SDA

i2c addressing defined by Montreal_I2C_Map_v0p8.pdf

i2c address A0 1010 (000) 0

MOD_MEM_I2C_ADD_PD_GND

NC_MOD_MEM_FBD_CH1_D0_20

NC_MOD_MEM_FBD_CH1_D0_19 NC_MOD_MEM_FBD_CH1_D0_106 NC_MOD_MEM_FBD_CH1_D0_105 NC_MOD_MEM_FBD_CH1_D0_137 NC_MOD_MEM_FBD_CH1_D0_139 NC_MOD_MEM_FBD_CH1_D0_140 NC_MOD_MEM_FBD_CH1_D0_225 NC_MOD_MEM_FBD_CH1_D0_226

37 37 37 37 37 37 37 37 37 37 37 37 37 37

37 37 37 37 37 37 37 37 37 37

33,37,44 33,37,44

32,34-39

2 3 5 6

7 121 122 123 125 126 127 108 109 111 112 113 115 116 236 235 233 232 231

4

8

11 14 18 21 24 27 30 33 36 39 42 43 46 47 50 53 56 59 62 65 68 69 72 75 78 81 84 85 88 89 92 95

98 101 104 107 110 114

VDD_2 VDD_3 VDD_5 VDD_6 VDD_7 VDD_121 VDD_122 VDD_123 VDD_125 VDD_126 VDD_127 VDD_108 VDD_109 VDD_111 VDD_112 VDD_113 VDD_115 VDD_116 VDD_236 VDD_235 VDD_233 VDD_232 VDD_231

VSS_4 VSS_8 VSS_11 VSS_14 VSS_18 VSS_21 VSS_24 VSS_27 VSS_30 VSS_33 VSS_36 VSS_39 VSS_42 VSS_43 VSS_46 VSS_47 VSS_50 VSS_53 VSS_56 VSS_59 VSS_62 VSS_65 VSS_68 VSS_69 VSS_72 VSS_75 VSS_78 VSS_81 VSS_84 VSS_85 VSS_88 VSS_89 VSS_92 VSS_95 VSS_98 VSS_101 VSS_104 VSS_107 VSS_110 VSS_114

J_DIMM_10

VCC_9VDD_1 VCC_10 VCC_12 VCC_13

VCC_129 VCC_130 VCC_132 VCC_133

VTT_15

VTT_117 VTT_135 VTT_237

VDD_SPD

VSS_124 VSS_128 VSS_131 VSS_134 VSS_138 VSS_141 VSS_144 VSS_147 VSS_150 VSS_153 VSS_156 VSS_159 VSS_162 VSS_163 VSS_166 VSS_167 VSS_170 VSS_173 VSS_176 VSS_179 VSS_182 VSS_185 VSS_188 VSS_189 VSS_192 VSS_195 VSS_198 VSS_201 VSS_204 VSS_205 VSS_208 VSS_209 VSS_212 VSS_215 VSS_218 VSS_221 VSS_224 VSS_227 VSS_230 VSS_234

91 10 12 13 129 130 132 133

15 117 135 237

238

124 128 131 134 138 141 144 147 150 153 156 159 162 163 166 167 170 173 176 179 182 185 188 189 192 195 198 201 204 205 208 209 212 215 218 221 224 227 230 234

C3422

1 2

21

C3423

1uF 6.3V

21

C3461

1uF 6.3V

22uF 6.3V

C3424

1 2

1uF 6.3V

+1.8V

21

C3463

+1.5V

21

C3462

22uF 6.3V

NP

C1245

X

1 2

22uF 6.3V

+1.8V

C1246

1 2

+1.5V

C1247

1 2

+0.9V

C1249

1 2

1

22uF 6.3V

2

22uF 6.3V

3

1uF 6.3V

4

33,37,44

FBD CHANNEL DIMM REV 36

HETERO 1 OF 2

White latch

MOD_MEM_I2C_FBD_CH1_SCL

33,37,44

MOD_MEM_I2C_FBD_CH1_SDA

ROOM=DIMM2

R5925

1 2

47-5%

R5924

1 2

47-5%

I2C_FBD_CH1_SCL

I2C_FBD_CH1_SDA

23

FBD CHANNEL DIMM REV 36

HETERO 2 OF 2

23

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

A00

SHEET

9/7/2007 33 OF 136

MEM

4

C

DBA

A B C

CHANNEL 2 DIMM0

+1.8V +1.5V +0.9V +3.3V

Silkscreen: DIMM3

J_DIMM_20

D

1

2

3

46,47 46,47

35,38,39,44

23 23 23 23 23 23 23 23 23 23 23 23 23 23

23 23 23 23 23 23 23 23 23 23

CK_167M_DIMM20_P CK_167M_DIMM20_N

NC_MOD_MEM_FBD_CH2_D0_VID1 NC_MOD_MEM_FBD_CH2_D0_VID0

MOD_MEM_FBD_BR1_RST_N

NC_MOD_MEM_FBD_CH2_D0_207 NC_MOD_MEM_FBD_CH2_D0_206 NC_MOD_MEM_FBD_CH2_D0_165 NC_MOD_MEM_FBD_CH2_D0_164 NC_MOD_MEM_FBD_CH2_D0_87 NC_MOD_MEM_FBD_CH2_D0_86 NC_MOD_MEM_FBD_CH2_D0_45 NC_MOD_MEM_FBD_CH2_D0_44

FBD_CH2_MCH_NB_13_P FBD_CH2_MCH_NB_12_P FBD_CH2_MCH_NB_11_P FBD_CH2_MCH_NB_10_P FBD_CH2_MCH_NB_9_P FBD_CH2_MCH_NB_8_P FBD_CH2_MCH_NB_7_P FBD_CH2_MCH_NB_6_P FBD_CH2_MCH_NB_5_P FBD_CH2_MCH_NB_4_P FBD_CH2_MCH_NB_3_P FBD_CH2_MCH_NB_2_P FBD_CH2_MCH_NB_1_P FBD_CH2_MCH_NB_0_P

FBD_CH2_MCH_NB_13_N FBD_CH2_MCH_NB_12_N FBD_CH2_MCH_NB_11_N FBD_CH2_MCH_NB_10_N FBD_CH2_MCH_NB_9_N FBD_CH2_MCH_NB_8_N FBD_CH2_MCH_NB_7_N FBD_CH2_MCH_NB_6_N FBD_CH2_MCH_NB_5_N FBD_CH2_MCH_NB_4_N FBD_CH2_MCH_NB_3_N FBD_CH2_MCH_NB_2_N FBD_CH2_MCH_NB_1_N FBD_CH2_MCH_NB_0_N

FBD_CH2_MCH_SB_9_P FBD_CH2_MCH_SB_8_P FBD_CH2_MCH_SB_7_P FBD_CH2_MCH_SB_6_P FBD_CH2_MCH_SB_5_P FBD_CH2_MCH_SB_4_P FBD_CH2_MCH_SB_3_P FBD_CH2_MCH_SB_2_P FBD_CH2_MCH_SB_1_P FBD_CH2_MCH_SB_0_P

FBD_CH2_MCH_SB_9_N FBD_CH2_MCH_SB_8_N FBD_CH2_MCH_SB_7_N FBD_CH2_MCH_SB_6_N FBD_CH2_MCH_SB_5_N FBD_CH2_MCH_SB_4_N FBD_CH2_MCH_SB_3_N FBD_CH2_MCH_SB_2_N FBD_CH2_MCH_SB_1_N FBD_CH2_MCH_SB_0_N

40

PNP_13

48

PNP_12

66

PNP_11

63

PNP_10

60

PNP_9

57

PNP_8

54

PNP_7

51

PNP_6

37

PNP_5

34

PNP_4

31

PNP_3

28

PNP_2

25

PNP_1

22

PNP_0

41

PNN_13

49

PNN_12

67

PNN_11

64

PNN_10

61

PNN_9

58

PNN_8

55

PNN_7

52

PNN_6

38

PNN_5

35

PNN_4

32

PNN_3

29

PNN_2

26

PNN_1

23

PNN_0

90

PSP_9

102

PSP_8

99

PSP_7

96

PSP_6

93

PSP_5

82

PSP_4

79

PSP_3

76

PSP_2

73

PSP_1

70

PSP_0

91

PSN_9

103

PSN_8

100

PSN_7

97

PSN_6

94

PSN_5

83

PSN_4

80

PSN_3

77

PSN_2

74

PSN_1

71

PSN_0

228 120

SCKP SCL

229

SCKN

16

VID1

136

VID0

17

RESET_N

SNP_13 SNP_12 SNP_11 SNP_10

SNP_9 SNP_8 SNP_7 SNP_6 SNP_5 SNP_4 SNP_3 SNP_2 SNP_1 SNP_0

SNN_13 SNN_12 SNN_11 SNN_10

SNN_9 SNN_8 SNN_7 SNN_6 SNN_5 SNN_4 SNN_3 SNN_2 SNN_1 SNN_0

SSP_9 SSP_8 SSP_7 SSP_6 SSP_5 SSP_4 SSP_3 SSP_2 SSP_1 SSP_0

SSN_9 SSN_8 SSN_7 SSN_6 SSN_5 SSN_4 SSN_3 SSN_2 SSN_1 SSN_0

RFU_20

207

RFUCLK_207

206

RFUCLK_206

165

RFUCLK_165

164

RFUCLK_164

87

RFUCLK_87

86

RFUCLK_86

45

RFUCLK_45

44

RFUCLK_44

RFU_19 RFU_106 RFU_105 RFU_137 RFU_139 RFU_140 RFU_225 RFU_226

SDA

SA2 SA1 SA0

160 168 186 183 180 177 174 171 157 154 151 148 145 142

161 169 187 184 181 178 175 172 158 155 152 149 146 143

210 222 219 216 213 202 199 196 193 190

211 223 220 217 214 203 200 197 194 191

119

118 240 239

20 19 106 105 137 139 140 225 226

MOD_MEM_FBD_CH2_D0_NB_13_P MOD_MEM_FBD_CH2_D0_NB_12_P MOD_MEM_FBD_CH2_D0_NB_11_P MOD_MEM_FBD_CH2_D0_NB_10_P

MOD_MEM_FBD_CH2_D0_NB_9_P MOD_MEM_FBD_CH2_D0_NB_8_P MOD_MEM_FBD_CH2_D0_NB_7_P MOD_MEM_FBD_CH2_D0_NB_6_P MOD_MEM_FBD_CH2_D0_NB_5_P MOD_MEM_FBD_CH2_D0_NB_4_P MOD_MEM_FBD_CH2_D0_NB_3_P MOD_MEM_FBD_CH2_D0_NB_2_P MOD_MEM_FBD_CH2_D0_NB_1_P MOD_MEM_FBD_CH2_D0_NB_0_P

MOD_MEM_FBD_CH2_D0_NB_13_N MOD_MEM_FBD_CH2_D0_NB_12_N MOD_MEM_FBD_CH2_D0_NB_11_N MOD_MEM_FBD_CH2_D0_NB_10_N

MOD_MEM_FBD_CH2_D0_NB_9_N MOD_MEM_FBD_CH2_D0_NB_8_N MOD_MEM_FBD_CH2_D0_NB_7_N MOD_MEM_FBD_CH2_D0_NB_6_N MOD_MEM_FBD_CH2_D0_NB_5_N MOD_MEM_FBD_CH2_D0_NB_4_N MOD_MEM_FBD_CH2_D0_NB_3_N MOD_MEM_FBD_CH2_D0_NB_2_N MOD_MEM_FBD_CH2_D0_NB_1_N MOD_MEM_FBD_CH2_D0_NB_0_N

MOD_MEM_FBD_CH2_D0_SB_9_P MOD_MEM_FBD_CH2_D0_SB_8_P MOD_MEM_FBD_CH2_D0_SB_7_P MOD_MEM_FBD_CH2_D0_SB_6_P MOD_MEM_FBD_CH2_D0_SB_5_P MOD_MEM_FBD_CH2_D0_SB_4_P MOD_MEM_FBD_CH2_D0_SB_3_P MOD_MEM_FBD_CH2_D0_SB_2_P MOD_MEM_FBD_CH2_D0_SB_1_P MOD_MEM_FBD_CH2_D0_SB_0_P

MOD_MEM_FBD_CH2_D0_SB_9_N MOD_MEM_FBD_CH2_D0_SB_8_N MOD_MEM_FBD_CH2_D0_SB_7_N MOD_MEM_FBD_CH2_D0_SB_6_N MOD_MEM_FBD_CH2_D0_SB_5_N MOD_MEM_FBD_CH2_D0_SB_4_N MOD_MEM_FBD_CH2_D0_SB_3_N MOD_MEM_FBD_CH2_D0_SB_2_N MOD_MEM_FBD_CH2_D0_SB_1_N MOD_MEM_FBD_CH2_D0_SB_0_N

MOD_MEM_I2C_FBD_CH2_SCL MOD_MEM_I2C_FBD_CH2_SDA

i2c addressing defined by Montreal_I2C_Map_v0p8.pdf

i2c address A0 1010 (000) 0

MOD_MEM_I2C_ADD_PD_GND

NC_MOD_MEM_FBD_CH2_D0_20

NC_MOD_MEM_FBD_CH2_D0_19 NC_MOD_MEM_FBD_CH2_D0_106 NC_MOD_MEM_FBD_CH2_D0_105 NC_MOD_MEM_FBD_CH2_D0_137 NC_MOD_MEM_FBD_CH2_D0_139 NC_MOD_MEM_FBD_CH2_D0_140 NC_MOD_MEM_FBD_CH2_D0_225 NC_MOD_MEM_FBD_CH2_D0_226

38 38 38 38 38 38 38 38 38 38 38 38 38 38

38 38 38 38 38 38 38 38 38 38

34,38,44 34,38,44

32,33,35-39

2 3 5 6

7 121 122 123 125 126 127 108 109 111 112 113 115 116 236 235 233 232 231

4

8

11 14 18 21 24 27 30 33 36 39 42 43 46 47 50 53 56 59 62 65 68 69 72 75 78 81 84 85 88 89 92 95

98 101 104 107 110 114

VDD_2 VDD_3 VDD_5 VDD_6 VDD_7 VDD_121 VDD_122 VDD_123 VDD_125 VDD_126 VDD_127 VDD_108 VDD_109 VDD_111 VDD_112 VDD_113 VDD_115 VDD_116 VDD_236 VDD_235 VDD_233 VDD_232 VDD_231

VSS_4 VSS_8 VSS_11 VSS_14 VSS_18 VSS_21 VSS_24 VSS_27 VSS_30 VSS_33 VSS_36 VSS_39 VSS_42 VSS_43 VSS_46 VSS_47 VSS_50 VSS_53 VSS_56 VSS_59 VSS_62 VSS_65 VSS_68 VSS_69 VSS_72 VSS_75 VSS_78 VSS_81 VSS_84 VSS_85 VSS_88 VSS_89 VSS_92 VSS_95 VSS_98 VSS_101 VSS_104 VSS_107 VSS_110 VSS_114

J_DIMM_20

VCC_9VDD_1 VCC_10 VCC_12 VCC_13

VCC_129 VCC_130 VCC_132 VCC_133

VTT_15

VTT_117 VTT_135 VTT_237

VDD_SPD

VSS_124 VSS_128 VSS_131 VSS_134 VSS_138 VSS_141 VSS_144 VSS_147 VSS_150 VSS_153 VSS_156 VSS_159 VSS_162 VSS_163 VSS_166 VSS_167 VSS_170 VSS_173 VSS_176 VSS_179 VSS_182 VSS_185 VSS_188 VSS_189 VSS_192 VSS_195 VSS_198 VSS_201 VSS_204 VSS_205 VSS_208 VSS_209 VSS_212 VSS_215 VSS_218 VSS_221 VSS_224 VSS_227 VSS_230 VSS_234

91 10 12 13 129 130 132 133

15 117 135 237

238

124 128 131 134 138 141 144 147 150 153 156 159 162 163 166 167 170 173 176 179 182 185 188 189 192 195 198 201 204 205 208 209 212 215 218 221 224 227 230 234

21

C2872

.1uF

10V-10%

21

C3425

C3426

1 2

1uF 6.3V

21

C3466

1uF 6.3V

22uF 6.3V

21

C3427

1uF 6.3V

+1.8V

NP

21

C3464

X

+1.5V

21

C3465

22uF 6.3V

C1251

1 2

22uF 6.3V

+1.8V

C1252

1 2

+1.5V

C1253

1 2

+0.9V

C1255

1 2

1

22uF 6.3V

2

22uF 6.3V

3

1uF 6.3V

4

34,38,44

FBD CHANNEL DIMM REV 36

White latch

MOD_MEM_I2C_FBD_CH2_SCL

MOD_MEM_I2C_FBD_CH2_SDA

HETERO 1 OF 2

R5927

1 2

47-5%

R5926

1 2

47-5%

I2C_FBD_CH2_SCL

I2C_FBD_CH2_SDA

ROOM=DIMM3

23

FBD CHANNEL DIMM REV 36

HETERO 2 OF 2

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

A00

SHEET

9/7/2007 34 OF 136

MEM

4

C

DBA

A B C

CHANNEL 3 DIMM0

+1.8V +1.5V +0.9V +3.3V

Silkscreen: DIMM4

J_DIMM_30

+1.8V

D

+1.8V

1

2

3

46,47 46,47

34,38,39,44

23 23 23 23 23 23 23 23 23 23 23 23 23 23

23 23 23 23 23 23 23 23 23 23

CK_167M_DIMM30_P CK_167M_DIMM30_N

NC_MOD_MEM_FBD_CH3_D0_VID1 NC_MOD_MEM_FBD_CH3_D0_VID0

MOD_MEM_FBD_BR1_RST_N

NC_MOD_MEM_FBD_CH3_D0_207 NC_MOD_MEM_FBD_CH3_D0_206 NC_MOD_MEM_FBD_CH3_D0_165 NC_MOD_MEM_FBD_CH3_D0_164 NC_MOD_MEM_FBD_CH3_D0_87 NC_MOD_MEM_FBD_CH3_D0_86 NC_MOD_MEM_FBD_CH3_D0_45 NC_MOD_MEM_FBD_CH3_D0_44

FBD_CH3_MCH_NB_13_P FBD_CH3_MCH_NB_12_P FBD_CH3_MCH_NB_11_P FBD_CH3_MCH_NB_10_P FBD_CH3_MCH_NB_9_P FBD_CH3_MCH_NB_8_P FBD_CH3_MCH_NB_7_P FBD_CH3_MCH_NB_6_P FBD_CH3_MCH_NB_5_P FBD_CH3_MCH_NB_4_P FBD_CH3_MCH_NB_3_P FBD_CH3_MCH_NB_2_P FBD_CH3_MCH_NB_1_P FBD_CH3_MCH_NB_0_P

FBD_CH3_MCH_NB_13_N FBD_CH3_MCH_NB_12_N FBD_CH3_MCH_NB_11_N FBD_CH3_MCH_NB_10_N FBD_CH3_MCH_NB_9_N FBD_CH3_MCH_NB_8_N FBD_CH3_MCH_NB_7_N FBD_CH3_MCH_NB_6_N FBD_CH3_MCH_NB_5_N FBD_CH3_MCH_NB_4_N FBD_CH3_MCH_NB_3_N FBD_CH3_MCH_NB_2_N FBD_CH3_MCH_NB_1_N FBD_CH3_MCH_NB_0_N

FBD_CH3_MCH_SB_9_P FBD_CH3_MCH_SB_8_P FBD_CH3_MCH_SB_7_P FBD_CH3_MCH_SB_6_P FBD_CH3_MCH_SB_5_P FBD_CH3_MCH_SB_4_P FBD_CH3_MCH_SB_3_P FBD_CH3_MCH_SB_2_P FBD_CH3_MCH_SB_1_P FBD_CH3_MCH_SB_0_P

FBD_CH3_MCH_SB_9_N FBD_CH3_MCH_SB_8_N FBD_CH3_MCH_SB_7_N FBD_CH3_MCH_SB_6_N FBD_CH3_MCH_SB_5_N FBD_CH3_MCH_SB_4_N FBD_CH3_MCH_SB_3_N FBD_CH3_MCH_SB_2_N FBD_CH3_MCH_SB_1_N FBD_CH3_MCH_SB_0_N

40

PNP_13

48

PNP_12

66

PNP_11

63

PNP_10

60

PNP_9

57

PNP_8

54

PNP_7

51

PNP_6

37

PNP_5

34

PNP_4

31

PNP_3

28

PNP_2

25

PNP_1

22

PNP_0

41

PNN_13

49

PNN_12

67

PNN_11

64

PNN_10

61

PNN_9

58

PNN_8

55

PNN_7

52

PNN_6

38

PNN_5

35

PNN_4

32

PNN_3

29

PNN_2

26

PNN_1

23

PNN_0

90

PSP_9

102

PSP_8

99

PSP_7

96

PSP_6

93

PSP_5

82

PSP_4

79

PSP_3

76

PSP_2

73

PSP_1

70

PSP_0

91

PSN_9

103

PSN_8

100

PSN_7

97

PSN_6

94

PSN_5

83

PSN_4

80

PSN_3

77

PSN_2

74

PSN_1

71

PSN_0

228 120

SCKP SCL

229

SCKN

16

VID1

136

VID0

17

RESET_N

SNP_13 SNP_12 SNP_11 SNP_10

SNP_9 SNP_8 SNP_7 SNP_6 SNP_5 SNP_4 SNP_3 SNP_2 SNP_1 SNP_0

SNN_13 SNN_12 SNN_11 SNN_10

SNN_9 SNN_8 SNN_7 SNN_6 SNN_5 SNN_4 SNN_3 SNN_2 SNN_1 SNN_0

SSP_9 SSP_8 SSP_7 SSP_6 SSP_5 SSP_4 SSP_3 SSP_2 SSP_1 SSP_0

SSN_9 SSN_8 SSN_7 SSN_6 SSN_5 SSN_4 SSN_3 SSN_2 SSN_1 SSN_0

RFU_20

207

RFUCLK_207

206

RFUCLK_206

165

RFUCLK_165

164

RFUCLK_164

87

RFUCLK_87

86

RFUCLK_86

45

RFUCLK_45

44

RFUCLK_44

RFU_19 RFU_106 RFU_105 RFU_137 RFU_139 RFU_140 RFU_225 RFU_226

160 168 186 183 180 177 174 171 157 154 151 148 145 142

161 169 187 184 181 178 175 172 158 155 152 149 146 143

210 222 219 216 213 202 199 196 193 190

211 223 220 217 214 203 200 197 194 191

119

SDA

i2c addressing defined by Montreal_I2C_Map_v0p8.pdf

118

SA2

240

SA1

239

SA0

20 19 106 105 137 139 140 225 226

MOD_MEM_FBD_CH3_D0_NB_13_P MOD_MEM_FBD_CH3_D0_NB_12_P MOD_MEM_FBD_CH3_D0_NB_11_P MOD_MEM_FBD_CH3_D0_NB_10_P

MOD_MEM_FBD_CH3_D0_NB_9_P MOD_MEM_FBD_CH3_D0_NB_8_P MOD_MEM_FBD_CH3_D0_NB_7_P MOD_MEM_FBD_CH3_D0_NB_6_P MOD_MEM_FBD_CH3_D0_NB_5_P MOD_MEM_FBD_CH3_D0_NB_4_P MOD_MEM_FBD_CH3_D0_NB_3_P MOD_MEM_FBD_CH3_D0_NB_2_P MOD_MEM_FBD_CH3_D0_NB_1_P MOD_MEM_FBD_CH3_D0_NB_0_P

MOD_MEM_FBD_CH3_D0_NB_13_N MOD_MEM_FBD_CH3_D0_NB_12_N MOD_MEM_FBD_CH3_D0_NB_11_N MOD_MEM_FBD_CH3_D0_NB_10_N

MOD_MEM_FBD_CH3_D0_NB_9_N MOD_MEM_FBD_CH3_D0_NB_8_N MOD_MEM_FBD_CH3_D0_NB_7_N MOD_MEM_FBD_CH3_D0_NB_6_N MOD_MEM_FBD_CH3_D0_NB_5_N MOD_MEM_FBD_CH3_D0_NB_4_N MOD_MEM_FBD_CH3_D0_NB_3_N MOD_MEM_FBD_CH3_D0_NB_2_N MOD_MEM_FBD_CH3_D0_NB_1_N MOD_MEM_FBD_CH3_D0_NB_0_N

MOD_MEM_FBD_CH3_D0_SB_9_P MOD_MEM_FBD_CH3_D0_SB_8_P MOD_MEM_FBD_CH3_D0_SB_7_P MOD_MEM_FBD_CH3_D0_SB_6_P MOD_MEM_FBD_CH3_D0_SB_5_P MOD_MEM_FBD_CH3_D0_SB_4_P MOD_MEM_FBD_CH3_D0_SB_3_P MOD_MEM_FBD_CH3_D0_SB_2_P MOD_MEM_FBD_CH3_D0_SB_1_P MOD_MEM_FBD_CH3_D0_SB_0_P

MOD_MEM_FBD_CH3_D0_SB_9_N MOD_MEM_FBD_CH3_D0_SB_8_N MOD_MEM_FBD_CH3_D0_SB_7_N MOD_MEM_FBD_CH3_D0_SB_6_N MOD_MEM_FBD_CH3_D0_SB_5_N MOD_MEM_FBD_CH3_D0_SB_4_N MOD_MEM_FBD_CH3_D0_SB_3_N MOD_MEM_FBD_CH3_D0_SB_2_N MOD_MEM_FBD_CH3_D0_SB_1_N MOD_MEM_FBD_CH3_D0_SB_0_N

MOD_MEM_I2C_FBD_CH3_SCL MOD_MEM_I2C_FBD_CH3_SDA

i2c address A0 1010 (000) 0

MOD_MEM_I2C_ADD_PD_GND

NC_MOD_MEM_FBD_CH3_D0_20

NC_MOD_MEM_FBD_CH3_D0_19 NC_MOD_MEM_FBD_CH3_D0_106 NC_MOD_MEM_FBD_CH3_D0_105 NC_MOD_MEM_FBD_CH3_D0_137 NC_MOD_MEM_FBD_CH3_D0_139 NC_MOD_MEM_FBD_CH3_D0_140 NC_MOD_MEM_FBD_CH3_D0_225 NC_MOD_MEM_FBD_CH3_D0_226

39 39 39 39 39 39 39 39 39 39 39 39 39 39

39 39 39 39 39 39 39 39 39 39

35,39,44 35,39,44

32-34,36-39

2 3 5 6

7 121 122 123 125 126 127 108 109 111 112 113 115 116 236 235 233 232 231

4

8

11 14 18 21 24 27 30 33 36 39 42 43 46 47 50 53 56 59 62 65 68 69 72 75 78 81 84 85 88 89 92 95

98 101 104 107 110 114

VDD_2 VDD_3 VDD_5 VDD_6 VDD_7 VDD_121 VDD_122 VDD_123 VDD_125 VDD_126 VDD_127 VDD_108 VDD_109 VDD_111 VDD_112 VDD_113 VDD_115 VDD_116 VDD_236 VDD_235 VDD_233 VDD_232 VDD_231

VSS_4 VSS_8 VSS_11 VSS_14 VSS_18 VSS_21 VSS_24 VSS_27 VSS_30 VSS_33 VSS_36 VSS_39 VSS_42 VSS_43 VSS_46 VSS_47 VSS_50 VSS_53 VSS_56 VSS_59 VSS_62 VSS_65 VSS_68 VSS_69 VSS_72 VSS_75 VSS_78 VSS_81 VSS_84 VSS_85 VSS_88 VSS_89 VSS_92 VSS_95 VSS_98 VSS_101 VSS_104 VSS_107 VSS_110 VSS_114

J_DIMM_30

VCC_9VDD_1 VCC_10 VCC_12 VCC_13

VCC_129 VCC_130 VCC_132 VCC_133

VTT_15

VTT_117 VTT_135 VTT_237

VDD_SPD

VSS_124 VSS_128 VSS_131 VSS_134 VSS_138 VSS_141 VSS_144 VSS_147 VSS_150 VSS_153 VSS_156 VSS_159 VSS_162 VSS_163 VSS_166 VSS_167 VSS_170 VSS_173 VSS_176 VSS_179 VSS_182 VSS_185 VSS_188 VSS_189 VSS_192 VSS_195 VSS_198 VSS_201 VSS_204 VSS_205 VSS_208 VSS_209 VSS_212 VSS_215 VSS_218 VSS_221 VSS_224 VSS_227 VSS_230 VSS_234

91 10 12 13 129 130 132 133

15 117 135 237

238

124 128 131 134 138 141 144 147 150 153 156 159 162 163 166 167 170 173 176 179 182 185 188 189 192 195 198 201 204 205 208 209 212 215 218 221 224 227 230 234

21

C3428

C3429

1 2

1uF 6.3V

21

C3469

1uF 6.3V

22uF 6.3V

21

C3430

1uF 6.3V

21

C3467

+1.5V

21

C3468

22uF 6.3V

C1257

1 2

22uF 6.3V

NP

C1258

X

1 2

+1.5V

C1259

1 2

+0.9V

C1261

1 2

1

22uF 6.3V

2

22uF 6.3V

1uF 6.3V

3

4

35,39,44

MOD_MEM_I2C_FBD_CH3_SCL

MOD_MEM_I2C_FBD_CH3_SDA

FBD CHANNEL DIMM REV 36

HETERO 1 OF 2

White latch

R5928

MCH

1 2

47-5%

R5929

1 2

47-5%

I2C_FBD_CH3_SCL

I2C_FBD_CH3_SDA

23

ROOM=DIMM4

23

FBD CHANNEL DIMM REV 36

HETERO 2 OF 2

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

A00

SHEET

9/7/2007 35 OF 136

MEM

4

C

DBA

A B C

CHANNEL 0 DIMM 1

+1.8V +1.5V +0.9V +3.3V

Silkscreen: DIMM5

J_DIMM_01

D

1

2

3

46,47 46,47

32,33,37,44

32 32 32 32 32 32 32 32 32 32 32 32 32 32

32 32 32 32 32 32 32 32 32 32

CK_167M_DIMM01_P CK_167M_DIMM01_N

NC_MOD_MEM_FBD_CH0_D1_VID1 NC_MOD_MEM_FBD_CH0_D1_VID0

MOD_MEM_FBD_BR0_RST_N

NC_MOD_MEM_FBD_CH0_D1_207 NC_MOD_MEM_FBD_CH0_D1_206 NC_MOD_MEM_FBD_CH0_D1_165 NC_MOD_MEM_FBD_CH0_D1_164 NC_MOD_MEM_FBD_CH0_D1_87 NC_MOD_MEM_FBD_CH0_D1_86 NC_MOD_MEM_FBD_CH0_D1_45 NC_MOD_MEM_FBD_CH0_D1_44

MOD_MEM_FBD_CH0_D0_NB_13_P MOD_MEM_FBD_CH0_D0_NB_12_P MOD_MEM_FBD_CH0_D0_NB_11_P

MOD_MEM_FBD_CH0_D0_NB_10_P MOD_MEM_FBD_CH0_D0_NB_9_P MOD_MEM_FBD_CH0_D0_NB_8_P MOD_MEM_FBD_CH0_D0_NB_7_P MOD_MEM_FBD_CH0_D0_NB_6_P MOD_MEM_FBD_CH0_D0_NB_5_P MOD_MEM_FBD_CH0_D0_NB_4_P MOD_MEM_FBD_CH0_D0_NB_3_P MOD_MEM_FBD_CH0_D0_NB_2_P MOD_MEM_FBD_CH0_D0_NB_1_P MOD_MEM_FBD_CH0_D0_NB_0_P

MOD_MEM_FBD_CH0_D0_NB_13_N

MOD_MEM_FBD_CH0_D0_NB_12_N

MOD_MEM_FBD_CH0_D0_NB_11_N

MOD_MEM_FBD_CH0_D0_NB_10_N MOD_MEM_FBD_CH0_D0_NB_9_N MOD_MEM_FBD_CH0_D0_NB_8_N MOD_MEM_FBD_CH0_D0_NB_7_N MOD_MEM_FBD_CH0_D0_NB_6_N MOD_MEM_FBD_CH0_D0_NB_5_N MOD_MEM_FBD_CH0_D0_NB_4_N MOD_MEM_FBD_CH0_D0_NB_3_N MOD_MEM_FBD_CH0_D0_NB_2_N MOD_MEM_FBD_CH0_D0_NB_1_N MOD_MEM_FBD_CH0_D0_NB_0_N

MOD_MEM_FBD_CH0_D0_SB_9_P MOD_MEM_FBD_CH0_D0_SB_8_P MOD_MEM_FBD_CH0_D0_SB_7_P MOD_MEM_FBD_CH0_D0_SB_6_P MOD_MEM_FBD_CH0_D0_SB_5_P MOD_MEM_FBD_CH0_D0_SB_4_P MOD_MEM_FBD_CH0_D0_SB_3_P MOD_MEM_FBD_CH0_D0_SB_2_P MOD_MEM_FBD_CH0_D0_SB_1_P MOD_MEM_FBD_CH0_D0_SB_0_P

MOD_MEM_FBD_CH0_D0_SB_9_N MOD_MEM_FBD_CH0_D0_SB_8_N MOD_MEM_FBD_CH0_D0_SB_7_N MOD_MEM_FBD_CH0_D0_SB_6_N MOD_MEM_FBD_CH0_D0_SB_5_N MOD_MEM_FBD_CH0_D0_SB_4_N MOD_MEM_FBD_CH0_D0_SB_3_N MOD_MEM_FBD_CH0_D0_SB_2_N MOD_MEM_FBD_CH0_D0_SB_1_N MOD_MEM_FBD_CH0_D0_SB_0_N

40

PNP_13

48

PNP_12

66

PNP_11

63

PNP_10

60

PNP_9

57

PNP_8

54

PNP_7

51

PNP_6

37

PNP_5

34

PNP_4

31

PNP_3

28

PNP_2

25

PNP_1

22

PNP_0

41

PNN_13

49

PNN_12

67

PNN_11

64

PNN_10

61

PNN_9

58

PNN_8

55

PNN_7

52

PNN_6

38

PNN_5

35

PNN_4

32

PNN_3

29

PNN_2

26

PNN_1

23

PNN_0

90

PSP_9

102

PSP_8

99

PSP_7

96

PSP_6

93

PSP_5

82

PSP_4

79

PSP_3

76

PSP_2

73

PSP_1

70

PSP_0

91

PSN_9

103

PSN_8

100

PSN_7

97

PSN_6

94

PSN_5

83

PSN_4

80

PSN_3

77

PSN_2

74

PSN_1

71

PSN_0

228 120

SCKP SCL

229

SCKN

16

VID1

136

VID0

17

RESET_N

207

RFUCLK_207

206

RFUCLK_206

165

RFUCLK_165

164

RFUCLK_164

87

RFUCLK_87

86

RFUCLK_86

45

RFUCLK_45

44

RFUCLK_44

SNP_13 SNP_12 SNP_11 SNP_10

SNP_9 SNP_8 SNP_7 SNP_6 SNP_5 SNP_4 SNP_3 SNP_2 SNP_1 SNP_0

SNN_13 SNN_12 SNN_11 SNN_10

SNN_9 SNN_8 SNN_7 SNN_6 SNN_5 SNN_4 SNN_3 SNN_2 SNN_1 SNN_0

SSP_9 SSP_8 SSP_7 SSP_6 SSP_5 SSP_4 SSP_3 SSP_2 SSP_1 SSP_0

SSN_9 SSN_8 SSN_7 SSN_6 SSN_5 SSN_4 SSN_3 SSN_2 SSN_1 SSN_0

RFU_20

RFU_19 RFU_106 RFU_105 RFU_137 RFU_139 RFU_140 RFU_225 RFU_226

160 168 186 183 180 177 174 171 157 154 151 148 145 142

161 169 187 184 181 178 175 172 158 155 152 149 146 143

210 222 219 216 213 202 199 196 193 190

211 223 220 217 214 203 200 197 194 191

119

SDA

118

SA2

240

SA1

239

SA0

i2c addressing defined by Montreal_I2C_Map_v0p8.pdf

20 19 106 105 137 139 140 225 226

NC_MOD_MEM_FBD_CH0_D1_NB_13_P NC_MOD_MEM_FBD_CH0_D1_NB_12_P NC_MOD_MEM_FBD_CH0_D1_NB_11_P NC_MOD_MEM_FBD_CH0_D1_NB_10_P

NC_MOD_MEM_FBD_CH0_D1_NB_9_P NC_MOD_MEM_FBD_CH0_D1_NB_8_P NC_MOD_MEM_FBD_CH0_D1_NB_7_P NC_MOD_MEM_FBD_CH0_D1_NB_6_P NC_MOD_MEM_FBD_CH0_D1_NB_5_P NC_MOD_MEM_FBD_CH0_D1_NB_4_P NC_MOD_MEM_FBD_CH0_D1_NB_3_P NC_MOD_MEM_FBD_CH0_D1_NB_2_P NC_MOD_MEM_FBD_CH0_D1_NB_1_P NC_MOD_MEM_FBD_CH0_D1_NB_0_P

NC_MOD_MEM_FBD_CH0_D1_NB_13_N NC_MOD_MEM_FBD_CH0_D1_NB_12_N NC_MOD_MEM_FBD_CH0_D1_NB_11_N NC_MOD_MEM_FBD_CH0_D1_NB_10_N

NC_MOD_MEM_FBD_CH0_D1_NB_9_N NC_MOD_MEM_FBD_CH0_D1_NB_8_N NC_MOD_MEM_FBD_CH0_D1_NB_7_N NC_MOD_MEM_FBD_CH0_D1_NB_6_N NC_MOD_MEM_FBD_CH0_D1_NB_5_N NC_MOD_MEM_FBD_CH0_D1_NB_4_N NC_MOD_MEM_FBD_CH0_D1_NB_3_N NC_MOD_MEM_FBD_CH0_D1_NB_2_N NC_MOD_MEM_FBD_CH0_D1_NB_1_N NC_MOD_MEM_FBD_CH0_D1_NB_0_N

NC_MOD_MEM_FBD_CH0_D1_SB_9_P NC_MOD_MEM_FBD_CH0_D1_SB_8_P NC_MOD_MEM_FBD_CH0_D1_SB_7_P NC_MOD_MEM_FBD_CH0_D1_SB_6_P NC_MOD_MEM_FBD_CH0_D1_SB_5_P NC_MOD_MEM_FBD_CH0_D1_SB_4_P NC_MOD_MEM_FBD_CH0_D1_SB_3_P NC_MOD_MEM_FBD_CH0_D1_SB_2_P NC_MOD_MEM_FBD_CH0_D1_SB_1_P NC_MOD_MEM_FBD_CH0_D1_SB_0_P

NC_MOD_MEM_FBD_CH0_D1_SB_9_N NC_MOD_MEM_FBD_CH0_D1_SB_8_N NC_MOD_MEM_FBD_CH0_D1_SB_7_N NC_MOD_MEM_FBD_CH0_D1_SB_6_N NC_MOD_MEM_FBD_CH0_D1_SB_5_N NC_MOD_MEM_FBD_CH0_D1_SB_4_N NC_MOD_MEM_FBD_CH0_D1_SB_3_N NC_MOD_MEM_FBD_CH0_D1_SB_2_N NC_MOD_MEM_FBD_CH0_D1_SB_1_N NC_MOD_MEM_FBD_CH0_D1_SB_0_N

MOD_MEM_I2C_FBD_CH0_SCL MOD_MEM_I2C_FBD_CH0_SDA

i2c address A2 1010 (001) 0

MOD_MEM_I2C_ADD_PD_GND MOD_MEM_I2C_ADD_PU_3P3V

NC_MOD_MEM_FBD_CH0_D1_20

NC_MOD_MEM_FBD_CH0_D1_19 NC_MOD_MEM_FBD_CH0_D1_106 NC_MOD_MEM_FBD_CH0_D1_105 NC_MOD_MEM_FBD_CH0_D1_137 NC_MOD_MEM_FBD_CH0_D1_139 NC_MOD_MEM_FBD_CH0_D1_140 NC_MOD_MEM_FBD_CH0_D1_225 NC_MOD_MEM_FBD_CH0_D1_226

32,44 32,44

32-35,37-39 37-39

2 3 5 6

7 121 122 123 125 126 127 108 109 111 112 113 115 116 236 235 233 232 231

4

8

11 14 18 21 24 27 30 33 36 39 42 43 46 47 50 53 56 59 62 65 68 69 72 75 78 81 84 85 88 89 92 95

98 101 104 107 110 114

VDD_2 VDD_3 VDD_5 VDD_6 VDD_7 VDD_121 VDD_122 VDD_123 VDD_125 VDD_126 VDD_127 VDD_108 VDD_109 VDD_111 VDD_112 VDD_113 VDD_115 VDD_116 VDD_236 VDD_235 VDD_233 VDD_232 VDD_231

VSS_4 VSS_8 VSS_11 VSS_14 VSS_18 VSS_21 VSS_24 VSS_27 VSS_30 VSS_33 VSS_36 VSS_39 VSS_42 VSS_43 VSS_46 VSS_47 VSS_50 VSS_53 VSS_56 VSS_59 VSS_62 VSS_65 VSS_68 VSS_69 VSS_72 VSS_75 VSS_78 VSS_81 VSS_84 VSS_85 VSS_88 VSS_89 VSS_92 VSS_95 VSS_98 VSS_101 VSS_104 VSS_107 VSS_110 VSS_114

J_DIMM_01

VCC_9VDD_1 VCC_10 VCC_12 VCC_13

VCC_129 VCC_130 VCC_132 VCC_133

VTT_15

VTT_117 VTT_135 VTT_237

VDD_SPD

VSS_124 VSS_128 VSS_131 VSS_134 VSS_138 VSS_141 VSS_144 VSS_147 VSS_150 VSS_153 VSS_156 VSS_159 VSS_162 VSS_163 VSS_166 VSS_167 VSS_170 VSS_173 VSS_176 VSS_179 VSS_182 VSS_185 VSS_188 VSS_189 VSS_192 VSS_195 VSS_198 VSS_201 VSS_204 VSS_205 VSS_208 VSS_209 VSS_212 VSS_215 VSS_218 VSS_221 VSS_224 VSS_227 VSS_230 VSS_234

91 10 12 13 129 130 132 133

15 117 135 237

238

124 128 131 134 138 141 144 147 150 153 156 159 162 163 166 167 170 173 176 179 182 185 188 189 192 195 198 201 204 205 208 209 212 215 218 221 224 227 230 234

21

C2873

.1uF

10V-10%

21

C3431

C3432

1 2

1uF 6.3V

NP

C3472

X

21

22uF 6.3V

C3433

21

+1.8V

C3470

+1.5V

C3471

1uF 6.3V

21

22uF 6.3V

21

C1263

22uF 6.3V

1 2

22uF 6.3V

+1.8V

C1264

1 2

+1.5V

C1265

1 2

+0.9V

C1267

1 2

1

22uF 6.3V

2

22uF 6.3V

1uF 6.3V

3

4

FBD CHANNEL DIMM REV 36

BLACK LATCHES HETERO 1 OF 2

Black latch

ROOM=DIMM5

FBD CHANNEL DIMM REV 36

BLACK LATCHES HETERO 2 OF 2

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

M2LB_Change_Note: Right-side signals made NC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

MEM

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 36 OF 136

4

C

DBA

A B C

CHANNEL 1 DIMM 1

+1.8V +1.5V +0.9V +3.3V

Silkscreen: DIMM6

J_DIMM_11

D

1

2

3

46,47 46,47

32,33,36,44

33 33 33 33 33 33 33 33 33 33 33 33 33 33

33 33 33 33 33 33 33 33 33 33

CK_167M_DIMM11_P CK_167M_DIMM11_N

NC_MOD_MEM_FBD_CH1_D1_VID1 NC_MOD_MEM_FBD_CH1_D1_VID0

MOD_MEM_FBD_BR0_RST_N

NC_MOD_MEM_FBD_CH1_D1_207 NC_MOD_MEM_FBD_CH1_D1_206 NC_MOD_MEM_FBD_CH1_D1_165 NC_MOD_MEM_FBD_CH1_D1_164 NC_MOD_MEM_FBD_CH1_D1_87 NC_MOD_MEM_FBD_CH1_D1_86 NC_MOD_MEM_FBD_CH1_D1_45 NC_MOD_MEM_FBD_CH1_D1_44

MOD_MEM_FBD_CH1_D0_NB_13_P MOD_MEM_FBD_CH1_D0_NB_12_P MOD_MEM_FBD_CH1_D0_NB_11_P

MOD_MEM_FBD_CH1_D0_NB_10_P MOD_MEM_FBD_CH1_D0_NB_9_P MOD_MEM_FBD_CH1_D0_NB_8_P MOD_MEM_FBD_CH1_D0_NB_7_P MOD_MEM_FBD_CH1_D0_NB_6_P MOD_MEM_FBD_CH1_D0_NB_5_P MOD_MEM_FBD_CH1_D0_NB_4_P MOD_MEM_FBD_CH1_D0_NB_3_P MOD_MEM_FBD_CH1_D0_NB_2_P MOD_MEM_FBD_CH1_D0_NB_1_P MOD_MEM_FBD_CH1_D0_NB_0_P

MOD_MEM_FBD_CH1_D0_NB_13_N

MOD_MEM_FBD_CH1_D0_NB_12_N

MOD_MEM_FBD_CH1_D0_NB_11_N

MOD_MEM_FBD_CH1_D0_NB_10_N MOD_MEM_FBD_CH1_D0_NB_9_N MOD_MEM_FBD_CH1_D0_NB_8_N MOD_MEM_FBD_CH1_D0_NB_7_N MOD_MEM_FBD_CH1_D0_NB_6_N MOD_MEM_FBD_CH1_D0_NB_5_N MOD_MEM_FBD_CH1_D0_NB_4_N MOD_MEM_FBD_CH1_D0_NB_3_N MOD_MEM_FBD_CH1_D0_NB_2_N MOD_MEM_FBD_CH1_D0_NB_1_N MOD_MEM_FBD_CH1_D0_NB_0_N

MOD_MEM_FBD_CH1_D0_SB_9_P MOD_MEM_FBD_CH1_D0_SB_8_P MOD_MEM_FBD_CH1_D0_SB_7_P MOD_MEM_FBD_CH1_D0_SB_6_P MOD_MEM_FBD_CH1_D0_SB_5_P MOD_MEM_FBD_CH1_D0_SB_4_P MOD_MEM_FBD_CH1_D0_SB_3_P MOD_MEM_FBD_CH1_D0_SB_2_P MOD_MEM_FBD_CH1_D0_SB_1_P MOD_MEM_FBD_CH1_D0_SB_0_P

MOD_MEM_FBD_CH1_D0_SB_9_N MOD_MEM_FBD_CH1_D0_SB_8_N MOD_MEM_FBD_CH1_D0_SB_7_N MOD_MEM_FBD_CH1_D0_SB_6_N MOD_MEM_FBD_CH1_D0_SB_5_N MOD_MEM_FBD_CH1_D0_SB_4_N MOD_MEM_FBD_CH1_D0_SB_3_N MOD_MEM_FBD_CH1_D0_SB_2_N MOD_MEM_FBD_CH1_D0_SB_1_N MOD_MEM_FBD_CH1_D0_SB_0_N

40

PNP_13

48

PNP_12

66

PNP_11

63

PNP_10

60

PNP_9

57

PNP_8

54

PNP_7

51

PNP_6

37

PNP_5

34

PNP_4

31

PNP_3

28

PNP_2

25

PNP_1

22

PNP_0

41

PNN_13

49

PNN_12

67

PNN_11

64

PNN_10

61

PNN_9

58

PNN_8

55

PNN_7

52

PNN_6

38

PNN_5

35

PNN_4

32

PNN_3

29

PNN_2

26

PNN_1

23

PNN_0

90

PSP_9

102

PSP_8

99

PSP_7

96

PSP_6

93

PSP_5

82

PSP_4

79

PSP_3

76

PSP_2

73

PSP_1

70

PSP_0

91

PSN_9

103

PSN_8

100

PSN_7

97

PSN_6

94

PSN_5

83

PSN_4

80

PSN_3

77

PSN_2

74

PSN_1

71

PSN_0

228 120

SCKP SCL

229

SCKN

16

VID1

136

VID0

17

RESET_N

207

RFUCLK_207

206

RFUCLK_206

165

RFUCLK_165

164

RFUCLK_164

87

RFUCLK_87

86

RFUCLK_86

45

RFUCLK_45

44

RFUCLK_44

SNP_13 SNP_12 SNP_11 SNP_10

SNP_9 SNP_8 SNP_7 SNP_6 SNP_5 SNP_4 SNP_3 SNP_2 SNP_1 SNP_0

SNN_13 SNN_12 SNN_11 SNN_10

SNN_9 SNN_8 SNN_7 SNN_6 SNN_5 SNN_4 SNN_3 SNN_2 SNN_1 SNN_0

SSP_9 SSP_8 SSP_7 SSP_6 SSP_5 SSP_4 SSP_3 SSP_2 SSP_1 SSP_0

SSN_9 SSN_8 SSN_7 SSN_6 SSN_5 SSN_4 SSN_3 SSN_2 SSN_1 SSN_0

RFU_20

RFU_19 RFU_106 RFU_105 RFU_137 RFU_139 RFU_140 RFU_225 RFU_226

160 168 186 183 180 177 174 171 157 154 151 148 145 142

161 169 187 184 181 178 175 172 158 155 152 149 146 143

210 222 219 216 213 202 199 196 193 190

211 223 220 217 214 203 200 197 194 191

119

SDA

118

SA2

240

SA1

239

SA0

i2c addressing defined by Montreal_I2C_Map_v0p8.pdf

20 19 106 105 137 139 140 225 226

NC_MOD_MEM_FBD_CH1_D1_NB_13_P NC_MOD_MEM_FBD_CH1_D1_NB_12_P NC_MOD_MEM_FBD_CH1_D1_NB_11_P NC_MOD_MEM_FBD_CH1_D1_NB_10_P

NC_MOD_MEM_FBD_CH1_D1_NB_9_P NC_MOD_MEM_FBD_CH1_D1_NB_8_P NC_MOD_MEM_FBD_CH1_D1_NB_7_P NC_MOD_MEM_FBD_CH1_D1_NB_6_P NC_MOD_MEM_FBD_CH1_D1_NB_5_P NC_MOD_MEM_FBD_CH1_D1_NB_4_P NC_MOD_MEM_FBD_CH1_D1_NB_3_P NC_MOD_MEM_FBD_CH1_D1_NB_2_P NC_MOD_MEM_FBD_CH1_D1_NB_1_P NC_MOD_MEM_FBD_CH1_D1_NB_0_P

NC_MOD_MEM_FBD_CH1_D1_NB_13_N NC_MOD_MEM_FBD_CH1_D1_NB_12_N NC_MOD_MEM_FBD_CH1_D1_NB_11_N NC_MOD_MEM_FBD_CH1_D1_NB_10_N

NC_MOD_MEM_FBD_CH1_D1_NB_9_N NC_MOD_MEM_FBD_CH1_D1_NB_8_N NC_MOD_MEM_FBD_CH1_D1_NB_7_N NC_MOD_MEM_FBD_CH1_D1_NB_6_N NC_MOD_MEM_FBD_CH1_D1_NB_5_N NC_MOD_MEM_FBD_CH1_D1_NB_4_N NC_MOD_MEM_FBD_CH1_D1_NB_3_N NC_MOD_MEM_FBD_CH1_D1_NB_2_N NC_MOD_MEM_FBD_CH1_D1_NB_1_N NC_MOD_MEM_FBD_CH1_D1_NB_0_N

NC_MOD_MEM_FBD_CH1_D1_SB_9_P NC_MOD_MEM_FBD_CH1_D1_SB_8_P NC_MOD_MEM_FBD_CH1_D1_SB_7_P NC_MOD_MEM_FBD_CH1_D1_SB_6_P NC_MOD_MEM_FBD_CH1_D1_SB_5_P NC_MOD_MEM_FBD_CH1_D1_SB_4_P NC_MOD_MEM_FBD_CH1_D1_SB_3_P NC_MOD_MEM_FBD_CH1_D1_SB_2_P NC_MOD_MEM_FBD_CH1_D1_SB_1_P NC_MOD_MEM_FBD_CH1_D1_SB_0_P

NC_MOD_MEM_FBD_CH1_D1_SB_9_N NC_MOD_MEM_FBD_CH1_D1_SB_8_N NC_MOD_MEM_FBD_CH1_D1_SB_7_N NC_MOD_MEM_FBD_CH1_D1_SB_6_N NC_MOD_MEM_FBD_CH1_D1_SB_5_N NC_MOD_MEM_FBD_CH1_D1_SB_4_N NC_MOD_MEM_FBD_CH1_D1_SB_3_N NC_MOD_MEM_FBD_CH1_D1_SB_2_N NC_MOD_MEM_FBD_CH1_D1_SB_1_N NC_MOD_MEM_FBD_CH1_D1_SB_0_N

MOD_MEM_I2C_FBD_CH1_SCL MOD_MEM_I2C_FBD_CH1_SDA

i2c address A2 1010 (001) 0

MOD_MEM_I2C_ADD_PD_GND MOD_MEM_I2C_ADD_PU_3P3V

NC_MOD_MEM_FBD_CH1_D1_20

NC_MOD_MEM_FBD_CH1_D1_19 NC_MOD_MEM_FBD_CH1_D1_106 NC_MOD_MEM_FBD_CH1_D1_105 NC_MOD_MEM_FBD_CH1_D1_137 NC_MOD_MEM_FBD_CH1_D1_139 NC_MOD_MEM_FBD_CH1_D1_140 NC_MOD_MEM_FBD_CH1_D1_225 NC_MOD_MEM_FBD_CH1_D1_226

33,44 33,44

32-39 36-39

2 3 5 6

7 121 122 123 125 126 127 108 109 111 112 113 115 116 236 235 233 232 231

4

8

11 14 18 21 24 27 30 33 36 39 42 43 46 47 50 53 56 59 62 65 68 69 72 75 78 81 84 85 88 89 92 95

98 101 104 107 110 114

VDD_2 VDD_3 VDD_5 VDD_6 VDD_7 VDD_121 VDD_122 VDD_123 VDD_125 VDD_126 VDD_127 VDD_108 VDD_109 VDD_111 VDD_112 VDD_113 VDD_115 VDD_116 VDD_236 VDD_235 VDD_233 VDD_232 VDD_231

VSS_4 VSS_8 VSS_11 VSS_14 VSS_18 VSS_21 VSS_24 VSS_27 VSS_30 VSS_33 VSS_36 VSS_39 VSS_42 VSS_43 VSS_46 VSS_47 VSS_50 VSS_53 VSS_56 VSS_59 VSS_62 VSS_65 VSS_68 VSS_69 VSS_72 VSS_75 VSS_78 VSS_81 VSS_84 VSS_85 VSS_88 VSS_89 VSS_92 VSS_95 VSS_98 VSS_101 VSS_104 VSS_107 VSS_110 VSS_114

J_DIMM_11

VCC_9VDD_1 VCC_10 VCC_12 VCC_13

VCC_129 VCC_130 VCC_132 VCC_133

VTT_15

VTT_117 VTT_135 VTT_237

VDD_SPD

VSS_124 VSS_128 VSS_131 VSS_134 VSS_138 VSS_141 VSS_144 VSS_147 VSS_150 VSS_153 VSS_156 VSS_159 VSS_162 VSS_163 VSS_166 VSS_167 VSS_170 VSS_173 VSS_176 VSS_179 VSS_182 VSS_185 VSS_188 VSS_189 VSS_192 VSS_195 VSS_198 VSS_201 VSS_204 VSS_205 VSS_208 VSS_209 VSS_212 VSS_215 VSS_218 VSS_221 VSS_224 VSS_227 VSS_230 VSS_234

91 10 12 13 129 130 132 133

15 117 135 237

238

124 128 131 134 138 141 144 147 150 153 156 159 162 163 166 167 170 173 176 179 182 185 188 189 192 195 198 201 204 205 208 209 212 215 218 221 224 227 230 234

21

C3434

C3435

1 2

1uF 6.3V

21

C3475

22uF 6.3V

21

C3436

1uF 6.3V

+1.8V

NP

21

C3473

X

+1.5V

C3474

22uF 6.3V

21

22uF 6.3V

C1269

1 2

22uF 6.3V

+1.8V

C1270

+1.5V

C1271

1 2

+0.9V

C1273

1 2

1

1 2

22uF 6.3V

2

22uF 6.3V

3

1uF 6.3V

4

36-39

32-39

FBD CHANNEL DIMM REV 36

BLACK LATCHES HETERO 1 OF 2

Black latch

MOD_MEM_I2C_ADD_PU_3P3V MOD_MEM_I2C_ADD_PD_GND

+3.3V

21

R5913

21

R5912

ROOM=DIMM6

330-5%

P18_DT8453_jp_Decided to make change for consistency

1K-5%

ROOM=DIMM6

FBD CHANNEL DIMM REV 36

BLACK LATCHES HETERO 2 OF 2

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

M2LB_Change_Note: Right-side signals made NC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

MEM

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 37 OF 136

4

C

DBA

A B C

CHANNEL 2 DIMM 1

+1.8V +1.5V +0.9V +3.3V

Silkscreen: DIMM7

J_DIMM_21

D

1

2

3

46,47 46,47

34,35,39,44

34 34 34 34 34 34 34 34 34 34 34 34 34 34

34 34 34 34 34 34 34 34 34 34

CK_167M_DIMM21_P CK_167M_DIMM21_N

NC_MOD_MEM_FBD_CH2_D1_VID1 NC_MOD_MEM_FBD_CH2_D1_VID0

MOD_MEM_FBD_BR1_RST_N

NC_MOD_MEM_FBD_CH2_D1_207 NC_MOD_MEM_FBD_CH2_D1_206 NC_MOD_MEM_FBD_CH2_D1_165 NC_MOD_MEM_FBD_CH2_D1_164 NC_MOD_MEM_FBD_CH2_D1_87 NC_MOD_MEM_FBD_CH2_D1_86 NC_MOD_MEM_FBD_CH2_D1_45 NC_MOD_MEM_FBD_CH2_D1_44

MOD_MEM_FBD_CH2_D0_NB_13_P MOD_MEM_FBD_CH2_D0_NB_12_P MOD_MEM_FBD_CH2_D0_NB_11_P

MOD_MEM_FBD_CH2_D0_NB_10_P MOD_MEM_FBD_CH2_D0_NB_9_P MOD_MEM_FBD_CH2_D0_NB_8_P MOD_MEM_FBD_CH2_D0_NB_7_P MOD_MEM_FBD_CH2_D0_NB_6_P MOD_MEM_FBD_CH2_D0_NB_5_P MOD_MEM_FBD_CH2_D0_NB_4_P MOD_MEM_FBD_CH2_D0_NB_3_P MOD_MEM_FBD_CH2_D0_NB_2_P MOD_MEM_FBD_CH2_D0_NB_1_P MOD_MEM_FBD_CH2_D0_NB_0_P

MOD_MEM_FBD_CH2_D0_NB_13_N

MOD_MEM_FBD_CH2_D0_NB_12_N

MOD_MEM_FBD_CH2_D0_NB_11_N

MOD_MEM_FBD_CH2_D0_NB_10_N MOD_MEM_FBD_CH2_D0_NB_9_N MOD_MEM_FBD_CH2_D0_NB_8_N MOD_MEM_FBD_CH2_D0_NB_7_N MOD_MEM_FBD_CH2_D0_NB_6_N MOD_MEM_FBD_CH2_D0_NB_5_N MOD_MEM_FBD_CH2_D0_NB_4_N MOD_MEM_FBD_CH2_D0_NB_3_N MOD_MEM_FBD_CH2_D0_NB_2_N MOD_MEM_FBD_CH2_D0_NB_1_N MOD_MEM_FBD_CH2_D0_NB_0_N

MOD_MEM_FBD_CH2_D0_SB_9_P MOD_MEM_FBD_CH2_D0_SB_8_P MOD_MEM_FBD_CH2_D0_SB_7_P MOD_MEM_FBD_CH2_D0_SB_6_P MOD_MEM_FBD_CH2_D0_SB_5_P MOD_MEM_FBD_CH2_D0_SB_4_P MOD_MEM_FBD_CH2_D0_SB_3_P MOD_MEM_FBD_CH2_D0_SB_2_P MOD_MEM_FBD_CH2_D0_SB_1_P MOD_MEM_FBD_CH2_D0_SB_0_P

MOD_MEM_FBD_CH2_D0_SB_9_N MOD_MEM_FBD_CH2_D0_SB_8_N MOD_MEM_FBD_CH2_D0_SB_7_N MOD_MEM_FBD_CH2_D0_SB_6_N MOD_MEM_FBD_CH2_D0_SB_5_N MOD_MEM_FBD_CH2_D0_SB_4_N MOD_MEM_FBD_CH2_D0_SB_3_N MOD_MEM_FBD_CH2_D0_SB_2_N MOD_MEM_FBD_CH2_D0_SB_1_N MOD_MEM_FBD_CH2_D0_SB_0_N

40

PNP_13

48

PNP_12

66

PNP_11

63

PNP_10

60

PNP_9

57

PNP_8

54

PNP_7

51

PNP_6

37

PNP_5

34

PNP_4

31

PNP_3

28

PNP_2

25

PNP_1

22

PNP_0

41

PNN_13

49

PNN_12

67

PNN_11

64

PNN_10

61

PNN_9

58

PNN_8

55

PNN_7

52

PNN_6

38

PNN_5

35

PNN_4

32

PNN_3

29

PNN_2

26

PNN_1

23

PNN_0

90

PSP_9

102

PSP_8

99

PSP_7

96

PSP_6

93

PSP_5

82

PSP_4

79

PSP_3

76

PSP_2

73

PSP_1

70

PSP_0

91

PSN_9

103

PSN_8

100

PSN_7

97

PSN_6

94

PSN_5

83

PSN_4

80

PSN_3

77

PSN_2

74

PSN_1

71

PSN_0

228 120

SCKP SCL

229

SCKN

16

VID1

136

VID0

17

RESET_N

207

RFUCLK_207

206

RFUCLK_206

165

RFUCLK_165

164

RFUCLK_164

87

RFUCLK_87

86

RFUCLK_86

45

RFUCLK_45

44

RFUCLK_44

SNP_13 SNP_12 SNP_11 SNP_10

SNP_9 SNP_8 SNP_7 SNP_6 SNP_5 SNP_4 SNP_3 SNP_2 SNP_1 SNP_0

SNN_13 SNN_12 SNN_11 SNN_10

SNN_9 SNN_8 SNN_7 SNN_6 SNN_5 SNN_4 SNN_3 SNN_2 SNN_1 SNN_0

SSP_9 SSP_8 SSP_7 SSP_6 SSP_5 SSP_4 SSP_3 SSP_2 SSP_1 SSP_0

SSN_9 SSN_8 SSN_7 SSN_6 SSN_5 SSN_4 SSN_3 SSN_2 SSN_1 SSN_0

RFU_20

RFU_19 RFU_106 RFU_105 RFU_137 RFU_139 RFU_140 RFU_225 RFU_226

SDA

SA2 SA1 SA0

160 168 186 183 180 177 174 171 157 154 151 148 145 142

161 169 187 184 181 178 175 172 158 155 152 149 146 143

210 222 219 216 213 202 199 196 193 190

211 223 220 217 214 203 200 197 194 191

119

118 240 239

20 19 106 105 137 139 140 225 226

NC_MOD_MEM_FBD_CH2_D1_NB_13_P NC_MOD_MEM_FBD_CH2_D1_NB_12_P NC_MOD_MEM_FBD_CH2_D1_NB_11_P NC_MOD_MEM_FBD_CH2_D1_NB_10_P

NC_MOD_MEM_FBD_CH2_D1_NB_9_P NC_MOD_MEM_FBD_CH2_D1_NB_8_P NC_MOD_MEM_FBD_CH2_D1_NB_7_P NC_MOD_MEM_FBD_CH2_D1_NB_6_P NC_MOD_MEM_FBD_CH2_D1_NB_5_P NC_MOD_MEM_FBD_CH2_D1_NB_4_P NC_MOD_MEM_FBD_CH2_D1_NB_3_P NC_MOD_MEM_FBD_CH2_D1_NB_2_P NC_MOD_MEM_FBD_CH2_D1_NB_1_P NC_MOD_MEM_FBD_CH2_D1_NB_0_P

NC_MOD_MEM_FBD_CH2_D1_NB_13_N NC_MOD_MEM_FBD_CH2_D1_NB_12_N NC_MOD_MEM_FBD_CH2_D1_NB_11_N NC_MOD_MEM_FBD_CH2_D1_NB_10_N

NC_MOD_MEM_FBD_CH2_D1_NB_9_N NC_MOD_MEM_FBD_CH2_D1_NB_8_N NC_MOD_MEM_FBD_CH2_D1_NB_7_N NC_MOD_MEM_FBD_CH2_D1_NB_6_N NC_MOD_MEM_FBD_CH2_D1_NB_5_N NC_MOD_MEM_FBD_CH2_D1_NB_4_N NC_MOD_MEM_FBD_CH2_D1_NB_3_N NC_MOD_MEM_FBD_CH2_D1_NB_2_N NC_MOD_MEM_FBD_CH2_D1_NB_1_N NC_MOD_MEM_FBD_CH2_D1_NB_0_N

NC_MOD_MEM_FBD_CH2_D1_SB_9_P NC_MOD_MEM_FBD_CH2_D1_SB_8_P NC_MOD_MEM_FBD_CH2_D1_SB_7_P NC_MOD_MEM_FBD_CH2_D1_SB_6_P NC_MOD_MEM_FBD_CH2_D1_SB_5_P NC_MOD_MEM_FBD_CH2_D1_SB_4_P NC_MOD_MEM_FBD_CH2_D1_SB_3_P NC_MOD_MEM_FBD_CH2_D1_SB_2_P NC_MOD_MEM_FBD_CH2_D1_SB_1_P NC_MOD_MEM_FBD_CH2_D1_SB_0_P

NC_MOD_MEM_FBD_CH2_D1_SB_9_N NC_MOD_MEM_FBD_CH2_D1_SB_8_N NC_MOD_MEM_FBD_CH2_D1_SB_7_N NC_MOD_MEM_FBD_CH2_D1_SB_6_N NC_MOD_MEM_FBD_CH2_D1_SB_5_N NC_MOD_MEM_FBD_CH2_D1_SB_4_N NC_MOD_MEM_FBD_CH2_D1_SB_3_N NC_MOD_MEM_FBD_CH2_D1_SB_2_N NC_MOD_MEM_FBD_CH2_D1_SB_1_N NC_MOD_MEM_FBD_CH2_D1_SB_0_N

MOD_MEM_I2C_FBD_CH2_SCL MOD_MEM_I2C_FBD_CH2_SDA

i2c address A2 1010 (001) 0

MOD_MEM_I2C_ADD_PD_GND MOD_MEM_I2C_ADD_PU_3P3V

i2c addressing defined by Montreal_I2C_Map_v0p8.pdf

NC_MOD_MEM_FBD_CH2_D1_20

NC_MOD_MEM_FBD_CH2_D1_19 NC_MOD_MEM_FBD_CH2_D1_106 NC_MOD_MEM_FBD_CH2_D1_105 NC_MOD_MEM_FBD_CH2_D1_137 NC_MOD_MEM_FBD_CH2_D1_139 NC_MOD_MEM_FBD_CH2_D1_140 NC_MOD_MEM_FBD_CH2_D1_225 NC_MOD_MEM_FBD_CH2_D1_226

34,44 34,44

32-37,39 36,37,39

2 3 5 6

7 121 122 123 125 126 127 108 109 111 112 113 115 116 236 235 233 232 231

4

8

11 14 18 21 24 27 30 33 36 39 42 43 46 47 50 53 56 59 62 65 68 69 72 75 78 81 84 85 88 89 92 95

98 101 104 107 110 114

VDD_2 VDD_3 VDD_5 VDD_6 VDD_7 VDD_121 VDD_122 VDD_123 VDD_125 VDD_126 VDD_127 VDD_108 VDD_109 VDD_111 VDD_112 VDD_113 VDD_115 VDD_116 VDD_236 VDD_235 VDD_233 VDD_232 VDD_231

VSS_4 VSS_8 VSS_11 VSS_14 VSS_18 VSS_21 VSS_24 VSS_27 VSS_30 VSS_33 VSS_36 VSS_39 VSS_42 VSS_43 VSS_46 VSS_47 VSS_50 VSS_53 VSS_56 VSS_59 VSS_62 VSS_65 VSS_68 VSS_69 VSS_72 VSS_75 VSS_78 VSS_81 VSS_84 VSS_85 VSS_88 VSS_89 VSS_92 VSS_95 VSS_98 VSS_101 VSS_104 VSS_107 VSS_110 VSS_114

J_DIMM_21

VCC_9VDD_1 VCC_10 VCC_12 VCC_13

VCC_129 VCC_130 VCC_132 VCC_133

VTT_15

VTT_117 VTT_135 VTT_237

VDD_SPD

VSS_124 VSS_128 VSS_131 VSS_134 VSS_138 VSS_141 VSS_144 VSS_147 VSS_150 VSS_153 VSS_156 VSS_159 VSS_162 VSS_163 VSS_166 VSS_167 VSS_170 VSS_173 VSS_176 VSS_179 VSS_182 VSS_185 VSS_188 VSS_189 VSS_192 VSS_195 VSS_198 VSS_201 VSS_204 VSS_205 VSS_208 VSS_209 VSS_212 VSS_215 VSS_218 VSS_221 VSS_224 VSS_227 VSS_230 VSS_234

91 10 12 13 129 130 132 133

15 117 135 237

238

124 128 131 134 138 141 144 147 150 153 156 159 162 163 166 167 170 173 176 179 182 185 188 189 192 195 198 201 204 205 208 209 212 215 218 221 224 227 230 234

21

C2874

.1uF

10V-10%

21

C3437

C3438

1 2

1uF 6.3V

21

C3478

22uF 6.3V

21

C3439

1uF 6.3V

+1.8V

21

C3476

+1.5V

21

C3477

NP

X

22uF 6.3V

C1275

1 2

22uF 6.3V

+1.8V

C1276

1 2

+1.5V

C1277

1 2

+0.9V

C1279

1 2

1

22uF 6.3V

2

22uF 6.3V

3

1uF 6.3V

4

FBD CHANNEL DIMM REV 36

BLACK LATCHES HETERO 1 OF 2

Black latch

ROOM=DIMM7

FBD CHANNEL DIMM REV 36

BLACK LATCHES HETERO 2 OF 2

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

M2LB_Change_Note: Right-side signals made NC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

MEM

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 38 OF 136

4

C

DBA

A B C

CHANNEL 3 DIMM 1

+1.8V +1.5V +0.9V +3.3V

Silkscreen: DIMM8

J_DIMM_31

D

1

2

3

46,47 46,47

34,35,38,44

35 35 35 35 35 35 35 35 35 35 35 35 35 35

35 35 35 35 35 35 35 35 35 35

CK_167M_DIMM31_P CK_167M_DIMM31_N

NC_MOD_MEM_FBD_CH3_D1_VID1 NC_MOD_MEM_FBD_CH3_D1_VID0

MOD_MEM_FBD_BR1_RST_N

NC_MOD_MEM_FBD_CH3_D1_207 NC_MOD_MEM_FBD_CH3_D1_206 NC_MOD_MEM_FBD_CH3_D1_165 NC_MOD_MEM_FBD_CH3_D1_164 NC_MOD_MEM_FBD_CH3_D1_87 NC_MOD_MEM_FBD_CH3_D1_86 NC_MOD_MEM_FBD_CH3_D1_45 NC_MOD_MEM_FBD_CH3_D1_44

MOD_MEM_FBD_CH3_D0_NB_13_P MOD_MEM_FBD_CH3_D0_NB_12_P MOD_MEM_FBD_CH3_D0_NB_11_P

MOD_MEM_FBD_CH3_D0_NB_10_P MOD_MEM_FBD_CH3_D0_NB_9_P MOD_MEM_FBD_CH3_D0_NB_8_P MOD_MEM_FBD_CH3_D0_NB_7_P MOD_MEM_FBD_CH3_D0_NB_6_P MOD_MEM_FBD_CH3_D0_NB_5_P MOD_MEM_FBD_CH3_D0_NB_4_P MOD_MEM_FBD_CH3_D0_NB_3_P MOD_MEM_FBD_CH3_D0_NB_2_P MOD_MEM_FBD_CH3_D0_NB_1_P MOD_MEM_FBD_CH3_D0_NB_0_P

MOD_MEM_FBD_CH3_D0_NB_13_N

MOD_MEM_FBD_CH3_D0_NB_12_N

MOD_MEM_FBD_CH3_D0_NB_11_N

MOD_MEM_FBD_CH3_D0_NB_10_N MOD_MEM_FBD_CH3_D0_NB_9_N MOD_MEM_FBD_CH3_D0_NB_8_N MOD_MEM_FBD_CH3_D0_NB_7_N MOD_MEM_FBD_CH3_D0_NB_6_N MOD_MEM_FBD_CH3_D0_NB_5_N MOD_MEM_FBD_CH3_D0_NB_4_N MOD_MEM_FBD_CH3_D0_NB_3_N MOD_MEM_FBD_CH3_D0_NB_2_N MOD_MEM_FBD_CH3_D0_NB_1_N MOD_MEM_FBD_CH3_D0_NB_0_N

MOD_MEM_FBD_CH3_D0_SB_9_P MOD_MEM_FBD_CH3_D0_SB_8_P MOD_MEM_FBD_CH3_D0_SB_7_P MOD_MEM_FBD_CH3_D0_SB_6_P MOD_MEM_FBD_CH3_D0_SB_5_P MOD_MEM_FBD_CH3_D0_SB_4_P MOD_MEM_FBD_CH3_D0_SB_3_P MOD_MEM_FBD_CH3_D0_SB_2_P MOD_MEM_FBD_CH3_D0_SB_1_P MOD_MEM_FBD_CH3_D0_SB_0_P

MOD_MEM_FBD_CH3_D0_SB_9_N MOD_MEM_FBD_CH3_D0_SB_8_N MOD_MEM_FBD_CH3_D0_SB_7_N MOD_MEM_FBD_CH3_D0_SB_6_N MOD_MEM_FBD_CH3_D0_SB_5_N MOD_MEM_FBD_CH3_D0_SB_4_N MOD_MEM_FBD_CH3_D0_SB_3_N MOD_MEM_FBD_CH3_D0_SB_2_N MOD_MEM_FBD_CH3_D0_SB_1_N MOD_MEM_FBD_CH3_D0_SB_0_N

40

PNP_13

48

PNP_12

66

PNP_11

63

PNP_10

60

PNP_9

57

PNP_8

54

PNP_7

51

PNP_6

37

PNP_5

34

PNP_4

31

PNP_3

28

PNP_2

25

PNP_1

22

PNP_0

41

PNN_13

49

PNN_12

67

PNN_11

64

PNN_10

61

PNN_9

58

PNN_8

55

PNN_7

52

PNN_6

38

PNN_5

35

PNN_4

32

PNN_3

29

PNN_2

26

PNN_1

23

PNN_0

90

PSP_9

102

PSP_8

99

PSP_7

96

PSP_6

93

PSP_5

82

PSP_4

79

PSP_3

76

PSP_2

73

PSP_1

70

PSP_0

91

PSN_9

103

PSN_8

100

PSN_7

97

PSN_6

94

PSN_5

83

PSN_4

80

PSN_3

77

PSN_2

74

PSN_1

71

PSN_0

228 120

SCKP SCL

229

SCKN

16

VID1

136

VID0

17

RESET_N

207

RFUCLK_207

206

RFUCLK_206

165

RFUCLK_165

164

RFUCLK_164

87

RFUCLK_87

86

RFUCLK_86

45

RFUCLK_45

44

RFUCLK_44

SNP_13 SNP_12 SNP_11 SNP_10

SNP_9 SNP_8 SNP_7 SNP_6 SNP_5 SNP_4 SNP_3 SNP_2 SNP_1 SNP_0

SNN_13 SNN_12 SNN_11 SNN_10

SNN_9 SNN_8 SNN_7 SNN_6 SNN_5 SNN_4 SNN_3 SNN_2 SNN_1 SNN_0

SSP_9 SSP_8 SSP_7 SSP_6 SSP_5 SSP_4 SSP_3 SSP_2 SSP_1 SSP_0

SSN_9 SSN_8 SSN_7 SSN_6 SSN_5 SSN_4 SSN_3 SSN_2 SSN_1 SSN_0

RFU_20

RFU_19 RFU_106 RFU_105 RFU_137 RFU_139 RFU_140 RFU_225 RFU_226

SDA

SA2 SA1 SA0

160 168 186 183 180 177 174 171 157 154 151 148 145 142

161 169 187 184 181 178 175 172 158 155 152 149 146 143

210 222 219 216 213 202 199 196 193 190

211 223 220 217 214 203 200 197 194 191

119

118 240 239

20 19 106 105 137 139 140 225 226

NC_MOD_MEM_FBD_CH3_D1_NB_13_P NC_MOD_MEM_FBD_CH3_D1_NB_12_P NC_MOD_MEM_FBD_CH3_D1_NB_11_P NC_MOD_MEM_FBD_CH3_D1_NB_10_P

NC_MOD_MEM_FBD_CH3_D1_NB_9_P NC_MOD_MEM_FBD_CH3_D1_NB_8_P NC_MOD_MEM_FBD_CH3_D1_NB_7_P NC_MOD_MEM_FBD_CH3_D1_NB_6_P NC_MOD_MEM_FBD_CH3_D1_NB_5_P NC_MOD_MEM_FBD_CH3_D1_NB_4_P NC_MOD_MEM_FBD_CH3_D1_NB_3_P NC_MOD_MEM_FBD_CH3_D1_NB_2_P NC_MOD_MEM_FBD_CH3_D1_NB_1_P NC_MOD_MEM_FBD_CH3_D1_NB_0_P

NC_MOD_MEM_FBD_CH3_D1_NB_13_N NC_MOD_MEM_FBD_CH3_D1_NB_12_N NC_MOD_MEM_FBD_CH3_D1_NB_11_N NC_MOD_MEM_FBD_CH3_D1_NB_10_N

NC_MOD_MEM_FBD_CH3_D1_NB_9_N NC_MOD_MEM_FBD_CH3_D1_NB_8_N NC_MOD_MEM_FBD_CH3_D1_NB_7_N NC_MOD_MEM_FBD_CH3_D1_NB_6_N NC_MOD_MEM_FBD_CH3_D1_NB_5_N NC_MOD_MEM_FBD_CH3_D1_NB_4_N NC_MOD_MEM_FBD_CH3_D1_NB_3_N NC_MOD_MEM_FBD_CH3_D1_NB_2_N NC_MOD_MEM_FBD_CH3_D1_NB_1_N NC_MOD_MEM_FBD_CH3_D1_NB_0_N

NC_MOD_MEM_FBD_CH3_D1_SB_9_P NC_MOD_MEM_FBD_CH3_D1_SB_8_P NC_MOD_MEM_FBD_CH3_D1_SB_7_P NC_MOD_MEM_FBD_CH3_D1_SB_6_P NC_MOD_MEM_FBD_CH3_D1_SB_5_P NC_MOD_MEM_FBD_CH3_D1_SB_4_P NC_MOD_MEM_FBD_CH3_D1_SB_3_P NC_MOD_MEM_FBD_CH3_D1_SB_2_P NC_MOD_MEM_FBD_CH3_D1_SB_1_P NC_MOD_MEM_FBD_CH3_D1_SB_0_P

NC_MOD_MEM_FBD_CH3_D1_SB_9_N NC_MOD_MEM_FBD_CH3_D1_SB_8_N NC_MOD_MEM_FBD_CH3_D1_SB_7_N NC_MOD_MEM_FBD_CH3_D1_SB_6_N NC_MOD_MEM_FBD_CH3_D1_SB_5_N NC_MOD_MEM_FBD_CH3_D1_SB_4_N NC_MOD_MEM_FBD_CH3_D1_SB_3_N NC_MOD_MEM_FBD_CH3_D1_SB_2_N NC_MOD_MEM_FBD_CH3_D1_SB_1_N NC_MOD_MEM_FBD_CH3_D1_SB_0_N

MOD_MEM_I2C_FBD_CH3_SCL MOD_MEM_I2C_FBD_CH3_SDA

i2c address A2 1010 (001) 0

MOD_MEM_I2C_ADD_PD_GND MOD_MEM_I2C_ADD_PU_3P3V

i2c addressing defined by Montreal_I2C_Map_v0p8.pdf

NC_MOD_MEM_FBD_CH3_D1_20

NC_MOD_MEM_FBD_CH3_D1_19 NC_MOD_MEM_FBD_CH3_D1_106 NC_MOD_MEM_FBD_CH3_D1_105 NC_MOD_MEM_FBD_CH3_D1_137 NC_MOD_MEM_FBD_CH3_D1_139 NC_MOD_MEM_FBD_CH3_D1_140 NC_MOD_MEM_FBD_CH3_D1_225 NC_MOD_MEM_FBD_CH3_D1_226

35,44 35,44

32-38 36-38

2 3 5 6

7 121 122 123 125 126 127 108 109 111 112 113 115 116 236 235 233 232 231

4

8

11 14 18 21 24 27 30 33 36 39 42 43 46 47 50 53 56 59 62 65 68 69 72 75 78 81 84 85 88 89 92 95

98 101 104 107 110 114

VDD_2 VDD_3 VDD_5 VDD_6 VDD_7 VDD_121 VDD_122 VDD_123 VDD_125 VDD_126 VDD_127 VDD_108 VDD_109 VDD_111 VDD_112 VDD_113 VDD_115 VDD_116 VDD_236 VDD_235 VDD_233 VDD_232 VDD_231

VSS_4 VSS_8 VSS_11 VSS_14 VSS_18 VSS_21 VSS_24 VSS_27 VSS_30 VSS_33 VSS_36 VSS_39 VSS_42 VSS_43 VSS_46 VSS_47 VSS_50 VSS_53 VSS_56 VSS_59 VSS_62 VSS_65 VSS_68 VSS_69 VSS_72 VSS_75 VSS_78 VSS_81 VSS_84 VSS_85 VSS_88 VSS_89 VSS_92 VSS_95 VSS_98 VSS_101 VSS_104 VSS_107 VSS_110 VSS_114

J_DIMM_31

VCC_9VDD_1 VCC_10 VCC_12 VCC_13

VCC_129 VCC_130 VCC_132 VCC_133

VTT_15

VTT_117 VTT_135 VTT_237

VDD_SPD

VSS_124 VSS_128 VSS_131 VSS_134 VSS_138 VSS_141 VSS_144 VSS_147 VSS_150 VSS_153 VSS_156 VSS_159 VSS_162 VSS_163 VSS_166 VSS_167 VSS_170 VSS_173 VSS_176 VSS_179 VSS_182 VSS_185 VSS_188 VSS_189 VSS_192 VSS_195 VSS_198 VSS_201 VSS_204 VSS_205 VSS_208 VSS_209 VSS_212 VSS_215 VSS_218 VSS_221 VSS_224 VSS_227 VSS_230 VSS_234

91 10 12 13 129 130 132 133

15 117 135 237

238

124 128 131 134 138 141 144 147 150 153 156 159 162 163 166 167 170 173 176 179 182 185 188 189 192 195 198 201 204 205 208 209 212 215 218 221 224 227 230 234

21

C3440

C3441

1 2

1uF 6.3V

21

C3481

22uF 6.3V

21

C3442

1uF 6.3V

+1.8V

NP

21

C3479

X

+1.5V

C3480

22uF 6.3V

21

22uF 6.3V

C1281

1 2

22uF 6.3V

+1.8V

C1282

1 2

+1.5V

C1283

1 2

+0.9V

C1285

1 2

1

22uF 6.3V

2

22uF 6.3V

3

1uF 6.3V

4

FBD CHANNEL DIMM REV 36

BLACK LATCHES HETERO 1 OF 2

Black latch

ROOM=DIMM8

FBD CHANNEL DIMM REV 36

BLACK LATCHES HETERO 2 OF 2

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

M2LB_Change_Note: Right-side signals made NC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

MEM

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 39 OF 136

4

C

DBA

A B C

D

1

2

3

M2LB_Change_Note: Deleted everything for DIMM9.

4

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

MEM

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 40 OF 136

DBA

4

A B C

D

1

2

3

M2LB_Change_Note: Deleted everything for DIMM10.

4

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

MEM

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 41 OF 136

DBA

4

A B C

D

1

2

3

M2LB_Change_Note: Deleted everything for DIMM11.

4

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

MEM

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 42 OF 136

DBA

4

A B C

D

1

2

3

M2LB_Change_Note: Deleted everything for DIMM12.

4

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

MEM

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 43 OF 136

DBA

4

+3.3V

A B C

D

1

21

R4307

1 2

R4309

4.7K-5%

R4308

1 2

4.7K-5%

21

R4310

4.7K-5%

R4311

1 2

4.7K-5%

R4312

R4313

21

4.7K-5%

21

4.7K-5%

R4314

4.7K-5%

1 2

MOD_MEM_I2C_FBD_CH0_SCL MOD_MEM_I2C_FBD_CH0_SDA

MOD_MEM_I2C_FBD_CH1_SCL MOD_MEM_I2C_FBD_CH1_SDA

MOD_MEM_I2C_FBD_CH2_SCL MOD_MEM_I2C_FBD_CH2_SDA

MOD_MEM_I2C_FBD_CH3_SCL MOD_MEM_I2C_FBD_CH3_SDA

32,36

32,36 33,37

33,37 34,38

34,38 35,39

35,39

1

+3.3V

+1.5V

2

SYSTEM_PWRGOOD_FBD

126

MOD_MEM_FBD_RESET_GPIO_N

44

54

FBD_RESET_GPIO

1 2

C2888

R4534

1 2

0-5%

.1uF

16V-10%

1411U1099

12 13

74VHC00

148U1099

9

10

R4481

X

10K-5%

1 2

NP*

MOD_MEM_SYS_PWRGOOD_BRANCH

MOD_MEM_FBD_RESET_BR0_R

MOD_MEM_FBD_RESET_GPIO_N

44

R4478

1 2

1K-1%

44

Q1896

3904

1

R4479

1 2

3

2

+1.5V

560-5%560-5%

MOD_MEM_FBD_BR0_RST_N

R4505

1 2

100K-1%

To DIMMs

32,33,36,37

100pF

1 2

C3591

50V-5%

2

3

44 44

MOD_MEM_SYS_PWRGOOD_BRANCH MOD_MEM_FBD_RESET_GPIO_N

74VHC00

146U1099

4 5

74VHC00

143U1099

1 2

74VHC00

MOD_MEM_FBD_RESET_BR1_R

NC_FBD_RESET_11

R4477

1 2

1K-1%

Q1897

3904

1

R4480

1 2

3

2

MOD_MEM_FBD_BR1_RST_N

R4506

1 2

100K-1%

To DIMMs

100pF

1 2

C3592

50V-5%

34,35,38,39

3

R5858

1 2

10K-5%

MODULE: DESC: REV: OF

SEC

MEM

4

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 44 OF 136

DBA

4

A B C

R204

1 2

D

CK_14M_SIO

66

1

2

3

4

DPN (J8809) spec - DCR 0.09 ohm, 1500mA, 25%, Imp 330 ohm, 0805 Intel CRB uses - DCR 0.09 ohm, 1500mA, 25%, Imp 330 ohm, 0805

CK410B max Idd3.3 ~= 500mA

+3.3V

L4

21

BLM21PG331SN1D

CK_100M_ROMB_P

70

R4433

1 2

49.9-1%

CK_100M_ROMB_N

70

R4434

1 2

49.9-1%

CK_100M_PCIE_MCH_67_P

71

R4435

1 2

49.9-1%

CK_100M_PCIE_MCH_67_N

71

R4437

1 2

49.9-1%

MOD_CK_100M_DB800_P

48

R4436

1 2

49.9-1%

MOD_CK_100M_DB800_N

48

R4441

1 2

49.9-1%

CK_100M_MCH_P

24

R4442

1 2

49.9-1%

CK_100M_MCH_N

24

R4440

1 2

49.9-1%

1 2

49.9-1%

1 2

49.9-1%

MOD_CK_100M_PROBE_P

R4439

MOD_CK_100M_PROBE_N

R4438

J01_DT7677_jp

1 2

+3.3V

R4455

33-5%

R4456

33-5%

R4457

33-5%

R4459

33-5%

R4458

33-5%

R4463

33-5%

R4464

33-5%

R4462

33-5%

L3

BLM21PG331SN1D

NET_PHYSICAL_TYPE=50MIL

R4742

21

1-5%

R4461

1 2

33-5%

R4460

1 2

33-5%

22-1%

R4741

1 2

2.2-5%

21

R4708

1-5%

1 2

C2599

C3131

21

10uF 6.3V

NET_PHYSICAL_TYPE=50MIL

21

C2598

.1uF

16V-10%

NET_PHYSICAL_TYPE=50MIL

MOD_CK_CK410B_VCC3_CPU_SRC

21

C100

.1uF

16V-10%

MOD_CK_CK410B_VCC3_CLKPCI

C3126

21

C101

1 2

10uF 6.3V

.1uF

16V-10%

21

C3123

21

C102

.1uF

16V-10%

21

.1uF

C103

16V-10%

MOD_CK_CK410B_VCC3_CLKREF

MOD_CK_CK410B_VCC3_CLK48

MOD_CK_CK410B_100M_ROMB_P MOD_CK_CK410B_100M_ROMB_N

MOD_CK_CK410B_100M_MCH_67_P MOD_CK_CK410B_100M_MCH_67_N

MOD_CK_CK410B_100M_DB800_P MOD_CK_CK410B_100M_DB800_N

MOD_CK_CK410B_100M_MCH_P MOD_CK_CK410B_100M_MCH_N

MOD_CK_CK410B_100M_PROBE_P MOD_CK_CK410B_100M_PROBE_N

1 2

C3130

.1uF

21

C104

16V-10%

21

C3124

10uF 6.3V

45 45

20 20

20,46

FSEL SPEC

MAX

3.6V

< 2.0V

0.35V

VIH_FS VIH_FS VIL_FS

MIN MODE

2.0V

0.7V

-0.3V

NET_PHYSICAL_TYPE=50MIL

21

.1uF

C105

16V-10%

.1uF

16V-10%

MOD_CK_CK410B_I2C_SEG0_SCL MOD_CK_CK410B_I2C_SEG0_SDA

FREQ_SEL_2 FREQ_SEL_1 FREQ_SEL_0

21

C3125

.1uF

16V-10%

.1uF

16V-10%

TEST NORMAL NORMAL

MOD_CK_CK410B_VCC3_CLKA

35

VDD_A

44

VDD_CPU_44

47

VDD_CPU_47

38

VDD_CPU_38

8

VDD_PCI_8

1

VDD_PCI_1

28

VDD_SRC_28

25

VDD_SRC_25

15

VDD_SRC_15

53

VDDREF

12

VDD_48

26

SRC_4P

27

SRC_4N

24

SRC_3P

23

SRC_3N

21

SRC_2P

22

SRC_2N

19

SRC_1P

18

SRC_1N

16

SRC_0P

17

SRC_0N

29

SCLK

30

SDATA

56

FS_C/TEST_SEL

49

FS_B/TEST_MODE

48

FS_A

34

GND_A

41

GND_CPU

7

GND_PCI_7

2

GND_PCI_2

20

GND_SRC

14

GND_48

50

GND_REF

NET_PHYSICAL_TYPE=50MIL

21

C109

.1uF

16V-10%

21

C555

10uF 6.3V

U_CK410B

CPU_3P CPU_3N

CPU_2P CPU_2N

CPU_1P CPU_1N

CPU_0P CPU_0N

PCICLK_F2

PCICLK_F1

PCICLK_F0

PCICLK3

PCICLK2

PCICLK1

PCICLK0

48MHZ

VTT_PWRGD_N/PD

ICS932S401

X1 X2

REF1 REF0

IREF

NC

52 51

54 55

37 36

40 39

43 42

46 45

11

10

9

6

5

4

3

13

31

MOD_CK_CK410B_IREF

33

32

MOD_CK_CK410B_XTAL_IN MOD_CK_CK410B_XTAL_OUT

MOD_CK_CK410B_14M_SIO_R MOD_CK_CK410B_14M_ESB_R

MOD_CK_CK410B_333M_CPU1_P_R MOD_CK_CK410B_333M_CPU1_N_R

MOD_CK_CK410B_333M_CPU0_P_R MOD_CK_CK410B_333M_CPU0_N_R

MOD_CK_CK410B_333M_DB1200_P_R MOD_CK_CK410B_333M_DB1200_N_R

MOD_CK_CK410B_333M_MCH_P_R MOD_CK_CK410B_333M_MCH_N_R

MOD_CK_CK410B_33M_BMC

MOD_CK_CK410B_33M_ATI_R

MOD_CK_CK410B_33M_FWH_TPM_R CK_33M_FWH_TPM

MOD_CK_CK410B_33M_SMARTVU_R

MOD_CK_CK410B_33M_ESB_PCI_R

MOD_CK_CK410B_33M_XDP1_R

MOD_CK_CK410B_33M_SIO_R

MOD_CK_CK410B_48M_ESB_USB_R

NC_MOD_CK_CK410B_PIN32

CK410B

14.31818MHz

NP

1 2

C1026

33pF 50V

MOD_CK_PWRDN

R579

1 2

475-1%

X5

1M-5%

R164

12

X

46

1 2

C1027

R4261

1 2

33-5%

R4263

1 2

33-5%

R4265

1 2

33-5%

R4267

1 2

33-5%

3

2

33pF 50V

1 2

10K-5%

R5192

Q1939

3904

1

R4262

33-5%

R4264

33-5%

R4266

33-5%

12

R5333

1 2

2.7K-5%

CK_33M_ATI

MLK: Clock Signal for TPM driven

CK_33M_SMARTVU

CK_33M_ESB_PCI

CK_33M_XDP1

CK_33M_SIO

CK_48M_ESB_USB

+3.3V

CK_PWRDN_N

R303

1 2

33-5%

R310

1 2

33-5%

R308

1 2

33-5%

1 2

R306

1 2

33-5%

1 2

98

67,68

96

52

30

66

54

48,70,95,128

R1810

1 2

33-5%

R304

1 2

33-5%

R309

1 2

33-5%

R307

33-5%

R305

33-5%

CK_14M_ESB

CK_333M_CPU1_P

R4204

1 2

49.9-1%

CK_333M_CPU1_N

R4203

1 2

49.9-1%

CK_333M_CPU0_P

R4202

1 2

49.9-1%

CK_333M_CPU0_N

R4201

1 2

49.9-1%

MOD_CK_333M_DB1200_P

R4200

1 2

49.9-1%

MOD_CK_333M_DB1200_N

R4199

1 2

49.9-1%

CK_333M_MCH_P

R4198

1 2

49.9-1%

CK_333M_MCH_N

R4197

1 2

49.9-1%

R4211

1 2

33-5%

CK_33M_BMC

53,54

17

1

17

13

46

2

22

86

3

See AR1861

SMBUS ADDRESS 0xD2

See AR1931 and AR2048

SEL2 SEL1 SEL0

0 0 1

FREQUENCY

133M

ECAD Note -

The signal goes into CK410B . It serves as VTT_PWRGD_N and PWRDWN dual function. After VTT_PWRGD_N assertion, it becomes a real-time input for asserting power down (active high). During normal operation this signal should be driven LOW by CPLD with open-drain output.

1. Place 33 ohm and 49 ohm resistor close to the clock pin lead

0

1 1

166M

2. VCC routing should be from plane, through high-f cap to the pins.

0

0 0

266M

3. Place one high-f cap to each power lead it served as close as possible

1 1 1 RSVD

0 0

333M

0

4. Place 10uF close to Ferrite Bead

M2LB_Change_Note: Changed DB1900 in signal names to DB1200. Made CK_100M_PROBE_P/N NC. Swapped some clocks with the DB800 for better routing.

ROOM=CLOCK_CK410B

PROPRIETARY NOTE

MODULE: DESC: REV: OF

DB410B, DB1200, DB800

SEC

CK

41

4

INC.

46,48,63

I2C_ESB2_SEG0_SDA

I2C_ESB2_SEG0_SCL

R3761

1 2

47-5%

R3762

1 2

47-5%

MOD_CK_CK410B_I2C_SEG0_SDA

MOD_CK_CK410B_I2C_SEG0_SCL

45

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

HX601

DATE

ROUND ROCK,TEXAS

REV.

A00

SHEET

9/7/2007 45 OF 136

C

DBA

1

45,48,63

A B C

I2C_ESB2_SEG0_SDA

I2C_ESB2_SEG0_SCL

R3763

1 2

47-5%

R3764

1 2

47-5%

MOD_CK_DB1200_I2C_SEG0_SDA

MOD_CK_DB1200_I2C_SEG0_SCL

46

D

DB1200

1

Thermal pads connecting to GND for MLF package

2

MOD_CK_DB1200_VCC3_MEMCLK

46

Memory Clock Enable: A GPO from ESB2 to hold off DB1200 Clocks until BIOS can set appropriate gear ratios in the DB1200

54

46

FBD_CLKEN_GPIO_N

MOD_CK_DB1200_VCC3_MEMCLK

R4691

1 2

1K-1%

R4694

1 2

1K-1%

R4696

1 2

+3.3V

1K-1%

NP

R4717

1 2

X

R5367

1 2

220-5%

SMBUS address

MOD_CK_DB1200_SA_0

MOD_CK_DB1200_SA_1

R4695

NP

1 2

1K-1%

X

MOD_CK_DB1200_SA_2

BLM21PG331SN1D

L5

R4690

1 2

1K-1%10K-5%

45,46

MOD_CK_PWRDN is SYS_PWRGOOD#fter RESET - AR1923

MOD_CK_FBD_CLKEN_GPIO_N

1 2

220pF

50V-10%

C3389

MOD_CK_PWRDN

20,45

RC = 49 ns

46

45,46

46

MOD_CK_DB1200_SA2 = 0 => NON_PLL MODE MOD_CK_DB1200_SA2 = 1 => PLL MODE

MOD_CK_DB1200_VCC3_MEMCLK

46

21

C8301

46

21

C112

10uF 6.3V

NET_PHYSICAL_TYPE=50MIL

21

.1uF

16V-10%

C113

.1uF

MOD_CK_333M_DB1200_P

45

MOD_CK_333M_DB1200_N

45

MOD_CK_DB1200_HIGH_BW_N

R4799

NP

1 2

1K-1%

FREQ_SEL_0

MOD_CK_DB1200_I2C_SEG0_SCL

46

MOD_CK_DB1200_I2C_SEG0_SDA

46

MOD_CK_DB1200_SA_2

46

MOD_CK_DB1200_SA_1

46

MOD_CK_DB1200_SA_0

46

MOD_CK_PWRDN

21

C114

16V-10%

.1uF

21

C117

16V-10%

1 2

X

.1uF

16V-10%

R5399

0-5%

2

SRC_IN+

3

SRC_IN-

1

HIGH_BW_N

53

OE_10_11_N

44

OE_9_N

41

OE_8_N

34

OE_7_N

31

OE_6_N

26

OE_5_N

21

OE_4_N

18

OE_3_N

15

OE_2_N

8

OE_1_N

5

OE_0_N

46

FS_A

29

SCL

28

SDA

30

SA_2/BYPASS_N/PLL

27

SA_1

4

SA_0

45

VTT_PWRGD_N/PWRDWN

56

VDD_A

50

VDD_50

38

VDD_38

22

VDD_22

11

VDD_11

SMBUS ADDRESS 0xDE

MOD_CK_DB1200_VCC3_MEMCLKA

NET_PHYSICAL_TYPE=50MIL

R4743

1 2

2.2-5%

U_DB1200

ICS9FG1201

L69

BLM21PG331SN1D

R4716

DIF_11+ DIF_11DIF_10+ DIF_10-

DIF_9+ DIF_9DIF_8+ DIF_8DIF_7+ DIF_7DIF_6+ DIF_6DIF_5+ DIF_5DIF_4+ DIF_4DIF_3+ DIF_3DIF_2+ DIF_2DIF_1+ DIF_1DIF_0+ DIF_0-

IREF

VSS_A VSS_49 VSS_37 VSS_23 VSS_12

+3.3V

21

52 51 48 47 43 42 40 39 36 35 33 32 24 25 19 20 16 17 13 14 9 10 6 7

54

55 49 37 23 12

MOD_CK_DB1200_333M_XDP1_P_R MOD_CK_DB1200_333M_XDP1_N_R MOD_CK_DB1200_333M_XDP0_P_R MOD_CK_DB1200_333M_XDP0_N_R MOD_CK_DB1200_167M_BRCH0_P_R MOD_CK_DB1200_167M_BRCH0_N_R MOD_CK_DB1200_167M_BRCH1_P_R MOD_CK_DB1200_167M_BRCH1_N_R MOD_CK_DB1200_167M_DIMM00_P_R MOD_CK_DB1200_167M_DIMM00_N_R MOD_CK_DB1200_167M_DIMM01_P_R MOD_CK_DB1200_167M_DIMM01_N_R MOD_CK_DB1200_167M_DIMM10_P_R MOD_CK_DB1200_167M_DIMM10_N_R MOD_CK_DB1200_167M_DIMM11_P_R MOD_CK_DB1200_167M_DIMM11_N_R MOD_CK_DB1200_167M_DIMM20_P_R MOD_CK_DB1200_167M_DIMM20_N_R MOD_CK_DB1200_167M_DIMM21_P_R MOD_CK_DB1200_167M_DIMM21_N_R MOD_CK_DB1200_167M_DIMM30_P_R MOD_CK_DB1200_167M_DIMM30_N_R MOD_CK_DB1200_167M_DIMM31_P_R MOD_CK_DB1200_167M_DIMM31_N_R

J01_DT7663_jp

MOD_CK_DB1200_IREF

R1878

1 2

475-1%

1 2

33-5%

R4714

1 2

33-5%

R4712

1 2

33-5%

R4710

1 2

33-5%

R1029

1 2

33-5%

R1027

1 2

33-5%

R1865

1 2

33-5%

R1023

1 2

33-5%

R320

1 2

33-5%

R322

1 2

33-5%

R324

1 2

33-5%

R4715

1 2

33-5%

R4713

1 2

33-5%

R4711

1 2

33-5%

R4709

1 2

33-5%

R1028

1 2

33-5%

R1026

1 2

33-5%

R1864

1 2

33-5%

R1022

1 2

33-5%

R319

1 2

33-5%

R321

1 2

33-5%

R323

1 2

CK_333M_XDP1_P

CK_333M_XDP1_N

CK_333M_XDP0_P

CK_333M_XDP0_N

CK_167M_BRANCH0_P

CK_167M_BRANCH0_N

CK_167M_BRANCH1_P

CK_167M_BRANCH1_N

CK_167M_DIMM00_P

CK_167M_DIMM00_N

CK_167M_DIMM01_P

CK_167M_DIMM01_N

CK_167M_DIMM10_P

CK_167M_DIMM10_N

CK_167M_DIMM11_P

CK_167M_DIMM11_N

CK_167M_DIMM20_P

CK_167M_DIMM20_N

CK_167M_DIMM21_P

CK_167M_DIMM21_N

CK_167M_DIMM30_P

CK_167M_DIMM30_N

30,47

21,47

23,47

32,47

36,47

33,47

37,47

34,47

38,47

35,47

DIMM00

DIMM01

DIMM02

DIMM10

DIMM11

DIMM12

DIMM20

2

3

VIH_FS VIH_FS VIL_FS

FSEL SPEC

MIN MODE

2.0V

0.7V

-0.3V

MAX

3.6V

< 2.0V

0.35V

TEST NORMAL NORMAL

21

C3117

.1uF

C3132

16V-10%

21

10uF 6.3V

NET_PHYSICAL_TYPE=50MIL

ECAD Note -

1. Place 33 ohm and 49 ohm resistor close to the clock pin lead

2. VCC routing should be from plane, through high-f cap to the pins.

3. Place one high-f cap to each power lead it served as close as possible

4. Place 10uF close to Ferrite Bead

R326

1 2

33-5%

R325

1 2

33-5%

CK_167M_DIMM31_P

CK_167M_DIMM31_N

M2LB_Change_Note: Changed from DB1900 to DB1200.

39,47

DIMM21

39,47

3

4

DB1200 max current = 600mA DPN (J8809) spec - DCR 0.09 ohm, 1500mA, 25%, Imp 330 ohm, 0805

ROOM=CLOCK_DB1200

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

CK

DB410B, DB1200, DB800

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 46 OF 136

DBA

42

4

A B C

DB1200 TERM RES

49.9-1%

32,46

CK_167M_DIMM00_P

CK_167M_DIMM00_N

49.9-1%

12

R1829

12

R1828

DIMM00

D

1

36,46

33,46

CK_167M_DIMM01_P

CK_167M_DIMM01_N

CK_167M_DIMM10_P

CK_167M_DIMM10_N

49.9-1%

R1830

49.9-1%

R1834

1

49.9-1%

12

R1831

12

49.9-1%

12

R1835

12

DIMM01

DIMM10

21,46

30,46

CK_333M_XDP0_P

CK_333M_XDP0_N

CK_333M_XDP1_P

CK_333M_XDP1_N

49.9-1%

12

R1852

49.9-1%

12

R1854

49.9-1%

12

R1853

XDP0

49.9-1%

12

R1855

XDP1

2

37,46

34,46

CK_167M_DIMM11_P

CK_167M_DIMM11_N

CK_167M_DIMM20_P

CK_167M_DIMM20_N

49.9-1%

R1836

49.9-1%

R1840

49.9-1%

12

R1837

12

49.9-1%

12

R1841

12

DIMM11

DIMM20

23,46

CK_167M_BRANCH1_P

CK_167M_BRANCH1_N

49.9-1%

12

R1856

49.9-1%

12

R1857

Branch 1

2

3

38,46

35,46

CK_167M_DIMM21_P

CK_167M_DIMM21_N

CK_167M_DIMM30_P

CK_167M_DIMM30_N

49.9-1%

R1842

49.9-1%

R1848

49.9-1%

12

R1843

12

DIMM21

23,46

CK_167M_BRANCH0_P

CK_167M_BRANCH0_N

49.9-1%

12

R1858

12

R1859

Branch 0

3

ECAD Note -

49.9-1%

12

R1849

12

DIMM30

1. Place 33 ohm and 49 ohm resistor close to the clock pin lead

2. VCC routing should be from plane, through high-f cap to the pins.

4

39,46

CK_167M_DIMM31_P

CK_167M_DIMM31_N

49.9-1%

R1850

M2LB_Change_Note: Changed DB1900 and DB1900G to DB1200 in text and ROOMs.

49.9-1%

12

R1851

12

DIMM31

Deleted components for DIMMs 9 - 12.

PROPRIETARY NOTE

MODULE: DESC: REV: OF

CK

DB410B, DB1200G, DB800

SEC

43

4

INC.

ROOM=CLOCK_DB1200G

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

HX601

DATE

ROUND ROCK,TEXAS

REV.

A00

SHEET

9/7/2007 47 OF 136

C

DBA

1

+3.3V

DPN (J8809) spec - DCR 0.09 ohm, 1500mA, 25%, Imp 330 ohm, 0805

L8

21

BLM21PG331SN1D

A B C

DB800

21

C3134

C130

10uF 6.3V

NET_PHYSICAL_TYPE=50MIL

21

.1uF

16V-10%

21

C129

.1uF

21

C131

16V-10%

.1uF

16V-10%

21

C132

.1uF

21

C127

16V-10%

.1uF

16V-10%

MOD_CK_DB800_VCC3_SRCLK

R4792

1 2

2.2-5%

48

21

C3135

21

C3118

10uF 6.3V

MOD_CK_DB800_VCC3_SRCLKA

NET_PHYSICAL_TYPE=50MIL

.1uF

16V-10%

48

R328

1 2

33-5%

R327

1 2

33-5%

R329

1 2

33-5%

CK_100M_ESB_SATA_P

R4234

1 2

49.9-1%

CK_100M_ESB_SATA_N

R4233

1 2

49.9-1%

CK_100M_ESB_ESI_P

R4230

1 2

D

53

1

49

2

MOD_CK_DB800_VCC3_SRCLK

1 2

8.2K-5%

R4730

48

See AR1861

See AR1931

45 45

48 48

45,70,95,128

MOD_CK_100M_DB800_N MOD_CK_100M_DB800_P

MOD_CK_DB800_I2C_SEG0_SCL MOD_CK_DB800_I2C_SEG0_SDA

MOD_CK_DB800_PLL MOD_CK_DB800_PLL_BW

MOD_CK_DB800_SRC_STOP_N MOD_CK_DB800_SRC_DIV2_N

CK_PWRDN_N

NC_MOD_CK_DB800_LOCK

MOD_CK_DB800_CLOCK_EN

MOD_CK_DB800_OE_INV

48

5

SRC_IN

4

SRC_IN

23

SCLK

24

SDATA

22

BYPASS/PLL

28

PLL_BW

27

SRC_STOP

1

SRC_DIV2

26

PWRDWN

45

LOCK

6

OE_0

14

OE_1

15

OE_2

7

OE_3

43

OE_4

35

OE_5

36

OE_6

44

OE_7

3

GND_3

10

GND_10

18

GND_18

25

GND_25

32

GND_32

40

OE_INV/GND

47

GNDA

U_DB800

ICS9DB108

DIF_0 DIF_0

DIF_1 DIF_1

DIF_2 DIF_2

DIF_3 DIF_3

DIF_4 DIF_4

DIF_5 DIF_5

DIF_6 DIF_6

DIF_7 DIF_7

IREF

VDD_2 VDD_11 VDD_19 VDD_31 VDD_39

VDDA

8 9

12 13

16 17

20 21

30 29

34 33

38 37

42 41

46

2 11 19 31 39

48

MOD_CK_DB800_DIF0_P_R MOD_CK_DB800_DIF0_N_R

MOD_CK_DB800_DIF1_P_R MOD_CK_DB800_DIF1_N_R

MOD_CK_DB800_DIF2_P_R MOD_CK_DB800_DIF2_N_R

MOD_CK_DB800_DIF3_P_R MOD_CK_DB800_DIF3_N_R

MOD_CK_DB800_DIF4_P_R MOD_CK_DB800_DIF4_N_R

MOD_CK_DB800_DIF5_P_R MOD_CK_DB800_DIF5_N_R

MOD_CK_DB800_DIF6_P_R MOD_CK_DB800_DIF6_N_R

MOD_CK_DB800_DIF7_P_R MOD_CK_DB800_DIF7_N_R

475-1%

MOD_CK_DB800_IREF

R163

MOD_CK_DB800_VCC3_SRCLK

MOD_CK_DB800_VCC3_SRCLKA

R330

1 2

33-5%

R333

1 2

33-5%

R334

1 2

33-5%

R331

1 2

33-5%

R332

1 2

33-5%

R341

1 2

33-5%

R342

1 2

12

48

33-5%

R339

1 2

33-5%

R340

1 2

33-5%

CK_100M_PCIE_MCH_4_N

CK_100M_PCIE_MCH_5_P

CK_100M_PCIE_MCH_5_N

49.9-1%

CK_100M_ESB_ESI_N

R4229

1 2

49.9-1%

CK_100M_PCIE_MCH_4_P

R4232

1 2

49.9-1%

R4231

1 2

49.9-1%

R4225

1 2

49.9-1%

R4224

1 2

49.9-1%

CK_100M_ESB_DMA_P

R4223

1 2

49.9-1%

CK_100M_ESB_DMA_N

R4226

1 2

49.9-1%

CK_100M_LOM1_P

R4227

1 2

49.9-1%

CK_100M_LOM1_N

R4228

1 2

49

72

2

72

49

81

3

45,46,63

I2C_ESB2_SEG0_SDA

I2C_ESB2_SEG0_SCL

1 2

ECAD Note -

R3767

47-5%

R3768

47-5%

MOD_CK_DB800_I2C_SEG0_SDA

MOD_CK_DB800_I2C_SEG0_SCL

48

SMBUS ADDRESS 0xDC

p19_DT9211_rt_replaced_symbol_to_remove_sub

48

MOD_CK_DB800_SRC_STOP_N

48

MOD_CK_DB800_PLL

48

MOD_CK_DB800_PLL_BW

48

MOD_CK_DB800_SRC_DIV2_N

48

MOD_CK_DB800_OE_INV

48

MOD_CK_DB800_VCC3_SRCLK

R4718

1 2

NP

R4697

X

1 2

NP

X

10K-5%

1K-1%

R4698

R4719

1 2

10K-5%1K-1%

NP

R4720

1 2

R4699

X

1 2

10K-5%

NP

1K-1%

R4700

X

R4721

1 2

10K-5%

1K-1%

R4701

49.9-1%

3

R337

1 2

33-5%

R338

1 2

33-5%

R335

1 2

33-5%

R336

1 2

1K-1%

1 2

33-5%

CK_100M_LOM2_P

R4221

1 2

49.9-1%

CK_100M_LOM2_N

R4220

1 2

49.9-1%

CK_100M_PCIE_ESB_2_P

R4222

1 2

49.9-1%

CK_100M_PCIE_ESB_2_N

R4219

1 2

71

83

71

M2LB_Change_Note: Changed some clock names based on usage in London/Berlin. Swapped some clocks with the CK410 for better routing.

4

1. Place 33 ohm and 49 ohm resistor close to the clock pin lead

2. VCC routing should be from plane, through high-f cap to the pins.

3. Place one high-f cap to each power lead it served as close as possible

4. Place 10uF close to Ferrite Bead

MOD_CK_MOD_CK_DB800_PLL = 0 => NON_PLL MODE MOD_CK_DB800_PLL = 1 => PLL MODE

MOD_CK_DB800_OE_INV = 0 => NO OE INVERSION MOD_CK_DB800_OE_INV = 1 => OE INVERSION

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

ROOM=CLOCK_DB800

49.9-1%

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

CK

DB410B, DB1900G, DB800

SEC

44

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 48 OF 136

DCBA

4

A B C

ROOM = ESB2

D

1

From BNB (ESI)

From LOM1

29 29 29 29

82 82 82 82

EXP_MCH_0_SB_3_N EXP_MCH_0_SB_2_N EXP_MCH_0_SB_1_N EXP_MCH_0_SB_0_N

EXP_MCH_0_SB_3_P EXP_MCH_0_SB_2_P EXP_MCH_0_SB_1_P EXP_MCH_0_SB_0_P

EXP_ESB_0_NB_3_N EXP_ESB_0_NB_2_N EXP_ESB_0_NB_1_N EXP_ESB_0_NB_0_N

EXP_ESB_0_NB_3_P EXP_ESB_0_NB_2_P EXP_ESB_0_NB_1_P EXP_ESB_0_NB_0_P

PCI-E & ESI

U_ESB2

PCI EXPRESS

J10

ESIRXN_3

H8

ESIRXN_2

G6

ESIRXN_1

F4

ESIRXN_0

J9

ESIRXP_3

H7

ESIRXP_2

G5

ESIRXP_1

F3

ESIRXP_0

M4

PE0RN3

K6

PE0RN2

J3

PE0RN1

L8

PE0RN0

M3

PE0RP3

K5

PE0RP2

J4

PE0RP1

L7

PE0RP0

ESITXN_3 ESITXN_2 ESITXN_1 ESITXN_0

ESITXP_3 ESITXP_2 ESITXP_1 ESITXP_0

PE0TN3 PE0TN2 PE0TN1 PE0TN0

PE0TP3 PE0TP2 PE0TP1 PE0TP0

G9 J7 H5 G3

G8 J6 H4 G2

L5 K2 H1 M7

L4 K3 H2 M6

MOD_ESB_EXP_MCH_0_NB_3_N_C MOD_ESB_EXP_MCH_0_NB_2_N_C MOD_ESB_EXP_MCH_0_NB_1_N_C MOD_ESB_EXP_MCH_0_NB_0_N_C

MOD_ESB_EXP_MCH_0_NB_3_P_C MOD_ESB_EXP_MCH_0_NB_2_P_C MOD_ESB_EXP_MCH_0_NB_1_P_C MOD_ESB_EXP_MCH_0_NB_0_P_C

MOD_ESB_EXP_ESB_0_SB_3_N_C MOD_ESB_EXP_ESB_0_SB_2_N_C MOD_ESB_EXP_ESB_0_SB_1_N_C MOD_ESB_EXP_ESB_0_SB_0_N_C

MOD_ESB_EXP_ESB_0_SB_3_P_C MOD_ESB_EXP_ESB_0_SB_2_P_C MOD_ESB_EXP_ESB_0_SB_1_P_C MOD_ESB_EXP_ESB_0_SB_0_P_C

50 50 50 50

49

MOD_ESB_ESIDCAC

+3.3V

R4843

1 2

R104

R607

X

4.7K-5%

MOD_ESB_EXTINTR_N_PU

+1.5V_ESB2

10K-5%

1 2

21

1K-5%

NP

49,55-57,110

1

49

2

3

49,55-57,110

+1.5V_ESB2

1 2

24.9-1%

R_ESB_2

ECAD: SHORT THEM AT THE PACKAGE THEN ROUTED TO R_ESB_2

NET_PHYSICAL_TYPE=50MIL PROPAGATION_DELAY=L:S::500

From LOM2

From London Left PCI2 Slot x4

FROM BNB

84 84 84 84

71 71 71 71

29 29 29 29

48 48

49 49 49

EXP_ESB_1_NB_3_N EXP_ESB_1_NB_2_N EXP_ESB_1_NB_1_N EXP_ESB_1_NB_0_N

EXP_ESB_1_NB_3_P EXP_ESB_1_NB_2_P EXP_ESB_1_NB_1_P EXP_ESB_1_NB_0_P

EXP_ESB_2_NB_3_N EXP_ESB_2_NB_2_N EXP_ESB_2_NB_1_N EXP_ESB_2_NB_0_N

EXP_ESB_2_NB_3_P EXP_ESB_2_NB_2_P EXP_ESB_2_NB_1_P EXP_ESB_2_NB_0_P

NC_MOD_ESB_MCH_1_SB_3_N NC_MOD_ESB_MCH_1_SB_2_N NC_MOD_ESB_MCH_1_SB_1_N NC_MOD_ESB_MCH_1_SB_0_N EXP_MCH_2_SB_3_N EXP_MCH_2_SB_2_N EXP_MCH_2_SB_1_N EXP_MCH_2_SB_0_N

NC_MOD_ESB_EXP_MCH_1_SB_3_P NC_MOD_ESB_EXP_MCH_1_SB_2_P NC_MOD_ESB_EXP_MCH_1_SB_1_P NC_MOD_ESB_EXP_MCH_1_SB_0_P EXP_MCH_2_SB_3_P EXP_MCH_2_SB_2_P EXP_MCH_2_SB_1_P EXP_MCH_2_SB_0_P

CK_100M_ESB_DMA_N CK_100M_ESB_DMA_P MOD_ESB_EXP_COMP

MOD_ESB_HP_SMBCLK_R MOD_ESB_HP_SMBDAT_R MOD_ESB_EXTINTR_N_PU

Y11

W3 W5 Y7

Y10

W2 W6 Y8

AA10

AC8 AB6 AA4

AA9 AC7 AB5 AA3

P8 N6 N3 R4 U1 T5 T8

U10

P7 N5 N2 R3 U2 T6 T9

U11

V10

V9 T11 W11

AJ17 AK18 AG22

PE1RN3 PE1RN2 PE1RN1 PE1RN0

PE1RP3 PE1RP2 PE1RP1 PE1RP0

PE2RN3 PE2RN2 PE2RN1 PE2RN0

PE2RP3 PE2RP2 PE2RP1 PE2RP0

PE4RN7 PE4RN6 PE4RN5 PE4RN4 PE4RN3 PE4RN2 PE4RN1 PE4RN0

PE4RP7 PE4RP6 PE4RP5 PE4RP4 PE4RP3 PE4RP2 PE4RP1 PE4RP0

PECLKN PECLKP PEICOMPI PERCOMPO HPCLK HPDTA EXTINTR

INTEL ENTERPRISE SOUTH BRIDGE 2

HETERO 2 OF 10

PE1TN3 PE1TN2 PE1TN1 PE1TN0

PE1TP3 PE1TP2 PE1TP1 PE1TP0

PE2TN3 PE2TN2 PE2TN1 PE2TN0

PE2TP3 PE2TP2 PE2TP1 PE2TP0

PE4TN7 PE4TN6 PE4TN5 PE4TN4 PE4TN3 PE4TN2 PE4TN1 PE4TN0

PE4TP7 PE4TP6 PE4TP5 PE4TP4 PE4TP3 PE4TP2 PE4TP1 PE4TP0

ESICLK100N ESICLK100P

ESIDCAC ESIICOMPI ESIRCOMPO

Y2 Y4 V3 W8

Y1 Y5 V4 W9

AB9 AA7 AC5 AB3

AB8 AA6 AC4 AB2

N9 R7 P5 P2 T2 U4 U7 R9

N8 R6 P4 P1 T3 U5 U8 R10

L1 M1

D27 L2 J1

MOD_ESB_EXP_ESB_1_SB_3_N_C MOD_ESB_EXP_ESB_1_SB_2_N_C MOD_ESB_EXP_ESB_1_SB_1_N_C MOD_ESB_EXP_ESB_1_SB_0_N_C

MOD_ESB_EXP_ESB_1_SB_3_P_C MOD_ESB_EXP_ESB_1_SB_2_P_C MOD_ESB_EXP_ESB_1_SB_1_P_C MOD_ESB_EXP_ESB_1_SB_0_P_C

MOD_ESB_EXP_ESB_2_SB_3_N_C MOD_ESB_EXP_ESB_2_SB_2_N_C MOD_ESB_EXP_ESB_2_SB_1_N_C MOD_ESB_EXP_ESB_2_SB_0_N_C

MOD_ESB_EXP_ESB_2_SB_3_P_C MOD_ESB_EXP_ESB_2_SB_2_P_C MOD_ESB_EXP_ESB_2_SB_1_P_C MOD_ESB_EXP_ESB_2_SB_0_P_C

NC_MOD_ESB_MCH_1_NB_3_N_C NC_MOD_ESB_MCH_1_NB_2_N_C NC_MOD_ESB_MCH_1_NB_1_N_C NC_MOD_ESB_MCH_1_NB_0_N_C MOD_ESB_EXP_MCH_2_NB_3_N_C MOD_ESB_EXP_MCH_2_NB_2_N_C MOD_ESB_EXP_MCH_2_NB_1_N_C MOD_ESB_EXP_MCH_2_NB_0_N_C

NC_MOD_ESB_EXP_MCH_1_NB_3_P_C NC_MOD_ESB_EXP_MCH_1_NB_2_P_C NC_MOD_ESB_EXP_MCH_1_NB_1_P_C NC_MOD_ESB_EXP_MCH_1_NB_0_P_C MOD_ESB_EXP_MCH_2_NB_3_P_C MOD_ESB_EXP_MCH_2_NB_2_P_C MOD_ESB_EXP_MCH_2_NB_1_P_C MOD_ESB_EXP_MCH_2_NB_0_P_C

CK_100M_ESB_ESI_N CK_100M_ESB_ESI_P

MOD_ESB_ESIDCAC MOD_ESB_ESI_COMP

PROPAGATION_DELAY=L:S::500 NET_PHYSICAL_TYPE=50MIL

50 50 50 50

48 48

49

ECAD: SHORT THEM AT THE PACKAGE

THEN ROUTED TO R_ESB_3

+3.3V

12

R4023

12

R4024

4.7K-5%

R_ESB_3

4.7K-5%

MOD_ESB_HP_SMBCLK_R MOD_ESB_HP_SMBDAT_R

+1.5V_ESB2

24.9-1%

1 2

2

49 49

3

49,55-57,110

M2LB_Change_Note: Changed text. +1.5V_ESB2 is +1.5V.

4

ESB2_REG

NC_ESB2_REG_1 NC_ESB2_REG_2

1 2

COMMON NEG

REG07 A NGO COUPON TEST

P19_DT9205_rt_remove_sub_attrib_ESB2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

A00

SHEET

9/7/2007 49 OF 136

DCBA

ESB

4

1

2

3

51

51 51 51 51

A B C

MOD_ESB_PCIX_133M_AD29

MOD_ESB_PCIX_133M_AD24

MOD_ESB_PCIX_133M_AD27 MOD_ESB_PCIX_133M_AD31 MOD_ESB_PCIX_133M_AD20 MOD_ESB_PCIX_133M_AD25

MOD_ESB_PCIX_133M_CBE3_N MOD_ESB_PCIX_133M_AD18 MOD_ESB_PCIX_133M_AD26 MOD_ESB_PCIX_133M_AD23

MOD_ESB_PCIX_133M_AD22 MOD_ESB_PCIX_133M_AD21 MOD_ESB_PCIX_133M_CBE2_N MOD_ESB_PCIX_133M_FRAME_N

MOD_ESB_PCIX_133M_TRDY_N MOD_ESB_PCIX_133M_AD19 MOD_ESB_PCIX_133M_AD16 MOD_ESB_PCIX_133M_IRDY_N

MOD_ESB_PCIX_133M_DEVSEL_N MOD_ESB_PCIX_133M_STOP_N MOD_ESB_PCIX_133M_AD28 MOD_ESB_PCIX_133M_AD17

MOD_ESB_PCIX_133M_AD30 MOD_ESB_PCIX_133M_LOCK_N MOD_ESB_PCIX_133M_PAR MOD_ESB_PCIX_133M_AD15

MOD_ESB_PCIX_133M_AD13 MOD_ESB_PCIX_133M_PERR_N MOD_ESB_PCIX_133M_SERR_N MOD_ESB_PCIX_133M_AD11

MOD_ESB_PCIX_133M_AD14 MOD_ESB_PCIX_133M_REQ0_N MOD_ESB_PCIX_133M_CBE1_N MOD_ESB_PCIX_133M_AD12

MOD_ESB_PCIX_133M_AD9 MOD_ESB_PCIX_133M_GNT0_N MOD_ESB_PCIX_133M_AD10 MOD_ESB_PCIX_133M_AD8

R8278

1 2

0-5%

R8279

0-5%

RN8000

1 2 3 4

RN8001

1 2 3 4

RN8002

1 2 3 4

RN8003

1 2 3 4

RN8004

1 2 3 4

RN8005

1 2 3 4

RN8006

1 2 3 4

RN8007

1 2 3 4

RN8008

1 2 3 4

D

ESI

C961

49

RN8011

MOD_ESB_PCIX_133M_AD29_R

21

MOD_ESB_PCIX_133M_AD24_R

73

51 51 51 51

MOD_ESB_PCIX_133M_ACK64_N MOD_ESB_PCIX_133M_AD0 MOD_ESB_PCIX_133M_REQ64_N MOD_ESB_PCIX_133M_CBE4_N

1 2 3 4

0

8 7 6 5

MOD_ESB_PCIX_133M_ACK64_N_R MOD_ESB_PCIX_133M_AD0_R MOD_ESB_PCIX_133M_REQ64_N_R MOD_ESB_PCIX_133M_CBE4_N_R

73 73 73 73

RN8020

8

MOD_ESB_PCIX_133M_AD27_R

7

MOD_ESB_PCIX_133M_AD31_R

6

MOD_ESB_PCIX_133M_AD20_R

5

0

MOD_ESB_PCIX_133M_AD25_R

73 73 73 73

51 51 51 51

MOD_ESB_PCIX_133M_CBE7_N MOD_ESB_PCIX_133M_CBE6_N MOD_ESB_PCIX_133M_AD63 MOD_ESB_PCIX_133M_CBE5_N

1 2 3 4

0

8 7 6 5

MOD_ESB_PCIX_133M_CBE7_N_R MOD_ESB_PCIX_133M_CBE6_N_R MOD_ESB_PCIX_133M_AD63_R MOD_ESB_PCIX_133M_CBE5_N_R

73 73 73 73

49

MOD_ESB_EXP_MCH_0_NB_3_N_C

MOD_ESB_EXP_MCH_0_NB_2_N_C

MOD_ESB_EXP_MCH_0_NB_1_N_C

MOD_ESB_EXP_MCH_0_NB_0_N_C

MOD_ESB_EXP_MCH_0_NB_3_P_C

MOD_ESB_EXP_MCH_0_NB_2_P_C

MOD_ESB_EXP_MCH_0_NB_1_P_C

MOD_ESB_EXP_MCH_0_NB_0_P_C

21

.1uF

10V-10%

C962

21

.1uF

10V-10%

C960

21

.1uF

10V-10%

C959

21

.1uF

10V-10%

C963

21

.1uF

10V-10%

C964

21

.1uF

10V-10%

C965

21

.1uF

10V-10%

C966

21

EXP_MCH_0_NB_3_N

EXP_MCH_0_NB_2_N

EXP_MCH_0_NB_1_N

EXP_MCH_0_NB_0_N

EXP_MCH_0_NB_3_P

EXP_MCH_0_NB_2_P

EXP_MCH_0_NB_1_P

EXP_MCH_0_NB_0_P

.1uF

10V-10%

RN8019

8

MOD_ESB_PCIX_133M_CBE3_N_R

7

MOD_ESB_PCIX_133M_AD18_R

6

MOD_ESB_PCIX_133M_AD26_R

5

0

MOD_ESB_PCIX_133M_AD23_R

73 73 73 73

51 51 51 51

MOD_ESB_PCIX_133M_AD62 MOD_ESB_PCIX_133M_AD41 MOD_ESB_PCIX_133M_PAR64 MOD_ESB_PCIX_133M_AD47

1 2 3 4

0

8 7 6 5

MOD_ESB_PCIX_133M_AD62_R MOD_ESB_PCIX_133M_AD41_R MOD_ESB_PCIX_133M_PAR64_R MOD_ESB_PCIX_133M_AD47_R

73 73 73 73

RN8018

8

MOD_ESB_PCIX_133M_AD22_R

7

MOD_ESB_PCIX_133M_AD21_R

6

MOD_ESB_PCIX_133M_CBE2_N_R

5

0

MOD_ESB_PCIX_133M_FRAME_N_R

73 73 73 73

51 51 51 51

MOD_ESB_PCIX_133M_AD61 MOD_ESB_PCIX_133M_AD60 MOD_ESB_PCIX_133M_AD36 MOD_ESB_PCIX_133M_AD57

1 2 3 4

0

8 7 6 5

MOD_ESB_PCIX_133M_AD61_R MOD_ESB_PCIX_133M_AD60_R MOD_ESB_PCIX_133M_AD36_R MOD_ESB_PCIX_133M_AD57_R

73 73 73 73

RN8017

8

MOD_ESB_PCIX_133M_TRDY_N_R

7

MOD_ESB_PCIX_133M_AD19_R

6

MOD_ESB_PCIX_133M_AD16_R

5

0

MOD_ESB_PCIX_133M_IRDY_N_R

73 73 73 73

51 51 51 51

MOD_ESB_PCIX_133M_AD38 MOD_ESB_PCIX_133M_AD59 MOD_ESB_PCIX_133M_AD55 MOD_ESB_PCIX_133M_AD58

1 2 3 4

0

8 7 6 5

MOD_ESB_PCIX_133M_AD38_R MOD_ESB_PCIX_133M_AD59_R MOD_ESB_PCIX_133M_AD55_R MOD_ESB_PCIX_133M_AD58_R

73 73 73 73

RN8016

8

MOD_ESB_PCIX_133M_DEVSEL_N_R

7

MOD_ESB_PCIX_133M_STOP_N_R

6

MOD_ESB_PCIX_133M_AD28_R

5

0

MOD_ESB_PCIX_133M_AD17_R

73 73 73 73

51 51 51 51

MOD_ESB_PCIX_133M_AD44 MOD_ESB_PCIX_133M_AD49 MOD_ESB_PCIX_133M_AD54 MOD_ESB_PCIX_133M_AD43

1 2 3 4

0

8 7 6 5

MOD_ESB_PCIX_133M_AD44_R MOD_ESB_PCIX_133M_AD49_R MOD_ESB_PCIX_133M_AD54_R MOD_ESB_PCIX_133M_AD43_R

73 73 73 73

49

MOD_ESB_EXP_MCH_2_NB_3_N_C

MOD_ESB_EXP_MCH_2_NB_2_N_C

MOD_ESB_EXP_MCH_2_NB_1_N_C

MOD_ESB_EXP_MCH_2_NB_0_N_C

MOD_ESB_EXP_MCH_2_NB_3_P_C

MOD_ESB_EXP_MCH_2_NB_2_P_C

MOD_ESB_EXP_MCH_2_NB_1_P_C

MOD_ESB_EXP_MCH_2_NB_0_P_C

MOD_ESB_EXP_ESB_1_SB_3_N_C

MOD_ESB_EXP_ESB_1_SB_2_N_C

MOD_ESB_EXP_ESB_1_SB_1_N_C

MOD_ESB_EXP_ESB_1_SB_0_N_C

MOD_ESB_EXP_ESB_1_SB_3_P_C

MOD_ESB_EXP_ESB_1_SB_2_P_C

RN8015

8

MOD_ESB_PCIX_133M_AD30_R

7

MOD_ESB_PCIX_133M_LOCK_N_R

6

MOD_ESB_PCIX_133M_PAR_R

5

0

MOD_ESB_PCIX_133M_AD15_R

73 73 73 73

51 51 51 51

MOD_ESB_PCIX_133M_AD53 MOD_ESB_PCIX_133M_AD56 MOD_ESB_PCIX_133M_AD52 MOD_ESB_PCIX_133M_AD45

1 2 3 4

0

8 7 6 5

MOD_ESB_PCIX_133M_AD53_R MOD_ESB_PCIX_133M_AD56_R MOD_ESB_PCIX_133M_AD52_R MOD_ESB_PCIX_133M_AD45_R

73 73 73 73

49

MOD_ESB_EXP_ESB_1_SB_1_P_C

MOD_ESB_EXP_ESB_1_SB_0_P_C

MOD_ESB_EXP_ESB_2_SB_3_N_C

RN8014

8

MOD_ESB_PCIX_133M_AD13_R

7

MOD_ESB_PCIX_133M_PERR_N_R

6

MOD_ESB_PCIX_133M_SERR_N_R

5

0

MOD_ESB_PCIX_133M_AD11_R

73 73 73 73

51 51 51 51

MOD_ESB_PCIX_133M_AD46 MOD_ESB_PCIX_133M_AD51 MOD_ESB_PCIX_133M_AD39 MOD_ESB_PCIX_133M_AD40

1 2 3 4

0

8 7 6 5

MOD_ESB_PCIX_133M_AD46_R MOD_ESB_PCIX_133M_AD51_R MOD_ESB_PCIX_133M_AD39_R MOD_ESB_PCIX_133M_AD40_R

73 73 73 73

49

MOD_ESB_EXP_ESB_2_SB_2_N_C

MOD_ESB_EXP_ESB_2_SB_1_N_C

MOD_ESB_EXP_ESB_2_SB_0_N_C

MOD_ESB_EXP_ESB_2_SB_3_P_C

RN8013

8

MOD_ESB_PCIX_133M_AD14_R

7

MOD_ESB_PCIX_133M_REQ0_N_R

6

MOD_ESB_PCIX_133M_CBE1_N_R

5

0

MOD_ESB_PCIX_133M_AD12_R

73 73 73 73

51 51 51 51

MOD_ESB_PCIX_133M_AD50 MOD_ESB_PCIX_133M_AD37 MOD_ESB_PCIX_133M_AD42 MOD_ESB_PCIX_133M_AD33

1 2 3 4

0

8 7 6 5

MOD_ESB_PCIX_133M_AD50_R MOD_ESB_PCIX_133M_AD37_R MOD_ESB_PCIX_133M_AD42_R MOD_ESB_PCIX_133M_AD33_R

73 73 73 73

49

MOD_ESB_EXP_ESB_2_SB_2_P_C

MOD_ESB_EXP_ESB_2_SB_1_P_C

MOD_ESB_EXP_ESB_2_SB_0_P_C

C967

21

.1uF

10V-10%

C969

21

.1uF

10V-10%

C971

.1uF

10V-10%

C973

.1uF

10V-10%

C945

NP2

.1uF

10V-10%

C946

NP2

.1uF

10V-10%

C944

NP2

.1uF

10V-10%

C943

NP2

.1uF

10V-10%

C937

.1uF

10V-10%

C938

.1uF

10V-10%

C936

.1uF

10V-10%

C935

.1uF

10V-10%

EXP_MCH_2_NB_3_N

C968

21

.1uF

10V-10%

EXP_MCH_2_NB_2_N

EXP_MCH_2_NB_1_N

C970

21

.1uF

10V-10%

EXP_MCH_2_NB_0_N

EXP_MCH_2_NB_3_P

C972

21

.1uF

10V-10%

EXP_MCH_2_NB_2_P

EXP_MCH_2_NB_1_P

C974

21

EXP_MCH_2_NB_0_P

.1uF

10V-10%

21

EXP_ESB_1_SB_3_N

C947

NP2

21

.1uF

10V-10%

EXP_ESB_1_SB_2_N

EXP_ESB_1_SB_1_N

C948

21

.1uF

10V-10%

EXP_ESB_1_SB_0_N

EXP_ESB_1_SB_3_P

C949

NP2

21

.1uF

10V-10%

EXP_ESB_1_SB_2_P

EXP_ESB_1_SB_1_P

C950

21

EXP_ESB_1_SB_0_P

.1uF

10V-10%

21

EXP_ESB_2_SB_3_N

C939

21

.1uF

10V-10%

EXP_ESB_2_SB_2_N

EXP_ESB_2_SB_1_N

C940

21

.1uF

10V-10%

EXP_ESB_2_SB_0_N

EXP_ESB_2_SB_3_P

C941

21

.1uF

10V-10%

EXP_ESB_2_SB_2_P

EXP_ESB_2_SB_1_P

C942

21

EXP_ESB_2_SB_0_P

.1uF

RN8012

8

MOD_ESB_PCIX_133M_AD9_R

7

MOD_ESB_PCIX_133M_GNT0_N_R

6

MOD_ESB_PCIX_133M_AD10_R

5

0

MOD_ESB_PCIX_133M_AD8_R

73 73 73 73

51 51 51 51

MOD_ESB_PCIX_133M_AD35 MOD_ESB_PCIX_133M_AD48 MOD_ESB_PCIX_133M_AD32 MOD_ESB_PCIX_133M_AD34

1 2 3 4

0

8 7 6 5

MOD_ESB_PCIX_133M_AD35_R MOD_ESB_PCIX_133M_AD48_R MOD_ESB_PCIX_133M_AD32_R MOD_ESB_PCIX_133M_AD34_R

73 73 73 73

M2LB_Change_Note: Added series resistors for PCI-X bus. Changed text.

10V-10%

BNB

LOM2

RISER1

24

83

71

1

2

3

4

51 51 51 51

MOD_ESB_PCIX_133M_CBE0_N MOD_ESB_PCIX_133M_AD6 MOD_ESB_PCIX_133M_AD7 MOD_ESB_PCIX_133M_AD4

MOD_ESB_PCIX_133M_AD5 MOD_ESB_PCIX_133M_AD2 MOD_ESB_PCIX_133M_AD3 MOD_ESB_PCIX_133M_AD1

1 2 3 4

RN8009

0

RN8010

0

8

MOD_ESB_PCIX_133M_CBE0_N_R

7

MOD_ESB_PCIX_133M_AD6_R

6

MOD_ESB_PCIX_133M_AD7_R

5

MOD_ESB_PCIX_133M_AD4_R

8

MOD_ESB_PCIX_133M_AD5_R

7

MOD_ESB_PCIX_133M_AD2_R

6

MOD_ESB_PCIX_133M_AD3_R

5

MOD_ESB_PCIX_133M_AD1_R

73 73 73 73

49

MOD_ESB_EXP_ESB_0_SB_0_N_C

C958

49

MOD_ESB_EXP_ESB_0_SB_1_N_C

MOD_ESB_EXP_ESB_0_SB_2_N_C

NP2

21

.1uF

10V-10%

C2516

49

MOD_ESB_EXP_ESB_0_SB_3_N_C

MOD_ESB_EXP_ESB_0_SB_0_P_C

MOD_ESB_EXP_ESB_0_SB_1_P_C

MOD_ESB_EXP_ESB_0_SB_2_P_C

NP2

21

.1uF

10V-10%

C952

21

.1uF

10V-10%

C2517

49

MOD_ESB_EXP_ESB_0_SB_3_P_C

NP2

21

.1uF

10V-10%

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

C957

.1uF

10V-10%

C2515

NP2

.1uF

10V-10%

C951

.1uF

10V-10%

C2518

NP2

.1uF

10V-10%

LOM1

21

EXP_ESB_0_SB_0_N

EXP_ESB_0_SB_1_N

EXP_ESB_0_SB_2_N

EXP_ESB_0_SB_3_N

EXP_ESB_0_SB_0_P

EXP_ESB_0_SB_1_P

81

MODULE:

ESB

DESC: REV: OF

SEC

4

21

EXP_ESB_0_SB_2_P

EXP_ESB_0_SB_3_P

81

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

HX601

SHEET

REV.

A00

9/7/2007 50 OF 136

DCBA

A B C

D

+3.3V

1

2

3

ROOM = ESB2

MOD_ESB_PXIRQ15_PU_N

51

MOD_ESB_PXIRQ14_PU_N

51

MOD_ESB_PXIRQ13_PU_N

51

MOD_ESB_PXIRQ12_PU_N

51

MOD_ESB_PXIRQ11_PU_N

51

MOD_ESB_PXIRQ10_PU_N

51

MOD_ESB_PXIRQ9_PU_N

51

MOD_ESB_PXIRQ8_PU_N

51

MOD_ESB_PXIRQ7_PU_N

51

MOD_ESB_PXIRQ6_PU_N

51

MOD_ESB_PXIRQ5_PU_N

51

MOD_ESB_PXIRQ4_PU_N

51 51,73 51,73 51,73 51,73

MOD_ESB_PCIX_133M_IRQ3_N MOD_ESB_PCIX_133M_IRQ2_N MOD_ESB_PCIX_133M_IRQ1_N MOD_ESB_PCIX_133M_IRQ0_N

MOD_ESB_CK_133M_GANGED

51

21

R4031

R4030

330-5%

21

330-5%

7

8

RN113

1

2

+3.3V_AUX

C3381

1 2

6

5%

5.1K

3

4 5

R101

1 2

10-1%

R99

1 2

10-1%

by U1122

1uF 6.3V

21

6

7

R4866

5.1K-5%

21

R4867

CK_133M_PCIX_RISER3

MOD_ESB_PXP_CK0_FB

5.1K

5%

45

5.1K-5%

RN114

2

3

ECAD: Place

+3.3V

PCI-X

12

R382

8.2K-5%

+3.3V

U_ESB2

50 50

21

8

1

21

7

8

RN115

1

2

6

5.1K

3

4 5

+3.3V

R4993

1 2

5%

NP

X

1 2

C3204

10K-5%

R5129

To PCI-X Conn

10pF

50V-5%

5.1K-5%

21

R5130

73

51

5.1K-5%

21

50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50

50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50

PROPAGATION_DELAY=L:S::800 NET_PHYSICAL_TYPE=25MIL

MOD_ESB_PCIX_133M_AD63 MOD_ESB_PCIX_133M_AD62 MOD_ESB_PCIX_133M_AD61 MOD_ESB_PCIX_133M_AD60 MOD_ESB_PCIX_133M_AD59 MOD_ESB_PCIX_133M_AD58 MOD_ESB_PCIX_133M_AD57 MOD_ESB_PCIX_133M_AD56 MOD_ESB_PCIX_133M_AD55 MOD_ESB_PCIX_133M_AD54 MOD_ESB_PCIX_133M_AD53 MOD_ESB_PCIX_133M_AD52 MOD_ESB_PCIX_133M_AD51 MOD_ESB_PCIX_133M_AD50 MOD_ESB_PCIX_133M_AD49 MOD_ESB_PCIX_133M_AD48 MOD_ESB_PCIX_133M_AD47 MOD_ESB_PCIX_133M_AD46 MOD_ESB_PCIX_133M_AD45 MOD_ESB_PCIX_133M_AD44 MOD_ESB_PCIX_133M_AD43 MOD_ESB_PCIX_133M_AD42 MOD_ESB_PCIX_133M_AD41 MOD_ESB_PCIX_133M_AD40 MOD_ESB_PCIX_133M_AD39 MOD_ESB_PCIX_133M_AD38 MOD_ESB_PCIX_133M_AD37 MOD_ESB_PCIX_133M_AD36 MOD_ESB_PCIX_133M_AD35 MOD_ESB_PCIX_133M_AD34 MOD_ESB_PCIX_133M_AD33 MOD_ESB_PCIX_133M_AD32 MOD_ESB_PCIX_133M_AD31 MOD_ESB_PCIX_133M_AD30 MOD_ESB_PCIX_133M_AD29

50

MOD_ESB_PCIX_133M_AD28 MOD_ESB_PCIX_133M_AD27 MOD_ESB_PCIX_133M_AD26 MOD_ESB_PCIX_133M_AD25 MOD_ESB_PCIX_133M_AD24 MOD_ESB_PCIX_133M_AD23 MOD_ESB_PCIX_133M_AD22 MOD_ESB_PCIX_133M_AD21 MOD_ESB_PCIX_133M_AD20 MOD_ESB_PCIX_133M_AD19 MOD_ESB_PCIX_133M_AD18 MOD_ESB_PCIX_133M_AD17 MOD_ESB_PCIX_133M_AD16 MOD_ESB_PCIX_133M_AD15 MOD_ESB_PCIX_133M_AD14 MOD_ESB_PCIX_133M_AD13 MOD_ESB_PCIX_133M_AD12 MOD_ESB_PCIX_133M_AD11 MOD_ESB_PCIX_133M_AD10 MOD_ESB_PCIX_133M_AD9 MOD_ESB_PCIX_133M_AD8 MOD_ESB_PCIX_133M_AD7 MOD_ESB_PCIX_133M_AD6 MOD_ESB_PCIX_133M_AD5 MOD_ESB_PCIX_133M_AD4 MOD_ESB_PCIX_133M_AD3 MOD_ESB_PCIX_133M_AD2 MOD_ESB_PCIX_133M_AD1 MOD_ESB_PCIX_133M_AD0

61 61 61 61

MOD_ESB_PXMOD2 NC_MOD_ESB_TP_HPX_SOD NC_MOD_ESB_TP_HPX_SOL NC_MOD_ESB_TP_HPX_SOLR

NC_MOD_ESB_TP_HXPWREN_1 NC_MOD_ESB_HPX_PRST_N NC_MOD_ESB_HPX_RST2 MOD_ESB_PXSIC_STRAP MOD_ESB_HPX_SID_N NC_MOD_ESB_PXSIL_STRAP MOD_ESB_RCOMP

MOD_ESB_HPX_SLOT_3 MOD_ESB_HPX_SLOT_2 MOD_ESB_HPX_SLOT_1 MOD_ESB_HPX_SLOT_0

AJ7

PXAD_63

AJ5

PXAD_62

AH6

PXAD_61

AH5

PXAD_60

AG7

PXAD_59

AF7

PXAD_58

AG6

PXAD_57

AF5

PXAD_56

AE6

PXAD_55

AE5

PXAD_54

AE8

PXAD_53

AD9

PXAD_52

AD6

PXAD_51

AD7

PXAD_50

AL3

PXAD_49

AL2

PXAD_48

AK3

PXAD_47

AK4

PXAD_46

AJ4

PXAD_45

AJ2

PXAD_44

AH3

PXAD_43

AG4

PXAD_42

AH2

PXAD_41

AG3

PXAD_40

AF2

PXAD_39

AF4

PXAD_38

AE3

PXAD_37

AF1

PXAD_36

AE2

PXAD_35

AD4

PXAD_34

AD3

PXAD_33

AD1

PXAD_32

AJ14

PXAD_31

AH14

PXAD_30

AG13

PXAD_29

AJ13

PXAD_28

AK13

PXAD_27

AH12

PXAD_26

AK12

PXAD_25

AJ11

PXAD_24

AF11

PXAD_23

AJ10

PXAD_22

AG10

PXAD_21

AH9

PXAD_20

AF10

PXAD_19

AJ8

PXAD_18

AH8

PXAD_17

AG9

PXAD_16

AK16

PXAD_15

AN16

PXAD_14

AL15

PXAD_13

AK15

PXAD_12

AM14

PXAD_11

AL14

PXAD_10

AN13

PXAD_9

AN12

PXAD_8

AL12

PXAD_7

AM11

PXAD_6

AL11

PXAD_5

AN10

PXAD_4

AM10

PXAD_3

AN9

PXAD_2

AL9

PXAD_1

AP8

PXAD_0

AT18

HPX_SLOT_3/HXPWRLED1_N

AR23

HPX_SLOT_2

AR22

HPX_SLOT_1/HXPRSNT1_1_N

AR20

HPX_SLOT_0/HXMRL_2_N

AT19

HPX_SOC/HXPCIXCAP2_2

AP17

HPX_SOD/HXCLKEN_2

AT22

HPX_SOL/HXBUTTON2

AP20 AM19

HPX_SOLR/HXATNLED2 SPECFG

AN7

HPX_PWREN_1

AP18

HPX_PRST_N/HXRST1

AP21

HPX_RST2_N

AT21

HPX_SIC

AT16

HPX_SID/HXPCIXCAP1_2

AR19

HPX_SIL/HXCLKEN_1_N

AC10

RCOMP

0.75V

INTEL ENTERPRISE SOUTH BRIDGE 2

PCI-X

HETERO 1 OF 10

RSTIN

mod2

PXPME PXPWROK PX133EN

PXPCIRST

PXPCIXCAP

PXM66EN

PXCBE_7 PXCBE_6 PXCBE_5 PXCBE_4 PXCBE_3 PXCBE_2 PXCBE_1 PXCBE_0

PXREQ_5/HXPRSNT1_2 PXREQ_4/HXPRSNT2_2

PXREQ_3//HXPRSNT2_1

PXREQ_2 PXREQ_1 PXREQ_0

PXGNT_5/HXBUSEN_1 PXGNT_4/HXBUSEN_2 PXGNT_3/HXPWREN_2

PXGNT_2 PXGNT_1 PXGNT_0

PXIRQ_15/HXMRL1 PXIRQ_14/HXPWRFLT_1 PXIRQ_13/HXPWRFLT_2

PXIRQ_12/HXM66EN_2 PXIRQ_11/HXM66EN_1

PXIRQ_10/HXPCIXCAP1_1

PXIRQ_9/HXPCIXCAP2_1

PXIRQ_8/HXBUTTON_1

PXIRQ_7 PXIRQ_6 PXIRQ_5 PXIRQ_4 PXIRQ_3 PXIRQ_2 PXIRQ_1 PXIRQ_0

PXPCLKI PXPCLKO_6 PXPCLKO_5 PXPCLKO_4 PXPCLKO_3 PXPCLKO_2 PXPCLKO_1 PXPCLKO_0

PXREQ64

PXSERR PXSTOP PXTRDY

PXPAR PXPAR64 PXACK64

PXPERR PXIRDY

PXDEVSEL

PXFRAME PXPLOCK

PASTRAP0

NPECFG

HPX_ATNLED_1

AJ19

AP6 AG30 AK10 AP5 AL18 AC1

AM7 AM5 AK7 AL6 AH11 AF8 AM16 AM13

AF16 AN1 AN6 AL5 AP2 AN3

AP3 AG16 AG15 AH15 AM4 AN4

AP11 AT12 AP12 AR13 AR14 AT13 AP14 AT15 AR16 AP15 AN15 AR17 AP9 AR10 AR11 AT10

AR4 AT6 AR7 AR8 AR5 AT4 AT7 AT9

AL8 AC2 AJ1 AM1 AJ16 AK6 AM8 AG1 AM2 AK1 AM3 AH1

AL20

AM20

AE9

ESB_PLT_RST_N

PCIX_PME_N SYSTEM_PWRGOOD_ESB2 MOD_ESB_PXM133EN MOD_ESB_PCIX_133M_RST_BUFF_N MOD_ESB_PCIX_133M_PCIXCAP MOD_ESB_PCIX_133M_M66EN

MOD_ESB_PCIX_133M_CBE7_N MOD_ESB_PCIX_133M_CBE6_N MOD_ESB_PCIX_133M_CBE5_N MOD_ESB_PCIX_133M_CBE4_N MOD_ESB_PCIX_133M_CBE3_N MOD_ESB_PCIX_133M_CBE2_N MOD_ESB_PCIX_133M_CBE1_N MOD_ESB_PCIX_133M_CBE0_N

MOD_ESB_PXREQ5_PU_N MOD_ESB_PXREQ4_PU_N MOD_ESB_PXREQ3_PU_N MOD_ESB_PXREQ2_PU_N MOD_ESB_PXREQ1_PU_N MOD_ESB_PCIX_133M_REQ0_N

NC_MOD_ESB_PXGNT5_N NC_MOD_ESB_PXECC4 NC_MOD_ESB_PXECC3 NC_MOD_ESB_PXECC2 NC_MOD_ESB_PXECC1 MOD_ESB_PCIX_133M_GNT0_N

MOD_ESB_PXIRQ15_PU_N MOD_ESB_PXIRQ14_PU_N MOD_ESB_PXIRQ13_PU_N MOD_ESB_PXIRQ12_PU_N MOD_ESB_PXIRQ11_PU_N MOD_ESB_PXIRQ10_PU_N MOD_ESB_PXIRQ9_PU_N MOD_ESB_PXIRQ8_PU_N MOD_ESB_PXIRQ7_PU_N MOD_ESB_PXIRQ6_PU_N MOD_ESB_PXIRQ5_PU_N MOD_ESB_PXIRQ4_PU_N MOD_ESB_PCIX_133M_IRQ3_N MOD_ESB_PCIX_133M_IRQ2_N MOD_ESB_PCIX_133M_IRQ1_N MOD_ESB_PCIX_133M_IRQ0_N

MOD_ESB_PXP_CK0_FB

NC_MOD_ESB_CK_PCIX5 NC_MOD_ESB_CK_PCIX4 NC_MOD_ESB_CK_PCIX3 NC_MOD_ESB_CK_PCIX2 NC_MOD_ESB_CK_PCIX1

MOD_ESB_PCIX_133M_REQ64_N MOD_ESB_PCIX_133M_SERR_N MOD_ESB_PCIX_133M_STOP_N MOD_ESB_PCIX_133M_TRDY_N MOD_ESB_PCIX_133M_PAR MOD_ESB_PCIX_133M_PAR64 MOD_ESB_PCIX_133M_ACK64_N MOD_ESB_PCIX_133M_PERR_N MOD_ESB_PCIX_133M_IRDY_N MOD_ESB_PCIX_133M_DEVSEL_N MOD_ESB_PCIX_133M_FRAME_N MOD_ESB_PCIX_133M_LOCK_N

MOD_ESB_PASTRAP0 MOD_ESB_SPECFG MOD_ESB_NPECFG

NC_MOD_ESB_HPX_ATTNLED_1_N

M2LB_Change_Note: Removed CK, REQ, GNT and IRQ signals for PCI-X slot 2. Changed pin AT7 to NC. Remove spare gates of U1122 used in London/Berlin power enable chain.

61 61

52,126

77 51,54,126 61 51

50 50 50 50 50 50 50 50

51 51 51 51

51 50,51

50

51 51 51 51 51 51 51 51 51 51 51 51 51,73 51,73 51,73 51,73

51

50 50 50 50 50 50 50 50 50 50 50 50

51 51 51 51 51

50,51

R272

3.24K-1%

1 2

MOD_ESB_PXREQ5_PU_N MOD_ESB_PXREQ4_PU_N MOD_ESB_PXREQ3_PU_N MOD_ESB_PXREQ2_PU_N MOD_ESB_PXREQ1_PU_N MOD_ESB_PCIX_133M_REQ0_N

MOD_ESB_CK_133M_GANGED

21

enables PCIX ODT

R4995

1K-5%

MODULE: DESC: REV: OF

21

R4825

+3.3V

8

RN110

1

NP

5.1K-5%

7

6

X

2

3

5

8.2K

4

SEC

73 73

R5065

X

1 2

NP

51

R5066

X

8.2K-5%

1 2

NP

ESB

1

8.2K-5%

2

3

4

R615

1K-5%

Intel PDG Requires 1/4W Resistor

R5082

1 2

100-1%

R785

1K-5%

51,54,126

51

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

SYSTEM_PWRGOOD_ESB2 MOD_ESB_PCIX_133M_RST_BUFF_N

+3.3V_AUX

14

1 2

U1122

74VHC08

R5012

MOD_ESB_PCIX_133M_RST_N_R

3

1 2

33-5%

NP

R5489

10K-5%

21

X

MOD_ESB_PCIX_133M_RST_N

73

4

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

DATE

HX601

SHEET

REV.

A00

9/7/2007 51 OF 136

DCBA

+3.3V

A B C

ROOM = ESB2

D

1

2

+3.3V

+3.3V_AUX

R391

1 2

8.2K-5%

R393

1 2

8.2K-5%

R395

1 2

8.2K-5%

R397

NP

1 2

4.7K-5%

R399

1 2

8.2K-5%

R401

1 2

8.2K-5%

R403

1 2

8.2K-5%

Which module has the PUs?

R392

1 2

8.2K-5%

R394

1 2

X

8.2K-5%

R398

1 2

8.2K-5%

R400

1 2

8.2K-5%

R402

1 2

8.2K-5%

R404

1 2

8.2K-5%

R4516

NP

1 2

8.2K-5%

X

MOD_ESB_PCI32_PLOCK_N

PCI32_STOP_N

MOD_ESB_PCI32_PERR_N

MOD_ESB_PCI32_SERR_N

PCI32_FRAME_N

MOD_ESB_PE_WAKE_N

PCI32_TRDY_N

PCI32_IRDY_N

PCI32_DEVSEL_N

MOD_ESB_PU_PREQ3_N

MOD_ESB_PU_PREQ2_N

MOD_ESB_PU_PREQ1_N

PCI32_PREQ0_N

MOD_ESB_PME_PU_N

52,98

52

52,98

52

54

52,98

52

52,98

52

98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98 98

PCI32_AD31 PCI32_AD30 PCI32_AD29 PCI32_AD28 PCI32_AD27 PCI32_AD26 PCI32_AD25 PCI32_AD24 PCI32_AD23 PCI32_AD22 PCI32_AD21 PCI32_AD20 PCI32_AD19 PCI32_AD18 PCI32_AD17 PCI32_AD16 PCI32_AD15 PCI32_AD14 PCI32_AD13 PCI32_AD12 PCI32_AD11 PCI32_AD10 PCI32_AD9 PCI32_AD8 PCI32_AD7 PCI32_AD6 PCI32_AD5 PCI32_AD4 PCI32_AD3 PCI32_AD2 PCI32_AD1 PCI32_AD0 PCI32_CBE3_N PCI32_CBE2_N PCI32_CBE1_N PCI32_CBE0_N

PCI & Expansion

U_ESB2

PCI/BMC MEM

G32

AD_31

F33

AD_30

F34

AD_29

H32

AD_28

G33

AD_27

J31

AD_26

J30

AD_25

H34

AD_24

L32

AD_23

L31

AD_22

R34

AD_21

M30

AD_20

M31

AD_19

U35

AD_18

R30

AD_17

T30

AD_16

K36

AD_15

J34

AD_14

K32

AD_13

K33

AD_12

M36

AD_11

L34

AD_10

N35

AD_9

N36

AD_8

L29

AD_7

M34 M33 N32 N33 R36 T35 T36 J33 N30 L35 K29

AD_6 AD_5 AD_4 AD_3 AD_2 AD_1 AD_0 CBE_3 CBE_2 CBE_1 CBE_0

EBUS_ADV/EBUS_RAS

EBUS_ALAT/EBUS_CKE

EBUS_OE/EBUS_CAS

EBUS_AD_24 EBUS_AD_23 EBUS_AD_22 EBUS_AD_21 EBUS_AD_20 EBUS_AD_19 EBUS_AD_18 EBUS_AD_17 EBUS_AD_16 EBUS_AD_15 EBUS_AD_14 EBUS_AD_13 EBUS_AD_12 EBUS_AD_11 EBUS_AD_10

EBUS_AD_9 EBUS_AD_8 EBUS_AD_7 EBUS_AD_6 EBUS_AD_5 EBUS_AD_4 EBUS_AD_3 EBUS_AD_2 EBUS_AD_1 EBUS_AD_0

EBUS_BE_0 EBUS_BE_1 EBUS_CE_1

EBUS_CE_2 EBUS_CLK_1 EBUS_CLK_2

EBUS_FRST

EBUS_WE

AK28 AJ28 AK27 AJ26 AJ25 AK25 AK24 AH23 AJ23 AL23 AJ22 AK22 AN28 AM28 AN27 AL27 AL26 AM26 AM25 AN25 AN24 AL24 AM23 AN22 AM22 AT27 AR26 AT25 AT24 AP24 AP23 AR28 AP26 AT28 AP27 AR25

NC_MOD_ESB_EBUS_AD24 NC_MOD_ESB_EBUS_AD23 NC_MOD_ESB_EBUS_AD22 NC_MOD_ESB_EBUS_AD21 NC_MOD_ESB_EBUS_AD20 NC_MOD_ESB_EBUS_AD19 NC_MOD_ESB_EBUS_AD18 NC_MOD_ESB_EBUS_AD17 NC_MOD_ESB_EBUS_AD16 NC_MOD_ESB_EBUS_AD15 NC_MOD_ESB_EBUS_AD14 NC_MOD_ESB_EBUS_AD13 NC_MOD_ESB_EBUS_AD12 NC_MOD_ESB_EBUS_AD11 NC_MOD_ESB_EBUS_AD10 NC_MOD_ESB_EBUS_AD9 NC_MOD_ESB_EBUS_AD8 NC_MOD_ESB_EBUS_AD7 NC_MOD_ESB_EBUS_AD6 NC_MOD_ESB_EBUS_AD5 NC_MOD_ESB_EBUS_AD4 NC_MOD_ESB_EBUS_AD3 NC_MOD_ESB_EBUS_AD2 NC_MOD_ESB_EBUS_AD1 NC_MOD_ESB_EBUS_AD0 NC_MOD_ESB_EBUS_ADV NC_MOD_ESB_EBUS_ALAT NC_MOD_ESB_EBUS_BE_0 NC_MOD_ESB_EBUS_BE_1 MOD_ESB_EBUS_CE_1_PD NC_MOD_ESB_EBUS_CE_2 NC_MOD_ESB_CK_62M_EBUS_1 NC_MOD_ESB_CK_62M_EBUS_2 NC_MOD_ESB_EBUS_FRST NC_MOD_ESB_EBUS_OE NC_MOD_ESB_EBUS_WE

12

R5900

8.2K-5%

52

52 52

24,52,95,129 24,52,95,129 24,52,95,129

MOD_ESB_TBS_OVERRIDE_PU

MOD_ESB_BIOS_DEST_PU MOD_ESB_GPIO48

Top-Block Swap Override Boot BIOS Destination Selection Boot BIOS Destination Selection'

*see BIOS spec for more details

MCH_ESB_ERR_0_N MCH_ESB_ERR_1_N MCH_ESB_ERR_2_N

+3.3V

R5481

1 2

+3.3V

NP

12

R4791

X

1K-1%

R5482

1 2

12

8.2K-5%

R4879

1K-1%

R5483

1 2

R5518

8.2K-5%

1K-1%

2 1

1

8.2K-5%

2

3

R408

1 2

8.2K-5%

R409

1 2

8.2K-5%

R5161

2.7K-5%

MOD_ESB_PIRQ_A_N

R407

1 2

8.2K-5%

R410

1 2

21

8.2K-5%

R5162

21

2.7K-5%

MOD_ESB_PIRQ_B_N

MOD_ESB_PIRQ_C_N

PCI32_PIRQ_D_N

MOD_ESB_SOFT_SMI

MOD_ESB_SOFT_SCI

52

52,98

53,54

54

77

+3.3V+3.3V

WAKE_ESB_N

1 2

C3612

470pF

50V-10%

54,70,95,129

52,98

52 52

52,98

52 98 45

52,98

52,98 52,98

52

52,98

52

52,59

61 52 52 52

52,98

PCI32_STOP_N MOD_ESB_PCI32_PERR_N MOD_ESB_PCI32_SERR_N PCI32_FRAME_N MOD_ESB_PCI32_PLOCK_N PCI32_PAR CK_33M_ESB_PCI ESB_PCI_RST_N

PCI32_TRDY_N PCI32_IRDY_N MOD_ESB_PME_PU_N PCI32_DEVSEL_N MOD_ESB_PLT_RST_R_N

STORAGE_ADAPTER_PRES_N FLOPPY_PRES_N MOD_ESB_BOARD_REWORK_8 MOD_ESB_PU_PREQ3_N MOD_ESB_PU_PREQ2_N MOD_ESB_PU_PREQ1_N PCI32_PREQ0_N

G35

STOP

G36

PERR

J36

SERR

T29

FRAME

H35

PLOCK

K35

PAR

M28

PCICLK

C34

PCIRST

E25

WAKE

P28

TRDY

N29

IRDY

P31

PME

F36

DEVSEL

P32

PLTRST

A33

REQ_6_N/GPI_0

D35

REQ_5_N/GPI_1

K30

REQ_4_N/GPI_40

E35

REQ_3

L28

REQ_2

E34

REQ_1

GNT_6_N/GPO_16 GNT_5_N/GPO_17

GNT_4_N/GPIO_48

GNT_3 GNT_2 GNT_1 GNT_0

SERIRQ IDEIRQ

PIRQ_A PIRQ_B PIRQ_C

PIRQ_D PIRQ_E_N/GPI_2 PIRQ_F_N/GPI_3 PIRQ_G_N/GPI_4 PIRQ_H_N/GPI_5REQ_0

D36 A32 P34 P35 B31 P29 D33

J24 B11

C31 A30 B29 C30 D32 E31 F31 E32H31

MOD_ESB_TBS_OVERRIDE_PU MOD_ESB_BIOS_DEST_PU MOD_ESB_GPIO48 NC_MOD_ESB_PGNT3_N NC_MOD_ESB_PGNT2_N NC_MOD_ESB_PGNT1_N PCI32_GNT0_N

MOD_ESB_SER_IRQ MOD_ESB_IRQ14_N

MOD_ESB_PIRQ_A_N MOD_ESB_PIRQ_B_N MOD_ESB_PIRQ_C_N PCI32_PIRQ_D_N

MCH_ESB_ERR_0_N_CPLD MCH_ESB_ERR_1_N MCH_ESB_ERR_2_N

CDROM_PRES_N

52 52 52

98

+3.3V

12

R415

8.2K-5%

52 52 52 52,98

24,52,95,129 24,52,95,129 52,70

12

R4758

10K-5%

66,67 70

PIRQ_D to PCI Video

+3.3V

NP

R5981

X

1 2

1K-1%

Place at slave (series term)

R5997

1 2

33-5%

NP

R5982

1 2

0-5%

X

MCH_ESB_ERR_0_N_CPLD_R

MCH_ESB_ERR_0_N

3

From CPLD

95,129

24,52,95,129

4

goes to MCH, ESB2 & BUFFER

51,126

ESB_PLT_RST_N

R652

1 2

0-5%

R5068

X

R913

1 2

8.2K-5%

1 2

NP

MOD_ESB_PLT_RST_R_N

20K-5%

52

R5069

X

1 2

R5057

1 2

8.2K-5%20K-5%

NP

ESB_PCI_RST_N

52,98

INTEL ENTERPRISE SOUTH BRIDGE 2

HETERO 4 OF 10

+3.3V

21

52,59 52,70

po7_tj_6423_removed_CPUx_PRES_N

FLOPPY_PRES_N CDROM_PRES_N

R5630

R5631

8.2K-5%

1 2

8.2K-5%

AR241: PE_WAKE# is only used by Integrated NIC controller.

TITLE

MODULE: DESC: REV: OF

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

ESB

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

REV.

HX601

SHEET

A00

9/7/2007 52 OF 136

DCBA

A B C

D

1

2

3

21

R3883

21,53 21,53 21,53 21,53 21,53

R791

2.7K-5%

1 2

XDP0_TDI_ESB_3V XDP0_TDO_ESB_3V XDP0_TMS_3V

XDP0_TRST_N_3V

XDP0_TCK1_3V

53,55,57,62,66,67,69,123

ECAD: Place Caps close to Pin A29

Input/Output

Series resistor

Series resistor with pull-down

Defaults outputting low

Defaults outputting high

VAux rail VBat rail

Open-drain

MOD_ESB_EE_DO

MOD_ESB_ACZ_BIT_CLK_PD

MOD_ESB_ACZ_RST_N_PD

R4988

20K-5%

1 2

20K-5%

VBAT

Output

Input

NP

+3.3V

12

R4763

X

R4766

2 1

330K-5%

R214

R284

1 2

20K-5%

53 53 53

53

21

R4764

8.2K-5%

1K-5%

R4767

2 1

12

NP

C_ESB_3

ROOM = ESB2

MOD_ESB_SMBALRT_PU

NP

12

1K-5%

R4765

X

1K-5%

+3.3V

R768

2 1

1.5VAUX Regulator

R255

X

1 2

PROPAGATION_DELAY=L:S::1000

1 2

8.2K-5%

NP

X

2.7K-5%

220-5%

1uF 6.3V

12

J6

LOW : Disable

Hi : Enable

21

C1029

NP0

X1

1 4

32KHz

R349

1 2

10M-5%

18pF

50V-5%

R5892

1 2

C1028

+3.3V_AUX

12

R4880

4.7K-5%

W/ Reboot Mode

21

18pF

50V-5%

8.2K-5%

53 53

61

21

R5673

MOD_ESB_PDD15

70

MOD_ESB_PDD14

70

MOD_ESB_PDD13

70

MOD_ESB_PDD12

70

MOD_ESB_PDD11

70

MOD_ESB_PDD10

70

MOD_ESB_PDD9

70

MOD_ESB_PDD8

70

MOD_ESB_PDD7

70

MOD_ESB_PDD6

70

MOD_ESB_PDD5

70

MOD_ESB_PDD4

70

MOD_ESB_PDD3

70

MOD_ESB_PDD2

70

MOD_ESB_PDD1

70

MOD_ESB_PDD0

70

MOD_ESB_PDDACK_N

70

MOD_ESB_PDDREQ

70

MOD_ESB_PDIOR_N

70

MOD_ESB_PDIOW_N

70

MOD_ESB_PDA0

70

MOD_ESB_PDA1

70

MOD_ESB_PDA2

70

MOD_ESB_PDCS1_N

70

MOD_ESB_PDCS3_N

70

59,70

MOD_ESB_ACZ_BIT_CLK_PD MOD_ESB_ACZ_RST_N_PD NC_MOD_ESB_ACZ_SDI_2 NC_MOD_ESB_ACZ_SDI_1 NC_MOD_ESB_ACZ_SDI_0

MOD_ESB_ACZ_SDOUT MOD_ESB_ACZ_SYN

45,54

21,53 21,53 21,53 21,53 21,53

53

53 53 53

JTAG Functionality Strapping

1K-5%

MOD_ESB_PDIORDY

CK_14M_ESB

MOD_ESB_SPEAKER_PU

MOD_ESB_INT_VRM_EN

XDP0_TCK1_3V XDP0_TDI_ESB_3V XDP0_TDO_ESB_3V XDP0_TMS_3V XDP0_TRST_N_3V

NC_ESB_RS232_CTS NC_ESB_RS232_DCD NC_ESB_RS232_DSR NC_ESB_RS232_DTR NC_ESB_RS232_RI NC_ESB_RS232_RTS NC_ESB_RS232_SIN NC_ESB_RS232_SOUT

MOD_ESB_RTCRST_N MOD_ESB_RTC_XTAL1 MOD_ESB_RTC_XTAL2PROPAGATION_DELAY=L:S::1000

NC_MOD_ESB_EE_CS_N NC_MOD_ESB_EE_DI MOD_ESB_EE_DO NC_MOD_ESB_EE_SK

MOD_ESB_SMLINK0 MOD_ESB_SMLINK1 MOD_ESB_INTRUDER_N

A15

DD_15

G15

DD_14

G14

DD_13

E14

DD_12

F13

DD_11

E13

DD_10

D12

DD_9

C13

DD_8

C12

DD_7

D11

DD_6

G12

DD_5

F12

DD_4

G11

DD_3

E11

DD_2

F10

DD_1

E10

DD_0

A11

DDACK

A14

DDREQ

B13

DIOR_N/DWSTR/RDMARDY_N

B14

DIOW_N/DSTOP

A9

DA_0

B10

DA_1

A8

DA_2

B8

DCS1

B7

DCS3

A12

IORDY/DRSTB/WDMARDY_N

T32

ACZ_BIT_CLK

U34

ACZ_RST

R33

ACZ_SDIN_0

U31

ACZ_SDIN_1

U32

ACZ_SDIN_2

R31

ACZ_SDOUT

T33

ACZ_SYNC

B34

CLK14

C33

SPKR

C25

INTVRMEN

AG28

TCK

AF28

TDI

AF29

TDO

AF26

TMS

AG27

TRST

AT31

RS232_CTS

AP30

RS232_DCD

AR32

RS232_DSR

AR31

RS232_DTR

AR29

RS232_RI

AP29

RS232_RTS

AN30

RS232_SIN

AT30

RS232_SOUT

A29

RTCRST

B26

RTCX1

A27

RTCX2

AD36

EE_CS

AF35

EE_DI

AE35

EE_DO

AE36

EE_SK

D30

SMLINK0

F30

SMLINK1

C28

INTRUDER

53,62,63,77

21-8A,24-9R,30-8D,53-8R,63-4K 63-7N,71-7L,72-7F,91-7G,96-7J

SYSTEM_PWRGOOD_FETS_6V

I2C_CHIPSET_SDA

U_ESB2

PATA/SATA/SERIAL/SMBUS

SATA5GP/GPI_13

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATA4GP/GPI_12

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA3GP/GPI_31

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA2GP/GPI_30

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA1GP/GPI_29

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA0GP/GPI_26

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATACLKN SATACLKP

SATARBIAS

SATARBIAS_N

SCLK/GPO_20

SDATAOUT0/GPO_23

SDATAOUT1/GPIO_32

SMBALERT/GPI_11

SMBALRT_2 SMBALRT_3 SMBALRT_4

Default Addr: 44h, use 88h/89h to write/read

INTEL ENTERPRISE SOUTH BRIDGE 2

HETERO 5 OF 10

SATALED

SDTA SCLK

SMBUS_5 SMBUS_3 SMBUS_2 SMBUS_1 SMBDATA

SMBCLK SMBCLK0 SMBCLK1 SMBCLK2 SMBCLK3 SMBCLK4

SMBD0 SMBD1 SMBD2 SMBD3 SMBD4

A18 H22 H23 L20 L19

G18 K20 K21 J22 J21

E19 G20 G21 H20 H19

C18 K17 K18 L17 L16

F18 H16 H17 J16 J15

D18 K14 K15 H14 H13

G23 G24 K23 J25 H25

AH20 AJ20 B16 C15 F16 AL21 AH21 AN21 AK19 H29 E26 AG31 AJ32 AK33 G30 AE33 AG33 AF31 AH32 AJ34 AE32 AG34 AF32 AH33 AK34

53,62,63,77

SIO_SMI_N NC_MOD_ESB_SATA_5_RX_N_C NC_MOD_ESB_SATA_5_RX_P_C NC_MOD_ESB_SATA_5_TX_N_C NC_MOD_ESB_SATA_5_TX_P_C

MOD_ESB_RISER_1_REV NC_MOD_ESB_SATA_4_RX_N_C NC_MOD_ESB_SATA_4_RX_P_C NC_MOD_ESB_SATA_4_TX_N_C NC_MOD_ESB_SATA_4_TX_P_C

MOD_ESB_BOARD_REWORK_6 NC_MOD_ESB_SATA_3_RX_N_C NC_MOD_ESB_SATA_3_RX_P_C NC_MOD_ESB_SATA_3_TX_N_C NC_MOD_ESB_SATA_3_TX_P_C

MOD_ESB_BOARD_REWORK_5 NC_MOD_ESB_SATA_2_RX_N_C NC_MOD_ESB_SATA_2_RX_P_C NC_MOD_ESB_SATA_2_TX_N_C NC_MOD_ESB_SATA_2_TX_P_C

MOD_ESB_BOARD_REWORK_4 MOD_ESB_SATA_1_RX_N_C MOD_ESB_SATA_1_RX_P_C MOD_ESB_SATA_1_TX_N_C MOD_ESB_SATA_1_TX_P_C

MOD_ESB_USB_CABLE_PRES_N MOD_ESB_SATA_0_RX_N_C MOD_ESB_SATA_0_RX_P_C MOD_ESB_SATA_0_TX_N_C MOD_ESB_SATA_0_TX_P_C

CK_100M_ESB_SATA_N CK_100M_ESB_SATA_P NC_MOD_ESB_SATA_LED_N

MOD_ESB_SATA_RBIAS

PROPAGATION_DELAY=L:S::500

MOD_ESB_I2C_CHIPSET_SDA_R

MOD_ESB_I2C_CHIPSET_SCL_R MOD_ESB_SOFT_SMI MOD_ESB_GPO23_PU MOD_ESB_BOARD_REWORK_7 MOD_ESB_SMBUS_5 MOD_ESB_SMBUS_3 MOD_ESB_SMBUS_2 MOD_ESB_SMBUS_1 I2C_ESB2_MAIN_SDA MOD_ESB_SMBALRT_PU NC_MOD_ESB_SMBALERT2 NC_MOD_ESB_SMBALERT3 NC_MOD_ESB_SMBALERT4 I2C_ESB2_MAIN_SCL

MOD_ESB_SMBCLK0_PU MOD_ESB_SMBCLK1_PU NC_MOD_ESB_SMBCLK2 NC_MOD_ESB_SMBCLK3 NC_MOD_ESB_SMBCLK4 MOD_ESB_SMBD0_PU MOD_ESB_SMBD1_PU NC_MOD_ESB_SMBD2 NC_MOD_ESB_SMBD3 NC_MOD_ESB_SMBD4

SYSTEM_PWRGOOD_FETS_6V

Q1911

D

R5392

1K-5%

21-8A,24-10R,30-7D,53-8R,63-4F

63-8N,71-7L,72-7F,91-7G,96-7J

21

1

G

2N7002

54,66

61,71,73

61

61 132 132 132 132

48 48

53 53 52,54 54 61 53 53 53 53 63,96 53

63,96 61 61

61 61

S

ECAD: SHORT THEM AT THE PACKAGE THEN ROUTED TO R_ESB_1

3

2

I2C_CHIPSET_SCL

53

R_ESB_1

1 2

Q1912

R5350

1K-5%

24.9-1%

21

MOD_ESB_I2C_CHIPSET_SDA_R

MOD_ESB_I2C_CHIPSET_SCL_R

ECAD: SATA_RBIAS to be routed as

60 ohm trace impedance

1

G

2N7002

M2LB_Change_Note: Made Atlanta SATA ports NC.

+3.3V_AUX

R4275

10K-5%

R4550

0-5%

D

3

S

2

12

+3.3V

100K-5%

R3822

12

NP

R3610

0-5%

It applies to port SDTA/SCLK

1 2

R4551

12

0-5%

R3823

12

NP

R3609

0-5%

12

R4276

10K-5%

1 2

MOD_ESB_SMLINK1

53

1

MOD_ESB_SMLINK0

12

I2C_CHIPSET_SDA

I2C_CHIPSET_SCL

+3.3V

21-8A,24-9R,30-8D,53-10J,63-4K 63-7N,71-7L,72-7F,91-7G,96-7J

21-8A,24-10R,30-7D,53-9M,63-4F 63-8N,71-7L,72-7F,91-7G,96-7J

53

2

NP

1K-5%

R5001

X

1K-5%

R4999

21

1K-5%

21

1K-5%

Address C4

53

MOD_ESB_SMBUS_5

MOD_ESB_SMBUS_3

MOD_ESB_SMBUS_2

MOD_ESB_SMBUS_1

NP

21

R5003

X

21

R4996

NP

1K-5%

R5002

X

1K-5%

R4997

21

1K-5%

R5000

NP

1K-5%

R4998

X

21

3

Address = 11[bit5]0[bit3][bit2][bit1]0

SMBDATA/CLK as Master SDTA/SCLK as slave port

MODULE: DESC: REV: OF

SEC

ESB

4

53,55,57,62,66,67,69,123

VBAT

R165

1 2

1M-5%

MOD_ESB_INTRUDER_N

53

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 53 OF 136

DCBA

4

1

A B C

ROOM = ESB2

54,95,128

13,15,17,54

13,15,17,21,54

ESB_THERMTRIP_N FSB_FERR_N CPU_PWRGOOD

R4905

1 2

+CPU_VTT

R162

220-5%

1 2

51-5%

SIO_PME_N

66

+3.3V_AUX

NP

12

R4985

X

8.2K-5%

R4975

0-5%

12

+3.3V_AUX

12

R4986

8.2K-5%

MOD_ESB_SIO_PME_N_R

NC_MOD_ESB_SDP0_2 NC_MOD_ESB_SDP0_1 NC_MOD_ESB_SDP0_0

NC_MOD_ESB_SDP1_2 NC_MOD_ESB_SDP1_1 NC_MOD_ESB_SDP1_0

54

AL30 AK30 AK31

AP32 AM31 AL32

SDP0_2 SDP0_1 SDP0_0

SDP1_2 SDP1_1 SDP1_0

U_ESB2

LAN/USB/FWH/MISC

FLBSD0

FLBSD1 FLBSINTEX0 FLBSINTEX1

FLSH_CE

FLSH_SCK

FLSH_SI FLSH_SO

AL35 AK36 AL36 AM35 AJ35 AH35 AH36 AG36

NC_MOD_ESB_FLBSD1 NC_MOD_ESB_FLBSD0 NC_MOD_ESB_FLBSINTEX0 NC_MOD_ESB_FLBSINTEX1 MOD_ESB_FLSH_CE_N NC_MOD_ESB_FLSH_SCK MOD_ESB_FLSH_SI MOD_ESB_FLSH_SO

+3.3V_AUX_ESB2

R5662

1 2

JTAG Functionality Strapping

8.2K-5%

21

D

Output

Input

Input/Output

54-57,61,67

Series resistor with pull-down

Defaults outputting low

Defaults outputting high

Intel recommended NC

MLK: Voltage Divider for OC Signal for INT USB added

21

Series resistor

VAux rail VBat rail

Open-drain

+5V

R20

4.7K-5%

1 2

1

2

52,70,95,129

54

3

54

4

21

C3172

+3.3V

12

R4881

53,66

53

54 46,54 44,54

MOD_ESB_SDP2_0

MOD_ESB_SDP2_1

51,54,126

Note: RESET_BTN_N has 16ms debounce logic

+3.3V_AUX

NP

BMC_SMI_N has PU at BMC side Pull-up to 3.3V on SYS_PWRGD

PUs for STPCLK, IGNNE, A20M, FSB_INIT_N, FSB_INTR, FSB_SLP_N, FSB_NMI shall in MCH block.

SIO_SMI_N

MOD_ESB_GPO23_PU

STORAGE_ADAPTER_PRES_N MOD_ESB_THRM_N FBD_CLKEN_GPIO_N FBD_RESET_GPIO

SYSTEM_PWRGOOD_ESB2

12

R4760

X

R3831

21

8.2K-5%

MOD_ESB_2V5_EN

PD = Enabled PU = Disabled

1K-5%

R5531

X

0-5%

+3.3V_AUX_ESB2

12

NP

8.2K-5%

12

R4883

NP

21

R5524

X

R5520

MOD_ESB_PERST_PD

54

8.2K-5%

21

1K-5%

47pF

R420

8.2K-5%

1 2

50V-5%

+3.3V

12

R5138

R5136

8.2K-5%

1 2

54

8.2K-5%

+3.3V

R5137

8.2K-5%

54-57,61,67

95,128

8.2K-5%

1 2

CPU_VRD_PWRGOOD

54

55-57,67,127

NET_PHYSICAL_TYPE=50MIL PROPAGATION_DELAY=L:S::575

45,53

FTF says to use 10K

MOD_ESB_CK_32K_SUSCLK_R

+1.5V_AUX_ESB2

CK_14M_ESB

54

AUX Power Good

R5400

0-5%

MOD_ESB_PERST_PD

21

12

1 2

1K-5%

8.2K-5%

100pF

R5521

+3.3V

R425

C803

12

50V-5%

R_ESB_5

21,30,58,95,128

24.9-1%

1 2

13,15,17,54

13,15,17,21,54

54,95,128

86,95,128

52

58,95,128 51,54,126

54 54

46,54 44,54

61 54 61 61

86,87 52,54 52,53

66 13,15,17 13,15,17 13,15,17 13,15,17

68,96

13,15,17

13,15,17 13,15,17

66

52,54

54

62

54

NC_MOD_ESB_SDP2_7 NC_MOD_ESB_SDP2_6 NC_MOD_ESB_SDP2_5 NC_MOD_ESB_SDP2_4 NC_MOD_ESB_SDP2_3 NC_MOD_ESB_SDP2_2 MOD_ESB_SDP2_1 MOD_ESB_SDP2_0

MOD_ESB_SEICOMPI

NC_MOD_ESB_SERN1 NC_MOD_ESB_SERN0 NC_MOD_ESB_SERP1 NC_MOD_ESB_SERP0

NC_MOD_ESB_SETN1 NC_MOD_ESB_SETN0 NC_MOD_ESB_SETP1 NC_MOD_ESB_SETP0

FBD_CLKEN_GPIO_N FBD_RESET_GPIO MOD_ESB_BOARD_REWORK_2 MOD_ESB_2V5_EN MOD_ESB_BOARD_REWORK_1 MOD_ESB_BOARD_REWORK_3 NC_MOD_ESB_GPIO19 NC_MOD_ESB_GPIO18 BMC_SMI_N MOD_ESB_SOFT_SCI MOD_ESB_SOFT_SMI

FSB_FERR_N

KB_A20GATE FSB_A20M_N FSB_STPCLK_N FSB_IGNNE_N FSB_INIT_N

H_INIT_N_3V FSB_INTR CPU_PWRGOOD NC_MOD_ESB_CPUSLP_N FSB_SMI_N FSB_NMI KB_RST_N MOD_ESB_SOFT_SCI NC_MOD_ESB_SUS_STAT_N MOD_ESB_SIO_PME_N_R

MOD_ESB_P3V3AUX_PWRGOOD RESET_BTN_N MOD_ESB_THRM_N ESB_THERMTRIP_N NC_MOD_SLP_S3_N ESB_PWR_ON_REQ NC_MOD_SLP_S5_N

MOD_ESB_PE_WAKE_N

MOD_ESB_CK_32K_SUSCLK_R

ESB_PWRBTN_N

SYSTEM_PWRGOOD_ESB2

R5063

1 2

33-5%

R5064

1 2

33-5%

CK_32K_SUSCLK_MASTER

CK_32K_SUSCLK_SLAVE

AT33

SDP2_7

AR34

SDP2_6

AP35

SDP2_5

AP33

SDP2_4

AN34

SDP2_3

AN33

SDP2_2

AN31

SDP2_1

AM32

SDP2_0

W33

SEICOMPI

V36

SER_CLK_IN

W32

SERCOMPO

W35

SERN1

V28

SERN0

W36

SERP1

V27

SERP0

Y34

SETN1

W30

SETN0

Y35

SETP1

W29

SETP0

D17

GPIO_34

E16

GPIO_33

B28

GPIO_27

F27

GPIO_25

D26

GPIO_24

J28

GPIO_28

A17

GPO_19

B17

GPO_18

G27

GPI_8

E17

GPI_7

G17

GPI_6

A24

FERR

AM34

PERST

E22

A20GATE

A21

A20M

C22

STPCLK

A23

IGNNE

D23

INIT

E23

INIT3_3V

C21

INTR

F22

CPUPWRGD/GPO_49

D21

CPUSLP

B23

SMI

B22

NMI

C24

RCIN

C16

SLOAD/GPO_21

H28

SUS_STAT/LPCPD

J27

RI

A26

RSMRST

K24

SYS_RESET

F24

THRM

B32

THRMTRIP

D29

SLP_S3

E29

SLP_S4

G29

SLP_S5

AL33

PE_WAKE

F25

SUSCLK

K22

VRMPWRGD

F28

PWRBTN

B25

PWROK

95,128

129

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

can blink can blink

SDRAM_AD12/SPD3_1/LED0_1

SDRAM_BA0/SDP3_2/LED0_2 SDRAM_BA1/SDP3_3/LED0_3

SDRAM_A9/SDP3_5/LED1_1 SDRAM_A10/SDP3_6/LED1_2 SDRAM_A11/SDP3_7/LED1_3

INTEL ENTERPRISE SOUTH BRIDGE 2

HETERO 3 OF 10

FWH_4/LFRAME_N

FWH_3/LAD_3 FWH_2/LAD_2 FWH_1/LAD_1 FWH_0/LAD_0

LDRQ_1_N/GPI_41

LDRQ_0

CLK48

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P

USBRBIAS

USBRBIAS_N

OC_7_N/GPI_15 OC_6_N/GPI_14 OC_5_N/GPI_10

OC_4_N/GPI_9

LAN1_DIS LAN0_DIS

EEPRTDIS

PHY_POWER_DOWN

PHYRST

SDP3_0/LED0_0

SDP3_4/LED1_0

LINK_0 LINK_1

LAN_PWR_GOOD

MLK: ESB2_LAN_PWRGOOD not going to CPLD now. Corresponding Pin on CPLD used for VID_SELECT

OC_3 OC_2 OC_1 OC_0

D20 C19 B19 B20 A20 F21 E20

H11

C9 C10 D8 D9 E7 E8 C6 C7 A5 A6 B4 B5 C3 C4 D2 D3 J12 J13

F7 F6 F1 E4 E1 E2 D6 D5

AM29 AL29

AE27

AA36 AB36

AG25 AH29 AJ31 AJ29 AH24 AH27 AH30 AH26 AB35 AC35 AN36

LAN interfaces

LPC_LFRAME_N LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0 MOD_ESB_BOARD_REWORK_9 LPC_LDRQ0_N

CK_48M_ESB_USB

NC_ESB_USB_P1_N NC_ESB_USB_P1_P MOD_ESB_USB_P2_N MOD_ESB_USB_P2_P MOD_ESB_USB_P3_N MOD_ESB_USB_P3_P ESB_USB_P4_N ESB_USB_P4_P NC_ESB_USB_P5_N NC_ESB_USB_P5_P ESB_USB_P6_N ESB_USB_P6_P MOD_ESB_USB_P7_N MOD_ESB_USB_P7_P

MOD_ESB_LAN1_DIS_N MOD_ESB_LAN0_DIS_N

MOD_ESB_DIS_EEPROM_BMC_N

NC_MOD_ESB_PHY_PWR_DN NC_MOD_ESB_PHY_RST_N

NC_MOD_ESB_LED0_0 NC_MOD_ESB_LED0_10 NC_MOD_ESB_LED0_100 NC_MOD_ESB_LED0_1000 NC_MOD_ESB_LED1_0 NC_MOD_ESB_LED1_10 NC_MOD_ESB_LED1_100 NC_MOD_ESB_LED1_1000 MOD_ESB_LINK_0_PD MOD_ESB_LINK_1_PD ESB2_LAN_PWRGOOD

RAC_CONN_USB20_N RAC_CONN_USB20_P

MOD_ESB_USB_RBIAS

MOD_ESB_V_5_USB_BACK67_N

MOD_ESB_USB_ALWAYS_ON

MOD_ESB_V_5_USB_BACK23_N

R3886

66-68,86,96 66-68,86,96 66-68,86,96 66-68,86,96 66-68,86,96 61 66

45

92 92

58 58 58 58 70

Front USB Port

70

MLK: USBP6 going to INT USB Connector (LONDON Only)

70 58

MLK: USBP7 going to INT USB Connector (BERLIN Only)

58

ECAD: SHORT THEM AT THE PACKAGE THEN ROUTED TO R_ESB_4

54 54

R4759

1 2

8.2K-5%

R5509

2.7K-5%

54,58,70

54

54,58

8.2K-5%

21

R4990

M2LB_Change_Note: Changed USB Port and OC connections. Changed constraint on MOD_ESB_SEICOMPI.

1K-5%

R_ESB_4

1 2

22.6-1%

54,58,70

54

TITLE

DWG NO.

DATE

MOD_ESB_V_5_USB_BACK67_N

C11

8.2K-5%

+5V

R795

1 2

C139

1 2

SEC

1 2

4.7K-5%

.1uF

R421

R3884

MOD_ESB_USB_ALWAYS_ON

54,58

MOD_ESB_V_5_USB_BACK23_N

MOD_ESB_LINK_1_PD

54

MOD_ESB_LINK_0_PD

54

54 54

MOD_ESB_LAN1_DIS_N MOD_ESB_LAN0_DIS_N

MODULE: DESC: REV: OF

R16

R424

1 2

8.2K-5%

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

9/7/2007 54 OF 136

.1uF

16V-10%

8.2K-5%

1 2

21

R4886

A00

+5V

R794

1 2

C138

1 2

21

R3885

2.7K-5%

21

1K-5%

R4887

ESB

2

4.7K-5%

.1uF

16V-10%

3

2.7K-5%

1K-5%

4

DCBA

A B C

D

1

54-57,61,67

2

3

ROOM = ESB2

AA25

VSS2_7

AA35

VSS2_6

AB24

VSS2_5

AB25

VSS2_4

AB31

VSS2_3

AC33

VSS2_2

AD29

VSS2_1

AD35

VSS2_0

+3.3V_AUX_ESB2

AE24

VCCAUX3_3_AE24

AF25

VCCAUX3_3_AF25

AF27

VCCAUX3_3_AF27

AG24

VCCAUX3_3_AG24

AG29

VCCAUX3_3_AG29

AH25

VCCAUX3_3_AH25

AH31

VCCAUX3_3_AH31

AJ27

VCCAUX3_3_AJ27

AK29

VCCAUX3_3_AK29

AK32

VCCAUX3_3_AK32

AM30

VCCAUX3_3_AM30

AM33

VCCAUX3_3_AM33

AN35

VCCAUX3_3_AN35

AP31

VCCAUX3_3_AP31

AR33

VCCAUX3_3_AR33

AT29

+CPU_VTT

+1.5V_ESB2

49,55-57,110

+3.3V

VCCAUX3_3_AT29

B24

VCCPCPU_B24

C23

VCCPCPU_C23

D24

VCCPCPU_D24

AA12

VCCPE_AA12

M11

VCCPE_M11

M2

VCCPE_M2

N12

VCCPE_N12

N4

VCCPE_N4

N7

VCCPE_N7

P12

VCCPE_P12

P9

VCCPE_P9

R2

VCCPE_R2

R5

VCCPE_R5

T12

VCCPE_T12

T7

VCCPE_T7

U12

VCCPE_U12

U3

VCCPE_U3

V11

VCCPE_V11

V5

VCCPE_V5

W12

VCCPE_W12

W7

VCCPE_W7

Y12

VCCPE_Y12

Y3

VCCPE_Y3

Y9

VCCPE_Y9

A13

VCCPIDE_A13

C14

VCCPIDE_C14

E12

VCCPIDE_E12

H15

VCCPIDE_H15

K13

VCCPIDE_K13

L13

VCCPIDE_L13

L14

VCCPIDE_L14

M13

VCCPIDE_M13

K31

VCCPPCI_K31

L33

VCCPPCI_L33

M29

VCCPPCI_M29

M35

VCCPPCI_M35

N24

VCCPPCI_N24

N26

VCCPPCI_N26

N31

VCCPPCI_N31

P25

VCCPPCI_P25

P26

VCCPPCI_P26

P27

VCCPPCI_P27

P33

VCCPPCI_P33

P36

VCCPPCI_P36

R25

VCCPPCI_R25

R27

VCCPPCI_R27

R29

VCCPPCI_R29

T24

VCCPPCI_T24

T26

VCCPPCI_T26

U_ESB2

POWER

USB

VCCPSUS_D34 VCCPSUS_F32 VCCPSUS_H30 VCCPSUS_K25 VCCPSUS_K26 VCCPSUS_K28 VCCPSUS_L25 VCCPSUS_L26 VCCPSUS_M25

VCCPUSB_A4 VCCPUSB_B3 VCCPUSB_C5 VCCPUSB_E6 VCCPUSB_G7

VCCUSBCORE_D1 VCCUSBCORE_G4 VCCUSBCORE_J8 VCCUSBCORE_K8 VCCUSBCORE_K9

VCCAUBG VSSAUBG

VCCBGESI VSSBGESI

VCCBGPE VSSBGPE

VCCA3_3 VSSA3_3

VCCASATABG VSSASATABG

VCCAPE VSSAPE

VCCAUPLL VCCAPLL1_5 VSSAPLL1_5

VREFPCI VCC5REF2 VCC5REF1

VCC5REFSUS

VCCAESI

VCCAP3 VCCAP1

VCCAPLL

VCCP25IDE VCCP25PCI

VCCPRTC

VCCSATA

VCCSUS1

VCCSUS2

VCCUSB

POWER AND GROUND

+3.3V_AUX

D34 F32 H30 K25 K26 K28 L25 L26 M25

A4 B3 C5 E6 G7

D1 G4 J8 K8 K9

K12 K11

L11 L10

V1 AA1

V30 V31

J18 J19

V7 V6

F9 V33 V34

AC11 D14 U29 E5

M9 AD10 AE11 G26 N11 T27 C27 H26 M27 N27 H10

+3.3V_AUX

+1.5V_ESB2

49,55-57,110

MOD_ESB_AU_VCCBG MOD_ESB_AU_VSSBG

MOD_ESB_ESI_VCCBGEXP MOD_ESB_ESI_VSSBGEXP

MOD_ESB_PE_VCCBGEXP MOD_ESB_PE_VSSBGEXP

MOD_ESB_VCCA3_3 MOD_ESB_VSSA3_3

MOD_ESB_SATA_VCCBG MOD_ESB_SATA_VSSBG

MOD_ESB_VCCA_EXP MOD_ESB_VSSA_EXP

MOD_ESB_VCCAUPLL MOD_ESB_VCCAPLL1_5 MOD_ESB_VSSAPLL1_5

MOD_ESB_VREF_PCI

< 10mA input current

MOD_ESB_VCCAESI MOD_ESB_VCCA_PCI3 MOD_ESB_VCCA_PCI1 MOD_ESB_VCCA_PLL

VBAT +1.5V_ESB2

+1.5V_SUS_ESB2

1 2

C3175

.1uF

C3174

16V-10%

R5139

55 55

56 56

55 55

57 57

56 56 56

55

56 57 57 56

53,57,62,66,67,69,123 49,55-57,110

.1uF

1 2

16V-10%

21

R5140

X

330-5%

1 2

NP

55

MOD_ESB_AF19_PD

needs 3.3VAUX

needs 3.3V

needs 2.5V

needs 3.3VAUX

needs 3.3V

+5V_AUX

57,67

+3.3V

8.2K-5%

MOD_ESB_TEST2

MOD_ESB_TP0

MOD_ESB_VREF

D1108

BAR43

1 2

C1344

31

.1uF

16V-10%

55 55

R5418

1 2

55

0-5%

55

MOD_ESB_STRAP_7

55

MOD_ESB_STRAP_6

55

MOD_ESB_STRAP_5

55

MOD_ESB_STRAP_4

55

MOD_ESB_STRAP_3

55

MOD_ESB_STRAP_2

61

MOD_ESB_STRAP_1

55

MOD_ESB_STRAP_0

55

R5749

220-5%

R5748

1 2

220-5%

NC_MOD_ESB_25 NC_MOD_ESB_24 NC_MOD_ESB_23 NC_MOD_ESB_22 NC_MOD_ESB_21 NC_MOD_ESB_20 NC_MOD_ESB_19 NC_MOD_ESB_18 NC_MOD_ESB_17 NC_MOD_ESB_16 NC_MOD_ESB_15 NC_MOD_ESB_14 NC_MOD_ESB_13 NC_MOD_ESB_12 NC_MOD_ESB_11 NC_MOD_ESB_10 NC_MOD_ESB_9 NC_MOD_ESB_8 NC_MOD_ESB_7 NC_MOD_ESB_6 NC_MOD_ESB_5 NC_MOD_ESB_4 NC_MOD_ESB_3 NC_MOD_ESB_2 NC_MOD_ESB_1 NC_MOD_ESB_0

MOD_ESB_TEST2 NC_MOD_ESB_TEST1 NC_MOD_ESB_TEST0

MOD_ESB_TP0

21

+5V

AD34

NC_AD34

D15

NC_D15

F35

NC_F35

L22

NC_L22

M10

NC_M10

M12

NC_M12

M15

NC_M15

M21

NC_M21

M23

NC_M23

M24

NC_M24

P10

NC_P10

P11

NC_P11

P24

NC_P24

R1

NC_R1

R28

NC_R28

U25

NC_U25

V25

NC_V25

AD25

NC_AD25

AE13

NC_AE13

AE23

NC_AE23

AF14

NC_AF14

AF18

NC_AF18

AF22

NC_AF22

AF23

NC_AF23

AL17

NC_AL17

AM17

NC_AM17

AD31

AF21 AF20

AK21 AD28 AE30 AE26

ESB2_TEST2 ESB2_TEST1

U26

ESB2_TEST0

U28

TP_0

E28

STRAP_7

F19

STRAP_6 STRAP_5 STRAP_4

K27

STRAP_3 STRAP_2 STRAP_1 STRAP_0

INTEL ENTERPRISE SOUTH BRIDGE 2

55 55

+3.3V_AUX

U_ESB2

NC/RSV

HETERO 6 OF 10

49,55-57,110

MOD_ESB_STRAP_5 MOD_ESB_STRAP_4

D1056

12

MBRS130LT3

RSV_AC29 RSV_AD27 RSV_AD30 RSV_AD33 RSV_AE29

STRAP_8 RSV_AG18 RSV_AG19 RSV_AG21 RSV_AH17 RSV_AH18 RSV_AN18 VSS_AN19

RSV_AK9

VSS_AA33

VSS_Y29 VSS_AB33

VSS_Y31 VSS_AB30 VSS_AC32 VSS_AB32 VSS_AA31 VSS_AA30

VSS_Y32 VSS_AA34 VSS_AC25 VSS_AC31

VSS_Y28 VSS_AC34 VSS_AA27 VSS_AB27 VSS_AB29 VSS_AC26 VSS_AC28

VSS_Y26

VSS_W27 VSS_AA28 VSS_AB26 VSS_AF34

+1.5V_ESB2

R4976

1 2

AC29 AD27 AD30 AD33 AE29 AF19 AG18 AG19 AG21 AH17 AH18 AN18 AN19 AK9

AA33 Y29 AB33 Y31 AB30 AC32 AB32 AA31 AA30 Y32 AA34 AC25 AC31 Y28 AC34 AA27 AB27 AB29 AC26 AC28 Y26 W27 AA28 AB26 AF34

0-5%

ECAD: In all cases, route VCCBG and VSSBG as diff pair

Intel will change PS to below:

+3.3V

NC_MOD_ESB_RSV_13 NC_MOD_ESB_RSV_12 NC_MOD_ESB_RSV_11 NC_MOD_ESB_RSV_10 NC_MOD_ESB_RSV_9 MOD_ESB_AF19_PD NC_MOD_ESB_RSV_7 NC_MOD_ESB_RSV_6 NC_MOD_ESB_RSV_5 NC_MOD_ESB_RSV_4 NC_MOD_ESB_RSV_3 NC_MOD_ESB_RSV_2

NC_MOD_ESB_RSV_0

MOD_ESB_STRAP_7

55

MOD_ESB_STRAP_3

55

MOD_ESB_STRAP_0

55

R4977

0-5%

1 2

+5V_AUX

MOD_ESB_STRAP_6

55

MOD_ESB_STRAP_1

55

+3.3V_AUX

+3.3V

R5018

R4513

1 2

.499-1%

R4514

.499-1%

R4515

1 2

.499-1%

R4904

10K-5%

1 2

4.7K-5%

1 2

21

R4984

X

1 2

R4983

1 2

R4978

1 2

R5446

1 2

4.7K-5%

NP

4.7K-5%

+1.5V_AUX_ESB2

0-5%

L1767

1 2

4.7uH 80mA

R5445

1 2

0-5%

L1768

1 2

4.7uH 80mA

0-5%

L1769

4.7uH 80mA

R5447

1 2

0-5%

+3.3V_AUX_ESB2

R4987

10K-5%

1 2

21

R5004

X

1K-5%

NP

C2822

C2824

55

1 2

22uF 6.3V

C2823

1 2

22uF 6.3V

1 2

22uF 6.3V

P19_DT9236_jp

MOD_ESB_VREF_PCI

54,56,57,67,127

54-57,61,67

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

MOD_ESB_SATA_VCCBG

( ~ 10mA)

.1uF

1 2

C2825

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

MOD_ESB_AU_VCCBG

1 2

C2826

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

MOD_ESB_ESI_VCCBGEXP

1 2

C2827

MOD_ESB_ESI_VSSBGEXP

MODULE: DESC: REV: OF

16V-10%

MOD_ESB_SATA_VSSBG

( ~ 10mA)

.1uF

16V-10%

MOD_ESB_AU_VSSBG

( ~ 10mA)

.1uF

16V-10%

+1.5V_ESB2

C142

1 2

R726

.1uF

R727

16V-10%

1 2

49.9-1%49.9-1%

49,55-57,110

SEC

1

55

2

55

3

ESB

TEST

4

INTEL ENTERPRISE SOUTH BRIDGE 2

HETERO 7 OF 10

ECAD Note: Place caps next to pins Connect with short thick traces

< 1mA input current

MOD_ESB_VREF

55

C1345

1 2

1uF 6.3V

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

C3142

1 2

1uF 6.3V

INC.

ROUND ROCK,TEXAS

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

HX601

DATE

SHEET

9/7/2007 55 OF 136

REV.

4

A00

A B C

D

1

2

3

4

ROOM = ESB2

POWER AND GROUND

+1.5V_ESB2

49,55-57,110

N14

VCC_N14

N16

VCC_N16

N18

VCC_N18

N20

VCC_N20

N22

VCC_N22

P13

VCC_P13

P15

VCC_P15

P17

VCC_P17

P19

VCC_P19

P21

VCC_P21

P23

VCC_P23

R14

VCC_R14

R16

VCC_R16

R18

VCC_R18

R20

VCC_R20

R22

VCC_R22

T13

VCC_T13

T15

VCC_T15

T17

VCC_T17

T19

VCC_T19

T21

VCC_T21

T23

VCC_T23

U14

VCC_U14

U16

VCC_U16

U18

VCC_U18

U20

VCC_U20

U22

VCC_U22

V13

VCC_V13

V15

VCC_V15

V17

VCC_V17

V19

VCC_V19

V21

VCC_V21

V23

VCC_V23

W14

VCC_W14

W16

VCC_W16

W18

VCC_W18

W20

VCC_W20

W22

VCC_W22

Y13

VCC_Y13

Y15

VCC_Y15

Y17

VCC_Y17

Y19

VCC_Y19

AA14

VCC_AA14

AA16

VCC_AA16

AA18

VCC_AA18

AA20

VCC_AA20

AB13

VCC_AB13

AB15

VCC_AB15

AB17

VCC_AB17

AB19

VCC_AB19

AC14

VCC_AC14

AC16

VCC_AC16

AC18

VCC_AC18

AC20

VCC_AC20

AD13

VCC_AD13

AD15

VCC_AD15

AD17

VCC_AD17

AD19

VCC_AD19

INTEL ENTERPRISE SOUTH BRIDGE 2

+3.3V

NP

R5122

NP

X

C147

21

10uF 6.3V

NP

C148

X

NP

NP*

.1uF

1 2

C802

1 2

X

16V-10%

2200pf

TL431ACD

50V-10%

X

7

220-5%

1 2

(2.5V) (0.6mA)

1

D26

8

2

3

6

U_ESB2

POWER

HETERO 8 OF 10

R5134

NP

1 2

.499-1%

VCC15_AB10 VCC15_AB11 VCC15_AB12

VCC15_AB7

VCC15_AC12

VCC15_AC6 VCC15_AD11 VCC15_AD12 VCC15_AE12 VCC15_AG12

VCC33_AE15 VCC33_AE17 VCC33_AE18 VCC33_AF17 VCC33_AG17 VCC33_AH13 VCC33_AK11 VCC33_AK17 VCC33_AM12 VCC33_AM15

VCC33_AM9 VCC33_AP10 VCC33_AP13 VCC33_AP16 VCC33_AT11 VCC33_AT14 VCC33_AT17

VCCARX_A16 VCCARX_B18 VCCARX_D16 VCCARX_F15 VCCARX_K16 VCCARX_M16

VCCATX_F17 VCCATX_F20 VCCATX_G19 VCCATX_H18 VCCATX_L18 VCCATX_M18

VCCAUX1_5_Y21

VCCAUX1_5_Y23 VCCAUX1_5_AA22 VCCAUX1_5_AB21 VCCAUX1_5_AB23 VCCAUX1_5_AC22 VCCAUX1_5_AD21 VCCAUX1_5_AD23

VCCSE_W24 VCCSE_W26 VCCSE_Y24 VCCSE_Y25 VCCSE_Y27 VCCSE_Y30 VCCSE_Y33

X

4.7uH 30mA

AB10 AB11 AB12 AB7 AC12 AC6 AD11 AD12 AE12 AG12

AE15 AE17 AE18 AF17 AG17 AH13 AK11 AK17 AM12 AM15 AM9 AP10 AP13 AP16 AT11 AT14 AT17

A16 B18 D16 F15 K16 M16

F17 F20 G19 H18 L18 M18

Y21 Y23 AA22 AB21 AB23 AC22 AD21 AD23

W24 W26 Y24 Y25 Y27 Y30 Y33

R5135

.499-1%

L1810

R5449

1 2

0-5%

U_ESB2

POWER

A3

VSS_A3

A7

VSS_A7

A10

VSS_A10

A19

VSS_A19

A22

VSS_A22

A25

+1.5V_ESB2

49,55-57,110

+3.3V

+1.5V_ESB2

49,55-57,110

+1.5V_AUX_ESB2

21

P2V5_VREF

28

54-57,67,127

outputs 2.5V

21

C2153

1 2

22uF 6.3V

MOD_ESB_PE_VCCBGEXP

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

.1uF

1 2

C2154

16V-10%

MOD_ESB_PE_VSSBGEXP

55

ESI BG

55

VSS_A25

A28

VSS_A28

A31

VSS_A31

A34

VSS_A34

B2

VSS_B2

B6

VSS_B6

B9

VSS_B9

B12

VSS_B12

B15

VSS_B15

B21

VSS_B21

B27

VSS_B27

B30

VSS_B30

B33

VSS_B33

B35

VSS_B35

C1

VSS_C1

C2

VSS_C2

C8

VSS_C8

C11

VSS_C11

C17

VSS_C17

C20

VSS_C20

C26

VSS_C26

C29

VSS_C29

C32

VSS_C32

C35

VSS_C35

C36

VSS_C36

D4

VSS_D4

D7

VSS_D7

D10

VSS_D10

D13

VSS_D13

D19

VSS_D19

D22

VSS_D22

D25

VSS_D25

D28

VSS_D28

D31

VSS_D31

E3

VSS_E3

E9

VSS_E9

E15

VSS_E15

E18

VSS_E18

E21

VSS_E21

E24

VSS_E24

E27

VSS_E27

E30

VSS_E30

E33

VSS_E33

E36

VSS_E36

F2

VSS_F2

F5

VSS_F5

F8

VSS_F8

F11

VSS_F11

F14

VSS_F14

F23

VSS_F23

F26

VSS_F26

F29

VSS_F29

G1

VSS_G1

G10

VSS_G10

G13

VSS_G13

G16

VSS_G16

G22

VSS_G22

G25

VSS_G25

G28

VSS_G28

G31

VSS_G31

G34

VSS_G34

H3

VSS_H3

H6

VSS_H6

H9

VSS_H9

H12

VSS_H12

H21

VSS_H21

H24

VSS_H24

H27

VSS_H27

H33

VSS_H33

H36

VSS_H36

J2

VSS_J2

J5

VSS_J5

J11

VSS_J11

J14

VSS_J14

J17

VSS_J17

J20

VSS_J20

J23

VSS_J23

J26

VSS_J26

J29

VSS_J29

J32

VSS_J32

J35

VSS_J35

K1

VSS_K1

K4

VSS_K4

K7

VSS_K7

K10

VSS_K10

K19

VSS_K19

K34

VSS_K34

INTEL ENTERPRISE SOUTH BRIDGE 2

HETERO 9 OF 10

VSS_L3 VSS_L6

VSS_L9 VSS_L12 VSS_L15 VSS_L21 VSS_L23 VSS_L24 VSS_L27 VSS_L30 VSS_L36

VSS_M5

VSS_M8 VSS_M14 VSS_M17 VSS_M19 VSS_M20 VSS_M22 VSS_M26 VSS_M32

VSS_N1 VSS_N10 VSS_N13 VSS_N15 VSS_N17 VSS_N19 VSS_N21 VSS_N23 VSS_N25 VSS_N28 VSS_N34

VSS_P3

VSS_P6 VSS_P14 VSS_P16 VSS_P18 VSS_P20 VSS_P22 VSS_P30

VSS_R8 VSS_R11 VSS_R12 VSS_R13 VSS_R15 VSS_R17 VSS_R19 VSS_R21 VSS_R23 VSS_R24 VSS_R26 VSS_R32 VSS_R35

VSS_T1

VSS_T4 VSS_T10 VSS_T14 VSS_T16 VSS_T18 VSS_T20 VSS_T22 VSS_T25 VSS_T28 VSS_T31 VSS_T34

VSS_U6

VSS_U9 VSS_U13 VSS_U15 VSS_U17 VSS_U19 VSS_U21 VSS_U23 VSS_U24 VSS_U27 VSS_U30 VSS_U33 VSS_U36

VSS_V2

VSS_V8 VSS_V12 VSS_V14 VSS_V16 VSS_V18 VSS_V20 VSS_V22 VSS_V24 VSS_V26 VSS_V29 VSS_V32 VSS_V35

L3 L6 L9 L12 L15 L21 L23 L24 L27 L30 L36 M5 M8 M14 M17 M19 M20 M22 M26 M32 N1 N10 N13 N15 N17 N19 N21 N23 N25 N28 N34 P3 P6 P14 P16 P18 P20 P22 P30 R8 R11 R12 R13 R15 R17 R19 R21 R23 R24 R26 R32 R35 T1 T4 T10 T14 T16 T18 T20 T22 T25 T28 T31 T34 U6 U9 U13 U15 U17 U19 U21 U23 U24 U27 U30 U33 U36 V2 V8 V12 V14 V16 V18 V20 V22 V24 V26 V29 V32 V35

W1

W4 W10 W13 W15 W17 W19 W21 W23 W25 W28 W31 W34

Y6 Y14 Y16 Y18 Y20 Y22 Y36 AA2 AA5 AA8

AA11 AA13 AA15 AA17 AA19 AA21 AA23 AA24 AA26 AA29 AA32

AB1 AB4

AB14 AB16 AB18 AB20 AB22 AB28 AB34

AC3 AC9

AC13 AC15 AC17 AC19 AC21 AC23 AC24 AC27 AC30 AC36

AD2 AD5 AD8

AD14 AD16 AD18 AD20 AD22 AD24 AD26 AD32

AE1 AE4 AE7

AE10 AE14 AE16 AE19 AE20 AE21 AE22 AE25 AE28 AE31 AE34

AF3 AF6 AF9

AF12 AF13 AF15 AF24 AF30 AF33 AF36

AG2 AG5

VSS_W1 VSS_W4 VSS_W10 VSS_W13 VSS_W15 VSS_W17 VSS_W19 VSS_W21 VSS_W23 VSS_W25 VSS_W28 VSS_W31 VSS_W34 VSS_Y6 VSS_Y14 VSS_Y16 VSS_Y18 VSS_Y20 VSS_Y22 VSS_Y36 VSS_AA2 VSS_AA5 VSS_AA8 VSS_AA11 VSS_AA13 VSS_AA15 VSS_AA17 VSS_AA19 VSS_AA21 VSS_AA23 VSS_AA24 VSS_AA26 VSS_AA29 VSS_AA32 VSS_AB1 VSS_AB4 VSS_AB14 VSS_AB16 VSS_AB18 VSS_AB20 VSS_AB22 VSS_AB28 VSS_AB34 VSS_AC3 VSS_AC9 VSS_AC13 VSS_AC15 VSS_AC17 VSS_AC19 VSS_AC21 VSS_AC23 VSS_AC24 VSS_AC27 VSS_AC30 VSS_AC36 VSS_AD2 VSS_AD5 VSS_AD8 VSS_AD14 VSS_AD16 VSS_AD18 VSS_AD20 VSS_AD22 VSS_AD24 VSS_AD26 VSS_AD32 VSS_AE1 VSS_AE4 VSS_AE7 VSS_AE10 VSS_AE14 VSS_AE16 VSS_AE19 VSS_AE20 VSS_AE21 VSS_AE22 VSS_AE25 VSS_AE28 VSS_AE31 VSS_AE34 VSS_AF3 VSS_AF6 VSS_AF9 VSS_AF12 VSS_AF13 VSS_AF15 VSS_AF24 VSS_AF30 VSS_AF33 VSS_AF36 VSS_AG2 VSS_AG5

INTEL ENTERPRISE SOUTH BRIDGE 2

U_ESB2

POWER

HETERO 10 OF 10

VSS_AG8 VSS_AG11 VSS_AG14 VSS_AG20 VSS_AG23 VSS_AG26 VSS_AG32 VSS_AG35

VSS_AH4

VSS_AH7 VSS_AH10 VSS_AH16 VSS_AH19 VSS_AH22 VSS_AH28 VSS_AH34

VSS_AJ3

VSS_AJ6

VSS_AJ9 VSS_AJ12 VSS_AJ15 VSS_AJ18 VSS_AJ21 VSS_AJ24 VSS_AJ30 VSS_AJ33 VSS_AJ36

VSS_AK2

VSS_AK5

VSS_AK8 VSS_AK14 VSS_AK20 VSS_AK23 VSS_AK26 VSS_AK35

VSS_AL1

VSS_AL4

VSS_AL7 VSS_AL10 VSS_AL13 VSS_AL16 VSS_AL19 VSS_AL22 VSS_AL25 VSS_AL28 VSS_AL31 VSS_AL34

VSS_AM6 VSS_AM18 VSS_AM21 VSS_AM24 VSS_AM27 VSS_AM36

VSS_AN2

VSS_AN5

VSS_AN8 VSS_AN11 VSS_AN14 VSS_AN17 VSS_AN20 VSS_AN23 VSS_AN26 VSS_AN29 VSS_AN32

VSS_AP1

VSS_AP4

VSS_AP7 VSS_AP19 VSS_AP22 VSS_AP25 VSS_AP28 VSS_AP34 VSS_AP36

VSS_AR2

VSS_AR3

VSS_AR6

VSS_AR9 VSS_AR12 VSS_AR15 VSS_AR18 VSS_AR21 VSS_AR24 VSS_AR27 VSS_AR30 VSS_AR35

VSS_AT3

VSS_AT5

VSS_AT8 VSS_AT20 VSS_AT23 VSS_AT26 VSS_AT32 VSS_AT34

AG8 AG11 AG14 AG20 AG23 AG26 AG32 AG35 AH4 AH7 AH10 AH16 AH19 AH22 AH28 AH34 AJ3 AJ6 AJ9 AJ12 AJ15 AJ18 AJ21 AJ24 AJ30 AJ33 AJ36 AK2 AK5 AK8 AK14 AK20 AK23 AK26 AK35 AL1 AL4 AL7 AL10 AL13 AL16 AL19 AL22 AL25 AL28 AL31 AL34 AM6 AM18 AM21 AM24 AM27 AM36 AN2 AN5 AN8 AN11 AN14 AN17 AN20 AN23 AN26 AN29 AN32 AP1 AP4 AP7 AP19 AP22 AP25 AP28 AP34 AP36 AR2 AR3 AR6 AR9 AR12 AR15 AR18 AR21 AR24 AR27 AR30 AR35 AT3 AT5 AT8 AT20 AT23 AT26 AT32 AT34

ECAD: In all cases, route VCCBG and VSSBG as diff pair

+3.3V_AUX_ESB2

R117

21

.499-1%

+1.5V_ESB2

49,55-57,110

R113

1 2

.499-1%

+1.5V_ESB2

49,55-57,110

R114

21

.499-1%

+1.5V_AUX_ESB2

R116

1 2

.499-1%

+1.5V_ESB2

49,55-57,110

R115

1 2

.499-1%

54,55,57,61,67

L43

1 2

4.7uH 80mA

R5448

1 2

0-5%

L39

1 2

4.7uH 80mA

L40

1 2

4.7uH 80mA

54-57,67,127

L42

1 2

4.7uH 80mA

L41

1 2

4.7uH 80mA

C45

1 2

22uF 6.3V

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

C153

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

C41

C42

C44

C43

1 2

TITLE

C149

22uF 6.3V

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

22uF 6.3V

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

22uF 6.3V

SCHEM, PLN, SV, PE2950, MLK

MOD_ESB_VCCA3_3

GOES TO PIN V30 VCCA3_3

( ~ 10mA)

.1uF

1 2

C150

C152

C151

16V-10%

MOD_ESB_VSSA3_3

GOES TO PIN V31 VCCA3_3

MOD_ESB_VCCAESI

GOES TO PIN M9 VCCAESI

( ~ 10mA)

.1uF

16V-10%

MOD_ESB_VCCA_PLL

GOES TO PIN G26 VCCAPLL

.1uF

1 2

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

1 2

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

1 2

16V-10%

MOD_ESB_VCCAPLL1_5

GOES TO PIN V33 VCCAPLL1_5

.1uF

16V-10%

( ~ 30mA)

MOD_ESB_VSSAPLL1_5

MOD_ESB_VCCAUPLL

GOES TO PIN F9 VCCAUPLL

.1uF

16V-10%

( ~ 30mA)

MODULE: DESC: REV: OF

SERDES BG

ESI PLL

SATA PLL =~ 30mA

SERDES PLL

USB PLL

INC.

ROUND ROCK,TEXAS

55

1

55

2

55

3

55

ESB

SEC

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

REV.

HX601

SHEET

A00

9/7/2007 56 OF 136

DCBA

A B C

D

1

ROOM = ESB2

+3.3V_AUX_ESB2

+5V_AUX

.1uF

1 2

C2828

.1uF

16V-10%

C2883

16V-10%

1 2

C2884

.1uF

C2885

16V-10%

ESB_BMC Place holder

.1uF

1 2

C2886

16V-10%

54-57,61,67

.1uF

1 2

C2887

16V-10%

.1uF

16V-10%

55,57,67

C3362

1 2

+1.5V_SUS_ESB2

22uF 6.3V

C3370

1 2

C3371

1uF 6.3V

ESB_SUS

1 2

C3394

1uF 6.3V

1 2

1uF 6.3V

+CPU_VTT

1 2

C2880

.1uF

C2881

16V-10%

ESB_VTT

+1.5V_ESB2

49,55-57,110

PROPAGATION_DELAY=L:S::1200

R118

+3.3V_AUX

.499-1%

.1uF

1 2

.1uF

1 2

C2882

16V-10%

.1uF

1 2

16V-10%

C2879

C2878

16V-10%

ESB_USBIO

.1uF

1 2

C2877

16V-10%

.1uF

1 2

16V-10%

+1.5V_ESB2

1 2

.499-1%

21

49,55-57,110

R120

1 2

L44

4.7uH 80mA

L46

1 2

4.7uH 80mA

C46

1 2

22uF 6.3V

NET_PHYSICAL_TYPE=25MIL

MOD_ESB_VCCA_EXP

GOES TO PIN V7 VCCAPE

C180

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

.1uF

1 2

16V-10%

( ~ 30mA)

MOD_ESB_VSSA_EXP

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

MOD_ESB_VCCA_PCI1

GOES TO PIN AE11 VCCAP1

DMA PLL

55

1

55

2

C2294

1 2

+1.5V_AUX_ESB2

C2293

1 2

1uF 6.3V

+1.5V_AUX_ESB2

1uF 6.3V

ESB_HK

C2292

1 2

C2291

1uF 6.3V

1 2

C2290

1uF 6.3V

1 2

54-57,67,127

1uF 6.3V

+3.3V

C2279

1 2

C2278

1uF 6.3V

+1.5V_ESB2

1 2

C2277

1uF 6.3V

ESB_PCI_HK

49,55-57,110

.1uF

16V-10%

1 2

C2276

.1uF

16V-10%

1 2

C2275

.1uF

16V-10%

D1057

2 1

MBRS130LT3

+3.3V

C2284

1 2

C2283

1uF 6.3V

1 2

+3.3V

21

C2282

1uF 6.3V

ESB_PCIX3V

C2281

1uF 6.3V

1 2

21

C2280

1uF 6.3V

C3363

1uF 6.3V

1 2

C3364

1 2

22uF 6.3V

+1.5V_ESB2

49,55-57,110

R119

.499-1%

C48

1 2

L45

21

1 2

4.7uH 80mA

C47

1 2

C179

PROPAGATION_DELAY=L:S::1200 NET_PHYSICAL_TYPE=25MIL

C178

22uF 6.3V 22uF 6.3V

.1uF

1 2

16V-10%

( ~ 30mA)

MOD_ESB_VCCA_PCI3

GOES TO PIN AD10 VCCAP3

.1uF

16V-10%

LBW PLL

55

2

PCI-X PLL

3

C2837

1 2

C2859

1 2

1uF 6.3V

+1.5V_ESB2

C2836

1uF 6.3V

1 2

C2858

1 2

1uF 6.3V

49,55-57,110

C2835

1uF 6.3V

1 2

C2857

1 2

1uF 6.3V

ESB_GOSHEN

C2838

1uF 6.3V

1 2

C2856

1 2

1uF 6.3V

C2834

1uF 6.3V

1 2

C2855

1 2

1uF 6.3V

1 2

C2841

1uF 6.3V

C2860

1 2

.1uF

C2840

16V-10%

ESB_CORE

C3365

1uF 6.3V

1 2

.1uF

16V-10%

22uF 6.3V

C2842

1 2

C2274

1 2

C2839

1uF 6.3V

1 2

C2273

1uF 6.3V

1 2

C2845

1 2

C2272

1uF 6.3V

1 2

ESB_SATA_TX

C2844

1 2

C2271

1uF 6.3V

1 2

C2846

1 2

C2270

1uF 6.3V

1 2

C2843

1 2

C3366

1uF 6.3V

1 2

C2854

1 2

22uF 6.3V

C2853

1uF 6.3V

1 2

C3367

1uF 6.3V

1 2

C2289

22uF 6.3V

C2299

1 2

+1.5V_ESB2

1 2

1uF 6.3V

C2298

1 2

1uF 6.3V

C2288

C2297

1uF 6.3V

ESB_IDE

49,55-57,110

C2287

1 2

ESB_PCIX

1 2

1uF 6.3V

C2286

1uF 6.3V

1 2

C2296

1 2

1uF 6.3V

C2295

1 2

1uF 6.3V

C2285

1uF 6.3V

(0.27A)

54-57,61,67

NET_PHYSICAL_TYPE=PWR

+3.3V_AUX_ESB2

+3.3V_AUX

NP

R5401

X

0-5%

1 2

R5403

1 2

0-5%

+3.3V

(140mA)

55,57,67

NET_PHYSICAL_TYPE=PWR

+1.5V_SUS_ESB2

54-57,67,127

CHECK NET NAMES

(1.97A)

+1.5V_AUX_ESB2

NET_PHYSICAL_TYPE=PWR

NP

R5523

X

1 2

R5402

1 2

X

0-5%

NP

0-5%

R5395

X

1 2

( ~ 30mA)

+1.5V_AUX

NP

0-5%

R5394

X

1 2

0-5%

R5396

1 2

0-5%

R5393

1 2

+1.5V_ESB2

49,55-57,110

(5.8A)

3

53,55,62,66,67,69,123

12

C_ESB_1

.1uF

16V-10%

VBAT

12

.1uF

C_ESB_2

16V-10%

C2304

1 2

+1.5V_ESB2

C2303

1uF 6.3V

1 2

+1.5V_ESB2

49,55-57,110

C2302

1 2

1uF 6.3V

ESB_USB2

C2301

1uF 6.3V

1 2

49,55-57,110

C2300

1uF 6.3V

1 2

1uF 6.3V

C2269

1 2

+1.5V_ESB2

C2268

1uF 6.3V

1 2

49,55-57,110

C2267

1uF 6.3V

1 2

ESB_SATA_RX

C2266

1uF 6.3V

1 2

C2265

1 2

1uF 6.3V

C3368

1uF 6.3V

1 2

22uF 6.3V

+3.3V_AUX_ESB2 will default to core well

**All current numbers mentioned are MAX

ECAD: In all cases, route VCCBG and VSSBG as diff pair

+1.5V_AUX_ESB2 will default to core well +1.5V_SUS_ESB2 will be internally regulated

**All current numbers mentioned are MAX

MODULE: DESC: REV: OF

0-5%

R5522

1 2

0-5%

ESB

SEC

4

ECAD: Place Caps close to Pin C27

C2260

1 2

C2261

1uF 6.3V

1 2

C2263

1uF 6.3V

1 2

C2262

1uF 6.3V

1 2

C3372

1uF 6.3V

1 2

C3373

1uF 6.3V

ESB_PE

1 2

C3374

1uF 6.3V

1 2

C3369

1uF 6.3V

1 2

22uF 6.3V

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 57 OF 136

DCBA

4

A B C

USB 2.0 Connection

D

1

+5V

MLK: L1 moved before the TPS Switch

L1

1 2

FERRITE

1812-3.0A

220uF-10V

+

MLK: C8601, C3641 & C 3214 changed to DPN: DN812 having 10V rating instead of 6.3V

220uF-10V

1 2

C3641

+

1 2

C8601

21

C3589

.1uF

16V-10%

FS5

1 2

1.5A 6V

21

R5936

1K-5%

NP

1 2

1

GND

2

IN

3

EN_1

4

EN_2

FS2

X

1.5A 6V

U1138

TPS2062DGN

MLK: PTC added as an alternative because of TPS Approval Issue

EPAD

OC_1 OUT_1 OUT_2

OC_2

9 8 7 6 5

NP

R7001

X

1 2

NP

4.7K-5%8.2K-5%

MOD_ESB_V_5_USB_BACK23_N

ROOM=USB_BACK1

MOD_ESB_V_5_USB_BACK23_N

GOES TO ESB OC2/3 W/ FILTERING CAPS

USB AND BUTTONS

1

54,58

2

21

C185

.1uF

10V-10%

220uF-10V

1 2

C3214

+

SILKSCREEN=USB2

J_USB1

USB

J_USB2

USB

R7002

P18_DT9101_jp P19_DT9222_rt_swap_symbol

SILKSCREEN=USB1

1 2 3 4

MOD_ESB_USB_P2_N_L MOD_ESB_USB_P2_P_L

<500 mils

length matched +/-10 mils

MOD_ESB_USB_P3_N_L MOD_ESB_USB_P3_P_L

NP

D1088

X

1 2

NP

21

D1089

X

1 2

ESD SUPPRESSOR

NP

D1090

X

1 2

ESD SUPPRESSOR

1 2

NP

21

D1091

X

1 2

ESD SUPPRESSOR

1 2

NP

ESD SUPPRESSOR

1 2

470pF

50V-10%

X

C3351

21

C1000

.1uF

10V-10%

2 1

3

DLW21SN900SQ2

2 1

3

DLW21SN900SQ2

L22

3

CM CHOKE

L21

3

CM CHOKE

SUB*_8M262

12

4

SUB*_8M262

12

4

X

1 2

MOD_ESB_USB_P2_N

4

MOD_ESB_USB_P2_P

length matched +/-10 mils

MOD_ESB_USB_P3_N

MOD_ESB_USB_P3_P

length matched +/-10 mils

54

+5V

MLK: L2 moved before the TPS Switch

MLK: Internal USB Connector (3 Stack) Added with TPS2062

NP

1 2

FS1

MLK: INTERNAL USB on PLANAR for

BERLIN ONLY

2

Choke is subbed with 0 ohm resistor EMI has approved this

3

4

70

67,70

BTN_NMI_N

BTN_PWR_ON_N

NP

1

2

SW_PWR

PUSH BUTTON

+3.3V_AUX

3

4

X

12

R5141

12

R5142

8.2K-5%

R5164

1 2

1K-1%

8.2K-5%

R5163

1 2

1K-1%

RC=0.92ms

21

C3211

.1uF

10V-10%

RC=0.92ms

21

C3212

.1uF

Chokes are subbed with 0 ohm resistors EMI has approved this

R5126

1 2

100-1%

R5125

1 2

100-1%

R5123

1 2

100-1%

R5124

1 2

100-1%

10V-10%

GPE_NMI_N

BMC_NMIBTN_N

ESB_PWRBTN_N

BMC_PWRBTN_N

Switch BMC Vesb

1 1 1 0 0 0 Z

GOES TO ESB

66

86

GOES TO BMC (Schmitt Input) 1 = NMIBTN Disable 0 = NMIBTN Toggle Z = NMIBTN Normal Mode

BMCSwitch 1 1 1 0 0

GOES TO SYSTEM CPLD AND ESB

54,95,128

86

GOES TO BMC (Schmitt Input) 1 = PWRBTN Disable 0 = PWRBTN Toggle Z = PWRBTN Normal Mode

Vesb 1 3.3V 0

44-56mV Z

3.3V

1

3.0V

0

8-20mV Z0

100-225mV

3.3V1 44-56mV

0

3.3V

Z

3.0V

1

8-20mV

0

100-225mV

L2

C12

POP8

R5589

FERRITE

1 2

POP8

1 2

1812-1.5A

1 2

POP8

1.5A

.1uF

16V-10%

NP

100-1%

FS7

6V

R19

1 2

POP8

1

2

PUSH BUTTON

X

1.5A 6V

U1144

1

GND

2

IN

3

EN_1

4

EN_2

TPS2062DGN

POP8

1K-5%

MOD_ESB_V_5_USB_BACK67_N

54,58,70

SW_RST

3

4

X

EPAD

OC_1 OUT_1 OUT_2

OC_2

+3.3V_AUX

12

R437

8.2K-5%

9 8 7 6 5

MLK: C9 changed to DPN: DN812 having 10V rating instead of 6.3V

NP

R7005

X

NP

R7006

X

1 2

4.7K-5%8.2K-5%

ROOM=USB_INT

GOES TO SYSTEM CPLD AND ESB

RESET_BTN_N

MLK: OC signal combined to the OC signal coming from Sideplane (London)

MOD_ESB_V_5_USB_BACK67_N

C1

1 2

POP8

21,30,54,95,128

220uF-10V

1 2

+

.1uF

16V-10%

C9

POP8

MOD_ESB_USB_P7_N

54

MOD_ESB_USB_P7_P

54

M2LB_Change_Note: Changed USB connector. Removed unused USB Ports. Removed NMI switch because of lack of space on planar. Changed USB ferrite bead, L1. Changed USB bulk capacitors.

54,58,70

DLW21SN900SQ2

4

1

SUB1=SUB*_8M262

POP8

ROOM=SW

NC_USB_A1 NC_USB_A2 NC_USB_A3

NC_USB_B1 NC_USB_B2 NC_USB_B3

CM CHOKE

4

1 2

L6

TITLE

SILKSCREEN=INTERNAL USB

J_USB_INT

A1

A2

A3

A4

B1

B2

B3

B4

C1

3

MOD_ESB_USB_P7_N_L

3

MOD_ESB_USB_P7_P_L

NP

2

D1

X

1 2

MODULE: DESC: REV: OF

NP

D2

X

1 2

ESD SUPPRESSOR

1 2

ESD SUPPRESSOR

ESB

C1

C2

C3

C4

MH1

MH2

MH3

MH4

MH5

CONN12, RTF

USB, 3STK,SH

SUB=POP8 SUB1=SUB8*_YW739

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

USB-AUSB-BUSB-CSHIELD

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

HX601

DCBA

REV.

A00

SHEET

58 OF 1369/7/2007

A B C

D

1

2

53,70

ROOM = CD_CONN

MOD_ESB_PDIORDY

+3.3V

21

R4753

1K-5%

SUB1=SUB7_J5741

SUB=SUB8_N5300

66

ROOM = ESB2

IDE_P66_DET_N

66

59,66

66

66 52 66 66 66

66

59,66

66

59,66

FLP_HDSEL_N

FLP_RDATA_N

FLP_WP_N

FLP_TRK0_N

FLP_WGATE_N

FLP_WDATA_N

FLOPPY_PRES_N

FLP_STEP_N FLP_DENSEL

FLP_DIR_N

FLP_MTR0_N

NC_FLP_PIN18 NC_FLP_PIN19 NC_FLP_PIN20

FLP_DSKCHG_N

FLP_DR0_N

FLP_INDEX_N

+5V

J_FLOPPY

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

ROOM = FLOPPY

+5V

1

8

2

RN75

7

1

3

45

1K

R1880

6

1K-1%

1 2

FLP_INDEX_N

59,66

2

FLP_TRK0_N

FLP_WP_N

FLP_RDATA_N

FLP_DSKCHG_N

59,66 59,66 59,66

59,66

3

+3.3V

R5144

1 2

10K-5%

ZIF SMT RA

MOLEX/AMP

BOTTOM CONTACT

SILKSCREEN=FLOPPY

PHYSICAL DIFFERENCE

SUB=POP7

REQUIRES COMBO FOOTPRINT

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

M2LB_Change_Note: Removed IDE connector. Changed floppy connector.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

ESB

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 59 OF 136

4

DCBA

A B C

D

1

2

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

M2LB_Change_Note: Removed LAI connectors. If there is enough room, one or both can be added back.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

ESB

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 60 OF 136

DCBA

4

A B C

D

1

ROOM = SATA Connector

54 52 53 53 53 53 54 54 54

MOD_ESB_BOARD_REWORK_9 MOD_ESB_BOARD_REWORK_8 MOD_ESB_BOARD_REWORK_7 MOD_ESB_BOARD_REWORK_6 MOD_ESB_BOARD_REWORK_5 MOD_ESB_BOARD_REWORK_4 MOD_ESB_BOARD_REWORK_3 MOD_ESB_BOARD_REWORK_2 MOD_ESB_BOARD_REWORK_1

ESB Resistor Strappings

+3.3V +3.3V_AUX

5

6

7

8

RN111

2

1

5

6

8.2K

4

3

8

RN112

2

1

8.2K

4

3

R4896

1 2

8.2K-5%

53 53 53 53

MOD_ESB_SMBCLK0_PU MOD_ESB_SMBCLK1_PU MOD_ESB_SMBD0_PU MOD_ESB_SMBD1_PU

+3.3V_AUX

NP

R5906

X

1 2

NP

R5907

X

8.2K-5%

1 2

NP

R5909

X

8.2K-5%

1 2

NP

R5908

X

8.2K-5%

1 2

8.2K-5%

Disabling Hot Plug

21

R614

1K-5%

21

R616

1K-5%

21

R617

+3.3V

21

R4994

1K-5%

MOD_ESB_HPX_SLOT_3 MOD_ESB_HPX_SLOT_2 MOD_ESB_HPX_SLOT_1 MOD_ESB_HPX_SLOT_0

1K-5%

1

51 51 51 51

2

+3.3V

21

R5093

21

1K-5%

R5092

1K-5%

R5048

Downstream PCIe Link

ACZ_SDOUT MODEACZ_SYNC

11

1

0

12

R5049

220-5%

1 x 4

RFU

RFU0 1

4 x 1s0 0

12

R5050

220-5%

12

R5052

220-5%

12

R5051

220-5%

12

R5053

220-5%

12

R5055

220-5%

12

R5054

220-5%

12

R5056

220-5%

ECAD Note: Place these on top side of planar Place in same order as seen here.

These can be routed to Riser cards if desired

MOD_ESB_STRAP_2

55

PU R may be NP.

21

R5174

X

1K-5%

NP

1K-5%

2 1

R5005

+3.3V_AUX_ESB2

54-57,67

+3.3V

R790

1 2

2

4.7K-5%

3

MOD_ESB_ACZ_SDOUT MOD_ESB_ACZ_SYN

53

53,71,73

53 53

MOD_ESB_USB_CABLE_PRES_N MOD_ESB_RISER_1_REV

Strap_2 PU: Expecting 25MHz

on SER_CLK_IN

+3.3V

R5059

1 2

R5060

20K-5%

1 2

20K-5%

MOD_ESB_PXM133EN

51

+3.3V

R4982

1 2

MOD_ESB_SPECFG

21

X

R4969

1K-5%

PU - 2x4

PE1 and PE2 are 2x4, respectively

PD - 1x8

PE1 and PE2 are combined and become 1x8

51

3

BACKPLANE ID

- Not used on Triathlon

RISER REV - Pulled up on Montreal

- Route to riser connector on other platforms

Things to check from BMC/CPLD module

- BMC_SMI_N pulled up by BMC module

- ESB_THERMTRIP_N driven by CPLD

- ESB_PWR_ON_REQ sent to CPLD to turn on system

- INTRUDED_COVER driven by BMC to reset intrusion status

- SYSTEM_PWRGOOD_FETS driven by CPLD

NP

+3.3V

X

R4005

NP

R4004

PU - 2x4 PD - 1x8

4.7K-5%

1 2

MOD_ESB_NPECFG

21

1K-5% 4.7K-5%

51

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

MODULE: DESC: REV: OF

SEC

ESB

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 61 OF 136

DCBA

4

A B C

Chassis Intrusion Detect

D

+3.3V_AUX

1

53,55,57,66,67,69,123

62,69

86

VBAT

VFPCP

2N7002

INTRUDED_COVER

To reset intrusion detect, drive Low value. During all other times, signal shall be tri-state by uC.

70

INTRUSION_COVER_N

Open (1)

Shorted (0) = Intruded

ROOM=INTRUS

BAR43

D1049

1

31

R1770

1 2

U73

4

VHC14

1K-1%

R1769

1K-1%

50V-10%

BAR43

1000pF

31

Q102

1 2

C1781

D67

14

U73

9

D 3

8

1

VFPCP

G

S 2

62,69

INTRUSION_COVER_VAUX_N

2N7002

G

1

5

1 2

R1882

14

U73

6

VHC14 VHC14

14

3

Q101

S 2

D 3

R1801

1 2

33-5%

270K-5%

R1863

21

50V-10%

1000pF

1 2

R1771

1 2

1K-1%

16V-10%

C1779

1000pF

14

1

VHC14

R1883

NP

1 2

0-5%

C1780

U73

2

0-5%

X

It is not the true

= Not Intruded

21

Intrusion signal.

This signal gates PME#.

16V-10%

.1uF

1 2

C1662

77

54,62

16V-10%

.1uF

MOD_ESB_P3V3AUX_PWRGOOD

C2574

1 2

1

G

2N7002

1 2

8.2K-5%

Q1886

D

3

S

2

R4970

MOD_ESB_P3V3AUX_PWRGOOD_N

3.3VAUX_PWRGOOD INVERTER

62

2

C788

2 1

.01uF

16V-10%

+3.3V_AUX

14

U63

11

VHC14

R633

1 2

3.01K-1%

+3.3V_AUX

12

C535

10

1uF 6.3V

MOD_ESB_VFPCP_OSC_5V

+3.3V_AUX

R348

1 2

43.2-1%

21

C187

D4

31

BAR43 BAR43

.1uF

16V-10%

D5

3.3v AUXGOOD GENERATION

+3.3V_AUX

NP

U1085

809T

3

16V-10%

.1uF

31

12

.1uF

C188

1 2

R166

16V-10%

1M-5%

R218

1 2

Q8

VFPCP

100-1%

62,69

16V-10%

C254212C2541

.1uF

12

(3.08V)

VCC

RESET

GND

1

2

21

R4205

X

1K-5%

14

U1084

1

2

VHC14

33-5%

X

NP

1 2

R4214

14

U1084

3

4

VHC14

NP

4.7K-5%

R4206

1 2

33-5%

1 2

R4218

P3V3AUX_PWRGOOD_ESM

+3.3V_AUX

by U1084

86,129,136

ECAD: Place

X

C3380

1 2

1uF 6.3V

+3.3V_AUX+3.3V_AUX

2

3

62

MOD_ESB_P3V3AUX_PWRGOOD_N

ROOM=VFPCP

VOLTAGE DOUBLER FOR 6V AUX POWER

+12V

1 2

+3.3V_AUX

R5419

1

G

2N7002

D

3

(to ESB2)

MOD_ESB_P3V3AUX_PWRGOOD

8.2K-5%

R5519

54,62

13

14

U1084

12

14

R4834

1 2

S

2

0-5%

11

U1084

10

VHC14 VHC14

MOD_ESB_U1084_P10

3

21

ROOM=3VAUXPG

4

SYSTEM_PWRGOOD_FETS

126

1 2

Q1921

1

G

2N7002

8.2K-5%

R4972

D

3

S

2

Q1922

1

G

2N7002

D

3

S

2

SYSTEM PWRGOOD 6V

1 2

R4974

1 2

8.2K-5%3.01K-1%3.92K-1%

R4973

SYSTEM_PWRGOOD_FETS_6V

C3205

1 2

220pF

50V-10%

C3206

1 2

220pF

50V-10%

53,63,77

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

SEC

ESB

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 62 OF 136

4

DCBA

A B C

D

1

2

I2C MUX & Headers

53,96

I2C_ESB2_MAIN_SCL

I2C_ESB2_MAIN_SDA

+3.3V_AUX

21

R3826

+3.3V_AUX

R3825

1 2

4.7K-5%

63,91

4.7K-5%

63,91

R4751

1 2

220-5%

R4752

1 2

220-5%

I2C_ESB2_MAIN_SCL_R

I2C_ESB2_MAIN_SDA_R

NP

X

1 2

C3114

NP

100pF

50V-5%

X

1 2

C3115

100pF

50V-5%

U_ESB_I2C

7

YA

9

YB

5C3253 QSOP16

VCC

IA0 IA1 IA2 IA3

IB0 IB1 IB2 IB3

S0 S1

EA EB

16

6 5 4 3

10 11 12 13

14 2

1 15

1 2

NP

R5638

0-5%

R5639

0-5%

NP

X

21

NP

X

+3.3V

R4315

1 2

R5658

0-5%

R5659

1 2

0-5%

4.7K-5%

21

R4316

21

X

21

R4317

4.7K-5%

2.7K-5%

R4319

21

R4318

21

4.7K-5%

R4320

4.7K-5%

1 2

21

R4321

R4322

4.7K-5%

2.7K-5%

4.7K-5%

1 2

I2C_ESB2_SEG0_SCL I2C_ESB2_SEG1_SCL I2C_CHIPSET_SCL I2C_ESB2_SEG3_SCL

I2C_ESB2_SEG0_SDA I2C_ESB2_SEG1_SDA I2C_CHIPSET_SDA I2C_ESB2_SEG3_SDA

45,46,48,63 63,85 21-8A,24-10R,30-7D,53-8R,53-9M

63-4F,71-7L,72-7F,91-7G,96-7J 24,63,96

45,46,48,63 63,85 21-8A,24-9R,30-8D,53-8R,53-10J

63-4K,71-7L,72-7F,91-7G,96-7J 24,63,96

GPO_I2C_MUX_SEL0 GPO_I2C_MUX_SEL1

Q1786

D

1

+3.3V_AUX

.1uF

1 2

C1985

66 66

3

16V-10%

+3.3V_AUX

R3706

1 2

2

8.2K-5%

3

P19_DT9231_jp_swap symbol

+3.3V_AUX

53,62,77

R3693

1 2

SYSTEM_PWRGOOD_FETS_6V

R3692

2.2K-5%

1 2

2.2K-5%

1

G

2N7002

S

2

3

63,91

21-8A,24-10R,30-7D,53-8R,53-9M

63-8N,71-7L,72-7F,91-7G,96-7J

45,46,48,63

63,85

24,63,96

I2C_ESB2_MAIN_SCL_R

I2C_CHIPSET_SCL I2C_ESB2_SEG0_SCL I2C_ESB2_SEG1_SCL I2C_ESB2_SEG3_SCL

MLK: SUB attribute added for new part YW581 as old one 20960 is obsolete.

J_I2C_DBG2 1 2 3 4 5 6 7 8 9 10

11 12

H2X6

POP9

SUB*_YW561

I2C_ESB2_MAIN_SDA_R

I2C_CHIPSET_SDA I2C_ESB2_SEG0_SDA I2C_ESB2_SEG1_SDA I2C_ESB2_SEG3_SDA

63,91 21-8A,24-9R,30-8D,53-8R,53-10J

63-7N,71-7L,72-7F,91-7G,96-7J 45,46,48,63

63,85 24,63,96

MODULE: DESC: REV: OF

SEC

I2C

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 63 OF 136

DCBA

4

A B C

D

1

2

3

M2LB_Change_Note: Removed SLOT circuitry.

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

ESB

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

9/7/2007 64 OF 136

9-7-2007_16:39

SHEET

A00

DCBA

4

A B C

D

1

2

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

M2LB_Change_Note: Deleted everything for PCIX SLOT 2.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

ESB

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

9/7/2007 65 OF 136

9-7-2007_16:39

SHEET

A00

DCBA

4

A B C

D

+3.3V

1

2

3

4

+3.3V

16V-10%

.1uF

66,123

+3.3V

2.7K-5% 8.2K-5%

NP

X

MLK: MOD_LPC_FAN1_PU pulled through RN118 MLK: MOD_LPC_FAN2_PU pulled through RN118

MLK: DISABLE_ETHERNET_1 PDthrough RN117 MLK: DISABLE_ETHERNET_2 PDthrough RN117

66,126

TPM Identification

TPM_TYPE0 TPM_TYPE1

0 1 1 0

1 1

C2437

1 2

MLK: PD for GP13 removed

66,70

66,83

66,81 54,66 54,66

66

R4162

21

R4161

12

MOD_SIO_RST_TPM_N MOD_LPC_TPM_TYPE_1

66

MOD_LPC_TPM_TYPE_0

66

10uF 6.3V

C3173

12

HEATSINK_PRES_N CTRLPNL_PRES_N

DISABLE_ETHERNET_2

DISABLE_ETHERNET_1 KB_RST_N KB_A20GATE MOD_LPC_FAN2_PU

MOD_LPC_FAN1_PU

NP

X

21

8.2K-5%2.7K-5%

12

00

R771

R422

2.7K-5% 8.2K-5%

NP

X

Reserved ST Micro Sinosun

TPM Type stored in Flash

16V-10%

.1uF

R770

21

MOD_LPC_GPI_BRD_REV2 MOD_LPC_GPI_BRD_REV1 MOD_LPC_GPI_BRD_REV0

MLK: Strapping to change as per correct BRD REV

R423

12

1 2

16V-10%

C2436

.1uF

C2435

1 2

POP3

R24

R4816

16V-10%

1 2

.1uF

+3.3V_AUX

1 2

4.7K-5% 8.2K-5%

1 2

POP4

16V-10%

C2434

R4900

1 2

POP4

R4817

1 2

POP3

1 2

.1uF

8.2K-5%

R5117

4.7K-5%

1 2

R8391

66

16V-10%

C2433

.1uF

(RFU)

AC termination to solve overshoot/undershoot issue.. Please verify need for cog.

66 66 66

4.7K-5%

16V-10%

C2432

1 2

+3.3V

.1uF

8

7

6

RN117

1

2

3

50V-10%

89,95,96,128,129

66

66,95,129

66

66,98

C2431

1 2

+3.3V

5

8.2K

4

330pF

R4770

8

RN118

1

C3147

1 2

21

49.9-1%

DEBUG_ERROR_LEVEL_1 DEBUG_ERROR_LEVEL_0 SAS_HD_LED_CABLE_PRES_N DISABLE_VIDEO

5

6

7

4

3

2

50V-10%

1 2

330pF

R4774

1 2

CPLD_TCK

C998

8.2K

C3143

49.9-1%

MOD_LPC_CPLD_TCK_R

66

1 2

50V-10%

330pF

R4771

220pF

50V-10%

R4941

66

1 2

21

R220

1 2

100-1%

1 2

FLP_MTR0_N_R

FLP_DIR_N_R

FLP_STEP_N_R

FLP_WDATA_N_R

FLP_WGATE_N_R

FLP_HDSEL_N_R

FLP_DR0_N_R

FLP_DENSEL_R

86,89,95,129

50V-10%

C3144

330pF

49.9-1%

66,89,95,96,128,129

66,89,95,128

4.7K-5%

1 2

21

R4772

66,89,96

R4943

C3145

49.9-1%

1 2

BMC_PROGRAM_N

50V-10%

330pF

MLK: GPIO 34 & 35 used for TPM Identification

4.7K-5%

1 2

22-5%

R8392

22-5%

R8393

1 2

22-5%

R8394

22-5%

R8395

1 2

22-5%

R8396

22-5%

R8397

1 2

22-5%

R8398

22-5%

MLK: GP80 Used for TPM RST Control

C3146

1 2

R4773

CPLD_TMS

R4944

49.9-1%

1 2

+3.3V_AUX

CPLD_TDO CPLD_TDI

4.7K-5%

1 2

21

FLP_WP_N FLP_TRK0_N FLP_DSKCHG_N FLP_INDEX_N FLP_RDATA_N

6

7

8

RN6

3

2

1

FLP_MTR0_N

FLP_DIR_N

FLP_STEP_N

FLP_WDATA_N

FLP_WGATE_N

FLP_HDSEL_N

FLP_DR0_N

FLP_DENSEL

R5804

1 2

22-5%

59,66 59,66 59,66 59,66 59,66

5

8.2K

4

MLK: GP13 used as PLANAR_TYPE_3 for MLK Assignment

R4942

1 2

59

59,66

68,72,129

66,89,95,96,128,129

4.7K-5%

+3.3V

R441

68,71,72

68,71

66,98 68,72 68,71

66,89,95,128

54,67,68,86,96 54,67,68,86,96 54,67,68,86,96 54,67,68,86,96

45 54

54,67,68,86,96

4.7K-5%

1 2

66

66,95,129

63 63

66,126

59

MOD_LPC_RISER_HS_PRES_N

66,70

FP_HD_LED_CABLE_PRES_N

68

66,123

MOD_LPC_GPI_EN_PASSWD_N

67

MOD_LPC_GPI_NVRAM_CLR_N

67

RISER_2_TYPE_EXP_N MOD_LPC_RISER_1_TYPE_EXP_N

SAS_HD_LED_CABLE_PRES_N

66

DISABLE_VIDEO MOD_LPC_RISER_2_TYPE_1U MOD_LPC_RISER_1_TYPE_1U

95,129 95,129 95,129 95,129 95,129 95,129 95,129 95,129

68 86 66 66 66

54 54,66 54,66

MOD_LPC_TPM_TYPE_0

66

67

67 53,54 86,87 86,92

68,72

58

66,89,96

66

MOD_LPC_PLANAR_TYPE_3

68

MOD_LPC_PLANAR_TYPE_2

68

MOD_LPC_PLANAR_TYPE_1

68

MOD_LPC_PLANAR_TYPE_0

68

126

52,67

MOD_LPC_LPCPD_N_PU

DEBUG_ERROR_LEVEL_1 DEBUG_ERROR_LEVEL_0 GPO_I2C_MUX_SEL1 GPO_I2C_MUX_SEL0

MOD_SIO_RST_TPM_N

IDE_P66_DET_N

CTRLPNL_PRES_N

HEATSINK_PRES_N

SIO_DTRB_N SIO_CTSB_N SIO_RTSB_N SIO_DSRB_N

SIO_SOUTB SIO_SINB SIO_DCDB_N

SIO_RIB_N

MOD_LPC_GPO_FWH_WP_N

BMC_RESET_N

MOD_LPC_GPI_BRD_REV2

MOD_LPC_GPI_BRD_REV1

MOD_LPC_GPI_BRD_REV0

SIO_PME_N

KB_A20GATE

KB_RST_N

MOD_LPC_TPM_TYPE_1

MOD_LPC_FAN1_PU

MOD_LPC_FAN2_PU

MOD_LPC_GPI_FVS_2_N

MOD_LPC_GPI_FVS_1_N

SIO_SMI_N

BMC_RDY_N

RAC_PRES_N

MOD_LPC_RISER_2_REV

CPLD_TMS

CPLD_TDI

CPLD_TDO

MOD_LPC_CPLD_TCK_R

+3.3V

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 CK_33M_SIO LPC_LDRQ0_N LPC_LFRAME_N PLT_RST_SIO_N MOD_ESB_SER_IRQ

GPE_NMI_N

MOD_LPC_SYSOPT

NP

R4175

X

1 2

8.2K-5%

4.7K-5%

PD for 0x02E PU for 0x04E

1 2

R917

10

LAD0

11

LAD1

12

LAD2

13

LAD3

18

PCI_CLK

15

LDRQ

14

LFRAME

16

PCI_RESET

19

SER_IRQ

17

LPCPD

60

GP84

59

GP83

58

GP82

56

GP81

55

GP80

54

GP77

53

GP76

52

GP75

51

GP74

50

GP73

49

GP72

48

GP71

46

GP70

45

GP65

44

GP64

43

GP63

42

GP62

27

GREEN/GP61

26

YELLOW/GP60

113

GP57/DTR2

112

GP56/CTS2

110

GP55/RTS2

108

GP54/DSR2

111

GP53/TXD2

109

GP52/RXD2

107

GP51/DCD2

114

GP50/RI2

41

GP47

40

GP46

39

GP45

38

GP44

30

GP43/DDRC

25

GP42/IO_PME

121

GP37/A20M

120

GP36/KBDRST

28

GP35/LED1

29

GP34

8

GP33/FAN1

7

GP32/FAN2

5

GP31/FAN_TACH1

4

GP30/FAN_TACH2

31

GP27/IO_SMI

32

GP26

33

GP25

35

GP24/SYSOPT

21

GP23/INTRD_OUT

36

GP20/P17

2

GP17/FAN_TACH3

1

GP16

128

GP15

127

GP14

126

DB_SW/GP13

125

PWRGOOD/GP12

124

SLP_S5/GP11

123

SLP_S3/GP10

SUPER I/O LPC47M534 REV. 0.5

SUPER I/O

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

VTR VTR

VTR

VTR VTR

VTR

U_SIO

DSKCHG

INDEX

MTR0

STEP WDATA WGATE

TRK0

WRTPRT

RDATA HDSEL

GP41/DRVDEN1 GP40/DRVDEN0

GP22/P12/MTR1

GP21/P16/DS1

RXD1

TXD1

RTS1

CTS1

DTR1

DSR1

DCD1

STROBE

BUSY

SLCT

ERROR

INIT

SLCTIN

MDAT

MCLK

KDAT

KCLK

CLOCKI

INTRD_IN

VCC6 VCC34 VCC47 VCC57 VCC79

VCC106 VCC122

VBAT

VSS3 VSS37 VSS61 VSS69 VSS92

VSS119

AVSS

M2LB_Change_Note: R4942 changed to pulldown.

Added series resistors to SIO FLPY outputs.

62 76 75 71

DIR

70 68 67 66 65 64 63 73

DS0

77 78 72 74

100 102 101 103 104 99 98 105

RI1

97 91

PD0

90

PD1

89

PD2

88

PD3

87

PD4

86

PD5

85

PD6

84

PD7

83

ACK

82 81

PE

80 96

ALF

95 94 93

118 117 116 115

9

22

6 34 47 57 79 106 122 23 24

VTR

3 37 61 69 92 119 20

MODULE: DESC: REV: OF

FLP_DSKCHG_N FLP_INDEX_N FLP_MTR0_N_R FLP_DIR_N_R FLP_STEP_N_R FLP_WDATA_N_R FLP_WGATE_N_R FLP_TRK0_N FLP_WP_N FLP_RDATA_N FLP_HDSEL_N_R FLP_DR0_N_R FLP_DRATE0 FLP_DENSEL_R DISABLE_ETHERNET_2 DISABLE_ETHERNET_1

SIO_SINA SIO_SOUTA SIO_RTSA_N SIO_CTSA_N SIO_DTRA_N SIO_DSRA_N SIO_DCDA_N SIO_RIA_N

NC_SIO_RPRN_STB_N NC_SIO_RPRN_PD0 NC_SIO_RPRN_PD1 NC_SIO_RPRN_PD2 NC_SIO_RPRN_PD3 NC_SIO_RPRN_PD4 NC_SIO_RPRN_PD5 NC_SIO_RPRN_PD6 NC_SIO_RPRN_PD7

MOD_LPC_RPRN_ACK_PU_N MOD_LPC_RPRN_BUSY_PU MOD_LPC_RPRN_PE_PU MOD_LPC_RPRN_SLCT_PU

NC_SIO_RPRN_AFD_N

MOD_LPC_RPRN_ERR_PU_N NC_SIO_RPRN_INIT_N NC_SIO_RPRN_SLIN_N

MOD_LPC_MSE_DATA MOD_LPC_MSE_CLK MOD_LPC_KB_DATA MOD_LPC_KB_CLK

CK_14M_SIO

59,66 59,66 66 66 66 66 66 59,66 59,66 59,66 66 66 66 66 66,83 66,81

95,129 95,129 129 95,129 95,129 95,129 95,129 129

66 66 66 66

66

45

+3.3V_AUX 330-5%

+3.3V

NP

X

NP

C3588

X

R5893

1 2

.1uF

16V-10%

4.7K-5%

R4788

1 2

0-5%

R4815

1 2

C2429

4.7K-5%

Note: If VBAT gets connected to SIO R4153 and R4835 get populated R4788 and R4815 get depopped

LPC

SEC

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

DATE

9/7/2007 66 OF 136

R4153

2 1

NP

R4835

NP

1 2

0-5%

.1uF

C2428

16V-10%

HX601

2 1

7

8

RN97

1

2

NP

21

R5525

X

8

RN116

1

X X

+3.3V_AUX

4.7uF

6.3V-10%

6

8.2K

3

4 5

8.2K-5%

+5V

7

6

3

2

INC.

R4192

+3.3V

NP

R4951

X

54

8.2K

8.2K-5%

1 2

MOD_LPC_RPRN_ACK_PU_N MOD_LPC_RPRN_BUSY_PU MOD_LPC_RPRN_PE_PU MOD_LPC_RPRN_SLCT_PU MOD_LPC_RPRN_ERR_PU_N

8.2K-5%

1 2

FLP_DENSEL

FLP_DRATE0

VBAT

53,55,57,62,67,69,123

ROUND ROCK,TEXAS

REV.

SHEET

A00

59,66

66

66 66 66 66 66

1

2

3

4

DCBA

A B C

D

JUMPERS

1

StMicro Atmel Sinosun

NOPOPPOPPin

1

2

3

5

7

8

R12

R11

R15 C5

R1 R1

R13

R10 R10

R15 C5

R12

R11

R1

R13

R12

R11

R10

NOPOPPOPNOPOPPOP

R15 C5

R13

+3.3V

R4212

1 2

8.2K-5%

R4213

1 2

8.2K-5%

SILKSCREEN1=NVRAM_CLR SILKSCREEN2=PWRD_CLR

J_PSWD_NVRM

1 3 5

2 4 6

MOD_LPC_GPI_EN_PASSWD_N

MOD_LPC_GPI_NVRAM_CLR_N

NC_HEADER_6NC_HEADER_5

ADD1=ADD*_81526 ADD2=ADD*_81526

66

1

66

TPM

9

R6 R9 R6 R9

R9 R6

2

3

12

13

14

15

19

R4 R5 C8

R2

Float

R8 R8 R8

R14

R4 C8

R2

R14

+3.3V

R7

1 2

FloatFloat

R14

4.7K-5%

54,66,68,86,96 54,66,68,86,96 54,66,68,86,96 54,66,68,86,96

54,66,68,86,96

45,68

R4 R5 C8

R2

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

LPC_LFRAME_N

126

CK_33M_FWH_TPM

52,66

PLT_RST_TPM_N

MOD_ESB_SER_IRQ

MLK: Table Updated as per Amy's Comments

NOTE:

Strapping options have been done as per ST19W18

MLK_X01: Dual Footprint for TPM

R8

1 2

4.7K-5%

R3

0-5%

1 2

SUB=POP3

26

LAD0

23

LAD1

20

LAD2

17

LAD3

28

LPCPD

22

LFRAME

16

LRESET

21

LCLK

27

SERIRQ

15

CLKRUN/GPIO15

4

GND_4

11

GND_11

18

GND_18

25

GND_25

U_TPM

SM_DAT/GPIO1 SM_CLK/GPIO2

TESTBI/BADD/GPIO9

XTALI/32K

GENERIC DUAL FOOTPRINT TPM1.2 IC

SUB0=SUB4_FR445 SUB1=SUB3_MM582

VDD_10 VDD_19 VDD_24

3VSB VBAT

NC_V

PP/GPIO7

GPIO6

TESTI

XTALO

R1

1 2

10 19 24

5 12

3 7 6 1 2 9 8

13 14

NC_TPM_PIN14

1K-1%

R14

0-5%

SUB=POP3

NC_TPM_PIN3

PU_TPM_GPIO3

+3.3V

81526 are the jumper plugs

+3.3V

R4370

+3.3V

+3.3V_AUX

NP

21

1 2

8.2K-5%

R4371

1 2

8.2K-5%

+3.3V

MOD_LPC_GPI_FVS_1_N

MOD_LPC_GPI_FVS_2_N

66

2

+3.3V

R15

X

21

C2

21

NP

R2

X

1 2

100-1%

R10

1 2

.1uF

16V-10%

SUB=POP3

21

C10

R11

4.7K-5%

1 2

10uF 6.3V

R28

1 2

MLK: PU added on Pin 6 (GPIO3)

R12

4.7K-5%

1 2

4.7K-5%

20K-5%

NP

R13

X

1 2

0-5%

NP

4.7K-5%

21

C5

X

.1uF

16V-10%

NP

R4

X

1 2

0-5%

NP

C8

X

58,70

BTN_PWR_ON_N

81526 are the jumper plugs28

0-5%

VBAT

12

X

R5

NP

21

.1uF

16V-10%

53,55,57,62,66,69,123

TP1

TESTPAD FVS

TP2

TESTPAD FVS

TP3

TESTPAD FVS

J_FVS

1 3

1

+1.5V_SUS_ESB2

+1.5V_AUX_ESB2

2 4

PS1_PWRGOOD

55,57

54-57,127

120,128

3

1

+3.3V_AUX_ESB2

54-57,61

MLK_A00: ST TPM Part No. changed to FR445 (Rev 1E)

MLK: TPM CHIP ADDED

R9

R6

4.7K-5%0-5%

1 2

SUB=POP3

SUB=POP4

MODULE: DESC: REV: OF

SEC

LPC

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

HX601

SHEET

67 OF 1369/7/2007

DCBA

9-26-2007_13:18

4

REV.

A00

A B C

ROOM=FWH

+3.3V

LPC Resistor Strappings

+3.3V

D

9-7-2007_16:39

1

2

R842

1 2

MOD_LPC_GPO_FWH_WP_N

66

4.7K-5%

1 2 3 4

96

96,126

RN9

8.2K

8 7 6 5

FWH_ID0

C291

PLT_RST_FWH_SMARTVU_N

54,66,67,86,96 54,66,67,86,96 54,66,67,86,96 54,66,67,86,96 54,66,67,86,96

+3.3V

R448

1 2

.1uF

1 2

45,67

8.2K-5%

16V-10%

MOD_LPC_IC

CK_33M_FWH_TPM LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME_N

MOD_LPC_ID1 MOD_LPC_ID2 MOD_LPC_ID3

PROPAGATION_DELAY=L:S::500 PROPAGATION_DELAY=L:S::500

R376

1 2

470-5%

R375

1 2

470-5%

C288

.1uF

1 2

MOD_LPC_WP_N

MOD_LPC_TBL_N

C289

1 2

16V-10%

1 2

2

9

.1uF

16V-10%

U_FWH

VCC1 VCC2 VCCA VPP

IC RST CLK FWH0 FWH1 FWH2 FWH3 FWH4 ID0 ID1 ID2 ID3 TBL WP

GND1 GND2 GNDA

CAMINO FWH

.1uF

C290

16V-10%

10 31 39 11

12

25 26 27 28 38 24 23 22 21 20 19

29 30 40

TSOP40

82802AC - 8Mb

SUB*_GT504

MLK: New Prog PN for Flash

FGPI4 FPGI3 FPGI2 FPGI1 FPGI0

RFU1 RFU2 RFU3 RFU4 RFU5 INIT

NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8

7 15 16 17 18 32 33 34 35 36 37

1 3 4 5 6 8 13 14

MOD_LPC_FGPI4

MOD_LPC_FGPI3 MOD_LPC_FGPI2 MOD_LPC_FGPI1

MOD_LPC_FGPI0 NC_MOD_LPC_RFU1 NC_MOD_LPC_RFU2 NC_MOD_LPC_RFU3 NC_MOD_LPC_RFU4 NC_MOD_LPC_RFU5

H_INIT_N_3V

NC_MOD_LPC_NC1 NC_MOD_LPC_NC2 NC_MOD_LPC_NC3 NC_MOD_LPC_NC4 NC_MOD_LPC_NC5 NC_MOD_LPC_NC6 NC_MOD_LPC_NC7 NC_MOD_LPC_NC8

54,96

1 2

8.2K-5%

1 2 3 4

R449

RN8

8.2K

8 7 6 5

+3.3V

66,72 66,72 66,71

66 66 66 66

MOD_LPC_RISER_2_REV MOD_LPC_RISER_2_TYPE_1U MOD_LPC_RISER_1_TYPE_1U

66,72,129

66,71

66

66,71,72

MOD_LPC_PLANAR_TYPE_0 MOD_LPC_PLANAR_TYPE_1 MOD_LPC_PLANAR_TYPE_2 MOD_LPC_PLANAR_TYPE_3

0000 - Montreal HA 0001 - London 0010 - Berlin 0011 - Reserved 0100 - Montreal EC 1000 - Montreal HA MLK 1001 - London MLK 1010 - Berlin MLK

MLK: Proposed PLANAR TYPE ID assigned for MLK

RISER_2_TYPE_EXP_N MOD_LPC_RISER_1_TYPE_EXP_N FP_HD_LED_CABLE_PRES_N MOD_LPC_RISER_HS_PRES_N

Riser Types - Pulled up on Montreal

R22

4.7K-5%

1 2

NP

R18

X

1 2

+3.3V_AUX

R5336

- routed to riser when riser is present

- Pulled up on MontrealRISER HS PRES

- routed to riser when riser is present

1 2

20K-5%

R5337

1 2

R5338

20K-5%

1 2

R4847

4.7K-5%

20K-5%

R5132

1 2

4.7K-5%

R5131

20K-5%

21

R8224

R4848

1 2

+3.3V

1 2

R8225

4.7K-5%

POP8

R4849

4.7K-5%

POP7

20K-5%

R4343

21

1 2

4.7K-5%

POP7

4.7K-5%

POP8

4.7K-5%

R5133

1 2

1

2

20K-5%

3

5688T---Socket

N1992---Multi Vendor AVL

FWH Prog Part

GT504

Riser Rev

- Pulled up on Montreal

- routed to riser when riser is present

Things to check from BMC/CPLD module

- DEBUG_ERROR_LEVEL_(1:0) sent to CPLD. Maybe send directly to LEDs

- BMC_PROGRAM_N pulled up in BMC module

- Serial Port A signals driven by CPLD. Add external PU/PD

- Serial Port B signals driven by CPLD. Add external PU/PD

- BMC_RESET_N pulled up in BMC module

- BMC_RDY_N pulled up in BMC module

3

4

Disk Prog

XN293

Blank Part N1992

TITLE

M2LB_Change_Note: Changed planar type stuffing options. Changed R4343 to pulldown.

MODULE: DESC: REV: OF

SEC

INC.

ROUND ROCK,TEXAS

LPC

4

FIRMWARE HUB

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

SCHEM, PLN, SV, PE2950, MLK

HX601

SHEET

68 OF 1369/7/2007

9-7-2007_16:39

DCBA

REV.

A00

A B C

D

1

62

1

VFPCP

2

TH/SMT SKT

254

3V COIN

-+

3

MOD_LPC_BAT_P A2D_BAT

Required by product safety

R75

1 2

SILKSCREEN=BATTERY

1

BAT

1K-1%

SUB*_1311P ADD*_75481_BATTERY

MOD_LPC_1N914_ANODE

D78

1 3

1N914

+3.3V_AUX

C541

1 2

D77

1N914

470pF

50V-10%

31

21

X

NP

C781

10uF 6.3V

VBAT

R74

1 2

53,55,57,62,66,67,123

MOD_LPC_ESM_VBAT

Required by product safety

G

1

D14

Q17

D 3

31

BAR43

LOAD RESISTOR TO DETECT MISSING BATTERY

S

MOD_LPC_FET_SOURCE

2

2N7002

R352

1 2

R353

1 2

10M-5%

MOD_LPC_10M

10M-5%

200K-1%1K-1%

R645

16V-10%

.1uF

1 2

86

2

C307

3

ROOM=BATT

COIN BATTERY

3

Battery

4

Micro-Vu circuitry removed

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

SEC

LPC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 69 OF 136

DCBA

4

A B C

J_SIDEPLANE

D

1

2

3

4

+5V_AUX

+5V

+3.3V_AUX

ROOM=PCIE_ROMB

106

105

86 86

95,129

54,58

95,120,128

+3.3V_AUX

8.2K-5%

R8297

21

91 91

54 54

MOD_ESB_V_5_USB_BACK67_N

58

IRQ pullup on ESB page

FRONT_VSYNC

FRONT_RED

FRONT_BLUE

CTRLPNL_CLK CTRLPNL_DATA

SIDEPLANE_PRES_N

I2C_BMC_PERC_VAUX_SCL I2C_BMC_PERC_VAUX_SDA

ESB_USB_P4_N ESB_USB_P4_P

NC_STORAGE_PWRGOOD

NC_MOD_IO_J_ROMB_B10 BTN_NMI_N

PS_ENABLE_CPLD_N

29 29

62

29 29

EXP_MCH_3_SB_0_P EXP_MCH_3_SB_0_N

INTRUSION_COVER_N

EXP_MCH_3_SB_1_P EXP_MCH_3_SB_1_N

EXP_MCH_3_SB_2_P EXP_MCH_3_SB_2_N

EXP_MCH_3_SB_3_P EXP_MCH_3_SB_3_N

126

53

53 53

53,59

53

52 53

PLT_RST_IDE_N

MOD_ESB_PDDREQ

MOD_ESB_PDD7 MOD_ESB_PDD6

MOD_ESB_PDD5 MOD_ESB_PDD4

MOD_ESB_PDD3 MOD_ESB_PDD2

MOD_ESB_PDD1 MOD_ESB_PDD0

MOD_ESB_PDIOW_N

MOD_ESB_PDIORDY

MOD_ESB_IRQ14_N MOD_ESB_PDA1

+3.3V

R27

1 2

0-5%

MOD_ESB_PDIOR_N

MOD_ESB_PDDACK_N

B1

+12V_1

B2 A2

+12V_2 +12V_3

B4

GND_B4

B5

SMCLK

B6

SMDATA

B7

GND_B7

B8

+3.3V_1

B9

JTAG_TRST

B11

WAKE

B12

RSVD_B12

B13

GND_B13

B14

PETP0

B15

PETN0

B16

GND_B16

B17

PRSNT2_X1

B18

GND_B18

B19

PETP1

B20

PETN1

B21

GND_B21

B22

GND_B22

B23

PETP2

B24

PETN2

B25

GND_B25

B26

GND_B26

B27

PETP3

B28

PETN3

B29

GND_B29

B30

RSVD_B30

B31

PRSNT2_X4

B32

GND_B32

B33

PETP4

B34

PETN4

B35

GND_B35

B36

GND_B36

B37

PETP5

B38

PETN5

B39

GND_B39

B40

GND_B40

B41

PETP6

B42

PETN6

B43

GND_B43

B44

GND_B44

B45

PETP7

B46

PETN7

B47

GND_B47

B48

PRSNT2_X8

B49

GND_B49

B50

PETP8

B51

PETN8

B52

GND_B52

B53

GND_B53

B54

PETP9

B55

PETN9

B56

GND_B56

B57

GND_B57

B58

PETP10

B59

PETN10

B60

GND_B60

B61

GND_B61

B62

PETP11

B63

PETN11

B64

GND_B64

B65

GND_B65

B66

PETP12

B67

PETN12

B68

GND_B68

B69

GND_B69

B70

PETP13

B71

PETN13

B72

GND_B72

B73

GND_B73

B74

PETP14

B75

PETN14

B76

GND_B76

B77

GND_B77

B78

PETP15

B79

PETN15

B80

GND_B80

B81

PRSNT2_X16

B82

RSVD_B82

PCI-E 16X CONNECTOR

PCI-E SPECIFICATION 1.0a

3.1mm PIN LENGTH

SILKSCREEN=STORAGE_SIDEPLANE

P18_DT9100_jp P19_DT9176_rt_swap_symbol

PRSNT1

+12V_4+12V_5

GND_A4 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS

+3.3V_2 +3.3V_3+3.3V_AUX

PERST

GND_A12 REFCLK+ REFCLKGND_A15

PERP0 PERN0

GND_A18

RSVD_A19

GND_A20

PERP1

PERN1 GND_A23 GND_A24

PERP2

PERN2 GND_A27 GND_A28

PERP3

PERN3 GND_A31

RSVD_A32

RSVD_A33

GND_A34

PERP4

PERN4 GND_A37 GND_A38

PERP5

PERN5 GND_A41 GND_A42

PERP6

PERN6 GND_A45 GND_A46

PERP7

PERN7 GND_A49

RSVD_A50

GND_A51

PERP8

PERN8 GND_A54 GND_A55

PERP9

PERN9 GND_A58 GND_A59

PERP10

PERN10 GND_A62 GND_A63

PERP11

PERN11 GND_A66 GND_A67

PERP12

PERN12 GND_A70 GND_A71

PERP13

PERN13 GND_A74 GND_A75

PERP14

PERN14 GND_A78 GND_A79

PERP15

PERN15 GND_A82

A1

A3B3 A4 A5 A6 A7 A8 A9 A10B10 A11

A12 A13 A14 A15 A16 A17 A18

A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32

A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49

A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82

NC_SIDEPLANE_A2 CDROM_PRES_N

ESB_USB_P6_N ESB_USB_P6_P

CTRLPNL_MUX_S0 CTRLPNL_MUX_S1

BTN_PWR_ON_N

BTN_ID_RAW_N

CK_100M_ROMB_P CK_100M_ROMB_N

EXP_MCH_3_NB_0_P EXP_MCH_3_NB_0_N

SAS_PERST_N

EXP_MCH_3_NB_1_P EXP_MCH_3_NB_1_N

EXP_MCH_3_NB_2_P EXP_MCH_3_NB_2_N

EXP_MCH_3_NB_3_P EXP_MCH_3_NB_3_N

STORAGE_ADAPTER_PRES_N

MOD_ESB_PDD8

MOD_ESB_PDD9 MOD_ESB_PDD10

MOD_ESB_PDD11 MOD_ESB_PDD12

MOD_ESB_PDD13 MOD_ESB_PDD14

MOD_ESB_PDD15

CK_PWRDN_N

MOD_ESB_PDA2 MOD_ESB_PDCS3_N

MOD_ESB_PDA0 MOD_ESB_PDCS1_N

CTRLPNL_PRES_N FRONT_MONITOR_PRES_N

I2C_VIDFRONT_5V_SCL

I2C_VIDFRONT_5V_SDA

FRONT_HSYNC

FRONT_GREEN

I2C_BMC_SEG3_VAUX_SCL I2C_BMC_SEG3_VAUX_SDA

+5V

+12V

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

58,67 93

52

54 54

86 86

45 45

24 24

126

24 24

52,54,95,129

53

53 53

53 45,48,95,128

53 53

105 105

106

105

86,87,91,96,120 86,87,91,96,120

+3.3V

21

C2833

105

.1uF

16V-10%

PCI EXPRESS CONNECTOR

FOR SIDEPLANE

(PERC5/SAS HBA

CONTROL PANEL, 1U IDE)

This is not a standard PCIexpress pinout. Never plug a PCIexpress card directly into this connector.

+5V

21

C503

10uF

2 1

16V 10%

21

.1uF

21

C2832

.1uF

16V-10%

66

1 2

C8458

21

.1uF

C628

16V-10%

+12V

+3.3V

C990

1 2

22uF 6.3V

M2LB_Change_Note: Replaced ROMB with SIDEPLANE.

.1uF

16V-10%

C502

C349

10uF

16V 10%

21

C626

21

C350

16V-10%

.1uF

16V-10%

.1uF

16V-10%

+5V_AUX

1 2

C8459

21

C627

21

C3167

.1uF

16V-10%

.1uF

16V-10%

.1uF

16V-10%

TITLE

DWG NO.

DATE

C8456

10uF

1 2

16V 10%

21

C629

MODULE: DESC: REV: OF

.1uF

16V-10%

IO

21

C3136

.1uF

+3.3V_AUX

C820

16V-10%

21

4.7uF

SIDEPLANE AND RISER

SEC

6.3V-10%

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

HX601

SHEET

70 OF 1369/7/2007

1

2

3

4

REV.

A00

DCBA

A B C

Defined by PCI-e CEM Spec

Rev 1.0a

D

This is not a standard PCIexpress pinout. Never plug a PCIexpress card directly into this connector.

+1.8V

J_RISER1

1

2

SB_C

SB

T

R

NB

ESB2 or MCH

PCI-e Controller

T = TransmitSB = SouthBound R = ReceiveNB = NorthBound

*Corvette also matches this

T

R

PCI-e Card Connector

50 50

+3.3V_AUX

66,68,72

24

53,61,73

66,68 66,68

126

EXP_ESB_2_SB_0_P EXP_ESB_2_SB_0_N

EXP_ESB_2_SB_1_P EXP_ESB_2_SB_1_N

+3.3V

72,122

72,95,110,122,128

MOD_LPC_RISER_HS_PRES_N

PEWIDTH_0

MOD_ESB_RISER_1_REV

MOD_LPC_RISER_1_TYPE_1U

MOD_LPC_RISER_1_TYPE_EXP_N

SYSTEM_PWRGOOD_RISER1

126 126

P1V5_PXH_EN P1V5_PXH_PWRGOOD

RISER1_PERST_N PLT_RST_RISER1_N

B1

+12V_1

B2 A2

+12V_2 +12V_3

B4

GND_B4

B5

SMCLK

B6

SMDATA

B7

GND_B7

B8

+3.3V_1

B9

JTAG_TRST

B11

WAKE

B12

RSVD_B12

B13

GND_B13

B14

PETP0

B15

PETN0

B16

GND_B16

B17

PRSNT2_X1

B18

GND_B18

B19

PETP1

B20

PETN1

B21

GND_B21

B22

GND_B22

B23

PETP2

B24

PETN2

B25

GND_B25

B26

GND_B26

B27

PETP3

B28

PETN3

B29

GND_B29

B30

RSVD_B30

B31

PRSNT2_X4

B32

GND_B32

PRSNT1

+12V_4+12V_5

GND_A4 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS

+3.3V_2 +3.3V_3+3.3V_AUX

PERST

GND_A12 REFCLK+ REFCLKGND_A15

PERP0 PERN0

GND_A18

RSVD_A19

GND_A20

PERP1

PERN1 GND_A23 GND_A24

PERP2

PERN2 GND_A27 GND_A28

PERP3

PERN3 GND_A31

RSVD_A32

A1

A3B3 A4 A5 A6 A7 A8 A9 A10B10 A11

A12 A13 A14 A15 A16 A17 A18

A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32

+3.3V

CK_100M_PCIE_ESB_2_P CK_100M_PCIE_ESB_2_N

WAKE_N

CK_100M_PCIE_MCH_67_P CK_100M_PCIE_MCH_67_N

EXP_ESB_2_NB_0_P EXP_ESB_2_NB_0_N

EXP_ESB_2_NB_1_P EXP_ESB_2_NB_1_N

I2C_CHIPSET_SCL

+1.8V

48 48

72,77,81,83

45 45

49 49

21,24,30,53,63,72,91,96

RISER 1 Left Berlin e Left London X/ e

+12V

21

1

2

21

3

4

+12V

8.06K-1% 3.01K-1%

R8276

12

P5V_RISER_PWRGOOD

R8277

12

71,73,95,122,128

95,129

50 50

+3.3V_AUX

8.2K-5%

R5488

21

EXP_ESB_2_SB_2_P EXP_ESB_2_SB_2_N

EXP_ESB_2_SB_3_P EXP_ESB_2_SB_3_N

73,94,115,122

+3.3V

+12V

29 29

RSR_LFTE_PRES_N

EXP_MCH_6_SB_0_P EXP_MCH_6_SB_0_N

EXP_MCH_6_SB_1_P EXP_MCH_6_SB_1_N

P5V_EN

EXP_MCH_6_SB_2_P EXP_MCH_6_SB_2_N

EXP_MCH_6_SB_3_P EXP_MCH_6_SB_3_N

EXP_MCH_7_SB_0_P EXP_MCH_7_SB_0_N

EXP_MCH_7_SB_1_P EXP_MCH_7_SB_1_N

EXP_MCH_7_SB_2_P EXP_MCH_7_SB_2_N

EXP_MCH_7_SB_3_P EXP_MCH_7_SB_3_N

B33

PETP4

B34

PETN4

B35

GND_B35

B36

GND_B36

B37

PETP5

B38

PETN5

B39

GND_B39

B40

GND_B40

B41

PETP6

B42

PETN6

B43

GND_B43

B44

GND_B44

B45

PETP7

B46

PETN7

B47

GND_B47

B48

PRSNT2_X8

B49

GND_B49

B50

PETP8

B51

PETN8

B52

GND_B52

B53

GND_B53

B54

PETP9

B55

PETN9

B56

GND_B56

B57

GND_B57

B58

PETP10

B59

PETN10

B60

GND_B60

B61

GND_B61

B62

PETP11

B63

PETN11

B64

GND_B64

B65

GND_B65

B66

PETP12

B67

PETN12

B68

GND_B68

B69

GND_B69

B70

PETP13

B71

PETN13

B72

GND_B72

B73

GND_B73

B74

PETP14

B75

PETN14

B76

GND_B76

B77

GND_B77

B78

PETP15

B79

PETN15

B80

GND_B80

B81

PRSNT2_X16

B82

RSVD_B82

RSVD_A33

GND_A34

GND_A37 GND_A38

GND_A41 GND_A42

GND_A45 GND_A46

GND_A49

RSVD_A50

GND_A51

GND_A54 GND_A55

GND_A58 GND_A59

GND_A62 GND_A63

GND_A66 GND_A67

GND_A70 GND_A71

GND_A74 GND_A75

GND_A78 GND_A79

GND_A82

PCI-E 16X CONNECTOR

PCI-E SPECIFICATION 1.0a

3.1mm PIN LENGTH

SILKSCREEN=RISER3

P18_DT9100_jp P19_DT9176_rt_swap_symbol

PERP4 PERN4

PERP5 PERN5

PERP6 PERN6

PERP7 PERN7

PERP8 PERN8

PERP9 PERN9

PERP10 PERN10

PERP11 PERN11

PERP12 PERN12

PERP13 PERN13

PERP14 PERN14

PERP15 PERN15

A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49

A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82

I2C_CHIPSET_SDA

EXP_ESB_2_NB_2_P EXP_ESB_2_NB_2_N

EXP_ESB_2_NB_3_P EXP_ESB_2_NB_3_N

EXP_MCH_6_NB_0_P EXP_MCH_6_NB_0_N

EXP_MCH_6_NB_1_P EXP_MCH_6_NB_1_N

P5V_RISER_PWRGOOD

EXP_MCH_7_NB_0_P EXP_MCH_7_NB_0_N

EXP_MCH_7_NB_1_P EXP_MCH_7_NB_1_N

EXP_MCH_7_NB_2_P EXP_MCH_7_NB_2_N

EXP_MCH_7_NB_3_P EXP_MCH_7_NB_3_N

EXP_MCH_6_NB_2_P EXP_MCH_6_NB_2_N

EXP_MCH_6_NB_3_P EXP_MCH_6_NB_3_N

21,24,30,53,63,72,91,96

49 49

24 24

71,73,95,122,128

24 24

+3.3V

+12V

C478

2 1

+3.3V

C983

1 2

22uF 6.3V

+3.3V_AUX

21

C813

M2LB_Change_Note: Replaced SLOT with RISER.

4.7uF

6.3V-10%

10uF

16V 10%

C596

.1uF

16V-10%

C597

.1uF

16V-10%

C598

.1uF

16V-10%

Place caps near J_RISER1

21

C195

.1uF

16V-10%

21

C196

.1uF

16V-10%

21

C3168

.1uF

16V-10%

C479

1 2

Place caps near J_RISER1

Place cap near J_RISER1

MODULE: DESC: REV: OF

TITLE

C599

1 2

22uF 6.3V

INC.

C3137

.1uF

16V-10%

.1uF

16V-10%

IO

SIDEPLANE AND RISER

2

SEC

10

ROUND ROCK,TEXAS

3

4

ROOM=PCIE_RISER1

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 71 OF 136

DCBA

A B C

D

1

2

Defined by PCI-e CEM Spec

Rev 1.0a

SB_C

SB

T

R

NB

ESB2 or MCH

PCI-e Controller

NB = NorthBound

*Corvette also matches this

T

R

T = TransmitSB = SouthBound R = Receive

PCI-e Card Connector

MLK: SHROUD_PRES not going to CPLD now. Corresponding pin in CPLD used for VID_SELECT

+3.3V_AUX

NP

1 2

8.2K-5%

R6017

X

126 126

21,24,30,53,63,71,91,96 21,24,30,53,63,71,91,96

This is not a standard PCIexpress pinout. Never plug a PCIexpress card directly into this connector.

Side B

NC_J_RISER2_B22 NC_J_RISER2_B23

SHROUD_PRES

NC_J_RISER2_B25

PLT_RST_RISER2_N

RISER2_PERST_N

I2C_CHIPSET_SCL I2C_CHIPSET_SDA

73,115,127

N12V_RISER

Use wide trace.

+3.3V

J_RISER2

B1

+12V_1

B2 A2

+12V_2 +12V_3

B4

GND_B4

B5

SMCLK

B6

SMDATA

B7

GND_B7

B8

+3.3V_1

B9

JTAG_TRST

B11

WAKE

B12

RSVD_B12

B13

GND_B13

B14

PETP0

B15

PETN0

B16

GND_B16

B17

PRSNT2_X1

B18

GND_B18

B19

PETP1

B20

PETN1

B21

GND_B21

B22

GND_B22

B23

PETP2

B24

PETN2

B25

GND_B25

B26

GND_B26

B27

PETP3

B28

PETN3

B29

GND_B29

B30

RSVD_B30

B31

PRSNT2_X4

B32

GND_B32

PRSNT1

+12V_4+12V_5

GND_A4 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS

+3.3V_2 +3.3V_3+3.3V_AUX

PERST

GND_A12 REFCLK+ REFCLKGND_A15

PERP0 PERN0

GND_A18

RSVD_A19

GND_A20

PERP1

PERN1 GND_A23 GND_A24

PERP2

PERN2 GND_A27 GND_A28

PERP3

PERN3 GND_A31

RSVD_A32

A1

A3B3 A4 A5 A6 A7 A8 A9 A10B10 A11

A12 A13 A14 A15 A16 A17 A18

A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32

P5V_RISER

Use wide trace.

NC_J_RISER2_A23 NC_J_RISER2_A24

NC_J_RISER2_A26 NC_J_RISER2_A27

MOD_LPC_RISER_HS_PRES_N

WAKE_N

MOD_LPC_RISER_2_TYPE_1U

Side A

73,127

+3.3V

66,68,71 71,77,81,83

66,68

+12V

12

C477

10uF

16V 10%

C476

2 1

10uF

16V 10%

21

C592

.1uF

16V-10%

21

C593

.1uF

16V-10%

21

C594

.1uF

16V-10%

RISER 2 Center

21

C595

.1uF

16V-10%

21

C8310

.1uF

16V-10%

1

2

3

4

ROOM=PCIE_RISER2

95,129

+3.3V_AUX

8.2K-5%

R5461

21

+1.8V

RSR_RT_PRES_N

48 48

29 29

24

29 29

+12V

CK_100M_PCIE_MCH_5_P CK_100M_PCIE_MCH_5_N

EXP_MCH_5_SB_3_N EXP_MCH_5_SB_3_P

EXP_MCH_5_SB_2_N EXP_MCH_5_SB_2_P

EXP_MCH_5_SB_1_N EXP_MCH_5_SB_1_P

PEWIDTH_1

EXP_MCH_5_SB_0_N EXP_MCH_5_SB_0_P

EXP_MCH_4_SB_1_N EXP_MCH_4_SB_1_P

EXP_MCH_4_SB_0_N EXP_MCH_4_SB_0_P

EXP_MCH_4_SB_3_N EXP_MCH_4_SB_3_P

EXP_MCH_4_SB_2_P EXP_MCH_4_SB_2_N

B33

PETP4

B34

PETN4

B35

GND_B35

B36

GND_B36

B37

PETP5

B38

PETN5

B39

GND_B39

B40

GND_B40

B41

PETP6

B42

PETN6

B43

GND_B43

B44

GND_B44

B45

PETP7

B46

PETN7

B47

GND_B47

B48

PRSNT2_X8

B49

GND_B49

B50

PETP8

B51

PETN8

B52

GND_B52

B53

GND_B53

B54

PETP9

B55

PETN9

B56

GND_B56

B57

GND_B57

B58

PETP10

B59

PETN10

B60

GND_B60

B61

GND_B61

B62

PETP11

B63

PETN11

B64

GND_B64

B65

GND_B65

B66

PETP12

B67

PETN12

B68

GND_B68

B69

GND_B69

B70

PETP13

B71

PETN13

B72

GND_B72

B73

GND_B73

B74

PETP14

B75

PETN14

B76

GND_B76

B77

GND_B77

B78

PETP15

B79

PETN15

B80

GND_B80

B81

PRSNT2_X16

B82

RSVD_B82

PCI-E 16X CONNECTOR

PCI-E SPECIFICATION 1.0a

3.1mm PIN LENGTH

SILKSCREEN=RISER1

P18_DT9100_jp P19_DT9176_rt_swap_symbol

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

RSVD_A33

GND_A34

PERP4

PERN4 GND_A37 GND_A38

PERP5

PERN5 GND_A41 GND_A42

PERP6

PERN6 GND_A45 GND_A46

PERP7

PERN7 GND_A49

RSVD_A50

GND_A51

PERP8

PERN8 GND_A54 GND_A55

PERP9

PERN9 GND_A58 GND_A59

PERP10

PERN10 GND_A62 GND_A63

PERP11

PERN11 GND_A66 GND_A67

PERP12

PERN12 GND_A70 GND_A71

PERP13

PERN13 GND_A74 GND_A75

PERP14

PERN14 GND_A78 GND_A79

PERP15

PERN15 GND_A82

A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49

A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82

RISER_2_TYPE_EXP_N

CK_100M_PCIE_MCH_4_P CK_100M_PCIE_MCH_4_N

EXP_MCH_5_NB_3_N EXP_MCH_5_NB_3_P

EXP_MCH_5_NB_2_N EXP_MCH_5_NB_2_P

EXP_MCH_5_NB_1_N EXP_MCH_5_NB_1_P

MOD_LPC_RISER_2_REV

EXP_MCH_5_NB_0_N EXP_MCH_5_NB_0_P

EXP_MCH_4_NB_3_P EXP_MCH_4_NB_3_N

EXP_MCH_4_NB_2_P EXP_MCH_4_NB_2_N

EXP_MCH_4_NB_1_P EXP_MCH_4_NB_1_N

EXP_MCH_4_NB_0_P EXP_MCH_4_NB_0_N

SYSTEM_PWRGOOD_RISER2

P1V5_PXH_EN P1V5_PXH_PWRGOOD

48 48

24 24

126

71,122 71,95,110,122,128

66,68,129

66,68

+1.8V

+12V

+3.3V

C982

1 2

22uF 6.3V

+3.3V_AUX

21

C814

4.7uF

21

C194

.1uF

16V-10%

21

C192

.1uF

16V-10%

21

C3169

.1uF

16V-10%

Place caps near J_RISER2

Place cap near J_RISER2

6.3V-10%

M2LB_Change_Note: Replaced SLOT with RISER.

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

DATE

9/7/2007 72 OF 136

Place caps near J_RISER2

MODULE: DESC: REV: OF

SIDEPLANE AND RISER

SEC

INC.

ROUND ROCK,TEXAS

REV.

HX601

SHEET

3

IO

103

4

A00

DCBA

A B C

This is not a standard PCIexpress pinout.

D

1

+3.3V_AUX

Never plug a PCIexpress card directly into this connector.

Side B

J_RISER3

50 50 50

50

50 50 50

50

72,115,127

MOD_ESB_PCIX_133M_AD29_R MOD_ESB_PCIX_133M_AD27_R MOD_ESB_PCIX_133M_AD31_R

MOD_ESB_PCIX_133M_AD25_R

MOD_ESB_PCIX_133M_CBE3_N_R

MOD_ESB_PCIX_133M_AD23_R MOD_ESB_PCIX_133M_AD21_R MOD_ESB_PCIX_133M_CBE2_N_R

MOD_ESB_PCIX_133M_AD19_R

N12V_RISER

Use wide trace.

B1

+12V_1

B2 A2

+12V_2 +12V_3

PRSNT1

+12V_4+12V_5

B4

GND_B4

B5

SMCLK

B6

SMDATA

B7

GND_B7

B8

+3.3V_1

B9

JTAG_TRST

GND_A4 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS

+3.3V_2 +3.3V_3+3.3V_AUX

B11

WAKE

B12

RSVD_B12

B13

GND_B13

B14

PETP0

B15

PETN0

B16

GND_B16

B17

PRSNT2_X1

B18

GND_B18

PERST

GND_A12 REFCLK+ REFCLKGND_A15

PERP0 PERN0

GND_A18

A1

A3B3 A4 A5 A6 A7 A8 A9 A10B10 A11

A12 A13 A14 A15 A16 A17 A18

MOD_ESB_PCIX_133M_AD24_R

CK_133M_PCIX_RISER3

MOD_ESB_PCIX_133M_AD20_R

MOD_ESB_PCIX_133M_AD18_R MOD_ESB_PCIX_133M_AD26_R MOD_ESB_PCIX_133M_AD22_R

MOD_ESB_PCIX_133M_FRAME_N_R MOD_ESB_PCIX_133M_TRDY_N_R MOD_ESB_PCIX_133M_AD16_R

Side A

P5V_RISER

Use wide trace.

72,127

50

51

50

50 50 50

+12V

16V-10%

.1uF

21

C609

C484

2 1

10uF

16V 10%

+3.3V_AUX

21

C816

1

4.7uF

6.3V-10%

2

3

4

+3.3V

95,129

50 50

50 50 51

50 50 50

50 51 50

50 50 50

71,95,122,128

53,61,71

RSR_LFTX_PRES_N

MOD_ESB_PCIX_133M_IRDY_N_R MOD_ESB_PCIX_133M_DEVSEL_N_R

MOD_ESB_PCIX_133M_AD17_R MOD_ESB_PCIX_133M_LOCK_N_R MOD_ESB_PCIX_133M_PCIXCAP

MOD_ESB_PCIX_133M_PERR_N_R MOD_ESB_PCIX_133M_SERR_N_R MOD_ESB_PCIX_133M_IRQ3_N

MOD_ESB_PCIX_133M_AD14_R MOD_ESB_PCIX_133M_CBE1_N_R MOD_ESB_PCIX_133M_AD12_R

MOD_ESB_PCIX_133M_AD10_R MOD_ESB_PCIX_133M_M66EN MOD_ESB_PCIX_133M_AD8_R

MOD_ESB_PCIX_133M_AD7_R MOD_ESB_PCIX_133M_IRQ1_N MOD_ESB_PCIX_133M_AD5_R

MOD_ESB_PCIX_133M_AD3_R MOD_ESB_PCIX_133M_AD1_R MOD_ESB_PCIX_133M_ACK64_N_R

MOD_ESB_PCIX_133M_CBE4_N_R MOD_ESB_PCIX_133M_CBE6_N_R MOD_ESB_PCIX_133M_AD63_R

MOD_ESB_PCIX_133M_AD41_R MOD_ESB_PCIX_133M_AD47_R MOD_ESB_PCIX_133M_AD61_R

MOD_ESB_PCIX_133M_AD57_R MOD_ESB_PCIX_133M_AD59_R MOD_ESB_PCIX_133M_AD55_R

MOD_ESB_PCIX_133M_AD49_R MOD_ESB_PCIX_133M_AD43_R MOD_ESB_PCIX_133M_AD53_R

MOD_ESB_PCIX_133M_AD45_R MOD_ESB_PCIX_133M_AD51_R MOD_ESB_PCIX_133M_AD39_R

MOD_ESB_PCIX_133M_AD37_R MOD_ESB_PCIX_133M_AD33_R MOD_ESB_PCIX_133M_AD35_R

P5V_RISER_PWRGOOD MOD_ESB_RISER_1_REV

+3.3V_AUX

8.2K-5%

R5462

21

(INTD)

(INTB)

B19

PETP1

B20

PETN1

B21

GND_B21

B22

GND_B22

B23

PETP2

B24

PETN2

B25

GND_B25

B26

GND_B26

B27

PETP3

B28

PETN3

B29

GND_B29

B30

RSVD_B30

B31

PRSNT2_X4

B32

GND_B32

B33

PETP4

B34

PETN4

B35

GND_B35

B36

GND_B36

B37

PETP5

B38

PETN5

B39

GND_B39

B40

GND_B40

B41

PETP6

B42

PETN6

B43

GND_B43

B44

GND_B44

B45

PETP7

B46

PETN7

B47

GND_B47

B48

PRSNT2_X8

B49

GND_B49

B50

PETP8

B51

PETN8

B52

GND_B52

B53

GND_B53

B54

PETP9

B55

PETN9

B56

GND_B56

B57

GND_B57

B58

PETP10

B59

PETN10

B60

GND_B60

B61

GND_B61

B62

PETP11

B63

PETN11

B64

GND_B64

B65

GND_B65

B66

PETP12

B67

PETN12

B68

GND_B68

B69

GND_B69

B70

PETP13

B71

PETN13

B72

GND_B72

B73

GND_B73

B74

PETP14

B75

PETN14

B76

GND_B76

B77

GND_B77

B78

PETP15

B79

PETN15

B80

GND_B80

B81

PRSNT2_X16

B82

RSVD_B82

RSVD_A19

GND_A20

GND_A23 GND_A24

GND_A27 GND_A28

GND_A31

RSVD_A32

RSVD_A33

GND_A34

GND_A37 GND_A38

GND_A41 GND_A42

GND_A45 GND_A46

GND_A49

RSVD_A50

GND_A51

GND_A54 GND_A55

GND_A58 GND_A59

GND_A62 GND_A63

GND_A66 GND_A67

GND_A70 GND_A71

GND_A74 GND_A75

GND_A78 GND_A79

GND_A82

PCI-E 16X CONNECTOR

PCI-E SPECIFICATION 1.0a

3.1mm PIN LENGTH

SILKSCREEN=RISER2

POP8

P18_DT9100_jp P19_DT9176_rt_swap_symbol

PERP1 PERN1

PERP2 PERN2

PERP3 PERN3

PERP4 PERN4

PERP5 PERN5

PERP6 PERN6

PERP7 PERN7

PERP8 PERN8

PERP9 PERN9

PERP10 PERN10

PERP11 PERN11

PERP12 PERN12

PERP13 PERN13

PERP14 PERN14

PERP15 PERN15

A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32

A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49

A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82

MOD_ESB_PCIX_133M_STOP_N_R MOD_ESB_PCIX_133M_AD28_R MOD_ESB_PCIX_133M_AD30_R

MOD_ESB_PCIX_133M_PAR_R MOD_ESB_PCIX_133M_AD15_R MOD_ESB_PCIX_133M_AD13_R

MOD_ESB_PCIX_133M_AD11_R PCIX_133M_PME_N MOD_ESB_PCIX_133M_REQ0_N_R

MOD_ESB_PCIX_133M_AD9_R

MOD_ESB_PCIX_133M_GNT0_N_R MOD_ESB_PCIX_133M_RST_N

MOD_ESB_PCIX_133M_CBE0_N_R MOD_ESB_PCIX_133M_AD6_R MOD_ESB_PCIX_133M_AD4_R

MOD_ESB_PCIX_133M_AD2_R MOD_ESB_PCIX_133M_IRQ2_N MOD_ESB_PCIX_133M_IRQ0_N

MOD_ESB_PCIX_133M_AD0_R MOD_ESB_PCIX_133M_REQ64_N_R MOD_ESB_PCIX_133M_CBE7_N_R

MOD_ESB_PCIX_133M_CBE5_N_R MOD_ESB_PCIX_133M_AD62_R

MOD_ESB_PCIX_133M_PAR64_R

MOD_ESB_PCIX_133M_AD60_R MOD_ESB_PCIX_133M_AD36_R MOD_ESB_PCIX_133M_AD38_R

MOD_ESB_PCIX_133M_AD58_R MOD_ESB_PCIX_133M_AD44_R MOD_ESB_PCIX_133M_AD54_R

MOD_ESB_PCIX_133M_AD56_R MOD_ESB_PCIX_133M_AD52_R MOD_ESB_PCIX_133M_AD46_R

MOD_ESB_PCIX_133M_AD40_R MOD_ESB_PCIX_133M_AD50_R MOD_ESB_PCIX_133M_AD42_R

MOD_ESB_PCIX_133M_AD48_R MOD_ESB_PCIX_133M_AD32_R MOD_ESB_PCIX_133M_AD34_R

+3.3V

P5V_EN

+12V

50 50 50

50 77 50

50

50 51

50 50

(INTC) (INTA)

50

50 51 51

50 50 50

50 50

+3.3V

10V-10%

.1uF

21

C202

10V-10%

.1uF

21

C203

10V-10%

.1uF

21

C205

+3.3V

50

50 50 50

10V-10%

.1uF

50 50 50

C201

21

+3.3V

22uF 6.3V

50 50 50

71,94,115,122

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

1 2

C986

10V-10%

.1uF

21

C204

M2LB_Change_Note: Replaced SLOT with RISER.

ROOM=PCIX

TITLE

DWG NO.

DATE

MODULE:

ESB

DESC: REV: OF

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

9/7/2007 73 OF 136

9-7-2007_16:40

SHEET

A00

2

3

4

DCBA

A B C

D

1

2

3

M2LB_Change_Note: Removed SLOT 6 circuitry.

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

IO

PCI-E AND HP

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 74 OF 136

DCBA

105

4

A B C

D

1

2

3

M2LB_Change_Note: Removed HP circuitry.

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

IO

SEC

PCI-E AND HP

106

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 75 OF 136

DCBA

4

A B C

D

1

2

3

M2LB_Change_Note: Removed HP circuitry.

MODULE: DESC: REV: OF

IO

PCI-E AND HP

SEC

3

107

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 76 OF 136

DCBA

4

A B C

D

1

2

53,62,63

71,72,77,81,83

SYSTEM_PWRGOOD_FETS_6V

WAKE_N

R5352

1 2

1K-1%

Q1885

BSS138

1 G

D1048

3 1

D

3

S

2

BAR43

+3.3V_AUX

R5147

20K-5%

1 2

PCIX_133M_PME_N

73

D

3

BSS138

1 2

G S

R4191

1 2

10K-5%

+3.3V_AUX+3.3V_AUX

21

R4196

2

10K-5%

3

INTRUSION_COVER_VAUX_N

62

R4189

1 2

1K-1%

PCIX_PME_N

MOD_IO_INTRUSION_COVER_VAUX_N

51

Q1884

BSS138

1 G

WAKE_ESB_N

D

3

S

2

WAKE_N

52

71,72,77,81,83

2N7002 is N-FET Vgs = up to 3.0V depend on vendor

Please Refer to PME Diagram

3

M2LB_Change_Note: Removed HP circuitry.

4

ROOM=PCIE_HP

Dell PN 16155, 05168, 3282E, D1052, G5996, K5451, 1035D

It is a cheap part, $0.012 to $0.015

BSH111, DPN R1878 is N-FET Vgs = 1.3V It may be cheap part

BSS138, DPN R5841 is N-FET Vgs = 1.6V It is a cheap part, $0.0225, $0.029

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

IO

SEC

PCI-E AND HP

108

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 77 OF 136

4

DCBA

A B C

D

1

2

3

M2LB_Change_Note: Removed HP circuitry.

MODULE: DESC: REV: OF

IO

PCI-E AND HP

SEC

3

109

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 78 OF 136

DCBA

4

A B C

D

1

2

3

M2LB_Change_Note: Removed HP circuitry.

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

IO

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 79 OF 136

DCBA

PCI-E AND HP

1010

4

A B C

D

1

2

3

extra p/u's for derating

R8062

1 2

POP8

R8057

4.7K-5%

1 2

POP8

+3.3V

R8037

1 2

POP8

86,94

MOD_BMC_FANSPEED_1

extra p/u's for derating

R8054

1 2

POP8

R8055

4.7K-5%

1 2

POP8

4.7K-5%

+3.3V

86,94

R8038

MOD_BMC_FANSPEED_2

1 2

POP8

8.2K-5%

London Fans

Location PS2 PS1 CPU2 CPU2 CPU1 CPU1/Mem Connector 6 5 1 2 3 4

Tach 6 5 1 2 3 4 Zone 3 3 1 1 2 2

Berlin Fans

Location PS CPU2 CPU1 Mem Connector 1 2 3 4

Tach 5,6,13,14 1,2,9,10 3,7,11,15 4,8,12,16 Zone 3 2 1 1

extra p/u's for derating

R8059

4.7K-5%

1 2

POP8

8.2K-5%

R8056

4.7K-5%

1 2

POP8

1

G

POP8

2N7002

4.7K-5%

1

G

POP8

2N7002

+12V

R8058 1 2

POP8

R8051

1 2

Q8015

POP8

D

S

+12V

R8060

1 2

POP8

R8050

1 2

Q8016

POP8

D

S

4.7K-5%

0-5%

3

2

3

2

4.7K-5%

POP8

0-5%

R8035

1 2

POP8

560

R8034

560

Q8022

FDD6685

1

G

POP8

Q8030

FDD6685

1

G

POP8

C8016

21

POP8

NP

1 2

.01uF 50V

C8015

1 2

+5V

D8003

2 1

MBRS340T3

POP8

DPAK

3

S

G

POP8

1

NP

.01uF 50V

1 2

smr_03_12_05 - changed BOM options on fan circuits

+5V

D8004

POP8

MBRS340T3

DPAK

3

S

X

D

4

20P03

C8017

1 2

.01uF 50V

C8018

POP8

12

D

4

20P03

3

S

4

D

3

S

4

D

Q8021

X

Q8023

DPAK

+5V

POP8

R8022

1 2

R8025

1 2

POP8

C8031

POP8

R8028

R8027

POP8

NP

1-5%

R8023

1-5%

R8024

12

+

POP8

1 2

C8032

POP8

1 2

D8014

2 1

MBRS340T3

D8002

12

MBRS340T3

POP8

1-5%

POP8

270uF

16V-20%

POP8

1-5%1-5%

R8029

1-5%

1 2

R8026

1-5%

1 2

POP8

+

270uF

2 1

16V-20%

80 80 80 80

86,88 86,88

X

POP8

1-5%1-5%

R8384

1 2

R8386

1 2

POP8

+

C8595

POP8

270uF

2 1

16V-20%

ROOM=FANS_FRONT2

MOD_BMC_FAN13_TACH_PRE MOD_BMC_FAN14_TACH_PRE MOD_BMC_FAN15_TACH_PRE MOD_BMC_FAN16_TACH_PRE

NC_MOD_BMC_FANMUX_10 NC_MOD_BMC_FANMUX_9 NC_MOD_BMC_FANMUX_11 NC_MOD_BMC_FANMUX_12 NC_MOD_BMC_FANMUX_13

MOD_BMC_TACH_MUX_SEL0 MOD_BMC_TACH_MUX_SEL1

R8385

1 2

R8387

1 2

ROOM=FANS_FRONT1

POP8

1-5%

POP8

MOD_BMC_FANPWR_ZONE1

P19_DT9223_rt_swap_symbols (16x)

MOD_BMC_FANPWR_ZONE2

+3.3V

R8071

POP8

1K-1%

1 2

16

10 11 12 13

14

15

U8001

VCC

6

IA0

5

IA1

4

IA2

3

IA3

IB0 IB1 IB2 IB3

S0

2

S1

1

EA EB

5C3253 QSOP16

R8072

1K-1%

1 2

POP8

MOD_BMC_FANPWR_ZONE3

80,94

YA

YB

SUB=POP8

7

9

94

MOD_BMC_FAN13_TACH

80,94

MOD_BMC_FANPWR_ZONE1

94

MOD_BMC_FANPWR_ZONE1

94

MOD_BMC_FANPWR_ZONE3

94

MOD_BMC_FANPWR_ZONE3

94

MOD_BMC_FANPWR_ZONE1

86,88

94

MOD_BMC_FANPWR_ZONE1

94

21

C8007

.1uF

16V-10%

POP8

MOD_BMC_FAN11_TACH_R

21

C8008

.1uF

16V-10%

POP8

MOD_BMC_FAN12_TACH_R

21

C8009

POP8

.1uF

16V-10%

MOD_BMC_FAN13_TACH_R

21

C8010

.1uF

16V-10%

POP8

MOD_BMC_FAN14_TACH_R

21

C8011

.1uF

16V-10%

POP8

MOD_BMC_FAN15_TACH_R

21

C8006

.1uF

16V-10%

POP8

MOD_BMC_FAN16_TACH_R

+3.3V

R8014

1 2

+3.3V

R8011

1 2

+3.3V

R8013

1 2

+3.3V

R8012

1 2

+3.3V

21

R8015

+3.3V

21

R8010

8.2K-5%

POP8

1 2

POP8

8.2K-5%

POP8

1 2

POP8

8.2K-5%

1 2

POP8

8.2K-5%

POP8

1 2

POP8

8.2K-5%

POP8

R8040

1.5K-5%

POP8

8.2K-5%

POP8

R8041

1.5K-5%

POP8

R8045

1.5K-5%

R8042

1.5K-5%

R8043

1.5K-5%

R8044

1.5K-5%

21

K2

POP8

K2

2 1

POP8

BAT54SW

3

A2/K1

D8006

BAT54SW

K2

2 1

3

BAT54SW

K2

3

BAT54SW

K2

2 1

3

BAT54SW

3

A2/K1

D8010

BAT54SW

K2

3

A1

12

A2/K1

D8007

A2/K1

D8008

A2/K1

D8009

A1

A2/K1

D8005

1

ZONE 1 - CPU1 Fan

A1

POP8

16V-10%

.01uF

MOD_BMC_FAN11_TACH

C8024

21

86,88

ZONE 1 - CPU1/Mem FAn

MOD_BMC_FAN12_TACH

POP8

16V-10%

.01uF

C8023

21

A1

12

86,88

ZONE 3 - PSU Fan

2

MOD_BMC_FAN13_TACH_PRE

POP8

16V-10%

.01uF

C8026

21

A1

ZONE 3 - PSU Fan

MOD_BMC_FAN14_TACH_PRE

POP8

16V-10%

.01uF

C8025

21

ZONE 1 - CPU1 Fan

MOD_BMC_FAN15_TACH_PRE

POP8

16V-10%

.01uF

C8021

21

A1

12

ZONE 1 - CPU1/Mem Fan

MOD_BMC_FAN16_TACH_PRE

POP8

16V-10%

.01uF

C8022

21

80

3

80

4

86,94

MOD_BMC_FANSPEED_3

R8066

1 2

R8065

4.7K-5%

1 2

POP8

+3.3V

R8039

4.7K-5%

POP8

1 2

POP8

R8064

1 2

8.2K-5%

1

G

POP8

R8063

4.7K-5%

1 2

POP8

R8052

1 2

Q8017

D

3

S

2

2N7002

4.7K-5%

POP8

0-5%

POP8

R8036

560

G

1

POP8

C8019

NP

21

.01uF 50V

1 2

.01uF 50V

C8020

1 2

POP8

X

POP8

R8031

1 2

R8032

1 2

POP8

R8030

1-5% 1-5%

R8033

12

+

POP8

+12V

1-5%

1 2

21

1-5%

1 2

POP8

ROOM=FANS_FRONT3

C8003

POP8

10uF

16V 10%

C8004

1 2

POP8

10uF

21

C8005

16V 10%

POP8

10uF

16V 10%

C8002

1 2

POP8

10uF

16V 10%

M2LB_Change_Note: Changed fan circuitry. Continued on Sheet 94.

MODULE: DESC: REV: OF

BMC

SEC

FANS

4

INC.

C8033

270uF

POP8

16V-20%

ROUND ROCK,TEXAS

TITLE

SCHEM, PLN, SV, PE2950, MLK

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

REV.

HX601

A00

SHEET

9/7/2007 80 OF 136

DCBA

A B C

D

1

2

descriptive ROOMs (p.81-85)

including 49.9 ohms on ethernet term

P19_DT9231_jp_swap symbol

MOD_LOM1_REFCLK_SEL_UMP_MSB

NC_MOD_LOM1_PWR_IND_N NC_MOD_LOM1_ATTN_IND_N

MOD_LOM1_EXP_ESB_0_NB_0_P_C MOD_LOM1_EXP_ESB_0_NB_0_N_C MOD_LOM1_EXP_ESB_0_NB_1_P_C MOD_LOM1_EXP_ESB_0_NB_1_N_C MOD_LOM1_EXP_ESB_0_NB_2_P_C MOD_LOM1_EXP_ESB_0_NB_2_N_C MOD_LOM1_EXP_ESB_0_NB_3_P_C MOD_LOM1_EXP_ESB_0_NB_3_N_C

P18_DT9121_jp

83,95,128

R6036

1 2

81

LOM_PERST_N

1K-1%

82 82 82 82 82 82 82 82

81

48 48

50 50 50 50 50 50 50 50

MOD_LOM1_ATTN_BTTN_N

CK_100M_LOM1_P CK_100M_LOM1_N

EXP_ESB_0_SB_0_P EXP_ESB_0_SB_0_N EXP_ESB_0_SB_1_P EXP_ESB_0_SB_1_N EXP_ESB_0_SB_2_P EXP_ESB_0_SB_2_N EXP_ESB_0_SB_3_P EXP_ESB_0_SB_3_N

+3.3V

LAN_AUX

MOD_LOM1_PCIESDSVDD

MOD_LOM1_EPBPLLVDD MOD_LOM1_SDSPLLVDD

J16

DC_J16/SERPLL_VDDL

M16

DC_M16/EPBPLL_VDDL

M18

PCIE_SDSVDD/PCIE_TXVDDL

N20

DC_N20/PCIE_TXVDDL

P18

DC_P18/PCIE_TXVDDL

R20

DC_R20/PCIE_TXVDDL

U20

DC_U20/PCIE_RXVDDL

V18

DC_V18/PCIE_RXVDDL

W20

DC_W20/PCIE_RXVDDL

Y18

DC_Y18/PCIE_RXVDDL

C18

VDDIO_C18

C2

VDDIO_C2

C4

VDDIO_C4

C7

VDDIO_C7

H3

VDDIO_H3

N3

VDDIO_N3

V12

VDDIO_V12

V2

VDDIO_V2

V4

VDDIO_V4

V8

VDDIO_V8

N5

REFCLK_SEL/GPIO7

E1

PCIE_RST_N

F1

PWR_IND_LED_N

G1

ATTN_IND_LED_N

F2

ATTN_BTTN_N

T19

PCIE_REFCLK_P

T20

PCIE_REFCLK_N

M19

PCIE_TD0_P

M20

PCIE_TD0_N

N17

DC_N17/PCIE_TD1_P

N18

DC_N18/PCIE_TD1_N

P19

DC_P19/PCIE_TD2_P

P20

DC_P20/PCIE_TD2_N

R17

DC_R17/PCIE_TD3_P

R18

DC_R18/PCIE_TD3_N

Y19

PCIE_RD0_P

Y20

PCIE_RD0_N

W17

DC_W17/PCIE_RD1_P

W18

DC_W18/PCIE_RD1_N

V19

DC_V19/PCIE_RD2_P

V20

DC_V20/PCIE_RD2_N

U17

DC_U17/PCIE_RD3_P

U18

DC_U18/PCIE_RD3_N

82

ROOM=LOM1

D5

E10

E11

E12

E13

E14

VDDC_D5

VDDC_E10

VDDC_E11

VDDC_E12

VDDC_E13

E15E4E5E6E7

VDDC_E4

VDDC_E14

VDDC_E5

VDDC_E15

F10

VDDC_E6

VDDC_E7

VDDC_F10

F11

F12

F13

VDDC_F11

VDDC_F12

VDDC_F13

F14

F15

F16F5F6F7F8F9G14G5G6

VDDC_F5

VDDC_F6

VDDC_F7

VDDC_F8

VDDC_F9

VDDC_F14

VDDC_F15

VDDC_F16

U_LOM1

BCM5708C_RB2,REV B2

HETERO 1 OF 3

VDDC_G5

VDDC_G14

SUB6_Y8006

H14H4H6

VDDC_G6

VDDC_H4

VDDC_H14

81,82,133

J14J6K14K6L14L6M14M6N14N4N6

VDDC_H6

VDDC_K6

VDDC_J14

VDDC_K14

VDDC_L14

MOD_LOM1_P1V2AUX

VDDC_L6

VDDC_M6

VDDC_M14

VDDC_N14

VDDC_J6

VDDC_N4

VDDC_N6

P14

P15P5P6

VDDC_P5

VDDC_P14

VDDC_P15

R13R5R6R7T4T5T8U5U8

VDDC_P6

VDDC_R5

VDDC_R6

VDDC_R7

VDDC_T4

VDDC_T5

VDDC_R13

VDDC_T8

GPHY_PLLVDD/GPHYPLL_VDDL

AVDDL_E20/GMACPLL_VDDL

GPHY_TVCOI/TEST_CLK_OUT

81,82,133

VDDP_D16 VDDP_E16

VDDC_U5

VDDC_U8

BIASVDD/BIAS_VDDH

DC_F17/XTAL_VDDL

XTALVDD/XTAL_VDDH

AVDD_D11/GPHY_VDDH AVDD_C13/GPHY_VDDH AVDD_C12/GPHY_VDDH AVDD_C11/GPHY_VDDH

AVDDL_C14/GPHY_VDDL AVDDL_D12/GPHY_VDDL AVDDL_D14/GPHY_VDDL AVDDL_D13/GPHY_VDDL

VDDP_K5

VDDP_L5 VDDP_U12 VDDP_T12

PCIEPLL_VDDL

MOD_LOM1_GMACPLL_VDDL

REGSUP12

REGCNTL12

REGSEN12

VAUX_PRSNT

REGSUP25

REGOUT25

LINKLED_N

SPD100LED_N SPD1000LED_N TRAFFICLED_N

TRD3_N TRD3_P TRD2_N TRD2_P TRD1_N TRD1_P TRD0_N TRD0_P

MOD_LOM1_P2V5AUX

D16 E16 K5 L5 U12 T12

A15

F17

F18

T17

A17

D11 C13 C12 C11

C14 D12 D14 D13

E20

D19 C20 D20

A20

D18

D17

A1 A4 A3 B2

B10 A10 B11 A11 B12 A12 B13 A13

B16

MOD_LOM1_BIASVDD

MOD_LOM1_XTALVDDL

MOD_LOM1_XTALVDD

MOD_LOM1_PCIEPLLVDD

MOD_LOM1_GPHYPLLVDD

MOD_LOM1_P2V5AUX_AVDD

MOD_LOM1_REGCTL12 MOD_LOM1_REGSEN12

MOD_LOM1_P2V5AUX

MOD_LOM1_LINKLED_N

MOD_LOM1_ACTLED_N

21

C2958

MOD_LOM1_P1V2AUX_AVDD

MOD_LOM1_VAUX_PRES

MOD_LOM1_TRD4_N MOD_LOM1_TRD4_P MOD_LOM1_TRD3_N MOD_LOM1_TRD3_P MOD_LOM1_TRD2_N MOD_LOM1_TRD2_P MOD_LOM1_TRD1_N MOD_LOM1_TRD1_P

MOD_LOM1_GPHY_TVCOI

.1uF

C2957

10V-10%

21

C3194

21

.1uF

21

.1uF

C2917

10V-10%

1 2

C2962

10V-10%

81

4.7uF

6.3V-10%

.1uF

16V-10%

C2964

81

1 2

MOD_LOM1_GMACPLL_VDDL

R4625

X

1 2

21

C2916

21

R5177

0-5%

81,82,133

82 82 82 82 82 82 82 82

5721J: pop

82

4.7uF

6.3V-10%

21

.1uF

C2965

10V-10%

MOD_LOM1_P1V2AUX

R4566

1 2

4.7K-5%

82

+3.3V

LAN_AUX

R4565

1 2

POP6

replaced symbol

L1772

BLM21AH601

.1uF

C2961

10V-10%

21

C2918

4.7uF

POP6

R4561

X

4.7K-5%

1 2

5721J: no-pop filter

21

C2949

0-5%

NP6

21

.1uF

10V-10%

+3.3V

LAN_AUX

C2963

6.3V-10%

POP6

R4560

X

4.7K-5%

1 2

MOD_LOM1_P2V5AUX

21

C2915

21

4.7K-5%

21

.1uF

C2913

10V-10%

NP6

BLM11A601S

4.7uF

6.3V-10%

.1uF

10V-10%

Depop on 5708

+3.3V

LAN_AUX

4.7uF

6.3V-10%

L1771

MJD45H11

C3161

L1770

10uH 165MA

NP6

21

1

Q1937

1

Q1902

21

C2966

10uF 6.3V

Flash type selection

NP

21

MOD_LOM1_P1V2AUX

81,82,133

MOD_LOM1_P1V2AUX

+3.3V

LAN_AUX

3

21

C2959

4

3

4

21

.1uF

10V-10%

.1uF

10V-10%

21

C2914

81,82,133

4.7uF

6.3V-10%

81,82,133

1

81,82,133

2

3

4

drive level and frequency deviation.

match load capacitance, negative resistance,

the crystal circuit characterization to

These values will need to be changed after

values for these loading caps.

These are the starting

RIN ROUT 5721J: 5708:

C2910

R4553

1 2

0 Ohm 200 Ohm

20 Ohm 20 Ohm

MOD_LOM1_XTALI_R

25MHz-30ppm

21

27pF 50V

NP

R4564

X

4.7K-5%

1 2

R4555

1 2

X9

1 2

+3.3V

LAN_AUX

R4554

4.7K-5%

SUB6_30661

21

C2909

+3.3V

R5456

X

4.7K-5%

1 2

NP6

MOD_LOM1_REFCLK_SEL_UMP_MSB

71,72,77,83

R4563

27pF 50V

4.7K-5%

MOD_LOM1_ATTN_BTTN_N

4.7K-5%

1 2

R4591

20-1%

R4590

20-1%

MOD_LOM1_XTALO_R

83,87

POP6

5708: Pop R4554 5721: Pop R5456

MOD_LOM1_UMP_LSB

RIN

SUB6_30327

ROUT

I2C_ISO_NIC_SCL

I2C_ISO_NIC_SDA

81

WAKE_N

TP_MOD_LOM1_TMS TP_MOD_LOM1_TDO TP_MOD_LOM1_TDI TP_MOD_LOM1_TCK MOD_LOM1_TRST_N

MOD_LOM1_XTALI MOD_LOM1_XTALO

P23_DT9265_jp

F3

WAKE_N

C6

TMS

E2

TDO

B20

TDI

D1

TCK

B6

TRST_N

F20

XTALI/XTAL_P

F19

XTALO/XTAL_N

R4626

1 2

0-5%

R4627

1 2

0-5%

P22_DT9249_jp

SMB_CLK

SMB_DATA

A5

A2

POP6

X

MOD_LOM1_SMB_CLK

MOD_LOM1_SMB_DATA

NC_MII_SHARE0_MDC NC_MII_SHARE0_MDIO NC_MII_SHARE0_MDINT LOM1_CK25_OUT

85

NC_MOD_LOM1_HARD_RST_OUT NC_MOD_LOM1_EXT_PAUSE_IN MII_SHARE0_RXD0

92

MII_SHARE0_RXD1

92

NC_MII_SHARE0_RXER

R4557

1 2

+3.3V

LAN_AUX

4.7K-5%

R4556

X

1 2

POP6

4.7K-5%

DC_J1/EXT_MDC

DC_J2/EXT_MDIO

DC_J3/EXT_MDINT_N

DC_K1/CLK25_OUT

DC_K2/HARD_RST_OUT_N

DC_K3/EXT_PAUSE_IN

DC_L1/UMP_RXD_0

J1

J2J3K1K2K3L1L2L3M1

DC_L2/UMP_RXD_1

DC_L3/UMP_RXER

DC_M1/UMP_RXD_2

DC_M2/UMP_RXD_3

DC_M3/UMP_COL

DC_N1/UMP_RXCLK

DC_P1/UMP_TXCLK

DC_P2/UMP_RXDV

DC_P3/UMP_CRS

DC_R1/UMP_TXEN

DC_R2/UMP_TXER

DC_T1/UMP_TXD_0

DC_T2/UMP_TXD_1

DC_U1/UMP_TXD_2

M2M3N1

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

P1

P2

P3P4R1

R2

T1

T2T3U1

U2

DC_G3/PCIE_LINKUP_LED_N

DC_P4/GPIO6

DC_R4/GPIO5

DC_U2/UMP_TXD_3

DC_G2/DL_ACTIVE_LED_N

G3

G2

DC_T3/GPIO4

DC_R3/GPIO3

R4

R3

DC_W14/PLAY_DEAD

W14

DC_Y14/PCIE_DIS

Y14

DISABLE_ETHERNET_1

TP_MOD_LOM1_PLAY_DEAD

SHARED_BOOT_MODE_N

MOD_LOM1_GPIO4_PU MOD_LOM1_GPIO5_PU

MOD_LOM1_UMP_LSB

NC_MOD_LOM1_PCIE_LINKUP

NC_MOD_LOM1_DL_ACTIVE

MII_SHARE0_TXD3_R MII_SHARE0_TXD2_R MII_SHARE0_TXD1_R MII_SHARE0_TXD0_R

NC_MII_SHARE0_TXER

MII_SHARE0_TXEN_R NC_MII_SHARE0_CRS

MII_SHARE0_RXDV LOM1_SHARE0_CK25_TX LOM1_SHARE0_CK25_RX

NC_MII_SHARE0_COL

MII_SHARE0_RXD3

MII_SHARE0_RXD2

EEDATA/DC

EECLK/DC

GPIO0_TEST_CLK/GPIO0

GPIO1

GPIO2/SEL_VAUX_N

SCLK

SI SO

CS_N

RDAC

66

83,92 81 81 81

92 92 92 92

81,87

92

92 85 85

92 92

B8 A8 A18 A19 B19

B5 A6 B4 A7

B14

81 81

81

MOD_LOM1_EEDATA MOD_LOM1_EECLK NIC_ISO_ALERT1_N MOD_LOM1_SMBUS_LSB LOM1_SEL_VAUX_N

MOD_LOM1_SCK MOD_LOM1_SI MOD_LOM1_SO MOD_LOM1_CS_N

MOD_LOM1_RDAC

R4633

1 2

MOD_LOM1_GPIO4_PU MOD_LOM1_GPIO5_PU

NIC_ISO_ALERT1_N MOD_LOM1_SMBUS_LSB

1.27K-1%

R5634

1 2

81 81 81 81

21

R5633

4.7K-5%

81,87 81

R4559

R5263

4.7K-5%

1 2

4.7K-5%

1 2

+3.3V

LAN_AUX

4.7K-5%

R5265

X

1 2

R5264

1 2

85

R4777

NP

4.7K-5%

R5021

1 2

MLK: LOM EPROM PN changed

B:TR255,L:TR257

B:TR256,L:TR258

4.7K-5%

1 2

MOD_LOM1_SO

81

MOD_LOM1_SCK

81

MOD_LOM1_CS_N

81

M2LB_Change_Note: Programmed EEPROM different.

MODULE: DESC: REV: OF

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

HX601

DATE

R5019

4.7K-5%

1 2

N5119

INC.

R5020

X

4.7K-5%

1 2

4.7K-5%

IC, PROG IC, FLSH DSK PROG

MOD_LOM1_SI

81

U1101

2

SCK

3

RESET

4 5

SC WP

AT45DB011B

SUB8_TR255 SUB7_TR257

ROUND ROCK,TEXAS

SHEET

R5022

1 2

SEC

4.7K-5%

MOD_LOM1_CS_N

+3.3V

LAN_AUX

81

SOSI

7

GND

6

VCC

1 2

REV.

81 OF 1369/7/2007

MOD_LOM1_SCK

MOD_LOM1_SI MOD_LOM1_SO

R4776

LOM1

A00

1 2

3

81 81 81 81

4.7K-5%

4

DCBA

A B C

D

1

2

3

4

81

1 2

C3023

Common 2.5V Filters

MOD_LOM1_BIASVDD

21

.1uF

1 2

C2979

MOD_LOM1_XTALVDD

1 2

C2978

16V-10%

.1uF

16V-10%

C2924

21

C2923

Common 1.2V Filters

MOD_LOM1_PCIEPLLVDD

.1uF

C3024

MOD_LOM1_PCIESDSVDD

.1uF

C3022

16V-10%

.1uF

1 2

MOD_LOM1_GPHYPLLVDD

1 2

C3021

16V-10%

1 2

.1uF

C3020

C2930

16V-10%

1 2

C2980

16V-10%

.1uF

1 2

Populate for 5708

MOD_LOM1_XTALVDDL

.1uF

1 2

C2969

MOD_LOM1_EPBPLLVDD

C2968

NP6

MOD_LOM1_SDSPLLVDD

C2967

NP6

EXP_ESB_0_NB_0_P

49

EXP_ESB_0_NB_0_N

49

EXP_ESB_0_NB_1_P

49

EXP_ESB_0_NB_1_N

49

EXP_ESB_0_NB_2_P

49

EXP_ESB_0_NB_2_N

49

EXP_ESB_0_NB_3_P

49

EXP_ESB_0_NB_3_N

49

NP61 2

.1uF

1 2

16V-10%

21

C2920

16V-10%

21

C2919

16V-10%

Populate for 5708

4.7uF

6.3V-10%

4.7uF

6.3V-10%

21

4.7uF

.1uF

C2926

16V-10%

21

C2925

16V-10%

21

C2921

4.7uF

6.3V-10%

NP6

4.7uF

NP6

6.3V-10%

NP6

L1777

BLM11A601S

L1776

BLM11A601S

10uH 165MA

6.3V-10%

21

4.7uF

6.3V-10%

4.7uF

6.3V-10%

NP6

6.3V-10%

L1774

10uH 165MA

NP6

L1773

10uH 165MA

NP6

C2956

1 2

.1uF

16V-10%

NP6

C2954

1 2

.1uF

16V-10%

NP6

C2952

1 2

.1uF

16V-10%

C2951

1 2

NP6

.1uF

16V-10%

21

MOD_LOM1_P2V5AUX

21

L1781

L1779

BLM21AH601

L1778

10uH 165MA

L1775

21

BLM11A601S

NP6

C2955

1 2

.1uF

16V-10%

C2953

1 2

.1uF

16V-10%

C2960

1 2

.1uF

16V-10%

C3399

1 2

NP6

.1uF

16V-10%

200mA Ferrites

21

MOD_LOM1_P1V2AUX

21

MOD_LOM1_P1V2AUX

21

MOD_LOM1_EXP_ESB_0_NB_0_P_C

MOD_LOM1_EXP_ESB_0_NB_0_N_C

MOD_LOM1_EXP_ESB_0_NB_1_P_C

MOD_LOM1_EXP_ESB_0_NB_1_N_C

MOD_LOM1_EXP_ESB_0_NB_2_P_C

MOD_LOM1_EXP_ESB_0_NB_2_N_C

MOD_LOM1_EXP_ESB_0_NB_3_P_C

MOD_LOM1_EXP_ESB_0_NB_3_N_C

replaced symbol

81,82,133

A14 A16

A9 B15 B17 B18

B3

B7

B9 C10 C15 C16 C17 C19

C9 D10 D15

D3 E17 E18 E19 G10 G11 G12 G13 G17 G18 G19 G20

G7

G8

G9 H10 H11 H12 H13 H17

H2

H7

H8

H9 J10 J11 J12 J13 J15 J19 J20

J7

J8

J9 K10 K11 K12 K13 K17

K7

K8

K9 L10 L11 L12

VSS_A14 VSS_A16 VSS_A9 VSS_B15 VSS_B17 VSS_B18 VSS_B3 VSS_B7 VSS_B9 VSS_C10 VSS_C15 VSS_C16 VSS_C17 VSS_C19 VSS_C9 VSS_D10 VSS_D15 VSS_D3 VSS_E17 VSS_E18 VSS_E19 VSS_G10 VSS_G11 VSS_G12 VSS_G13 VSS_G17 VSS_G18 VSS_G19 VSS_G20 VSS_G7 VSS_G8 VSS_G9 VSS_H10 VSS_H11 VSS_H12 VSS_H13 VSS_H17 VSS_H2 VSS_H7 VSS_H8 VSS_H9 VSS_J10 VSS_J11 VSS_J12 VSS_J13 VSS_J15 VSS_J19 VSS_J20 VSS_J7 VSS_J8 VSS_J9 VSS_K10 VSS_K11 VSS_K12 VSS_K13 VSS_K17 VSS_K7 VSS_K8 VSS_K9 VSS_L10 VSS_L11 VSS_L12

81

U_LOM1

VSS_L13 VSS_L15 VSS_L16 VSS_L17 VSS_L18 VSS_L19 VSS_L20

VSS_L7 VSS_L8

VSS_L9 VSS_M10 VSS_M11 VSS_M12 VSS_M13 VSS_M15 VSS_M17

VSS_M7

VSS_M8

VSS_M9 VSS_N10 VSS_N11 VSS_N12 VSS_N13 VSS_N15 VSS_N16 VSS_N19

VSS_N2

VSS_N7

VSS_N8

VSS_N9 VSS_P10 VSS_P11 VSS_P12 VSS_P13 VSS_P16 VSS_P17

VSS_P7

VSS_P8

VSS_P9 VSS_R14 VSS_R15 VSS_R16 VSS_R19 VSS_T14 VSS_T18 VSS_U14 VSS_U15 VSS_U16 VSS_U19

VSS_U3 VSS_V14 VSS_V15 VSS_V16 VSS_V17 VSS_W12 VSS_W15 VSS_W16 VSS_W19

VSS_W3

VSS_W8 VSS_Y15 VSS_Y16 VSS_Y17

BCM5708C_RB2,REV B2

HETERO 3 OF 3

5708: E-JTAG interface to core

Depop on 5721J

R4569

1 2

4.7K-5%

L13 L15 L16 L17 L18 L19 L20 L7 L8 L9 M10 M11 M12 M13 M15 M17 M7 M8 M9 N10 N11 N12 N13 N15 N16 N19 N2 N7 N8 N9 P10 P11 P12 P13 P16 P17 P7 P8 P9 R14 R15 R16 R19 T14 T18 U14 U15 U16 U19 U3 V14 V15 V16 V17 W12 W15 W16 W19 W3 W8 Y15 Y16 Y17

MOD_LOM1_ETRST_N

NP6

ROOM=LOM1

+3.3V

POP6

TP_MOD_LOM1_5708_UART_TXD TP_MOD_LOM1_5708_UART_RXD

5721J Debug Interface

5721J: no-pop

TP_MOD_LOM1_5721_UART_TXD TP_MOD_LOM1_5721_UART_RXD

82

NP6

R4670

0-5%

1 2

82

R5790

1 2

0-5%

R5791

1 2

0-5%

5708 Debug Interface

TP_MOD_LOM1_5708_MODE0 TP_MOD_LOM1_5708_MODE1 TP_MOD_LOM1_5708_MODE2 TP_MOD_LOM1_5708_MODE3 TP_MOD_LOM1_5708_MODE4

TP_MOD_LOM1_MODE0 TP_MOD_LOM1_MODE1 TP_MOD_LOM1_MODE2 TP_MOD_LOM1_MODE3

MOD_LOM1_ETRST_N TP_MOD_LOM1_ETDO TP_MOD_LOM1_ETMS TP_MOD_LOM1_ETCK TP_MOD_LOM1_ETDI

TP_MOD_LOM1_CLKIN_SEL

TP_MOD_LOM1_XTAL_ADJ3

TP_MOD_LOM1_XTAL_ADJ2 TP_MOD_LOM1_XTAL_ADJ0

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

MOD_LOM1_TRDTCT1

X X

NC_MOD_LOM1_D9 NC_MOD_LOM1_E8 NC_MOD_LOM1_E9

NC_MOD_LOM1_H1 NC_MOD_LOM1_H18 NC_MOD_LOM1_H19 NC_MOD_LOM1_H20

NC_MOD_LOM1_J18 NC_MOD_LOM1_J17 NC_MOD_LOM1_K15 NC_MOD_LOM1_K16 NC_MOD_LOM1_K18

81

MOD_LOM1_TRD1_P

MOD_LOM1_TRD1_N

MOD_LOM1_TRD2_P

MOD_LOM1_TRD2_N

MOD_LOM1_TRD3_P

MOD_LOM1_TRD3_N

MOD_LOM1_TRD4_P

MOD_LOM1_TRD4_N

R4642

1 2

W1

PCIVDDIO_W1/DC

W2

PCIVDDIO_W2/DC

W4

PCIVDDIO_W4/DC

W7

PCIVDDIO_W7/DC

Y1

PCIVDDIO_Y1/DC

Y2

PCIVDDIO_Y2/DC

Y3

PCIVDDIO_Y3/DC

Y4

PCIVDDIO_Y4/DC

Y5

PCIVDDIO_Y5/DC

D7

NC_D7/NC_MODE_0

C3

NC_C3/NC_MODE_1

D6

NC_D6/NC_MODE_2

D4

NC_D4/NC_MODE_3

C5

NC_C5/NC_MODE_4

H5

DC_H5/UART_TXD

M5

DC_M5/UART_RXD

G15

NC_MODE_0/NC

G16

NC_MODE_1/NC

H15

NC_MODE_2/NC

H16

NC_MODE_3/NC

T16

UART_TXD/DC_T16

Y10

UART_RXD/DC_Y10

B1

DC_B1/DC_ETRST_N

C1

DC_C1/DC_ETDO

D2

DC_D2/NC_ETMS

E3

DC_E3/NC_ETCK

F4

DC_F4/NC_ETDI

C8

DC_C8/XTAL_BYPASS

D8

DC_D8/CLKIN_SEL

D9

NC_D9

E8

NC_E8

E9

NC_E9

G4

NC_G4

H1

NC_H1

H18

NC_H18

H19

NC_H19

H20

NC_H20

J4

NC_J4

J5

NC_J5

J18

NC_J18

J17

NC_J17

K15

NC_K15

K16

NC_K16

K18

NC_K18

R4640

49.9-1%

21

C3016

1 2

.1uF

10V-10%

R4639

49.9-1%

1 2

BCM5708C_RB2,REV B2

R4638

49.9-1%

1 2

21

C3015

MOD_LOM1_TRDTCT2

.1uF

10V-10%

U_LOM1

HETERO 2 OF 3

R4637

49.9-1%

1 2

C3014

81,82,133

R4636

49.9-1%

1 2

21

.1uF

10V-10%

MOD_LOM1_TRDTCT3

MOD_LOM1_P2V5AUX

R4641

49.9-1%

1 2

NC_K19 NC_K20

NC_R10 NC_R11 NC_R12

NC_T10 NC_T11 NC_T13 NC_T15

NC_U10 NC_U11 NC_U13

NC_V10 NC_V11 NC_V13

NC_W10 NC_W11 NC_W13

NC_Y11 NC_Y12 NC_Y13

49.9-1%

21

C3013

NC_K4 NC_L4 NC_M4

NC_R8 NC_R9

NC_T6 NC_T7 NC_T9

NC_U4 NC_U6 NC_U7 NC_U9 NC_V1

NC_V3 NC_V5 NC_V6 NC_V7 NC_V9

NC_W5 NC_W6 NC_W9

NC_Y6 NC_Y7 NC_Y8 NC_Y9

R4635

1 2

.1uF

K19 K20 K4 L4 M4 R10 R11 R12 R8 R9 T10 T11 T13 T15 T6 T7 T9 U10 U11 U13 U4 U6 U7 U9 V1 V10 V11 V13 V3 V5 V6 V7 V9 W10 W11 W13 W5 W6 W9 Y11 Y12 Y13 Y6 Y7 Y8 Y9

C3012

49.9-1%

MOD_LOM1_TRDTCT4

10V-10%

NC_MOD_LOM1_K19 NC_MOD_LOM1_K20 TP_MOD_LOM1_XTAL_ADJ1 NC_MOD_LOM1_L4 NC_MOD_LOM1_M4 NC_MOD_LOM1_R10 NC_MOD_LOM1_R11 NC_MOD_LOM1_R12 NC_MOD_LOM1_R8 NC_MOD_LOM1_R9 NC_MOD_LOM1_T10 NC_MOD_LOM1_T11 NC_MOD_LOM1_T13 NC_MOD_LOM1_T15 NC_MOD_LOM1_T6 NC_MOD_LOM1_T7 NC_MOD_LOM1_T9 NC_MOD_LOM1_U10 NC_MOD_LOM1_U11 NC_MOD_LOM1_U13 NC_MOD_LOM1_U4 NC_MOD_LOM1_U6 NC_MOD_LOM1_U7 NC_MOD_LOM1_U9 NC_MOD_LOM1_V1 NC_MOD_LOM1_V10 NC_MOD_LOM1_V11 NC_MOD_LOM1_V13 NC_MOD_LOM1_V3 NC_MOD_LOM1_V5 NC_MOD_LOM1_V6 NC_MOD_LOM1_V7 NC_MOD_LOM1_V9 NC_MOD_LOM1_W10 NC_MOD_LOM1_W11 NC_MOD_LOM1_W13 NC_MOD_LOM1_W5 NC_MOD_LOM1_W6 NC_MOD_LOM1_Y10 NC_MOD_LOM1_Y11 NC_MOD_LOM1_Y12 NC_MOD_LOM1_Y13 NC_MOD_LOM1_Y6 NC_MOD_LOM1_Y7 NC_MOD_LOM1_Y8 NC_MOD_LOM1_Y9

+3.3V

LAN_AUX

R4594

1 2

200-5%

R5332

1 2

0 OHM

MOD_LOM1_CT_P2V5AUX_FIL

.1uF

C3011

10V-10%

21

.1uF

C3010

10V-10%

21

LAN_AUX

.1uF

C3009

10V-10%

+3.3V

21

.1uF

81,82,133

MOD_LOM1_ACTLED_R

MOD_LOM1_LINKLED_N

10V-10%

81

MOD_LOM1_P1V2AUX

MOD_LOM1_ACTLED_N

81

NP

X

1 2

C3101

R4595

1 2

200-5%

NP

21

4.7uF

C3017

6.3V-10%

4.7uF

C3001

6.3V-10%

C2929

C2927

470pF

50V-10%

X

1 2

C3103

1 2

470pF

.1uF

C3008

16V-10%

.1uF

C3000

16V-10%

NP

X

1 2

C3102

NP

X

1 2

C3104

50V-10%

.1uF

1 2

.1uF

1 2

470pF

50V-10%

J_ETH1

13

14

16

17 SH1 15

470pF

50V-10%

1 2

C3007

16V-10%

1 2

C2999

16V-10%

C1

A1

11

TRD1+

12

TRCT1

10

TRD1-

4

TRD2+

6

TRCT2

5

TRD2-

3

TRD3+

1

TRCT3

2

TRD3-

8

TRD4+

7

TRCT4

9

TRD4-

GREEN

ORANGE

MOD_LOM1_LINKLED_R

NOTE: on the 5721J some of these decoupling capacitors can be depopped

--consult your local SNaC Engineer

.1uF

1 2

C3006

16V-10%

.1uF

1 2

C2998

16V-10%

YELLOW

COMMON

RJ45 MAGNETIC JACK W/2 LED'S

.1uF

C3005

16V-10%

.1uF

C2997

16V-10%

.1uF

1 2

C3004

16V-10%

.1uF

C2996

16V-10%

1 2

4x75ohms

1000pF 2kV

.1uF

1 2

C3003

16V-10%

.1uF

1 2

C2995

16V-10%

.1uF

C3002

16V-10%

.1uF

C2994

16V-10%

RJ45

Shield

1 2

.1uF

1

2

3

6

4

5

7

8

SH1

SH2

1 2

C2982

16V-10%

1 2

C2981

16V-10%

1

2

.1uF

16V-10%

.1uF

16V-10%

3

+3.3V

LAN_AUX

C2922

+3.3V

POP6

C2928

X

21

4.7uF

C2977

6.3V-10%

4.7uF

C2986

6.3V-10%

1 2

C2993

.1uF

1 2

No-pop for 5708.

1 2

C2976

16V-10%

.1uF

C2985

16V-10%

1 2

.1uF

C2992

16V-10%

.1uF

C2975

16V-10%

.1uF

C2984

16V-10%

.1uF

1 2

C2991

16V-10%

.1uF

C2974

16V-10%

.1uF

C2983

16V-10%

.1uF

1 2

C2990

16V-10%

.1uF

C2973

16V-10%

.1uF

16V-10%

.1uF

1 2

NS: Populating some 0.1uF's since 3.3V is still being routed to this chip.

MODULE: DESC: REV: OF

C2989

16V-10%

.1uF

C2972

16V-10%

.1uF

1 2

C2988

16V-10%

.1uF

C2971

16V-10%

.1uF

1 2

C2987

16V-10%

.1uF

C2970

16V-10%

SEC

.1uF

1 2

16V-10%

.1uF

16V-10%

2 2

C3018

C3019

1 2

LOM1

.1uF

16V-10%

.1uF

16V-10%

4

INC.

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

HX601

DATE

ROUND ROCK,TEXAS

REV.

A00

SHEET

9/7/2007 82 OF 136

DCBA

A B C

D

1

P19_DT9231_jp_swap symbol

83

MOD_LOM2_REFCLK_SEL_UMP_MSB

81,95,128

+3.3V

LAN_AUX

LOM_PERST_N

MOD_LOM2_PCIESDSVDD

MOD_LOM2_EPBPLLVDD MOD_LOM2_SDSPLLVDD

J16

DC_J16/SERPLL_VDDL

M16

DC_M16/EPBPLL_VDDL

M18

PCIE_SDSVDD/PCIE_TXVDDL

N20

DC_N20/PCIE_TXVDDL

P18

DC_P18/PCIE_TXVDDL

R20

DC_R20/PCIE_TXVDDL

U20

DC_U20/PCIE_RXVDDL

V18

DC_V18/PCIE_RXVDDL

W20

DC_W20/PCIE_RXVDDL

Y18

DC_Y18/PCIE_RXVDDL

C18

VDDIO_C18

C2

VDDIO_C2

C4

VDDIO_C4

C7

VDDIO_C7

H3

VDDIO_H3

N3

VDDIO_N3

V12

VDDIO_V12

V2

VDDIO_V2

V4

VDDIO_V4

V8

VDDIO_V8

N5

REFCLK_SEL/GPIO7

E1

PCIE_RST_N

84

ROOM=LOM2

D5

E10

E11

E12

E13

E14

VDDC_D5

VDDC_E10

VDDC_E11

VDDC_E12

VDDC_E13

E15E4E5E6E7

VDDC_E4

VDDC_E14

VDDC_E5

VDDC_E15

F10

VDDC_E6

VDDC_E7

VDDC_F10

F11

F12

F13

VDDC_F11

VDDC_F12

VDDC_F13

F14

F15

F16F5F6F7F8F9G14G5G6

VDDC_F5

VDDC_F6

VDDC_F14

VDDC_F15

VDDC_F16

VDDC_F7

VDDC_F8

VDDC_F9

VDDC_G14

H14H4H6

VDDC_G5

VDDC_G6

VDDC_H14

83,84,133

J14J6K14K6L14L6M14M6N14N4N6

VDDC_H4

VDDC_H6

VDDC_K6

VDDC_J14

VDDC_K14

VDDC_L6

VDDC_L14

VDDC_M14

MOD_LOM2_P1V2AUX

P14

P15P5P6

VDDC_J6

VDDC_M6

VDDC_N14

VDDC_N4

VDDC_N6

VDDC_P14

VDDC_P15

R13R5R6R7T4T5T8U5U8

VDDC_P5

VDDC_P6

VDDC_R5

VDDC_R6

VDDC_R7

VDDC_R13

VDDC_T4

83,84,133

VDDP_D16 VDDP_E16

VDDC_T5

VDDC_T8

VDDC_U5

VDDC_U8

BIASVDD/BIAS_VDDH

DC_F17/XTAL_VDDL

XTALVDD/XTAL_VDDH

GPHY_PLLVDD/GPHYPLL_VDDL

AVDD_D11/GPHY_VDDH AVDD_C13/GPHY_VDDH AVDD_C12/GPHY_VDDH AVDD_C11/GPHY_VDDH

AVDDL_C14/GPHY_VDDL AVDDL_D12/GPHY_VDDL AVDDL_D14/GPHY_VDDL AVDDL_D13/GPHY_VDDL

AVDDL_E20/GMACPLL_VDDL

VDDP_K5

VDDP_L5 VDDP_U12 VDDP_T12

PCIEPLL_VDDL

MOD_LOM2_GMACPLL_VDDL

MOD_LOM2_P2V5AUX

D16 E16 K5 L5 U12 T12

A15

F17

F18

T17

A17

D11 C13 C12 C11

C14 D12 D14 D13

E20

MOD_LOM2_BIASVDD

MOD_LOM2_XTALVDDL

MOD_LOM2_XTALVDD

MOD_LOM2_PCIEPLLVDD

MOD_LOM2_GPHYPLLVDD

MOD_LOM2_P2V5AUX_AVDD

21

C3239

MOD_LOM2_P1V2AUX_AVDD

.1uF

C3238

10V-10%

21

C3236

21

.1uF

21

.1uF

C3222

10V-10%

21

C3242

10V-10%

83

4.7uF

6.3V-10%

.1uF

10V-10%

C3244

83

MOD_LOM2_GMACPLL_VDDL

POP2

R5096

X

1 2

5721J: pop

84

replaced symbol

84

L1801

21

BLM21AH601

.1uF

C3241

10V-10%

21

C3221

21

4.7uF

6.3V-10%

.1uF

C3245

10V-10%

5721J: no-pop filter

0-5%

21

NP2

21

C3237

MOD_LOM2_P2V5AUX

21

.1uF

C3220

10V-10%

.1uF

C3218

10V-10%

4.7uF

21

BLM11A601S

6.3V-10%

4.7uF

6.3V-10%

NP2

L1800

L1799

10uH 165MA

NP2

21

MOD_LOM2_P1V2AUX

21

MOD_LOM2_P1V2AUX

83,84,133

+3.3V

LAN_AUX

83,84,133

1

83,84,133

2

84 84 84 84 84 84 84 84

NC_MOD_LOM2_PWR_IND_N NC_MOD_LOM2_ATTN_IND_N

83

48 48

MOD_LOM2_EXP_ESB_1_NB_0_P_C MOD_LOM2_EXP_ESB_1_NB_0_N_C MOD_LOM2_EXP_ESB_1_NB_1_P_C MOD_LOM2_EXP_ESB_1_NB_1_N_C MOD_LOM2_EXP_ESB_1_NB_2_P_C MOD_LOM2_EXP_ESB_1_NB_2_N_C MOD_LOM2_EXP_ESB_1_NB_3_P_C MOD_LOM2_EXP_ESB_1_NB_3_N_C

50 50 50 50 50 50 50 50

MOD_LOM2_ATTN_BTTN_N

CK_100M_LOM2_P CK_100M_LOM2_N

EXP_ESB_1_SB_0_P EXP_ESB_1_SB_0_N EXP_ESB_1_SB_1_P EXP_ESB_1_SB_1_N EXP_ESB_1_SB_2_P EXP_ESB_1_SB_2_N EXP_ESB_1_SB_3_P EXP_ESB_1_SB_3_N

F1

PWR_IND_LED_N

G1

ATTN_IND_LED_N

F2

ATTN_BTTN_N

T19

PCIE_REFCLK_P

T20

PCIE_REFCLK_N

M19

PCIE_TD0_P

M20

PCIE_TD0_N

N17

DC_N17/PCIE_TD1_P

N18

DC_N18/PCIE_TD1_N

P19

DC_P19/PCIE_TD2_P

P20

DC_P20/PCIE_TD2_N

R17

DC_R17/PCIE_TD3_P

R18

DC_R18/PCIE_TD3_N

Y19

PCIE_RD0_P

Y20

PCIE_RD0_N

W17

DC_W17/PCIE_RD1_P

W18

DC_W18/PCIE_RD1_N

V19

DC_V19/PCIE_RD2_P

V20

DC_V20/PCIE_RD2_N

U17

DC_U17/PCIE_RD3_P

U18

DC_U18/PCIE_RD3_N

U_LOM2

BCM5708C_RB2,REV B2

HETERO 1 OF 3

SUB2_Y8006

REGSUP12

REGCNTL12

REGSEN12

VAUX_PRSNT

REGSUP25

REGOUT25

LINKLED_N

SPD100LED_N SPD1000LED_N TRAFFICLED_N

TRD3_N TRD3_P TRD2_N TRD2_P TRD1_N TRD1_P TRD0_N TRD0_P

GPHY_TVCOI/TEST_CLK_OUT

D19 C20 D20

A20

D18

D17

A1 A4 A3 B2

B10 A10 B11 A11 B12 A12 B13 A13

B16

MOD_LOM2_REGCTL12 MOD_LOM2_REGSEN12

MOD_LOM2_VAUX_PRES

MOD_LOM2_P2V5AUX

MOD_LOM2_LINKLED_N

MOD_LOM2_ACTLED_N

MOD_LOM2_TRD4_N MOD_LOM2_TRD4_P MOD_LOM2_TRD3_N MOD_LOM2_TRD3_P MOD_LOM2_TRD2_N MOD_LOM2_TRD2_P MOD_LOM2_TRD1_N MOD_LOM2_TRD1_P

MOD_LOM2_GPHY_TVCOI

84

84 84 84 84 84 84 84 84

R5178

1 2

0-5%

83,84,133

84

+3.3V

LAN_AUX

R5113

R5114

1 2

4.7K-5%

21

C3223

R5110

X

4.7K-5%

1 2

4.7uF

6.3V-10%

POP2

4.7K-5%

1 2

+3.3V

LAN_AUX

C3243

POP2

R5109

X

1 2

MOD_LOM2_P1V2AUX

21

.1uF

10V-10%

Depop on 5708

4.7K-5%

MJD45H11

Q1938

MJD45H11

Q1925

21

C3322

+3.3V

LAN_AUX

1

21

C3246

10uF 6.3V

21

3

C3240

4

3

4

.1uF

10V-10%

Flash type selection

NP

.1uF

C3219

10V-10%

83,84,133

21

4.7uF

6.3V-10%

2

3

4

5721J: 5708:

C3217

R5103

drive level and frequency deviation.

match load capacitance, negative resistance,

the crystal circuit characterization to

These values will need to be changed after

values for these loading caps.

These are the starting

RIN ROUT 0 Ohm 200 Ohm 20 Ohm 20 Ohm

MOD_LOM2_XTALI_R

X10

1 2

25MHz-30ppm

21

27pF 50V

+3.3V

LAN_AUX

NP

1 2

R5112

X

4.7K-5%

1 2

R5105

1 2

R5104

4.7K-5%

SUB2_30661

21

C3216

+3.3V

R5457

X

4.7K-5%

1 2

NP2

71,72,77,81

R5111

27pF 50V

4.7K-5%

1 2

MOD_LOM2_REFCLK_SEL_UMP_MSB

4.7K-5%

1 2

R5148

20-1%

R5149

20-1%

MOD_LOM2_XTALO_R

81,87

POP2

5708: Pop R5104 5721: Pop 5457

MOD_LOM2_ATTN_BTTN_N

MOD_LOM2_UMP_LSB

SUB2_30327

I2C_ISO_NIC_SCL

I2C_ISO_NIC_SDA

RIN

ROUT

WAKE_N

TP_MOD_LOM2_TMS TP_MOD_LOM2_TDO TP_MOD_LOM2_TDI TP_MOD_LOM2_TCK MOD_LOM2_TRST_N

MOD_LOM2_XTALI MOD_LOM2_XTALO

83 83 83

F3

WAKE_N

C6

TMS

E2

TDO

B20

TDI

D1

TCK

B6

TRST_N

F20

XTALI/XTAL_P

F19

XTALO/XTAL_N

R5097

1 2

0-5%

R5098

1 2

0-5%

P23_DT9265_jp

P22_DT9249_jp

SMB_CLK

SMB_DATA

A5

A2

POP2

MOD_LOM2_SMB_CLK

MOD_LOM2_SMB_DATA

NC_MII_SHARE1_MDC NC_MII_SHARE1_MDIO NC_MII_SHARE1_MDINT LOM2_CK25_OUT

85

NC_MOD_LOM2_HARD_RST_OUT NC_MOD_LOM2_EXT_PAUSE_IN MII_SHARE1_RXD0

92

MII_SHARE1_RXD1

92

NC_MII_SHARE1_RXER

R5107

X

1 2

+3.3V

LAN_AUX

4.7K-5%

R5106

X

1 2

POP2

4.7K-5%

DC_J1/EXT_MDC

DC_J2/EXT_MDIO

DC_J3/EXT_MDINT_N

DC_K1/CLK25_OUT

DC_K2/HARD_RST_OUT_N

DC_K3/EXT_PAUSE_IN

DC_L1/UMP_RXD_0

J1

J2J3K1K2K3L1L2L3M1

DC_L2/UMP_RXD_1

DC_L3/UMP_RXER

DC_M1/UMP_RXD_2

DC_M2/UMP_RXD_3

DC_M3/UMP_COL

DC_N1/UMP_RXCLK

DC_P1/UMP_TXCLK

DC_P2/UMP_RXDV

DC_P3/UMP_CRS

DC_R1/UMP_TXEN

DC_R2/UMP_TXER

DC_T1/UMP_TXD_0

DC_T2/UMP_TXD_1

DC_U1/UMP_TXD_2

M2M3N1

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

P1

P2

P3P4R1

R2

T1

T2T3U1

U2

DC_G3/PCIE_LINKUP_LED_N

DC_P4/GPIO6

DC_R4/GPIO5

DC_U2/UMP_TXD_3

DC_G2/DL_ACTIVE_LED_N

G3

G2

DC_T3/GPIO4

DC_R3/GPIO3

R4

R3

DC_W14/PLAY_DEAD

W14

DC_Y14/PCIE_DIS

Y14

DISABLE_ETHERNET_2

TP_MOD_LOM2_PLAY_DEAD

SHARED_BOOT_MODE_N

MOD_LOM2_GPIO4_PU MOD_LOM2_GPIO5_PU

MOD_LOM2_UMP_LSB

NC_MOD_LOM2_PCIE_LINKUP

NC_MOD_LOM2_DL_ACTIVE

MII_SHARE1_TXD3_R MII_SHARE1_TXD2_R MII_SHARE1_TXD1_R MII_SHARE1_TXD0_R

NC_MII_SHARE1_TXER

MII_SHARE1_TXEN_R NC_MII_SHARE1_CRS

MII_SHARE1_RXDV LOM2_SHARE1_CK25_TX LOM2_SHARE1_CK25_RX

NC_MII_SHARE1_COL

MII_SHARE1_RXD3

MII_SHARE1_RXD2

EEDATA/DC

EECLK/DC

GPIO0_TEST_CLK/GPIO0

GPIO1

GPIO2/SEL_VAUX_N

SCLK

SI SO

CS_N

RDAC

66

81,92 83 83 83

92 92 92 92

83,87

92

92 85 85

92 92

B8 A8 A18 A19 B19

B5 A6 B4 A7

B14

83 83

83

MOD_LOM2_EEDATA MOD_LOM2_EECLK NIC_ISO_ALERT2_N MOD_LOM2_SMBUS_LSB LOM2_SEL_VAUX_N

MOD_LOM2_SCK MOD_LOM2_SI MOD_LOM2_SO MOD_LOM2_CS_N

MOD_LOM2_RDAC

R5152

1 2

MOD_LOM2_GPIO4_PU MOD_LOM2_GPIO5_PU NIC_ISO_ALERT2_N MOD_LOM2_SMBUS_LSB

1.27K-1%

83 83 83 83

R563621R5635

1 2

4.7K-5%

83,87 83

R5266

4.7K-5%

1 2

R5108

LAN_AUX

4.7K-5%

1 2

+3.3V

R5267

1 2

NP

R5268

X

1 2

4.7K-5%

85

R5116

4.7K-5%

MLK: LOM EPROM PN changed

B:TR255,L:TR257

B:TR256,L:TR258

4.7K-5%

1 2

MOD_LOM2_SO

83

MOD_LOM2_SCK

83

MOD_LOM2_CS_N

83

M2LB_Change_Note: Programmed EEPROM different.

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

HX601

DATE

R5101

1 2

N5119

R5099

4.7K-5%

1 2

IC, PROG IC, FLSH

R5100

X

4.7K-5%

1 2

R5102

4.7K-5%

1 2

MOD_LOM2_CS_N

4.7K-5%

MOD_LOM2_SCK

MOD_LOM2_SI MOD_LOM2_SO

+3.3V

LAN_AUX

DSK PROG

MOD_LOM2_SI

83

U1109

81

SOSI

2

SCK

3

RESET

4 5

SC WP

AT45DB011B

GND VCC

7 6

SUB8_TR255 SUB7_TR257

MODULE: DESC: REV: OF

SEC

1 2

INC.

ROUND ROCK,TEXAS

REV.

A00

SHEET

83 OF 1369/7/2007

83 83 83 83

R5115

1 2

LOM2

3

4.7K-5%

4

DCBA

A B C

D

1

2

3

4

83

1 2

C3303

Common 2.5V Filters

MOD_LOM2_BIASVDD

21

.1uF

1 2

C3259

MOD_LOM2_XTALVDD

1 2

C3258

10V-10%

.1uF

10V-10%

C3229

21

C3228

Common 1.2V Filters

MOD_LOM2_PCIEPLLVDD

.1uF

C3304

MOD_LOM2_PCIESDSVDD

.1uF

C3302

10V-10%

.1uF

1 2

MOD_LOM2_GPHYPLLVDD

1 2

C3301

10V-10%

1 2

.1uF

C3300

C3235

10V-10%

1 2

C3260

10V-10%

.1uF

1 2

Populate for 5708

MOD_LOM2_XTALVDDL

.1uF

1 2

MOD_LOM2_EPBPLLVDD

C3248

NP2

MOD_LOM2_SDSPLLVDD

C3247

NP2

EXP_ESB_1_NB_0_P

49

EXP_ESB_1_NB_0_N

49

EXP_ESB_1_NB_1_P

49

EXP_ESB_1_NB_1_N

49

EXP_ESB_1_NB_2_P

49

EXP_ESB_1_NB_2_N

49

EXP_ESB_1_NB_3_P

49

EXP_ESB_1_NB_3_N

49

NP2

1 2

C3249

.1uF

10V-10%

21

C3225

10V-10%

21

C3224

10V-10%

Populate for 5708

4.7uF

6.3V-10%

4.7uF

6.3V-10%

21

4.7uF

.1uF

C3231

10V-10%

21

C3230

10V-10%

21

C3226

4.7uF

6.3V-10%

NP2

4.7uF

NP2

6.3V-10%

NP2

L1806

BLM11A601S

L1805

BLM11A601S

L1809

10uH 165MA

6.3V-10%

21

4.7uF

6.3V-10%

4.7uF

6.3V-10%

NP2

6.3V-10%

L1803

10uH 165MA

NP2

10uH 165MA

C3310

1 2

.1uF

10V-10%

NP2

C3309

1 2

.1uF

10V-10%

C3307

1 2

NP2

.1uF

10V-10%

C3306

1 2

NP2

.1uF

10V-10%

21

MOD_LOM2_P2V5AUX

21

L1808

BLM21AH601

L1807

10uH 165MA

L1804

21

BLM11A601S

21

L1802

NP2

C3312

1 2

.1uF

10V-10%

C3308

1 2

.1uF

10V-10%

C3311

1 2

NP2

.1uF

10V-10%

C3305

1 2

NP2

.1uF

10V-10%

200mA Ferrites

MOD_LOM2_P1V2AUX

21

MOD_LOM2_P1V2AUX

21

MOD_LOM2_EXP_ESB_1_NB_0_P_C

MOD_LOM2_EXP_ESB_1_NB_0_N_C

MOD_LOM2_EXP_ESB_1_NB_1_P_C

MOD_LOM2_EXP_ESB_1_NB_1_N_C

MOD_LOM2_EXP_ESB_1_NB_2_P_C

MOD_LOM2_EXP_ESB_1_NB_2_N_C

MOD_LOM2_EXP_ESB_1_NB_3_P_C

MOD_LOM2_EXP_ESB_1_NB_3_N_C

replaced symbol

83,84,133

A14 A16

A9 B15 B17 B18

B3

B7

B9 C10 C15 C16 C17 C19

C9 D10 D15

D3 E17 E18 E19 G10 G11 G12 G13 G17 G18 G19 G20

G7

G8

G9 H10 H11 H12 H13 H17

H2

H7

H8

H9 J10 J11 J12 J13 J15 J19 J20

J7

J8

J9 K10 K11 K12 K13 K17

K7

K8

K9 L10 L11 L12

VSS_A14 VSS_A16 VSS_A9 VSS_B15 VSS_B17 VSS_B18 VSS_B3 VSS_B7 VSS_B9 VSS_C10 VSS_C15 VSS_C16 VSS_C17 VSS_C19 VSS_C9 VSS_D10 VSS_D15 VSS_D3 VSS_E17 VSS_E18 VSS_E19 VSS_G10 VSS_G11 VSS_G12 VSS_G13 VSS_G17 VSS_G18 VSS_G19 VSS_G20 VSS_G7 VSS_G8 VSS_G9 VSS_H10 VSS_H11 VSS_H12 VSS_H13 VSS_H17 VSS_H2 VSS_H7 VSS_H8 VSS_H9 VSS_J10 VSS_J11 VSS_J12 VSS_J13 VSS_J15 VSS_J19 VSS_J20 VSS_J7 VSS_J8 VSS_J9 VSS_K10 VSS_K11 VSS_K12 VSS_K13 VSS_K17 VSS_K7 VSS_K8 VSS_K9 VSS_L10 VSS_L11 VSS_L12

83

U_LOM2

VSS_L13 VSS_L15 VSS_L16 VSS_L17 VSS_L18 VSS_L19 VSS_L20

VSS_L7 VSS_L8

VSS_L9 VSS_M10 VSS_M11 VSS_M12 VSS_M13 VSS_M15 VSS_M17

VSS_M7

VSS_M8

VSS_M9 VSS_N10 VSS_N11 VSS_N12 VSS_N13 VSS_N15 VSS_N16 VSS_N19

VSS_N2

VSS_N7

VSS_N8

VSS_N9 VSS_P10 VSS_P11 VSS_P12 VSS_P13 VSS_P16 VSS_P17

VSS_P7

VSS_P8

VSS_P9 VSS_R14 VSS_R15 VSS_R16 VSS_R19 VSS_T14 VSS_T18 VSS_U14 VSS_U15 VSS_U16 VSS_U19

VSS_U3 VSS_V14 VSS_V15 VSS_V16 VSS_V17 VSS_W12 VSS_W15 VSS_W16 VSS_W19

VSS_W3

VSS_W8 VSS_Y15 VSS_Y16 VSS_Y17

BCM5708C_RB2,REV B2

HETERO 3 OF 3

5708: E-JTAG interface to core

Depop on 5721J

MOD_LOM2_ETRST_N

NP2

R5166

1 2

4.7K-5%

L13 L15 L16 L17 L18 L19 L20 L7 L8 L9 M10 M11 M12 M13 M15 M17 M7 M8 M9 N10 N11 N12 N13 N15 N16 N19 N2 N7 N8 N9 P10 P11 P12 P13 P16 P17 P7 P8 P9 R14 R15 R16 R19 T14 T18 U14 U15 U16 U19 U3 V14 V15 V16 V17 W12 W15 W16 W19 W3 W8 Y15 Y16 Y17

ROOM=LOM2

+3.3V

POP2

TP_MOD_LOM2_5708_UART_TXD TP_MOD_LOM2_5708_UART_RXD

5721J Debug Interface

5721J: no-pop

TP_MOD_LOM2_5721_UART_TXD TP_MOD_LOM2_5721_UART_RXD

84

R5151

NP2

84

0-5%

1 2

R5792

1 2

X

0-5%

R5793

1 2

X

0-5%

5708 Debug Interface

TP_MOD_LOM2_5708_MODE0 TP_MOD_LOM2_5708_MODE1 TP_MOD_LOM2_5708_MODE2 TP_MOD_LOM2_5708_MODE3 TP_MOD_LOM2_5708_MODE4

TP_MOD_LOM2_MODE0 TP_MOD_LOM2_MODE1 TP_MOD_LOM2_MODE2 TP_MOD_LOM2_MODE3

MOD_LOM2_ETRST_N TP_MOD_LOM2_ETDO TP_MOD_LOM2_ETMS TP_MOD_LOM2_ETCK TP_MOD_LOM2_ETDI

TP_MOD_LOM2_CLKIN_SEL

TP_MOD_LOM2_XTAL_ADJ3

TP_MOD_LOM2_XTAL_ADJ2 TP_MOD_LOM2_XTAL_ADJ0

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

MOD_LOM2_TRDTCT1

NC_MOD_LOM2_D9 NC_MOD_LOM2_E8 NC_MOD_LOM2_E9

NC_MOD_LOM2_H1 NC_MOD_LOM2_H18 NC_MOD_LOM2_H19 NC_MOD_LOM2_H20

NC_MOD_LOM2_J18 NC_MOD_LOM2_J17 NC_MOD_LOM2_K15 NC_MOD_LOM2_K16 NC_MOD_LOM2_K18

83

MOD_LOM2_TRD1_P

MOD_LOM2_TRD1_N

MOD_LOM2_TRD2_P

MOD_LOM2_TRD2_N

MOD_LOM2_TRD3_P

MOD_LOM2_TRD3_N

MOD_LOM2_TRD4_P

MOD_LOM2_TRD4_N

R5160

1 2

C3296

W1

PCIVDDIO_W1/DC

W2

PCIVDDIO_W2/DC

W4

PCIVDDIO_W4/DC

W7

PCIVDDIO_W7/DC

Y1

PCIVDDIO_Y1/DC

Y2

PCIVDDIO_Y2/DC

Y3

PCIVDDIO_Y3/DC

Y4

PCIVDDIO_Y4/DC

Y5

PCIVDDIO_Y5/DC

D7

NC_D7/NC_MODE_0

C3

NC_C3/NC_MODE_1

D6

NC_D6/NC_MODE_2

D4

NC_D4/NC_MODE_3

C5

NC_C5/NC_MODE_4

H5

DC_H5/UART_TXD

M5

DC_M5/UART_RXD

G15

NC_MODE_0/NC

G16

NC_MODE_1/NC

H15

NC_MODE_2/NC

H16

NC_MODE_3/NC

T16

UART_TXD/DC_T16

Y10

UART_RXD/DC_Y10

B1

DC_B1/DC_ETRST_N

C1

DC_C1/DC_ETDO

D2

DC_D2/NC_ETMS

E3

DC_E3/NC_ETCK

F4

DC_F4/NC_ETDI

C8

DC_C8/XTAL_BYPASS

D8

DC_D8/CLKIN_SEL

D9

NC_D9

E8

NC_E8

E9

NC_E9

G4

NC_G4

H1

NC_H1

H18

NC_H18

H19

NC_H19

H20

NC_H20

J4

NC_J4

J5

NC_J5

J18

NC_J18

J17

NC_J17

K15

NC_K15

K16

NC_K16

K18

NC_K18

R5158

49.9-1%

1 2

21

.1uF

10V-10%

R5157

49.9-1%

1 2

BCM5708C_RB2,REV B2

R5156

49.9-1%

1 2

21

C3295

MOD_LOM2_TRDTCT2

.1uF

10V-10%

U_LOM2

HETERO 2 OF 3

R5155

49.9-1%

1 2

C3294

83,84,133

R5154

49.9-1%

1 2

21

.1uF

10V-10%

MOD_LOM2_TRDTCT3

MOD_LOM2_P2V5AUX

R5159

49.9-1%

1 2

NC_K19 NC_K20

NC_R10 NC_R11 NC_R12

NC_T10 NC_T11 NC_T13 NC_T15

NC_U10 NC_U11 NC_U13

NC_V10 NC_V11 NC_V13

NC_W10 NC_W11 NC_W13

NC_Y11 NC_Y12 NC_Y13

49.9-1%

21

C3293

NC_K4 NC_L4 NC_M4

NC_R8 NC_R9

NC_T6 NC_T7 NC_T9

NC_U4 NC_U6 NC_U7 NC_U9 NC_V1

NC_V3 NC_V5 NC_V6 NC_V7 NC_V9

NC_W5 NC_W6 NC_W9

NC_Y6 NC_Y7 NC_Y8 NC_Y9

21

R5153

1 2

MOD_LOM2_TRDTCT4

.1uF

K19 K20 K4 L4 M4 R10 R11 R12 R8 R9 T10 T11 T13 T15 T6 T7 T9 U10 U11 U13 U4 U6 U7 U9 V1 V10 V11 V13 V3 V5 V6 V7 V9 W10 W11 W13 W5 W6 W9 Y11 Y12 Y13 Y6 Y7 Y8 Y9

C3292

49.9-1%

10V-10%

NC_MOD_LOM2_K19 NC_MOD_LOM2_K20 TP_MOD_LOM2_XTAL_ADJ1 NC_MOD_LOM2_L4 NC_MOD_LOM2_M4 NC_MOD_LOM2_R10 NC_MOD_LOM2_R11 NC_MOD_LOM2_R12 NC_MOD_LOM2_R8 NC_MOD_LOM2_R9 NC_MOD_LOM2_T10 NC_MOD_LOM2_T11 NC_MOD_LOM2_T13 NC_MOD_LOM2_T15 NC_MOD_LOM2_T6 NC_MOD_LOM2_T7 NC_MOD_LOM2_T9 NC_MOD_LOM2_U10 NC_MOD_LOM2_U11 NC_MOD_LOM2_U13 NC_MOD_LOM2_U4 NC_MOD_LOM2_U6 NC_MOD_LOM2_U7 NC_MOD_LOM2_U9 NC_MOD_LOM2_V1 NC_MOD_LOM2_V10 NC_MOD_LOM2_V11 NC_MOD_LOM2_V13 NC_MOD_LOM2_V3 NC_MOD_LOM2_V5 NC_MOD_LOM2_V6 NC_MOD_LOM2_V7 NC_MOD_LOM2_V9 NC_MOD_LOM2_W10 NC_MOD_LOM2_W11 NC_MOD_LOM2_W13 NC_MOD_LOM2_W5 NC_MOD_LOM2_W6 NC_MOD_LOM2_Y10 NC_MOD_LOM2_Y11 NC_MOD_LOM2_Y12 NC_MOD_LOM2_Y13 NC_MOD_LOM2_Y6 NC_MOD_LOM2_Y7 NC_MOD_LOM2_Y8 NC_MOD_LOM2_Y9

.1uF

C3291

10V-10%

+3.3V

LAN_AUX

R5118

1 2

200-5%

R5150

1 2

0 OHM

MOD_LOM2_CT_P2V5AUX_FIL

21

.1uF

C3290

10V-10%

21

LAN_AUX

.1uF

C3289

10V-10%

+3.3V

21

.1uF

10V-10%

83,84,133

MOD_LOM2_ACTLED_N

83

MOD_LOM2_ACTLED_R

R5119

1 2

200-5%

MOD_LOM2_LINKLED_N

83

MOD_LOM2_P1V2AUX

21

C3234

C3232

+3.3V

LAN_AUX

C3227

+3.3V

POP2

C3233

X

4.7uF

21

4.7uF

21

4.7uF

21

4.7uF

NP

X

1 2

C3313

NP

X

C3315

1 2

C3297

6.3V-10%

1 2

C3281

6.3V-10%

1 2

C3257

6.3V-10%

1 2

C3266

6.3V-10%

NP

X

1 2

C3314

470pF

50V-10%

NP

470pF

1 2

.1uF

No-pop for 5708.

.1uF

X

C3316

50V-10%

1 2

C3288

10V-10%

1 2

C3280

10V-10%

1 2

C3273

1 2

C3256

10V-10%

1 2

C3265

10V-10%

TITLE

DWG NO.

DATE

1 2

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

.1uF

10V-10%

470pF

50V-10%

J_ETH2

13

14

16

17 SH1 15

470pF

50V-10%

1 2

C3287

1 2

C3279

1 2

C3272

1 2

C3255

1 2

C3264

C1

A1

11

TRD1+

12

TRCT1

10

TRD1-

4

TRD2+

6

TRCT2

5

TRD2-

3

TRD3+

1

TRCT3

2

TRD3-

8

TRD4+

7

TRCT4

9

TRD4-

GREEN

ORANGE

MOD_LOM2_LINKLED_R

NOTE: on the 5721J some of these decoupling capacitors can be depopped

--consult your local SNaC Engineer

.1uF

1 2

C3286

10V-10%

.1uF

1 2

C3278

10V-10%

.1uF

1 2

C3271

10V-10%

.1uF

1 2

C3254

10V-10%

.1uF

1 2

C3263

10V-10%

YELLOW

COMMON

RJ45 MAGNETIC JACK W/2 LED'S

.1uF

C3285

10V-10%

.1uF

C3277

10V-10%

.1uF

C3270

10V-10%

.1uF

C3253

10V-10%

.1uF

10V-10%

.1uF

1 2

NS: Populating some 0.1uF's since 3.3V is still being routed to this chip.

MODULE: DESC: REV: OF

C3284

10V-10%

.1uF

C3276

10V-10%

.1uF

C3269

10V-10%

.1uF

C3252

10V-10%

1 2

4x75ohms

1000pF 2kV

.1uF

1 2

C3283

10V-10%

.1uF

1 2

C3275

10V-10%

.1uF

1 2

C3268

10V-10%

.1uF

1 2

C3251

10V-10%

.1uF

C3282

10V-10%

.1uF

C3274

10V-10%

.1uF

C3267

10V-10%

.1uF

C3250

10V-10%

SEC

RJ45

1

2

3

6

4

5

7

8

Shield

.1uF

1 2

.1uF

1 2

.1uF

1 2

.1uF

1 2

2 2

SH1

SH2

C3262

10V-10%

C3261

10V-10%

C3298

10V-10%

C3299

10V-10%

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 84 OF 136

SH2

1 2

LOM2

1

2

.1uF

10V-10%

.1uF

10V-10%

3

.1uF

10V-10%

.1uF

10V-10%

4

DCBA

A B C

D

1

OP-AMP CIRCUIT CALCULATIONS

Range calculations made using the following:

3.3VAux Supply +/-5% All resistors defined tolerance

3.3VAux Vref = 3.3V *3.3 K/((11K+3.3K) = 0.76V nominal 11K(+1%) and 3.3K (-5%), at 3.3V(-5%) 11K(-1%) and 3.3K (+5%), at 3.3V(+5%)

0.69V - Min

0.836V - Max

+3.3V

LAN_AUX

1 2

C3350

+3.3V

LAN_AUX

.1uF

16V-10%

81

LOM1_CK25_OUT

U1117NP

2

GND

3

2A

SN74LVC2G34

R5799

1 2

33-5%

61

1Y1A

5

VCC

4

2Y

X

+3.3V

LAN_AUX

MOD_LOM_SHARE0_CK25_BUF

MOD_LOM_SHARE0_CLK_BUF

R5280

NP

1 2

33-5%

R5282

NP

1 2

33-5%

X X

LOM1_SHARE0_CK25

LOM1_SHARE0_CLK

Split near the pins

R5794

NP

1 2

0-5%

R5795

NP

1 2

0-5%

92

Split near the pins

LOM1_SHARE0_CK25_TX

X

LOM1_SHARE0_CK25_RX

X

81

1

2

+3.3V_AUX

21

R5307

MOD_LOM_P0V76_REF_SEL_VAUX

21

R5269

3.3K-5% 11K-1%

81

83

OR'd inputs

LOM1_SEL_VAUX_N

LOM2_SEL_VAUX_N

3.3VAux Vref

NP

R5645

X

1 2

NP

1K-1%

R5646

X

1 2

R5244

1 2

127K-1%

R5245

1 2

127K-1%

1K-1%

R5315

1 2

3

2

71.5K-1%

+5V_AUX

8

U1119

+

-

LM393

V+

V-

4

R5243

1 2

487K-1%

1

OUT

P19_DT9197_rt_swap_out_sub_U1119

+3.3V_AUX

1 2

4.7K-5%

R5306

+5V_AUX

.1uF

1 2

C3349

LOM_SEL_VAUX_N

16V-10%

95,128

1 2

C3393

.1uF

16V-10%

83

LOM2_CK25_OUT

U1118NP

2

GND

3

2A

SN74LVC2G34

R5798

1 2

33-5%

61

1Y1A

5

VCC

4

2Y

X

+3.3V

LAN_AUX

Keep term resistors ~1" from source.

MOD_LOM_SHARE1_CK25_BUF

MOD_LOM_SHARE1_CLK_BUF

R5281

NP

1 2

33-5%

R5283

NP

1 2

33-5%

X X

LOM2_SHARE1_CK25

LOM2_SHARE1_CLK

R5797

NP

1 2

0-5%

R5796

NP

1 2

0-5%

92

(DT7971 for L/B.) Resistors depopulated for B0 silicon. For A0 silicon, populate resistors and buffers, and depop R5799 and R5798.

LOM2_SHARE1_CK25_TX

X

LOM2_SHARE1_CK25_RX

X

83

2

3

+3.3V_AUX

R5299

1 2

Vref = 3V

R5246

1 2

10K-5%

100K-1%

Populate on Atlanta,

for LOMs that are unused.

+3.3V

LAN_AUX

MOD_LOM_P3V_VREF_SWITCH

R5302

1 2

1K-1%

NP

16V-10%

1000pF

21

X

C3348

+5V_AUX

8

5

+

6

-

R5247

1 2

100K-1%

U1119

LM393

V+

V-

7

4

OUT

+3.3V

LAN_AUX

1 2

1K-1%

R5303

MII_I2C_SWITCH_N

87,92

LOM 3.3V SWITCHOVER CIRCUIT

+12V

21

+3.3V_AUX

21

R3942

Q1798

D

3

330-5%

R5787

3.01K-1%

Q1797

1

G

2N7002

R3943

1 2

D

3

S

2

+3.3V_AUX

3.01K-1%

MOD_LOM_P12V_PS_PWRGOOD

td_on = 20ns td_off = 20ns

+3.3V

16V-20%

100uF

+

1 2

C3581

1

2

3

4

Q1814

1

S1

2

G1

3

S2

4 5

G2 DRN4

SI4501DY

DRN1 DRN2 DRN3

8

7

6

5

+3.3V

LAN_AUX

8 7 6

NET_PHYSICAL_TYPE=100MIL

3

22uF 6.3V

10V-10%

1 2

C2194

.1uF

C2155

2 1

4

Comparator Driving I2C and MII Output Enable at 90.90f LAN_AUX

I2C Address: AC

85 85 85

+3.3V

1 2

220-5%

MOD_LOM_I2C_ESB2_SEG1_SDA MOD_LOM_I2C_ESB2_SEG1_SCL MOD_LOM_TOE_KEY_PWR

R5325

63

J_TOE_KEY

1

2

3

4

RJ-22

SM VERT

I2C_ESB2_SEG1_SCL

I2C_ESB2_SEG1_SDA

MLK: Through Hole Conn added as per Bullion/Vanguard

MOD_LOM_I2C_ESB2_SEG1_SDA

85

MOD_LOM_I2C_ESB2_SEG1_SCL

85

MOD_LOM_TOE_KEY_PWR

85

R5493

1 2

47-5%

R5494

1 2

47-5%

TOE HW key

MOD_LOM_I2C_ESB2_SEG1_SCL

MOD_LOM_I2C_ESB2_SEG1_SDA

J_TOE_KEY_THRU

NP

1

2

3

4

X

RJ-22

TOP ENTRY TH

85

95,128

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

LOM_SWITCH_N

1

G

2N7002

S

2

R3871

1 2

1K-1%

DUAL N & P CHANNEL FETS 12V ON GATE1 ENABLES +3.3V TO DRN PINS 0V ON GATE 2 ENABLES +3.3V_AUX TO DRN PINS

For Everglades inrush issue

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

HX601

DATE

9/7/2007 85 OF 136

MODULE: DESC: REV: OF

SEC

2 2

INC.

ROUND ROCK,TEXAS

REV.

A00

SHEET

LOM

4

DCBA

1

2

3

+3.3V_AUX

R468

1 2

MOD_BMC_A0_PU

88 87,95,128 87,95,128 87,95,128 87,95,128 87,95,128

87,95,128 87,95,128 87,95,128 87,95,128

87 87

87,95,128

80,88 87,88

88,95,128

80,88

MOD_BMC_INTRUS_SWITCH_PRES_N

87

MOD_BMC_MII_CBL_PRES_PLNR_N

92

88,95,128

MOD_BMC_A1 MOD_BMC_A2 MOD_BMC_A3 MOD_BMC_A4 MOD_BMC_A5 MOD_BMC_A6

87

MOD_BMC_A7

87

MOD_BMC_A8

87

MOD_BMC_A9

87

MOD_BMC_A10

87

MOD_BMC_A11

87

MOD_BMC_A12

87

MOD_BMC_A13

87

MOD_BMC_A14

87

MOD_BMC_A15

87

MOD_BMC_A16

87

MOD_BMC_A17_PU

88

94 94 94 94 94 94

87 87 87 87 87 87 87 87 87 87 87 87

MOD_BMC_HIGH_WR_N MOD_BMC_LOW_WR_N MOD_BMC_RD_N

MOD_BMC_TACH_MUX_SEL0 MOD_BMC_SRAM_CS_N

MOD_BMC_EXGP_CS_N

MOD_BMC_TACH_MUX_SEL1

69

66,92

88

136

+3.3V_AUX

1 2

BLM18BD601SN1_PB

A B C

8.2K-5%

MOD_BMC_NMI_N_PU

MOD_BMC_FAN1_TACH MOD_BMC_FAN2_TACH MOD_BMC_FAN3_TACH MOD_BMC_FAN4_TACH MOD_BMC_FAN5_TACH MOD_BMC_FAN6_TACH

MOD_BMC_D0 MOD_BMC_D1 MOD_BMC_D2 MOD_BMC_D3 MOD_BMC_D4 MOD_BMC_D5 MOD_BMC_D6 MOD_BMC_D7 MOD_BMC_D8 MOD_BMC_D9 MOD_BMC_D10 MOD_BMC_D11 MOD_BMC_D12 MOD_BMC_D13 MOD_BMC_D14 MOD_BMC_D15

A2D_BAT RAC_PRES_N MOD_BMC_GPI_70

MOD_BMC_CPLD_INT_N MOD_BMC_GPI_74 P1V8_CURRENT_SENSE_A2D

L10

10V-10%

.1uF

C313

21

10V-10%

.1uF

21

C314

11

NMI

112

P10/PW0/A0/AD0

110

P11/PW1/A1/AD1

109

P12/PW2/A2/AD2

108

P13/PW3/A3/AD3

107

P14/PW4/A4/AD4

106

P15/PW5/A5/AD5

105

P16/PW6/A6/AD6

104

P17/PW7/A7/AD7

103

P20/PW8/A8/AD8

102

P21/PW9/A9/AD9

101

P22/PW10/A10/AD10

100

P23/PW11/A11/AD11

99

P24/PW12/A12/AD12

98

P25/PW13/A13/AD13

97

P26/PW14/A14/AD14

96

P27/PW15/A15/AD15

41

PA0/KIN8/EVENT0/SSEOI/A16

40

PA1/KIN9/EVENT1/SSE2I/A17

39

PA2/KIN10/EVENT2/A18

38

PA3/KIN11/EVENT3/A19

37

PA4/KIN12/EVENT4/A20

35

PA5/KIN13/EVENT5/A21

34

PA6/KIN14/EVENT6/A22

33

PA7/KIN15/EVENT7/A23

78

P60/KIN0/FTCI/D0

79

P61/KIN1/FTOA/D1

80

P62/KIN2/FTIA/D2

81

P63/KIN3/FTIB/D3

82

P64/KIN4/FTIC/D4

83

P65/KIN5/FTID/D5

84

P66/KIN6/FTOB/D6

85

P67/KIN7/D7

121

P30/WUE8/D8

122

P31/WUE9/D9

123

P32/WUE10/D10

124

P33/WUE11/D11

125

P34/WUE12/D12

126

P35/WUE13/D13

127

P36/WUE14/D14

128

P37/WUE15/D15

20

P94/HWR

24

P90/LWR

21

P93/RD

22

P92/CPCS1

17

P97/WAIT/CS256

19

P95/AS/IOS

23

P91/AH

68

P70/AN0

69

P71/AN1

70

P72/EXIRQ2/AN2

71

P73/EXIRQ3/AN3

72

P74/EXIRQ4/AN4

73

P75/EXIRQ5/AN5

74

P76/EXIRQ6/AN6/DA0

75

P77/EXIRQ7/AN7/DA1

76

AVCC

77

AVREF

67

AVSS

SUB7_FX334 SUB8_FX333

MLK: BMC PN changed to FX334 for London and FX333 for Berlin

U_BMC

HITACHI 2177 BMC

HETERO 1 OF 2

PE3/LAD3 PE2/LAD2 PE1/LAD1 PE0/LAD0

PE4/LFRAME PE5/LRESET

PE6/LCLK

PE7/SERIRQ

PD5/LPCPD

PD4/CLKRUN

PD3/GA20

PD2/PME PD1/LSMI PD0/LSCI

P50/IRQ8/TXD0

P51/IRQ9/RXDO P52/IRQ10/IRTXD/TXD1 P53/IRQ11/IRRXD/RXD1

P54/IRQ12/TXD2 P55/IRQ13/RXD2

P56/IRQ14/PWX0 P57/IRQ15/PWX1

PC6/PWX2 PC7/PWX3

PB0/EVENT8

PB1/EVENT9 PB2/EVENT10 PB3/EVENT11 PB4/EVENT12 PB5/EVENT13 PB6/EVENT14 PB7/EVENT15

P81/EXIRQ9/SDA0

P80/EXIRQ8/SCL0 P83/EXIRQ11/SDA1 P82/EXIRQ10/SCL1

PC1/SDA2 PC0/SCL2 PC3/SDA3 PC2/SCL3 PC5/SDA4 PC4/SCL4 PD7/SDA5 PD6/SCL5

P40/IRQ0/TMI0 P41/IRQ1/TMI1 P42/IRQ2/TMO0 P43/IRQ3/TMO1 P44/IRQ4/TMIX P45/IRQ5/TMIY P46/IRQ6/TMOX P47/IRQ7/TMOY

PF0/EXPW0 PF1/EXPW1

PF2/EXPW2 P85/EXIRQ13/EXTMI1/SCK1 P86/EXIRQ14/EXTMIX/SCK2

P87/EXIRQ15/EXTMIY/ADTRIG

P84/EXIRQ12/EXTMI0/SCK0

55 56 57 58

54 53 52 51 61

62 63 64 65 66

16 15 133 134 136 137

5 6 26 25

120 119 118 117 116 115 114 113

49 50 47 48 31 32 29 30 27 28 59 60

129 130 131 132 138 2 3 4

94 93 92 45 44 43 46

PLT_RST_BMC_CPLD_N

MOD_BMC_GPIO_51 MOD_BMC_GPIO_61

DO NOT USE PINS 51, 61, 62

MOD_BMC_GPIO_62

BMC_P3V3AUX_CPLD_EN

MOD_BMC_FANSPEED_1 MOD_BMC_FANSPEED_2 MOD_BMC_FANSPEED_3 MOD_BMC_FANSPEED_4

MOD_BMC_FAN7_TACH MOD_BMC_FAN8_TACH

MOD_BMC_FAN9_TACH MOD_BMC_FAN10_TACH MOD_BMC_FAN11_TACH MOD_BMC_FAN12_TACH MOD_BMC_FAN13_TACH MOD_BMC_FAN14_TACH

I2C_BMC_IPMB_VAUX_SDA I2C_BMC_IPMB_VAUX_SCL

I2C_BMC_NIC_VAUX_SDA

I2C_BMC_NIC_VAUX_SCL I2C_BMC_SEG2_VAUX_SDA I2C_BMC_SEG2_VAUX_SCL I2C_BMC_SEG3_VAUX_SDA I2C_BMC_SEG3_VAUX_SCL I2C_BMC_SEG4_VAUX_SDA I2C_BMC_SEG4_VAUX_SCL I2C_BMC_SEG5_VAUX_SDA I2C_BMC_SEG5_VAUX_SCL

MOD_BMC_NIC_ALERT1_N MOD_BMC_NIC_ALERT2_N

MOD_BMC_ID_BUTTON_DB_N

MOD_BMC_SYS_PWRGOOD_ESM

LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0

LPC_LFRAME_N

CK_33M_BMC

CTRLPNL_MUX_S1

BMC_SMI_N

CTRLPNL_MUX_S0

MOD_BMC_CTS0_N MOD_BMC_RTS0_N

MOD_BMC_SOUT

MOD_BMC_SIN MOD_BMC_DSR0_N MOD_BMC_DTR0_N

BMC_NMIBTN_N BMC_PWRBTN_N

CTRLPNL_CLK

CTRLPNL_DATA

MOD_BMC_IPMB_RST_N

MOD_BMC_RI0_N

BMC_RDY_N MOD_BMC_DCD0_N INTRUDED_COVER ESB_PWR_ON_REQ

MOD_BMC_PECI_RST_N_R

54,66-68,96 54,66-68,96 54,66-68,96 54,66-68,96

54,66-68,96 95,126,128 45 88 88

88 88,95 70 54,87 70

95 95,129 95,129 95 95 95,129

80,94 80,94 80,94 94

88,94 88,94 88,94 88,94 80,88 80,88 80,88 88

87,91,92,96 87,91,92,96 87,91,92,96 87,91,92,96 87,89-91,96 87,89-91,96 70,87,91,96,120 70,87,91,96,120 87,91,96,120 87,91,96,120 87,91,96 87,91,96

58 58 87,91,92 87,91,92 70 70 92 93

95,129 66,87 95,129 62 54,95,128 128

R6007

49.9-1%

21

R5194

100-5%

86,95,128

R5193

1 2

21

MOD_BMC_PECI_RST_N

10V-10%

.1uF

C315

21

86

MOD_BMC_GPIO_18

88

MOD_BMC_REAL_RST_N

88 88

66,89,95,129

89

100-5%

10V-10%

.1uF

MOD_BMC_XTAL MOD_BMC_EXTAL

NC_PLLCAP

NC_RES0 MOD_BMC_STBY MOD_BMC_FWE

BMC_PROGRAM_N MOD_BMC_MD2_N

90

1 2

C798

+3.3V_AUX

143 144

140 141

142

135

14

1

VCC_1

36

VCC_36

86

VCC_86

13

VCL

XTAL EXTAL

PLLCAP PFSEL

18

P96/PHI/EXCL

8

RES RESO

12

STBY FWE

10

MD0

9

MD1 MD2

22uF 6.3V

U_BMC

HITACHI 2177 BMC

HETERO 2 OF 2

+3.3V_AUX

C583

10V-10%

.1uF

C310

1 2

21

VSS_7 VSS_42 VSS_95

VSS_111 VSS_139

ETRST

ETCK ETDI ETDO ETMS

10V-10%

.1uF

21

7 42 95 111 139

91 90 89 88 87

10V-10%

.1uF

C311

21

C312

ECAD: Place these components as close to the BMC as possible

MOD_BMC_TRST_N

MOD_BMC_TCLK

MOD_BMC_TDI MOD_BMC_TDO MOD_BMC_TMS

MOD_BMC_HUDI_RST_N

89

66

BMC_RESET_N

+3.3V_AUX

R5067

1 2

8.2K-5%

J_BRST

21

NP0

+5V_AUX

89 89 89 89 89

R712

1 2

160-5%

21

C355

P19_DT9231_jp_swap symbol

+3.3V_AUX

R4368

1 2

62,129,136

R581

1 2

R751

1 2

M2LB_Change_Note: Changed J_BRST to right-angle part

MOD_BMC_INTRUS_SWITCH_PRES_N name not changed.

D

BMC has 4X PLL

R679

1 2

R4870

1 2

10M-5%

X4

21

7.3728MHz

18pF

50V-10%

C356

1 2

BMC CRYSTAL

+3.3V_AUX

143U1108

1

+3.3V_AUX

2

74VHC08

148U1108

9

10

74VHC08

8.2K-5%

+3.3V_AUX

14

4 5

U1108

6

74VHC08

P3V3AUX_PWRGOOD_ESM

NOTE: Keep 4.7k pulldown Even when BMC is not PopulatedAR2087

RESET: Allows HUDI to RESET BMC for DEBUG

4.75K-1%

D79

TL431ACD

10uF 6.3V

1

8

2

3

6

7

14.7K-1%

3.3V Reference Circuit for A/D converter

1 2

18pF

50V-10%

12 13

21

75-1%

R680

0-5%

ROOM=BMCRST

+3.3V_AUX

14

74VHC08

10V-10%

C782

MODULE: DESC: REV: OF

U1108

.1uF

MOD_BMC_XTAL

MOD_BMC_EXTAL

11

MOD_BMC_REAL_RST_N

R5047

1 2

4.7K-5%

MOD_BMC_AVREF

C309

21

ROOM=BMCREF

SEC

86

+3.3V_AUX

10V-10%

.1uF

21

86

1

C308

2

86,95,128

3

BMC

4

MOD_BMC_AVREF

86

= SCHMITT TRIGGER INPUT

Configure CPLD pin for no pullup

Denotes Input Only Pin

Denotes Pin Configured as Input Denotes Pin Configured as Output Denotes Pin Configured as Input/Output

Denotes Open-drain

Denotes Schmitt Trigger Input

ROOM=2178pins AR2084eq/gnt

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

REV.

HX601

A00

SHEET

9/7/2007 86 OF 136

DCBA

4

A B C

+3.3V_AUX

D

1

86,87 86,87

86,87

86,87,95,128

86,87

86,87,95,128

ROOM = BMCSRAM

MOD_BMC_HIGH_WR_N MOD_BMC_LOW_WR_N

MOD_BMC_HIGH_WR_N MOD_BMC_RD_N

MOD_BMC_LOW_WR_N MOD_BMC_RD_N

+3.3V_AUX

143U22

1 2

74VHC08

+3.3V_AUX

146U22

4 5

74VHC08

+3.3V_AUX

148U22

9

10

74VHC08

+3.3V_AUX

10V-10%

.1uF

MOD_BMC_WR_N

MOD_BMC_SRAM_BHE_N

MOD_BMC_SRAM_BLE_N

21

C317

87,95,128

87

86,95,128 86,95,128 86,95,128 86,95,128 86,95,128

86 86 86 86 86 86 86 86 86 86 86

86,88

87 87

86,87,95,128

87,95,128

MOD_BMC_A1 MOD_BMC_A2 MOD_BMC_A3 MOD_BMC_A4 MOD_BMC_A5 MOD_BMC_A6 MOD_BMC_A7 MOD_BMC_A8 MOD_BMC_A9 MOD_BMC_A10 MOD_BMC_A11 MOD_BMC_A12 MOD_BMC_A13 MOD_BMC_A14 MOD_BMC_A15 MOD_BMC_A16

MOD_BMC_SRAM_CS_N MOD_BMC_SRAM_BLE_N MOD_BMC_SRAM_BHE_N MOD_BMC_RD_N MOD_BMC_WR_N

44 43 42 27 26 25 24 21 20 19 18

39 40 41 17

+3.3V_AUX

U_BMC_SRAM

5

A0

4

A1

3

A2

2

A3

1

A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15

6

CS BLE BHE OE WE

SRAM,64kx16

VDD1 VDD2

VSS1 VSS2

I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8

I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15

33 11

12 34

7 8 9 10 13 14 15 16 29 30 31 32 35 36 37 38

MOD_BMC_D0 MOD_BMC_D1 MOD_BMC_D2 MOD_BMC_D3 MOD_BMC_D4 MOD_BMC_D5 MOD_BMC_D6 MOD_BMC_D7 MOD_BMC_D8 MOD_BMC_D9 MOD_BMC_D10 MOD_BMC_D11 MOD_BMC_D12 MOD_BMC_D13 MOD_BMC_D14 MOD_BMC_D15

10V-10%

.1uF

21

1uF 6.3V

C316

22uF 6.3V

1 2

C542

86,95,128 86,95,128 86,95,128 86,95,128 86 86 86 86 86 86 86 86 86 86 86 86

1 2

C584

86,91,92,96 86,91,92,96

86,87,91,92,96 86,87,91,92,96

70,86,91,96,120 70,86,91,96,120

ROOM = 2178

I2C_BMC_IPMB_VAUX_SDA I2C_BMC_IPMB_VAUX_SCL

I2C_BMC_NIC_VAUX_SDA I2C_BMC_NIC_VAUX_SCL

86,89-91,96 86,89-91,96

86,91,96,120 86,91,96,120

86,91,96 86,91,96

I2C_BMC_SEG2_VAUX_SDA I2C_BMC_SEG2_VAUX_SCL I2C_BMC_SEG3_VAUX_SDA I2C_BMC_SEG3_VAUX_SCL I2C_BMC_SEG4_VAUX_SDA I2C_BMC_SEG4_VAUX_SCL I2C_BMC_SEG5_VAUX_SDA I2C_BMC_SEG5_VAUX_SCL

R843

1 2

R848

4.7K-5%

1 2

R345

4.7K-5%

1 2

R346

4.7K-5%

1 2

R851

4.7K-5%

1 2

R852

4.7K-5%

1 2

R850

4.7K-5%

1 2

R849

4.7K-5%

1 2

21

R846

4.7K-5%

21

R847

2.7K-5%

R845

1 2

+3.3V_AUX

R844

4.7K-5%

1 2

4.7K-5%

1

PULL-UPS for I2C Busses

2

3

ROOM = 2178

x00_EW_10-07-2004 - Changed NPs to Dummy Symbols. DT8323_NS_depop R513 and R4798

86,87,91,92 86,87,91,92

66,86

54,86

MOD_BMC_NIC_ALERT1_N MOD_BMC_NIC_ALERT2_N BMC_RDY_N

GPE_NMI_BUTTON_N INTRUDED_COVER IPMB_RST_N

BMC_SMI_N

RAC_PRES_N ID_BUTTON_DB_N MOD_BMC_INTRUSION_SWITCH_PRES_N SHARENIC_CBL_PRES_TO_PLANAR_N

LED_ID_AMBER LED_ID_BLUE NMI_BUTTON_DISABLE PWR_BUTTON_DISABLE

NP

1 2

8.2K-5%

R513

X

NP

8.2K-5%

X

21

R4798

BMC SRAM

+3.3V_AUX

1 2

8.2K-5%

R512

1 2

8.2K-5%

R520

85,92

MII_I2C_SWITCH_N

81,83

I2C_ISO_NIC_SCL

I2C_ISO_NIC_SDA

NIC_ISO_ALERT1_N

81

NP

1K-5%

X

G

1

S 2

R5404

1 2

0-5%

NP

D1101

1 3

BAR43

R5465

21

Q1933

BSS138

D 3

X

NP

1K-5%

X

G

S 2

NP

1 2

R5466

BSS138

1

R5405

0-5%

D1102

1 3

BAR43

Q1934

D 3

X

21

X

1K-5%

NP

S 2

NP

X

21

G

1

R5406

1 2

0-5%

D1103

1 3

R5467

BSS138

Q1935

D 3

X

I2C_BMC_NIC_VAUX_SCL

I2C_BMC_NIC_VAUX_SDA

NP

1 2

1K-5%

NP

X

G

1

R5468

BSS138

Q1936

MOD_BMC_NIC_ALERT1_N

2

86,87,91,92,96

3

86,87,91,92

4

MOD_BMC_INTRUS_SWITCH_PRES_N

86

1 2

8.2K-5%

NOTE: If Intrusion Switch is not on a Cable, use PD to always show present

R5410

SIGNALS EXTERNAL TO BMC MODULE

FAKE RESISTORS are USED FOR REFERENCE SCHEMATICS IF THE BMC PIN FUNCTION IS NOT USED IT MUST BE PULLED UP WITH A REAL RESISTOR IF THE BMC PIN FUNCTION IS USED THEN THE FAKE PULLUP IS USED FOR REFERENCE

NIC_ISO_ALERT2_N

83

ROOM = 2178

BAR43

X

S 2

D 3

MOD_BMC_NIC_ALERT2_N

X

R5407

NP

D1104

1 3

ISOLATION FOR LOM I2C BUS and ALERT LINES

M2LB_Change_Note: R5410 changed to pull-down.

MOD_BMC_INTRUS_SWITCH_PRES_N name not changed.

BAR43

21

0-5%

X

TITLE

86,87,91,92

MODULE: DESC: REV: OF

SEC

INC.

ROUND ROCK,TEXAS

BMC

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 87 OF 136

DCBA

A B C

FAKE RESISTORS are USED FOR REFERENCE SCHEMATICS IF THE BMC PIN FUNCTION IS NOT USED IT MUST BE PULLED UP WITH A REAL RESISTOR IF THE BMC PIN FUNCTION IS USED THEN THE FAKE PULLUP IS USED FOR REFERENCE

D

+3.3V_AUX

1

86,94 86,94 86,94 86,94 80,86 80,86 80,86

86

BMC_FAN1_TACH BMC_FAN2_TACH BMC_FAN3_TACH BMC_FAN4_TACH BMC_FAN5_TACH BMC_FAN6_TACH

MOD_BMC_FAN7_TACH MOD_BMC_FAN8_TACH MOD_BMC_FAN9_TACH MOD_BMC_FAN10_TACH MOD_BMC_FAN11_TACH MOD_BMC_FAN12_TACH MOD_BMC_FAN13_TACH MOD_BMC_FAN14_TACH

+3.3V_AUX

8.2K-5%

R8294

21

SUB=POP7

1 2

8.2K-5%

R476

SUB=POP7

1 2

8.2K-5%

R477

SUB=POP7

1 2

8.2K-5%

R478

SUB=POP7

1 2

8.2K-5%

R480

SUB=POP7

1 2

8.2K-5%

R479

SUB=POP7

1 2

8.2K-5%

R482

SUB=POP7

1 2

8.2K-5%

R481

86 86

86,95,128

86

86 86 86 86 86

86,95

MOD_BMC_A17_PU MOD_BMC_A0_PU MOD_BMC_CPLD_INT_N

MOD_BMC_GPIO_130

MOD_BMC_GPIO_18

MOD_BMC_GPI_74

MOD_BMC_GPI_70 MOD_BMC_GPIO_51 MOD_BMC_GPIO_61 MOD_BMC_GPIO_62 BMC_P3V3AUX_CPLD_EN

1 2

8.2K-5%

R4614

1 2

8.2K-5%

R495

8.2K-5%

R5397

21

1 2

8.2K-5%

R499

1 2

8.2K-5%

R5095

8.2K-5%

R5242

21

1 2

8.2K-5%

R496

1 2

8.2K-5%

R483

1 2

8.2K-5%

R485

1 2

8.2K-5%

R498

1

2

+3.3V_AUX

FANSPEED_1 FANSPEED_2 FANSPEED_3 FANSPEED_4

x00_EW_10-07-2004 - Changed NPs to Dummy Symbols. x00_EW_10-07-2004 - Changed PS_FAN_DACn TO MOD_BMC_GPI_[74|75]

FAN TACH and PWM: Configurable per platform

ROOM = 2178

86,87

86,95,128

86 86

MOD_BMC_SRAM_CS_N MOD_BMC_EXGP_CS_N MOD_BMC_STBY MOD_BMC_FWE

+3.3V_AUX

1 2

8.2K-5%

R517

1 2

8.2K-5%

R516

1 2

8.2K-5%

R518

1 2

8.2K-5%

R519

INTERNAL SIGNALS

2

ROOM=2178

3

DELL

LEAVE Resistor populated if pin is not being used

BMC_TYPE1 BMC_TYPE0

0 0

0

0 0

1

0

1 1 1

0 0

SYSTEM_TYPE2 SYSTEM_TYPE0SYSTEM_TYPE1

00

0

0 1 0

0

THESE SHOULD NOT BE MODIFIED

0

10

0

1000

0100

Berlin

London

Montreal HA

Montreal EC

Berlin MLK

London MLK

Montreal MLK

95,129

95,129 95,129 95,129

MOD_BMC_TYPE0

MOD_BMC_TYPE1

MOD_BMC_SYSTEM_TYPE0 MOD_BMC_SYSTEM_TYPE1 MOD_BMC_SYSTEM_TYPE2

+3.3V_AUX

R8364

21

POP7

smr_03_12_05 - changed BOM options on R8364 and R4518

80,86 80,86

MOD_BMC_TACH_MUX_SEL0 MOD_BMC_TACH_MUX_SEL1

R5390

1 2

2.2K-5%

R5391

1 2

3

2.2K-5%

4

MLK: Proposed SYSTEM TYPE configuration for MLK

ROOM=ID

BMC and SYSTEM TYPE SELECTION

MOD_BMC_TYPE1 is HARD CODED IN THE CPLD AS 1 for MLK SYSTEMS

1 2

100-5%

x00_EW_10-07-2004 - Changed NPs to Dummy Symbols.

R4521

100-5%8.2K-5%

1 2

POP8

R4518

100-5%

21

1 2

100-5%

R524

R4517

FAN TACH MUX SELECT LINES for 1U system

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

M2LB_Change_Note: Modified TACH pull-ups.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

BMC

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 88 OF 136

4

DCBA

A B C

+3.3V_AUX

D

+3.3V_AUX

1

MOD_BMC_TCLK

86

MOD_BMC_TRST_N

86

MOD_BMC_TDO

86

MOD_BMC_HUDI_RST_N

86

MOD_BMC_TMS

86

MOD_BMC_TDI

86

RESET SENSE LINE TO HUDI

1 8

4.7K-5%

RN22

4.7K-5%

3 6

4.7K-5%

RN22

2 7

RN22

4 5

4.7K-5%

RN22

4.7K-5%

12

BMC HUDI JTAG

ROOM=BMCSRAM

EMN: PLACE IN ACCESSIBLE AREA ON TOP LAYER

R853

J_HUDI_BMC

1 3 5 7

NP0

+3.3V_AUX

ROOM=HUDI

+3.3V_AUX

2 4 6 8 109 1211 1413

MOD_BMC_SENSE_HUDI_GND_N

89

86,87,89-91,96 86,87,89-91,96

13

CPU0_THERMD_A_1

13

I2C_BMC_SEG2_VAUX_SCL I2C_BMC_SEG2_VAUX_SDA

CPU0_THERMD_A_2

CPU0_THERMD_C_12

+3.3V_AUX

R4401

0-5%

1 2

C2795

R4402

1 2

C2794

1 2

2200pf

0-5%

2200pf

50V-10%

U_CPU0_TEMP

9

SCL

12

SDA

3

DXP1

4

DXN

5

DXP2

SMBALERT

6

ADD1

14 8

ADD0 GND

MAX6696

ADDR = 9C

STBY

RESET

VCC NC1 NC2 OT1 OT2

2 1 16 10 13

11 15 7

NC_U_CPU0_TEMP_1 NC_U_CPU0_TEMP_16

NC_U_CPU0_TEMP_10 NC_U_CPU0_TEMP_13

NC_U_CPU0_TEMP_11

R4793

1 2

100-5%

ECAD NOTE: ROUTE CPU0_THERMD_C_12 FROM EACH PROCESSOR PIN

R4400

1 2

8.2K-5%

86,87,89-91,96 86,87,89-91,96

+3.3V_AUX

.1uF

1 2

C3158

10V-10%

I2C_BMC_SEG2_VAUX_SDA I2C_BMC_SEG2_VAUX_SCL

NC_TMP75_3

+3.3V_AUX

21

C3157

LOCATION SET BY THERMAL TEAM

U_PLNR_TEMP

1

SDA

2

SCL

3

ALERT

4 5

GND A2

TMP75AID

.1uF

10V-10%

VCC

A0 A1

8 7 6

+3.3V_AUX

1 2

100-5%

R4523

1

INDEPENDENTLY AND TIE TOGETHER CLOSE TO PIN 4 of MAX6696 CHIP

2

+3.3V_AUX

R527

1 2

8.2K-5%

81526 are the jumper plugs

R528

1 2

8.2K-5%

21

J2

BMC BOOT MODE SEL JUMPER

89

MOD_BMC_SENSE_HUDI_GND_N

BMC_PROGRAM_N

NP0

66,86,95,129

+3.3V_AUX

14

12 13

U22

74VHC08

11

MOD_BMC_MD2_N

BMC BOOT OPTIONS

PROGRAM = 1, MD2 = 1: Normal Mode

PROGRAM = 0, MD2 = 0: Boot Mode

PROGRAM = 1, MD2 = 0: HUDI Mode

86

A01_DT9258_jp R4401, R4402, R4406 changed from 8.2K to 0ohm. A01_DT9258_jp R4522 changed from 100ohm to 0ohm.

86,87,89-91,96 86,87,89-91,96

17

I2C_BMC_SEG2_VAUX_SCL I2C_BMC_SEG2_VAUX_SDA

CPU1_THERMD_A_1

CPU1_THERMD_C_12

CPU1_THERMD_A_2

+3.3V_AUX

C2796

1 2

C2797

1 2

2200pf

50V-10%

1 2

50V-10%

R4522

0-5%

U_CPU1_TEMP

9

SCL

12

SDA

3

DXP1

4

DXN

5

DXP2

SMBALERT

6

ADD1

14 8

ADD0 GND

MAX6696

ADDR = 98

VCC NC1 NC2 OT1 OT2

STBY

RESET

2 1 16 10 13

11 15 7

+3.3V_AUX

NC_U_CPU1_TEMP_1 NC_U_CPU1_TEMP_16 NC_U_CPU1_TEMP_10 NC_U_CPU1_TEMP_13

NC_U_CPU1_TEMP_11

R4794

21

100-5%

+3.3V_AUX

R4407

1 2

+3.3V_AUX

8.2K-5%

21

C3159

ADDR = 90

ROOM = PLANAR_TEMP

.1uF

10V-10%

2

3

10V-10%

.1uF

21

C318

100-5%

21

R4795

+3.3V_AUX

ROOM=BMCFRU

U3

1

A0

2

A1

3 6

A2 SCL

4

GND1

24C02

SUB*_UF470

VCC

GND2

SDA

8 7

I2C_BMC_SEG2_VAUX_SCL

5

I2C_BMC_SEG2_VAUX_SDA

BLANK = JH673 16KX8

Programmed P/N = UF470

BMC LOG/FRU SEEPROM

86,87,89-91,96 86,87,89-91,96

R4406

1 2

0-5%

ECAD NOTE: ROUTE CPU1_THERMD_C_12 FROM EACH PROCESSOR PIN INDEPENDENTLY AND TIE TOGETHER CLOSE TO PIN 4 of MAX6696 CHIP

TEMPERATURE SENSORS FOR CPU AND AMBIENT

3

4

EMN: PLACE IN ACCESSIBLE AREA

66,95,96,128,129

66,96

66,95,128

66,95,96,128,129

CPLD_TCK CPLD_TDO CPLD_TDI CPLD_TMS

p/u for TCK at SIO

+3.3V_AUX

J_CPLD 1 2 3 4 5 6

NP0

SIO

Header

CPLD JTAG Chain

CPLD_TDI

MASTER CPLD SLAVE CPLD

CPLD_TD1 CPLD_TD2

DEBUG CPLD

(NP0)

Bypasses Debug CPLD

CPLD_TDO

TITLE

M2LB_Change_Note: Changed J_2 to right-angle part

MODULE: DESC: REV: OF

INC.

ROUND ROCK,TEXAS

BMC

SEC

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

SCHEM, PLN, SV, PE2950, MLK

DWG NO.

DATE

HX601

9/7/2007 89 OF 136

DCBA

REV.

A00

SHEET

A B C

D

1

+3.3V_AUX

R450

1 2

R451

8.2K-5%

1 2

16V-10%

.1uF

1uF 6.3V

95 95

129

95,129 95,129 95,129 95,129 95,129

8.2K-5%

MOD_BMC_COM1_C1+

C292

21

MOD_BMC_COM1_C1MOD_BMC_COM1_C2+

1 2

C540

MOD_BMC_COM1_C2-

MOD_BMC_SER_SOUTA MOD_BMC_SER_DTRA_N MOD_BMC_SER_RTSA_N

MOD_BMC_SER_DCDA_N MOD_BMC_SER_RIA_N MOD_BMC_SER_SINA MOD_BMC_SER_DSRA_N MOD_BMC_SER_CTSA_N

NC_MOD_COM1_U29_20

MOD_BMC_COM1_FORCEON MOD_BMC_COM1_FORCEOFF_N

Com1

28

C1+

24

C1-

1

C2+

2

C2-

14

T1IN

13

T2IN

12

T3IN

19

R1OUT

18

R2OUT

17

R3OUT

16

R4OUT

15

R5OUT

20

R2OUTB

23

FORCEON

22

FORCEOFF

MAX3243

U70

VCC

V+ V-

T1OUT T2OUT T3OUT

R1IN R2IN R3IN R4IN R5IN

INVALID

GND

+3.3V_AUX

26 27 3

9

MOD_BMC_COM1_SOUTA

10

MOD_BMC_COM1_DTRA

11

MOD_BMC_COM1_RTSA

4

MOD_BMC_COM1_DCDA

5

MOD_BMC_COM1_RIA

6

MOD_BMC_COM1_SINA

7

MOD_BMC_COM1_DSRA

8

MOD_BMC_COM1_CTSA

21

25

NC_MOD_BMC_COM1_INVALID_N

MOD_BMC_COM1_MAX3243_VPLUS

MOD_BMC_COM1_MAX3243_VMINUS

90 90 90

90 90 90 90 90

ROOM=COMMPORT

1uF 6.3V

1 2

C539

1uF 6.3V

1 2

C538

1uF 6.3V

1 2

C537

MOD_BMC_COM1_DCDA

90

MOD_BMC_COM1_DSRA

90

MOD_BMC_COM1_SINA

90

MOD_BMC_COM1_RTSA

90

MOD_BMC_COM1_SOUTA

90

MOD_BMC_COM1_CTSA

90

MOD_BMC_COM1_DTRA

90

MOD_BMC_COM1_RIA

90

50V-10%

1 2

470pF

C1010

50V-10%

1 2

470pF

C1012

If 0 Ohm not good, Sub with 99477

50V-10%

1 2

470pF

C1014

50V-10%

1 2

470pF

C1015

R4187

1 2

0-5%

R4186

1 2

0-5%

R4185

1 2

0-5%

R4184

1 2

0-5%

R4183

1 2

0-5%

R4182

1 2

0-5%

R4181

1 2

0-5%

R4180

1 2

0-5%

MOD_BMC_COM1_DCDA_L

MOD_BMC_COM1_DSRA_L

MOD_BMC_COM1_SINA_L

MOD_BMC_COM1_RTSA_L

MOD_BMC_COM1_SOUTA_L

MOD_BMC_COM1_CTSA_L

MOD_BMC_COM1_DTRA_L

MOD_BMC_COM1_RIA_L

90

MOD_BMC_COM1_DCDA_L

90

MOD_BMC_COM1_DSRA_L

90

MOD_BMC_COM1_SINA_L

90

MOD_BMC_COM1_RTSA_L

90

MOD_BMC_COM1_SOUTA_L

90

MOD_BMC_COM1_CTSA_L

90

MOD_BMC_COM1_DTRA_L

90

MOD_BMC_COM1_RIA_L

90

NC_MOD_BMC_J_COM1_10 NC_MOD_BMC_J_COM1_11

ADD=ADD*_01157

ADD1=ADD*_01157

1 6 2 7 3 8 4 9 5

10 11

12 13 14 15

J_COM1

1 6 2 7 3 8 4 9 5

NC1 NC2

G1 G2 G3 G4

DSUB

1

2

FEEDBACK: Allows 346mV Hysteresis(.696V - .349V)

R5894

NP

1 2

+CPU_VTT

+3.3V_AUX

50V-10%

1 2

470pF

C1011

50V-10%

470pF

+3.3V_AUX

1 2

C1009

50V-10%

1 2

470pF

C1013

50V-10%

470pF

1 2

C1016

ROOM=COMMPORT

SERIAL PORT CONNECTOR

2

COM PORT

3

86,87,89,91,96

PECI_CPU

R5841

R5838

I2C_BMC_SEG2_VAUX_SCL

1 2

5.1K-1%32.4K-1%

13,17,90

+CPU_VTT

NP

R5896

X

1 2

200K-1%

R5847

NC_U_PECI_1 NC_U_PECI_2 NC_U_PECI_3

NC_U_PECI_8

+3.3V_AUX

NP

R5849

X

21

1 2

4.7K-5%

NP

R5850

X

1 2

4.7K-5%

1 2 3 4 5 6 7 8 9

10

P0_7 P0_5 P0_3 P0_1 VSS_5 P1_7 P1_5 P1_3 P1_1 VSS_10

SUB*_GH526

U_PECI

CY8C21334

FEEDBACK

R5897

NP

1 2

487K-1%

VDD P0_6 P0_4 P0_2 P0_0 XRES P1_6 P1_4 P1_2 P1_0

X

+3.3V_AUX

20 19

NC_U_PECI_19

18

NC_U_PECI_18

17

NC_U_PECI_17

16 15 14 13 12 11

MOD_BMC_PECI_RST_BUF

MOD_BMC_PECI_ISSP_DATA

MOD_BMC_PECI_ISSP_CLK

90

487K-1%

R5846

0-5%

90

X

21

90

NP

C3582

X

R5845

NP

1 2

51.1K-1% +CPU_VTT

R5839

1 2

21

220pF

50V-10%

X

27.4K-1%

U1137

74LVC1G66

5

VCC

1

A

4

C

3

B

GND

2

R5895

1 2

49.9-1%

R5842

1 2

PECI_CPU

301-1%

13,17,90

21

C3584

J_PECI

1 2 3 4 5

NP0

.1uF

+3.3V_AUX

C3583

10V-10%

MOD_BMC_PECI_RST_BUF MOD_BMC_PECI_ISSP_CLK MOD_BMC_PECI_ISSP_DATA

.1uF

1 2

10V-10%

90

90 90

21

C3640

R5836

1 2

1K-1%

100pF

50V-5%

+3.3V_AUX

U63

14

12

VHC14

13

+3.3V_AUX

R6006

1 2

MOD_BMC_PECI_RST_N

3

8.2K-5%

86

4

86,87,89,91,96

I2C_BMC_SEG2_VAUX_SDA

1 2

0-5%

R5848

0-5%

R5840

1 2

ROOM=JUMPERS

5.1K-1%

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

M2LB_Change_Note: Changed part for J_COM1.

MODULE: DESC: REV: OF

BMC

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 90 OF 136

4

9-7-2007_16:40

DCBA

A B C

D

1

BMC I2C MUX & Header

2

86,87,91,96

I2C_BMC_SEG5_VAUX_SCL

I2C_BMC_SEG5_VAUX_SDA

U_BMC_I2C

7

YA

9

YB

5C3253 QSOP16

VCC

IA0 IA1 IA2 IA3

IB0 IB1 IB2 IB3

S0 S1

EA EB

16

6 5 4 3

10 11 12 13

14 2

1 15

NC_MOD_BMC_U_BMC_I2C_P6

I2C_BMC_PERC_VAUX_SCL

I2C_ESB2_MAIN_SCL_R

NC_MOD_BMC_U_BMC_I2C_P10

I2C_BMC_PERC_VAUX_SDA

I2C_ESB2_MAIN_SDA_R

1 2

100-5%

R5497

I2C_CHIPSET_SCL

I2C_CHIPSET_SDA

R4667

1 2

R4666

2.2K-5%

1 2

2.2K-5%

21,24,30,53,63,71,72,96

70

63

21,24,30,53,63,71,72,96

70

63

MOD_BMC_I2C_MUX_SEL0 MOD_BMC_I2C_MUX_SEL1

95 95

+3.3V_AUX

2 1

C3116

.1uF

16V-10%

86,87,92,96 86,87,92,96

86,87,89,90,96

70,86,87,96,120

86,87,96,120

86,87,91,96

86,87,92

I2C_BMC_IPMB_VAUX_SCL I2C_BMC_NIC_VAUX_SCL I2C_BMC_SEG2_VAUX_SCL I2C_BMC_SEG3_VAUX_SCL I2C_BMC_SEG4_VAUX_SCL I2C_BMC_SEG5_VAUX_SCL MOD_BMC_NIC_ALERT2_N

+3.3V_AUX

J_I2C_DBG

3 5 7

9 11 13 15

NP0

21 4 6 8 10 12 14 16

I2C_BMC_IPMB_VAUX_SDA I2C_BMC_NIC_VAUX_SDA I2C_BMC_SEG2_VAUX_SDA I2C_BMC_SEG3_VAUX_SDA I2C_BMC_SEG4_VAUX_SDA I2C_BMC_SEG5_VAUX_SDA MOD_BMC_NIC_ALERT1_N

86,87,92,96 86,87,92,96 86,87,89,90,96 70,86,87,96,120 86,87,96,120 86,87,91,96 86,87,92

2

3

P19_DT9231_jp_swap symbol

3

4

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 91 OF 136

DBA

BMC

4

A B C

San Marco Management Connectors

D

PLANAR MII CONN

1

2

+3.3V

92

95,129 95,129

95,129

86,87,91,92

86,87,91,96

KEY

PLANAR RAC CONN

J_DRAC5_MGMT

1

RAC_CONN_USB20_P

54

I2C_RACVID_SCL

105

MOD_BMC_I2C_IPMB_RAC_SDA

MOD_BMC_RAC_SERIAL_RX MOD_BMC_RAC_SERIAL_TX

MOD_BMC_RAC_SERIAL_CTS

MOD_BMC_RAC_SERIAL_DSR

MOD_BMC_RAC_SERIAL_RI

NC_NIC_FML_SDA

MOD_BMC_NIC_ALERT1_N

I2C_BMC_NIC_VAUX_SDA

I2C_BMC_NIC_VAUX_SCL

DRAC_TWO_LOMS

POP2

1 2

100-5%

R5980

X

SILKSCREEN=RAC_CONN1

3 5 7 8

9 11 12 13 14 15 16 17 18 19 21 22 23 24 25 26 27 28 29 31 32 33 34 35 36 37 38 39 41 42 43 44 45 46 47 48 49

2x25 2MM VERT

SHR LATCH SLOT

+3.3V_AUX

2 4 6

10

20

30

40

50

RAC_CONN_USB20_N

RAC_VID_RED RAC_VID_GREEN RAC_VID_BLUE RAC_VID_HSYNC RAC_VID_VSYNC

I2C_RACVID_SDA

+3.3V

54

98,105 98,105

98,105

98

105

MOD_BMC_I2C_IPMB_RAC_SCL

MOD_BMC_RAC_SERIAL_RTS

MOD_BMC_RAC_SERIAL_DTR MOD_BMC_RAC_SERIAL_DCD

MOD_BMC_IPMB_RST_N

92

95,129

95,129 95,129

+3.3V_AUX

12

R4748

8.2K-5%

ROOM=DRAC

+3.3V_AUX

12

R4750

RAC_PRES_N

8.2K-5%

86

66,86,92

MII_SHARE1_TXD3_R

83

MII_SHARE1_TXD2_R

83

12

R5188

J_DRAC5_MII

MOD_BMC_MII_CBL_PRES_RAC_N

MII_SHARE1_RXDV

83

LOM2_SHARE1_CLK

85

MII_SHARE1_RXD3

83

MII_SHARE1_RXD2

85,87

83

MII_SHARE1_RXD1

83

MII_SHARE1_RXD0

83

MOD_BMC_MII_SHARE1_TXD3

92

MOD_BMC_MII_SHARE1_TXD2

92

MOD_BMC_MII_SHARE1_TXD1

92

MOD_BMC_MII_SHARE1_TXD0

92

MII_SHARE0_RXDV

81

MII_I2C_SWITCH_N

MOD_BMC_MII_SHARE1_TXD3

21

MOD_BMC_MII_SHARE1_TXD2

SILKSCREEN=RAC_CONN2

200-5%

Place these R's close to the LOM and length match the TX lines

R5284

1 2

33-5%

R5285

1 3 5 6 7 8

9 11 12 13 14 15 16 17 18 19 21 22 23 24 25 26 27 28 29 31 32 33 34 35 36 37 38 39 41 42 43 44

2x22 2MM VERT

SHR LATCH SLOT

92

2 4

10

20

30

40

MII_SHARE0_TXD3_R

81

MII_SHARE0_TXD2_R

81

MOD_BMC_MII_SHARE1_TXEN

MOD_BMC_MII_SHARE0_TXEN

LOM1_SHARE0_CLK MII_SHARE0_RXD3 MII_SHARE0_RXD2

MII_SHARE0_RXD1

MII_SHARE0_RXD0

MOD_BMC_MII_SHARE0_TXD3 MOD_BMC_MII_SHARE0_TXD2 MOD_BMC_MII_SHARE0_TXD1 MOD_BMC_MII_SHARE0_TXD0

MOD_BMC_MII_CBL_PRES_PLNR_N

R5290

33-5%

R5291

1 2

92

85 81 81

81

81 92

92

92 92

21

MOD_BMC_MII_SHARE0_TXD3

MOD_BMC_MII_SHARE0_TXD2

+3.3V_AUX

R5175

1

2

1

8.2K-5%

86,92

2

92

3

4

Pulldown used if LOM2 is not 5708

MLK: Netname changed to DRAC_TWO_LOMS as its an active high Signal

86,87,91,92

92

86,92

66,86,92

MOD_BMC_NIC_ALERT1_N

ONLY POPULATE IF NEED ONLY 1 ALERT LINE

MOD_BMC_I2C_IPMB_RAC_SCL

MOD_BMC_I2C_IPMB_RAC_SDA

MOD_BMC_MII_CBL_PRES_PLNR_N RAC_PRES_N

ADD=ADD*_NC153 ADD1=ADD*_MW624 ADD2=ADD*_NC153

ADD3=ADD*_HF606

P23_DT9266_jp_Changed standoff and added screw

R5120

NP

1 2

0-5%

R3618

1 2

R3619

1 2

Depop U1130 if R4818 is populated

Depop R4818 if U1130 is populated

ALWAYS LEAVE R4827 and R4748 populated

X

0-5%

MOD_BMC_NIC_ALERT2_N

I2C_BMC_IPMB_VAUX_SCL

I2C_BMC_IPMB_VAUX_SDA

NC153 = standoff w/ latch MW624 = New style standoff w/ latch NC153 = standoff w/ latch HF606 = Screw for MW624

+3.3V_AUX

14

1 2

U1130

3

74VHC32

86,87,91

86,87,91,96

ISO_SHARED_BOOT_MODE_N

+3.3V

LAN_AUX

R5955

1 2

BAR43

31

4.7K-5%

SHARED_BOOT_MODE_N

D1112

81,83

+3.3V_AUX

R5637

1 2

220-5%

MII_SHARE1_TXD1_R

83

MII_SHARE1_TXD0_R

83

MII_SHARE1_TXEN_R

83

+3.3V_AUX

C3536

+3.3V_AUX

14

4 5

+3.3V_AUX

9

10

+3.3V_AUX

12 13

U1130

74VHC32

14

U1130

74VHC32

14

U1130

74VHC32

6

8

11

33-5%

R5286

1 2

33-5%

R5287

33-5%

R5288

1 2

33-5%

NOTE: RX and TX BITS are SWIZZLED. DRAWING shows SAN MARCO CONNECTORn parts as PROE symbols

21

.1uF

16V-10%

NC_OR_6

NC_OR_8

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY

NC_OR_11

BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

MOD_BMC_MII_SHARE1_TXD1

21

MOD_BMC_MII_SHARE1_TXD0

MOD_BMC_MII_SHARE1_TXEN

SHARENIC_CBL_PRES_RAC_N

MII_SHARE1_TXEN MII_SHARE1_CLK MII_SHARE1_TXD3 MII_SHARE1_TXD2 MII_SHARE1_TXD1 MII_SHARE1_TXD0 MII_SHARE1_RXD3 MII_SHARE1_RXD2 MII_SHARE1_RXD1 MII_SHARE1_RXD0 MII_SHARE0_TXEN GND GND GND GND GND GND GND GND GND GND

92

SAN MARCO CONNECTOR

PROPRIETARY NOTE

81

MII_SHARE0_TXD1_R

MII_SHARE0_TXD0_R

MII_SHARE0_TXEN_R

MII_SHARE1_RXDV

GND GND GND GND GND GND GND GND GND GND MII_SHARE0_RXDV MII_SHARE0_CLK MII_SHARE0_TXD3 MII_SHARE0_TXD2 MII_SHARE0_TXD1 MII_SHARE0_TXD0 MII_SHARE0_RXD3 MII_SHARE0_RXD2 MII_SHARE0_RXD1 MII_SHARE0_RXD0 MII_CBL_PRES_PLNR_N

TITLE

DWG NO.

DATE

33-5%

R5289

33-5%

R5292

1 2

33-5%

R5293

33-5%

21

MOD_BMC_MII_SHARE0_TXD1

MOD_BMC_MII_SHARE0_TXD0

21

MOD_BMC_MII_SHARE0_TXEN

MODULE: DESC: REV: OF

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 92 OF 136

92

3

BMC

4

C

DBA

A B C

+3.3V_AUX

12

D

1

FROM CONTROL PANEL

70

BTN_ID_RAW_N

A B

1 2

3 4

GND_1 GND_2

WHITE PUSHBUTTON

SPST SWITCH

P19_DT9231_jp_swap symbol

SW_ID

R5143

8.2K-5%

R5165

1K-5%

RC=0.92ms

21

C3213

.1uF

16V-10%

1 2

REAR ID BUTTON

R5127

100-5%

GOES TO BMC (Schmitt Input)

MOD_BMC_ID_BUTTON_DB_N

ROOM=CYC_REAR

86

1

2

93,95,128

MOD_BMC_LED_ID_BLUE

ROOM=CYC_REAR

+3.3V_AUX

NP

21

Q15

R5443

X

8.2K-5%

21

R5459

D

1

G

S

2N7002

4.7K-5%

MOD_BMC_2N7002_D1

3

2

1 2

100-5%

MOD_BMC_CYC_BLUE_DRV

1 2

100-5%

R221

R222

USING MORE RESISTORS

TO WITHSTAND SHORT CIRCUIT ON CONNECTOR

OR DRAC3 AC ADAPTER PLUGGED IN

+5V_AUX

2

R464

1 2

8.2K-5%

MOD_BMC_3906_C1

MOD_BMC_3906_B

3906

MOD_BMC_68

1

93

Q1

1 2

68-5%

3

R635

1 2

68-5%

R634

L35

BLM11A601S

U38

CATH1

1

CATH2

3

COMMON1 COMMON2

CATH3

MOD_BMC_CATH3

93

R678

1 2

0-5%

21

MOD_BMC_AMBER_CATH_REAR

4

CATH4

6

BZA462A

MOD_BMC_CYC_AMB_DRV

J_CYC

1 3 2

2 5

1 2

100-5%

AB

MOD_BMC_3906_C2

1 2

100-5%

R223

+3.3V_AUX

R224

2

3

1 2

39-5%

R268

MOD_BMC_L_39R_82R

1

3906

Q2

39-5%

MOD_BMC_3906_B2

1 2

R269

R465

1 2

8.2K-5%

MOD_BMC_2N7002_D3

Q16

D

3

1

G

S

2

2N7002

+3.3V_AUX

NP

R5444

X

R5458

1 2

8.2K-5%

1 2

MOD_BMC_LED_ID_AMBER

4.7K-5%

2

93,95,128

3

93,95,128

MOD_BMC_LED_ID_AMBER

1

G

2N7002

1 2

68-5%

Q13

D

3

S

2

1 2

68-5%

R637

MOD_BMC_2N7002_D2

R636

C298

Place C298, C299 and L35, L36 close to J_CYC

.1uF

2 1

16V-10%

BLUE: 23 mA @3.8V AMBER: 23 mA @2.1V

center pin is AMBER+

MOD_BMC_BLUE_CATH_REAR

DC PWR JACK

C299

2 1

BLM11A601S

.1uF

16V-10%

L36

21

82.5-1%

MOD_BMC_2N7002_D4

3

2

2N7002

1 2

R356

Q14

D

S

1 2

82.5-1%

1

G

R357

MOD_BMC_LED_ID_BLUE

3

93,95,128

4

MOD_BMC_CYC_BLUE_DRV

93

MOD_BMC_CYC_AMB_DRV

93

REAR ID LED & REAR CYCLOPS CONNECTOR

ID Button / Rear Cyclops

LED_CYC

BLUE

1

3

AMB

LED

BLU/AMB

2

MODULE: DESC: REV: OF

SEC

BMC

4

INC.

TITLE

SCHEM, PLN, SV, PE2950, MLK

ROUND ROCK,TEXAS

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

REV.

HX601

SHEET

A00

9/7/2007 93 OF 136

DCBA

9-7-2007_16:41

A B C

D

1

2

3

4

1U Fan Connectors

J01_jp_Changed to the 2x6 fan connector

94,120

80

80,94

94 94

80,94

94 80

80,94

94 80

80,94

MOD_BMC_FANSPEED_1

MOD_BMC_FANSPEED_2

MOD_BMC_FANSPEED_3

MOD_BMC_FANSPEED_4

86

BMC_FAN6_TACH_R

MOD_BMC_FAN7_TACH_R

80,94

80,86

MOD_BMC_FANPWR_ZONE3

94,120

MOD_BMC_FANPWR_ZONE1

94

London FANSPEED_1_R (ZONE 1) ==> CPU2 Fans FANSPEED_2_R (ZONE 2) ==> CPU1/Mem Fans FANSPEED_3_R (ZONE 3) ==> PSU Fans

BMC_FAN5_TACH_R

MOD_BMC_FAN13_TACH_R

MOD_BMC_FANPWR_ZONE3

MOD_BMC_FAN1_TACH_R MOD_BMC_FAN9_TACH_R

MOD_BMC_FANPWR_ZONE2

MOD_BMC_FAN3_TACH_R

MOD_BMC_FAN11_TACH_R

MOD_BMC_FANPWR_ZONE1

MOD_BMC_FAN4_TACH_R

MOD_BMC_FAN12_TACH_R

MOD_BMC_FANPWR_ZONE1

71,73,115,122

+3.3V

21

C8388

.1uF

16V-10%

R4918

21

C8389

+3.3V

.1uF

16V-10%

POP8

R4917

P5V_EN

8.2K-5%

1 2

8.2K-5%

1 2

10 9 12 11

+3.3V_AUX

4.7K-5%

SUB=POP7

R6004

1 2

100-5%

1 2

POP8

1 2

POP8

J_FAN1U_1

2 1 4 3 6 5 8 7

BMC_FAN6_TACH_R MOD_BMC_FAN14_TACH_R

MOD_BMC_FANPWR_ZONE3

HDR 2X6 SHR

2MM WTB

POP8

J_FAN1U_2

2 1 4 3 6 5 8 7

MOD_BMC_FAN2_TACH_R MOD_BMC_FAN10_TACH_R

MOD_BMC_FANPWR_ZONE2

HDR 2X6 SHR

2MM WTB

POP8

J_FAN1U_3

2 1 4 3 6 5 8 7

MOD_BMC_FAN7_TACH_R MOD_BMC_FAN15_TACH_R

MOD_BMC_FANPWR_ZONE1

HDR 2X6 SHR

2MM WTB

POP8

J_FAN1U_4

2 1 4 3 6 5 8 7

MOD_BMC_FAN8_TACH_R MOD_BMC_FAN16_TACH_R

MOD_BMC_FANPWR_ZONE1

HDR 2X6 SHR

2MM WTB

POP8

P/U's assist poortors:

drive strength of H8

1 2

R1768

1 2

4.7K-5%

R1767

SUB=POP7

1 2

4.7K-5%

R1766

SUB=POP7

1 2

4.7K-5%

R1915

SUB=POP7

1 2

PSU Fan Tachs

BAT54SW

K2

3

A2/K1

D1084

R6005

R4958

8.2K-5%

R4957

1.5K-5%

1K-1%

1 2

BAT54SW

K2

2 1

3

A2/K1

POP8

D1083

143U60

74VHC08

A1

12

A1

94,120 80

80,94

94 94

80,94

94 80

80,94

94 80

80,94

R's protect against backfeed. Up to 2 fans per R

SUB=POP7

3 1

BAR43

MOD_BMC_FAN_1_R

14

4 5

U60

74VHC08

6

MOD_BMC_FAN_2_R

148U60

9

10

74VHC08

MOD_BMC_FAN_3_R

14

12

U60

13

74VHC08

SUB=POP7

80,94

11

ZONE 3 - PSU2 Fan

MOD_BMC_FAN6_TACH

50V-10%

4700pF

1 2

C1788

80,94

86

ZONE 3 - CPU1 Fan

POP8

16V-10%

MOD_BMC_FAN7_TACH

.01uF

C851

21

86,88

D64

SUB=POP7

BAR43

D65

SUB=POP7

BAR43

3 1

13

NC_MOD_BMC_FAN_4_R

MOD_BMC_FANPWR_ZONE2

94

MOD_BMC_FANPWR_ZONE2

94

D66

R921

SUB=POP7

1 2

100-5%

R1024

1 2

100-5%

R1025

1 2

100-5%

21

POP8

C8013

.1uF

16V-10%

MOD_BMC_FAN9_TACH_R

21

POP8

C8012

.1uF

16V-10%

MOD_BMC_FAN10_TACH_R

+3.3V

21

R8016

POP8

+3.3V

21

R8017

2U Fan Connectors

MOD_BMC_FAN_1

MOD_BMC_FAN_2

8.2K-5%

1.5K-5%

POP8

1.5K-5%

R8048

POP8

R8047

POP8

ZONE 1 - CPU1 FAN

BMC_FAN_3

21

J01_DT7798_SMR - added 2u Fan bracket to BOM (MC848)

ZONE 2 - CPU2 FAN

ZONE 3 - PSU FANS

120

BAT54SW

K2

2 1

3

POP8

K2

POP8

A2/K1

D8012

BAT54SW

3

A2/K1

D8011

A1

12

A1

80,94

POP7

80,94

POP7

80,94

POP7

80,94

POP7

80,94

16V-10%

.01uF

POP8

16V-10%

POP8

.01uF

MOD_BMC_FANPWR_ZONE2

ADD=ADD7_MC848

J_FAN2U_1

2 1

4 3

HL44020

CONN, 2x2

MOD_BMC_FANPWR_ZONE2

J_FAN2U_2

2 1

4 3

HL44020

CONN, 2x2

MOD_BMC_FANPWR_ZONE1

J_FAN2U_3

2 1

4 3

HL44020

CONN, 2x2

MOD_BMC_FANPWR_ZONE1

J_FAN2U_4

2 1

4 3

HL44020

CONN, 2x2

MOD_BMC_FANPWR_ZONE3

94,120

MOD_BMC_FANPWR_ZONE1

94

ZONE 2 - CPU2 Fan

MOD_BMC_FAN9_TACH

C8027

21

ZONE 2 - CPU2 Fan

MOD_BMC_FAN10_TACH

C8028

21

+12V

94

21

C1614

.1uF

16V-10%

MOD_BMC_FAN1_TACH_R

21

C1618

.1uF

16V-10%

MOD_BMC_FAN2_TACH_R

21

C1619

.1uF

16V-10%

MOD_BMC_FAN3_TACH_R

21

C1620

.1uF

16V-10%

MOD_BMC_FAN4_TACH_R

21

C8001

.1uF

16V-10%

BMC_FAN5_TACH_R

21

POP8

C8014

.1uF

16V-10%

MOD_BMC_FAN8_TACH_R

86,88

+3.3V

R4914

1 2

+3.3V

R4916

1 2

+3.3V

R4913

1 2

+3.3V

R4915

1 2

+3.3V

21

R8002

+3.3V

21

R8018

Fan Tachs

R5998

1 2

100-5%

R5989

1 2

8.2K-5%

1 2

8.2K-5%

1 2

8.2K-5%

100-5%

8.2K-5%8.2K-5%

POP8

1 2

8.2K-5%

R5999

100-5%

1 2

8.2K-5%

R6000

100-5%

1 2

8.2K-5%

R6001

100-5%

R4956

1 2

8.2K-5%

R6002

R8046

1 2

8.2K-5%

R8049

1.5K-5%

POP8

R4953

R4954

21

R4955

21

R5993

R5990

1 2

21

R5991

R5992

1 2

21

1K-1%

K2

1K-1%

POP8

BAT54SW

12

3

A2/K1

D1078

BAT54SW

K2

2 1

3

A2/K1

BAT54SW

K2

3

A2/K1

BAT54SW

K2

2 1

3

A2/K1

D1081

BAT54SW

K2

2 1

3

A2/K1

D8001

BAT54SW

K2

3

A2/K1

D8013

M2LB_Change_Note: Changed fan circuitry. Continued on Sheet 80.

A1

D1079

D1080

12

A1

50V-10%

POP8

16V-10%

.01uF

ZONE 1 - CPU2 Fan

MOD_BMC_FAN1_TACH

4700pF

1 2

C1792

ZONE 1 - CPU2 Fan

MOD_BMC_FAN2_TACH

4700pF

1 2

C1789

ZONE 2 - CPU1 Fan

MOD_BMC_FAN3_TACH

4700pF

1 2

C1790

ZONE 2 - CPU1/Mem Fan

MOD_BMC_FAN4_TACH

4700pF

1 2

C1791

ZONE 3 - PSU1 FAN

MOD_BMC_FAN5_TACH

4700pF

1 2

C8029

ZONE 1 - CPU1 Fan

MOD_BMC_FAN8_TACH

C8030

21

P18_DT9071_jp

TITLE

86

86,88

MODULE: DESC: REV: OF

BMC

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

1

2

3

FANS

4

Berlin FANSPEED_1_R (ZONE 1) ==> CPU1/Mem Fans FANSPEED_2_R (ZONE 2) ==> CPU2 Fans FANSPEED_3_R (ZONE 3) ==> PSU Fans

ROOM=FANS

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

REV.

HX601

A00

SHEET

9/7/2007 94 OF 136

DCBA

A B C

CPLD SIGNAL TERMINATION

ECAD: Place These Series R's next to U_CPLD_SLV pins

CPU0_VRM_PWRGOOD CPU1_VRM_PWRGOOD

95,117,128 95,119,128

95,128

ECAD: Place These Series R's next to U_CPLD_MSTR pins

MOD_BMC_SHIFTY_BMC_CLK_R

MOD_BMC_SHIFTY_BMC_LATCH_R

R4326

1 2

33-5%

R4327

1 2

MOD_BMC_SHIFTY_BMC_CLK

MOD_BMC_SHIFTY_BMC_LATCH

D

95,129

1

2

3

95,129

66,129 66,129

66,129 66,129 66,129 66,129

66,129 66,129 66,129 66,129 66,129 66,129 66,129 66,129

86,129 95,129 86,129 95,129 86,129 95,129 86,129 86,129 92,129 92,129 92,129 92,129 92,129 92,129 92,129 92,129

66,129 96,129

129

70,129

129

SIO_SOUTA SIO_SINA MOD_BMC_SIO_RTSA_N_R

129

SIO_CTSA_N SIO_DTRA_N SIO_DSRA_N SIO_DCDA_N MOD_BMC_SIO_RIA_N_R

129

SIO_SOUTB SIO_SINB SIO_RTSB_N SIO_CTSB_N SIO_DTRB_N SIO_DSRB_N SIO_DCDB_N SIO_RIB_N

MOD_BMC_SOUT MOD_BMC_SIN_R MOD_BMC_RTS0_N MOD_BMC_CTS0_N_R MOD_BMC_DTR0_N MOD_BMC_DSR0_N_R MOD_BMC_DCD0_N MOD_BMC_RI0_N MOD_BMC_RAC_SERIAL_TX MOD_BMC_RAC_SERIAL_RX MOD_BMC_RAC_SERIAL_RTS MOD_BMC_RAC_SERIAL_CTS MOD_BMC_RAC_SERIAL_DTR MOD_BMC_RAC_SERIAL_DSR MOD_BMC_RAC_SERIAL_DCD MOD_BMC_RAC_SERIAL_RI

DEBUG_ERROR_LEVEL_0

P3V3AUX_CPLD_N

72,129

MOD_BMC_CK_32K_SUSCLK_SLAVE_R

129

MOD_BMC_P3V3AUX_PWRGOOD_ESM_R

129

129 129

129

MOD_BMC_RISER_2_TYPE_EXP_N_R SIDEPLANE_PRES_N

MOD_BMC_CPLD_SLV_GND_82

MOD_BMC_CPLD_SLV_GND_32 MOD_BMC_CPLD_SLV_GND_96

MOD_BMC_CPLD_SLV_GND_26

MOD_BMC_SHIFTY_BMC_DATA_UP_R

MOD_BMC_I2C_MUX_SEL0_R

MOD_BMC_I2C_MUX_SEL1_R

VID_SECURITY_BLANK_N_R

MOD_BMC_DSR0_N_R

MOD_BMC_CTS0_N_R

MOD_BMC_SIN_R

MOD_BMC_SER_SOUTA_R

MOD_BMC_SER_DTRA_N_R

jp_P01_1890_Removed VTT selection circuit.

RSR_RT_PRES_N

91

IO1/A0/GOE0

92

IO2/A1

93

IO3/A2

94

IO4/A3

97

IO5/A4

98

IO6/A5

99

IO7/A6

100

IO8/A7

3

IO9/A8

4

IO10/A9

5

IO11/A10

6

IO12/A11

8

IO13/A12

9

IO14/A13

10

IO15/A14

11

IO16/A15

37

IO1/B0

36

IO2/B1

35

IO3/B2

34

IO4/B3

31

IO5/B4

30

IO6/B5

29

IO7/B6

28

IO8/B7

22

IO9/B8

21

IO10/B9

20

IO11/B10

19

IO12/B11

17

IO13/B12

15

IO15/B14

14

IO16/B15

12

I_12

23

I_23

27

I_27

89

CLK0_I

38

CLK1_I

39

CLK2_I

88

CLK3_I

46

GND_1_46

57

GND_1_57

68

GND_1_68

82

GND_1_82

7

GND_0_7

18

GND_0_18

32

GND_0_32

96

GND_0_96

1

GND_1

26

GND_26

76

GND_76

SUB*_MC995

R4325

1 2

33-5%

R5915

1 2

33-5%

R5916

33-5%

R5918

1 2

33-5%

R5920

R5914

33-5%

R5917

1 2

33-5%

21

R5919

33-5%

R5921

1 2

33-5%

21

33-5%

U_CPLD_SLV

IO1/D0/GOE1

ISPM4064V 75T100C

21

IO1/C0 IO2/C1 IO3/C2 IO4/C3 IO5/C4 IO6/C5 IO7/C6 IO8/C7 IO9/C8

IO10/C9 IO11/C10 IO12/C11 IO13/C12 IO14/C13 IO15/C14 IO16/C15

IO2/D1 IO3/D2 IO4/D3 IO5/D4 IO6/D5 IO7/D6 IO8/D7 IO9/D8

IO10/D9 IO11/D10 IO12/D11 IO13/D12 IO14/D13IO14/B13 IO15/D14 IO16/D15

VCC01_45 VCC01_63 VCC01_83

VCCO0_13 VCCO0_33 VCCO0_95

VCC_25 VCC_40 VCC_75GND_51 VCC_90

I_62 I_73 I_77

TCK TDI TDO TMS

MOD_BMC_SHIFTY_BMC_DATA_UP

MOD_BMC_I2C_MUX_SEL0

MOD_BMC_I2C_MUX_SEL1

VID_SECURITY_BLANK_N

MOD_BMC_DSR0_N

MOD_BMC_CTS0_N

MOD_BMC_SIN

MOD_BMC_SER_SOUTA

MOD_BMC_SER_DTRA_N

41 42 43 44 47 48 49 50 53 54 55 56 58 59 60 61

87 86 85 84 81 80 79 78 72 71 70 69 67 6616 65 64

62 73 77

MOD_BMC_SER_SOUTA_R MOD_BMC_SER_SINA MOD_BMC_SER_RTSA_N_R MOD_BMC_SER_CTSA_N MOD_BMC_SER_DTRA_N_R MOD_BMC_SER_DSRA_N MOD_BMC_SER_DCDA_N MOD_BMC_SER_RIA_N MOD_BMC_SYSTEM_TYPE0 MOD_BMC_SYSTEM_TYPE1 MOD_BMC_SYSTEM_TYPE2 MOD_BMC_TYPE0 MCH_ESB_ERR_0_N MCH_ESB_ERR_1_N MCH_ESB_ERR_2_N SLAVE_P3V3AUX_CPLD_EN_N

CPU0_BSEL_0_3V_N

CPU1_BSEL_0_3V_N MOD_BMC_I2C_MUX_SEL0_R MOD_BMC_I2C_MUX_SEL1_R BMC_PROGRAM_N VID_SECURITY_BLANK_N_R BMC_P3V3AUX_CPLD_EN RSR_LFTE_PRES_N CPU0_IERR_3V CPU1_IERR_3V STORAGE_ADAPTER_PRES_N MCH_ESB_ERR_0_N_CPLD_R

MOD_BMC_SHIFTY_BMC_DATA_UP_R

MOD_BMC_SHIFTY_BMC_DATA_DN MOD_BMC_SHIFTY_BMC_LATCH MOD_BMC_SHIFTY_BMC_CLK

BACKPLANE_PRES_N

J_PWR2_CABLE_PRES_N RSR_LFTX_PRES_N

24 2 74 52

45 63 83

13 33 95

25 40 7551 90

+3.3V_AUX

95,128

91

106

86

90

95,129 90,129 129 90,129 95,129 90,129 90,129 90,129 88,129 88,129 88,129 88,129 24,52,129 24,52,129 24,52,129 136

20,129 20,129 95,129 95,129 66,86,89,129 95,129 86,88 71,129 20,129 20,129 52,54,70,129 52,129

95,129 95,129 95,129 95,129

120,129 120,129

73,129

CPLD_TCK CPLD_TD1 CPLD_TD2 CPLD_TMS

66,89,95,96,128,129 95,96,128,129 96,129 66,89,95,96,128,129

+3.3V_AUX

MOD_BMC_CPLD_SLV_VCC_83

MOD_BMC_CPLD_SLV_VCC_33 MOD_BMC_CPLD_SLV_VCC_95

MOD_BMC_CPLD_SLV_VCC_40

MOD_BMC_CPLD_SLV_VCC_90

129

129 129

129

C3594

1 2

1000pF

50V-10%

C3593

1 2

1000pF

50V-10%

86,87,128 86,87,128 86,87,128 86,87,128 86,87,128

17,19,119,128

86,87,128 86,87,128 86,87,128 86,87,128 86,87,128

86,88,128 86,88,128

95,108,128

71,72,110,122,128

66,89,95,96,128,129

66,89,128

66,89,95,96,128,129

95,96,128,129

+3.3V_AUX

R4784

1 2

8.2K-5%

R4785

NP

J_DBG

1 2

R5956

X

1 2

NP0

87,128

96,128 96,128 96,128 86,128 13,128 13,128 17,128 17,128

128,136

95,128 20,128

95,128 95,128 95,128 95,128 20,128 20,128 20,128 20,128

128

93,128 93,128 95,128 54,128

21

8.2K-5%

0-5%

C641

95,128

MOD_BMC_SHIFTY_BMC_DATA_DN_R

MOD_BMC_A1 MOD_BMC_A2 MOD_BMC_A3 MOD_BMC_A4 MOD_BMC_A5 FSB1_VID_SELECT MOD_BMC_D0 MOD_BMC_D1 MOD_BMC_D2 MOD_BMC_D3 MOD_BMC_RD_N MOD_BMC_WR_N MOD_BMC_EXGP_CS_N MOD_BMC_CPLD_INT_N OMNIVU_SHIFT_DATA_DN OMNIVU_SHIFT_LATCH OMNIVU_SHIFT_CLK MOD_BMC_REAL_RST_N CPU0_MS_ID0 CPU0_MS_ID1 CPU1_MS_ID0 CPU1_MS_ID1 P3V3AUX_MASTER_PWRGOOD MOD_BMC_DEBUG_JUMPER0 CPU_FORCEPR_N P0V9_OV_N MOD_BMC_SHIFTY_BMC_DATA_UP MOD_BMC_SHIFTY_BMC_DATA_DN_R MOD_BMC_SHIFTY_BMC_LATCH_R MOD_BMC_SHIFTY_BMC_CLK_R CPU0_BSEL_1_3V_N CPU0_BSEL_2_3V_N CPU1_BSEL_1_3V_N CPU1_BSEL_2_3V_N

MOD_BMC_VTT_CPU_PWRGOOD_R

P1V5_PXH_PWRGOOD MOD_BMC_LED_ID_AMBER MOD_BMC_LED_ID_BLUE MOD_BMC_BUF_CK_CPLD CK_32K_SUSCLK_MASTER

CPLD_TMS CPLD_TDI CPLD_TCK CPLD_TD1

MOD_BMC_GND1_CPLD_R

128

MOD_BMC_DEBUG_JUMPER0

P0V9_OV_N

14

3

95,128

95,108,128

U63

4

VHC14

R788

1 2

21

1000pF

16V-10%

P19_DT9199_rt_remove_sub_C641

100-1%

95,128,133,134

95,108,128 95,108,128

MLK: VID_SELECT from CPUs coming to CPLD on pins 7 & 68

MOD_BMC_CK_CPLD

RC = 0.1 us

F = 2.0MHz

LINEAR_PWRGOOD P0V9_PWRGOOD P0V9_OV_N

50V-5%

100pF

1 2

C3635

+3.3V_AUX+3.3V_AUX

14

1

50V-5%

100pF

33-5%

R4324

1 2

MOD_BMC_SHIFTY_BMC_DATA_DN

33-5%

U_CPLD_MSTR

2 52

IO1_B1 IO1_B2

3 53

IO2_B1 IO2_B2

4 54

IO3_B1 IO3_B2

5 55

IO4_B1 IO4_B2

6 56

IO5_B1 IO5_B2

7 57

IO6_B1 IO6_B2

8 58

IO7_B1 IO7_B2

15

IO8_B1

16

IO9_B1

17 67

IO10_B1 IO10_B2

18 68

IO11_B1 IO11_B2

19 69

IO12_B1 IO12_B2

20 70

IO13_B1 IO13_B2

21 71

IO14_B1 IO14_B2

26 72

IO15_B1 IO15_B2

27 73

IO16_B1 IO16_B2

28 74

IO17_B1 IO17_B2

29 75

IO18_B1 IO18_B2

30 76

IO19_B1 IO19_B2

33 77

IO20_B1 IO20_B2

34 78

IO21_B1 IO21_B2

35 81

IO22_B1 IO22_B2

36 82

IO23_B1 IO23_B2

37 83

IO24_B1 IO24_B2

38 84

IO25_B1 IO25_B2

39 85

IO26_B1 IO26_B2

40 86

IO27_B1 IO27_B2

41 87

IO28_B1 IO28_B2

42 88

IO29_B1 IO29_B2

47

IO30_B1

48

IO31_B1

49

IO32_B1

50

IO33_B1

51

IO34_B1

43

IO35_B1/DEV_OE

44

IO36_B1/DEV_CLRN

12

IO37_B1/GCLK0

14

IO38_B1/GCLK1

62

IO41_B2/GCLK2

64

IO42_B2/GCLK3

22

TMS

23

TDI

24

TCK

25

TDO

11

GNDINT_11

65

GNDINT_65

10

GNDIO_10

32

GNDIO_32

46

GNDIO_46

60

GNDIO_60

79

GNDIO_79

93

GNDIO_93

IO8_B2 IO9_B2

IO30_B2 IO31_B2 IO32_B2 IO33_B2 IO34_B2 IO35_B2 IO36_B2 IO37_B2 IO38_B2 IO39_B2 IO40_B2

VCCINT_13 VCCINT_63

VCCIOB1_9 VCCIOB1_31 VCCIOB1_45

VCCIOB2_59 VCCIOB2_80 VCCIOB2_94

EPM240 CPLD

SUB*_XN288

MLK: New Prog PN for Master CPLD

100TQFP

U63

MOD_BMC_BUF_CK_CPLD_R

2

VHC14

1 2

50V-5%

C3634

100pF

1 2

C3585

M2LB_Change_Note: Changed P1V5_ESB_PWRGOOD to P1V5_PXH_PWRGOOD.

61 66

89 90 91 92 95 96 97 98 99 100 1

13 63

9 31 45

59 80 94

R5771

1 2

33-5%

+3.3V_AUX

22uF 6.3V

95,129

P5V_RISER_PWRGOOD PS_THROTTLE CPU0_PRES_N CPU1_PRES_N

PS1_PRES_N PS2_PRES_N

ESB_PWR_ON_REQ CPU0_THRMTRIP_3V CPU1_THRMTRIP_3V ESB_THERMTRIP_N FSB0_VID_SELECT LINEAR_PWRGOOD VTT_PWRGOOD P1V5_PWRGOOD P1V8_PWRGOOD P3V3_PWRGOOD P5V_PWRGOOD CPU0_VRM_PWRGOOD CPU1_VRM_PWRGOOD MOD_BMC_PS1_PWRGOOD_R PS2_PWRGOOD BACKPLANE_PWRGOOD FLEX_BAY_PWRGOOD P0V9_PWRGOOD CPU_VRD_PWRGOOD VCORE_ENABLE VR_CHAIN_ENABLE PS_ENABLE_CPLD_N MOD_BMC_SP_MASTER_88_R PERST_N MOD_BMC_SP_MASTER_90_R

MOD_BMC_SYSTEM_PWRGOOD_R MOD_BMC_SYS_PWRGOOD_ESM_R

LOM_PERST_N LOM_SWITCH_N LOM_SEL_VAUX_N

PLT_RST_BMC_CPLD_N CK_PWRDN_N RESET_BTN_N ESB_PWRBTN_N

The pin will be push-pull output.

+3.3V_AUX_CPLD

MOD_BMC_POWER2_CPLD_R

MOD_BMC_POWER1_CPLD_R

Configure CPLD pin for no pullup Denotes Input Only Pin Denotes Pin Configured as Input Denotes Pin Configured as Output Denotes Pin Configured as Input/Output

Denotes Open-drain

Denotes Schmitt Trigger Input

MOD_BMC_BUF_CK_CPLD

1 2

C585

16V-10%

.1uF

21

16V-10%

.1uF

C332

C333

21

16V-10%

.1uF

21

16V-10%

C334

71,73,122,128 128,131 13,117,128 17,21,119,128 120,128 120,128 54,86,128 20,128 20,128 54,128 13,15,117,128 95,128,133,134 109,122,128 113,122,128,135 112,122,128,135 114,122,128,135 115,122,128 95,117,128 95,119,128 128 120,128 120,128 120,128 95,108,128 54,128 117,119,122,128 122,128 70,120,128 128 126,128 128 128 128 81,83,128 85,128 85,128 86,126,128 45,48,70,128 21,30,54,58,128 54,58,128

See AR1861

See AR1931

96,136

+3.3V_AUX

128

95,128

.1uF

C335

1uF 6.3V

1 2

C467

1uF 6.3V

1 2

1uF 6.3V

C468

21

MODULE: DESC: REV: OF

SEC

1 2

1uF 6.3V

C469

1

2

3

1 2

C470

BMC

4

ROOM = SLAVE

21

C328

.1uF

16V-10%

21

C327

C326

.1uF

16V-10%

1uF 6.3V

1 2

21

C545

1uF 6.3V

1 2

.1uF

C543

1uF 6.3V

1 2

C544

INC.

ROUND ROCK,TEXAS

TITLE

4

16V-10%

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

A00

SHEET

9/7/2007 95 OF 136

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

ROOM = MASTER

DWG NO.

DATE

DCBA

A B C

+3.3V

TODO: need LPC RST?

+5V

D

1

54,68

68,96

H_INIT_N_3V

FWH_ID0

NC_LPC_DEBUG10

SmartVu

21

C3608

.1uF

16V-10%

10 12 14

4 6 8

J_SMVU

HEADER

2X7

POP9

12 3 5 7 9 11 13

MOD_OMNIVU_CK_33M_SKT MOD_OMNIVU_SMVU_RST_N MOD_OMNIVU_SMVU_LAD0 MOD_OMNIVU_SMVU_LAD1 MOD_OMNIVU_SMVU_LAD2 MOD_OMNIVU_SMVU_LAD3 MOD_OMNIVU_SMVU_LFRAME_N

MOD_OMNIVU_SMVU_RST_N

96

MOD_OMNIVU_SMVU_LAD0

96

MOD_OMNIVU_SMVU_LAD1

96

MOD_OMNIVU_SMVU_LAD2

96

MOD_OMNIVU_SMVU_LAD3

96

MOD_OMNIVU_SMVU_LFRAME_N

96

96 96 96 96 96 96 96

0-5%

R5452

0-5%

R5454

0-5%

21

X

1 2

21

X

1 2

21

X

1 2

POP0R5450

R5451

0-5%

R5453

0-5%

R5455

0-5%

TODO: Understand need for the rest of the LPC signals.

CK_33M_SMARTVU

45

PLT_RST_FWH_SMARTVU_N

POP0 POP0

X

POP0 POP0

X

POP0

LPC_LFRAME_N

X

R82

1 2

56-5%

R83

1 2

56-5%

PT_XXXX_SD - divided up clock to improve SI

68,96,126

LPC_LAD0

LPC_LAD1

LPC_LAD2

LPC_LAD3

54,66-68,86,96

NP0

MOD_OMNIVU_CK_33M_CPLD

MOD_OMNIVU_CK_33M_SKT

68,96

86,87,91,92 86,87,91,92 86,87,91,92 86,87,91,92 86,87,89-91 86,87,89-91

96 96 96 96 96 96

96

MOD_OMNIVU_SMVU_LAD0 MOD_OMNIVU_SMVU_LAD1 MOD_OMNIVU_SMVU_LAD2 MOD_OMNIVU_SMVU_LAD3 MOD_OMNIVU_SMVU_LFRAME_N MOD_OMNIVU_SMVU_RST_N FWH_ID0

I2C_BMC_IPMB_VAUX_SCL I2C_BMC_IPMB_VAUX_SDA I2C_BMC_NIC_VAUX_SCL I2C_BMC_NIC_VAUX_SDA I2C_BMC_SEG2_VAUX_SCL I2C_BMC_SEG2_VAUX_SDA

NC_MOD_OMNIVU_C1 NC_MOD_OMNIVU_B1 NC_MOD_OMNIVU_B2

NC_MOD_OMNIVU_D1 NC_MOD_OMNIVU_D3 NC_MOD_OMNIVU_C2

C1 B1 B2 A2 A3 B3 A4 B4 C4 C5

F4 E2 E1 E3 E4 D2 D1 D3 C2

IO1/A IO2/A IO3/A IO4/A IO5/A IO6/A IO7/A IO8/A IO9/A IO10/A

IO1/B IO2/B IO3/B IO4/B IO5/B IO6/B IO7/B IO8/B IO9/B

U_CPLD_DEBUG

IO1/E IO2/E IO3/E IO4/E IO5/E IO6/E IO7/E IO8/E IO9/E

IO10/E

IO1/F IO2/F IO3/F IO4/F IO5/F IO6/F IO7/F IO8/F IO9/F

K6 J6 H6 K7 J7 H7 J8 K8 K9 K10

J10 H10 H9 J9 G9 G10 G8 F9 F10

+3.3V

1 2

8.2K-5%

R76

NC_MOD_OMNIVU_K7 NC_MOD_OMNIVU_J7

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME_N

NC_MOD_OMNIVU_J10

MOD_OMNIVU_SHIFT_DATA_DN_R MOD_OMNIVU_SHIFT_LATCH_R MOD_OMNIVU_SHIFT_CLK_R

NC_MOD_OMNIVU_G9 NC_MOD_OMNIVU_G10 NC_MOD_OMNIVU_G8 NC_MOD_OMNIVU_F9 NC_MOD_OMNIVU_F10

CPU0_PROCHOT_3V CPU1_PROCHOT_3V

54,66-68,86,96 54,66-68,86,96 54,66-68,86,96 54,66-68,86,96 54,66-68,86,96

96 96 96

20 20

1

2

3

MOD_OMNIVU_LED_0_N

96

MOD_OMNIVU_LED_1_N

96

MOD_OMNIVU_LED_2_N

96

MOD_OMNIVU_LED_3_N

96

MOD_OMNIVU_LED_4_N

96

MOD_OMNIVU_LED_5_N

96

DV0

2 1

NP0

RED

DV1

12

NP0

RED

DV2

12

NP0

RED

DV3

2 1

NP0

RED

DV4

2 1

NP0

RED

DS1

12

NP0

RED

R5308

1 2

220-5%

R5309

1 2

220-5%

R5310

1 2

220-5%

R5311

1 2

220-5%

R5312

1 2

220-5%

R5313

1 2

220-5%

DumbVu LEDs

+3.3V_AUX

NP0

70,86,87,91,120 70,86,87,91,120

86,87,91,120 86,87,91,120

86,87,91 86,87,91

ROOM=OMNIVU

21,24,30,53,63,71,72,91 21,24,30,53,63,71,72,91

8.2K-5%

R77

21

I2C_BMC_SEG3_VAUX_SCL I2C_BMC_SEG3_VAUX_SDA I2C_BMC_SEG4_VAUX_SCL I2C_BMC_SEG4_VAUX_SDA I2C_BMC_SEG5_VAUX_SCL I2C_BMC_SEG5_VAUX_SDA

53,63 53,63

24,63 24,63

96

68,96,126

96

I2C_ESB2_MAIN_SCL I2C_ESB2_MAIN_SDA I2C_CHIPSET_SCL I2C_CHIPSET_SDA I2C_ESB2_SEG3_SCL I2C_ESB2_SEG3_SDA

MOD_OMNIVU_CK_33M_CPLD PLT_RST_FWH_SMARTVU_N MOD_OMNIVU_GOE MOD_OMNIVU_BUF_CK_CPLD

NC_MOD_OMNIVU_G3 NC_MOD_OMNIVU_F2 NC_MOD_OMNIVU_F1

NC_MOD_OMNIVU_K3 NC_MOD_OMNIVU_J2 NC_MOD_OMNIVU_K2

K1

IO1/C

J1

IO2/C

H1

IO3/C

H2

IO4/C

G2

IO5/C

G1

IO6/C

G3

IO7/C

F2

IO8/C

F1

IO9/C

K5

IO1/D

J5

IO2/D

H5

IO3/D

K4

IO4/D

J4

IO5/D

H4

IO6/D

J3

IO7/D

K3

IO8/D

J2

IO9/D

K2

IO10/D

A6

GCLK1

B5

GCLR

B6

OE1

A5

OE2/GCLK2

D6

GNDINT1

G5

GNDINT2

C3

GNDIO1

D7

GNDIO2

E5

GNDIO3

F6

GNDIO4

H8

GNDIO6

SUB*_TC498

EPM7128A

IO1/G IO2/G IO3/G IO4/G IO5/G IO6/G IO7/G IO8/G IO9/G

IO1/H IO2/H IO3/H IO4/H IO5/H IO6/H IO7/H IO8/H IO9/H

IO10/H

IO10_F/TCK IO10_B/TDI IO10_G/TDO IO10_C/TMS

VCCINT1 VCCINT2

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5GNDIO5 VCCIO6

F7 E9 E10 E8 E7 D9 D10 D8 C9

C10 B10 B9 A9 A8 B8 A7 B7 C7 C6

F8 A1 A10 F3

D5 G6

C8 D4 E6 F5 G7G4 H3

NC_MOD_OMNIVU_F7 NC_MOD_OMNIVU_E9 NC_MOD_OMNIVU_E10 NC_MOD_OMNIVU_E8 NC_MOD_OMNIVU_E7 NC_MOD_OMNIVU_D9 NC_MOD_OMNIVU_D10 NC_MOD_OMNIVU_D8 NC_MOD_OMNIVU_C9

MOD_OMNIVU_LED_0_N MOD_OMNIVU_LED_1_N MOD_OMNIVU_LED_2_N MOD_OMNIVU_LED_3_N MOD_OMNIVU_LED_4_N MOD_OMNIVU_LED_5_N

NC_MOD_OMNIVU_A7NC_MOD_OMNIVU_J3 NC_MOD_OMNIVU_B7 NC_MOD_OMNIVU_C7 NC_MOD_OMNIVU_C6

CPLD_TCK CPLD_TD2 CPLD_TDO CPLD_TMS

66,89,95,128,129 95,96,129 66,89,96 66,89,95,128,129

96 96 96 96 96 96

1 2

C3355

.1uF

16V-10%

R5408

21

C3358

1 2

33-5%

.1uF

16V-10%

95,96,129

Used as a hack to get around MOD_ rule checker

21

C3356

.1uF

CPLD_TD2

C3357

16V-10%

.1uF

1 2

16V-10%

POP0

95,96,128,129

.1uF

1 2

C3359

16V-10%

CPLD_TDO

CPLD_TD1

+3.3V_AUX+3.3V_AUX

21

C3360

2

66,89,96

.1uF

16V-10%

3

95,136

+3.3V_AUX_CPLD

96

P3V3AUX_CPLD_OPTION

14

U63

5

NP

1 2

6

VHC14 VHC14

R5314

MOD_OMNIVU_SHIFT_DATA_DN_R

MOD_OMNIVU_SHIFT_LATCH_R

MOD_OMNIVU_SHIFT_CLK_R

R6026

1 2

0-5%

95,129

P3V3AUX_CPLD_N

NP0

R5296

1 2

33-5%

R5295

33-5%

R5294

1 2

33-5%

+3.3V_AUX+3.3V_AUX

14

9

U63

8

OMNIVU_SHIFT_DATA_DN

21

OMNIVU_SHIFT_LATCH

OMNIVU_SHIFT_CLK

MOD_OMNIVU_BUF_CK_CPLD_R

R5772

33-5%

95,128

21

MOD_OMNIVU_BUF_CK_CPLD

96

NP0

TC498 - Programmed PN

P8347 - Blank PN TC499 - Disk Prog

+3.3V_AUX

C3382

1 2

by U63

1uF 6.3V

ECAD: Place

MODULE: DESC: REV: OF

SEC

OMNIVU

4

NP

21

X

C3361

100-5%

1000pF

16V-10%

X

RC = 0.1 us

F = 2.0MHz

DEBUG CPLD

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC., EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

C

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 96 OF 136

DBA

4

A B C

D

1

2

ATI RN50 Video Schematic

2

TABLE OF CONTENTS

Page 1. - Title Page

Page 2. - RN50 PCI Interface

Page 3. - Strapping Options

3

Page 4. - Video Memory

Page 5. - RN50 Power Blocks

Page 6. - Video Module Voltage Circuit

Page 7. - Revision History

3

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

TITLE

DWG NO.

DATE

MODULE: DESC: REV: OF

VIDEO CONTROLLER

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 97 OF 136

DCBA

VID

71

4

A B C

D

+3.3V

U_ATI

1

2

52,98

PCI32_AD29

66

+12V

DISABLE_VIDEO

R4946

1 2

4.7K-5%

+3.3V

Q1799

3 D

1

G

1

Q1800

D

S

2N7002

52 52 52 52 52

R4664

2 S

MOD_VID_ISO_IDSEL

1 2

MOD_VID_IDSEL

98

100-1%

2N7002

G

R4672

1 2

8.2K-5%

Q1801

D

3

1

G

2

3

S

2

2N7002

52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52

52,98

52 52

PCI32_AD0 PCI32_AD1 PCI32_AD2 PCI32_AD3 PCI32_AD4 PCI32_AD5 PCI32_AD6 PCI32_AD7 PCI32_AD8 PCI32_AD9 PCI32_AD10 PCI32_AD11 PCI32_AD12 PCI32_AD13 PCI32_AD14 PCI32_AD15 PCI32_AD16 PCI32_AD17 PCI32_AD18 PCI32_AD19 PCI32_AD20 PCI32_AD21 PCI32_AD22 PCI32_AD23 PCI32_AD24 PCI32_AD25 PCI32_AD26 PCI32_AD27 PCI32_AD28 PCI32_AD29 PCI32_AD30 PCI32_AD31

AB21 AA21

Y21 AB20 AA20

Y20 AB19

Y19 AB18 AA18

Y18 AB17 AA17

Y17 AB16 AA16

Y13 AA12

Y12 AB11 AA11

Y11 AB10 AA10

Y9 AB8 AA8

Y8 AB7 AA7

Y7 AA6

AD_0 AD_1 AD_2 AD_3 AD_4 AD_5 AD_6 AD_7 AD_8 AD_9 AD_10 AD_11 AD_12 AD_13 AD_14 AD_15 AD_16 AD_17 AD_18 AD_19 AD_20 AD_21 AD_22 AD_23 AD_24 AD_25 AD_26 AD_27 AD_28 AD_29 AD_30 AD_31

PCI

GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8

GPIO_9 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14

LCDDATA_0 LCDDATA_1 LCDDATA_2 LCDDATA_3 LCDDATA_4 LCDDATA_5 LCDDATA_6 LCDDATA_7 LCDDATA_8

LCDDATA_9 LCDDATA_10 LCDDATA_11 LCDDATA_12 LCDDATA_13 LCDDATA_14 LCDDATA_15

52 52 52 52

PCI32_CBE0_N PCI32_CBE1_N PCI32_CBE2_N PCI32_CBE3_N

AA19 AB15 AA13

AA9

C/BE0 C/BE1 C/BE2 C/BE3

LCDDATA_16 LCDDATA_17

EXT TMDS/GPIO/ROM

LCDDATA_18 LCDDATA_19 LCDDATA_20

45 52 52 52 52 52 52 52 52 52 52

98 98

CK_33M_ATI ESB_PCI_RST_N PCI32_PREQ0_N PCI32_GNT0_N PCI32_PAR PCI32_STOP_N PCI32_DEVSEL_N PCI32_TRDY_N PCI32_IRDY_N PCI32_FRAME_N PCI32_PIRQ_D_N

MOD_VID_PCI32_SERR_N MOD_VID_IDSEL

NC_MOD_VID_PCI32_VREF

Y16 AB5

AB14

Y5

AA15

AA5

Y15 AA14 AB13

Y14

W18

Y6

Y10

W5

PCICLK RESET REQ GNT PAR STOP DEVSEL TRDY IRDY FRAME INTROUT

SERR

IDSEL

NC

LCDDATA_21 LCDDATA_22 LCDDATA_23

LCDCNTL_0 LCDCNTL_1 LCDCNTL_2 LCDCNTL_3

LCDVDDR4SEL

R G B

A12 C11 B11 A11 C10 B10 A10 C9 B9 A9 C8 B8 A8 C7 B7

C20 A19 B19 C19 A18 B18 C18 A17 B17 C17 A16 B16 C16 A15 B15 C15 A14 B14 C14 A13 B13 C13 B12 C12

B21 C21 A20 B20

D15

F22 G21 G22

MOD_VID_GPIO0 MOD_VID_GPIO1 MOD_VID_GPIO2 MOD_VID_GPIO3 MOD_VID_GPIO4 MOD_VID_GPIO5 MOD_VID_GPIO6 MOD_VID_GPIO7 MOD_VID_GPIO8

MOD_VID_GPIO9 MOD_VID_GPIO10 MOD_VID_GPIO11 MOD_VID_GPIO12 MOD_VID_GPIO13 MOD_VID_GPIO14

NC_MOD_VID_LCDDATA_0 NC_MOD_VID_LCDDATA_1 NC_MOD_VID_LCDDATA_2 NC_MOD_VID_LCDDATA_3 NC_MOD_VID_LCDDATA_4 NC_MOD_VID_LCDDATA_5 NC_MOD_VID_LCDDATA_6 NC_MOD_VID_LCDDATA_7 NC_MOD_VID_LCDDATA_8

NC_MOD_VID_LCDDATA_9 NC_MOD_VID_LCDDATA_10 NC_MOD_VID_LCDDATA_11 NC_MOD_VID_LCDDATA_12 NC_MOD_VID_LCDDATA_13 NC_MOD_VID_LCDDATA_14 NC_MOD_VID_LCDDATA_15 NC_MOD_VID_LCDDATA_16 NC_MOD_VID_LCDDATA_17 NC_MOD_VID_LCDDATA_18 NC_MOD_VID_LCDDATA_19 NC_MOD_VID_LCDDATA_20 NC_MOD_VID_LCDDATA_21 NC_MOD_VID_LCDDATA_22 NC_MOD_VID_LCDDATA_23

NC_MOD_VID_LCDCNTL_0

NC_MOD_VID_LCDCNTL_1

NC_MOD_VID_LCDCNTL_2

NC_MOD_VID_LCDCNTL_3

VID_RED

VID_GREEN

VID_BLUE

99 99 99 99 99 99 99 99 99

99 99 99 99 99

105 105 105

R4966

1 2

8.2K-5%

1

2

3

98

MOD_VID_PCI32_SERR_N

MOD_VID_CRT2_DDCDAT

MOD_VID_CRT2_DDCCLK

R4194

1 2

8.2K-5%

R4967

1 2

8.2K-5%

R4968

1 2

8.2K-5%

C2151

1 2

10pF

50V-5%

C2152

1 2

10pF

50V-5%

R3927

1 2

1M-5%

X8

1 2

27MHz-30ppm

MOD_VID_XTALIN

MOD_VID_XTALOUT

MOD_VID_TESTEN

MOD_VID_TEST_MCLK MOD_VID_TEST_YCLK

U21

XTALIN

V21

XTALOUT

V22

TESTEN

Y3

TEST_MCLK

AA3

TEST_YCLK

CLK

DAC1DAC2

HSYNC VSYNC

RSET

VGADDCDAT VGADDCCLK

R2 G2 B2

H2SYNC V2SYNC

R2SET

CRT2DDCDAT CRT2DDCCLK

T22 U22

F21

T21 T20

K21 L22 L21

P21 P20

K22

R21 R20

VID_HSYNC VID_VSYNC

VID_RSET

I2C_VIDDDC_SDA I2C_VIDDCC_SCL

RAC_VID_RED

RAC_VID_GREEN

RAC_VID_BLUE

RAC_VID_HSYNC RAC_VID_VSYNC

MOD_VID_R2SET

MOD_VID_CRT2_DDCDAT MOD_VID_CRT2_DDCCLK

106 106

105

105 105

92,105 92,105 92,105

92 92

98 98

3

R3855

1 2

499-1%

4

R3834

1K-1%

R3856

1 2

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

0-5%

R3857

1 2

0-5%

1 2

RN50_V1P2

GRAPHICS CONTROLLER

HETERO 1 OF 4

TITLE

DWG NO.

DATE

ROOM = VIDEO

MODULE: DESC: REV: OF

VIDEO CONTROLLER

SEC

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 98 OF 136

DCBA

VID

72

4

A B C

D

1

2

RN50 Strapping Options

GPIO VALUE

GPIO(13:11)

GPIO(8) 0 ID_ENABLED

000

001

010

011

100

101

110

111

SELECTION DESCRIPTION

X

No ROM

reserved

Atmel AT25F1024

ST Micro M25P10/P05

NexFlash NX25F011B/15B

MOD_VID_GPIO0

98

MOD_VID_GPIO1

98

MOD_VID_GPIO2

98

R5203

1 2

8.2K-5%

R3957

1 2

8.2K-5%

R5204

1 2

8.2K-5%

R3956

1 2

8.2K-5%

R5205

1 2

8.2K-5%

R3955

1 2

X X X

NP*

+3.3V

98

MOD_VID_GPIO7

MOD_VID_GPIO8

R5210

1 2

8.2K-5%

1 2

8.2K-5%

1 2

8.2K-5%

1 2

8.2K-5%

X

R3970

R5211

X

R3967

1

+3.3V

NP*

2

3

ID_DISABLED1

00

01

10

11

01

10

11

0

1

0

1

X

VGA_DISABLED

PCI_66MHz

X

X00

PCI_33MHz ( PLL Bypass )

X1_CLKSKEW

0 tap delay

1 tap delay

2 tap delay

3 tap delay

PCIFBSKEW

0 tap delay

1 tap delay

2 tap delay

3 tap delay

GPIO(7) VGA_ENABLED

GPIO(4)

GPIO(3:2)

GPIO(1:0)

MOD_VID_GPIO3

98

MOD_VID_GPIO4

98

MOD_VID_GPIO5

98

MOD_VID_GPIO6

98

8.2K-5%

R5206

1 2

8.2K-5%

R3953

1 2

8.2K-5%

R3960

1 2

8.2K-5%

R5207

1 2

8.2K-5%

R5208

1 2

8.2K-5%

R3951

1 2

8.2K-5%

R5209

1 2

8.2K-5%

R3950

1 2

8.2K-5%

X

X X

X

NP*

98

MOD_VID_GPIO10

MOD_VID_GPIO11

MOD_VID_GPIO12

MOD_VID_GPIO13

MOD_VID_GPIO14

R5212

1 2

8.2K-5%

1 2

8.2K-5%

1 2

8.2K-5%

1 2

8.2K-5%

1 2

8.2K-5%

1 2

8.2K-5%

1 2

8.2K-5%

1 2

8.2K-5%

1 2

8.2K-5%

1 2

X

R3965

R5213

X

R3964

R5214

X

R3954

R5215

X

R3972

R5216

X

R3966

NP*

3

NP*

4

Note: Only GPIO used for strapping are listed in the table.

GPIO14, 10, 9, 6 and 5 are not used in device configuration.

8.2K-5%

TITLE

ROOM = VIDEO

MODULE: DESC: REV: OF

INC.

ROUND ROCK,TEXAS

SEC

VID

VIDEO CONTROLLER

73

4

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

DWG NO.

DATE

SCHEM, PLN, SV, PE2950, MLK

REV.

HX601

SHEET

A00

9/7/2007 99 OF 136

DCBA

A B C

D

1

2

100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100

MOD_VID_MEM_DQ0_R MOD_VID_MEM_DQ1_R MOD_VID_MEM_DQ2_R MOD_VID_MEM_DQ3_R MOD_VID_MEM_DQ4_R MOD_VID_MEM_DQ5_R MOD_VID_MEM_DQ6_R MOD_VID_MEM_DQ7_R MOD_VID_MEM_DQ8_R MOD_VID_MEM_DQ9_R MOD_VID_MEM_DQ10_R MOD_VID_MEM_DQ11_R MOD_VID_MEM_DQ12_R MOD_VID_MEM_DQ13_R MOD_VID_MEM_DQ14_R MOD_VID_MEM_DQ15_R

A5 A6 C5 A4 C4 A2 A3 D3 E1 F2 G3 F3 E3 D2 C1 B1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

U_ATI

MEMORY INTERFACE

MEM_VREFD MEM_VREFS

MEMVMODE_0 MEMVMODE_1

RN50_V1P2

GRAPHICS CONTROLLER

HETERO 2 OF 4

MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8

MA9 MA10 MA11 MA12 MA13 MA14 MA15

DQM0 DQM1

QS0

QS1

ODT

RAS

CAS

WE

CS0

CKE

ROMCS

CLK1 CLK1

MEMTEST

P1 N1 P2 T3 R1 R3 P3 M1 M3 U3 T1 T2 M2 L3 L1 N3

C3 G1 B4 D1

H1

K3 J3

J1

K2

K1

A7

H2 H3

AA2 Y2

V3 V2

AA1

MOD_VID_MEM_A0_R MOD_VID_MEM_A1_R MOD_VID_MEM_A2_R MOD_VID_MEM_A3_R MOD_VID_MEM_A4_R MOD_VID_MEM_A5_R MOD_VID_MEM_A6_R MOD_VID_MEM_A7_R MOD_VID_MEM_A8_R

MOD_VID_MEM_A9_R MOD_VID_MEM_A10_R MOD_VID_MEM_A11_R MOD_VID_MEM_A12_R

NC_MOD_VID_MEM_A13

MOD_VID_MEM_A14_R MOD_VID_MEM_A15_R

MOD_VID_MEM_DQM0_R MOD_VID_MEM_DQM1_R

MOD_VID_MEM_QS0_R MOD_VID_MEM_QS1_R

NC_MOD_VID_MEM_ODT

MOD_VID_MEM_RAS_N_R MOD_VID_MEM_CAS_N_R

MOD_VID_MEM_WE_N_R

MOD_VID_MEM_CS_N_R

MOD_VID_MEM_CKE_R

NC_MOD_VID_ROMCSB

MOD_VID_CK_250M_VIDMEM_P_R MOD_VID_CK_250M_VIDMEM_N_R

MOD_VID_P1V25_VREF_MEMD MOD_VID_P1V25_VREF_MEMS

MOD_VID_MEM_VMODE0 MOD_VID_MEM_VMODE1

MOD_VID_MEMTEST

R5171

100 100 100 100 100 100 100 100 100 100 100 100 100

100 100

100 100 100 100

100 100

100

100 100

102 102

2

A13 is not hooked up since it is not needed for any memory size used in the foreseeable future 8Mx16, 16Mx16, 32Mx16 and 64Mx16 parts don't require the use of A13

R3898

1 2

MOD_VID_P1V8_VIDEO

4.7K-5%

101,102,134

100 100 100 100 100 100 100 100 100 100 100 100 100

100 100

100 100 100 100 100 100 100

100 100

21

C3183

.1uF

C3182

16V-10%

MOD_VID_MEM_A0 MOD_VID_MEM_A1 MOD_VID_MEM_A2 MOD_VID_MEM_A3 MOD_VID_MEM_A4 MOD_VID_MEM_A5 MOD_VID_MEM_A6 MOD_VID_MEM_A7 MOD_VID_MEM_A8 MOD_VID_MEM_A9 MOD_VID_MEM_A10 MOD_VID_MEM_A11 MOD_VID_MEM_A12

MOD_VID_MEM_A14 MOD_VID_MEM_A15

MOD_VID_CK_250M_VIDMEM_P MOD_VID_CK_250M_VIDMEM_N MOD_VID_MEM_CKE MOD_VID_MEM_CS_N MOD_VID_MEM_RAS_N MOD_VID_MEM_CAS_N MOD_VID_MEM_WE_N

MOD_VID_MEM_DQM1 MOD_VID_MEM_DQM0

MOD_VID_P2V5_VIDEO

21

.1uF

16V-10%

21

C3181

.1uF

16V-10%

21

C3180

.1uF

16V-10%

21

C3179

.1uF

16V-10%

21

C3178

.1uF

16V-10%

100-102,134

1

U1070

29 30 31 32 35 36 37 38 39 40 28 41 42

26 27

45 46 44 24 23 22 21

47 20

34 48 66

6 12 52 58 64

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/NC

BA0 BA1

CLK CLK CKE CS RAS CAS WE

UDM LDM

VSS_34 VSS_48 VSS_66

VSSQ_6 VSSQ_12 VSSQ_52 VSSQ_58 VSSQ_64

8Mx16, DDR SDRAM

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

NC_14 NC_17 NC_19 NC_25 NC_43 NC_50 NC_53

UDQS LDQS

VREF

VCC_1 VCC_18 VCC_33

VCCQ_3 VCCQ_9

VCCQ_15 VCCQ_55 VCCQ_61

2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65

14 17 19 25 43 50 53

51 16

49

1 18 33

3 9 15 55 61

MOD_VID_MEM_DQ0 MOD_VID_MEM_DQ1 MOD_VID_MEM_DQ2 MOD_VID_MEM_DQ3 MOD_VID_MEM_DQ4 MOD_VID_MEM_DQ5 MOD_VID_MEM_DQ6 MOD_VID_MEM_DQ7 MOD_VID_MEM_DQ8

MOD_VID_MEM_DQ9 MOD_VID_MEM_DQ10 MOD_VID_MEM_DQ11 MOD_VID_MEM_DQ12 MOD_VID_MEM_DQ13 MOD_VID_MEM_DQ14 MOD_VID_MEM_DQ15

NC_MOD_VID_MEM_NC_14 NC_MOD_VID_MEM_NC_17 NC_MOD_VID_MEM_NC_19 NC_MOD_VID_MEM_NC_25 NC_MOD_VID_MEM_NC_43 NC_MOD_VID_MEM_NC_50 NC_MOD_VID_MEM_NC_53

MOD_VID_MEM_QS1

MOD_VID_MEM_QS0

MOD_VID_P1V25_VREF_MEM

MOD_VID_P2V5_VIDEO

100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100

2

100 100

102

100-102,134

3

4

MOD_VID_MEM_DQM1_R

100

MOD_VID_MEM_DQM0_R

100

MOD_VID_MEM_QS1_R

100

MOD_VID_MEM_QS0_R

100

MOD_VID_MEM_CKE_R

100

MOD_VID_MEM_CS_N_R

100

MOD_VID_MEM_RAS_N_R

100

MOD_VID_MEM_CAS_N_R

100

MOD_VID_MEM_WE_N_R

100

R3928

1 2

22-5%

R3929

1 2

22-5%

R3930

1 2

22-5%

R3931

1 2

22-5%

R3858

1 2

22-5%

R3859

1 2

22-5%

R3860

1 2

22-5%

R3861

1 2

22-5%

R3862

1 2

22-5%

MOD_VID_MEM_DQM1

MOD_VID_MEM_DQM0

MOD_VID_MEM_QS1

MOD_VID_MEM_QS0

MOD_VID_MEM_CKE

MOD_VID_MEM_CS_N

MOD_VID_MEM_RAS_N

MOD_VID_MEM_CAS_N

MOD_VID_MEM_WE_N

This pin is used to control the variable drive capability of the memory section I/Os. It is connected to memory VSS through a 45 ohm +/- 1% resistor.

100

MOD_VID_CK_250M_VIDMEM_P_R

100

MOD_VID_CK_250M_VIDMEM_N_R

100

1

R3863

1 2

22-5%

R3864

1 2

22-5%

R3899

45.3 -1%

1 2

MOD_VID_CK_250M_VIDMEM_P

R4921

1 2

R4922

1 2

MOD_VID_CK_250M_VIDMEM_N

4.7K-5%

49.9-1%49.9-1%

RN82

MOD_VID_MEM_A0_R

100

MOD_VID_MEM_A1_R

100

MOD_VID_MEM_A2_R

100

MOD_VID_MEM_A3_R

100

1 2 3 4

22 Ohm

RN85

100

MOD_VID_MEM_A12_R

100

NC_MOD_VID_RN2 NC_MOD_VID_RN7 MOD_VID_MEM_A14_R

100

MOD_VID_MEM_A15_R

100

1 2 3 4

22 Ohm

R5510

MOD_VID_MEM_A4_R

100

1 2

22-5%

R5511

C2161

21

.01uF

16V-10%

MOD_VID_MEM_A5_R

100

MOD_VID_MEM_A6_R

100

1 2

22-5%

R5513

1 2

22-5%

R5512

1 2

22-5%

100

MOD_VID_MEM_A7_R

100

R5517

MOD_VID_MEM_A8_R

100

1 2

22-5%

R5516

MOD_VID_MEM_A9_R

100

1 2

22-5%

R5515

MOD_VID_MEM_A10_R

100

1 2

22-5%

R5514

MOD_VID_MEM_A11_R

100

1 2

22-5%

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.

Samsung K4D261638F-TC50

Hynix HY5DU281622ET-5

8 7 6 5

MOD_VID_MEM_A0 MOD_VID_MEM_A1 MOD_VID_MEM_A2 MOD_VID_MEM_A3

MOD_VID_MEM_A12

MOD_VID_MEM_A14 MOD_VID_MEM_A15

MOD_VID_MEM_A4

MOD_VID_MEM_A5

MOD_VID_MEM_A6

MOD_VID_MEM_A7

MOD_VID_MEM_A8

MOD_VID_MEM_A9

100

100 100 100 100

100

100 100

MOD_VID_MEM_DQ0_R

100

MOD_VID_MEM_DQ1_R

100

MOD_VID_MEM_DQ2_R

100

MOD_VID_MEM_DQ3_R

100

MOD_VID_MEM_DQ4_R

100

MOD_VID_MEM_DQ5_R

100

MOD_VID_MEM_DQ6_R

100

MOD_VID_MEM_DQ7_R

100

MOD_VID_MEM_DQ8_R

100

MOD_VID_MEM_DQ9_R

100

MOD_VID_MEM_DQ10_R

100

MOD_VID_MEM_DQ11_R

100

MOD_VID_MEM_DQ12_R

100

MOD_VID_MEM_DQ13_R

100

MOD_VID_MEM_DQ14_R

100

MOD_VID_MEM_DQ15_R

100

1

RN86

2 3 4

33

1

RN87

2 3 4

33

1

RN88

2 3 4

33

1

RN89

2 3 4

33

8 7 6 5

MOD_VID_MEM_DQ0 MOD_VID_MEM_DQ1 MOD_VID_MEM_DQ2 MOD_VID_MEM_DQ3

MOD_VID_MEM_DQ4 MOD_VID_MEM_DQ5 MOD_VID_MEM_DQ6 MOD_VID_MEM_DQ7

MOD_VID_MEM_DQ8

MOD_VID_MEM_DQ9 MOD_VID_MEM_DQ10 MOD_VID_MEM_DQ11

MOD_VID_MEM_DQ12 MOD_VID_MEM_DQ13 MOD_VID_MEM_DQ14 MOD_VID_MEM_DQ15

100 100 100 100

ROOM = VIDEO

MODULE: DESC: REV: OF

SEC

3

VID

VIDEO CONTROLLER

74

4

MOD_VID_MEM_A10

MOD_VID_MEM_A11

100

TITLE

DWG NO.

DATE

INC.

ROUND ROCK,TEXAS

SCHEM, PLN, SV, PE2950, MLK

HX601

SHEET

REV.

A00

9/7/2007 100 OF 136

DCBA