MSI MS-9175 Schematic 002
5
MSI
MS-9175 REV 0C
4
3
Blackford + ESB2 Schematics
2
1
Page
D D
C C
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Title
Cover / Table of Con t en t s
System Block Diagram
Power Delivery Block Diagram
System Clock Block Diagram
System Reset Block Diagram
System SMBus Block Diagram
XDP Block Diagram
MISC
NOTICE
CPU1 SIGNAL
CPU1 POWER / PECI
CPU1 GND
CPU2 SIGNAL
CPU2 POWER
CPU2 GND
BLACKFORD CPU
BLACKFORD FBD
BLACKFORD PCI-E
BLACKFORD POWER/GND
FB DIMM11~13
FB DIMM21~23
FB DIMM31~33
FB DIMM41~43
SAS CONTROLLER -1
Revision History
Revision
0A - (xx/xx/xx)
History
Page
25 SAS CONTROLLER -2
26
27
28
29
30
31
B B
32
33
34
35
36
37
38
39
40
SAS CONTROLLER -3
PCI-EXPRESS *8
ESB2 PCI / PCI-X
ESB2 PCI-E / USB / LAN
ESB2 SATA / IDE / RTC / SMBUS
ESB2 POWER / GND
PCI / PCI-X SLOT (PCI1/PCI2)
PCI-E SLOT (PCI3/PCI4)
GILGAL LAN
CLOCKGEN / CLOCK BUFFER
PILOT-1 VGA / COM
PILOT-2 KB / MS
PILOT-3 FAN / ITP
PILOT-4 LAN
PILOT-5 MEM
41 FAN & HW MONITOR
42~43
44~45
46
47
48
A A
49
50
51
52
53
5
CPU1 VRD
CPU2 VRD
POWER 1.8V
POWER 1.5V
POWER P_VTT
PLD / XDP
CPU BSEL
SYSTEM POWER / BIOS
POWER CONN & Front Panel
PECI
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
COVER
Size Document Number Rev
MS-9175
4
3
2
Date: Sheet
153Monday, December 26, 2005
1
0CCustom
of
5
4
3
2
1
Blackford
MS-9175 SYSTEM BLOCK DIAGRAM
Spec
* Intel Blackford / ESB2 Chipset
* Dual LGA-771 CPU
D D
VRM 11
1066MHz
Intel
LGA-771
Intel
LGA-771
VRM 11
* 8 Layer E-ATX Form Factor (12" X 13")
* 12 Fully-Buffered DIMM (4 Channel)
* PCI-X SAS Controller
* USB 2.0 (Rear x2, Internal x2, Front x2)
* 3 PCI-E X 8 Slot
* 1 PCI-64 slot
* 1 PCI-32 slot
* ServerEngines Pilot
* Dual Giga-Lan Gilgal
* Serial ATA x4 + IDE x1
ESI
FBD CH0
FBD CH1
FBD CH2
FBD CH3
Ultra DMA 66/100
SATA
USB 2.0
ATA Primary
SATA 0~5
USB2.0 Port 0~7
PCI-E X8 SLOT PCI5
PCI-E X8 SLOT PCI4
C C
PCI-E X8 SLOT PCI3
PCI-32 SLOT PCI1
PCI Express X8
BW = 4GB/s
PCI Express X8
BW = 4GB/s
PCI EXPRESS X8 PCI EXPRESS X4
PCI EXPRESS X8
PCI-32
Blackford
(MCH)
ESB2
B B
PCI-64 SLOT PCI2
SAS1
SAS 1068
SAS2
PCI-X 133
PCI EXPRESS X1
USB X1
LPC Bus
ServerEngines
Pilot
DUAL GIGALAN
GILGAL
RJ-45 RJ-45
A A
5
KUMERAN
FWH
PHY
PS2 - KB Serial Port
PS2 - MS
4
VGA CONN
LAN Port
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
SYSTEM BLOCK DIAGRAM
Size Document Number Rev
MS-9175
3
2
Date: Sheet
253Monday, December 26, 2005
1
0CCustom
of
5
4
3
2
1
MS-9175 POWER DELIEVERY DIAGRAM
D D
P12V1
VRD11 CPU0
P3V3
SWITCH
P3V3_AUX
P12V2
P12V3
C C
P12V4
B B
VRD11 CPU1
1.8V
REG
1.5V
REG
P1V8
1.8V
REG
P1V5
P0V9
REG
FB DIMM
FBD VTT
MCH
ESB2
P_VTT1.2V
P5VSB
3.3V
REG
PCI-E, PCI-X,
PCI SLOTS
P3VSB
1.5V
REG
1.8V
REG
1.2V
REG
2.5V
REG
1.8V
REG
1.2V
REG
P1V5_AUX
P1V8_NIC
P1V2_NIC
P2V5_AUX
P1V8_AUX
P1V2_AUX
ESB2
GILGAL
GILGAL
BMC
PHY
BMC
BMC
A A
5
4
3
2
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
POWER DELIVERY BLOCK
Size Document Number Rev
MS-9175
Date: Sheet
1
of
353Monday, December 26, 2005
0CB
1
Clock Block Diagram
DB1900
CPU_2P/N
CPU_3P/N
CPU_1P/N
CPU_0P/N
BCLK 267/333MHz
CK_H_P0 (267/333MHz)
CK_H_P1 (267/333MHz)
CK_H_FBD (267/333MHz)
CK_H_MCH (267/333MHz)
CORECLKP/N
MCH_100CLK
(100MHz)
BCLK0/1
BCLK0/1
Blackford
PECLKP/N
CPU0
CPU1
FBD01CLKP/N
FBD23CLKP/N
SRC_2P/N
DIF_3P/N
SRC_4P/N
SRC_INP/N
DIF_6P/N
DIF_5P/N
DB800
ICS932S401
A A
Serial Ref Clk 100MHz
CK_48M_ESB
USB_48
ESB2_PCLK
PCIF_1
ESB_14MHZ
REF_1
PCIF_2
SIO_PCLK
CK_48M_PILOT
CLKI
LCLK
DIF_2P/N
DIF_1P/N
DIF_0P/N
DIF_5P/N
PCIE_CLK
PILOT
XDP (CPU)
SLOT5_100CLK
SLOT4_100CLK
SLOT3_100CLK
ESI_100CLK_P/N (100MHz)
ESB2_100CLK_P/N (100MHz)
SATA_100CLK_P/N (100MHz)
CLK
FBD01CLK_P/N
FBD23CLK_P/N
PCI5:PCI-E X8
PCI4:PCI-E X8
PCI3:PCI-E X8
XDP0_BCLK_P/N
DIF_17P/N
CLK_INP/N
DIF_15P/N
DIF_16P/N
ESICLK100P/N
PECLKP/N
SATACLKP/N
ESB2
CLK48
PCICLK
CLK14
32.768KHz
Crystal
DIF_10P/N
DIF_11P/N
SER_CLK_IN
PXPCLKO_0
PXPCLKO_1
PXPCLKO_6
PXPCLKI
DIF_0P/N
DIF_1P/N
DIF_2P/N
DIF_3P/N
DIF_4P/N
DIF_5P/N
DIF_6P/N
DIF_7P/N
DIF_8P/N
DIF_9P/N
PXPCLK0
PXPCLK1
CK_H_FBD0_P/N
CK_H_FBD1_P/N
CK_H_FBD2_P/N
CK_H_FBD3_P/N
CK_H_FBD4_P/N
CK_H_FBD5_P/N
CK_H_FBD6_P/N
CK_H_FBD7_P/N
CK_H_FBD8_P/N
CK_H_FBD9_P/N
CK_H_FBD10_P/N
CK_H_FBD11_P/N
SK_LAN_CLK
Gilgal LAN
PHY_CLK_OUT
25MHz
Crystal
PCI1:PCI-X
SAS:PCI-X
SCKP/N
SCKP/N
SCKP/N
SCKP/N
SCKP/N
SCKP/N
SCKP/N
SCKP/N
SCKP/N
SCKP/N
SCKP/N
SCKP/N
FB DIMM11
FB DIMM12
FB DIMM13
FB DIMM21
FB DIMM22
FB DIMM23
FB DIMM31
FB DIMM32
FB DIMM33
FB DIMM41
FB DIMM42
FB DIMM43
14.318MHz
Crystal
PCIF_0
PCI_0
PCI_2
PCI_3
XDP0_33MHZ_CLK
FWH_PCLK
PCI_CLK0
PLD_33MHZ_CLK
XDP
FWH
PCI2:PCI32
PLD
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
SYSTEM CLOCK BLOCK DIAGRAM
Size Document Number Rev
MS-9175
1
Date: Sheet of
453Monday, December 26, 2005
0CCustom
System Reset Block Diagram
1
VRM0_PWRGD
CK410B
PWRDOWN
DB800
PWRDOWN_N
CPU_VRD_PWRGD
CPU0_SKTOCC#
EPLD
VRM1_PWRGD
CPU1_SKTOCC#
POWER SUPPLY
PSON#
PWOK
ONCTLn
ONCTL#
VDDPWR_GD
EPLD
PS_PWROK_BUF
GPIO8
PWBTOUTn
SLPS3n
SLPS5n
PILOT
CPU_VRD_PWRGD
EPLD
100 ms
Delay
PWR_BT_SSI_#
3.3V STBY
SYS_PWRGD_BUFF
SYS_PWRGD_3_3V
RSMRST#
PWRBTN_N
SLP_S3_N
SLP_S4_N
PERST_N
PXPWROK
PWROK
VRMPWRGD
RSMRST_N
LAN_PWR_GD
PWR BTN
3.3VAUX
10Kohms
GND
PWR_BT_IN#
A A
PLTRST_BUFF1#
THERMTRIP0_N
THERMTRIP1_N
PWBTINn
PCIRSTn
GPIO19
GPIO20
RST BTN
GND
ESB_SYS_RST_N
SYS_RESET_N
ESB2
PHY_PWR_DOWN PHYRST_0_N
PHY_PWR_GD
10Kohms
PHY_RESET_NPHY_SLEEP
Pwrgd
CPU1 VRD
Pwrgd
3.3VAUX
CPU_PWR_GD
PLTRST_IN_N
THRMTRIP_N
CPU0 VRD
VID[6..0]
VID[6..0]
INIT_N
INIT3_3V_N
PLTRST_N
PCIRST_N
PXPCIRST_N
GPIO33
THERMTRIP_N
OE
OE
VRD0_EN
P0VID[6..0]
VRD1_EN
P1VID[6..0]
CPU_PWRGD
INIT#_3_3V
ESB_PLTRST#
PXPCIRST_N
EPLD
CPU0
EPLD
CPU1
FSB_INIT#
FWH
INIT#
RST_N
PLTRST_BUFF1#
EPLD
280 Pin Slot, SAS 1068
FBD_RESET
ESB_SYS_RST_N
PLTRST_N
DBR_N
INIT_N
PWRGOOD
DBR_N
INIT_N
PWRGOOD
IDE_RSTDRV_N
IDE
CPU0
CPU1
Blackford
PLTRST_N
FSB VTT VRD
VTTPWRGD
THERMTRIP_N
RESET#
VTTPWRGD
THERMTRIP_N
RESET#
FSB1RESET_N
FSB0RESET_N
PWRGOOD
SYS_PWRGD_3_3V
EPLD
SYS_PWRGD_3_3V
FBD_BR0_RST#
GLUE
FBD_BR1_RST#
LOGIC
STAT
VTT_PWRGD
FSB0_THERMTRIP_N
FSB1_THERMTRIP_N
FSB1_RESET_N
FSB0_RESET_N
DIMM#00,01,02,10,11,12
DIMM#20,21,22,30,31,32
Level
Translation
GTL to 3.3V
Level
Translation
3.3V to GTL
ESB_SYS_RST_N
RESET_IN#
PWRGOOD
VTT_PWRGD_3_3V
PLD_VTT_PWRGD_3_3V
GLUE
LOGIC
RESET_OUT#
XDP
EPLD
THERMTRIP_N
THERMTRIP0_N
THERMTRIP1_N
ESB2
PILOT
Gilgal
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
RESET BLOCK DIAGRAM
Size Document Number Rev
MS-9175
1
Date: Sheet of
553Monday, December 26, 2005
0CCustom
1
SMBus Block Diagram
DIMM #00
Serial EEPROM: 0XA0
AMB:ADDR 0XB0
CLK410B
ADDR 0XD2
Blackford
DB800
ADDR 0XDC
DB1900
ADDR 0XDE
CPU XDP
CPU0 VCORE
VRD11
ADDR
CPU1 VCORE
A A
VRD11
ADDR
MAIN_SMB
0 ohm
ADDR
3.3V
ESB2
SDTA/SCLK
(0XC2)
SPD0SDA/SPD0SCL
(Master SPD, 100KHz)
SPD1SDA/SPD1SCL
(Master SPD, 100KHz)
SPD2SDA/SPD2SCL
(Master SPD, 100KHz)
SPD3SDA/SPD3SCL
(Master SPD, 100KHz)
CFGSMBDATA/CFGSMBCLK
(Slave, 100KHz, 0XC0)
3.3V
3.3V
3.3V
3.3V
3.3V
Serial EEPROM: 0XA0
AMB:ADDR 0XB0
Serial EEPROM: 0XA0
AMB:ADDR 0XB0
Serial EEPROM: 0XA0
AMB:ADDR 0XB0
MCH_SPD0_SMB
DIMM #10 DIMM #11 DIMM #12
MCH_SPD1_SMB
DIMM #20
MCH_SPD2_SMB
DIMM #30 DIMM #31 DIMM #32
MCH_SPD3_SMB
PCI-E X8 Slot
PCI-E X8 Slot
1.8V VREG
ADDR
PCA9515
SMBus Isolator
3.3V AUX
SMBDATA/SMBCLK
PCA9515
SMBus Isolator
280 PIN PCI-X & PCI-E Slot
WHEA ROM
ADDR 0XAE
IPMB Header
5VSB
PCA9515
SMBus Isolator
3.3V AUX
3.3V AUX
SDA5/SCL5
SDA1/SCL1
3.3V AUX
SDA2/SCL2
SDA3/SCL3
3.3V AUX
PILOT
BackPanel
Power
ADDR
5VSB
PCA9515
SMBus Isolator
3.3V AUX
SDA4/SCL4
SDA6/SCL6
3.3V AUX
DIMM #01
Serial EEPROM: 0XA2
AMB:ADDR 0XB2
Serial EEPROM: 0XA2 Serial EEPROM: 0XA4
AMB:ADDR 0XB2
DIMM #21
Serial EEPROM: 0XA2
AMB:ADDR 0XB2
Serial EEPROM: 0XA2 Serial EEPROM: 0XA4
AMB:ADDR 0XB2
DIMM #02
Serial EEPROM: 0XA4
AMB:ADDR 0XB4
AMB:ADDR 0XB4
DIMM #22
Serial EEPROM: 0XA4
AMB:ADDR 0XB4
AMB:ADDR 0XB4
HW Monitor
ADT7462
ADDR 0X5C
HW Monitor
ADT7462
ADDR 0X5C
FRU ROM
ADDR 0XAE
PECI
PCA9515
SMBus Isolator
CY8C21234
ADDR 0X
SDA0/SCL0
SMBus
Selector
SDA1/SCL1
SDA2/SCL2
SDA3/SCL3
SDA/SCL
Front Panel
Thermal Sensor
ADDR
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
SMBUS BLOCK DIAGRAM
Size Document Number Rev
MS-9175
1
Date: Sheet of
653Monday, December 26, 2005
0CCustom
JTAG Block Diagram
1
XDP0_TDI_FSB1
P_VTT
51 OHM
P_VTT
51 OHM
1
2
1
3
4
GTL-TTL
Translator
TRST#
TDO
TDI
TMS TRST#
TDI
P_VTT
CPU1
XDP0_TDO_FSB1
TDO
TCK
51 OHM
GND
XDP0_TDI_ESB
XDP0_TRST_ESB#
1K OHM
GND
XDP0_TMS_GTL
P_VTT
51 OHM
TDI
TRST#
XDP0_TMS_ESB
TMS
TMS
ESB2
GTL-TTL
Translator
ESB2 in chain
TDO
TCK
XDP0_TCK1_ESB
TCK
JUMPER 0
1-2, 3-4 : CPU0 in chain
2-3 : CPU0 bypass
JUMPER 1
1-2, 3-4 : CPU1 in chain
2-3 : CPU1 bypass
P3V3
1K OHM
1K OHM
GND
P_VTT
XDP0_TDI_MAIN
TDI
TCK0
CPU XDP0
Connector
TDO
TMS
TRST#
A A
TCK1
0 OHM
51 OHM
XDP0_TDI_FSB0
P_VTT
51 OHM
XDP0_TDI_MCH
1
2
3
4
TDI
TMS TRST#
0
TDI
TMS
CPU0
XDP0_TCK0
XDP0_TDO_FSB0
XDP0_TDI_MAIN_JMP
XDP0_TDO_MAIN
XDP0_TMS_MAIN
XDP0_TRST#
TRST#
MCH
TCK
TDO
TCK
TDO
MCH in chain
51 OHM
GND
XDP0_TDO_MCH
P_VTT
51 OHM
51 OHM
GND
XDP0_TCK1
0 OHM
51 OHM
1
XDP0_TDO_ESB
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
XDP BLOCK DIAGRAM
Size Document Number Rev
MS-9175
Date: Sheet of
753Monday, December 26, 2005
0CCustom
5
4
3
2
1
Optics Orientation Holes
FM9
NOPOP NOPOP NOPOP NOPOP NOPOP NOPOP NOPOP NOPOP
D D
FM4 FM5FM7
FM8
FM11
FM10FM6
FM3
NOPOP
12
FM14
X_FM
12
12
FM15
X_FM
FM16
X_FM
12
12
FM12
X_FM
FM13
X_FM
12
12
FM1
FM2
X_FM
X_FM
NOPOP NOPOP NOPOP NOPOP NOPOP NOPOP NOPOP
PCB1
PCB
P30-091750C-D05
J2_1-2
SHORT
JC-D2-GN
J2_3-4
SHORT
JC-D2-GN
J3_2-3
SHORT
JC-D2-GN
Simulation
TL1
1
2
Layer 1--5 mil
X_D1x2
TL2
1
C C
2
X_D1x2
NOPOP
BS1
B B
55 ohm(5mil)
Layer 3--5 mil
55 ohm(4mil)
GNDKBMS
NOPOP
BS5 BS6
NOPOP NOPOP
TL7
1
2
Layer 1--5 mil
X_D1x2
NOPOP
TL8
1
2
X_D1x2
NOPOP
55 ohm(5mil)
Layer 3--5 mil
55 ohm(4mil)
TL3
1
2
Layer 4--5 mil
X_D1x2
NOPOPNOPOP
TL4
1
2
Layer 6--5 mil
X_D1x2
NOPOP
DIFF 100
ohm(4mil)
DIFF 100
ohm(4mil)
TL5
1
2
Layer 4--5 mil
X_D1x2
NOPOP
TL6
1
2
X_D1x2
NOPOP
DIFF 100
ohm(4mil)
Layer 6--5 mil
DIFF 100
ohm(4mil)
SB_HEATSINK
USE 9146 NB HEATSINK SIMILAR
ESB2
Heatsink
E31-0402090-A78
U53X1
NB_HEATSINK
X1
X1
X2
X2
X3
X3
X4
X4
E31-0402100-E25
U24_X1
BAT1_X1
+
BATTERY
-
BAT-CR2032
NB HEATSINK NEED CHANGE
HS1
X5
X5
X6
X6
X7
X7
X8
X8
U24_X3
N31-1031001-H06
U24_X2
BS2 BS3 BS4
NOPOP NOPOP
A A
NOPOP NOPOP
NOPOP
GND GND
5
NOPOP
BS7BS9BS8
4
3
2
N31-1031001-H06
Title
Size Document Number Rev
Date: Sheet
N31-1031001-H06
U24_X4
N31-1031001-H06
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
MISC
MS-9175
1
of
853Monday, December 26, 2005
0CB
5
D D
C C
4
3
2
1
B B
A A
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
NOTICE
Size Document Number Rev
MS-9175
5
4
3
2
Date: Sheet
1
of
953Monday, December 26, 2005
0CB
5
4
3
2
1
X_0.1u-25V
P_VTT
R115 51_0402
R147 51_0402
R119 51_0402
R125 51_0402
R133 51_0402
R135 51_0402
R36 51_0402
R134 150-0402
R117 X_51R_0402
R372 X_220-0402
R344 X_220-0402
R371 X_220-0402
R359 X_220-0402
R342 X_220-0402
R374 220-0402
R343 220-0402
FSB0_BR_N1
FSB0_BR_N0
FSB0_GTL_IERR#
FSB0_PROCHOT#
FSB0_THERMTRIP_N
FSB_FERR#
FSB0_RESET_N
CPU_PWRGD
CPU0_BOOT
FSB_A20M#
FSB_STPCLK#
FSB_IGNNE#
FSB_INIT#
FSB_INTR
FSB_SMI#
FSB_NMI
CPU_DBR_RST#
P_VTT
R51
49.9R-0402
R45
100_0402
P_VTT
R145
49.9R-0402
R150
100_0402
CPU0_SKTOCC#
R152
0_0402
ESB_SYS_RST# 29,37,52
PLACE BPM TERMINATION NEAR CPU
P0_LL_ID0
P0_LL_ID1
P0_MS_ID1
P0_MS_ID0
C147
R122 51_0402
R120 51_0402
R123 51_0402
R124 51_0402
4.7K_0402
R153 51_0402
R155 51_0402
RB1
0
C104 220P
RB2
0
C146
220P
FSB0_BPM_N3
FSB0_BPM_N2
FSB0_BPM_N1
FSB0_BPM_N0
CONNECT TO VRD, CHECK WITH VOTERRA
P0_GTLREF_ADD0
C951uC94
220P
C145
1u
220P
P3V3_AUX
R61
4.7K_0402
P_VTT
P3V3
R154
R151
P0_GTLREF_DATA0
P0_GTLREF_DATA1P0_GTLREF_ADD1
4.7K_0402
VCC0_SENSE2
VSS0_SENSE2
VCC0_SENSE1
CPU SIGNAL BLOCK
D D
FSB0_DBI#[3..0]16
C C
CPU1_TESTBUS13
B B
FSB0_D[63..0]16
A A
FSB0_DBI#[3..0]
FSB0_RESET_N16
FSB0_RSP_N16
FSB0_BPRI_N16
FSB0_TRDY_N16
FSB0_DEFER_N16
FSB_A20M#13,29
FSB0_FORCEPR#42
FSB_NMI13,29
FSB_INTR13,29
FSB_IGNNE#13,29
FSB_STPCLK#13,29
FSB_INIT#13,29
XDP0_TCK013,49
XDP0_TDI_FSB049
XDP0_TDO_FSB049
XDP0_TMS_MAIN13,18,49
XDP0_TRST#13,18,49
FSB0_GTL_IERR#50
FSB_FERR#13,29
FSB0_PROCHOT#50
FSB0_THERMTRIP_N33
FSB0_ADS_N16
FSB0_BNR_N16
FSB0_HIT_N16
FSB0_DBSY_N16
FSB0_DRDY_N16
FSB0_HITM_N16
FSB0_LOCK_N16
FSB0_BINIT_N16
FSB0_MCERR_N16
CPU0_SKTOCC#37,49,50
P0THERMDA241
P0THERMDC241
P0THERMDA41
P0THERMDC41
CPU_DBR_RST#13,49
R73 0_0402 R132 49.9R-0402 C155
FSB0_VIDSEL42
P0_MS_ID149
P0_MS_ID049
FSB0_BSEL050
FSB0_BSEL150
FSB0_BSEL250
FSB0_D[63..0]
FSB0_DBI#0
FSB0_DBI#1
FSB0_DBI#2
FSB0_DBI#3
FSB0_RESET_N
FSB0_RSP_N
FSB0_BPRI_N
FSB0_TRDY_N
FSB0_DEFER_N
CPU0_SMI_N
FSB_A20M#
FSB0_FORCEPR#
FSB_NMI
FSB_INTR
FSB_IGNNE#
FSB_STPCLK#
FSB_INIT#
XDP0_TMS_MAIN
XDP0_TRST#
FSB0_GTL_IERR#
FSB0_PROCHOT#
FSB0_THERMTRIP_N
FSB0_ADS_N
FSB0_BNR_N
FSB0_HIT_N
FSB0_DBSY_N
FSB0_DRDY_N
FSB0_HITM_N
FSB0_LOCK_N
FSB0_BINIT_N
FSB0_MCERR_N
CPU0_SKTOCC#
P0THERMDA2
P0THERMDC2
P0THERMDA
P0THERMDC
CPU_DBR_RST#
CPU0_BOOT
CPU0_TESTBUS
P0_LL_ID0
P0_LL_ID1
P0_MS_ID1
P0_MS_ID0
FSB0_D63
FSB0_D62
FSB0_D61
FSB0_D60
FSB0_D59
FSB0_D58
FSB0_D57
FSB0_D56
FSB0_D55
FSB0_D54
FSB0_A[35..3]16
A8
G11
D19
C20
G23
H4
G8
E3
G7
P2
K3
AK6
L1
K1
N2
M3
P3
AE1
AD1
AF1
AC1
AG1
AB2
R3
AL2
M2
D2
C2
D4
B2
C1
E4
C3
AD3
AB3
AE8
AJ7
AH7
AL1
AK1
AC2
Y1
AH2
AN7
AA2
V2
V1
W1
G29
H30
G30
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
DBI0#
DBI1#
DBI2#
DBI3#
RESET#
RSP#
BPRI#
TRDY#
DEFER#
SMI#
A20M#
FORCEPR#
LINT1/NMI
LINT0/INTR
IGNNE#
STPCLK#
INIT#
TCK
TDI
TDO
TMS
TRST#
IERR#
FERR#/PBE#
PROCHOT#
THERMTRIP#
ADS#
BNR#
HIT#
DBSY#
DRDY#
HITM#
LOCK#
BINIT#
MCERR#
SKTOCC#
THERMDA2
THERMDC2
THERMDA
THERMDC
DBR#
BOOTSELECT
TEST_BUS
VID_SELECT
LL_ID1
LL_ID0
MS_ID1
MS_ID0
BSEL0
BSEL1
BSEL2
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
FSB0_A[35..3]
FSB0_A35
FSB0_A33
FSB0_A30
FSB0_A32
FSB0_A27
FSB0_A31
FSB0_A29
FSB0_A28
FSB0_A34
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
AF5
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
B15
C14
C15
A14
D17
D20
FSB0_D50
FSB0_D51
FSB0_D48
FSB0_D53
FSB0_D52
FSB0_D49
D41#
G22
D22
E22
G21
F21
E21
F20
E19
FSB0_D41
FSB0_D40
FSB0_D46
FSB0_D43
FSB0_D47
FSB0_D45
FSB0_D44
FSB0_D42
FSB0_A20
FSB0_A22
FSB0_A24
FSB0_A21
FSB0_A23
FSB0_A16
FSB0_A18
FSB0_A19
A27#
D40#
FSB0_A26
FSB0_A25
AB4
AC5
AB5
AA5
AD6
A26#
A25#
A24#
A23#
D39#
D38#
D37#
D36#
E18
F18
F17
G17
G18
FSB0_D38
FSB0_D35
FSB0_D36
FSB0_D39
FSB0_D37
FSB0_A15
FSB0_A17
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4L5P6M5
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
E16
E15
G16
G15
F15
G14
F14
FSB0_D34
FSB0_D33
FSB0_D28
FSB0_D31
FSB0_D30
FSB0_D32
FSB0_D29
FSB0_A14
FSB0_A13
FSB0_A10
FSB0_A11
FSB0_A12
FSB0_A7
FSB0_A4
FSB0_A8
FSB0_A6
FSB0_A5
FSB0_A9
A9#
A8#
A7#
A6#
A5#
A10#
D23#
D22#
D21#
F11
D10
E10D7E9F9F8G9D11
FSB0_D22
FSB0_D23
FSB0_D21
A4#
D20#
D19#
D18#
D17#
FSB0_D19
FSB0_D18
FSB0_D20
FSB0_D16 FSB0_A3
FSB0_D17
A14#
A13#
A12#
A11#
D27#
D26#
D25#
D24#
G13
E13
D13
F12
FSB0_D27
FSB0_D24
FSB0_D26
FSB0_D25
VSS0_SENSE1
AN3
AN4
AL7
AL8
A3#
VSS_DIE_SENSE
VCC_DIE_SENSE
VSS_DIE_SENSE2
VCC_DIE_SENSE2
D16#
D15#
D14#
D13#
D12#
D11#
D10#
D9#
C12
B12D8C11
B10
A11
A10A7B7B6A5C6A4C5B4
FSB0_D9
FSB0_D8
FSB0_D13
FSB0_D10
FSB0_D15
FSB0_D12
FSB0_D14
FSB0_D11
D8#
D7#
D6#
FSB0_D7
FSB0_D6
R60 0_0402
R64 0_0402
R71 0_0402
R70 0_0402
AM5
AL4
AK4
AL6
VID6
VID5
VID4
VID3
GTLREF_DATA_C1
GTLREF_ADD_C1
GTLREF_DATA_C0
GTLREF_ADD_C0
D5#
D4#
D3#
D2#
D1#
FSB0_D1
FSB0_D2
FSB0_D3
FSB0_D5
FSB0_D4
AM3
AL5
AM2
VID2
VID1
VID0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1
BCLK0
RS2#
RS1#
RS0#
AP1#
AP0#
BR1#
BR0#
PWRGOOD
COMP7
COMP6
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
D0#
SOCKET771
FSB0_D0
VID6
VID5
VID4
VID3
VID2
VID1
VID0
CPU1A
F2
H2
G10
H1
AG3
AF2
AG2
AD2
AJ1
AJ2
J6
K6
M6
J5
K4
L2
P1
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
G28
F28
A3
F5
B3
U3
U2
H5
F3
N1
AE3
Y3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
VID6 41,42
VID5 41,42
VID4 41,42
VID3 41,42
VID2 41,42
VID1 41,42
VID0 41,42
P0_GTLREF_DATA1
P0_GTLREF_ADD1
P0_GTLREF_DATA0
P0_GTLREF_ADD0
FSB0_BPM_N5
FSB0_BPM_N4
FSB0_BPM_N3
FSB0_BPM_N2
FSB0_BPM_N1
FSB0_BPM_N0
FSB0_REQ_N4
FSB0_REQ_N3
FSB0_REQ_N2
FSB0_REQ_N1
FSB0_REQ_N0
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI0_1
CK_H_P0_N
CK_H_P0
FSB0_RS2_N
FSB0_RS1_N
FSB0_RS0_N
FSB0_AP1
FSB0_AP0
FSB0_BR_N1
FSB0_BR_N0
H_COMP7
H_COMP6
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
FSB0_DP_N3
FSB0_DP_N2
FSB0_DP_N1
FSB0_DP_N0
FSB0_ADSTB_N1
FSB0_ADSTB_N0
FSB0_DSTBP_N3
FSB0_DSTBP_N2
FSB0_DSTBP_N1
FSB0_DSTBP_N0
FSB0_DSTBN_N3
FSB0_DSTBN_N2
FSB0_DSTBN_N1
FSB0_DSTBN_N0
VCC0_SENSE 42
VSS0_SENSE 42
FSB0_BPM_N5 16,49
FSB0_BPM_N4 16,49
FSB0_BPM_N3 49
FSB0_BPM_N2 49
FSB0_BPM_N1 49
FSB0_BPM_N0 49
FSB0_REQ_N[4..0]
R142 51_0402
R140 51_0402
R141 51_0402
R114 51_0402
R21 51_0402
R116 51_0402
CK_H_P0_N 35
CK_H_P0 35
FSB0_RS2_N 16
FSB0_RS1_N 16
FSB0_RS0_N 16
FSB0_AP1 16
FSB0_AP0 16
FSB0_BR_N1 16
FSB0_BR_N0 16
CPU_PWRGD 13,29,49
R121 49.9R-0402
R118 49.9R-0402
R137 49.9R-0402
R127 49.9R-0402
R113 49.9R-0402
R136 49.9R-0402
R37 49.9R-0402
FSB0_DP_N3 16
FSB0_DP_N2 16
FSB0_DP_N1 16
FSB0_DP_N0 16
FSB0_ADSTB_N[1..0]
FSB0_DSTBP_N[3..0]
FSB0_DSTBN_N[3..0]
FSB0_REQ_N[4..0] 16
P_VTT
P_VTT
P_VTT
FSB0_ADSTB_N[1..0] 16
FSB0_DSTBP_N[3..0] 16
FSB0_DSTBN_N[3..0] 16
BE = 1,C=B
FSB_SMI#13,29,37
CPU0_DISABLE_N37
5
U13
6
VCC
A
4 5
BC
1
BE
GND
PI5C3303
P5V
2
CPU0_SMI_N
3
4
3
2
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
CPU0 SIGNAL
Size Document Number Rev
MS-9175
Date: Sheet
1
of
10 53Monday, December 26, 2005
0CCustom
5
4
3
2
1
VCORE0
AF21
VCORE0
AF19
VCC
AF18
VCC
AF15
VCC
D D
C C
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
VCC
VCC
VCC
AE9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AB8
VCC
AA8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y28
Y29
Y30
Y8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W30W8Y23
Y24
Y25
Y26
Y27
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W23
W24
W25
W26
W27
W28
W29
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U26
U27
U28
U29
U30U8V8
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
CPU1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
K26
K27
K28
K29
K30K8L8
M23
M24
M25
M26
M27
M28
M29
M30M8N23
N24
N25
N26
N27
N28
N29
N30N8P8R8T23
T24
T25
T26
T27
T28
T29
T30T8U23
U24
U25
VCC
VCCA
VSSA
VCCPLL
VCCIOPLL
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTTPWRGD
VTT_OUT1
VTT_OUT0
VTT_SEL
VCC
VCC
NONE
NONE
VCC
VCC
AN26
AN8
AN9
SOCKET771
AN25
AN29
AN30
A23
B23
D23
C23
F30
E30
A25
A26
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6
AA1
J1
F27
H0_VCCA
H0_VSSA
H0_VCCPLL
VTT_PWRGD
P_VTT
VTT_PWRGD 14,51
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
VCORE0
P_VTT
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
It support DC current if 100mA.
L1 10uH-0805-0.1A
B B
L2 10uH-0805-0.1A
R20 0
P1V5
EC4
22u/6.3V/1206
C10
103P
EC3
10u16V1206X5R
C7
4.7u
H0_VCCA
C23
X_1u-10V
H0_VSSA
H0_VCCPLL
C8
4.7u
NOPOP
P_VTT
C705
0.1u
C706
0.1u
1
C35
10u16V1206X5R
A A
C164
10u16V1206X5R
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
C703
0.1u
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
CPU0 POWER
MS-9175
C174
0.1u
C175
C176
0.1u
0.1u
0CCustom
11 53Monday, December 26, 2005
of
5
R1288
0
D D
C9
D16
A20
F1
VSS
RESVD
RESVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RESVD
VSS
VSS
VSS
AE29
AE30
AE5
AE7
A12
A15
A18
A2
A21
A24
A6
A9
AA23
AA24
AA25
AA26
AA27
C C
B B
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AE10
AE13
AE16
AE17
AE20
AE24
AE25
AE26
AE27
AE28
AA3
AA6
AA7
AB1
AB7
AC3
AC6
AC7
AD4
AD7
AE2
RESVD
VSS
AF10
E24G5W2
RESVD
VSS
AF13
G6
RESVD
VSS
AF16
AC4
RESVD
VSS
AF17
AE4D1D14
RESVD
RESVD
VSS
VSS
AF20
AF23
RSVD_PECI 15,53
E23E5E6E7F23F6B13J3N4P5E1
RESVD
RESVD
RESVD
RESVD
RESVD
RESVD
RESVD
RESVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF24
AF25
AF26
AF27
AF28
AF29
AF3
R57 49.9RST
N5
RESVD
RESVD
RESVD
RESVD
RESVD
RESVD
VSS
VSS
VSS
VSS
VSS
VSS
AF30
AF6
AF7
AG10
AG13
AG16
AE6
AG17
AN5
RESVD
VSS
AG20
AN6
RESVD
VSS
AG23
AJ3
RESVD
VSS
AG24
AK3
RESVD
RESVD
VSS
VSS
AG7
F29
RESVD
VSS
AH1
4
AN28
NONE
VSS
VSS
AH10
AH13
AN27
Y7Y5Y2W7W4V7V6
VSS
VSS
NONE
VSS
VSS
VSS
VSS
AH16
AH17
AH20
AH23
3
R734 Nocona-T Dempsey-T Dempsey
Woodcrest
2
1
Optional YES NO
V30V3V29
V28
V27
V26
V25
V24
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH24
AH3
AH6
AJ10
AJ13
AJ16
AJ17
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AJ4
AK10
AK13
VSS
VSS
R29
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
P28
P27
P26
P25
P24
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
AL17
AL20
AL23
AL24
AL27
AL28
AL3
AM1
AM10
AM13
AM16
AM17
AM20
VSS
VSS
L28
L27
L26
L25
L24
L23K7K5K2J7J4H9H8H7H6H3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM23
AM24
AM27
AM28
AM4
AM7
AN1
AN10
AN13
AN16
AN17
AN2
AN20
AN23
AN24B1B11
VSS
VSS
H29
H28
H27
H26
H25
H24
CPU1C
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H23
VSS
H22
VSS
H21
VSS
H20
VSS
H19
VSS
H18
VSS
H17
VSS
H14
VSS
H13
VSS
H12
VSS
H11
VSS
H10
VSS
G1
VSS
F7
VSS
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E29
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
VSS
VSS
VSS
B5
VSS
VSS
B8
VSS
VSS
VSS
VSS
B17
B14
SOCKET771
B20
B24
C4
C7
A A
5
4
3
2
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
CPU0 GND
Size Document Number Rev
MS-9175
Date: Sheet
1
of
12 53Monday, December 26, 2005
0CCustom
5
4
3
2
P_VTT
1
VCC1_SENSE2
VSS1_SENSE2
VCC1_SENSE1
D D
FSB1_THERMTRIP_N33
P_VTT
CPU1_SKTOCC#
FSB1_DBI#[3..0]
FSB1_RESET_N16,49
FSB1_RSP_N16
FSB1_BPRI_N16
FSB1_TRDY_N16
FSB1_DEFER_N16
FSB_A20M#10,29
FSB1_FORCEPR#44
FSB_NMI10,29
FSB_INTR10,29
FSB_IGNNE#10,29
FSB_STPCLK#10,29
FSB_INIT#10,29
XDP0_TCK010,49
XDP0_TDI_FSB149
XDP0_TDO_FSB149
XDP0_TMS_MAIN10,18,49
XDP0_TRST#10,18,49
FSB_FERR#10,29
FSB1_PROCHOT#50
FSB1_ADS_N16
FSB1_BNR_N16
FSB1_HIT_N16
FSB1_DBSY_N16
FSB1_DRDY_N16
FSB1_HITM_N16
FSB1_LOCK_N16
FSB1_BINIT_N16
FSB1_MCERR_N16
CPU1_SKTOCC#37,49
P1THERMDA241
P1THERMDC241
P1THERMDA41
P1THERMDC41
CPU_DBR_RST#10,49
R351 X_51R-0402
CPU1_TESTBUS10
FSB1_VIDSEL44
P1_MS_ID149
P1_MS_ID049
FSB1_BSEL050
FSB1_BSEL150
FSB1_BSEL250
FSB1_D[63..0]
P3V3_AUX
R381
4.7K_0402
FSB1_DBI#[3..0]16
C C
B B
FSB1_D[63..0]16
A A
FSB1_A[35..3]16
FSB1_DBI#0
FSB1_DBI#1
FSB1_DBI#2
FSB1_DBI#3
CPU1_SMI_N
P1_TCK
P1_TDI
P1_TDO
P1_TMS
FSB1_GTL_IERR#
FSB_FERR#
FSB1_PROCHOT#
FSB1_THERMTRIP_N
CPU1_SKTOCC#
P1THERMDA2
P1THERMDC2
P1THERMDA
P1THERMDC
CPU1_BOOT
CPU1_TESTBUS
P1_LL_ID0
P1_LL_ID1
P1_MS_ID1
P1_MS_ID0
FSB1_D63
FSB1_D62
FSB1_D61
FSB1_D60
FSB1_D59
FSB1_D58
FSB1_D57
FSB1_D56
FSB1_D55
FSB1_D54
G11
D19
C20
G23
H4
G8
G7
AK6
N2
M3
AE1
AD1
AF1
AC1
AG1
AB2
R3
AL2
M2
D2
C2
D4
C1
C3
AD3
AB3
AE8
AJ7
AH7
AL1
AK1
AC2
AH2
AN7
AA2
W1
G29
H30
G30
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
E3
P2
K3
L1
K1
P3
B2
E4
Y1
V2
V1
DBI0#
DBI1#
DBI2#
DBI3#
RESET#
RSP#
BPRI#
TRDY#
DEFER#
SMI#
A20M#
FORCEPR#
LINT1/NMI
LINT0/INTR
IGNNE#
STPCLK#
INIT#
TCK
TDI
TDO
TMS
TRST#
IERR#
FERR#/PBE#
PROCHOT#
THERMTRIP#
ADS#
BNR#
HIT#
DBSY#
DRDY#
HITM#
LOCK#
BINIT#
MCERR#
SKTOCC#
THERMDA2
THERMDC2
THERMDA
THERMDC
DBR#
BOOTSELECT
TEST_BUS
VID_SELECT
LL_ID1
LL_ID0
MS_ID1
MS_ID0
BSEL0
BSEL1
BSEL2
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
B15
FSB1_D53
FSB1_A[35..3]
D52#
D51#
D50#
D49#
C14
C15
A14
D17
FSB1_D52
FSB1_D50
FSB1_D51
FSB1_D49
FSB1_A32
FSB1_A33
FSB1_A35
FSB1_A29
FSB1_A31
FSB1_A34
FSB1_A30
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
A35#
A34#
A33#
A32#
A31#
A30#
A29#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D20
G22
D22
E22
G21
F21
E21
FSB1_D42
FSB1_D46
FSB1_D45
FSB1_D48
FSB1_D44
FSB1_D47
FSB1_D43
FSB1_A21
FSB1_A27
FSB1_A28
AF4
AF5
A28#
D41#
F20
E19
FSB1_D40
FSB1_D41
FSB1_A20
FSB1_A24
FSB1_A22
FSB1_A19
FSB1_A23
FSB1_A18
FSB1_A25
AC5
AB5
AA5
AD6
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4L5P6M5
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
F18
FSB1_D38
D31#
F17
G17
G18
E16
E15
G16
G15
FSB1_D35
FSB1_D32
FSB1_D31
FSB1_D37
FSB1_D36
FSB1_D34
FSB1_D33
A27#
D40#
FSB1_A26
AB4
A26#
D39#
E18
FSB1_D39
FSB1_A17
FSB1_A14
FSB1_A13
FSB1_A10
FSB1_A16
FSB1_A12
FSB1_A11
FSB1_A15
A17#
A16#
A15#
A14#
A13#
A12#
A11#
D30#
D29#
D28#
D27#
D26#
D25#
D24#
F15
G14
F14
G13
E13
D13
F12
F11
FSB1_D30
FSB1_D26
FSB1_D23
FSB1_D29
FSB1_D25
FSB1_D28
FSB1_D27
FSB1_D24
FSB1_A7
FSB1_A9
FSB1_A8
A9#
A8#
A7#
A10#
D23#
D22#
D21#
D20#
D10
E10D7E9F9F8G9D11
FSB1_D20
FSB1_D22
FSB1_D21
FSB1_A6
FSB1_A5
A6#
D19#
FSB1_D18
FSB1_D19
FSB1_A4
A5#
D18#
FSB1_D17
FSB1_A3
A4#
D17#
FSB1_D16
CPU SIGNAL BLOCK
VSS1_SENSE1
AN3
AN4
AL7
AL8
A3#
VSS_DIE_SENSE
VCC_DIE_SENSE
VSS_DIE_SENSE2
VCC_DIE_SENSE2
D16#
D15#
D14#
D13#
D12#
D11#
D10#
D9#
C12
B12D8C11
B10
A11
A10A7B7B6A5C6A4C5B4
FSB1_D11
FSB1_D15
FSB1_D13
FSB1_D10
FSB1_D9
FSB1_D12
FSB1_D8
FSB1_D14
D8#
D7#
D6#
FSB1_D7
FSB1_D6
R231 0_0402
R232 0_0402
R244 0_0402
R241 0_0402
AM5
AL4
AK4
AL6
VID6
VID5
VID4
GTLREF_DATA_C1
GTLREF_ADD_C1
GTLREF_DATA_C0
GTLREF_ADD_C0
D5#
D4#
D3#
D2#
FSB1_D5
FSB1_D4
FSB1_D2
FSB1_D3
FSB1_D1
AM3
AL5
AM2
VID3
VID2
VID1
VID0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1
BCLK0
RS2#
RS1#
RS0#
AP1#
AP0#
BR1#
BR0#
PWRGOOD
COMP7
COMP6
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
SOCKET771
D1#
D0#
FSB1_D0
P1VID6
P1VID5
P1VID4
P1VID3
P1VID2
P1VID1
P1VID0
CPU2A
F2
H2
G10
H1
AG3
AF2
AG2
AD2
AJ1
AJ2
J6
K6
M6
J5
K4
L2
P1
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
G28
F28
A3
F5
B3
U3
U2
H5
F3
N1
AE3
Y3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
P1VID6 41,44
P1VID5 41,44
P1VID4 41,44
P1VID3 41,44
P1VID2 41,44
P1VID1 41,44
P1VID0 41,44
P1_GTLREF_DATA1
P1_GTLREF_ADD1
P1_GTLREF_DATA0
P1_GTLREF_ADD0
FSB1_BPM_N5
FSB1_BPM_N4
FSB1_BPM_N3
FSB1_BPM_N2
FSB1_BPM_N1
FSB1_BPM_N0
FSB1_REQ_N4
FSB1_REQ_N3
FSB1_REQ_N2
FSB1_REQ_N1
FSB1_REQ_N0
H1_TESTHI11
H1_TESTHI10
H1_TESTHI9
H1_TESTHI8
H1_TESTHI2_7
H1_TESTHI0_1
CK_H_P1_N
CK_H_P1
FSB1_RS2_N
FSB1_RS1_N
FSB1_RS0_N
FSB1_AP1
FSB1_AP0
FSB1_BR_N1
FSB1_BR_N0
H1_COMP7
H1_COMP6
H1_COMP5
H1_COMP4
H1_COMP3
H1_COMP2
H1_COMP1
H1_COMP0
FSB1_DP_N3
FSB1_DP_N2
FSB1_DP_N1
FSB1_DP_N0
FSB1_ADSTB_N1
FSB1_ADSTB_N0
FSB1_DSTBP_N3
FSB1_DSTBP_N2
FSB1_DSTBP_N1
FSB1_DSTBP_N0
FSB1_DSTBN_N3
FSB1_DSTBN_N2
FSB1_DSTBN_N1
FSB1_DSTBN_N0
VCC1_SENSE 44
VSS1_SENSE 44
FSB1_BPM_N5 16,49
FSB1_BPM_N4 16,49
FSB1_BPM_N3 49
FSB1_BPM_N2 49
FSB1_BPM_N1 49
FSB1_BPM_N0 49
FSB1_REQ_N[4..0]
R373 51_0402
R346 51_0402
R384 51_0402
R360 51_0402
R165 51_0402
R166 51_0402
CK_H_P1_N 35
CK_H_P1 35
FSB1_RS2_N 16
FSB1_RS1_N 16
FSB1_RS0_N 16
FSB1_AP1 16
FSB1_AP0 16
FSB1_BR_N1 16
FSB1_BR_N0 16
CPU_PWRGD 10,29,49
R353 49.9R-0402
R350 49.9R-0402
R348 49.9R-0402
R340 49.9R-0402
R375 49.9R-0402
R335 49.9R-0402
R376 49.9R-0402
R212 49.9R-0402
FSB1_DP_N3 16
FSB1_DP_N2 16
FSB1_DP_N1 16
FSB1_DP_N0 16
FSB1_ADSTB_N[1..0]
FSB1_DSTBP_N[3..0]
FSB1_DSTBN_N[3..0]
THIS R CLOSE TO ESB2
P_VTT
P_VTT
FSB1_ADSTB_N[1..0] 16
FSB1_DSTBP_N[3..0] 16
FSB1_DSTBN_N[3..0] 16
FSB1_BPM_N3
FSB1_BPM_N2
FSB1_BPM_N1
FSB1_BPM_N0
PLACE BPM TERMINATION NEAR CPU
FSB1_REQ_N[4..0] 16
P_VTT
C173
X_0.1u-25V
R347 51_0402
R345 51_0402
R356 51_0402
R361 51_0402
R163 51_0402
R380 51_0402
R341 51_0402
R354 51_0402
R352 51_0402
R358 51_0402
R355 51_0402
R383
49.9R-0402
R365
100_0402
R339
49.9R-0402
R338
100_0402
CPU1_DISABLE_N37
FSB_FERR#
FSB1_THERMTRIP_N
FSB1_PROCHOT#
FSB1_BR_N0
FSB1_RESET_N
FSB1_GTL_IERR#
FSB1_BR_N1
P_VTT
P_VTT
P1_GTLREF_ADD1 P1_GTLREF_DATA1
C371
1u
220P
P_VTT
P1_GTLREF_ADD0 P1_GTLREF_DATA0
C368
1u
220P
BE = 1,C=B
FSB_SMI#10,29,37
FSB1_GTL_IERR# 50
P1_LL_ID0
P1_LL_ID1
CONNECT TO VRD, CHECK WITH VOTERRA
R377 51_0402
R378 51_0402
R364
0
C372
C367
C365
220P
R367
0
C370
220P
U37
6
VCC
A
4 5
BC
1
BE
GND
PI5C3303
4.7K_0402
2
3
R379
P1_MS_ID1
P1_MS_ID0
P5V
CPU1_SMI_N
P3V3P3V3
R349
4.7K_0402
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
CPU1 SIGNAL
Size Document Number Rev
MS-9175
5
4
3
2
Date: Sheet
13 53Monday, December 26, 2005
1
0CCustom
of
5
4
3
2
1
VCORE1
AF21
VCORE1
AF19
VCC
AF18
VCC
AF15
VCC
D D
C C
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
VCC
VCC
VCC
AE9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AB8
VCC
AA8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y28
Y29
Y30
Y8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W30W8Y23
Y24
Y25
Y26
Y27
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W23
W24
W25
W26
W27
W28
W29
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U26
U27
U28
U29
U30U8V8
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
CPU2B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
K26
K27
K28
K29
K30K8L8
M23
M24
M25
M26
M27
M28
M29
M30M8N23
N24
N25
N26
N27
N28
N29
N30N8P8R8T23
T24
T25
T26
T27
T28
T29
T30T8U23
U24
U25
VCC
VCCA
VSSA
VCCPLL
VCCIOPLL
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTTPWRGD
VTT_OUT1
VTT_OUT0
VTT_SEL
VCC
VCC
NONE
NONE
VCC
VCC
AN26
AN8
AN9
SOCKET771
AN25
AN29
AN30
A23
B23
D23
C23
F30
E30
A25
A26
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6
AA1
J1
F27
H1_VCCA
H1_VSSA
H1_VCCPLL
VTT_PWRGD
P_VTT
VTT_PWRGD 11,51
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
VCORE1
P_VTT
B B
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
It support DC current if 100mA.
L5 10uH-0805-0.1A
L6 10uH-0805-0.1A
R178 0
P1V5
EC6
22u/6.3V/1206
C199
102P
NOPOP
EC7
10u16V1206X5R
C194
4.7u
H1_VCCA
C183
X_1u-10V
H1_VSSA
H1_VCCPLL
C195
4.7u
NOPOP
P_VTT
C764
10u16V1206X5R
A A
C760
10u16V1206X5R
5
C755
0.1u
C769
0.1u
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
CPU1 POWER
Size Document Number Rev
MS-9175
4
3
2
Date: Sheet
14 53Monday, December 26, 2005
1
0CCustom
of
5
RSVD_PECI 12,53
4
3
R818 Nocona-T Dempsey-T Dempsey
2
Woodcrest
1
Optional YES NO
RESVD
VSS
AF27
RESVD
VSS
AF28
RESVD
VSS
RESVD
VSS
AF29
RESVD
VSS
AF3
RESVD
VSS
AF30
R253 49.9RST
N5
AE6
AN5
RESVD
RESVD
RESVD
RESVD
RESVD
RESVD
VSS
VSS
VSS
VSS
VSS
VSS
AF6
AF7
AG10
AG13
AG16
AG17
AG20
AN6
RESVD
VSS
AG23
AJ3
RESVD
VSS
AG24
AK3
RESVD
RESVD
VSS
VSS
AG7
F29
RESVD
VSS
AH1
AN28
NONE
VSS
VSS
AH10
AH13
AN27
Y7Y5Y2W7W4V7V6
VSS
VSS
NONE
VSS
VSS
VSS
VSS
AH16
AH17
AH20
AH23
V30V3V29
V28
V27
V26
V25
V24
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH24
AH3
AH6
AJ10
AJ13
AJ16
AJ17
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AJ4
AK10
AK13
VSS
VSS
R29
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
P28
P27
P26
P25
P24
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
AL17
AL20
AL23
AL24
AL27
AL28
AL3
AM1
AM10
AM13
AM16
AM17
AM20
VSS
VSS
L28
L27
L26
L25
L24
L23K7K5K2J7J4H9H8H7H6H3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM23
AM24
AM27
AM28
AM4
AM7
AN1
AN10
AN13
AN16
AN17
AN2
AN20
AN23
AN24B1B11
VSS
VSS
H29
H28
H27
H26
H25
H24
CPU2C
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H23
VSS
H22
VSS
H21
VSS
H20
VSS
H19
VSS
H18
VSS
H17
VSS
H14
VSS
H13
VSS
H12
VSS
H11
VSS
H10
VSS
G1
VSS
F7
VSS
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E29
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
VSS
VSS
VSS
B5
VSS
VSS
B8
VSS
VSS
VSS
VSS
B17
B14
SOCKET771
B20
B24
C4
C7
D D
AC4
AE4D1D14
E23E5E6E7F23F6B13J3N4P5E1
G6
E24G5W2
C9
D16
A20
F1
VSS
RESVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RESVD
VSS
VSS
AE29
AE30
A12
A15
A18
A2
A21
A24
A6
A9
AA23
AA24
AA25
AA26
AA27
C C
B B
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AE10
AE13
AE16
AE17
AE20
AE24
AE25
AE26
AE27
AE28
AA3
AA6
AA7
AB1
AB7
AC3
AC6
AC7
AD4
AD7
AE2
RESVD
VSS
AE5
RESVD
VSS
AE7
RESVD
VSS
AF10
RESVD
VSS
AF13
RESVD
VSS
AF16
RESVD
VSS
AF17
RESVD
VSS
AF20
AF23
RESVD
VSS
AF24
RESVD
RESVD
VSS
VSS
AF25
AF26
A A
5
4
3
2
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
CPU1 GND
Size Document Number Rev
MS-9175
Date: Sheet
1
of
15 53Monday, December 26, 2005
0CCustom
5
U24D
FSB0_D[63..0]10
D D
C C
FSB0_DBI#[3..0]10
FSB0_DSTBP_N[3..0]10
B B
FSB0_DSTBN_N[3..0]10
P_VTT
R201
49.9RST
R199
100RST
A A
MCH_FSB_SLWCTRL#49
FSB0_D[63..0]
FSB0_DBI#[3..0]
FSB0_DSTBP_N[3..0]
FSB0_DSTBN_N[3..0]
R198 0
C248
1u
CK_H_MCH35
CK_H_MCH_N35
C247
220P
MCH_FSB_SLWCTRL
R441 100
5
FSB0_D63
FSB0_D62
FSB0_D61
FSB0_D60
FSB0_D59
FSB0_D58
FSB0_D57
FSB0_D56
FSB0_D55
FSB0_D54
FSB0_D53
FSB0_D52
FSB0_D51
FSB0_D50
FSB0_D49
FSB0_D48
FSB0_D47
FSB0_D46
FSB0_D45
FSB0_D44
FSB0_D43
FSB0_D42
FSB0_D41
FSB0_D40
FSB0_D39
FSB0_D38
FSB0_D37
FSB0_D36
FSB0_D35
FSB0_D34
FSB0_D33
FSB0_D32
FSB0_D31
FSB0_D30
FSB0_D29
FSB0_D28
FSB0_D27
FSB0_D26
FSB0_D25
FSB0_D24
FSB0_D23
FSB0_D22
FSB0_D21
FSB0_D20
FSB0_D19
FSB0_D18
FSB0_D17
FSB0_D16
FSB0_D15
FSB0_D14
FSB0_D13
FSB0_D12
FSB0_D11
FSB0_D10
FSB0_D9
FSB0_D8
FSB0_D7
FSB0_D6
FSB0_D5
FSB0_D4
FSB0_D3
FSB0_D2
FSB0_D1
FSB0_D0
FSB0_DBI#3
FSB0_DBI#2
FSB0_DBI#1
FSB0_DBI#0
FSB0_DSTBP_N3
FSB0_DSTBP_N2
FSB0_DSTBP_N1
FSB0_DSTBP_N0
FSB0_DSTBN_N3
FSB0_DSTBN_N2
FSB0_DSTBN_N1
FSB0_DSTBN_N0
CK_H_MCH
CK_H_MCH_N
C255
220P
B
FSB0_VREF
C
E
Q36
X_2N3904S
BLACKFORD 4/11
AE37
FSB0_D63
AE36
FSB0_D62
AH36
FSB0_D61
AG36
FSB0_D60
AF38
FSB0_D59
AE38
FSB0_D58
AH38
FSB0_D57
AJ38
FSB0_D56
AJ37
FSB0_D55
AG35
FSB0_D54
AK36
FSB0_D53
AL37
FSB0_D52
AL36
FSB0_D51
AL38
FSB0_D50
AJ34
FSB0_D49
AF37
FSB0_D48
AE28
FSB0_D47
AD29
FSB0_D46
AF28
FSB0_D45
AC31
FSB0_D44
AE29
FSB0_D43
AC30
FSB0_D42
AD30
FSB0_D41
AE31
FSB0_D40
AE32
FSB0_D39
AD35
FSB0_D38
AF33
FSB0_D37
AG32
FSB0_D36
AF31
FSB0_D35
AE34
FSB0_D34
AG30
FSB0_D33
AG33
FSB0_D32
AM37
FSB0_D31
AK35
FSB0_D30
AM34
FSB0_D29
AM38
FSB0_D28
AP38
FSB0_D27
AN36
FSB0_D26
AL35
FSB0_D25
AN35
FSB0_D24
AP36
FSB0_D23
AT37
FSB0_D22
AU36
FSB0_D21
AP34
FSB0_D20
AT36
FSB0_D19
AP35
FSB0_D18
AL34
FSB0_D17
AN33
FSB0_D16
AJ33
FSB0_D15
AG27
FSB0_D14
AG29
FSB0_D13
AM33
FSB0_D12
AH31
FSB0_D11
AJ30
FSB0_D10
AH32
FSB0_D9
AJ31
FSB0_D8
AL31
FSB0_D7
AK30
FSB0_D6
AN32
FSB0_D5
AH29
FSB0_D4
AK29
FSB0_D3
AH28
FSB0_D2
AL29
FSB0_D1
AJ28
FSB0_D0
AH37
FSB0_DBI3
AF30
FSB0_DBI2
AP37
FSB0_DBI1
AL32
FSB0_DBI0
AH35
FSB0_DSTBP3
AD33
FSB0_DSTBP2
AR38
FSB0_DSTBP1
AK33
FSB0_DSTBP0
AH34
FSB0_DSTBN3
AD32
FSB0_DSTBN2
AR37
FSB0_DSTBN1
AK32
FSB0_DSTBN0
AN17
CORECLKP
AP17
CORECLKN
FSB 0
BLACKFORD
P1V5
P1V5
4
FSB0_A35
FSB0_A34
FSB0_A33
FSB0_A32
FSB0_A31
FSB0_A30
FSB0_A29
FSB0_A28
FSB0_A27
FSB0_A26
FSB0_A25
FSB0_A24
FSB0_A23
FSB0_A22
FSB0_A21
FSB0_A20
FSB0_A19
FSB0_A18
FSB0_A17
FSB0_A16
FSB0_A15
FSB0_A14
FSB0_A13
FSB0_A12
FSB0_A11
FSB0_A10
FSB0_A9
FSB0_A8
FSB0_A7
FSB0_A6
FSB0_A5
FSB0_A4
FSB0_A3
FSB0_REQ4
FSB0_REQ3
FSB0_REQ2
FSB0_REQ1
FSB0_REQ0
FSB0_ADSTB1
FSB0_ADSTB0
FSB0_BPRI_N
FSB0_DEFER_N
FSB0_RESET_N
FSB0_RS2
FSB0_RS1
FSB0_RS0
FSB0_RSP_N
FSB0_TRDY_N
FSB0_ADS_N
FSB0_AP1
FSB0_AP0
FSB0_BINIT_N
FSB0_BNR_N
FSB0_BPM5
FSB0_BPM4
FSB0_BREQ1
FSB0_BREQ0
FSB0_DBSY_N
FSB0_DP3
FSB0_DP2
FSB0_DP1
FSB0_DP0
FSB0_DRDY_N
FSB0_HIT_N
FSB0_HITM_N
FSB0_LOCK_N
FSB0_MCERR_N
FSB0_VREF
FSB0_VREF
FSB0_VREF
R229
0.499RST
R234
0.499RST
4
FSB0_A35
AV22
FSB0_A34
AU22
FSB0_A33
AR22
FSB0_A32
AP22
FSB0_A31
AV24
FSB0_A30
AT23
FSB0_A29
AU23
FSB0_A28
AV25
FSB0_A27
AT24
FSB0_A26
AR25
FSB0_A25
AU26
FSB0_A24
AT26
FSB0_A23
AT27
FSB0_A22
AU25
FSB0_A21
AU28
FSB0_A20
AR24
FSB0_A19
AR27
FSB0_A18
AP25
FSB0_A17 FSB1_A16
AV28
FSB0_A16
AF22
FSB0_A15
AG23
FSB0_A14
AF25
FSB0_A13
AH22
FSB0_A12
AL22
FSB0_A11
AJ22
FSB0_A10
AG24
FSB0_A9
AM22
FSB0_A8
AH23
FSB0_A7
AP26
FSB0_A6
AN26
FSB0_A5
AM25
FSB0_A4
AN24
FSB0_A3
AL25
FSB0_REQ_N4
AJ25
FSB0_REQ_N3
AJ24
FSB0_REQ_N2
AK24
FSB0_REQ_N1
AH25
FSB0_REQ_N0
AL26
FSB0_ADSTB_N1
AP23
FSB0_ADSTB_N0
AL23
FSB0_BPRI_N
AU34
FSB0_DEFER_N
AV34
FSB0_RESET_N
AN30
FSB0_RS2_N
AU31
FSB0_RS1_N
AL28
FSB0_RS0_N
AV31
FSB0_RSP_N
AN27
FSB0_TRDY_N
AT32
FSB0_ADS_N
AU29
FSB0_AP1
AK26
FSB0_AP0
AH26
FSB0_BINIT_N
AK27
FSB0_BNR_N
AV30
FSB0_BPM_N5
AP29
FSB0_BPM_N4
AR28
FSB0_BR_N1
AG26
FSB0_BR_N0
AM28
FSB0_DBSY_N
AR30
FSB0_DP_N3
AN29
FSB0_DP_N2
AP31
FSB0_DP_N1
AT33
FSB0_DP_N0
AR31
FSB0_DRDY_N
AT29
FSB0_HIT_N
AU32
FSB0_HITM_N
AV33
FSB0_LOCK_N
AT30
FSB0_MCERR_N
AJ27
AB1
PSEL2
AB2
PSEL1
AC1
PSEL0
AF34
AM30
AM27
L11 4.7uH-0805-30mA
L13 4.7uH-0805-30mA
MCH_SEL2 50
MCH_SEL1 50
MCH_SEL0 50
FSB0_VREF
FSB0_A[35..3]
FSB0_REQ_N[4..0]
FSB0_ADSTB_N[1..0]
FSB0_BPRI_N 10
FSB0_DEFER_N 10
FSB0_RESET_N 10
FSB0_RS2_N 10
FSB0_RS1_N 10
FSB0_RS0_N 10
FSB0_RSP_N 10
FSB0_TRDY_N 10
FSB0_ADS_N 10
FSB0_AP1 10
FSB0_AP0 10
FSB0_BINIT_N 10
FSB0_BNR_N 10
FSB0_BPM_N5 10,49
FSB0_BPM_N4 10,49
FSB0_BR_N1 10
FSB0_BR_N0 10
FSB0_DBSY_N 10
FSB0_DP_N3 10
FSB0_DP_N2 10
FSB0_DP_N1 10
FSB0_DP_N0 10
FSB0_DRDY_N 10
FSB0_HIT_N 10
FSB0_HITM_N 10
FSB0_LOCK_N 10
FSB0_MCERR_N 10
FSB1_DBI#[3..0]13
FSB1_DSTBP_N[3..0]13
FSB1_DSTBN_N[3..0]13
C305
22u/6.3V/1206
C317
22u/6.3V/1206
FSB0_A[35..3] 10
FSB1_D[63..0]13
MCH_FSB_VCCA
C301
103P
MCH_CORE_VSSA
MCH_CORE_VCCA
C308
103P
MCH_CORE_VSSA
3
FSB1_D[63..0]
FSB0_REQ_N[4..0] 10
FSB0_ADSTB_N[1..0] 10
FSB1_DBI#[3..0]
FSB1_DSTBP_N[3..0]
FSB1_DSTBN_N[3..0]
3
FSB1_D63
FSB1_D62
FSB1_D61
FSB1_D60
FSB1_D59
FSB1_D58
FSB1_D57
FSB1_D56
FSB1_D55
FSB1_D54
FSB1_D53
FSB1_D52
FSB1_D51
FSB1_D50
FSB1_D49
FSB1_D48
FSB1_D47
FSB1_D46
FSB1_D45
FSB1_D44
FSB1_D43
FSB1_D42
FSB1_D41
FSB1_D40
FSB1_D39
FSB1_D38
FSB1_D37
FSB1_D36
FSB1_D35
FSB1_D34
FSB1_D33
FSB1_D32
FSB1_D31
FSB1_D30
FSB1_D29
FSB1_D28
FSB1_D27
FSB1_D26
FSB1_D25
FSB1_D24
FSB1_D23
FSB1_D22
FSB1_D21
FSB1_D20
FSB1_D19
FSB1_D18
FSB1_D17
FSB1_D16
FSB1_D15
FSB1_D14
FSB1_D13
FSB1_D12
FSB1_D11
FSB1_D10
FSB1_D9
FSB1_D8
FSB1_D7
FSB1_D6
FSB1_D5
FSB1_D4
FSB1_D3
FSB1_D2
FSB1_D1
FSB1_D0
FSB1_DBI#3
FSB1_DBI#2
FSB1_DBI#1
FSB1_DBI#0
FSB1_DSTBP_N3
FSB1_DSTBP_N2
FSB1_DSTBP_N1
FSB1_DSTBP_N0
FSB1_DSTBN_N3
FSB1_DSTBN_N2
FSB1_DSTBN_N1
FSB1_DSTBN_N0
MCH_CORE_VCCA
MCH_FSB_VCCA
MCH_CORE_VSSA
P_VTT
R245
49.9RST
R247
100RST
AF16
AG14
AJ16
AJ15
AG15
AF15
AJ13
AL16
AP16
AH16
AN15
AL14
AM15
AN14
AM16
AH14
AP14
AR12
AR13
AP11
AP13
AT12
AT11
AV12
AV10
AU10
AV9
AT8
AR9
AT9
AU8
AV7
AK12
AL13
AL11
AM13
AN11
AM12
AN12
AN9
AN8
AP8
AM9
AM6
AK9
AN6
AL8
AL7
AU5
AR7
AU7
AR6
AT6
AV4
AV6
AT5
AT3
AT2
AR4
AR3
AR1
AP4
AP5
AP1
AH13
AU11
AK11
AP7
AK15
AR10
AM10
AU4
AK14
AP10
AL10
AU3
AT17
AU17
AU16
R243 0
C323
1u
2
U24E
BLACKFORD 5/11
FSB1_D63
FSB1_D62
FSB1_D61
FSB1_D60
FSB1_D59
FSB1_D58
FSB1_D57
FSB1_D56
FSB1_D55
FSB1_D54
FSB1_D53
FSB1_D52
FSB1_D51
FSB1_D50
FSB1_D49
FSB1_D48
FSB1_D47
FSB1_D46
FSB1_D45
FSB1_D44
FSB1_D43
FSB1_D42
FSB1_D41
FSB1_D40
FSB1_D39
FSB1_D38
FSB1_D37
FSB1_D36
FSB1_D35
FSB1_D34
FSB1_D33
FSB1_D32
FSB1_D31
FSB1_D30
FSB1_D29
FSB1_D28
FSB1_D27
FSB1_D26
FSB1_D25
FSB1_D24
FSB1_D23
FSB1_D22
FSB1_D21
FSB1_D20
FSB1_D19
FSB1_D18
FSB1_D17
FSB1_D16
FSB1_D15
FSB1_D14
FSB1_D13
FSB1_D12
FSB1_D11
FSB1_D10
FSB1_D9
FSB1_D8
FSB1_D7
FSB1_D6
FSB1_D5
FSB1_D4
FSB1_D3
FSB1_D2
FSB1_D1
FSB1_D0
FSB1_DBI3
FSB1_DBI2
FSB1_DBI1
FSB1_DBI0
FSB1_DSTBP3
FSB1_DSTBP2
FSB1_DSTBP1
FSB1_DSTBP0
FSB1_DSTBN3
FSB1_DSTBN2
FSB1_DSTBN1
FSB1_DSTBN0
COREVCCA
FSBVCCA
COREVSSA
C322
220P
FSB 1
BLACKFORD
C321
220P
2
FSB1_A35
FSB1_A34
FSB1_A33
FSB1_A32
FSB1_A31
FSB1_A30
FSB1_A29
FSB1_A28
FSB1_A27
FSB1_A26
FSB1_A25
FSB1_A24
FSB1_A23
FSB1_A22
FSB1_A21
FSB1_A20
FSB1_A19
FSB1_A18
FSB1_A17
FSB1_A16
FSB1_A15
FSB1_A14
FSB1_A13
FSB1_A12
FSB1_A11
FSB1_A10
FSB1_A9
FSB1_A8
FSB1_A7
FSB1_A6
FSB1_A5
FSB1_A4
FSB1_A3
FSB1_REQ4
FSB1_REQ3
FSB1_REQ2
FSB1_REQ1
FSB1_REQ0
FSB1_ADSTB1
FSB1_ADSTB0
FSB1_BPRI_N
FSB1_DEFER_N
FSB1_RESET_N
FSB1_RS2
FSB1_RS1
FSB1_RS0
FSB1_RSP_N
FSB1_TRDY_N
FSB1_ADS_N
FSB1_AP1
FSB1_AP0
FSB1_BINIT_N
FSB1_BNR_N
FSB1_BPM5
FSB1_BPM4
FSB1_BREQ1
FSB1_BREQ0
FSB1_DBSY_N
FSB1_DP3
FSB1_DP2
FSB1_DP1
FSB1_DP0
FSB1_DRDY_N
FSB1_HIT_N
FSB1_HITM_N
FSB1_LOCK_N
FSB1_MCERR_N
FSBCRES
FSBODTCRES
FSBSLWCRES
FSBSLWCTRL
FSB1_VREF
FSB1_VREF
FSB1_VREF
FSB1_VREF
1
FSB1_A35
AC3
FSB1_A34
AC4
FSB1_A33
AD2
FSB1_A32
AE1
FSB1_A31
AE2
FSB1_A30
AE4
FSB1_A29
AD3
FSB1_A28
AF3
FSB1_A27
AF1
FSB1_A26
AJ3
FSB1_A25
AH1
FSB1_A24
AH2
FSB1_A23
AD5
FSB1_A22
AC6
FSB1_A21
AE5
FSB1_A20
AD6
FSB1_A19
AH5
FSB1_A18
AG5
FSB1_A17
AF4
AA12
FSB1_A15
AC7
FSB1_A14
AB10
FSB1_A13
AC9
FSB1_A12
AD8
FSB1_A11
AF6
FSB1_A10
AB11
FSB1_A9
AE7
FSB1_A8
AF7
FSB1_A7
AG8
FSB1_A6
AH8
FSB1_A5
AC12
FSB1_A4
AD9
FSB1_A3
AD12
FSB1_REQ_N4
AE10
FSB1_REQ_N3
AF9
FSB1_REQ_N2
AJ6
FSB1_REQ_N1
AD11
FSB1_REQ_N0
AG9
FSB1_ADSTB_N1
AG3
FSB1_ADSTB_N0
AC10
FSB1_BPRI_N
AJ10
FSB1_DEFER_N
AJ9
FSB1_RESET_N
AE11
FSB1_RS2_N
AL5
FSB1_RS1_N
AL1
FSB1_RS0_N
AK5
FSB1_RSP_N
AK2
FSB1_TRDY_N
AK6
FSB1_ADS_N
AP2
FSB1_AP1
AG10
FSB1_AP0
AG12
FSB1_BINIT_N
AJ4
FSB1_BNR_N
AK3
FSB1_BPM_N5
AN3
FSB1_BPM_N4
AN2
FSB1_BR_N1
AM1
FSB1_BR_N0
AL2
FSB1_DBSY_N
AM4
FSB1_DP_N3
AF13
FSB1_DP_N2
AF12
FSB1_DP_N1
AJ12
FSB1_DP_N0
AG11
FSB1_DRDY_N
AM3
FSB1_HIT_N
AK8
FSB1_HITM_N
AJ7
FSB1_LOCK_N
AL4
FSB1_MCERR_N
AH11
MCH_FSB_CRES
AT35
MCH_FSB_ODTCRES
AR34
MCH_FSB_SLWCRES
AU35
MCH_FSB_SLWCTRL
AV13
FSB1_VREF
AT14
AN5
AH4
R188
649RST
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
BLACKFORD CPU SIGNAL
Size Document Number Rev
MS-9175
Date: Sheet
FSB1_A[35..3]
FSB1_REQ_N[4..0]
FSB1_ADSTB_N[1..0]
FSB1_BPRI_N 13
FSB1_DEFER_N 13
FSB1_RESET_N 13,49
FSB1_RS2_N 13
FSB1_RS1_N 13
FSB1_RS0_N 13
FSB1_RSP_N 13
FSB1_TRDY_N 13
FSB1_ADS_N 13
FSB1_AP1 13
FSB1_AP0 13
FSB1_BINIT_N 13
FSB1_BNR_N 13
FSB1_BPM_N5 13,49
FSB1_BPM_N4 13,49
FSB1_BR_N1 13
FSB1_BR_N0 13
FSB1_DBSY_N 13
FSB1_DP_N3 13
FSB1_DP_N2 13
FSB1_DP_N1 13
FSB1_DP_N0 13
FSB1_DRDY_N 13
FSB1_HIT_N 13
FSB1_HITM_N 13
FSB1_LOCK_N 13
FSB1_MCERR_N 13
R237 1K
R189
49.9RST
FSB1_A[35..3] 13
MCH_FSB_CRES
MCH_FSB_ODTCRES
MCH_FSB_SLWCRES
1
FSB1_REQ_N[4..0] 13
FSB1_ADSTB_N[1..0] 13
P1V5
16 53Monday, December 26, 2005
of
0CCustom
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