MSI MS-9170 Schematics

Page 1
A B C
Dell Controlled Print
D
12-5-2003_15:26
1
2
3
100/66/33
3.3V
PCI-X BUS 5
HOT
PCI-X BUS 4
PLUG
PCI7 - 3.3V
U121
CIOB-X CIOB-X
352 ABGA 352 ABGA
100/66/33
3.3V 64bit
PCI2 - 3.3VPCI6 - 3.3V
PCI3 - 3.3V
PCI BUS 1 - 64/66 3.3V
BREAKOUT ON i80303
BROADCOM
BCM5700
10/100/1000
MAC/MEM
388 PBGA
PCI-X BUS 3
HP CONTROL FOR PCIX2 THRU PCIX7
FLOPPY/IDE
U123
HOT
PLUG
INTEL
U135
i80303
XOR/P2P/I20
64bit RAID
CONTROLLER
540 HL-PBGA
100/66/33
3.3V 64bit64bit
PCI4 - 3.3V
PCI5 - 3.3V
USB1 USB2
NOT HOT
PLUG
U134
PROCESSOR 1 - SKT603
PROCESSOR 2 - SKT603
IMB_B
IMB_A
U61
SOUTH BRIDGE "CSB5"
LPC BRIDGE & IDE/USB
272 PBGA
PORTXX
DIMM_RAID
BATTERY
16MBx8 RAID
FLASH
FOSTER/PRESTONIA HOST BUS
U118
ADDR DOUBLE PUMPED, DATA QUAD PUMPED
SERVERWORKS
GCHE "CMIC"
CHAMPION MEMORY
& I/O CONTROLLER
899 FCBGA
THIN IMB_D
8MBx8
SYSTEM
PC100 UNBUFFERED DIMM
FLASH
U26
EMBEDDED LPC BUS
NATIONAL
PC87414
SUPER I/O
U129
& RTC
VGA
VRM1(9.1)
VRM2(9.1)
MEMORY CARDS SUPPORT TWELVE
PC200 REG DDR DIMMS(MIN 512MB/MAX 12GB)
MEMORY CARD SLOTS
REMC
U117
NOT HOT PLUG
PCI BUS 0 - 32/33 5V
PCI1 - 5V
ADAPTEC
AIC-7890
32bit ULTRA2
SE/LVD
272 BGA
SCSI_C
COM1
U62
RAGE XL
272 BGA
U78
8MB
SDRAM
DRAC3 SLOT
ATI
VGA
FLOPPY/IDE PARALLEL
MOUSE KEYBD
U96 U25
QLOGIC
Zircon
BMC
160 LQFP
REV
X00 9/8/03
A01 A02
MECA
MECB
INTEL 82559
10/100 ENET
196 BGA
MAG
ENET_100Mb
U147
ESM3
REVISIONS
DESCRIPTIONECO DATE
Changes from F0055 - A01 152750A00 11/11/03 155050 12/4/03
Promotion to A00 from X00
Corrected and Updated A00 SCH
Component change to correct manufac issue
12/5/03155112
TABLE OF CONTENTS
BLOCK DIAGRAMPage 1. Page 2. CLOCK DIAGRAM Page 3. RESET DIAGRAM & PCI DEVICES CHART
CLOCKS & PCI-X CLK BUFFERPage 4. Page 5. PROCESSORS Page 6. Page 7. PROCESSORS Page 8. Page 9. Page 10. Page 11. Page 12. Page 13. Page 14. Page 15. Page 16. Page 17. Page 18. Page 19. Page 20. Page 21. Page 22. Page 23. Page 24. Page 25. Page 26. Page 27. Page 28. Page 29. Page 30. Page 31. Page 32. Page 33. Page 34.
Page 36. Page 37. Page 38. Page 39. Page 40. Page 41.
Page 44. Page 45. Page 46. Page 47. AIC-7890 Page 48. RAGE XL VIDEO Page 49. RAGE XL VIDEO CONTINUED Page 50. INTEL 82559 10/100 ENET Page 51. Page 52. Page 53. Page 54. Page 55. Page 56. Page 57. Page 58. Page 59. Page 60. Page 61. Page 62. Spares Page 63 Schematic Revisions Overview
PROCESSORS
VRM
ITP 32 & LEVEL TRANSLATION CIRCUITS
REMC PLL
MEC A
MEC B
REMC RESISTORS & PCI-X BUFFERS
CIOB 1
HOTPLUG SLOT 2
PCI-X 100/66/33 SLOTS 2
HOTPLUG SLOT 3
PCI-X 100/66/33 SLOTS 3
BROADCOM 5700 10/100/1000 MAC
BROADCOM 5401 PHY
INTEL 80303 "ZION" RAID PROCESSOR
RAID CONTINUED
RAID CONTINUED, DEBUG CIRCUITS
ADAPTEC AIC-7899 U160 SCSI
AIC-7899 CONTINUED
U160 SCSI TERMINATION & CONNECTORS
CIOB 2
HOTPLUG SLOT 4
PCI-X 100/66/33 SLOTS 4
HOTPLUG SLOT 5
PCI-X 100/66/33 SLOTS 5
HOTPLUG SLOT 6Page 35.
PCI-X 100/66/33 SLOTS 6
HOTPLUG SLOT 7
PCI-X 100/66/33 SLOTS 7
PIRQ SERIALIZING & X-BUS LATCH
SYSTEM CPLD
IDE, USB, ETCPage 42.
SYSTEM FLASHPage 43.
SIO
PARALLEL PORT, SERIAL PORTS
PCI 32/33 SLOT 1
ESM3: Zircon and CPLD
ESM3: Memory
ESM3: Misc
ESM3: Fans, Analog
Hotplug PCI FPGA
RAID Battery Charger
Backplane, CtrlPnl, Buttons, Etc.
VR FOR 2.5V
3.3V_AUX VR, PCIRST CIRCUITS
PowerGood Circuit
Decoupling, Power Conns
APPROVED
1
2
3
10/100/1000
4
DOUBLE BOXED MEANS HEATSINK
IS REQUIRED
BCM5401
PHY
256 TBGA
MAG
ENET_1Gb
U27
PCI BUS 2 - 64/66 3.3V
ADAPTEC
AIC-7899W
PIN FOR PIN COMPATIBLE PART
DUAL U160
SE/LVD
456 BGA
SCSI_A SCSI_B
Directory: R: \ Schematic_Projects\ PowerEdge\ Jaguar \ Planar_H3007\ A02
EXPORT RESTRICTION:
THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.
U156
FOR MIGRATION PLAN TO AIC-7902 FOR DUAL U320
128 PQFP
U20
COM2
PWA:
PWB:
SCHEM:
ASSY DWG:
H3009 H3008 H3007 H3006
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP., EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
NVRAMFLASH
8MBx16
U160 U148
128KB
JAGUAR PLANAR
DRAWN
DESIGNED
CHECKED
APPROVED
APPROVED
APPROVED
APPROVED
RELEASED
Haseeb Bhutta
SHAWN DUBE,LIBBY MCTEER,WILL SMITH,ROBERTO LAGO KEVIN MILLER,CLAY PHENNICIE
Danny King
12/5/03 10/25/02 12/5/03
XLBOM Build option table
0 Production Build 9 Prototype Build
A CURRENT ISSUE OF THIS DRAWING MUST
INCLUDE A COPY OF THE FOLLOWING
ECO'S:
ECO
ECO
ECO
ECO
ECO
ECO
ECO
ECO
TITLE
DWG NO.
134552 11/3/02 152750 11/11/03
155050 12/4/03
SCHEM,PLN,PE4600,2P
COMPUTER CORPORATION AUSTIN,TEXAS
H3007
SHEET
12/5/03155112
4
A02
1 OF 6312/5/2003
DCBA
Page 2
B D
CA
12-5-2003_10:50
1
14.318MHZ XTAL
100MHZ
DIFF CLKS
14.318 MHZ
14.318 MHZ
CPU CLK CPU CLK CPU CLK
CPU CLK CPU CLK
CPU CLK CPU CLK CPU CLK
33.3 MHZ
CSB5
FOSTER
PROCESSOR
1
FOSTER
PROCESSOR
2
GCHE CMIC
IMB CLK_A IMB CLK_B IMB CLK_A IMB CLK_C IMB CLK_D
CIOB-X
CLOCK DISTRIBUTION
BLOCK DIAGRAM
TI CDCV304
FETSWITCH
BUFFER
100/66/33MHZ
100/66/33MHZ
PCICLKIN
PCICLKFB
1
PCIX SLOT 7
PCIX SLOT 6
2
RCC_SYN
48 MHZ 48 MHZ
MECA
MECB
REMC AP
ITP32B
CLKIN
TI CDCV304
BUFFER
100/66/33MHZ
100/66/33MHZ
PCICLKIN
FETSWITCH
PCIX SLOT 3
PCIX SLOT 2
2
PCICLKIN
PCICLKFB
100/66/33MHZ
100/66/33MHZ
BUFFER
PCIX SLOT 5
PCIX SLOT 4
2
FETSWITCH
AUX_POWER
32KHZ
XTAL
97414
CSB5
USB
PCICLK
PCICLK
IMB CLK_B
CIOB-X
1
TI CDCV304
PCICLKFB
PCICLKIN
PCICLKFB
66MHZ
BROADCOM
BCM5700
BROADCOM
BCM5401
1Gb PHY
125 MHZ
TI CDCV304
25MHZ
XTAL
100MHZ 100MHZ 100MHZ 100MHZ
3
10 MHZ
OSC
AUX_POWER
QLOGIC
BMC
10MHZ
QLOGIC BMC
PCICLK PCICLK PCICLK
PCICLK
PCICLK
PCICLK
BUFFER
NATIONAL
PC87417
ADAPTEC
7890
66MHZ
INTEL i80303 (ZION)
66MHZ
3
ADAPTEC
7899
RAID_MEMORY
XILINX
14.318MHZ XTAL
ALWAYS
ON
25MHZ
25MHZ
20MHZ
40MHZ
40MHZ
BROADCOM 5700
INTEL 559
CIRRUS 8900A EMP NIC
ADAPTEC 7899
ADAPTEC 7890
PHILIPS PCK2001M
LOW SKEW BUFFER
PCICLK
PCICLK
PCICLK_IRQ0
PCICLK_IRQ1
PCICLK_IRQ2
PCICLK_IRQ3
ATI
RAGE XL
VGA
INTEL 82559
10/100 LOM
PCI SLOT 1
cPLD
25MHZ
XTAL
40 MHZ
40 MHZ
OSC
QLOGIC
14.31818MHZ ATI RAGE XL
BMC
(80 MHZ NEEDED FOR AIC-7902)
4 4
XILINX
cPLD
(40 MHZ NEEDED FOR AIC-7899 & AIC-7890)
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
CY2922-????
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
48 MHZ
14.318 MHZ
SCHEM,PLN,PE4600,2P
CSB5
REPLACES FIVE CRYSTALS/OSCILLATORS
A B
IMB CLK_D
LPC_CLK
33.3MHZ
DWG NO.
DC
H3007
SHEET
12/5/2003
A02
2 OF 63
Page 3
To do:
B D
CA
I2C CHART & MAP
12-5-2003_10:50
1
Move RN150 silkscreen up
SAMPLE LAYOUT OF BOARD BELOW
32bit/33MHZ
PCI
5V
SYSTEM BOARD
SIO
FLOPPY/IDE
SCSI_C
FLASH
ENET_100/
USB
ENET_1GB
VGA
XL
PCI1
PCIX2
64bit/100MHZ
PCI 3.3V
PCIX3
PCIX4
PCIX5
PCIX6
PCIX7
ADD SEG DEVICE A0 0 Memory CPU 1
A2 0 Memory CPU 2 30 0 Thermal Sensor CPU 1 32 0 Thermal Sensor CPU 2 C0 0 CMIC Function 0 * C2 0 CMIC Function 1 * C4 0 CMIC Function 2 * C6 0 CMIC Function 3 * C8 0 CIOB 1 * CA 0 CIOB 2 * CC 0 CIOB 3 - RSVD IMB_EXP * B0 0 CSB5 C0 0 REMC AP *
1
VRM_1
PROC_1 PROC_2
VRM_2
PWR1 PWR2 PWR3
MEC_A
MEC_B
CIOB30
1
RAID_DIMM
FLASH
BACKPLANE
RESET BLOCK DIAGRAM & PCI DEVICES CHART
CIOB30
SCSI_ASCSI_B
2
FLASH
90 0 lm75 planar 98 0 lm75 ambient AA 0 Control panel A8 0 CPU card 5E 2 PSPB LM81 AA 2 PDB 14 2 PDB device A0 2 PS 1 A2 2 PS 2 A4 2 PS 3 A6 2 PS 4 AE 2 AC Switch A0 1 system event log AE 1 RAID DIMM (If Present)
2
32BIT PCI DEVICES - BUS 0 - INTERRUPTS
D# 17 0,2 16 15
14 8 6
4 82559 10/100 ETHERNETPCI0_AD20 0 -- CMIC
PCI DEVICES SCANNED
LOW TO HIGH
F#
0,2 0-6
2,3
--
--
(PCI0_AD31)
PCI0_AD30 PCI0_AD24 PCI0_AD22
CIOB-X 2(BUS 4 & 5) CIOB-X 1(BUS 1 & 3) CSB5 (SOUTH BRIDGE)
ATI RAGE XL PCI VIDEO PCI SLOT 1 (PCI1) ULTRA2 SCSI AIC-7890
4TH3RD2ND1STDEVICEIDSEL
--
--
-- -- --
--
------
------
-- -- -- -­PIRQ_0 PIRQ_1
PIRQ_2 PIRQ_3
-- -- --
-- -- --
PIRQ_0 PIRQ_1
-- -- --0,1,
--
REQ/GNT
5 4 3 2 1 0
REQ/GNT
PCIX5 BUS DEVICE
SPARE SPARE SPARE SPARE PCIX SLOT 7 PCIX SLOT 6
PCIX4 BUS DEVICE
AA 5 ROMB AC 0 Mem card A 9C 0 Mem card A temp AC 4 Mem card B 9C 4 Mem card B temp A8 4 I/O card E0 4 hot-plug device EB 3 REMC DP0 EA 3 REMC DP1 EC 7 REMC DP2 EE 7 REMC DP3 A0 3 DIMM 1 Card A A2 3 DIMM 2 Card A A4 3 DIMM 3 Card A A6 3 DIMM 4 Card A A8 3 DIMM 5 Card A AA 3 DIMM 6 Card A AC 3 DIMM 7 Card A AE 3 DIMM 8 Card A D2 3 Memory CLKBUF 1 D2 7 Memory CLKBUF 2
2
3
64BIT PCI DEVICES - BUS 1 - INTERRUPTS
D#
8 6
F#
0,1
PCI1_AD24 PCI1_AD22
INTEL GC80303 BROADCOM 5700 1Gb NIC
64BIT PCI DEVICES - BUS 2 - INTERRUPTS
D#
6
F#
0,1
IDSEL DEVICE 1ST 2ND 3RD 4TH
PCI2_AD22
ULTRA160 SCSI AIC-7899
64BIT PCIX DEVICES - BUS 3 - INTERRUPTS
D#
F#
PIRQ_4 PIRQ_5 PIRQ_6
SIRQ_0(A) SIRQ_1(B)
2ND1ST 4TH3RDDEVICEIDSEL
4TH3RD2ND1STDEVICEIDSEL
-- --
------
5 SPARE
SPARE4
3 2 1 0
REQ/GNT
5 4 3 2 1 0
----
REQ/GNT
5 SPARE 4 3 2 1 0
SPARE SPARE PCIX SLOT 5 PCIX SLOT 4
PCIX3 BUS DEVICE
SPARE SPARE SPARE SPARE PCIX SLOT 3 PCIX SLOT 2
PCI2 BUS DEVICE
SPARE SPARE SPARE SPARE AIC-7899
A0 7 DIMM 1 Card B A2 7 DIMM 2 Card B A4 7 DIMM 3 Card B A6 7 DIMM 4 Card B A8 7 DIMM 5 Card B AA 7 DIMM 6 Card B AC 7 DIMM 7 Card B AE 7 DIMM 8 Card B
* Removed, but can be reinserted
by reinstalling QB14 & QB 15
3
8 6
PCIX3_AD24 PCIX3_AD22
PCIX SLOT 3 (PCIX3) PCIX SLOT 2 (PCIX2)
PIRQ_7 PIRQ_8 PIRQ_9 PIRQ_10 PIRQ_11 PIRQ_13
PIRQ_12
PIRQ_14
64BIT PCIX DEVICES - BUS 4 - INTERRUPTS
D#
F#
8 6
4 4
IDSEL DEVICE 3RD
PCIX4_AD24 PCIX4_AD22
PCIX SLOT 5 (PCIX5) PCIX SLOT 4 (PCIX4)
PIRQ_15 PIRQ_16 PIRQ_17 PIRQ_18 PIRQ_19 PIRQ_20 PIRQ_21 PIRQ_22
4TH1ST 2ND
REQ/GNT
4 SPARE
3 2 1 0
REQ/GNT
4 RESERVED 3 2 1 0
PCI1 BUS DEVICE
SPARE5
SPARE SPARE INTEL GC80303 ZION BROADCOM 5700 1Gb
PCI0 BUS DEVICE
AIC-7890 INTEL i82559 10/100 ATI RAGE XL VGA PCI SLOT 1
64BIT PCIX DEVICES - BUS 5 - INTERRUPTS
D#
F#
2ND1ST 4TH3RDDEVICEIDSEL
COMPUTER CORPORATION
8 6
PCIX5_AD24 PCIX5_AD22
PCI DEVICES CHART -- THREE XIOAPIC'S! INPUTS FOR 2ND & 3RD BELOW
PCIX SLOT 7 (PCIX7) PCIX SLOT 6 (PCIX6)
PIRQ_31 IS SPARE!
PIRQ_23 PIRQ_24 PIRQ_25 PIRQ_26 PIRQ_27 PIRQ_28 PIRQ_29
A B
PIRQ_30
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
3 OF 63
Page 4
1
+3.3V
10K-5%
10K-5%
10K-5%
10K-5%
21
21
21
21
NP*
NP*
1 2
10K-5%
NP*
1 2
10K-5%
1 2
10K-5%
1 2
10K-5%
NP*
NP*
1 2
1K-5%
21
ROOM=MAIN_SYN
21
1K-5%
1K-5%
1 2
220
21
NP*
220
21
NP*
220
1 2
NP*
220
CK_14M_CSB_R
CK_48M_SIO_R
CK_48M_USB_R
SYN_MULTSEL0
SYN_MULTSEL1
SYN_PWRDN
SPREAD
2 1
SUB*_20272
ADD*_81526
220
1 2
4
4
4
4
4
4,41
GPI_SPREAD_EN
GPI_SYN_SEL100
12
SEL100
NP*
22-5%
4,44
4,44
21
1 2
22-5%
1 2
22-5%
B D
ROOM=MAIN_SYN
21
CK_14M_CSB
CK_48M_SIO
CK_48M_USB
CK_33M_PBUF2
39
44
39
4
ROOM=MAIN_SYN_TOP
CA
DIFF PAIR GUIDELINE: 6MIL TRACE/14MIL SPACING
12-5-2003_10:50
ROOMS COMPLETE
1
2
SPREAD IN = SPREAD ENABLED SPREAD OUT = SPREAD DISABLED
SEL100 IN = 100MHZ SEL100 OUT = 133MHZ
MULTSEL0 & MULTSEL1 SELECTION
0 0 60ohm, 0.71V 0 1 50ohm, 0.71V
SELA & SELB SELECTION
0 0 H=100M,ACTIVE MODE 1 1 ALL CLOCKS TRI-STATED
+3.3V
L35
21
21
+3.3V
4.7uF
6.3V-10%
1 2
.01uF 50V.01uF 50V
21
CB331
4.7uF
CB319
6.3V-10%
1 2
1 2
CB330
0.1uF 16V0.1uF 16V
21
CB324
0.1uF 16V
390pF
50V-10%
1 2
NP*
1 2
CB322
SUB*_32JGM
20272 IS A 2X4
SYN_XIN1 SYN_XIN2
X4
21
14.31818MHz
12
1M-5%
NP*
21
50V-5%
3300pF
50V-20%
NP*
21
CB325
50V-5%
21
CB315
0.1uF 16V
475-1%
1 2
CB345
0.1uF 16V
4
4
4
21
0.1uF 16V
4,44
4,44
4,41
V_3P3_SYN1
CK_33M_PCI_R
GPI_SYN_SEL100
CK_14M_CSB_R
SYN_IREF_26
CK_48M_USB_R CK_48M_SIO_R
SYN_MULTSEL0
4
SYN_MULTSEL1
4
GPI_SPREAD_EN
SYN_PWRDN
22-5%
U97
22 7
XIN HCLK0
23
1
CLK33
48
SEL100/133
19
REF
26
3
3V48/SELA
4
3V48B/SELB
30
MULTISEL0
29
MULTISEL1
20
SPREAD
44
PWRDWN
2
6
12
18
24
25
31
37
43
46
CDC950/9248 TSSOP48 SUB*_4C853
HCLKB0
HCLK1
HCLKB1
HCLK2
HCLKB2
HCLK3
HCLKB3
HCLK4
HCLKB4
HCLK5
HCLKB5
HCLK6
HCLKB6
HCLK7
HCLKB7
8
10 11
13 14
16 17
42 41
39 38
36 35
33 32
5 9 15 21 27 28 34 40 45 47
R_CK_100M_MECA_P
R_CK_100M_MECA_N
R_CK_100M_AP_P
R_CK_100M_AP_N
R_CK_100M_ITP
R_CK_100M_ITP
R_CK_100M_MECB_P
R_CK_100M_MECB_N
R_CK_100M_CMIC
R_CK_100M_CMIC
NC_CK_100M_SYN33 NC_CK_100M_SYN32
R_CK_100M_CPU0
R_CK_100M_CPU0
R_CK_100M_CPU1
R_CK_100M_CPU1
22-5%
1 2
22-5%
22-5%
1 2
22-5%
1
22-5%
1 2
22-5%
1 2
22-5%
1 2
21
1 2
21
1 2
2
1 2
22-5%
22-5%
22-5%
22-5%
22-5%
22-5%
22-5%
MATCH LENGTH OF ALL THESE CLOCKS ALL OF BELOW ARE 5W RULE
CK_100M_CPU0
CK_100M_CPU0
21
21
21
21
49.9-1%
21
49.9-1%
21
49.9-1%
21
49.9-1%
21
49.9-1%
21
49.9-1%
CK_100M_AP_FIRST_P
CK_100M_AP_FIRST_N
21
49.9-1%
CK_100M_CPU1
CK_100M_CPU1
CK_100M_MECA_P
CK_100M_MECA_N
CK_100M_ITP
CK_100M_ITP
CK_100M_MECB_P
CK_100M_MECB_N
CK_100M_CMIC
CK_100M_CMIC
5
5
5
5
13
13
12
12
9
9
14
14
11
11
2
ROOM=PCI_BUF1
ROOM=PCI_BUF1_TOP
3
21
4.7uF
6.3V-10%
1 2
L36
1 2
21
CB300
4.7uF
CB301
6.3V-10%
V_3P3_SYN2
21
390pF
1 2
CB344
50V-10%
21
CB313
3300pF
SUB*_32JGM
50V-20%
1 2
CB308
0.1uF 16V
4C853 IS TSSOP48 ONLY
21
49.9-1%
21
49.9-1%
21
49.9-1%
21
49.9-1%
21
49.9-1%
21
49.9-1%
21
49.9-1%
4C853 RCC_SYN (TSSOP48) IS:
TI CDC950DGG ICS ICS9248AG-150 PHILIPS PCK2022RDGG PERICOM PI6C210A
ROOM=PCI_BUF2_TOP
MATCH ALL BELOW CLOCK LENGTHS (SLOTS WILL BE SHORTER)
CK_33M_NICCSB5_R 21
21
22-5%
22-5%
CK_33M_NIC100
CK_33M_CSB5
DELAY_RULE=::1.200N:1.300N CK_33M_CIOB1
21
50
39
17
3
+3.3V
KLM_X04 -- DELETED EMPNIC RESISTOR R2010
L48
V_3P3_PCK
21
1 2
CB387
+3.3V_AUX
39,44
4 4
CSB_SLP_S5
14.31818MHz
NP*
15pF 50V
1 2
X6
1 2
1M-5%
12
15pF 50V
PER_CLK_XIN PER_CLK_XOUT
1 2
NP*
8.2K-5%
EN_SLP_S5
+3.3V_AUX
21
P#5E714 IS CY2292SL-1N2 (HAS 20MHZ) OLD P#12MWW IS CY2292SL-1M1
8.2K-5% 4
XTALIN
5
XTALOUT
15
S2/SUSPEND*
13
S1
12
S0
16
SHUTDWN*/OE
3
11
GND11
ROOM=PER_CLK
CY2292SL-319
Peripheral CLK
SUB=SUB*_5E714
VDD14
CPUCLK
2 14 6 8 10 9 1 7
CK_14M_XLSYN_R
CK_40M_7890SYN_R
CK_25M_I559SYN_R
CK_20M_CPLD_R CK_20M_CPLD
CK_10M_ZIRCONSYN_R
CB388
0.1uF 16V
CB382
0.1uF 16V
4.7uF
1 2
33-5%
1 2
33-5%
33-5%
22-5%
1 2
33-5%
12
CB383
6.3V-10%
CK_14M_XLSYN
21
CK_40M_7890SYN
CK_25M_I559SYN
21
NP*
21
CK_10M_ZIRCONSYN
.01uF 50V
+3.3V_AUX
21
12
.01uF 50V
21
CB367
48
47
50
41
51
4.7uF
6.3V-10%
1 2
1 2
.01uF 50V
L40
21
CB359
4.7uF
CB358
6.3V-10%
21
0.1uF 16V
V_3P3_PBUF2
21
CB350
390pF
50V-10%
1 2
CB349
3300pF
SUB*_32JGM
1 2
CB357
50V-20%
1 2
CB346
0.1uF 16V
.01uF 50V
1 2
CB347
.01uF 50V
4
ROOM=PCI_BUF2
10K-5%
10K-5%
NP*
SP_R10K_2
CK_33M_PBUF2
21
21
10K-5%
1
5
10
19
24
28
14
SDATA
21
15
9
4
8 12 17 21 25
SCLOCK
BUF_IN
W40S11_02
SUB*_2204T
10K-5%
21
VDDIIC
OE
SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDRAM9
VSSIIC
PBUF2_OE
13
20
2 3 6 7 22 23 26 27 11 18
16
CK_33M_CIOBS_R
CK_33M_7890SIO_R
CK_33M_HPCVIDEO_R
CK_33M_ZIRCON_CPLD_R
CK_33M_SLOT1_R
CK_33M_PIRQ01_R
CK_33M_PIRQ23_R
SP_CK_33M_CKBF_11
SP_CK_33M_CKBF_18
21
22-5%
21
22-5%
21
22-5%
21
22-5%
21
22-5%
1 2
22-5%
22-5%
1 2
22-5%
1 2
22-5%
1 2
22-5%
1 2
22-5%
22-5%
DELAY_RULE=::1.200N:1.300N CK_33M_CIOB2
CK_33M_7890
CK_33M_SIO
CK_33M_HPC
CK_33M_VIDEO
CK_33M_ZIRCON
CK_33M_SLOT1
CK_33M_PIRQ0
CK_33M_PIRQ1
CK_33M_PIRQ2
CK_33M_PIRQ3
21
30
47
44
55
48
51
46
40
40
40
40
12
NP*
12
NP*
P#12MWW USED TO BE CY2292SL-1E5 & ALSO CY2292SL-1K6 & ALSO CY2292SL-1M1 ????? IS: CY2292SL-1M1 & ICS ?????
OLD P#57846 IS CY2292F BLANK IF NEEDED
CK_40M_7899SYN_R
ROOM=PER_CLK
PLAN IS TO REMOVE AS MANY DISCRETE XTALS & OSC AS POSSIBLE WHERE POSSIBLE
A B
1 2
33-5%
ROOM=PER_CLK_TOP
CK_40M_7899SYN
27
2204T CKBUF_M (SSOP28) IS:
CYPRESS W40S11-02 PERICOM PI6C182AH ICS ICS9279AF-03
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
CLOCK CHIPS
TITLE
DWG NO.
DC
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
4 OF 63
Page 5
B D
CA
12-5-2003_10:50
1
2
3
ROOM=PROC_1
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,41
5,41
5,39
5,39
5,39
5,44
5,9,11
5,41
5,41
H_ADSTB0 H_ADSTB1
H_REQ0 H_REQ1 H_REQ2 H_REQ3 H_REQ4
H_ADS H_AP0 H_AP1
H_BREQ0 H_BREQ1
5
H_BREQ23_PU
5
H_BREQ23_PU
5
H_BINIT H0_IERR
5,9
H_BPRI H_BNR H_LOCK
H_HIT H_HITM H_DEFER
H_RS0 H_RS1 H_RS2 H_RSP H_TRDY
H_A20M H_FERR
5,9
H_IGNNE H_SMI H_STPCLK H_SLP H_INIT H_RST
H_INTR H_NMI
CK_100M_CPU0
4
CK_100M_CPU0
4
A22 A20 B18 C18 A19 C17 D17 A13 B16 B14 B13 A12 C15 C14 D16 D15 F15 A10 B10 B11 C12 E14 D13
A9
B8 E13 D12 C11
B7
A6
A7
C9
C8
F17 F14
B19 B21 C21 C20 B22
D19 E10
D9
D20 F12 E11 D10 F11
E5
D23 F20 A17
E22 A23 C23
E21 D22 F21
C6 E19
F27 E27 C26 C27
D4 AE6
D6
Y8
B24 G23
Y4
W5
PROC_1
A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35
ADSTB0 ADSTB1
ADS AP0 AP1
BR0 BR1 BR2 BR3 BINIT IERR
HIT HITM DEFER
RS0 RS1 RS2 RSP TRDY
LINT0 LINT1
BCLK0 BCLK1
FOSTER DP REV 1.0
HETERO 1 OF 3
D0 D1 D2 D3 D4 D5 D6 D7 D8
D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63
DP0 DP1 DP2 DP3
DSTBN0 DSTBN1 DSTBN2 DSTBN3
DSTBP0 DSTBP1 DSTBP2 DSTBP3
SUB*_0C997
Y26 AA27 Y24 AA25 AD27 Y23 AA24 AB26 AB25 AB23 AA22 AA21 AB20 AB22 AB19 AA19 AE26 AC26 AD25 AE25 AC24 AD24 AE23 AC23 AA18 AC20 AC21 AE22 AE20 AD21 AD19 AB17 AB16 AA16 AC17 AE13 AD18 AB15 AD13 AD14 AD11 AC12 AE10 AC11 AE9 AD10 AD8 AC9 AA13 AA14 AC14 AB12 AB13 AA11 AA10 AB10 AC8 AD7 AE7 AC6 AC5 AA8 Y9 AB6
Y21 Y18 Y15 Y12
Y20 Y17 Y14 Y11
F18 E18
H_DP0 H_DP1 H_DP2 H_DP3
H_DSTBN0 H_DSTBN1 H_DSTBN2 H_DSTBN3
H_DSTBP0 H_DSTBP1 H_DSTBP2 H_DSTBP3
H_DBSY H_DRDY
NEW TOOL-LESS P#0C997
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,11
5,11
5,11
5,11
5,11
5,11
5,11
5,11
5,10
5,10
Swizzled.
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,9
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,41
5,9
5,41
5,39
5,39
5,39
5,44
5,9,11
5,41
5,41
H_ADSTB0 H_ADSTB1
H_REQ0 H_REQ1 H_REQ2 H_REQ3 H_REQ4
H_ADS H_AP0 H_AP1
H_BREQ1
5
H_BREQ0 H_BREQ23_PU
5
H_BREQ23_PU
5
H_BINIT H1_IERR
H_BPRI H_BNR H_LOCK
H_HIT H_HITM H_DEFER
H_RS0 H_RS1 H_RS2 H_RSP H_TRDY
H_A20M H_FERR H_IGNNE H_SMI H_STPCLK H_SLP H_INIT H_RST
H_INTR H_NMI
CK_100M_CPU1
4
CK_100M_CPU1
4
A22 A20 B18 C18 A19 C17 D17 A13 B16 B14 B13 A12 C15 C14 D16 D15 F15 A10 B10 B11 C12 E14 D13
A9
B8 E13 D12 C11
B7
A6
A7
C9
C8
F17 F14
B19 B21 C21 C20 B22
D19 E10
D9
D20 F12 E11 D10 F11
E5
D23 F20 A17
E22 A23 C23
E21 D22 F21
C6 E19
F27 E27 C26 C27
D4 AE6
D6
Y8
B24 G23
Y4
W5
PROC_2
A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35
ADSTB0 ADSTB1
ADS AP0 AP1
BR0 BR1 BR2 BR3 BINIT IERR
HIT HITM DEFER
RS0 RS1 RS2 RSP TRDY
LINT0 LINT1
BCLK0 BCLK1
FOSTER DP REV 1.0
HETERO 1 OF 3
SUB*_0C997
D0 D1 D2 D3 D4 D5 D6 D7 D8
D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63
DP0 DP1 DP2 DP3
DSTBN0 DSTBN1 DSTBN2 DSTBN3
DSTBP0 DSTBP1 DSTBP2 DSTBP3
ROOM=PROC_2OLD TOOL-REQUIRED P#07RGT
Y26 AA27 Y24 AA25 AD27 Y23 AA24 AB26 AB25 AB23 AA22 AA21 AB20 AB22 AB19 AA19 AE26 AC26 AD25 AE25 AC24 AD24 AE23 AC23 AA18 AC20 AC21 AE22 AE20 AD21 AD19 AB17 AB16 AA16 AC17 AE13 AD18 AB15 AD13 AD14 AD11 AC12 AE10 AC11 AE9 AD10 AD8 AC9 AA13 AA14 AC14 AB12 AB13 AA11 AA10 AB10 AC8 AD7 AE7 AC6 AC5 AA8 Y9 AB6
Y21 Y18 Y15 Y12
Y20 Y17 Y14 Y11
F18 E18
H_DP0 H_DP1 H_DP2 H_DP3
H_DSTBN0 H_DSTBN1 H_DSTBN2 H_DSTBN3
H_DSTBP0 H_DSTBP1 H_DSTBP2 H_DSTBP3
H_DBSY H_DRDY
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,10
5,11
5,11
5,11
5,11
5,11
5,11
5,11
5,11
5,10
5,10
ROOM=PROC_1
VCORE
RB418
12
H0_THERMTRIP
56.2-1% RB372
2 1
56.2-1% RB383
2 1
56.2-1%
RB410
2 1
56.2-1% RB453
56.2-1% RB390
1 2
56.2-1%
RB368
1 2
301-1%
RB427
1 2
301-1%
RB428
1 2
301-1%
RB452
1 2
301-1%
RB344
1 2
301-1%
RB421
1 2
301-1%
RB425
1 2
301-1%
RB369
1 2
301-1%
RB334
1 2
301-1%
RB447
1 2
150-1%
RB380
1 2
150-1%
RB382
150-1%
RB381
1 2
150-1%
RB391
150-1%
RB435
40.2-1%
RB413
H1_THERMTRIP
H_FERR
H0_IERR
21
H1_IERR
H_A20M
H_IGNNE
H_SMI
H_STPCLK
H_SLP
H_INIT
H_INTR
H_NMI
H_PWRGOOD
21
21
21
21
H_BINIT
H_BNR
H_HITM
H_HIT
H_MCERR
H_BREQ1
6,9
6,9
5,9
ROOM=CSB
1
Put RB424 close to PROC_1
Put RB411 close to FET
5,9
5,9
5,41
5,41
5,39
5,39
5,39
2
5,44
5,41
5,41
6,60
5,10
5,10
Do need for termination!
5,10
5,10
6,9
ROOM=PROC_2
3
5
40.2-1%
RB414
21
40.2-1%
RB446
40.2-1%
150-1%
RB417
1 2
150-1%
150-1%
RB409
1 2
H_BREQ23_PU
12
21
21
H_BREQ0
21
1 2
21
1 2
5,10
0-OHM
SUB*_30661
0-OHM
SUB*_30661
0-OHM
SUB*_30661
0-OHM
5
H_BINIT
H_BNR
H_HIT
H_HITM
5,10
5,10
5,10
5,10
150-1%
SUB*_30661
4 4
PROCESSORS 1 & 2
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
A02
SHEET
5 OF 6312/5/2003
A B
DC
Page 6
B D
CA
12-5-2003_10:50
1
2
3
VCORE
21
1 2
VCORE
21
1 2
PROC_1 GTL VREF
ROOM=PROC1_REF
49.9-1%100-1% H0_GTLREF01
SUB*_83008
1 2
1 2
RB363
1K-1% RB365
1K-1% RB367
1K-1% RB360
1K-1% RB355
1K-1% RB333
1K-1% RB343
1K-1%
1uF
10V-10%
1uF
CB622
10V-10%
12
12
12
12
12
12
12
CB564
2 1
0.1uF 16V
H0_GTLREF23
2 1
0.1uF 16V
H0_TESTHI0
H0_TESTHI1
H0_TESTHI2
H0_TESTHI3
H0_TESTHI4
H0_TESTHI5
H0_TESTHI6
CB565
CB517
LM_X04--83008 sub for p/n consolidation
SUB*_83008
CB643
100-1% 49.9-1%
VCORE
21
21
CB621
220pF
50V-10%
220pF
50V-10%
21
CB522
21
CB644
6
6
6
6
6
6
6
6
Route <1.5" trace. Place 220pf caps under CPU
220pF
50V-10%
6
Route <1.5" trace. Place 220pf caps under CPU
220pF
50V-10%
GALLATIN SUPPORT
6
6,9
6,9
6,9
6,9
6,9
6,9
6,9
5,6,60
+3.3V
HEATSINK P#????? ***NOT PART OF PWA*** HEATSINK CLIPS P#83MGJ (2 PER PROC) ***NOT PART OF PWA***
1 2
8.2K-5% RB339
HEATSINK CLIP PLASTIC BOAT P#52JXN (2 PER PROC) PLASTIC BOAT SCREWS P#89JJP (4 PER PROC)
CPU_SMBALERT
ADD=ADD_52JXN_ASSYDWG ADD1=ADD_52JXN_ASSYDWG ADD2=ADD_89JJP_ASSYDWG ADD3=ADD_89JJP_ASSYDWG ADD4=ADD_89JJP_ASSYDWG ADD5=ADD_89JJP_ASSYDWG ADD6=ADD_92GXR_ASSYDWG
DUAL SCREW MOUNTING UNDERNEATH P#92GXR (1 PER PROC) EMI CLIP P#?????
AMP TOOL-LESS SOCKET P#0C997
ROOM=PROC_1
12
CB521
0.1uF 16V
PROC_1
H_BPM02 H_BPM13
H_BPM4 H_BPM5
ITP_TDI_H0
9
ITP_TDO_H0
9
ITP_TMS ITP_TRST
H_PWRGOOD
H0_GTLREF01
6
H0_GTLREF23
6
H0_TESTHI0
6
H0_TESTHI1
6
H0_TESTHI2
6
H0_TESTHI3
6
H0_TESTHI4
6
H0_TESTHI5
6
H0_TESTHI6
6
NC_H0_RSVD1 NC_H1_RSVD1 NC_H0_RSVD2 NC_H0_RSVD3 NC_H0_RSVD4 NC_H0_RSVD5
NC_H0_RSVD8
NC_H0_RSVD13
NC_H0_RSVD17
F6 F8 E7 F5 E8 E4
E24 C24 E25 A25 F24
AB7
W23
W9
F23
F9
W6 W7 W8
Y6 AA7 AD5 AE5
A1
A4 A15 A16 A26 A30 A31
B1
B4 B30 B31
C1
C5 C30 C31
D1 D25 D30 D31
E1 E30 E31
F1 F30 F31
G1 G30 G31
H1 H30 H31
J1 J30 J31
K1 K30 K31
L1 L30 L31
M1 M30 M31
N1 N30 N31
P1 P30 P31
R1 R30 R31
TCK TDI TDO TMS TRST
PWRGOOD
GTLREF0 GTLREF1 GTLREF2 GTLREF3
TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6
RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 RSVD37 RSVD38 RSVD39 RSVD40 RSVD41 RSVD42 RSVD43 RSVD44 RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52
MCERR ODTEN
PROCHOT
SKTOCC
THERMTRIP
COMP0 COMP1
SM_VCC1 SM_VCC2
SM_ALERT
SM_CLK
SM_DATA
SM_WP SM_EP_A0 SM_EP_A1 SM_EP_A2 SM_TS_A0 SM_TS_A1
RSVD89 RSVD53 RSVD54 RSVD55 RSVD56 RSVD57 RSVD58 RSVD59 RSVD60 RSVD61 RSVD62 RSVD63 RSVD64 RSVD65
RSVD66 RSVD68 RSVD69 RSVD70 RSVD71 RSVD72 RSVD73 RSVD74 RSVD75 RSVD76 RSVD77 RSVD78 RSVD79 RSVD80 RSVD81 RSVD82 RSVD83 RSVD84 RSVD85 RSVD86 RSVD87 RSVD88
FOSTER DP REV 1.0
HETERO 2 OF 3
AB4 AD4 B27
AA5 D26
D7 B5 B25 A3
F26
F3 E3 D3 C3 B3
W3 T1 T30 T31 U1 U30 U31 V1 V30 V31 W1 W30 W31 Y1
Y3 Y27 Y28 Y30 Y31 AA1 AA3 AA30 AA31 AB1 AB3 AB30 AB31 AC1 AC30 AC31 AD1 AD30 AD31 AE4 AE15 AE16
NC_H0_VCCSENSE
X05_LM--p/n sub for part consolidation
+3.3V
H_DBI0 H_DBI1 H_DBI2 H_DBI3
V_VID_H0_VCCA V_VID_H0_VPLL
H_MCERR H0_ODTEN H0_PROCHOT H0_CPU_PRES
H0_THERMTRIP
H0_COMP0 H0_COMP1
H0_VID0 H0_VID1 H0_VID2 H0_VID3 H0_VID4
CPU_SMBALERT ENV_SEG0_SCL ENV_SEG0_SDA
GPO_SMB_WP H0_SM_EP_A0 H0_SM_EP_A1 H0_SM_EP_A2 H0_SM_TS_A0 H0_SM_TS_A1
NC_H0_RSVD89
NC_H0_RSVD67 NC_H0_RSVD68 NC_H0_RSVD69
NC_H0_RSVD73
NC_H0_RSVD77
NC_H0_RSVD80
NC_H0_RSVD86 NC_H1_RSVD86 NC_H0_RSVD87 NC_H0_RSVD88
SUB*_83009
8,41
8,41
8,41
8,41
8,41
6,10
6,10
6,10
6,10
22uF 6.3V
1 2
5,6,9
9
41
5,9
22uF 6.3V
CB487
21
6
6,13,39,53,57
6,13,39,53,57
6
6
6
6
6
6
CB520
2 1
0.1uF 16V
4.7uH 30mA
1 2
1 2
SUB*_83009
45.3 -1%
4.7uH 30mA
CB533
21
RB340
SUB=SUB*_08DFE
Tsensor = 30h/31h
PI-ROM = A0h/A1h
45.3 -1%
08DFE IS 43.2ohm 1% SM0603
H0_SM_TS_A0
6
H0_SM_TS_A1
6
H0_SM_EP_A0
6
H0_SM_EP_A1
6
H0_SM_EP_A2
6
VCORE
V_VID_H0_VCCA_FB
RB336
21
V_VID_H0_VPLL_FB
VCORE
21
RB411
Should MCERR be NC or pulled up here?
SUB=SUB*_08DFE
1K-1%
On DIE term enabled
21
220
RB412
NP*
1 2
RB331
RB348
1 2
SUB*_21873
21
SUB*_21873
1K-1%
RB350
1K-1%
1 2
6,9
RB356
1 2
6,9
6,9
6,9
6,9
1K-1%
RB361
H_BPM02 H_BPM13
H_BPM4 H_BPM5
RB268
1 2
1 2
150-1%
1K-1%
RB353
1 2
RNB85
6,9
6,9
5,6,60
1K-1%
54
RNB85
39 OHM-5%
ITP_TCK ITP_TDI_H1
9
ITP_TDO_H1
9
ITP_TMS ITP_TRST
H_PWRGOOD
H1_GTLREF01
6
H1_GTLREF23
6
NC_H1_RSVD2 NC_H1_RSVD3 NC_H1_RSVD4 NC_H1_RSVD5
NC_H1_RSVD8
NC_H1_RSVD13
NC_H1_RSVD17
VCORE
1 8
39 OHM-5%
H1_TESTHI0
6
H1_TESTHI1
6
H1_TESTHI2
6
H1_TESTHI3
6
H1_TESTHI4
6
H1_TESTHI5
6
H1_TESTHI6
6
RNB85
3 6
72
RNB85
39 OHM-5%
39 OHM-5%
ROOM=PROC_2
PROC_2
F6
F8
E7
F5
E8
E4
E24
TCK
C24
TDI
E25
TDO
A25
TMS
F24
AB7
PWRGOOD
W23
GTLREF0
W9
GTLREF1
F23
GTLREF2
F9
GTLREF3
W6
TESTHI0
W7
TESTHI1
W8
TESTHI2
Y6
TESTHI3
AA7
TESTHI4
AD5
TESTHI5
AE5
TESTHI6
A1
RSVD1
A4
RSVD2
A15
RSVD3
A16
RSVD4
A26
RSVD5
A30
RSVD6
A31
RSVD7
B1
RSVD8
B4
RSVD9
B30
RSVD10
B31
RSVD11
C1
RSVD12
C5
RSVD13
C30
RSVD14
C31
RSVD15
D1
RSVD16
D25
RSVD17
D30
RSVD18
D31
RSVD19
E1
RSVD20
E30
RSVD21
E31
RSVD22
F1
RSVD23
F30
RSVD24
F31
RSVD25
G1
RSVD26
G30
RSVD27
G31
RSVD28
H1
RSVD29
H30
RSVD30
H31
RSVD31
J1
RSVD32
J30
RSVD33
J31
RSVD34
K1
RSVD35
K30
RSVD36
K31
RSVD37
L1
RSVD38
L30
RSVD39
L31
RSVD40
M1
RSVD41
M30
RSVD42
M31
RSVD43
N1
RSVD44
N30
RSVD45
N31
RSVD46
P1
RSVD47
P30
RSVD48
P31
RSVD49
R1
RSVD50
R30
RSVD51
R31
RSVD52
FOSTER DP REV 1.0
HETERO 2 OF 3
MCERR ODTEN
PROCHOT
SKTOCC
THERMTRIP
COMP0 COMP1
SM_VCC1 SM_VCC2
SM_ALERT
SM_CLK
SM_DATA
SM_WP SM_EP_A0 SM_EP_A1 SM_EP_A2 SM_TS_A0 SM_TS_A1
RSVD89 RSVD53 RSVD54 RSVD55 RSVD56 RSVD57 RSVD58 RSVD59 RSVD60 RSVD61 RSVD62 RSVD63 RSVD64 RSVD65
RSVD66 RSVD68 RSVD69 RSVD70 RSVD71 RSVD72 RSVD73 RSVD74 RSVD75 RSVD76 RSVD77 RSVD78 RSVD79 RSVD80 RSVD81 RSVD82 RSVD83 RSVD84 RSVD85 RSVD86 RSVD87 RSVD88
AB4 AD4 B27
AA5 D26
D7 B5 B25 A3
F26
F3 E3 D3 C3 B3
W3 T1 T30 T31 U1 U30 U31 V1 V30 V31 W1 W30 W31 Y1
Y3 Y27 Y28 Y30 Y31 AA1 AA3 AA30 AA31 AB1 AB3 AB30 AB31 AC1 AC30 AC31 AD1 AD30 AD31 AE4 AE15 AE16
ADD=ADD_52JXN_ASSYDWG ADD1=ADD_52JXN_ASSYDWG ADD2=ADD_89JJP_ASSYDWG ADD3=ADD_89JJP_ASSYDWG ADD4=ADD_89JJP_ASSYDWG ADD5=ADD_89JJP_ASSYDWG ADD6=ADD_92GXR_ASSYDWG
CB500
2 1
H_DBI0 H_DBI1 H_DBI2 H_DBI3
V_VID_H1_VCCA V_VID_H1_VPLLITP_TCK
NC_H1_VCCSENSE
H1_VSSAH0_VSSA
NC_H1_VSSSENSENC_H0_VSSSENSE
X05_LM--p/n sub for part consolidation
H_MCERR H1_ODTEN H1_PROCHOT H1_CPU_PRES
H1_THERMTRIP
H1_COMP0 H1_COMP1
H1_VID0 H1_VID1 H1_VID2 H1_VID3 H1_VID4
CPU_SMBALERT
ENV_SEG0_SCL ENV_SEG0_SDA GPO_SMB_WP
NC_H1_RSVD89
NC_H1_RSVD67 NC_H1_RSVD68 NC_H1_RSVD69
NC_H1_RSVD73
NC_H1_RSVD77
NC_H1_RSVD80
NC_H1_RSVD83NC_H0_RSVD83
NC_H1_RSVD87 NC_H1_RSVD88
6,10
6,10
6,10
6,10
+3.3V
22uF 6.3V
1 2
CB490
SUB*_83009
5,6,9
9
41
5,9
8,41
8,41
8,41
8,41
8,41
6
6,13,39,53,57
6,13,39,53,57
6
NC_H1_SM_TS_A1
12
CB540
0.1uF 16V
4.7uH 30mA
1 2
22uF 6.3V
1 2
21
Tsensor = 32h/33h
PI-ROM = A2h/A3h
4.7uH 30mA
CB532
SUB*_83009
45.3 -1% SUB=SUB*_08DFE
H1_SM_PR_A0 H1_SM_PR_A1 H1_SM_PR_A2 H1_SM_TS_A0
0.1uF 16V
V_VID_H1_VCCA_FB
21
V_VID_H1_VPLL_FB
21
RB335
08DFE IS 43.2ohm 1% SM0603
45.3 -1% SUB=SUB*_08DFE
21873 IS ZERO OHM
RB341
RB332
1 2
VCORE
21
NP*
RB407
RB419
1K-1%
1K-1%
On DIE term disabled
21
220
+3.3V
100-1%
12
12
1K-1%
RB349
RB351
RB1091
12
VCORE
21
SUB*_21873
SUB*_21873
1K-1%
RB1090
12
VCORE
21
1 2
VCORE
21
RB373
RB374
1 2
+3.3V
0.1uF 16V 1 2
CB515
Jaguar 2.0 Change: Intel recommendation: Changed address resistors from just 1 (RB349) into 3 separate ones. RB1090 & 1091 should be near RB349
100-1% 49.9-1%
100-1% 49.9-1%
ROOMS COMPLETE
PROC_2 GTL VREF
ROOM=PROC2_REF
H1_GTLREF01
21
1uF
CB510
1 2
SUB*_83008
CB641
1 2
SUB*_83008
CB509
1uF
CB619
10V-10%
2 1
10V-10%
0.1uF 16V
H1_GTLREF23
2 1
0.1uF 16V
VCORE
CB562
RB362
1K-1% RB364
1K-1% RB366
1K-1% RB357
1K-1% RB354
1K-1% RB338
1K-1% RB337
1K-1%
220pF
21
CB620
12
12
12
12
12
12
12
21
CB561
50V-10%
220pF
CB656
50V-10%
H1_TESTHI0
H1_TESTHI1
H1_TESTHI2
H1_TESTHI3
H1_TESTHI4
H1_TESTHI5
H1_TESTHI6
6
220pF
50V-10%
Route <1.5" trace. Place 220pf caps under CPU
6
21
220pF
50V-10%
Route <1.5" trace. Place 220pf caps under CPU
6
6
6
6
6
6
6
1
2
3
VCORE
VCORE
CPU-- Misc. & RSVD
GALLATIN SUPPORT
4 4
KLM -- CHANGED RB334, RB328, RB339, RB329 TO 1 OHM
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
PROCESSORS 1 & 2
TITLE
SCHEM,PLN,PE4600,2P
DWG NO.
H3007
12/5/2003
COMPUTER CORPORATION
AUSTIN,TEXAS
A02
SHEET
6 OF 63
A B
DC
Page 7
Length matching groups
1 ADSTB0 REQ[4:0]#,A[16:3]# 2 ADSTB1 A[35:17]#
3 DSTBP0#/N0# D[15:0]#,DBI0# 4 DSTBP1#/N1# D[31:16]#,DBI1#
5 DSTBP2#/N2# D[47:32]#,DBI2# 6 DSTBP3#/N3# D[63:48]#,DBI3#
General routing rule 5mil, 15 mil space FERR#,PROCHOT#, THRMTRIP
BR[3:0]#
- Proc0 to Proc1 is ~4.5" matched to within 0.5"
B D
CA
12-5-2003_10:50
ROOMS COMPLETE
1
2
3
A2
A8 A14 A18 A24 A28
B6 B12 B20 B26 B29
C2
C4 C10 C16 C22 C28
D8 D14 D18 D24 D29
E2
E6 E12 E20 E26 E28
F4 F10 F16 F22 F29
G2
G4
G6
G8 G24 G26 G28
H3
H5
H7
H9 H23 H25 H27 H29
J2
J4
J6
J8 J24 J26 J28
K3
K5
K7
K9 K23 K25 K27 K29
L2
L4
L6
L8 L24 L26 L28
M3
M5
M7
M9 M23 M25 M27
PROC_1
VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98
VCC99 VCC100 VCC101 VCC102 VCC103 VCC104 VCC105 VCC106 VCC107 VCC108 VCC109 VCC110 VCC111 VCC112 VCC113 VCC114 VCC115 VCC116 VCC117 VCC118 VCC119 VCC120 VCC121 VCC122 VCC123 VCC124 VCC125 VCC126 VCC127 VCC128 VCC129 VCC130 VCC131 VCC132 VCC133 VCC134 VCC135 VCC136 VCC137 VCC138 VCC139 VCC140 VCC141 VCC142 VCC143 VCC144 VCC145 VCC146 VCC147 VCC148 VCC149 VCC150 VCC151 VCC152 VCC153 VCC154 VCC155
M29 N3 N5 N7 N9 N23 N25 N27 N29 P2 P4 P6 P8 P24 P26 P28 R3 R5 R7 R9 R23 R25 R27 R29 T2 T4 T6 T8 T24 T26 T28 U3 U5 U7 U9 U23 U25 U27 U29 V2 V4 V6 V8 V24 V26 V28 W25 W27 W29 Y10 Y16 Y22 AA4 AA6 AA12 AA20 AA26 AB2 AB8 AB14 AB18 AB24 AC3 AC4 AC10 AC16 AC22 AD2 AD6 AD12 AD20 AD26 AE3 AE8 AE14 AE18 AE24 Y2
1
VCORE
ROOM=PROC_2ROOM=PROC_1
4V-20%
Length matching groups
1 ADSTB0 REQ[4:0]#,A[16:3]#
VCOREVCORE
PROC_2
M29 N3 N5 N7 N9 N23 N25 N27 N29 P2 P4 P6 P8 P24 P26 P28 R3 R5 R7 R9 R23 R25 R27 R29 T2 T4 T6 T8 T24 T26 T28 U3 U5 U7 U9 U23 U25 U27 U29 V2 V4 V6 V8 V24 V26 V28 W25 W27 W29 Y10 Y16 Y22 AA4 AA6 AA12 AA20 AA26 AB2 AB8 AB14 AB18 AB24 AC3 AC4 AC10 AC16 AC22 AD2 AD6 AD12 AD20 AD26 AE3 AE8 AE14 AE18 AE24 Y2
A2
A8 A14 A18 A24 A28
B6 B12 B20 B26 B29
C2
C4 C10 C16 C22 C28
D8 D14 D18 D24 D29
E2
E6 E12 E20 E26 E28
F4 F10 F16 F22 F29
G2
G4
G6
G8 G24 G26 G28
H3
H5
H7
H9 H23 H25 H27 H29
J2
J4
J6
J8 J24 J26 J28
K3
K5
K7
K9 K23 K25 K27 K29
L2
L4
L6
L8 L24 L26 L28
M3
M5
M7
M9 M23 M25 M27
VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98
VCC99 VCC100 VCC101 VCC102 VCC103 VCC104 VCC105 VCC106 VCC107 VCC108 VCC109 VCC110 VCC111 VCC112 VCC113 VCC114 VCC115 VCC116 VCC117 VCC118 VCC119 VCC120 VCC121 VCC122 VCC123 VCC124 VCC125 VCC126 VCC127 VCC128 VCC129 VCC130 VCC131 VCC132 VCC133 VCC134 VCC135 VCC136 VCC137 VCC138 VCC139 VCC140 VCC141 VCC142 VCC143 VCC144 VCC145 VCC146 VCC147 VCC148 VCC149 VCC150 VCC151 VCC152 VCC153 VCC154 VCC155
2 ADSTB1 A[35:17]# 3 DSTBP0#/N0# D[15:0]#,DBI0# 4 DSTBP1#/N1# D[31:16]#,DBI1#
5 DSTBP2#/N2# D[47:32]#,DBI2# 6 DSTBP3#/N3# D[63:48]#,DBI3#
General routing rule 5mil, 15 mil space FERR#,PROCHOT#, THRMTRIP
- 10 mil trace with pullup at each end <1" past ball A20M#,IGNE#, INIT#, Lint[1:0],SLP#,SMI#, STPCLK#, and H_PWRGOOD
- 10 mil trace with pullup <1" from ball after last processor BR[3:0]#
- Proc0 to Proc1 is ~4.5" matched to within 0.5"
- pullup at each end with <1" past ball (BR0, BR2, and BR3 only have pullup at end)
ROOM=PROC_1
VCORE
Place 3-4 over Addr\Ctrl Place 4-6 over data
h1
1 2
CB590
VCORE
1 2
CB585
1 2
CB613
0.1uF 16V 603 pkg
1 2
CB599
0.1uF 16V
1 2
CB612
0.1uF 16V
1 2
CB616
0.1uF 16V
1 2
CB597
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
Place 3-4 over Addr\Ctrl Place 4-6 over data
1 2
CB611
0.1uF 16V
0.1uF 16V
0.1uF 16V
ROOM=PROC_2
VCORE
+80%-20%
+80%-20%
22uF 10V
1 2
VCORE
+80%-20%
22uF 10V
1 2
CB635
CB558
22uF 10V
1 2
+80%-20%
22uF 10V
1 2
CB575
1210 package
+80%-20%
22uF 10V
1 2
+80%-20%
22uF 10V
1 2
CB589
CB594
VCORE
+80%-20%
22uF 10V
1 2
+80%-20%
22uF 10V
1 2
+80%-20%
22uF 10V
1 2
+80%-20%
22uF 10V
1 2
CB654
1 2
CB580
CB579
+80%-20%
0.1uF 16V
1 2
0.1uF 16V
22uF 10V
1 2
+80%-20%
22uF 10V
CB610
CB632
1 2
CB514
1 2
0.1uF 16V
1 2
0.1uF 16V
+80%-20%
22uF 10V
+80%-20%
22uF 10V
1 2
1 2
CB578
1 2
CB655
1 2
CB581
0.1uF 16V
CB605
0.1uF 16V
+80%-20%
22uF 10V
+80%-20%
CB593
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
CB606
22uF 10V
1 2
CB636
1 2
1 2
+80%-20%
22uF 10V
+80%-20%
22uF 10V
0.1uF 16V
0.1uF 16V
1 2
CB542
1 2
CB504
1 2
820uF
+
VCORE
+80%-20%
22uF 10V
+80%-20%
22uF 10V
1 2
CB596
1 2
4V-20%
820uF
4V-20%
820uF
+80%-20%
CB634
+
21
+
21
10V-10%
SUB*_83008
10V-10%
22uF 10V
+80%-20%
22uF 10V
4V-20%
SUB*_83008
1uF
1uF
1 2
1 2
820uF
4V-20%
820uF
VCORE
1 2
CB518
805 pkg
VCORE
1 2
CB506
+80%-20%
CB637
CB600
1 2
+
1 2
+
10V-10%
1uF
10V-10%
1uF
SUB*_83008
22uF 10V
+80%-20%
22uF 10V
4V-20%
4V-20%
1 2
CB614
1 2
+80%-20%
CB617
CB653
820uF
820uF
10V-10%
SUB*_83008
10V-10%
+80%-20%
SUB*_83008
1 2
1 2
4V-20%
+
21
4V-20%
+
21
SUB*_83008
10V-10%
1 2
1 2
1 2
CB511
1 2
CB516
1uF
10V-10%
1uF
SUB*_83008
+80%-20%
+80%-20%
CB548
1uF
LM_X04--83008 sub for p/n consolidation
1uF
22uF 10V
22uF 10V
1 2
820uF
+
1 2
820uF
+
10V-10%
1 2
CB574
SUB*_83008
SUB*_83008
10V-10%
1 2
22uF 10V
1 2
CB512
22uF 10V
1 2
CB502
SUB*_83008
1uF
1uF
+80%-20%
+80%-20%
4V-20%
820uF
+
10V-10%
1 2
10V-10%
1 2
CB571
SUB*_83008
22uF 10V
1 2
CB595
22uF 10V
1 2
21
1 2
1uF
1uF
CB513
SUB*_83008
1 2
CB508
+80%-20%
+80%-20%
CB568
4V-20%
820uF
+
4V-20%
820uF
+
SUB*_83008
10V-10%
1uF
SUB*_83008
10V-10%
1uF
22uF 10V
1 2
CB628
22uF 10V
1 2
CB501
1 2
1 2
1 2
CB645
1 2
CB507
SUB*_83008
+80%-20%
4V-20%
820uF
10V-10%
10V-10%
1 2
1uF
SUB*_83008
1 2
1uF
22uF 10V
1 2
CB541
+
21
10V-10%
SUB*_83008
10V-10%
CB629
+80%-20%
SUB*_83008
1 2
1uF
1uF
1 2
CB528
22uF 10V
1 2
CB519
+80%-20%
22uF 10V
1 2
10V-10%
10V-10%
CB494
1 2
1uF
1 2
1uF
+80%-20%
22uF 10V
+80%-20%
22uF 10V
CB573
SUB*_83008
CB572
SUB*_83008
1 2
CB551
1 2
CB650
ROOM=PROC_1
ROOM=PROC_2
ROOM=PROC_1
ROOM=PROC_2
+80%-20%
22uF 10V
1 2
CB582
ROOM=PROC_1
+80%-20%
22uF 10V
1 2
CB651
ROOM=PROC_2
2
3
FOSTER DP REV 1.0
HETERO 3 OF 3
4 4
FOSTER DP REV 1.0
HETERO 3 OF 3
VCORE_SENSE
8
VCORE_GND_SENSE
8
1 2
1 2
0.1uF 16V
RB359
1 2
RB358
21
1 2
0.1uF 16V
VCORE
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
VCORE
0.1uF 16V 2 1
1 2
0.1uF 16V
0.1uF 16V C409
12
1 2
0.1uF 16V
0.1uF 16V 2 1
1 2
0.1uF 16V
0.1uF 16V
12
1 2
0.1uF 16V
0.1uF 16V
0.1uF 16V
0.1uF 16V
2 1
CB484
1 2
CB486
12
1 2
0.1uF 16V
0.1uF 16V 2 1
CB664
1 2
0.1uF 16V
0.1uF 16V CB662
12
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
0.1uF 16V
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
A02
SHEET
7 OF 6312/5/2003
A B
DC
Page 8
SD_X06 -- added support for detecting VRM9.1 and 9.0's
B D
CA
12-5-2003_10:50
ROOMS COMPLETE
1
ROOM=VRM_P1
VRM_+12V
12
+
1 2
270uF
16V-20%
1
ROOM=VRM_P2
L32
21
1uH 4.4A
L30
21
1uH 4.4A
12
+
270uF
16V-20%
12
+
270uF
16V-20%
12
+
270uF
16V-20%
2
VRM0_VRM91
44
41,44,51
41
GPI_VRM1_PRES
VRM0_I2C_A1
R1012
+3.3V
21
R1086
1 2
NP*
ENV_SEG0_SCL_3.3
VOLTAGE REG, CORE
+3.3V
VRM_P1
21
8,41,51,60
+3.3V
R1013
21
1 2
21
8.2K-5%
220
NP*
8,41
8,41
8,41
7,8
8.2K-5%
VRM_VID4 VRM_VID2 VRM_VID0 VRM0_ISHARE
CPU_VRM_EN VCORE_SENSE
VIN-_62
62
VIN-_61
61
VIN-_60
60
VIN-_59
59
VRM-PRES
58
57
56
55
ISHARE
54
OUTEN
53
VO-SEN+
52
RSVD_51
51
VO+_50
50
VO+_49
49
VO-_48
48
VO+_47
47
VO-_46
46
VO+_45
45
VO-_44
44
VO+_43
43
VO-_42
42
VO+_41
41
VO-_40
40
VO+_39
39
VO-_38
38
VO+_37
37
VO-_36
36
VO+_35
35
VO-_34
34
VO+_33
33
VO-_32
32
VIN+_1 VIN+_2 VIN+_3 VIN+_4 RXVD_5
RSVD_9
PWRGD VO-SEN­RSVD_12
VO-_13 VO+_14 VO-_15 VO+_16 VO-_17 VO+_18 VO-_19 VO+_20 VO-_21 VO+_22 VO-_23 VO+_24 VO-_25 VO+_26 VO-_27 VO+_28 VO-_29 VO+_30 VO-_31
1 2 3 4 5
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
VRM0_SCL
VRM0_SDA VRM1_PWRGOOD VCORE_GND_SENSE
VCOREVCORE
R1026
21
7,8
1 2
21
NP*
ENV_SEG0_SDA_3.3
VRM0_VENID1
VRM_VID3 VRM_VID1
VRM0_I2C_A0
Do any VRM vendors want SMBUS?
220
NP*
Jaguar 2.0 Change: Change for 9.1 VRM:
8.2K-5% added 8.2K pullups and 0 ohm series to VRM enable lines
8
8
+3.3V
41
21
GPI_VRM2_PRES
VRM_VID4 VRM_VID2 VRM_VID0
VRM1_I2C_A1
41
8,41
8,41
41
10K-5%
51,60
41,44,51
8,41
8,41
8,41
5 SMB_CLK
9 SMB_DATA
VRM1_VRM91
44
12 SMB_A0
51 SMB_A1
RB1014
1 2
+3.3V
1 2
8,41,51,60
+3.3V
8.2K-5%
7,8
21
8.2K-5%
VRM1_ISHARE
CPU_VRM_EN
VCORE_SENSE
VOLTAGE REG, CORE
VRM_P2
VIN-_62
62
VIN-_61
61
VIN-_60
60
VIN-_59
59
VRM-PRES
58
57
56
55
ISHARE
54
OUTEN
53
VO-SEN+
52
RSVD_51
51
VO+_50
50
VO+_49
49
VO-_48
48
VO+_47
47
VO-_46
46
VO+_45
45
VO-_44
44
VO+_43
43
VO-_42
42
VO+_41
41
VO-_40
40
VO+_39
39
VO-_38
38
VO+_37
37
VO-_36
36
VO+_35
35
VO-_34
34
VO+_33
33
VO-_32
32
VIN+_1 VIN+_2 VIN+_3 VIN+_4 RXVD_5
RSVD_9
PWRGD VO-SEN­RSVD_12
VO-_13 VO+_14 VO-_15 VO+_16 VO-_17 VO+_18 VO-_19 VO+_20 VO-_21 VO+_22 VO-_23 VO+_24 VO-_25 VO+_26 VO-_27 VO+_28 VO-_29 VO+_30 VO-_31
1 2 3 4 5
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
VRM1_SCL
VRM_VID1 VRM1_SDA
VCORE_GND_SENSE
VRM_VID3
VCOREVCORE
1 2
R1027
NP*
21
NP*
21
8,41
8,41
7,8
21
220
NP*
+3.3V
21
R1087
VRM1_I2C_A0
8.2K-5%
ENV_SEG0_SCL_3.3
ENV_SEG0_SDA_3.3
VRM1_VENID1
L29
1uH 4.4A
L31
1uH 4.4A
41
41
21
21
Jaguar 2.0 Change: Change for 9.1 VRM: added 8.2K pullups and 0 ohm series to
8
VRM enable lines
8
+3.3V
2
21
10K-5%
VRM2_PWRGOOD
51,60
3
+3.3V
8.2K-5% RNB87
7 2
8.2K-5% RNB8736RNB87
8.2K-5%
5 4
8.2K-5% RNB87
8.2K-5% RB388
8.2K-5%
8.2K-5%
5 4
8.2K-5%
RN7136RN71
VRM 9.0 EDG SKT
LATCHED
SUB*_7G715
LM_X04--7G715 is p/n for 9.1 conn keyed for 9.0 Post RTS this connector will change to 7G715 to be consistent with Merlot
(LATCHED VERSION)
7 2
8.2K-5%
8.2K-5%
RN7118RN71
5 4
8.2K-5% RN57
8.2K-5% RN57
7 2
8.2K-5%
8.2K-5%
RN5718RN57
8.2K-5%
VRM 9.0 EDG SKT
LATCHED
SUB*_7G715
3
LM_X04--7G715 is p/n for 9.1 conn keyed for 9.0 Post RTS this connector will change to 7G715 to be consistent with Merlot
(LATCHED VERSION)
00JDV IS OLD VRM9.0 LATCHING CONNECTOR 7G715 IS NEW VRM9.1 LATCHING CONNECTOR
18
12
4 4
12
H0_VID0 H0_VID1 H0_VID2 H0_VID3 H0_VID4
H1_VID0 H1_VID1 H1_VID2 H1_VID3 H1_VID4
36
6,41
6,41
6,41
6,41
6,41
6,41
6,41
6,41
6,41
6,41
12
VRM_VID0 VRM_VID1 VRM_VID2 VRM_VID3 VRM_VID4
8,41
8,41
8,41
8,41
8,41
Core VRMs
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
8 OF 63
Page 9
VCORE
LM_X04--83008 sub for p/n consolidation SUB*_83008
LM_X04--83XMY sub for p/n consolidation
+3.3V
B D
CA
ITP_TDI_H0
12-5-2003_10:50
ROOMS COMPLETE
1
1 2
1 2
0.1uF 16V
6
6
H_BPM4
6
H_BPM5
6
5,9,11
H_RST
CK_100M_ITP
4
CK_100M_ITP
4
1uF
10V-10%
H_BPM02 H_BPM13
21
RB257
40.2-1%
1 2
RB270
40.2-1%
1 2
RB265
40.2-1%
1 2
ITP PORT
RB256
1 2
40.2-1%
ITP
1 3 4 5 6 7 8
9 11 12 13 14 15 16 17 18 19 21 22 23 25
K
2MM SMT
KEY 26
40.2-1%
(BPM5DR#)
2
10
20
24 26
NP*
RB424
1 2
RB449
1 2
150-1%
1 2
ITP_PWR
150-1%
40.2-1%
SUB*_83XMY
21
RB269
1 2
27-5%
1 2
1.5K-5%
0.1uF 16V
21
R424
1 2
220
NP*
NP*
75-1%
ITP_DBA
ITP_DBR
ITP_TDI_H0
ITP_TDO_H1
NC_ITP_26_KEY
RB264
1 2
ITP_TMS ITP_TRST ITP_TCK
150-1%
6
6
6
6,9
1.5K-5%
1 2
SUB*_83XMY
11 10
U40
6
ROOM=ITP
CMIC_SRESET
VCORE
1 2 3
POP9
150-1%
1 2
ITP_TDI_H1 ITP_TDO_H0 ITP_TDO_H1
11,60
6
6
6,9
FOR JTDO:
Install 1-2 for TWO processor system Install 2-3 for UNI processor system
1
(UNI-PROCESSOR IS WITH PROC_1 INSTALLED ONLY!)
PROC_1 PROC_2
ITP_TDO_H0
ITP_TDI_H1
TDITDI
JTDO
1
2 3
2
Jaguar 2.0 Change: Pop Debug Connector - only for prototype builds!
Route ITP_TCK from pin 16 star to both processors and then from H0 back to pin 17. Match length on all 3 segments
TDO
ITP_TD0_H1
TDO
2
ITP ROUTING DRAWING
H0_THERMTRIP
5,6
RB420
2.7K-5%
VCORE
+3.3V
21
3
2
1K-1%
H0_THERMTRIP_3V
51
H1_THERMTRIP
5,6
RB384
1 2
2.7K-5%
RB433
1
21
+3.3V
RB445
RB393
1
1K-1%
1 2
H1_THERMTRIP_3V
3
2
51
H0_PROCHOT
6
1 2
56.2-1%
RB450
2.7K-5%
21
+3.3V
21
RB464
1
1K-1%
H0_PROCHOT_3V
3
2
51
H1_PROCHOT
6
VCORE
21
RB432
56.2-1%
RB426
1 2
2.7K-5%
+3.3V
+3.3V
RB429
1
1K-1%
1 2
H1_PROCHOT_3V
3
2
51
5
H_FERR
2.7K-5%
+3.3V
21
Q19
1
3
2
1K-1%
CSB_FERR_3V
1 2
2.7K-5%
RB394
Q20
1
21
1K-1%
1 2
CSB_FERR_3V
3
2
39
3
5
H0_IERR
RB451
1 2
2.7K-5%
1
51-54,59,60
GPE_IERR1
3
2
39
5
H1_IERR
RB389
2.7K-5%
1
21
3
2
GPE_IERR2
39
5,9,11
H_RST
Jaguar 2.0 - X02: Added processor reset to CPLD for proper ThermTrip Operation
P3V3AUX_DIRECT
RB1033
1 2
2.7K-5%
1
R1101
1 2
3
2
1K-1%
H_RST_3V
51
5,6
H_MCERR
VCORE
21
RB399
150-1%
RB392
1 2
2.7K-5%
QB1
1
3
GPE_MCERR
3
2
39
KLM_X03 -- ADDED R2600 ABOVE
INVERTING LEVEL TRANSLATION
4 4
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
DC
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
9 OF 63
Page 10
B D
CA
12-5-2003_10:50
HOST
BUS
REMC
HETERO 1 OF 6
D0 D1 D2 D3 D4 D5 D6 D7 D8
D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63
DINV0 DINV1 DINV2 DINV3
MA8 MA9
CSTRB4 CSTRB5 CSTRB6 CSTRB7
AH7 AJ5 AH9 AJ8 AK5 AH10 AK8 AK6 AJ7 AK9 AJ11 AK11 AK12 AJ10 AH13 AK14 AF5 AG5 AG6 AE6 AF7 AE7 AF8 AG8 AG12 AG11 AF10 AE9 AF11 AE10 AE12 AE13 AH16 AK15 AH15 AK18 AJ14 AK17 AH19 AH18 AK20 AJ19 AK21 AH21 AJ22 AH22 AK23 AJ23 AF16 AF14 AE15 AF17 AE16 AG18 AE18 AF19 AG21 AE21 AF22 AG23 AF23 AF20 AE19 AE22
AH6 AG9 AJ20 AG20
B2
A17 D16 E16 B17 A16 B16 F16 H15 C15
D8 E7 F2 L2
CMIC_INIT
RCSTRB4 RCSTRB5 RCSTRB6 RCSTRB7
H_DBI0 H_DBI1 H_DBI2 H_DBI3
1 2
1K-5%
10
10
10
10
10
10
10
10
10
10
10
10
10
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
6
6
6
6
44
+2.5V
15
15
15
MECB_SDOE
14
NC_RN235_1
NC_RN235_2
13
MECA_CMD0
13
13
MECA_CMD2
13
MECA_CMD3
13
MECA_CMD4
13
MECA_CMD5
13
MECA_CMD6
13
MECA_CMD7
13
MECA_CMD8
13
MECA_CMD9
13
MECA_CMD10
13
MECA_CMD11
13
MECA_CMD12
13
MECA_CMD13
13
MECA_CMD14
13
MECA_CMD15
13
MECA_CMD16
13
13
MECA_CMD18
13
MECA_CMD19
13
MECA_CMD20
13
MECA_CMD21
13
MECA_CMD22
13
MECA_CMD23
13
MECA_CMD24
13
MECA_CMD25
13
MECA_CMD26
13
MECA_CMD27
13
MECA_CMD28
13
MECA_CMD29
13
MECA_CMD30
13
MECA_CMD31
13
MECA_CMD32
13
MECA_CMD33
13
MECA_CMD34
13
MECA_CMD35
13
MECA_CMD36
13
MECA_CMD37
13
MECA_CMD38
13
MECA_CMD39
13
MECA_CMD40
13
MECA_CMD41
13
MECA_CMD42
13
MECA_CMD43
13
MECA_CMD44
13
MECA_CMD45
13
13
13
MECA_CMD48
13
MECA_CMD49
13
MECA_CMD50
13
MECA_CMD51
13
MECA_CMD52
13
13
MECA_CMD54
13
13
MECA_CMD56
13
MECA_CMD57
13
MECA_CMD58
13
MECA_CMD59
13
MECA_CMD60
13
MECA_CMD61
13
MECA_CMD62
13
14
MECB_CMD64
14
MECB_CMD65
14
MECB_CMD66
14
MECB_CMD67
14
MECB_CMD68
14
MECB_CMD69
14
MECB_CMD70
14
MECB_CMD71
14
MECB_CMD72
13
13
MECA_RCMD1
13
MECA_RCMD2
13
MECA_RCMD3
14
MECB_RCMD0
14
MECB_RCMD1
14
14
MECB_RCMD3
AP_MEMPAR
15
AP_RAS
15
MECA_SDOE
13
AP_CKE
15
NC_RN148_1
AP_ECS1_1
AP_ECS0_2
AP_ECS1_0
RNB10
1 8
39 OHM-5%
1 8
39 OHM-5%
1 8
43-5%
2 7
43-5%
39 OHM-5%
39 OHM-5%
2 7
43-5%
2 7
43-5%
3 6
43-5%
RN104
3 6
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
1 2
39 OHM-5% 39 OHM-5%
10-5%
NC_RN235_8
NC_RN235_7
81
81
RAECS1_1
RAECS1_0
RN100
1 8
RNB31
81
2 7
39 OHM-5%
3 6
39 OHM-5%
1 8
39 OHM-5%
RNB16MECA_CMD17
54
RN104
2 7
39 OHM-5%
RNB16
72
RNB13
81
4 5
39 OHM-5%
2 7
39 OHM-5%
81
3 6
72
3 6
39 OHM-5%
54
1 8
39 OHM-5%
63
4 5
RB206
39-5%
RB207
1 2
39-5%
63
8 1
RNB11
3 6
10-5%
2 7
RB194
1 2
10-5%
RB208
21
10-5%
21
RBSDOE
NC_RN155_8NC_RN155_1
NC_RN151_8NC_RN151_1
NC_RN148_8
RAECS0_2
RN104
1 8
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
4 5
39 OHM-5%
2 7
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
8 1
10-5%
RASDOE
RN103
RN103
1 8
RN104
4 5
RN100
RN100
3 6
RNB13
3 6
81
3 6
RN75MECA_RCMD0
4 5
10-5%
1 8
10-5%
RN75MECB_RCMD2
2 7
10-5%
4 5
43-5%
10
10
10
RNB31
39 OHM-5%
72
39 OHM-5%
39 OHM-5%
63
4 5
39 OHM-5%
2 7
39 OHM-5%
72
3 6
39 OHM-5%
54
2 7
39 OHM-5%
72
1 8
39 OHM-5%
63
39 OHM-5%
39 OHM-5%
63
2 7
39 OHM-5%
39 OHM-5%
81
1 8
39 OHM-5%
63
39 OHM-5%
72
2 7
39 OHM-5%
3 6
39 OHM-5%
72
39 OHM-5%
39 OHM-5%
2 7
39 OHM-5%
RNB6 RCMD58
39 OHM-5%
63
39 OHM-5%
72
RNB10
4 5
39 OHM-5%
63
39 OHM-5%
3 6
39 OHM-5%
36
43-5%
10
63
RN103
63
81
RN103
RNB31
RNB16
RNB13
81
RNB16
72
72
54
81
81
54
54
54
RNB10
4 5
10-5%
3 6
10-5%
1 8
10-5%
DELAY_RULE=:::2000
RARCMD0 RARCMD1 RARCMD2 RARCMD3
RBRCMD0 RBRCMD1 RBRCMD2 RBRCMD3
RAMEMPAS
NC_BMEMPAR
RARAS NC_BRAS
RBSDOE
10
RACKE NC_BCKE
15
RCMD0 RCMD1MECA_CMD1 RCMD2 RCMD3 RCMD4 RCMD5 RCMD6 RCMD7 RCMD8 RCMD9 RCMD10 RCMD11 RCMD12 RCMD13 RCMD14 RCMD15 RCMD16 RCMD17 RCMD18 RCMD19 RCMD20 RCMD21 RCMD22 RCMD23 RCMD24 RCMD25 RCMD26 RCMD27 RCMD28 RCMD29 RCMD30 RCMD31 RCMD32 RCMD33 RCMD34 RCMD35 RCMD36 RCMD37 RCMD38 RCMD39 RCMD40 RCMD41 RCMD42 RCMD43 RCMD44 RCMD45 RCMD46MECA_CMD46 RCMD47MECA_CMD47 RCMD48 RCMD49 RCMD50 RCMD51 RCMD52 RCMD53MECA_CMD53 RCMD54 RCMD55MECA_CMD55 RCMD56 RCMD57
RCMD59 RCMD60 RCMD61 RCMD62 RCMD63MECA_CMD63 RCMD64 RCMD65 RCMD66 RCMD67 RCMD68 RCMD69 RCMD70 RCMD71 RCMD72
AP_ECS0_0
L24 M23 K25 H27 G30 G29 J26 G28 E30 C30 B30 F29 D29 K23 J24 F27 H25 G26 J23 D27 E28 K22 F26 C28 G25 F25 G23 E27 H23 D28 F24 E26 E23 D24 A27 B26 C25 B25 D23 F21 D22 C23 H19 B24 E21 A24 F20 G19 C22 B22 H18 A23 E20 C21 B21 A21 D20 E19 B20 A20 F18 C19 D19 G17
C9
D10
B8 B6 A7
C7 H11 G11 F10
C11 F13 G13 B12
E13 A11 D12 J21
D15 E15
D11 E12 F12 E11
B9
A8
CMD0_0 CMD0_1 CMD0_2 CMD0_3 CMD0_4 CMD0_5 CMD0_6 CMD0_7 CMD0_8 CMD0_9 CMD0_10 CMD0_11 CMD0_12 CMD0_13 CMD0_14 CMD0_15 CMD1_0 CMD1_1 CMD1_2 CMD1_3 CMD1_4 CMD1_5 CMD1_6 CMD1_7 CMD1_8 CMD1_9 CMD1_10 CMD1_11 CMD1_12 CMD1_13 CMD1_14 CMD1_15 CMD2_0 CMD2_1 CMD2_2 CMD2_3 CMD2_4 CMD2_5 CMD2_6 CMD2_7 CMD2_8 CMD2_9 CMD2_10 CMD2_11 CMD2_12 CMD2_13 CMD2_14 CMD2_15 CMD3_0 CMD3_1 CMD3_2 CMD3_3 CMD3_4 CMD3_5 CMD3_6
REMC
CMD4_9 CMD4_10 CMD4_11 CMD4_12 CMD4_13 CMD4_14 CMD4_15
CMD5_0
CMD5_1
CMD5_2
CMD5_3
CMD5_4
CMD5_5
CMD5_6
CMD5_7
CMD5_8
CMD5_9 CMD5_10 CMD5_11 CMD5_12 CMD5_13 CMD5_14 CMD5_15
CMD6_0
CMD6_1
CMD6_2
CMD6_3
CMD6_4
CMD6_5
CMD6_6
CMD6_7
CMD6_8
CMD6_9 CMD6_10 CMD6_11 CMD6_12 CMD6_13 CMD6_14 CMD6_15
CMD7_0
CMD7_1
CMD7_2
CMD7_3
CMD7_4
CMD7_5
CMD7_6
CMD7_7
CMD7_8
CMD7_9 CMD7_10 CMD7_11 CMD7_12 CMD7_13 CMD7_14 CMD7_15
CMD3_7 CMD3_8 CMD3_9 CMD3_10 CMD3_11 CMD3_12 CMD3_13 CMD3_14 CMD3_15 CMD4_0 CMD4_1 CMD4_2 CMD4_3 CMD4_4 CMD4_5 CMD4_6 CMD4_7 CMD4_8
ARCMD0 ARCMD1 ARCMD2 ARCMD3
BRCMD0 BRCMD1 BRCMD2 BRCMD3
AMEMPAR BMEMPAR
MECC10
MECC11
MECC12
MECC13
MECC14
MECC15
AECS0_0 AECS0_1 AECS0_2 AECS1_0 AECS1_1 AECS1_2
BECS0_0 BECS0_1 BECS0_2 BECS1_0 BECS1_1 BECS1_2
ASDOE BSDOE ACKE BCKE
SERVERWORKS GCHE "CMIC" - REV 1.1
HETERO 3 OF 6
RNB14
NC_RN157_4 NC_RN157_5
4 5
39 OHM-5%
RNB12
NC_RN128_1
1 8
39 OHM-5%
RCSTRB0
10
RCSTRB1
10
RCSTRB2
10
RCSTRB3
10
RCSTRB4
10
RCSTRB5
10
RCSTRB6
10
RCSTRB7
10
1 8
RAECS0_0
43-5%
MECC0 MECC1 MECC2 MECC3 MECC4 MECC5 MECC6 MECC7 MECC8 MECC9
AWE BWE
NC_RN128_8
RB203
RB199
1 2
10
A5 D7 E9 F9 J11 G10 E8 H10 C6 B5 C5 D6 G9 F8 D4 A4 B4 G7 A3 H9 F6 D3 E5 G3 E1 H5 K6 L7 J5 H4 F1 H2 J4 M8 G2 L6 H1 J3 N9 K4 M6 J1 N8 L5 N7 K3 K2 L1 M5 L3 P7 M4 N5 P8 P6
K8 D2 C1 B1 K7 F4 G5 J7 E24 D25 G22 A29 G21 H20 F22 A28
G15 C14 G14 B14 A15 F14
H14 A13 D14 C13 A12 B13
B10 A9 C10 H12
15
15
39 OHM-5%
RCMD73 RCMD74 RCMD75 RCMD76 RCMD77 RCMD78 RCMD79 RCMD80 RCMD81 RCMD82 RCMD83 RCMD84 RCMD85 RCMD86 RCMD87 RCMD88 RCMD89 RCMD90
39 OHM-5%
4 5
39 OHM-5% 39 OHM-5%
5 4
1 8
39 OHM-5%
39 OHM-5%
18
72
RN82 MECB_CMD78
45
39-5%
2 7
39 OHM-5%
54
39 OHM-5%
RNB15
3 6
39 OHM-5%
3 6
39 OHM-5%
1 8
39 OHM-5% RN101
72
39 OHM-5%
2 7
39 OHM-5%
RNB28
63
39 OHM-5%
RN105
54
39 OHM-5%
RNB28
72
39 OHM-5%
63
39 OHM-5%
RN102
1 8
RNB11
39 OHM-5%
1 2
39-5%
2 7
39 OHM-5% 39 OHM-5%
7 2
RNB11
4 5
39 OHM-5%
1 2
39-5%
21
RNB14
1 8
39 OHM-5%
RNB11
3 6
39 OHM-5%
3 6
39 OHM-5%
1 8
39 OHM-5%
RN101
3 6
39 OHM-5%
RN101
4 5
39 OHM-5%
4 5
39 OHM-5%
2 7
39 OHM-5%
4 5
39 OHM-5%
RN105
3 6
39 OHM-5%
RN105
39 OHM-5%
RN102
4 5
39 OHM-5%
72
81
39 OHM-5%
27
RNB10
3 6
39 OHM-5% 39 OHM-5%
27
39 OHM-5%
8 1
39 OHM-5%
6 3
RNB12
3 6
39 OHM-5%
RNB12
4 5
39 OHM-5%
2 7
39 OHM-5%
RNB15
72
39 OHM-5%
81
39 OHM-5%
63
39 OHM-5%
RNB15
4 5
39 OHM-5%
RNB28
4 5
39 OHM-5%
RN101
1 8
39 OHM-5%
RNB28
1 8
39 OHM-5%
RN105 MECB_CMD119
2 7
39 OHM-5%
RN102
2 7
39 OHM-5%
RN102
63
39 OHM-5%
MECB_CMD73 MECB_CMD74 MECB_CMD75 MECB_CMD76 MECB_CMD77
MECB_CMD79 MECB_CMD80 MECB_CMD81 MECB_CMD82 MECB_CMD83 MECB_CMD84 MECB_CMD85 MECB_CMD86 MECB_CMD87 MECB_CMD88 MECB_CMD89 MECB_CMD90 MECB_CMD91 MECB_CMD92 MECB_CMD93 MECB_CMD94 MECB_CMD95 MECB_CMD96 MECB_CMD97 MECB_CMD98
MECB_CMD99 MECB_CMD100 MECB_CMD101 MECB_CMD102 MECB_CMD103 MECB_CMD104 MECB_CMD105 MECB_CMD106
MECB_CMD108 MECB_CMD109 MECB_CMD110 MECB_CMD111 MECB_CMD112 MECB_CMD113 MECB_CMD114 MECB_CMD115 MECB_CMD116 MECB_CMD117 MECB_CMD118
MECB_CMD120 MECB_CMD121 MECB_CMD122 MECB_CMD123 MECB_CMD124 MECB_CMD125 MECB_CMD126 MECB_CMD127
39 OHM-5%
RNB14 RMECC0 RMECC1 RMECC2 RMECC3 RMECC4 RMECC5 RMECC6 RMECC7 RMECC8 RMECC9 RMECC10 RMECC11 RMECC12 RMECC13 RMECC14 RMECC15
39 OHM-5%
4 5
39 OHM-5%
54
39 OHM-5% 39 OHM-5%
45
39 OHM-5%
5 4
RN100
39 OHM-5%
5 4
72
1 8
39 OHM-5%
RNB15
1 8
39 OHM-5%
RNB14
3 6
39 OHM-5% 39 OHM-5%
5 4
39 OHM-5%
5 4
RNB31
63
39 OHM-5%
RNB12
72
39 OHM-5% 39 OHM-5%
36
39 OHM-5%
5 4
RNB13
5 4
39 OHM-5%
MECB_MECC0 MECB_MECC1 MECB_MECC2 MECB_MECC3 MECB_MECC4 MECB_MECC5 MECB_MECC6 MECB_MECC7 MECA_MECC8 MECA_MECC9 MECA_MECC10 MECA_MECC11 MECA_MECC12 MECA_MECC13 MECA_MECC14 MECA_MECC15
RAECS0_0 RAECS0_1 RAECS0_2 RAECS1_0 RAECS1_1 RAECS1_2
10
10
10
10
10
10
NC_BECS0_0 NC_BECS0_1 NC_BECS0_2 NC_BECS1_0 NC_BECS1_1 NC_BECS1_2
RACAS NC_BCAS
NC_BWE
4 5
43-5% RAWE
43-5%
18
AP_CAS
AP_WE
15
15
RB220
1 2
21
1 2
RB230
15
RB209
15
RB226
1 2
21
21
15
RB205
15
RB215
21
15
MECA_CSTRB0 MECA_CSTRB1 MECA_CSTRB2 MECA_CSTRB3 MECB_CSTRB4 MECB_CSTRB5 MECB_CSTRB6 MECB_CSTRB7
13
13
13
13
14
14
14
14
15
KLM_X04 -- CHANGED TO 15 OHM FOR C-STROBES
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
13
13
13
13
13
13
13
13
A14
GND_1
A2
GND_2
A22
GND_3
A30
GND_4
A6
GND_5
AA6 AB1
AB9
AC8
AD3 AD6 AD9
AE2
AE5 AE8
AG4 AG7
AJ1
AJ6 AJ9
AK4 B11 B19 C16 C24 C27
C4
C8 D13 D21 D30 E10 E18
E2 E25 F15 F23 F28
F7 G12 G20
G4 H17 H26 H30
H7 J10 J12 J14 J16 J18
J2 J20
J9 K10 K12
GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 GND_82 GND_83 GND_84 GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 GND_91 GND_92 GND_93 GND_94 GND_95 GND_96 GND_97 GND_98 GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105
SERVERWORKS GCHE "CMIC" - REV 1.1
HETERO 6 OF 6
DDRRESERVE TTLRESERVE1 TTLRESERVE2 GTLRESERVE1 GTLRESERVE2 GTLRESERVE3
TITLE
GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169 GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189 GND_190 GND_191 GND_192 GND_193 GND_194 GND_195 GND_196 GND_197 GND_198 GND_199 GND_200 GND_201
NC1 NC2 NC3
K14 K16 K18 K20 K24 K28 K5 K9 L11 L13 L15 L17 L19 L21 L22 L8 M10 M12 M14 M16 M18 M20 M26 M3 M30 M9 N11 N13 N15 N17 N19 N21 N22 N6 P1 P10 P12 P14 P16 P18 P20 P24 P28 P9 R11 R13 R15 R17 R19 R21 R22 R4 T10 T12 T14 T16 T18 T20 T26 T7 T9 U11 U13 U15 U17 U19 U2 U21 U22 U29 V10 V12 V14 V16 V18 V24 V5 V9 W11 W13 W15 W17 W19 W22 W27 W8 Y10 Y12 Y14 Y16 Y18 Y20 Y24 Y3 Y9 AC15
C29 C2 G6 AH4 AJ4 AD5 AC20 J19 W9
SKEW_IMB OBSRV_BINIT_EN BIST_EN GTL_RESERVED_AH4 GTL_RESERVED_AJ4 NC_GTL_RESERVED_AD5 NC_CMIC_RESERVED_AC20 NC_CMIC_RESERVED_J19 NC_CMIC_RESERVED_W9
COMPUTER CORPORATION
AUSTIN,TEXAS
+2.5V
21
RB294
11
11
11
RB293
2.7K-5%
1 2
RB300
2.7K-5%
220
1 2
NP*
1
2
3
1
2
3
15
15
15
15
15
15
15
15
ROOM=CMIC
AP_MA7
AP_MA6
AP_MA4
AP_MA3
15
AP_MA16
15
AP_MA5
15
AP_MA14
15
AP_MA8
15
AP_MA15
15
AP_MA11
15
AP_MA12
15
AP_MA13
15
AP_MA1
AP_MA0
AP_MA2
AP_MA10
AP_MA9
3 6
43-5%
2 7
43-5%
4 5
43-5%
1 8
43-5%
4 5
43-5%
3 6
43-5%
1 8
43-5%
4 5
43-5%
2 7
43-5%
4 5
43-5%
3 6
43-5%
1 8
43-5%
2 7
43-5%
3 6
43-5%
2 7
43-5%
1 8
43-5%
RB214
1 2
43 OHM
5%
RMA16
RMA14
RMA15
RMA11
RMA12
RMA13
RMA10
10
10
10
SUB*_08DFE
10
10
10
10
10
10
10
10
10
10
10
10
10
5
10
08DFE IS 43.2 1%
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
H_ADS
H_ADSTB0 H_ADSTB1
H_AP0 H_AP1
H_BPRI H_BREQ0 H_BINIT H_BNR
H_DRDY H_DBSY H_DEFER H_HIT H_HITM H_LOCK
H_RS0 H_RS1 H_RS2
H_RSP
H_REQ0 H_REQ1 H_REQ2 H_REQ3 H_REQ4
H_TRDY
H_DP0 H_DP1 H_DP2 H_DP3
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
10
10
10
10
10
10
10
10
10
10
10
10
RCSTRB0 RCSTRB1 RCSTRB2 RCSTRB3
Y25
W30 AE30 AA27
Y30
Y23
W29 AB29
Y26
Y29
Y27
C18
B18
D18
A19
C17
H16
F17
E17
F30
H24
A25
G18
ADS
A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35
AD_STB0 AD_STB1
AP0 AP1
RS0 RS1 RS2
RSP
DP0 DP1 DP2 DP3
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7
CSTRB0 CSTRB1 CSTRB2 CSTRB3
SERVERWORKS GCHE "CMIC" REV 1.1
SUB=SUB*_867VX ADD=ADD*_724YF_U118
WILL NEED HEATSINK FOR CMIC
LM_X04--9C725 changed to 724YF at Celestica's request
HEATSINK W/ LOCTITE384 P#724YF
I2C FOR CMIC IS C0h
867VX IS CMIC REV A2.0 CURRENTLY
REV 1.0 -- NEC UPD84916S8-011 REV 1.1 -- NEC UPD84916S8-012 REV 2.0 -- NEC UPD84919S8-011 REV 2.1 -- NEC UPD?????????????
** DO NOT CHANGE RESISTOR VALUES TO MATCH
4 4
SERVERWORKS SCHEMATIC!! IT IS WRONG! **
** FOLLOW LAYOUT GUIDELINES ONLY! **
A B
15
AP_ECS1_2
15
AP_ECS0_1
4 5
43-5%
3 6
43-5%
RAECS0_1
RAECS1_2
10
10
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
DC
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
10 OF 63
Page 11
B D
CA
12-5-2003_10:50
+2.5V
+2.5V +2.5V+2.5V+2.5V+2.5V+2.5V
+2.5V
VDD_78 VDD_79 VDD_80 VDD_81 VDD_82 VDD_83 VDD_84 VDD_85 VDD_86 VDD_87
P11 P13 P15 P17 P19 P21 P5 R10 R12 R14
A_IMB_DN_BRKOUT_CLK
11
LOOP_SNGL_A_IMB_DN_CLK
21
NP*
1 2
21
A_IMB_DN_CLK
17
1
11
IOQ_DEPTH
1 2
NP*
2.7K-5%
11
COMP_IMB
21
NP*
21
2.7K-5%
11
CMIC_DEFER_EN
1 2
2.7K-5%
CMIC_PLL_EN
11
21
NP*
21
2.7K-5%
OBSRV_BINIT
11
1 2
NP*
2.7K-5%
11
EN_BIST
21
21
2.7K-5%
SKEW_IMB_STRAP
11
1 2
2.7K-5% 1 2
CB360
1000pF
50V-10%
4V-20%
820uF
A10
VDD_1
A18
VDD_2
+
21
A26 AA10 AA12 AA14 AA16 AA18
AA2 AA20
VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10
1
1 2
21
1 2
1 2
39-5%
1 2
39-5%
.01uF 50V
1uF
10V-10%
39-5%
NP*
1 2
39-5%
NP*
1 2
39-5%
CB213
21
.01uF 50V
CB460
1 2
1 2
.01uF 50V
.01uF 50V
1 2
ROOM=CMIC
9,11,60
21
1K-5%
2
220
3
SUB*_9655T
LM_X04--9655T sub for p/n consolidation
39
39
39
39
39
39
39
21
1 2
150-5%
R378
R384
75
SUB*_9655T
CSB_IMB_UP_CLK CSB_IMB_UP_CON CSB_IMB_UP_PAR CSB_IMB_UP_D0 CSB_IMB_UP_D1 CSB_IMB_UP_D2 CSB_IMB_UP_D3
75
21
13-15,17,30,39,60
150-5%
R342
21
1 2
R351
75
SUB*_9655T
39,51,55
15,17,30,53
1K-5%
1 2
CMIC_SRESET
11
11
11
11
11
11
SKEW_IMB_STRAP
11
+2.5V
1 2
150-5%
R341
R340
21
SUB*_5470T
subbed to 150ohm
V7
GPE_CMIC_FATAL
ENV_SEG0_25V_SCL
4
4
CK_100M_CMIC CK_100M_CMIC
PU : IOQ DEPTH IS 1
PD : IOQ DEPTH IS 12 (default)
19
OEB
CMIC_PLL_EN CMIC_DEFER_EN COMP_IMB
2
A1
4
A2
6
A3
IOQ_DEPTH OBSRV_BINIT EN_BIST
11 13 15
B1 B2 B3
74VHC244
SUB=SUB*_3535R
A_IMB_UP_CLK
17
B_IMB_UP_CLK
30
A_IMB_UP_CON
17
B_IMB_UP_CON
30
A_IMB_UP_PAR
17
B_IMB_UP_PAR
30
A_IMB_UP_D0
17
A_IMB_UP_D1
17
A_IMB_UP_D2
17
A_IMB_UP_D3
17
A_IMB_UP_D4
17
A_IMB_UP_D5
17
A_IMB_UP_D6
17
A_IMB_UP_D7
17
A_IMB_UP_D8
17
A_IMB_UP_D9
17
A_IMB_UP_D10
17
A_IMB_UP_D11
17
A_IMB_UP_D12
17
A_IMB_UP_D13
17
A_IMB_UP_D14
17
A_IMB_UP_D15
17
B_IMB_UP_D0
30
B_IMB_UP_D1
30
B_IMB_UP_D2
30
B_IMB_UP_D3
30
B_IMB_UP_D4
30
B_IMB_UP_D5
30
B_IMB_UP_D6
30
B_IMB_UP_D7
30
B_IMB_UP_D8
30
B_IMB_UP_D9
30
B_IMB_UP_D10
30
B_IMB_UP_D11
30
B_IMB_UP_D12
30
B_IMB_UP_D13
30
B_IMB_UP_D14
30
B_IMB_UP_D15
30
SUB*_11ERE
V1
432
220
567
V2
100 Ohm 5%
1
RN81
8
subbed to 75ohm
V3
4
100
5
V5
V6
1
2
3
RN90
8
7
6
V4
PLLRST
1K-5%
1K-5%
1 2
NP*
PU : DEFER ENABLED (DEFAULT)
PD : DEFER IS DISABLED
PU : A_IMB IS COMPATIBILITY IMB
PD : THIN IMB IS COMPATIBILITY IMB (DEFAULT)
U88
VOEA
YA1 YA2 YA3 YA4A4 YB1 YB2 YB3 YB4B4
+2.5V
201
18
CMIC_FREEZE
16
CMIC_WARMRST
14
MEMOFF_CSB
128
MEMOFFACK
9
OBSRV_BINIT_EN
7
BIST_EN
5
SKEW_IMB
317
NC_CMIC_BUF_3
11
11
11,39
11
10,11
10,11
10,11
AK1 AD1
A_IMBCLK_R
W2 T8
B_IMBCLK_R
N27 T28
C_IMBCLK_R
AK2 AG1
A_IMBCON_R
AA1 U1
B_IMBCON_R
K30 P30
C_IMBCON_R
AK3 AG2
A_IMBPAR_R
Y2 U3
B_IMBPAR_R
L30 R30
C_IMBPAR_R
AA7
A_IMBD_R0
AA8
A_IMBD_R1
AB6
A_IMBD_R2
AB7
A_IMBD_R3
AB8
A_IMBD_R4
AC5
A_IMBD_R5
AC6
A_IMBD_R6
AC7
A_IMBD_R7
AD4
A_IMBD_R8
AE4
A_IMBD_R9
AE3
A_IMBD_R10
AF3
A_IMBD_R11
AG3
A_IMBD_R12
AH1
A_IMBD_R13
AH2
A_IMBD_R14
AJ3
A_IMBD_R15
U5
B_IMBD_R0
U7
B_IMBD_R1
U8
B_IMBD_R2
U9
B_IMBD_R3
V2
B_IMBD_R4
V3
B_IMBD_R5
V4
B_IMBD_R6
V6
B_IMBD_R7
V7
B_IMBD_R8
V8
B_IMBD_R9
W1
B_IMBD_R10
W3
B_IMBD_R11
W5
B_IMBD_R12
W6
B_IMBD_R13
W7
B_IMBD_R14
Y1
B_IMBD_R15
R24
C_IMBD_R0
R25
C_IMBD_R1
R26
C_IMBD_R2
P23
C_IMBD_R3
P25
C_IMBD_R4
P26
C_IMBD_R5
P27
C_IMBD_R6
P29
C_IMBD_R7
N26
C_IMBD_R8
N28
C_IMBD_R9
N30
C_IMBD_R10
M27
C_IMBD_R11
M28
C_IMBD_R12
M29
C_IMBD_R13
L28
C_IMBD_R14
L29
C_IMBD_R15
J30 H28
D_IMBCLK_R
K29 H29
D_IMBCON_R
K27 J28
D_IMBPAR_R
N23
D_IMBD_R0
N24
D_IMBD_R1
M25
D_IMBD_R2
L26
D_IMBD_R3
FATAL
J8 F5
SCK
W24
BCLKP
W25
BCLKN
IM
RAS
PLLRST
A_IMBCLK_T B_IMBCLK_T C_IMBCLK_T
A_IMBCON_T B_IMBCON_T C_IMBCON_T
A_IMBPAR_T B_IMBPAR_T C_IMBPAR_T
A_IMBD_TO A_IMBD_T1 A_IMBD_T2 A_IMBD_T3 A_IMBD_T4 A_IMBD_T5 A_IMBD_T6 A_IMBD_T7 A_IMBD_T8
A_IMBD_T9 A_IMBD_T10 A_IMBD_T11 A_IMBD_T12 A_IMBD_T13 A_IMBD_T14 A_IMBD_T15
B_IMBD_TO
B_IMBD_T1
B_IMBD_T2
B_IMBD_T3
B_IMBD_T4
B_IMBD_T5
B_IMBD_T6
B_IMBD_T7
B_IMBD_T8
B_IMBD_T9 B_IMBD_T10 B_IMBD_T11 B_IMBD_T12 B_IMBD_T13 B_IMBD_T14 B_IMBD_T15
C_IMBD_TO
C_IMBD_T1
C_IMBD_T2
C_IMBD_T3
C_IMBD_T4
C_IMBD_T5
C_IMBD_T6
C_IMBD_T7
C_IMBD_T8
C_IMBD_T9 C_IMBD_T10 C_IMBD_T11 C_IMBD_T12 C_IMBD_T13 C_IMBD_T14 C_IMBD_T15
D_IMBCLK_T D_IMBCON_T D_IMBPAR_T
D_IMBD_T0
D_IMBD_T1
D_IMBD_T2
D_IMBD_T3
ALERT
IMBVREF1 IMBVREF2
SERVERWORKS GCHE "CMIC" - REV 1.1
HETERO 2 OF 6
SDA
Y4 Y5 Y6 Y8 AA3 AA4 AA5 AB2 AB3 AB4 AC1 AC2 AC3 AD2 AE1 AF2
N1 P2 P3 P4 R1 R2 R3 R5 R6 R7 T1 T2 T4 T5 T6 U4
V29 V30 U23 U24 U26 U27 U28 U30 T22 T23 T24 T25 T27 T29 R28 R29
M24 L25 K26 J27
N4N3
P22 AA9V27
1K-5%
+2.5V
0.1uF 16V 1 2
R_A_IMB_DN_CLK R_B_IMB_DN_CLK
NC_C_IMBCLK_T
R_A_IMB_DN_CON R_B_IMB_DN_CON
NC_C_IBMSCON_T
R_A_IMB_DN_PAR R_B_IMB_DN_PAR
NC_C_IMBPAR_T
R_A_IMB_DN_D0 R_A_IMB_DN_D1 R_A_IMB_DN_D2 R_A_IMB_DN_D3 R_A_IMB_DN_D4 R_A_IMB_DN_D5 R_A_IMB_DN_D6 R_A_IMB_DN_D7 R_A_IMB_DN_D8 R_A_IMB_DN_D9 R_A_IMB_DN_D10 R_A_IMB_DN_D11 R_A_IMB_DN_D12 R_A_IMB_DN_D13 R_A_IMB_DN_D14 R_A_IMB_DN_D15
R_B_IMB_DN_D0 R_B_IMB_DN_D1 R_B_IMB_DN_D2 R_B_IMB_DN_D3 R_B_IMB_DN_D4 R_B_IMB_DN_D5 R_B_IMB_DN_D6 R_B_IMB_DN_D7 R_B_IMB_DN_D8 R_B_IMB_DN_D9 R_B_IMB_DN_D10 R_B_IMB_DN_D11 R_B_IMB_DN_D12 R_B_IMB_DN_D13 R_B_IMB_DN_D14 R_B_IMB_DN_D15
NC_CIMB_DN_D0 NC_CIMB_DN_D1 NC_CIMB_DN_D2 NC_CIMB_DN_D3 NC_CIMB_DN_D4 NC_CIMB_DN_D5 NC_CIMB_DN_D6 NC_CIMB_DN_D7 NC_CIMB_DN_D8 NC_CIMB_DN_D9 NC_CIMB_DN_D10 NC_CIMB_DN_D11 NC_CIMB_DN_D12 NC_CIMB_DN_D13 NC_CIMB_DN_D14 NC_CIMB_DN_D15
R_CSB_IMB_DN_CLK
R_CSB_IMB_DN_D0 R_CSB_IMB_DN_D1 R_CSB_IMB_DN_D2 R_CSB_IMB_DN_D3
GPE_CMIC_ALERT
ENV_SEG0_25V_SDA
CMIC_IMBVREF
RB173
1 2
1 2
PU : APLL DISABLED
PD : APLL IS ENABLED (DEFAULT)
0.1uF 16V
0.1uF 16V
1 2
0.1uF 16V
21
RB263
1 2
A_IMB_DN_BRKOUT_CLK
39-5%
39-5%
1 2
1 2
39-5%
1 2
RB244
1 2
39-5%
39-5%
RNB51
1 8
39 OHM-5%
RNB51
39 OHM-5%
RNB51
54
39 OHM-5%
RN108
3 6
39 OHM-5%
RN108
54
39 OHM-5%
RN108
39 OHM-5%
RNB58
72
39 OHM-5%
RNB58
3 6
39 OHM-5%
RN109
3 6
39 OHM-5%
RN109
4 5
39 OHM-5%
RN109
1 8
39 OHM-5%
RN106
54
39 OHM-5%
RN106
1 8
39 OHM-5%
RN106
3 6
39 OHM-5%
RNB42
3 6
39 OHM-5%
RNB42
72
39 OHM-5%
RNB42
1 8
39 OHM-5%
RN107
3 6
39 OHM-5%
RN107
39 OHM-5%
RNB47
1 8
39 OHM-5%
RNB47
3 6
39 OHM-5%
RNB47
72
39 OHM-5%
11
R_CSB_IMB_DN_CON R_CSB_IMB_DN_PAR
39,55
15,17,30,53
11
39 OHM-5%
+2.5V
1K-5%
PU : OBSERVE BINIT# (DEFAULT)
PD : IGNORE BINIT#
+2.5V
RB240
1 2
100-1%100-1%
LM_X04--83008 & 78020 sub for p/n consolidation
SUB*_83008
21
RB239
21
CB398
1 2
11
21
B_IMB_DN_BRKOUT_CLK
RB237
RB245
A_IMB_DN_CON B_IMB_DN_CON
39-5%
A_IMB_DN_PAR B_IMB_DN_PAR
A_IMB_DN_D0
72
39 OHM-5%
RNB51
3 6
A_IMB_DN_D1 A_IMB_DN_D2 A_IMB_DN_D3 A_IMB_DN_D4
39 OHM-5%
72
39 OHM-5%
RN108
1 8
RNB58
1 8
A_IMB_DN_D5 A_IMB_DN_D6 A_IMB_DN_D7 A_IMB_DN_D8 A_IMB_DN_D9 A_IMB_DN_D10
RNB58
54
39 OHM-5%
A_IMB_DN_D11 A_IMB_DN_D12 A_IMB_DN_D13
RN109
72
39 OHM-5%
A_IMB_DN_D14 A_IMB_DN_D15
B_IMB_DN_D0 B_IMB_DN_D1
RN106
72
39 OHM-5%
B_IMB_DN_D2 B_IMB_DN_D3 B_IMB_DN_D4
RNB42
54
39 OHM-5%
B_IMB_DN_D5 B_IMB_DN_D6 B_IMB_DN_D7
39 OHM-5%
72
39 OHM-5%
RN107
RN107
1 8
54
B_IMB_DN_D8 B_IMB_DN_D9 B_IMB_DN_D10 B_IMB_DN_D11 B_IMB_DN_D12 B_IMB_DN_D13
RNB47
54
39 OHM-5%
B_IMB_DN_D14 B_IMB_DN_D15
ROOM=CMIC
NC_RN152_6 NC_RN152_336
39 OHM-5%
NC_RN116_3NC_RN116_6 6 3
39 OHM-5%
27
4 5
39 OHM-5%
2 7
39 OHM-5%
18
39 OHM-5%
39 OHM-5%
39 OHM-5%
45
81
CSB_IMB_DN_D3
CSB_IMB_DN_PAR
1K-5%
NP*
PU : ENABLE BIST# (DEFAULT)
1uF
10V-10%
CSB_IMB_DN_CON
CSB_IMB_DN_D0
CSB_IMB_DN_D1
CSB_IMB_DN_D2
CB433
SUB*_78020
11
17
30
17
30
PD : DISABLE BIST#
.01UF
1 2
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
39
39
39
39
39
39
CB434
50V-20%
11
11
9,11,60
11,39
1 2
11
11
11
220pF
CMIC_AVDD CMIC_DVDD
1 2
NP*
21
CB393
50V-10%
220pF
VCORE
CMIC_FREEZE CMIC_SRESET MEMOFF_CSB MEMOFFACK CMIC_TESTMODE
1K-5%
PD : DATA LEADS CLOCK BY 1.25nS
PU : CLOCK & DATA IN PHASE (DEFAULT)
CMIC_IMBVREF
11
50V-10%
AC9
AD7
AF4 AF6 AF9
AH3 AH5 AH8 AJ2
AK7 Y21 Y28
VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8 VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25 VTT_26 VTT_27 VTT_28 VTT_29 VTT_30 VTT_31 VTT_32 VTT_33 VTT_34 VTT_35 VTT_36 VTT_37 VTT_38 VTT_39 VTT_40 VTT_41 VTT_42 VTT_43 VTT_44 VTT_45 VTT_46 VTT_47 VTT_48 VTT_49 VTT_50 VTT_51 VTT_52 VTT_53
AVDD AGND DVDD
RESET & TEST
E4
FREEZE
V26
SRESET
H8
MEMOFF
C3
MEMOFFACK
V23
TESTMODE
SERVERWORKS GCHE "CMIC" - REV 1.1
HETERO 4 OF 6
ICOMP
DCOMP
GCOMP0 GCOMP1 GCOMP2
MSTRB0 MSTRB1 MSTRB2 MSTRB3
DSTBN0 DSTBN1 DSTBN2 DSTBN3
DSTBP0 DSTBP1 DSTBP2 DSTBP3
VREFDDR1 VREFDDR2 VREFDDR3 VREFDDR4 VREFDDR5
GTLVREF1 GTLVREF2 GTLVREF3
CPURST
DLYRESET
WARMRST
PCIRST
0.1uF 16V CB369
1 2
.01uF 50V
CB399
1 2
.01uF 50V
1 2
LM_X04--83008 sub for p/n consolidation
.01uF 50V
CB384
10V-10%
1uF
SUB*_83008
1 2
1 2
0.1uF 16V
CB380
CB362
LM_X06--SWC said to change ICOMP and DCOMP resistors from 75 ohms to 250 ohms and GCOMP0 from 249 ohms to 100 ohms
RB204
H22
B28
W28 W26 AD8
E3 H6 B27 C26
J13
CMIC_ICOMP
CMIC_DCOMP
CMIC_GCOMP0 CMIC_GCOMP1 CMIC_GCOMP2
RMSTRB0 RMSTRB1 RMSTRB2 RMSTRB3
H_DSTBN0 H_DSTBN1 H_DSTBN2 H_DSTBN3
H_DSTBP0 H_DSTBP1 H_DSTBP2 H_DSTBP3
VREF_CMIC
RB200
39-5% RB211
1 2
39-5%
5
5
5
5
5
5
5
5
1 2
249 Ohm-1%
1 2
100-1%
21
RB213
1 2
39-5%
RB212
1 2
249 Ohm-1%
1 2
20.5 Ohm-1%
Jaguar H3007 - X00: Changed R433 on GCOMP1
J17 L9 M22 R9
V22 Y22 AC10
V21V20
CMIC_GTLVREF1 CMIC_GTLVREF2 CMIC_GTLVREF3
CMIC_AGND
11
11
11
11
W21W20
H_RST CMIC_DLYRST
CMIC_WARMRST
5,9
41
11
M1
CMIC_PCIRST
59
+2.5V
0.1uF 16V
21
0.1uF 16V
1 2
0.1uF 16V
21
0.1uF 16V
1 2
21
0.1uF 16V
CB286
.01uF 50V
10V-10%
1uF
21
1 2
CB390
CB401
CB394
SUB*_83008
10V-10%
1uF
1 2
10V-10%
CB376
0.1uF 16V
.01uF 50V
1uF
21
SUB*_83008
+2.5V
SUB*_83008
VCORE
RB290
21
249 Ohm-1%
SUB=SUB*_20JDN MECB_MSTRB0 MECB_MSTRB1
RB210
39-5%
MECA_MSTRB2
21
MECA_MSTRB3
from 249 to 332 ohm (P/N 20JDN) to avoid FSB parity errors, per SW
ROOM=CMIC
+2.5V
21
CB389
RB235
RB233
0.1uF 16V
1 2
1 2
100-1%100-1%
21
1uF
CB379
SUB*_83008
AB5 AC4 AF1
CB402
B15 B23
21
B29
C12 C20
D17 D26
CB400
1 2
E14 E22 E29
F11 F19
G16 G24 G27
CB416
21
H13 H21
J15 J22 J25 J29
K11 K13 K15 K17 K19 K21 L10 L12 L14 L16 L18 L20 L23 L27
M11 M13 M15
14
14
13
13
M17 M19 M21
N10 N12 N14 N16 N18
N20 N25 N29
21
220pF
CB374
10V-10%
LM_X04--83008 sub for p/n consolidation
CB375
50V-10%
1 2
220pF
50V-10%
CB391
VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16
B3
VDD_17
B7
VDD_18 VDD_19 VDD_20
D1
VDD_21 VDD_22 VDD_23
D5
VDD_24
D9
VDD_25 VDD_26 VDD_27 VDD_28
E6
VDD_29 VDD_30 VDD_31
F3
VDD_32
G1
VDD_33 VDD_34 VDD_35 VDD_36
G8
VDD_37 VDD_38 VDD_39
H3
VDD_40 VDD_41 VDD_42 VDD_43 VDD_44
J6
VDD_45
K1
VDD_46 VDD_47 VDD_48 VDD_49 VDD_50 VDD_51 VDD_52 VDD_53 VDD_54 VDD_55 VDD_56 VDD_57 VDD_58 VDD_59 VDD_60
L4
VDD_61 VDD_62 VDD_63 VDD_64 VDD_65 VDD_66 VDD_67
M7
VDD_68 VDD_69 VDD_70 VDD_71 VDD_72 VDD_73
N2
VDD_74 VDD_75 VDD_76 VDD_77
SERVERWORKS GCHE "CMIC" - REV 1.1
HETERO 5 OF 6
21
1 2
0.1uF 16V
CB370
0.1uF 16V
1 2
CB373
CB385
0.1uF 16V
VDD_88 VDD_89 VDD_90 VDD_91 VDD_92 VDD_93 VDD_94 VDD_95 VDD_96 VDD_97 VDD_98
VDD_99 VDD_100 VDD_101 VDD_102 VDD_103 VDD_104 VDD_105 VDD_106 VDD_107 VDD_108 VDD_109 VDD_110 VDD_111 VDD_112 VDD_113 VDD_114 VDD_115 VDD_116 VDD_117 VDD_118 VDD_119 VDD_120 VDD_121 VDD_122 VDD_123 VDD_124 VDD_125 VDD_126 VDD_127 VDD_128 VDD_129
21
R16 R18 R20 R23 R27 R8 T11 T13 T15 T17 T19 T21 T3 T30 U10 U12 U14 U16 U18 U20 U25 U6 V1 V11 V13 V15 V17 V19 V28 W10 W12 W14 W16 W18 W23 W4 Y11 Y13 Y15 Y17 Y19 Y7
0.1uF 16V
B_IMB_DN_BRKOUT_CLK
11
R_CSB_IMB_DN_CLK
11
SUB*_83008
NP*
LOOP_DBL_A_IMB_DN_CLK
LOOP_SNGL_B_IMB_DN_CLK
NP*
LOOP_DBL_B_IMB_DN_CLK
LOOP_SNGL_CSB_IMB_DN_CLK
NP*
LOOP_DBL_CSB_IMB_DN_CLK
CMIC_AGND
11
+2.5V
.01uF 50V
CB200
1 2
SUB*_83008
21
21
1uF
CB467
LM_X04--83008 sub for p/n consolidation
CB449
10V-10%
+2.5V
21
ROOM=CMIC
1K-5%
+2.5V
+2.5V
1K-5%
VCOREVCORE
4 4
11
21
220pF
50V-10%
RB288
1 2
RB289
1 2
49.9-1%
SUB*_83008
100-1%
CMIC_GTLVREF2
21
1uF
CB456
10V-10%
21
CB454
220pF
50V-10%
11
1 2
CB455
.01uF 50V
220pF
50V-10%
1 2
CB457
1 2
CB458
1000pF
.01uF 50V
CB395
1 2
1 2
1000pF
50V-10%
1 2
1 2
49.9-1%
SUB*_83008
100-1%
CMIC_GTLVREF1
LM_X04--83008 sub for p/n consolidation
21
1uF
10V-10%
1 2
220pF
50V-10%
VCORE
RB292
LM_X04--83008 sub for p/n consolidation
RB291
50V-10%
1 2
1 2
49.9-1%
SUB*_83008
100-1%
CMIC_GTLVREF3
21
1uF
CB466
10V-10%
1 2
CB464
220pF
50V-10%
11
21
CB465
.01uF 50V
1 2
220pF
50V-10%
CB463
1 2
CB462
1 2
1000pF
10K-5%
50V-10%
21
21
10K-5%
10K-5%
21
21
10K-5%
10K-5%
21
RB241
10K-5%
21
L46
21
1K-5%
1 2
RB181
10K-5%
CMIC_WARMRST
CMIC_TESTMODE SKEW_IMB OBSRV_BINIT_EN MEMOFFACK MEMOFF_CSB
CMIC_FREEZE
BIST_EN
11
11
10,11
10,11
11
11,39
11
10,11
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
11
11
11
CMIC_AVDD CMIC_DVDD
CMIC_AGND
LM_X05--83009 sub for p/n consolidation LM_X04--83008 sub for p/n consolidation
0.1uF 16V 1 2
22uF 6.3V
CB413
SUB*_83009
1 2
SUB*_83008
10V-10%
1uF
21
22uF 6.3V
1 2
SUB*_83009
10V-10%
1uF
1 2
47uH 135MA
L50
1 2
47uH 135MA
SUB*_83008
1 2
2.2-5%
21
2.2-5%
TITLE
SCHEM,PLN,PE4600,2P
DWG NO.
H3007
12/5/2003
1 2
NP*
1 2
B_IMB_DN_CLK
NP*
21
21
CSB_IMB_DN_CLK
1 2
NP*
CB239
21
ROOM=CMIC
.01uF 50V
CB453
CB638
1 2
CB505
COMPUTER CORPORATION
AUSTIN,TEXAS
SHEET
1 2
1000pF
11 OF 63
30
1 2
CB459
50V-10%
39
.01uF 50V
1000pF
50V-10%
A02
21
VCORE
1 2
CB461
CB205
1000pF
50V-10%
2
3
A B
DC
Page 12
ROOM = REMC_PLL
B D
CA
ROOMS COMPLETE
1
1
2
OVERLAP RESISTOR PADS AS MUCH AS POSSIBLE CK_100M_AP_x_LOOP1 = ~2" CK_100M_AP_x_LOOP2 = ~4"
CK_100M_AP_N_LOOP1
CK_100M_AP_FIRST_N
4
RB320
1 2
RB325
1 2
RB329
NP*
1 2
CK_100M_AP_N_LOOP_CONNECT
CK_100M_AP_N_LOOP2
NP*
RB330
1 2
RB326
1 2
NP*
RB321
1 2
CK_100M_AP_LAST_N
2
15
3
CK_100M_AP_FIRST_P
4
RB318
1 2
RB323
1 2
RB327
NP*
1 2
CK_100M_AP_P_LOOP_CONNECT
CK_100M_AP_P_LOOP2CK_100M_AP_P_LOOP1
NP*
RB328
1 2
RB324
1 2
NP*
RB319
1 2
CK_100M_AP_LAST_P
15
3
+2.5V
1 2
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
0.1uF 16V
1 2
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
0.1uF 16V
4 4
REMC CLOCK BUFFER
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
12/5/2003
A02
SHEET
12 OF 63
DC
A B
Page 13
B D
CA
12-5-2003_10:50
ROOMS COMPLETE
1
ROOM=MECA
13,14
VCC12_MECS
UNIQUE_ID_MEM_CARD_A
13
21
220
1
L37
21
470nH 6A
L51
1 2
12
+
270uF
16V-20%
12
+
270uF
16V-20%
12
+
270uF
16V-20%
470nH 6A
PLACE CAPS CLOSE TO CONNECTOR
2
3
L. McTeer 1/17/01 Was ground pin
NC_MECA_A2
13,14
13,14
13,14
VCC12_MECS VCC12_MECS VCC12_MECS NC_MECA_A6
MECA_CSTRB1
10
MECA_CSTRB0
10
MECA_CMD18
10
MECA_CMD21
10
MECA_CMD23
10
MECA_CMD19
10
MECA_CMD1
10
MECA_CMD7
10
MECA_CMD5
10
MECA_CMD4
10
MECA_CMD8
10
MECA_CMD9
10
MECA_CMD12
10
MECA_CMD10
10
MECA_CMD25
10
8.2K-5%
VCC25_PWRGD_A
60
+3.3V
18
13,14,41,58
MECA_CMD31
10
MECA_CMD29
10
MECA_CMD30
10
MECA_MECC15
10
MECA_MECC13
10
VRM_EN
VCC25_START_A
MECA_B_MA12
15
UNIQUE_ID_MEM_CARD_A
13
MECA_B_MA11
15
MECA_B_MA9
15
MECA_B_MA7
15
MECA_A_MA5
15
6,39,53,57
ENV_SEG0_SDA
VTT_SSTL_A
54
SD_X04 -- changed VRM Enable from PSPG to CPLD VRM_EN
ENV_SEG0 = FRU/LM75 MEM CARD A
VTT_PWRGD_A USED TO MONITOR PWRGD SIGNAL FROM VTT VOLTAGE REG ON MEM
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56
SLOT2 WIDE SKT
HETERO 3 OF 3
GND SHIELD
B1 B2 B3 B4 B5 B6 B7 B8 B9
NC_MECA_B2 VCC12_MECS VCC12_MECS VCC12_MECS MECA_CMD17
MECA_CMD20
MECA_CMD16 MECA_CMD22
MECA_CMD3 MECA_CMD6
MECA_CMD2 MECA_CMD0
MECA_CMD15 MECA_CMD13
MECA_CMD14 MECA_CMD11
MECA_CMD24
MECA_CMD28
MECA_CMD26 MECA_CMD27
13,14
13,14
13,14
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
NC_CARDA_B30
MECA_MECC14
MECA_MSTRB3
MECA_MECC12
10
11
10
NC_CARDA_4
REMC_RESET
MECA_A_MA12
14,15,59
15
NC_CARDA_5
NC_CARDA_6 MECA_A_MA11
15
NC_CARDA_7 MECA_A_MA9
15
NC_CARDA_8 MECA_A_MA7
MECA_A_MA8
15
15
NC_CARDA_9
B53 GNDED FOR CARD PRES DETECT/SEATING
NC_CARDA_10
ENV_SEG0_SCL
6,39,53,57
ENV_SEG3 = SPDs/REMCs/PLL MEM CARD A
+3.3V
15
39,53
39,53
15
15
15
15
15
15
15
15
16
16
16
16
16
16
16
MECA_R2_RAS
16
16
16
10
10
54
NC_CLK0_A_N NC_CLK0_A_P
MECA_B_MA5
ENV_SEG3_SCL ENV_SEG3_SDA
MECA_R1_MA10
MECA_B_MA3
MECA_B_MA2
MECA_B_MA1
MECA_B_MA0
MECA_B_CKE
MECA_A_CKE MECA_R2_MA10
MECA_R1_WE
MECA_R2_BA1
MECA_CS_3
MECA_R1_BA0
MECA_R0_BA0 MECA_CS_0
MECA_R0_WE
MECA_CS_4
MECA_CS_5
NC_CLK1_A_N NC_CLK1_A_P
NC_CARDA_14
MECA_MECC11
MECA_MECC10
NC_CARDA_20
VCC25_MECA
A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94 A95 A96 A97 A98 A99 A100 A101 A102 A103 A104 A105 A106 A107 A108 A109 A110 A111 A112 A113 A114 A115 A116 A117 A118
B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94 B95 B96 B97 B98
B99 B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118
MECA_B_MA8
MECA_A_MA6
NC_CARDA_25
NC_CARDA_26
MECA_B_MA6
MECA_A_MA4
MECA_B_MA4
MECA_A_MA3 MECA_A_MA2
NC_MECA_B71
MECA_A_MA1
NC_CARDA_28
NC_CARDA_29
MECA_A_MA0
MECA_R0_MA10
MECA_R1_BA1
MECA_R0_BA1
MECA_R1_CAS
MECA_CS_2
MECA_R1_RAS
MECA_CS_1
MECA_R0_RAS
MECA_R0_CAS MECA_R2_BA0
MECA_R2_WE
MECA_R2_CAS
NC_CARDA_30
NC_CARDA_31
MECA_MSTRB2
MECA_MECC8
MECA_MECC9 MECA_RCMD1
MECA_RCMD2 MECA_RCMD3
MECA_RCMD0
NC_CARDA_32
NC_CARDA_33 NC_CARDA_34
NC_CARDA_35 NC_CARDA_36
15
15
15
15
15
15
15
15
15
15
16
16
16
16
16
16
11
10
10
10
10
10
10
16
16
16
16
16
11,14,15,17,30,39,60
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
13,14
NC_CARDA_37
PLLRST
MECA_CSTRB2
MECA_CSTRB3 MECA_CMD38
MECA_CMD39 MECA_CMD32
MECA_CMD36 MECA_CMD33
MECA_CMD37 MECA_CMD46
MECA_CMD43 MECA_CMD48
MECA_CMD51 MECA_CMD55
MECA_CMD52 MECA_CMD63
MECA_CMD61 MECA_CMD62
MECA_CMD60 NC_MECA_A160
VCC12_MECS NC_MECA_A163
A119 A120 A121 A122 A123 A124 A125 A126 A127 A128 A129 A130 A131 A132 A133 A134 A135 A136 A137 A138 A139 A140 A141 A142 A143 A144 A145 A146 A147 A148 A149 A150 A151 A152 A153 A154 A155 A156 A157 A158 A159 A160 A161 A162 A163 A164 A165
B119 B120 B121 B122 B123 B124 B125 B126 B127 B128 B129 B130 B131 B132 B133 B134 B135 B136 B137 B138 B139 B140 B141 B142 B143 B144 B145 B146 B147 B148 B149 B150 B151 B152 B153 B154 B155 B156 B157 B158 B159 B160 B161 B162 B163 B164 B165
SLOT2 WIDE SKT
HETERO 1 OF 3
GND SHIELD
MECA_SDOE
NC_CARDA_45 NC_CARDA_46
NC_CARDA_47 NC_CARDA_48
NC_MECA_B127
CK_100M_MECA_N CK_100M_MECA_P
NC_CARDA_B133
MECA_CMD45 MECA_CMD34
MECA_CMD44 MECA_CMD35
MECA_CMD47
MECA_CMD42
MECA_CMD41 MECA_CMD40
MECA_CMD49
MECA_CMD50
MECA_CMD54 MECA_CMD53
MECA_CMD56 MECA_CMD57
MECA_CMD59 MECA_CMD58
VCC12_MECS
NC_MECA_B163
VRM_EN
+3.3V
10
13,14,41,58
VTT_START_A
4
4
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
13,14
1K-5%
1 2
VTT_PWRGD_A
MC_PRES_A
44,51
2
+3.3V
72
8.2K-5%
60
3
CARD A
SLOT2 WIDE SKT
HETERO 2 OF 3
GND SHIELD
VCC25_PWRGD_A USED TO MONITOR PWRGD SIGNAL FROM 2.5V VOLTAGE REG ON MEM CARD A
VTT_SSTL_A USED TO MONITOR VTT VOLTAGE FROM MEM CARD A
VCC25_MECA USED TO MONITOR 2.5V VOLTAGE FROM MEM CARD A
4 4
MEM CARD A
VCC25_START_A USED TO DISABLE 2.5V VOLTAGE REG UNTIL 12V IS GOOD
VTT_START_A USED TO DISABLE VTT VOLTAGE REG UNTIL 12V IS GOOD
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
13 OF 63
Page 14
B D
CA
+2.5V
12-5-2003_10:50
ROOMS COMPLETE
1
2
3
ROOM = MECB
L. McTeer 1/17/01 Was ground pin
NC_MECB_A2 NC_MECB_B2
13,14
13,14
13,14
VCC12_MECS VCC12_MECS VCC12_MECS NC_MECB_A6
MECB_CSTRB7
10
MECB_CSTRB6
10
MECB_CMD114
10
MECB_CMD117
10
MECB_CMD119
10
MECB_CMD115
10
MECB_CMD97
10
MECB_CMD103
10
MECB_CMD101
10
MECB_CMD100
10
MECB_CMD104
10
MECB_CMD105
10
MECB_CMD108
10
MECB_CMD106
10
MECB_CMD121
53,55
10
MECB_CMD127
10
MECB_CMD125
10
MECB_CMD126
10
MECB_MECC7
10
MECB_MECC5
10
VRM_EN
MECB_D_MA12
15
UNIQUE_ID_MEM_CARD_B
14
MECB_D_MA11
15
MECB_D_MA9
15
MECB_D_MA7
15
MECB_C_MA5
15
ENV_SEG4_SDA
VTT_SSTL_B
54
+3.3V
8.2K-5% RNB2
36
VCC25_PWRGD_B
60
13,14,41,58
VCC25_START_B
SD_X04 -- changed VRM Enable from PSPG to CPLD VRM_EN
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56
SLOT2 WIDE SKT
HETERO 3 OF 3
GND SHIELD
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56
ENV_SEG4 = FRU/LM75 MEM CARD B
VTT_PWRGD_B USED TO MONITOR PWRGD SIGNAL FROM VTT VOLTAGE REG ON MEM CARD B
VCC25_PWRGD_B USED TO MONITOR PWRGD SIGNAL FROM 2.5V VOLTAGE REG ON MEM CARD B
VCC12_MECS VCC12_MECS VCC12_MECS
MECB_CMD113
MECB_CMD116
MECB_CMD112 MECB_CMD118
MECB_CMD99 MECB_CMD102
MECB_CMD98 MECB_CMD96
MECB_CMD111 MECB_CMD109
MECB_CMD110 MECB_CMD107
MECB_CMD120
MECB_CMD124
MECB_CMD122 MECB_CMD123
NC_CARDB_B30
MECB_MECC6
MECB_MSTRB1
MECB_MECC4
NC_CARDB_4
REMC_RESET
MECB_C_MA12
NC_CARDB_5
NC_CARDB_6 MECB_C_MA11
NC_CARDB_7 MECB_C_MA9
NC_CARDB_8 MECB_C_MA7
MECB_C_MA8 NC_CARDB_9
B53 GNDED FOR CARD PRES DETECT/SEATING
NC_CARDB_10
ENV_SEG4_SCL
13,14
13,14
13,14
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
10
13,15,59
15
15
15
15
15
53,55
ENV_SEG7 = SPDs/REMCs/PLL MEM CARD B
MECB_D_MA8
MECB_C_MA6
NC_CARDB_25
NC_CARDB_26
MECB_D_MA6
MECB_C_MA4
MECB_D_MA4
MECB_C_MA3 MECB_C_MA2
NC_MECB_B71
MECB_C_MA1 NC_CARDB_28
NC_CARDB_29 MECB_C_MA0
MECB_R0_MA10
MECB_R1_BA1
MECB_R0_BA1
MECB_R1_CAS
MECB_CS_2
MECB_R1_RAS
MECB_CS_1
MECB_R0_RAS
MECB_R0_CAS MECB_R2_BA0
MECB_R2_WE
MECB_R2_CAS
NC_CARDB_30
NC_CARDB_31
MECB_MSTRB0
MECB_MECC0
MECB_MECC1 MECB_RCMD1
MECB_RCMD2 MECB_RCMD3
MECB_RCMD0
NC_CARDB_32
NC_CARDB_33 NC_CARDB_34
NC_CARDB_35 NC_CARDB_36
+3.3V
15
39,53
39,53
15
15
15
15
15
15
15
15
16
16
16
16
16
16
16
MECB_R2_RAS
16
16
16
10
10
54
NC_CLK0_B_N NC_CLK0_B_P
MECB_D_MA5
ENV_SEG7_SCL ENV_SEG7_SDA
MECB_R1_MA10
MECB_D_MA3
MECB_D_MA2
MECB_D_MA1
MECB_D_MA0
MECB_D_CKE
MECB_C_CKE MECB_R2_MA10
MECB_R1_WE
MECB_R2_BA1
MECB_CS_3
MECB_R1_BA0
MECB_R0_BA0 MECB_CS_0
MECB_R0_WE
MECB_CS_4
MECB_CS_5
NC_CLK1_B_N NC_CLK1_B_P
NC_CARDB_14
MECB_MECC3
MECB_MECC2
NC_CARDB_20
VCC25_MECB
A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94 A95 A96 A97 A98 A99 A100 A101 A102 A103 A104 A105 A106 A107 A108 A109 A110 A111 A112 A113 A114 A115 A116 A117 A118
B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94 B95 B96 B97 B98
B99 B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118
SLOT2 WIDE SKT
HETERO 2 OF 3
GND SHIELD
15
15
15
15
15
15
15
15
15
15
16
16
16
16
16
16
11
10
10
10
10
10
10
16
16
16
16
16
14
11,13,15,17,30,39,60
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
13,14
1K-5%
1 2
UNIQUE_ID_MEM_CARD_B
X03 - was 5V - LM 3/23/01
A119
NC_CARDB_37
PLLRST
MECB_CSTRB4
MECB_CSTRB5 MECB_CMD70
MECB_CMD71 MECB_CMD64
MECB_CMD68 MECB_CMD65
MECB_CMD69 MECB_CMD78
MECB_CMD75 MECB_CMD80
MECB_CMD83 MECB_CMD87
MECB_CMD84 MECB_CMD95
MECB_CMD93 MECB_CMD94
MECB_CMD92 NC_MECA_B160
VCC12_MECS NC_MECB_A163 NC_MECB_B163
A120 A121 A122 A123 A124 A125 A126 A127 A128 A129 A130 A131 A132 A133 A134 A135 A136 A137 A138 A139 A140 A141 A142 A143 A144 A145 A146 A147 A148 A149 A150 A151 A152 A153 A154 A155 A156 A157 A158 A159 A160 A161 A162 A163 A164 A165
B119 B120 B121 B122 B123 B124 B125 B126 B127 B128 B129 B130 B131 B132 B133 B134 B135 B136 B137 B138 B139 B140 B141 B142 B143 B144 B145 B146 B147 B148 B149 B150 B151 B152 B153 B154 B155 B156 B157 B158 B159 B160 B161 B162 B163 B164 B165
NC_CARDB_45
NC_CARDB_46
NC_MECB_B127
CK_100M_MECB_N CK_100M_MECB_P
NC_CARDB_B133
MECB_SDOE
NC_CARDB_47 NC_CARDB_48
MECB_CMD77 MECB_CMD66
MECB_CMD76 MECB_CMD67
MECB_CMD79
MECB_CMD74
MECB_CMD73 MECB_CMD72
MECB_CMD81
MECB_CMD82
MECB_CMD86 MECB_CMD85
MECB_CMD88 MECB_CMD89
MECB_CMD91 MECB_CMD90
VCC12_MECS
SLOT2 WIDE SKT
HETERO 1 OF 3
GND SHIELD
VRM_EN
10
13,14,41,58
VTT_START_B
4
4
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
13,14
+3.3V
1 2
1K-5%
MC_PRES_B
VTT_PWRGD_B
1
44,51
2
+3.3V
54
8.2K-5%
60
3
VTT_SSTL_B USED TO MONITOR VTT VOLTAGE FROM MEM CARD B
VCC25_B USED TO MONITOR 2.5V VOLTAGE FROM MEM CARD B
VCC25_START_B USED TO DISABLE 2.5V VOLTAGE REG UNTIL 12V IS GOOD
4 4
MEM CARD B
VTT_START_B USED TO DISABLE VTT VOLTAGE REG UNTIL 12V IS GOOD
COMPUTER CORPORATION
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
14 OF 63
Page 15
B D
CA
12-5-2003_10:50
ROOMS COMPLETE
1
2
ECS0_0=0=PLL ENABLED
3
~ALERT=1=AP MODE
AP_ECS0_0
10
GPE_REMC_ALERT
39
+2.5V
+2.5V
1 2
1 2
+2.5V
RB217
1 2
RB161
1 2
LM_X04 -- REMC PINOUT
R6 & D13 PINOUT WRONG
ON PRIOR REMC APs SERVERWORKS ERROR
AP_MA16
10
NC_REMC_AP_R6 AP_MA15
10
AP_CKE
10
AP_MEMPAR
10
RB225
NP*
2.2K-5% 2.2K-5%
2.2K-5%
1K-5%
1 2
249 Ohm-1%
+2.5V
21
RB222
PU_ISOLATE
2.2K-5%
COMP0_AP
AP_MA14
10
AP_MA13
10
AP_MA2
10
AP_MA11
10
AP_MA10
10
AP_MA9
10
AP_MA8
10
AP_MA7
10
AP_MA6
10
AP_MA5
10
AP_MA4
10
AP_MA3
10
AP_MA12
10
AP_MA1
10
AP_MA0
10
10
10
NC_R3_WE_1 RR2_WE_1
16
RR1_WE_1
16
RR0_WE_1
16
NC_R3_RAS_1 RR2_RAS_1
16
RR1_RAS_1
16
RR0_RAS_1
16
16
16
16
NC_R3_BA1_0
RR2_BA1_0
16
RR1_BA1_0
16
RR0_BA1_0
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
MECB_D_CKE
14
MECB_C_CKE
14
MECA_B_CKE
13
MECA_A_CKE
13
10
10
10
10
10
10
AP_ECS1_2 AP_ECS1_1
NC_R3_CAS_1 RR2_CAS_1 RR1_CAS_1 RR0_CAS_1
NC_B_CS_7 NC_A_CS_7 NC_B_CS_6 NC_A_CS_6
RB_CS_5 RA_CS_5 RB_CS_4 RA_CS_4
RB_CS_3 RA_CS_3 RB_CS_2 RA_CS_2
RB_CS_1 RA_CS_1 RB_CS_0 RA_CS_0
NC_R3_BA0_0 RR2_BA0_0 RR1_BA0_0 RR0_BA0_0
AP_ECS1_0 AP_ECS0_2 AP_ECS0_1
AP_WE AP_RAS
AP_CAS
L12
D13
B14 C13 B15 C14
N15
CSTRB1_1/MA16
R6
CSTRB1_0/NC
G3
CSTRB0_1/MA15
D9
CSTRB0_0/CKE
MSTRB/MEMPAR
C3
COMP0
A2
RSVD2/ECS1_2
B3
RSVD1/ECS1_1
CMD9_3/D_WE1 CMD9_2/C_WE1 CMD9_1/B_WE1 CMD9_0/A_WE1
E12
CMD8_3/D_RAS1
D14
CMD8_2/C_RAS1
F11
CMD8_1/B_RAS1
D15
CMD8_0/A_RAS1
K11
CMD7_3/D_CAS1
L14
CMD7_2/C_CAS1
L13
CMD7_1/B_CAS1
M15
CMD7_0/A_CAS1
M14
CMD6_3/D_BA1_0 CMD6_2/C_BA1_0
M13
CMD6_1/B_BA1_0
L11
CMD6_0/A_BA1_0
R7
CMD5_3/B_CS7
P7
CMD5_2/A_CS7
N7
CMD5_1/B_CS6
M7
CMD5_0/A_CS6
N6
CMD4_3/B_CS5
M6
CMD4_2/A_CS5
R5
CMD4_1/B_CS4
L6
CMD4_0/A_CS4
H2
CMD3_3/B_CS3
H3
CMD3_2/A_CS3
G1
CMD3_1/B_CS2
G2
CMD3_0/A_CS2
G4
CMD2_3/B_CS1
F1
CMD2_2/A_CS1
F2
CMD2_1/B_CS0
F3
CMD2_0/A_CS0
C8
CMD1_3/D_BA0_0
A9
CMD1_2/C_BA0_0
B9
CMD1_1/B_BA0_0
C9
CMD1_0/A_BA0_0
A10
CMD0_3/D_CKE0
B10
CMD0_2/C_CKE0
C10
CMD0_1/B_CKE0
D10
CMD0_0/A_CKE0
C4
RCMD3/ECS1_0
B4
RCMD2/ECS0_2
D5
RCMD1/ECS0_1
A3
RCMD0/ECS0_0
F15
DQS8_1/WE
G11
DQS8_0/RAS
J14
DQS7_1/CAS
J13
DQS7_0/MA14
R13
DQS6_1/MA13
M11
DQS6_0/MA2
N9
DQS5_1/MA11
R9
DQS5_0/MA10
M3
DQS4_1/MA9
N1
DQS4_0/MA8
K1
DQS3_1/MA7
J4
DQS3_0/MA6
E4
DQS2_1/MA5
D2
DQS2_0/MA4
A6
DQS1_1/MA3
D7
DQS1_0/MA12
A13
DQS0_1/MA1
C12
DQS0_0/MA0
B2
ISOLATE
A4
SDOE/ALERT
REMC Version 1.0
HETERO 1 OF 2
ROOM = REMC_ADDR
SD8_7/D_WE SD8_6/C_WE SD8_5/B_WE
SD8_4/A_WE SD8_3/D_RAS SD8_2/C_RAS SD8_1/B_RAS SD8_0/A_RAS
SD7_7/D_CAS SD7_6/C_CAS SD7_5/B_CAS SD7_4/A_CAS
SD7_3/D_MA12 SD7_2/C_MA12 SD7_1/B_MA12 SD7_0/A_MA12
SD6_7/D_BA1_1 SD6_6/C_BA1_1 SD6_5/B_BA1_1 SD6_4/A_BA1_1
SD6_3/D_MA2 SD6_2/C_MA2 SD6_1/B_MA2 SD6_0/A_MA2
SD5_7/D_MA11 SD5_6/C_MA11 SD5_5/B_MA11 SD5_4/A_MA11 SD5_3/D_MA10 SD5_2/C_MA10 SD5_1/B_MA10 SD5_0/A_MA10
SD4_7/D_MA9 SD4_6/C_MA9 SD4_5/B_MA9 SD4_4/A_MA9 SD4_3/D_MA8 SD4_2/C_MA8 SD4_1/B_MA8 SD4_0/A_MA8
SD3_7/D_MA7 SD3_6/C_MA7 SD3_5/B_MA7 SD3_4/A_MA7 SD3_3/D_MA6 SD3_2/C_MA6 SD3_1/B_MA6 SD3_0/A_MA6
SD2_7/D_MA5 SD2_6/C_MA5 SD2_5/B_MA5 SD2_4/A_MA5 SD2_3/D_MA4 SD2_2/C_MA4 SD2_1/B_MA4 SD2_0/A_MA4
SD1_7/D_MA3 SD1_6/C_MA3 SD1_5/B_MA3 SD1_4/A_MA3
SD1_3/D_BA0_1 SD1_2/C_BA0_1 SD1_1/B_BA0_1 SD1_0/A_BA0_1
SD0_7/D_MA1 SD0_6/C_MA1 SD0_5/B_MA1 SD0_4/A_MA1 SD0_3/D_MA0 SD0_2/C_MA0 SD0_1/B_MA0 SD0_0/A_MA0
E14 E15 F13 F14 G12 G13 G15 H11
H15 H14 H13 J15 J12 K15 K14 K13
N13 R14 P13 N12 P12 R12 N11 M10
N10 P10 R10 M9 P9 M8 R8 P8
P2 N3 P1 N2 L4 M2 K5 M1
L2 L1 K3 K2 J3 J1 J2 H5
F5 E2 E3 D1 C1 D3 C2 B1
B5 A5 C6 B6 C7 A7 B7 D8
C11 A12 D11 B12 E11 A14 B13 D12
NC_R3_WE_0
RR2_WE_0 RR1_WE_0
RR0_WE_0 NC_R3_RAS_0 RR2_RAS_0 RR1_RAS_0 RR0_RAS_0
NC_R3_CAS_0 RR2_CAS_0 RR1_CAS_0 RR0_CAS_0
NC_R3_BA1_1 RR2_BA1_1 RR1_BA1_1 RR0_BA1_1
NC_R3_BA0_1 RR2_BA0_1 RR1_BA0_1 RR0_BA0_1
MECB_D_MA12 MECB_C_MA12 MECA_B_MA12 MECA_A_MA12
MECB_D_MA2 MECB_C_MA2 MECA_B_MA2 MECA_A_MA2
MECB_D_MA11 MECB_C_MA11 MECA_B_MA11 MECA_A_MA11 NC_R3_MA10
R2_MA10 R1_MA10 R0_MA10
MECB_D_MA9 MECB_C_MA9 MECA_B_MA9 MECA_A_MA9 MECB_D_MA8 MECB_C_MA8 MECA_B_MA8 MECA_A_MA8
MECB_D_MA7 MECB_C_MA7 MECA_B_MA7 MECA_A_MA7 MECB_D_MA6 MECB_C_MA6 MECA_B_MA6 MECA_A_MA6
MECB_D_MA5 MECB_C_MA5 MECA_B_MA5 MECA_A_MA5 MECB_D_MA4 MECB_C_MA4 MECA_B_MA4 MECA_A_MA4
MECB_D_MA3 MECB_C_MA3 MECA_B_MA3 MECA_A_MA3
MECB_D_MA1 MECB_C_MA1 MECA_B_MA1 MECA_A_MA1 MECB_D_MA0 MECB_C_MA0 MECA_B_MA0 MECA_A_MA0
KLM_X03 -- DEPOPPED REF CAP
C358 needs to be subbed to 83008 if ever populated
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
14
14
13
13
14
14
13
13
14
14
13
13
15
15
15
14
14
13
13
14
14
13
13
14
14
13
13
14
14
13
13
14
14
13
13
14
14
13
13
14
14
13
13
14
14
13
13
14
14
13
13
1 2
SUB*_78020
LM_X04--83008 & 78020 sub for p/n consolidation
CB368
.01UF
50V-20%
.01UF
1 2
SUB*_78020
50V-20%
1 2
CB428
OPTION TO TAKE REMC AP OFF I2C BUS
11,17,30,53
Jaguar 2.0 Change: REMC should not answer on I2C when addressed.
Depop U172, RB218, and pop RB216, RB219 to 2.5V
11,17,30,53
LM_X05 -- Popped fix since using 2.0 REMCs in prod LM_X04 -- Fast Edge fix for REMC
REMC AP SCL NEEDS FAST EDGE
ENV_SEG0_25V_SCL
NP*
21
220pF
50V-10%
ENV_SEG0_25V_SDA
220pF
SUB*_83008
21
21
50V-10%
1uF
10V-10%
1uF
10V-10%
+2.5V
1 2
1 2
NP*
100-1%
SSTLREF_R5
100-1%
RB218
1 2
+2.5V
143U172
1 2
74VHC08
+2.5V
21
RB242
+2.5V
20K-5%
21
NP*
1K-1%
RB216
REMC_AP_SDA
+2.5V
20K-5%
TESTMODE_AP
15
RB219
21
REMC_AP_SCL
12,15
12,15
13,14,59
DELAY LOOPS ON PAGE 63
12,15
CK_100M_AP_LAST_N CK_100M_AP_LAST_P
11,13,14,17,30,39,60
REMC_RESET
REMC_AP_SDA
15
REMC_AP_SCL
15
SSTLREF_R5
15
15
15
+2.5V
CK_100M_AP_LAST_N
PLLRST
+2.5V
10V-20%
+
1
2
2
1
CB392
1000pF
50V-10%
2
1
CB404
1000pF
M12
R15 P15
P14 P11
L15
K10
J11 J10
H12
G10
F10
E13
A15 A11
10V-20%
+
1
1
CB405
50V-10%
R2
P3
N5
PLLRST
TESTMODE
A1
RESET
L5
SDA
N4
SCK
VREF_R15 VREF_P15
D4
VREF_D4
C5
VREF_C5
VDD_P14 VDD_P11
P6
VDD_P6
M4
VDD_M4 VDD_L15
L9
VDD_L9
L7
VDD_L7 VDD_K10
K9
VDD_K9
K7
VDD_K7
K6
VDD_K6
K4
VDD_K4 VDD_J11 VDD_J10
J6
VDD_J6 VDD_H12
H4
VDD_H4
H1
VDD_H1 VDD_G10
G6
VDD_G6
VDD_F10
F9
VDD_F9
F7
VDD_F7
F6
VDD_F6
F4
VDD_F4 VDD_E13
E9
VDD_E9
E7
VDD_E7
D6
VDD_D6
B8
VDD_B8 VDD_A15 VDD_A11
2
2
1000pF
10V-20%
+
100uF
1
1
CB365
50V-10%
RB223
1 2
120-5%
NP*
REMC Version 1.0
HETERO 2 OF 2
+2.5V
10V-20%
+
2
1
2
2
1000pF
50V-10%
CK_100M_AP_LAST_P
GND_R11
GND_R1 GND_P5
GND_N14
GND_N8
GND_L10
GND_L8 GND_L3
GND_K12
GND_K8 GND_J9 GND_J8 GND_J7 GND_J5
GND_H10
GND_H9 GND_H8 GND_H7 GND_H6
GND_G14
GND_G9
GND_G8 GND_G7 GND_G5
GND_F12
GND_F8
GND_E10
GND_E8 GND_E6 GND_E5
GND_E1 GND_C15 GND_B11
GND_A8
2
1
CB361
R3 P4 M5 R4
R11 R1 P5 N14 N8 L10 L8 L3 K12 K8 J9 J8 J7 J5 H10 H9 H8 H7 H6 G14 G9
G8 G7 G5 F12 F8 E10 E8 E6 E5 E1 C15 B11 A8
LM_X04--83008 sub for p/n consolidation
SUB*_83008
21
CB396
1000pF
50V-10%
1uF
10V-10%
12,15
21
L38
47uH 135MA
22uF 10V
12
BE USED ON NEW DESIGNS.
THIS PART IS NOT TO
AGND_AP_REMC
R0_MA10
15
R1_MA10
15
R2_MA10
15
12
1 2
0.1uF 16V
15
+2.5V
1 8
3 6
1 8
RNB40
22-5%
RNB40
22-5%
RNB40
22-5%
RNB40
22-5%
RNB18
22-5%
RNB18
22-5%
15
MECA_R0_MA10
MECB_R0_MA10
72
MECA_R1_MA10
MECB_R1_MA10
54
MECA_R2_MA10
MECB_R2_MA10
72
AGND_AP_REMC
RB224
1 2
13
14
13
14
13
14
unused pins tied together to reduce TP's
1
2
3
RNB18
3 6
22-5%
RNB18
54
22-5%
NP*
+2.5V
SUB*_13JJW
1 2
1 2
0.1uF 16V
1 2
0.1uF 16V
0.1uF 16V
13JJW IS REMC REV A2.0 CURRENTLY
+2.5V
REV 1.0 -- NEC UPD84910S1-011 REV 1.1 -- NEC UPD84910S1-012
SUB*_78020
SUB*_78020
SUB*_78020
REV 2.0 -- NEC UPD84917S1-011
4 4
REV 2.1 -- NEC UPD??????????
CB417
1 2
.01UF
50V-20%
CB363
1 2
CB377
.01UF
50V-20%
.01UF
1 2
50V-20%
CB364
1 2
CB366
.01UF
50V-20%
1 2
CB371
.01UF
50V-20%
.01UF
1 2
50V-20%
REMC AP
SUB*_78020
SUB*_78020
LM_X04--Sub for part consolidation
SUB*_78020
COMPUTER CORPORATION
A B
CENTER
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003 15 OF 63
A02
Page 16
B D
CA
12-5-2003_10:50
ROOMS COMPLETE
1
2
3
14
MECB_R2_CAS
RN111
3 6
RR2_CAS_1
39 OHM-5%
RN111
4 5
NC_RN7013_5NC_RN7013_4
39 OHM-5%
MECB_R0_CAS
14
RN111
1 8
39 OHM-5%
14
MECB_R1_BA0
RN111
2 7
39 OHM-5%
RN113
RR1_CAS_0
15
3 6
MECA_R1_CAS
39 OHM-5%
RN113
4 5
NC_RN7014_5NC_RN7014_4
39 OHM-5%
RR1_RAS_0
15
RN113
1 8
MECA_R1_RAS
39 OHM-5%
RN113
RR2_RAS_0
15
2 7
MECA_R2_RAS
39 OHM-5%
RR2_BA0_0
15
RNB52
3 6
MECA_R2_BA0
39 OHM-5%
RNB52
RR2_BA0_1
15
4 5
MECA_R2_BA1
39 OHM-5%
RNB52
RR1_BA0_1
15
2 7
MECA_R1_BA1
39 OHM-5%
RNB52
1 8
NC_RN7015_8NC_RN7015_1
39 OHM-5%
RR2_RAS_1
15
RN114
1 8
MECB_R2_RAS
39 OHM-5%
RR0_RAS_1
15
RN115
4 5
MECB_R0_RAS
39 OHM-5%
RN115
RR1_WE_1
15
1 8
MECB_R1_WE
39 OHM-5%
RR0_WE_1
15
RN115
2 7
MECB_R0_WE
39 OHM-5%
RN115
RR2_WE_1
15
3 6
MECB_R2_WE
39 OHM-5%
RR0_WE_0
15
RN114
4 5
MECA_R0_WE
39 OHM-5%
RR2_WE_0
15
RN114
2 7
MECA_R2_WE
39 OHM-5%
RR1_WE_0
15
RN114
3 6
MECA_R1_WE
39 OHM-5%
RNB53
RR1_BA0_0
15
4 5
MECA_R1_BA0
39 OHM-5%
RR0_BA0_0
15
RNB53
3 6
MECA_R0_BA0
39 OHM-5%
RR0_BA0_1
15
RNB53
2 7
MECA_R0_BA1
39 OHM-5%
RNB53
RR1_RAS_1
15
1 8
MECB_R1_RAS
39 OHM-5%
RN112
MECA_R0_CAS
13
2 7
RR0_CAS_0
39 OHM-5%
RN112
13
MECA_R2_CAS
3 6
RR2_CAS_0
39 OHM-5%
14
MECB_R1_CAS
RN112
1 8
RR1_CAS_1
39 OHM-5%
RN112
NC_RN7019_4 NC_RN7019_5
4 5
39 OHM-5%
MECB_R2_BA1
14
RN110
1 8
RR2_BA1_1
39 OHM-5%
14
MECB_R1_BA1
RN110
2 7
RR1_BA1_1
39 OHM-5%
RN110
MECB_R2_BA0
14
3 6
RR2_BA1_0
39 OHM-5%
RN110
4 5
NC_RN7020_5NC_RN7020_4
39 OHM-5%
Rx_BA0_0 is copy 0 of Rx_BA0 -> MECA
RR0_CAS_1
RR1_BA1_0
13
13
14
14
14
13
14
13
15
13
13
13
13
13
15
15
15
15
15
15
13
13
15
14
13
15
14
RR0_RAS_0
15
14
MECB_R0_BA1
14
13
13
14
14
MECB_R0_BA0
14
13
13
14
14
RB_CS_0
15
RA_CS_1
15
RA_CS_0
15
MECB_CS_3
MECA_CS_4
MECA_CS_3
MECB_CS_1
MECB_CS_2
MECA_CS_2
MECA_CS_5
MECB_CS_5
MECB_CS_4
RNB54
2 7
39 OHM-5%
RNB54
3 6
39 OHM-5%
RNB54
4 5
39 OHM-5%
RNB54
1 8
39 OHM-5%
RNB56
2 7
39 OHM-5%
RNB56
3 6
39 OHM-5%
RNB56
4 5
39 OHM-5%
RNB56
1 8
39 OHM-5%
RNB55
2 7
39 OHM-5%
RNB55
3 6
39 OHM-5%
RNB55
4 5
39 OHM-5%
RNB55
1 8
39 OHM-5%
RNB57
2 7
39 OHM-5%
RNB57
3 6
39 OHM-5%
RNB57
4 5
39 OHM-5%
RNB57
1 8
39 OHM-5%
MECA_R0_RAS
MECB_CS_0
MECA_CS_1
MECA_CS_0
NC_RN7027_8NC_RN7027_1
RB_CS_3
RA_CS_4
RA_CS_3
RB_CS_1
RB_CS_2
RR0_BA1_0
RA_CS_2
RA_CS_5
RB_CS_5
RB_CS_4
RR0_BA1_1
15
15
15
15
13
13
15
15
15
14
15
15
13
15
15
+3.3V
+3.3V
L42
+3.3V
17
L41
1 2
21
L43
1 2
CK_100M_CKINPBUF3
+3.3V
21
RB229
10K-5%
PBUF3_OE
21
17
CK_100M_CKINPBUF1
+3.3V
RB232
10K-5%
1 2
PBUF4_OE
30
1 2
4.7uF
6.3V-10%
CB378
CK_100M_CKINPBUF4
+3.3V
21
RB234
10K-5%
PBUF5_OE
21
CB386
30
4.7uF
CK_100M_CKINPBUF5
+3.3V
RB246
10K-5%
1 2
PBUF6_OE
4.7uF
CB372
6.3V-10%
1 2
0.1uF 16V
CB381
6.3V-10%
21
21
0.1uF 16V
0.1uF 16V
CLKIN
1
OE
2
GND
4
VDD
6
TEXAS INSTR 133-MHZ PCI-X
CLOCK BUFFER (CDCV304)
SUB=SUB*_379PG
ROOM=PCI_BUF3
379PG PCI-X BUFFER (TSSOP8) IS:
COULD ALSO BE:
CLKIN
1
OE
2
GND
4
VDD
6
TEXAS INSTR 133-MHZ PCI-X
CLOCK BUFFER (CDCV304)
SUB=SUB*_379PG
CLKIN
1
OE
2
GND
4
VDD
6
TEXAS INSTR 133-MHZ PCI-X
CLOCK BUFFER (CDCV304)
SUB=SUB*_379PG
CLKIN
1
OE
2
GND
4
SP_CK_33M_PBUF3_3
3
5
7
8
TI CDCV304PW ICS ICS9112AG-27 PERICOM PI6CV304L
PHILIPS ????? IMI ????? CYPRESS ?????
3
5
7
8
ROOM=PCI_BUF4
SP_CK_33M_PBUF5_3
3
5
7
8
ROOM=PCI_BUF5
SP_CK_33M_PBUF6_3
3
5
7
8
NC_RN7037_3 NC_RN7037_63 6
1 2
R_CK_100M_SWSLOT2
R_CK_100M_SWSLOT3 72
R_CK_100M_FBPBUF3
ROOM=PCI_BUF3_TOP
SP_PBUF4_RN_3
SP_CK_33M_PBUF4_3
R_CK_66M_ROMB
R_CK_66M_BCM5700
R_CK_100M_FBPBUF1
ROOM=PCI_BUF4_TOP
SP_PBUF5_RN_3 SP_PBUF5_RN_6
R_CK_100M_SWSLOT5
R_CK_100M_SWSLOT4
R_CK_100M_FBPBUF4
ROOM=PCI_BUF5_TOP
R_CK_100M_SWSLOT6
R_CK_100M_SWSLOT7
1K-5%
1K-5%
1 2
1K-5%
1K-5%
RNB17
22-5%
21
3 6
3 6
RNB27
22-5%
RNB30
22-5%
21
RNB45
RNB17
22-5%
1 8
63
RNB17
54
22-5%
RNB17
22-5%
RNB27
22-5%
RNB27
2 7
22-5%
RNB27
22-5%
RNB30
1 8
22-5%
RNB30
22-5%
RNB30
4 5
22-5%
RNB45
22-5%
RNB45
2 7
22-5%
QS_CK_100M_SWSLOT2 QS_CK_100M_SWSLOT3
CK_100M_FBPBUF3_QS
81
SP_PBUF4_RN_6
CK_66M_ROMB
CK_66M_BCM5700
54
CK_100M_FBPBUF1
72
CK_100M_FBPBUF4_QS
VCC
1 2
81
SP_PBUF6_RN_6SP_PBUF6_RN_3
RB113
8.2K-5%
VCC
55
55
VCC
1 2
8.2K-5%
S2_QS_EN S3_QS_EN
NC_CLKQS_23_14
24
22
17
8.2K-5%
55
55
21
QS_CK_100M_SWSLOT5 QS_CK_100M_SWSLOT4
55
55
QS_CK_100M_SWSLOT6 QS_CK_100M_SWSLOT7
U18
VCC1OE
5
2OE
12
3OE
15
4OE
3 4
1A 1Y
6 7
2A 2Y
11 10
3A 3Y
14 13
4A 4Y
QS3126
S5_QS_EN S4_QS_EN
S6_QS_EN S7_QS_EN
VCC
162
0.1uF 16V
CK_100M_SWSLOT2 CK_100M_SWSLOT3
CK_100M_FBPBUF3
NC_CLKQS_23_13
U19
5
2OE
12
3OE
15
4OE
3 4
1A 1Y
6 7
2A 2Y
11 10
3A 3Y
14 13
4A 4Y
QS3126
NC_CLKQS2_23_14
U30
2 16 5
2OE
12
3OE
15
4OE
1A 1Y 2A 2Y 3A 3Y 4A 4Y
QS3126
NC_CLKQS3_23_14
1
21
19
21
17
2
LM_X04--Sub for part consolidation
VCC
162
VCC1OE
VCC
VCC1OE
43 76 1011 1314
SUB*_78020
21
.01UF
50V-20%
CK_100M_SWSLOT5 CK_100M_SWSLOT4 CK_100M_FBPBUF4
NC_CLKQS2_23_13
LM_X04--Sub for part consolidation
SUB*_78020
1 2
.01UF
50V-20%
CK_100M_SWSLOT6 CK_100M_SWSLOT7
CK_100M_FBPBUF5
NC_CLKQS3_23_13
34
32
30
3
36
38
30
Rx_BA1_0 is copy 1 of Rx_BA0 -> MECB
Rx_BA0_1 is copy 0 of Rx_BA1 -> MECA
+3.3V
L44
VDD
6
R_CK_100M_FBPBUF5
TEXAS INSTR 133-MHZ PCI-X
21
CLOCK BUFFER (CDCV304)
SUB=SUB*_379PG
22-5%
RNB45
22-5%
54
CK_100M_FBPBUF5_QS
Rx_BA1_1 is copy 1 of Rx_BA1 -> MECB
ROOM=PCI_BUF6_TOP
ROOM=PCI_BUF6
kind of confusing, huh!
4 4
1 2
4.7uF
CB415
6.3V-10%
1 2
0.1uF 16V
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
DC
SCHEM,PLN,PE4600,2P
H3007
SHEET
A02
16 OF 6312/5/2003
Page 17
B D
P25 N26 N25 M26 M25 M24 L26 L25 L24 K25 K24 J26 J25 J24 H26 H25 D25 C26 D24 C25 B26 C24 A25 B24 A24 B23 A23 C22 B22 A22 C21
B21 AF23 AD22 AE23 AF24 AD23 AE24 AF25 AD24 AE26 AD25 AC24 AD26 AC25 AC26 AB24 AB25 AB26 AA24 AA25 AA26
Y24
Y25
Y26
W24
W25
W26
V24
V25
V26
U24
U25
U26
P_AD0 P_AD1 P_AD2 P_AD3 P_AD4 P_AD5 P_AD6 P_AD7 P_AD8 P_AD9 P_AD10 P_AD11 P_AD12 P_AD13 P_AD14 P_AD15 P_AD16 P_AD17 P_AD18 P_AD19 P_AD20 P_AD21 P_AD22 P_AD23 P_AD24 P_AD25 P_AD26 P_AD27 P_AD28 P_AD29 P_AD30 P_AD31 P_AD32 P_AD33 P_AD34 P_AD35 P_AD36 P_AD37 P_AD38 P_AD39 P_AD40 P_AD41 P_AD42 P_AD43 P_AD44 P_AD45 P_AD46 P_AD47 P_AD48 P_AD49 P_AD50 P_AD51 P_AD52 P_AD53 P_AD54 P_AD55 P_AD56 P_AD57 P_AD58 P_AD59 P_AD60 P_AD61 P_AD62 P_AD63
P_CBE0 P_CBE1 P_CBE2 P_CBE3 P_CBE4 P_CBE5 P_CBE6 P_CBE7
P_REQ0 P_REQ1 P_REQ2 P_REQ3 P_REQ4 P_REQ5 P_REQ6
PRIMARY PCI-X BUS
P_GNT0 P_GNT1 P_GNT2 P_GNT3 P_GNT4 P_GNT5 P_GNT6
P_TRDY P_STOP P_LOCK
P_IRDY
P_FRAME
P_DEVSEL
P_PAR P_PERR P_SERR
P_REQ64 P_ACK64 P_PAR64
P_PHPNC1 P_PHPNC2 P_PHPNC3
P_M66EN P_PCICAP1 P_PCICAP2
P_PCIRST
PCLKO
PFBCLK
LM_X04--9C725 changed to 724YF at Celestica's request
1
2
22,24
22,24
22,24
22,24
22,24
22,24
22,24
22,24
22,24,41
22,24
22,24
22,24
22,24
22,24
22,24
22,24
22,24
22,24
22,24
22,24
22,24
22,24
22,24
22,24
22,24,41
22,24
22,24
22,24
22,24
22,24
22,24
22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
PCI1_AD0 PCI1_AD1 PCI1_AD2 PCI1_AD3 PCI1_AD4 PCI1_AD5 PCI1_AD6 PCI1_AD7 PCI1_AD8 PCI1_AD9 PCI1_AD10 PCI1_AD11 PCI1_AD12 PCI1_AD13 PCI1_AD14 PCI1_AD15 PCI1_AD16 PCI1_AD17 PCI1_AD18 PCI1_AD19 PCI1_AD20 PCI1_AD21 PCI1_AD22 PCI1_AD23 PCI1_AD24 PCI1_AD25 PCI1_AD26 PCI1_AD27 PCI1_AD28 PCI1_AD29 PCI1_AD30 PCI1_AD31 PCI1_AD32 PCI1_AD33 PCI1_AD34 PCI1_AD35 PCI1_AD36 PCI1_AD37 PCI1_AD38 PCI1_AD39 PCI1_AD40 PCI1_AD41 PCI1_AD42 PCI1_AD43 PCI1_AD44 PCI1_AD45 PCI1_AD46 PCI1_AD47 PCI1_AD48 PCI1_AD49 PCI1_AD50 PCI1_AD51 PCI1_AD52 PCI1_AD53 PCI1_AD54 PCI1_AD55 PCI1_AD56 PCI1_AD57 PCI1_AD58 PCI1_AD59 PCI1_AD60 PCI1_AD61 PCI1_AD62 PCI1_AD63
SERVERWORKS CIOB-X Ver 1.2
HETERO 1 OF 3
ROOM=PCI1_PU
1uF
PCI1_AD32 PCI1_AD33 PCI1_AD34 PCI1_AD35 PCI1_AD36 PCI1_AD37 PCI1_AD38 PCI1_AD39 PCI1_AD40 PCI1_AD41 PCI1_AD42 PCI1_AD43 PCI1_AD44 PCI1_AD45 PCI1_AD46 PCI1_AD47 PCI1_AD48 PCI1_AD49 PCI1_AD50 PCI1_AD51 PCI1_AD52 PCI1_AD53 PCI1_AD54 PCI1_AD55 PCI1_AD56 PCI1_AD57 PCI1_AD58 PCI1_AD59 PCI1_AD60 PCI1_AD61 PCI1_AD62 PCI1_AD63 PCI1_CBE4 PCI1_CBE5 PCI1_CBE6 PCI1_CBE7 PCI1_PAR64 PCI1_PERR PCI1_SERR
1 2
CB419
10V-10%
1 2
1uF
SUB*_83008
RN129
8.2K-5%
RN129
8.2K-5%
RN129
8.2K-5%
RNB83
8.2K-5%
RNB82
8.2K-5%
RNB81
8.2K-5%
RNB80
8.2K-5%
RNB79
8.2K-5%
RNB78
8.2K-5%
RB352
1 2
8.2K-5%
CB479
72
RNB84
8.2K-5%
RN129
8.2K-5%
RN130
8.2K-5%
RNB83
8.2K-5%
RNB82
8.2K-5%
RNB81
8.2K-5%
RNB80
8.2K-5%
RNB79
8.2K-5%
RNB78
8.2K-5%
R513
1 2
8.2K-5%
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
3
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
+2.5V
10V-10%
4 4
SUB*_83008
+3.3V
LM_X04--83008 sub for p/n consolidation
K26 H24 E24 C23 R24 T26 T25 T24
C18 B18 A18 C17 B17 A17 C16
A21 C20 B20 A20 C19 B19 A19
E26 F25 F26
E25 D26 F24
G26 G24 G25
R26 P26 R25
B14 A14 A15
B16 A16 C15
B15
AF6 AE6
63
RNB84
8.2K-5%
54
RN130
8.2K-5%
RN130
8.2K-5%
72
RNB83
8.2K-5%
72
RNB82
8.2K-5%
72
RNB81
8.2K-5%
72
RNB80
8.2K-5%
72
RNB79
8.2K-5%
72
RNB78
8.2K-5%
R507
1 2
8.2K-5%
PCI1_TRDY PCI1_STOP PCI1_LOCK
PCI1_IRDY PCI1_FRAME PCI1_DEVSEL
PCI1_PAR PCI1_PERR PCI1_SERR
PCI1_ACK64 PCI1_PAR64
NC_PCI1_SIL
NC_PCI1_SOD
PCI1_M66EN
R_CK_100M_CKINPBUF1 CK_100M_CKINPBUF1 CK_100M_FBPBUF1
HEATSINK W/ LOCTITE384 P#724YF
CIOB WILL NEED A HEATSINK ADD=ADD*_724YF_U123
SUB=SUB*_205VF
RNB84
RNB84
RN130
RNB83
RNB82
RNB81
RNB80
RNB79
RNB78
21
81
54
72
54
54
54
54
54
54
CB485
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
0.1uF 16V
PCI1_CBE0 PCI1_CBE1 PCI1_CBE2 PCI1_CBE3 PCI1_CBE4 PCI1_CBE5 PCI1_CBE6 PCI1_CBE7
PCI1_BRDCM_REQ PCI1_ZION_REQ
PCI1_BRDCM_GNT PCI1_ZION_GNT PCI1_GNT2 PCI1_GNT3 PCI1_GNT4 NC_PCI1_GNT5 PCI1_GNT6
RB277
22-5%
+3.3V
0.1uF 16V 1 2
17,24
17,22,24
17,22,24
17,22,24
17,22,24
17,22,24
CB482
21
PCI1_PCIRESET
PCI1_LOCK
PCI1_STOP
PCI1_DEVSEL
PCI1_TRDY
PCI1_FRAME
PCI1_IRDY
0.1uF 16V 1 2
NC_RN1001_4
CB452
PCI1_REQ64
16
0.1uF 16V CB448
21
22,24
22,24
7
8
RNB61
2
1
+3.3V
5
6
4
3
22,24
22,24
17,22,24
17,22,24
17,22,24
17,22,24
22
24
17,22
17,24
17
17
17
17
Jaguar H3007 - X00: Added 8.2K +3.3V PU to PCI1_REQ64
17,22,24
17,22,24
17,24
17,22,24
17,22,24
17,22,24
22,24
17,22,24
17,22,24
22,24
17,22,24
UNUSED_HPC_CIOB_1
17,22
+3.3V
RB495
1 2
on CIOB-X for embedded PCI (i960 and BCM5700).
PCI1_M66EN
8.2K-5%
22,24
17,22
+3.3V
21
+3.3V
NP*
2.2K-5%
NP*
21
RB282
RB280
2.2K-5%
1 2
2.2K-5%
21
1K-5%
22,59
RB281
RB227
1 2
16
22-5%
Jaguar 2.0 Change: RB227 needs to be terminated at CIOB not at buffer
+3.3V
RNB77
1 8
8.2K-5%
RNB77
72
RNB77
8.2K-5%
3 6
8.2K-5%
RNB77
54
RNB76
8.2K-5%
81
8.2K-5%
RNB76
2 7
8.2K-5%
RNB76
NC_RN1001_6NC_RN1001_3
63
8.2K-5% RNB76
4 5
NC_RN1001_5
8.2K-5%
50V-10%
1000pF
50V-10%
CB403
1000pF
1 2
CB445
21
RB276
1 2
2.2K-5%
1 2
1K-5%
DELAY_RULE=:::500
+2.5V
RB261
1 2
100-1%100-1%
SUB*_83008
RB267
1 2
18,20
18,20
18,20
18,20
18,20
+3.3V
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18,20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
18-20
205VF IS CIOB REV A2.0 CURRENTLY
REV 1.0 -- NEC UPD84915F2-011 REV 1.1 -- NEC UPD84915F2-012 REV 2.0 -- NEC UPD84918F2-011 REV 2.1 -- NEC UPD??????????
LM_X04--83008 sub for p/n consolidation
CIOB1_IMBVREF
21
1uF
CB437
21
CB446
10V-10%
220pF
CB430
50V-10%
1 2
220pF
50V-10%
PCIX3_AD0 PCIX3_AD1 PCIX3_AD2 PCIX3_AD3 PCIX3_AD4 PCIX3_AD5 PCIX3_AD6 PCIX3_AD7 PCIX3_AD8 PCIX3_AD9 PCIX3_AD10 PCIX3_AD11 PCIX3_AD12 PCIX3_AD13 PCIX3_AD14 PCIX3_AD15 PCIX3_AD16 PCIX3_AD17 PCIX3_AD18 PCIX3_AD19 PCIX3_AD20 PCIX3_AD21 PCIX3_AD22 PCIX3_AD23 PCIX3_AD24 PCIX3_AD25 PCIX3_AD26 PCIX3_AD27 PCIX3_AD28 PCIX3_AD29 PCIX3_AD30 PCIX3_AD31 PCIX3_AD32 PCIX3_AD33 PCIX3_AD34 PCIX3_AD35 PCIX3_AD36 PCIX3_AD37 PCIX3_AD38 PCIX3_AD39 PCIX3_AD40 PCIX3_AD41 PCIX3_AD42 PCIX3_AD43 PCIX3_AD44 PCIX3_AD45 PCIX3_AD46 PCIX3_AD47 PCIX3_AD48 PCIX3_AD49 PCIX3_AD50 PCIX3_AD51 PCIX3_AD52 PCIX3_AD53 PCIX3_AD54 PCIX3_AD55 PCIX3_AD56 PCIX3_AD57 PCIX3_AD58 PCIX3_AD59 PCIX3_AD60 PCIX3_AD61 PCIX3_AD62 PCIX3_AD63
17
M1
S_AD0
M2
S_AD1
M3
S_AD2
L1
S_AD3
L2
S_AD4
L3
S_AD5
K1
S_AD6
K2
S_AD7
J1
S_AD8
J2
S_AD9
J3
S_AD10
H1
S_AD11
H2
S_AD12
H3
S_AD13
G1
S_AD14
G2
S_AD15
C2
S_AD16
C3
S_AD17
A1
S_AD18
A2 B3 C4 A3 B4 A4 B5 A5 C6 B6 A6 C7
B7 AF3 AD4 AE3 AF2 AD3 AE1 AD2 AC3 AD1 AC2 AB3 AC1 AB2 AB1 AA3 AA2 AA1
Y3
Y2
Y1
W3
W2
W1
V3
V2
V1
U3
U2
U1
T3
T2
T1
S_AD19 S_AD20 S_AD21 S_AD22 S_AD23 S_AD24 S_AD25 S_AD26 S_AD27 S_AD28 S_AD29 S_AD30 S_AD31 S_AD32 S_AD33 S_AD34 S_AD35 S_AD36 S_AD37 S_AD38 S_AD39 S_AD40 S_AD41 S_AD42 S_AD43 S_AD44 S_AD45 S_AD46 S_AD47 S_AD48 S_AD49 S_AD50 S_AD51 S_AD52 S_AD53 S_AD54 S_AD55 S_AD56 S_AD57 S_AD58 S_AD59 S_AD60 S_AD61 S_AD62 S_AD63
SECONDARY PCI-X BUS
SERVERWORKS CIOB - X Ver 1.2
HETERO 2 OF 3
17
CIOB1_AVDD
CIOB1_AGND
17
S_CBE0 S_CBE1 S_CBE2 S_CBE3 S_CBE4 S_CBE5 S_CBE6 S_CBE7
S_REQ0 S_REQ1 S_REQ2 S_REQ3 S_REQ4 S_REQ5
S_GNT0 S_GNT1 S_GNT2 S_GNT3 S_GNT4 S_GNT5
S_TRDY S_STOP S_LOCK
S_IRDY
S_FRAME
S_DEVSEL
S_PAR S_PERR S_SERR
S_REQ64 S_ACK64 S_PAR64
S_PHPNC1 S_PHPNC2 S_PHPNC3
S_M66EN S_PCICAP1 S_PCICAP2
S_PCIRST
SCLKO
SFBCLK
K3 G3 D3 C5 P2 R1 R2 R3
A7 C8 B8 A8 C9 B9
A9 C10 B10 C11 A10 B11
D1 E2 E1
D2 C1 E3
F1 F3 F2
N1 N2 P1
A11 C12 B12
C14 A13 B13
A12
AD6 AF5
RB273
1 2
All Bits of Function # Used for Reg Access
Enable Secondary Hotplug Controller
PCIX3_CBE0 PCIX3_CBE1 PCIX3_CBE2 PCIX3_CBE3 PCIX3_CBE4 PCIX3_CBE5 PCIX3_CBE6 PCIX3_CBE7
PCIX3_REQ0 PCIX3_REQ1
PCIX3_HP_REQ
PCIX3_GNT0 PCIX3_GNT1 NC_PCIX3_GNT2 NC_PCIX3_GNT3 PCIX3_GNT4 PCIX3_HP_GNT
PCIX3_TRDY PCIX3_STOP PCIX3_LOCK
PCIX3_IRDY PCIX3_FRAME PCIX3_DEVSEL
PCIX3_PAR PCIX3_PERR PCIX3_SERR
PCIX3_REQ64 PCIX3_ACK64 PCIX3_PAR64
NC_PCIX3_SIL
PCIX3_SEG_RST
NC_PCIX3_SOD
PCIX3_M66EN
PCIX3_XCAP1 PCIX3_XCAP2
PCIX3_PCIRESET
R_CK_100M_CKINPBUF3
CK_100M_FBPBUF3
Jaguar 2.0 Change: RB228 needs to be terminated at CIOB not at buffer
SUB*_83009
LM_X05--83009 sub for p/n consolidation
APLL Enabled
IMB at 400MHz
Enable Primary Hotplug Controller Disable Primary Hotplug Controller
16
22uF 6.3V
1 2
10V-10%
1uF
1 2
CB442
SUB*_83008 LM_X04--83008 sub for p/n consolidation
CA
PULLED UP
CIOB ID BIT0 CIOB ID BIT1 CIOB ID BIT2
18,20
18,20
18,20
18,20
18-20
18-20
18-20
18-20
17,18
20
17
17,55
18-20
18-20
18-20
18-20
18-20
18-20
18,20
18-20
18-20
18-20
18-20
18-20
55
55
55
55
55
RB228
21
22-5%
CK_100M_CKINPBUF3
L49
47uH 135MA
ROOMS COMPLETE
PULLED DOWN
APLL Disabled
IMB at 266MHz
Only Bit 0 of Function # Used for Reg Access
Disable Secondary Hotplug Controller
IMB Skew in Test ModeIMB Skew in Normal Mode
+3.3V
8
7
6
5
RNB49
1
2
16
3
4
+2.5V
1 2
249 Ohm-1%
+2.5V
RB255
21
1 2
2.2-5%
RB251
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
RB262
2.2K-5%
1 2
A_IMB_DN_D0 A_IMB_DN_D1 A_IMB_DN_D2 A_IMB_DN_D3 A_IMB_DN_D4 A_IMB_DN_D5 A_IMB_DN_D6 A_IMB_DN_D7 A_IMB_DN_D8 A_IMB_DN_D9 A_IMB_DN_D10 A_IMB_DN_D11 A_IMB_DN_D12 A_IMB_DN_D13 A_IMB_DN_D14 A_IMB_DN_D15
11
11
11
17
18
20
55
A_IMB_DN_CLK A_IMB_DN_CON A_IMB_DN_PAR
CIOB1_AVDD
17
CIOB1_AGND
17
CIOB1_IMBCOMP0
CIOB1_IMBVREF
17,22
17
17
17,18
17,55
17
17,24
17
17
+2.5V
PCI1_BRDCM_GNT
PCI1_GNT4
PCI1_GNT6
PCIX3_GNT0
PCIX3_HP_GNT
PCIX3_GNT4
PCI1_ZION_GNT
PCI1_GNT2
PCI1_GNT3
AD12 AF19
+3.3V
21
RB316
2.2K-5%
+3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V
21
RB303
1 2
2.2K-5%
2.2K-5%
NP*
21
1 2
2.2K-5%
NP*
RB298
NP*
2.2K-5%
RB302
1 2
2.2K-5%
CIOB ID FOR I2C
ID = 1 FOR I2C ADDR C2/3 AS OF 8/2
BITS ARE USED AS BINARY ENCODED -ID
R_A_IMB_UP_CLK
17
IMBD_R0 IMBD_R1 IMBD_R2 IMBD_R3 IMBD_R4 IMBD_R5 IMBD_R6 IMBD_R7 IMBD_R8 IMBD_R9 IMBD_R10 IMBD_R11 IMBD_R12 IMBD_R13 IMBD_R14 IMBD_R15
IMBD_T0 IMBD_T1 IMBD_T2 IMBD_T3 IMBD_T4 IMBD_T5 IMBD_T6 IMBD_T7 IMBD_T8
IMBD_T9 IMBD_T10 IMBD_T11 IMBD_T12 IMBD_T13 IMBD_T14 IMBD_T15
IMBCLK_R IMBCLK_T
AF9 AF17
IMBCON_R IMBCON_T
AE9 AE16
IMBPAR_R IMBPAR_T
AF7 AD7
AD8 AE7 AE8
AD9
AF8
AA4
AVDD1 AVDD2
AGND1 AGND2 AGND3
IMBCOMP0
VREFIMB
VCC25_1
PCIRST
DPLLRST
CLKIN
ALERT
RSVD_A26
RSVD_AF26
TESTMODE
SDA SCK
C13
AF1
AE5
AE4
AD5 AF4
A26 AF26 B1
VCC25_2
AC5 AC8
AE2
B2
B25
D5 D11 D14 D17 D20 E23
G4 M23 N24
P3 W23
VCC25_3 VCC25_4 VCC25_5 VCC25_6 VCC25_7 VCC25_8 VCC25_9 VCC25_10 VCC25_11 VCC25_12 VCC25_13 VCC25_14 VCC25_15 VCC25_16 VCC25_17 VCC25_18 VCC25_19 VCC25_20 VCC25_21 VCC25_22 VCC25_23 VCC25_24 VCC25_25 VCC25_26
VCC_AA23
VCC_AC22
POWER/GROUND IMB BUS
VCC_AB4 VCC_AC7
VCC_D7
VCC_D9 VCC_D12 VCC_D15 VCC_D19 VCC_D22
VCC_E4 VCC_G23
VCC_H4 VCC_J23
VCC_K4 VCC_L23
VCC_M4
VCC_N3 VCC_P24
VCC_R4 VCC_R23
VCC_U4 VCC_U23
VCC_W4
12-5-2003_10:50
+3.3V
21
RB312
NP*
RB314
1 2
RB259
1 2
21
NP*
21
2.2K-5%
2.2K-5%
NP*
2.2K-5%
RB272
LOOP_SNGL_A_IMB_UP_CLK
1 2
2.2K-5%
RB266
1 2
21
NP*
2.2K-5%
2.2K-5%
RB307
RB310
1 2
21
2.2K-5%
2.2K-5%
NP*
1 2
NP*
R_A_IMB_UP_D0
R_A_IMB_UP_D1
R_A_IMB_UP_D2
R_A_IMB_UP_D3
R_A_IMB_UP_D4
R_A_IMB_UP_D5
R_A_IMB_UP_D6
R_A_IMB_UP_D7
R_A_IMB_UP_D8
R_A_IMB_UP_D9
R_A_IMB_UP_D10
R_A_IMB_UP_D11
R_A_IMB_UP_D12
R_A_IMB_UP_D13
R_A_IMB_UP_D14
R_A_IMB_UP_D15
39-5%
NP*
1 2
1 2
39-5%
LOOP_DBL_A_IMB_UP_CLK
39-5%
RNB66
4 5
39 OHM-5%
RNB66
1 8
39 OHM-5%
RNB64
39 OHM-5%
RNB62
39 OHM-5%
RNB62
1 8
39 OHM-5%
RNB59
1 8
39 OHM-5%
72
54
39 OHM-5%
39 OHM-5%
39 OHM-5%
39 OHM-5%
21
1 2
RNB66
3 6
RNB64
3 6
RNB62
3 6
RNB59
RNB59
3 6
A_IMB_UP_CLK
NP*
RNB66
39 OHM-5%
RNB64
39 OHM-5%
RNB64
1 8
39 OHM-5%
RNB62
39 OHM-5%
54
RNB59
39 OHM-5%
A_IMB_UP_D0
72
A_IMB_UP_D1 A_IMB_UP_D2 A_IMB_UP_D3
54
A_IMB_UP_D4 A_IMB_UP_D5 A_IMB_UP_D6 A_IMB_UP_D7 A_IMB_UP_D8 A_IMB_UP_D9
72
A_IMB_UP_D10 A_IMB_UP_D11 A_IMB_UP_D12
72
A_IMB_UP_D13 A_IMB_UP_D14 A_IMB_UP_D15
39 OHM-5%
R_A_IMB_UP_CLK R_A_IMB_UP_CON
R_A_IMB_UP_PAR
17
RB295
R434
1 2
21
39-5%
A_IMB_UP_CON A_IMB_UP_PAR
39-5%
PCI_RST_CIOB
PLLRST
GPE_CIOB1_ALERT
NC_CIOB1_A26 NC_CIOB1_AF26
SD_X06 -- added new reset line for ciob's
11,13-15,30,39,60
CK_33M_CIOB1
39
30,59
NP*
NP*
4
R1096
1 2
R1097
1 2
ENV_SEG0_25V_SDA
ENV_SEG0_25V_SCL
CIOB1_TESTMODE
+3.3V
R1092
1 2
Jaguar 2.0 Change: SW chips responding to bus when not addressed Added pullups to 3.3V and series resistors 0 ohm to env_seg0_25v sda and scl lines
+3.3V
A1.2 CIOB INSTALL RB236
R1093
8.2K-5%
1 2
8.2K-5%
A1.2 CIOB DEPOP R1014 A2.0 CIOB INSTALL R1014
A2.0 CIOB DEPOP RB236
2.2K-5%
2.2K-5%
11
11,15,30,53
11,15,30,53
RB308
1 2
NP*
21
2.2K-5%
2.2K-5%
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
+3.3V
21
21
RB243
1
2
3
2.2K-5%
220
NP*
10V-10%
1uF
SUB*_83008
1 2
CB480
10V-10%
1uF
21
SUB*_83008
10V-10%
CB476
1uF
1 2
CB420
SUB*_83008
10V-10%
1uF
21
CB478
SUB*_83008
0.1uF 16V CB422
1 2
0.1uF 16V CB436
21
0.1uF 16V CB425
21
0.1uF 16V 1 2
CB421
0.1uF 16V CB426
21
.01uF 50V
CB481
1 2
.01uF 50V
CB439
1 2
50V-10%
1000pF
21
CB477
50V-10%
1000pF
1 2
A B
50V-10%
CB424
1000pF
21
CB444
.01uF 50V
CB423
21
50V-10%
1000pF
1 2
CB431
ROOM=CIOB_LEFT
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
SERVERWORKS CIOB-X Ver 1.2
HETERO 3 OF 3
TITLE
DWG NO.
DC
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
17 OF 63
Page 18
B D
CA
12-5-2003_10:50
ROOMS COMPLETE
1
ROOM=SLOT2
S2_SENSE_5V
18
NET_PHYSICAL_TYPE=PLANE
S2_EN_GATE
18
VCC +3.3V
SUB*_24044
1 2
.01-1%
R44
SUB*_24044
.01-1%
R68
21
18
S2_SENSE_3V
NET_PHYSICAL_TYPE=PLANE
8
7
5
QB7
SI4410DY SI4410DY
4
3
261
SI4410DY
5162738
Q1
4
S2_EN_GATE
18
SI4410DY
5162738
4
Q8
4
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
18,55
PCIX3_AD61 PCIX3_AD60 PCIX3_AD59 PCIX3_AD58 PCIX3_AD57 PCIX3_AD56 PCIX3_AD54 PCIX3_AD55 PCIX3_AD53 PCIX3_AD52
S2_QS_EN
SUB*_8174U
VCC
8
7
6
5
3
2
1
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
+3.3V
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
PCIX3_AD51 PCIX3_AD50 PCIX3_AD49 PCIX3_AD48 PCIX3_AD46 PCIX3_AD47 PCIX3_AD45 PCIX3_AD44 PCIX3_AD43 PCIX3_AD42
VCC
VCC
U90
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U98
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
S2_AD61 S2_AD60 S2_AD59 S2_AD58 S2_AD57 S2_AD56 S2_AD54 S2_AD55 S2_AD53 S2_AD52
S2_AD51 S2_AD50 S2_AD49 S2_AD48 S2_AD46 S2_AD47 S2_AD45 S2_AD44 S2_AD43 S2_AD42
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
+3.3V
17,20
17,20
17,20
17,20
17,20
17,20
17,20
17,20
17,20
17,20
18,55
17,20
17,20
17,20
17,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
PCIX3_AD27 PCIX3_AD26 PCIX3_AD25 PCIX3_AD24 PCIX3_CBE3 PCIX3_AD23 PCIX3_AD22 PCIX3_AD21 PCIX3_AD20 PCIX3_AD19
S2_QS_EN
SUB*_8174U
PCIX3_AD18 PCIX3_AD17 PCIX3_AD16 PCIX3_CBE2 PCIX3_FRAME PCIX3_IRDY PCIX3_TRDY PCIX3_DEVSEL PCIX3_STOP PCIX3_LOCK
VCC
VCC
U42
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U54
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
S2_AD27 S2_AD26 S2_AD25 S2_AD24 S2_CBE3 S2_AD23 S2_AD22 S2_AD21 S2_AD20 S2_AD19
S2_AD18 S2_AD17 S2_AD16 S2_CBE2 S2_FRAME S2_IRDY S2_TRDY S2_DEVSEL S2_STOP S2_LOCK
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
1
2
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
+3.3V
SUB*_78020
18,55
18
1 2
S2_PWR_FAULT S2_EN_GATE
18
0.1uF 16V
S2_5V
S2_SENSE_3V
SUB*_63206
12.1K1% is sub p/n
C50
1 2
19
100-5%
21
1
M12VIN
2
FLT
3
3V5VG
4
VCC
5
12VIN
6
3VISEN
7
3VS
8
OCSET
UB6
HIP1011CB
SUB*_7372P
M12VO M12VG
GND
5VISEN
5VS
PWRON
16
S2_N12V
15
S2_N12VG
14
S2_12VG 13 12
S2_12V 11
S2_SENSE_5V 10 9
S2_PWR_EN
RB143
1 2
S2_3.3V
0.1uF 16V 1 2
18,19
18
18
18,19
18
55
19
VCC
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
+3.3V
18,55
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
18,55
40
40
40
40
17
17
17,20
17,20
17,20
17,20
18,55
S2_QS_EN
PCIX3_AD41 PCIX3_AD40 PCIX3_AD39 PCIX3_AD38 PCIX3_AD37 PCIX3_AD36 PCIX3_AD35 PCIX3_AD33 PCIX3_AD34 PCIX3_AD32
S2_QS_EN
PIRQ_11 PIRQ_12 PIRQ_13 PIRQ_14
PCIX3_GNT0 PCIX3_REQ0 PCIX3_AD30 PCIX3_AD31 PCIX3_AD29 PCIX3_AD28
S2_QS_EN
SUB*_8174U
SUB*_8174U
SUB*_8174U
VCC
VCC
1 12
ON GND
5C6800 QSOP24
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U31
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S2_AD41 S2_AD40 S2_AD39 S2_AD38 S2_AD37 S2_AD36 S2_AD35 S2_AD33 S2_AD34 S2_AD32
S2_PIRQA S2_PIRQB S2_PIRQC S2_PIRQD S2_GNT S2_REQ S2_AD30 S2_AD31 S2_AD29 S2_AD28
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
SUB*_78020
VCC VCC
1 2
+3.3V
+3.3V
18,55
17,19,20
17,19,20
17,20
17,20
17,20
17,20
17,20
17,20
17,20
17,20
18,55
17,20
17,20
17,20
17,20
17,20
17,20
17,20
17,20
17,20
17,20
18,55
S2_QS_EN
PCIX3_PERR PCIX3_SERR PCIX3_PAR PCIX3_AD15 PCIX3_CBE1 PCIX3_AD14 PCIX3_AD13 PCIX3_AD12 PCIX3_AD11 PCIX3_AD10
S2_QS_EN
PCIX3_AD9 PCIX3_CBE0 PCIX3_AD8 PCIX3_AD7 PCIX3_AD6 PCIX3_AD5 PCIX3_AD4 PCIX3_AD3 PCIX3_AD2 PCIX3_AD1
S2_QS_EN
SUB*_8174U
SUB*_8174U
SUB*_8174U
VCC
VCC
13
BIASV
1 12
ON GND
5C6800 QSOP24
U63
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U71
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S2_PERR S2_SERR S2_PAR S2_AD15 S2_CBE1 S2_AD14 S2_AD13 S2_AD12 S2_AD11 S2_AD10
S2_AD9 S2_CBE0 S2_AD8 S2_AD7 S2_AD6 S2_AD5 S2_AD4 S2_AD3 S2_AD2 S2_AD1
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
2
3
18,55
18,19
18,19
18
S2_PWR_FAULT
S2_EN_GATE
S2_12V
S2_N12V
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
+3.3V
17,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
17,19,20
18,55
PCIX3_AD0 PCIX3_ACK64 PCIX3_REQ64 PCIX3_CBE7 PCIX3_CBE6 PCIX3_CBE5 PCIX3_CBE4 PCIX3_PAR64 PCIX3_AD62 PCIX3_AD63
S2_QS_EN
SUB*_8174U
U82
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
5C6800 QSOP24
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
S2_AD0 S2_ACK64 S2_REQ64 S2_CBE7 S2_CBE6 S2_CBE5 S2_CBE4 S2_PAR64 S2_AD62 S2_AD63
19
19
19
19
19
19
19
19
19
19
3
50V-10%
18
18
S2_N12VG
S2_12VG
1 2
.033uF
50V-10%
21
.033uF
50V-10%
C36
1 2
.033uF
50V-10%
100pF
C16
21
PCI2
4 4
PCIX BUS 3
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
A02
18 OF 6312/5/2003
Page 19
B D
CA
12-5-2003_10:50
ROOMS COMPLETE
1
2
3
18,19
18,19
18,19
16
S2_N12V
S2_5V
S2_3.3V
19
18
18
19,55
19,55
CK_100M_SWSLOT2
18
18
18
18
18
18
18
18
18
18
18
18
18
19,55
18
18
18
18
18
18
18
19,55
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18,19
18,19
18,19
Side B
S2_3.3V
S2_5V
S2_12V
Side A
B1
S2_TCK
NC_S2_TDO
B2 B3 B4
p
B5
B6 S2_PIRQB S2_PIRQD S2_PRESA NC_S2_RSVDB10 S2_PRESB
NC_S2_RSVDB14
B7
B8
B9
B10 B11
B14
B D
IOV
B15 B16
IOV
B17
S2_REQ
S2_AD31 S2_AD29
B18 B19 B20 B21
IOV
B22 S2_AD27 S2_AD25
B23
B24
B25 S2_CBE3 S2_AD23
B26
B27
B28 S2_AD21 S2_AD19
B29
B30
B31 S2_AD17 S2_CBE2
B32
B33
B34 S2_IRDY
B35
B36 S2_DEVSEL S2_XCAP S2_LOCK S2_PERR
B37
B38
B39
B40
B41 S2_SERR
B42
B43 S2_CBE1 S2_AD14
B44
B45
B46 S2_AD12 S2_AD10 S2_M66EN
B47
B48
B49
B50
B51 S2_AD8 S2_AD7
B52
B53
B54 S2_AD5 S2_AD3
B55
B56
B57 S2_AD1
S2_ACK64
B58
B59
B60
IOV
B61
B62
NC_S2_RSVDB63
B63
B64 S2_CBE6 S2_CBE4
B65
B66
IOV
B67 S2_AD63 S2_AD61
S2_AD59 S2_AD57
B68
B69
B70
B71
B72
IOV
B73 S2_AD55 S2_AD53
B74
B75
IOV
B76 S2_AD51 S2_AD49
S2_AD47 S2_AD45
B77
B78
B79
B80
B81
IOV
B82 S2_AD43 S2_AD41
B83
B84
IOV
B85 S2_AD39 S2_AD37
S2_AD35 S2_AD33
B86
B87
B88
B89
B90
IOV
B91 NC_S2_RSVDB92 NC_S2_RSVDA92 NC_S2_RSVDB93
B92
B93
IOV
A1
S2_TRST A2 A3 A4
S2_TMS
S2_TDI A5 A6
A
A7
C
S2_PIRQA
S2_PIRQC A8 A9
NC_S2_RSVDA9 A10 A11
A14 A15
NC_S2_RSVDA11
NET_PHYSICAL_TYPE=15MIL
S2_3V3AUX
S2_PCIRST A16 A17
S2_GNT A18 A19 A20
ISO_PME_BUS3
S2_AD30 A21 A22 A23
S2_AD28
S2_AD26 A24 A25 A26
S2_AD24
S2_IDSEL A27 A28 A29
S2_AD22
S2_AD20 A30 A31 A32
S2_AD18
S2_AD16 A33 A34
S2_FRAME A35 A36
S2_TRDY A37 A38
S2_STOP A39 A40 A41
NC_S2_SDONE
NC_S2_SBO A42 A43 A44
S2_PAR
S2_AD15 A45 A46 A47
S2_AD13
S2_AD11 A48 A49
S2_AD9 A50 A51 A52
S2_CBE0 A53 A54
p
A55
S2_AD6
S2_AD4 A56 A57 A58
S2_AD2
S2_AD0 A59 A60
S2_REQ64 A61 A62
A63 A64 A65
S2_CBE7
S2_CBE5 A66 A67 A68
S2_PAR64
S2_AD62 A69 A70 A71
S2_AD60
S2_AD58 A72 A73 A74
S2_AD56
S2_AD54 A75 A76 A77
S2_AD52
S2_AD50 A78 A79 A80
S2_AD48
S2_AD46 A81 A82 A83
S2_AD44
S2_AD42 A84 A85 A86
S2_AD40
S2_AD38 A87 A88 A89
S2_AD36
S2_AD34 A90 A91
S2_AD32 A92 A93 A94B94
NC_S2_RSVDA94
19
19
19
18
18
55
18
21,44
18
18
18
18
19
18,19
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
ROOM=SLOT2
+3.3V_AUX
1 2
FERRITE
1206
SUB*_83009
LM_X05--83009 sub for p/n consolidation
CB158
1 2
22uF 6.3V
18,19
S2_3.3V
NET_PHYSICAL_TYPE=PLANE
18,19
NET_PHYSICAL_TYPE=PLANE
18,19
S2_3.3V
NET_PHYSICAL_TYPE=PLANE
SUB*_78020
50V-20%
.01UF
50V-20%
.01UF
21
SUB*_78020
RB1077
18,19
S2_AD22
21
S2_IDSEL
19
470
Jaguar 2.0 Change: PNP cards not configured, change R 2K to 470 ohm - PN30800
+3.3V
1 2
19,55
19,55
19,55
S2_PRESA
S2_PRESB
S2_M66EN
19,55
S2_XCAP
2.7K-5% R232
50V-20%
.01UF
21
SUB*_78020
LM_X04--Sub for part consolidation
SUB*_78020
50V-20%
CB250
.01UF
.01uF 50V
.01uF 50V
2.7K-5% RB36
21
21
CB6
1 2
CB5
21
2.7K-5%
50V-20%
.01UF
SUB*_78020
21
CB9
21
LM_X04--Sub for part consolidation
22uF 6.3V
1 2
CB208
SUB*_83009
S2_5V
SUB*_83009
22uF 6.3V
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
50V-20%
SUB*_78020
LM_X05--83009 sub for p/n consolidation
1 2
CB273
1 2
.01UF
50V-20%
.01UF
SUB*_78020
SUB*_78020
50V-20%
.01UF
21
SUB*_78020
50V-20%
.01UF
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
50V-20%
1 2
CB162
.01UF
50V-20%
1 2
.01UF
SUB*_78020
SUB*_78020
21
1 2
CB243
1 2
SUB*_78020
50V-20%
.01UF
21
SUB*_78020
PCI 2.1 RECOMMENDED RESISTORS
50V-20%
SUB*_78020
CB348
21
SUB*_78020
1 2
.01UF
50V-20%
.01UF
SUB*_78020
S2_TRST
S2_TCK
21
220
50V-20%
.01UF
CB311
21
220
21
18,19
18,19
19
19
SUB*_78020
50V-20%
CB329
.01UF
CB341
21
50V-20%
.01UF
SUB*_78020
1 2
NET_PHYSICAL_TYPE=60MIL
S2_12V
LM_X04--Sub for part consolidation
50V-20%
.01UF
50V-20%
.01UF
CB217
21
50V-20%
.01UF
SUB*_78020
LM_X04--Sub for part consolidation
NET_PHYSICAL_TYPE=60MIL
S2_N12V
19
19
18,19
S2_3.3V
21
21
2.7K-5%
S2_TDI
S2_TMS
21
SUB*_78020
C88
21
SUB*_78020
2.7K-5%
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
PCIX3_LOCK
PCIX3_IRDY
PCIX3_PERR
PCIX3_TRDY
PCIX3_DEVSEL
PCIX3_SERR
PCIX3_FRAME
PCIX3_STOP
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
17,18,20
PCIX3_AD34 PCIX3_AD36 PCIX3_AD39 PCIX3_AD33 PCIX3_AD35 PCIX3_AD38 PCIX3_AD42 PCIX3_AD32 PCIX3_AD43 PCIX3_AD40 PCIX3_AD37 PCIX3_AD41 PCIX3_AD47 PCIX3_AD46 PCIX3_AD45 PCIX3_AD44 PCIX3_AD51 PCIX3_AD50 PCIX3_AD49 PCIX3_AD48 PCIX3_AD55 PCIX3_AD54 PCIX3_AD53 PCIX3_AD52 PCIX3_AD59 PCIX3_AD58 PCIX3_AD57 PCIX3_AD56 PCIX3_AD63 PCIX3_AD62 PCIX3_AD61 PCIX3_AD60 PCIX3_CBE4 PCIX3_CBE5 PCIX3_CBE6 PCIX3_CBE7 PCIX3_PAR64
PCIX3_REQ64
PCIX3_ACK64
ROOM=PCI3
RNB33
8.2K-5%
RNB33
7 2
8.2K-5%
RNB32
8.2K-5%
RNB32
5 4
8.2K-5%
RNB50
8.2K-5%
RNB44
8.2K-5%
RNB41
8.2K-5%
RNB39
8.2K-5%
RNB38
8.2K-5%
RNB37
8.2K-5%
RNB36
8.2K-5%
RNB35
8.2K-5%
RNB34
8.2K-5%
1 2
8.2K-5%
RB186
8.2K-5%
36
18
RNB50
8.2K-5%
RNB44
8.2K-5%
RNB41
8.2K-5%
RNB39
8.2K-5%
RNB38
8.2K-5%
RNB37
8.2K-5%
RNB36
8.2K-5%
RNB35
8.2K-5%
RNB34
8.2K-5%
72
RNB50
8.2K-5%
72
RNB44
8.2K-5%
72
RNB41
8.2K-5%
72
RNB39
8.2K-5%
72
RNB38
8.2K-5%
72
RNB37
8.2K-5%
72
RNB36
8.2K-5%
72
RNB35
8.2K-5%
72
RNB34
8.2K-5%
21
8.2K-5%
7 2
8.2K-5%
8.2K-5%
5 4
8.2K-5%
RNB50
8.2K-5%
RNB44
8.2K-5%
RNB41
8.2K-5%
RNB39
8.2K-5%
RNB38
8.2K-5%
RNB37
8.2K-5%
RNB36
8.2K-5%
RNB35
8.2K-5%
RNB34
8.2K-5%
RB187
1 2
8.2K-5%
RNB32
36
RNB32
RNB33
18
RNB33
+3.3V
54
54
54
54
54
54
54
54
54
1
+3.3V
2
3
PCI 64-3.3V
SKT
SUB*_1956U
Green Conn
PCI2
4 4
PCIX BUS 3
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
12/5/2003
A02
SHEET
19 OF 63
A B
DC
Page 20
B D
CA
12-5-2003_10:50
ROOMS COMPLETE
1
ROOM=SLOT3
S3_SENSE_5V
20
NET_PHYSICAL_TYPE=PLANE
S3_EN_GATE
20
VCC +3.3V
SUB*_24044
.01-1%
21
R46
20
S3_SENSE_3V
SUB*_24044
.01-1%
R69
21
NET_PHYSICAL_TYPE=PLANE
8765
QB6
SI4410DY SI4410DY
4
SI4410DY
Q2
4
31 2
8765
Q9
S3_EN_GATE
20
SI4410DY
4
31 2
8765
31 2
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
17-19
17-19
17-19
17-19
17-19
17-19
17-19
17-19
17-19
17-19
20,55
PCIX3_AD61 PCIX3_AD60 PCIX3_AD59 PCIX3_AD58 PCIX3_AD57 PCIX3_AD56 PCIX3_AD54 PCIX3_AD55 PCIX3_AD53 PCIX3_AD52
S3_QS_EN
SUB*_8174U
VCC
8765
LM_X04--Sub for part consolidation
50V-20%
4
.01UF
1 2
31 2
SUB*_78020
+3.3V
17-19
17-19
17-19
17-19
17-19
17-19
17-19
17-19
17-19
17-19
PCIX3_AD51 PCIX3_AD50 PCIX3_AD49 PCIX3_AD48 PCIX3_AD46 PCIX3_AD47 PCIX3_AD45 PCIX3_AD44 PCIX3_AD43 PCIX3_AD42
VCC
VCC
U91
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
U99
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
S3_AD61 S3_AD60 S3_AD59 S3_AD58 S3_AD57 S3_AD56 S3_AD54 S3_AD55 S3_AD53 S3_AD52
S3_AD51 S3_AD50 S3_AD49 S3_AD48 S3_AD46 S3_AD47 S3_AD45 S3_AD44 S3_AD43 S3_AD42
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
+3.3V
17,18
17,18
17,18
17,18
17,18
17,18
17,18
17,18
17,18
17,18
20,55
17,18
17,18
17,18
17,18
17-19
17-19
17-19
17-19
17-19
17-19
PCIX3_AD27 PCIX3_AD26 PCIX3_AD25 PCIX3_AD24 PCIX3_CBE3 PCIX3_AD23 PCIX3_AD22 PCIX3_AD21 PCIX3_AD20 PCIX3_AD19
S3_QS_EN
PCIX3_AD18 PCIX3_AD17 PCIX3_AD16 PCIX3_CBE2 PCIX3_FRAME PCIX3_IRDY PCIX3_TRDY PCIX3_DEVSEL PCIX3_STOP PCIX3_LOCK
VCC
SUB*_8174U
VCC
U43
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
U55
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
S3_AD27 S3_AD26 S3_AD25 S3_AD24 S3_CBE3 S3_AD23 S3_AD22 S3_AD21 S3_AD20 S3_AD19
S3_AD18 S3_AD17 S3_AD16 S3_CBE2 S3_FRAME S3_IRDY S3_TRDY S3_DEVSEL S3_STOP S3_LOCK
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
1
2
50V-20%
.01UF
SUB*_78020
1 2
+3.3V
RB182
1 2
20,55
20
S3_PWR_FAULT S3_EN_GATE
S3_SENSE_3V
20
0.1uF 16V C42
1 2
S3_5V
SUB*_63206
12.1K1% is sub p/n
21
1 2
100-5%
1
M12VIN
2
FLT
3
3V5VG
4
VCC
5
12VIN
6
3VISEN
7
3VS
8
OCSET
UB5
HIP1011CB
SUB*_7372P
M12VO M12VG
GND
5VISEN
5VS
PWRON
16
S3_N12V
15
S3_N12VG
14
S3_12VG 13 12
S3_12V 11
S3_SENSE_5V 10 9
S3_PWR_EN
1 2
S3_3.3V
20,21
20
20
20,21
20
55
0.1uF 16V 1 2
21
VCC
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
SUB*_78020
+3.3V
1 2
+3.3V
20,55
17-19
17-19
17-19
17-19
17-19
17-19
17-19
17-19
17-19
17-19
20,55
40
40
40
40
17,18
17,18
17,18
17,18
20,55
17
17
S3_QS_EN
PCIX3_AD41 PCIX3_AD40 PCIX3_AD39 PCIX3_AD38 PCIX3_AD37 PCIX3_AD36 PCIX3_AD35 PCIX3_AD33 PCIX3_AD34 PCIX3_AD32
S3_QS_EN
PIRQ_7 PIRQ_8 PIRQ_9 PIRQ_10
PCIX3_GNT1 PCIX3_REQ1 PCIX3_AD30 PCIX3_AD31 PCIX3_AD29 PCIX3_AD28
S3_QS_EN
SUB*_8174U
VCC
SUB*_8174U
VCC
SUB*_8174U
1 12
ON GND
5C6800 QSOP24
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
U32
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S3_AD41 S3_AD40 S3_AD39 S3_AD38 S3_AD37 S3_AD36 S3_AD35 S3_AD33 S3_AD34 S3_AD32
S3_PIRQA S3_PIRQB S3_PIRQC S3_PIRQD S3_GNT S3_REQ S3_AD30 S3_AD31 S3_AD29 S3_AD28
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
VCC VCC
+3.3V
+3.3V
20,55
17-19
17-19
17,18
17,18
17,18
17,18
17,18
17,18
17,18
17,18
20,55
17,18
17,18
17,18
17,18
17,18
17,18
17,18
17,18
17,18
17,18
20,55
S3_QS_EN
PCIX3_PERR PCIX3_SERR PCIX3_PAR PCIX3_AD15 PCIX3_CBE1 PCIX3_AD14 PCIX3_AD13 PCIX3_AD12 PCIX3_AD11 PCIX3_AD10
S3_QS_EN
PCIX3_AD9 PCIX3_CBE0 PCIX3_AD8 PCIX3_AD7 PCIX3_AD6 PCIX3_AD5 PCIX3_AD4 PCIX3_AD3 PCIX3_AD2 PCIX3_AD1
S3_QS_EN
SUB*_8174U
VCC
SUB*_8174U
VCC
SUB*_8174U
13
BIASV
1 12
ON GND
5C6800 QSOP24
U64
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
U72
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S3_PERR S3_SERR S3_PAR S3_AD15 S3_CBE1 S3_AD14 S3_AD13 S3_AD12 S3_AD11 S3_AD10
S3_AD9 S3_CBE0 S3_AD8 S3_AD7 S3_AD6 S3_AD5 S3_AD4 S3_AD3 S3_AD2 S3_AD1
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
2
3
20,55
20,21
20,21
S3_PWR_FAULT
S3_EN_GATE
20
S3_12V
S3_N12V
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
17,18
17-19
17-19
17-19
17-19
17-19
17-19
17-19
17-19
17-19
20,55
PCIX3_AD0 PCIX3_ACK64 PCIX3_REQ64 PCIX3_CBE7 PCIX3_CBE6 PCIX3_CBE5 PCIX3_CBE4 PCIX3_PAR64 PCIX3_AD62 PCIX3_AD63
S3_QS_EN
SUB*_8174U
U83
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S3_AD0 S3_ACK64 S3_REQ64 S3_CBE7 S3_CBE6 S3_CBE5 S3_CBE4 S3_PAR64 S3_AD62 S3_AD63
21
21
21
21
21
21
21
21
21
21
3
20
20
S3_N12VG
S3_12VG
1 2
.033uF
50V-10%
1 2
.033uF
50V-10%
C19
1 2
.033uF
50V-10%
50V-10%
1 2
100pF
C33
PCI3
4 4
PCIX BUS 3
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
20 OF 63
Page 21
B D
CA
12-5-2003_10:50
ROOMS COMPLETE
1
2
3
20,21
20,21
20,21
16
S3_N12V
S3_5V
S3_3.3V
21
20
20
21,55
21,55
CK_100M_SWSLOT3
20
20
20
20
20
20
20
20
20
20
20
20
20
21,55
20
20
20
20
20
20
20
21,55
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20,21
20,21
20,21
Side B
S3_3.3V
S3_5V
S3_12V
Side A
B1
S3_TCK
NC_S3_TDO
B2 B3 B4
p
B5
B6 S3_PIRQB S3_PIRQD S3_PRESA NC_S3_RSVDB10 S3_PRESB
NC_S3_RSVDB14
B7
B8
B9
B10 B11
B14
B D
IOV
B15 B16
IOV
B17
S3_REQ
S3_AD31 S3_AD29
B18 B19 B20 B21
IOV
B22 S3_AD27 S3_AD25
B23
B24
B25 S3_CBE3 S3_AD23
B26
B27
B28 S3_AD21 S3_AD19
B29
B30
B31 S3_AD17 S3_CBE2
B32
B33
B34 S3_IRDY
B35
B36 S3_DEVSEL S3_XCAP S3_LOCK S3_PERR
B37
B38
B39
B40
B41 S3_SERR
B42
B43 S3_CBE1 S3_AD14
B44
B45
B46 S3_AD12 S3_AD10 S3_M66EN
B47
B48
B49
B50
B51 S3_AD8 S3_AD7
B52
B53
B54 S3_AD5 S3_AD3
B55
B56
B57 S3_AD1
S3_ACK64
B58
B59
B60
IOV
B61
B62
NC_S3_RSVDB63
B63
B64 S3_CBE6 S3_CBE4
B65
B66
IOV
B67 S3_AD63 S3_AD61
S3_AD59 S3_AD57
B68
B69
B70
B71
B72
IOV
B73 S3_AD55 S3_AD53
B74
B75
IOV
B76 S3_AD51 S3_AD49
S3_AD47 S3_AD45
B77
B78
B79
B80
B81
IOV
B82 S3_AD43 S3_AD41
B83
B84
IOV
B85 S3_AD39 S3_AD37
S3_AD35 S3_AD33
B86
B87
B88
B89
B90
IOV
B91 NC_S3_RSVDB92 NC_S3_RSVDA92 NC_S3_RSVDB93
B92
B93
IOV
A1
S3_TRST A2 A3 A4
S3_TMS
S3_TDI A5 A6
A
A7
C
S3_PIRQA
S3_PIRQC A8 A9
NC_S3_RSVDA9 A10 A11
A14 A15
NC_S3_RSVDA11
NET_PHYSICAL_TYPE=15MIL
S3_3V3AUX
S3_PCIRST A16 A17
S3_GNT A18 A19 A20
ISO_PME_BUS3
S3_AD30 A21 A22 A23
S3_AD28
S3_AD26 A24 A25 A26
S3_AD24
S3_IDSEL A27 A28 A29
S3_AD22
S3_AD20 A30 A31 A32
S3_AD18
S3_AD16 A33 A34
S3_FRAME A35 A36
S3_TRDY A37 A38
S3_STOP A39 A40 A41
NC_S3_SDONE
NC_S3_SBO A42 A43 A44
S3_PAR
S3_AD15 A45 A46 A47
S3_AD13
S3_AD11 A48 A49
S3_AD9 A50 A51 A52
S3_CBE0 A53 A54
p
A55
S3_AD6
S3_AD4 A56 A57 A58
S3_AD2
S3_AD0 A59 A60
S3_REQ64 A61 A62
A63 A64 A65
S3_CBE7
S3_CBE5 A66 A67 A68
S3_PAR64
S3_AD62 A69 A70 A71
S3_AD60
S3_AD58 A72 A73 A74
S3_AD56
S3_AD54 A75 A76 A77
S3_AD52
S3_AD50 A78 A79 A80
S3_AD48
S3_AD46 A81 A82 A83
S3_AD44
S3_AD42 A84 A85 A86
S3_AD40
S3_AD38 A87 A88 A89
S3_AD36
S3_AD34 A90 A91
S3_AD32 A92 A93 A94B94
NC_S3_RSVDA94
21
21
21
20
20
55
20
19,44
20
20
20
20,21
21
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
+3.3V_AUX
1 2
FERRITE
1206
LM_X05--83009 sub for p/n consolidation
ROOM=SLOT3
CB157
1 2
22uF 6.3V
SUB*_83009
21,55
21,55
21,55
S3_PRESA
S3_PRESB
S3_M66EN
21,55
50V-20%
.01UF
SUB*_78020
LM_X04--Sub for part consolidation
S3_XCAP
1 2
2.7K-5% RB155
21
20,21
S3_3.3V
LM_X04--Sub for part consolidation
NET_PHYSICAL_TYPE=PLANE
SUB*_78020
20,21
22uF 6.3V
SUB*_83009
S3_5V
1 2
CB206
50V-20%
.01UF
SUB*_78020
LM_X05--83009 sub for p/n consolidation
50V-20%
1 2
.01UF
LM_X04--Sub for part consolidation
1 2
50V-20%
SUB*_78020
.01UF
NET_PHYSICAL_TYPE=PLANE
CB281
21
SUB*_78020
50V-20%
.01UF
CB276
21
50V-20%
.01UF
SUB*_78020
20,21
S3_3.3V
SUB*_83009
22uF 6.3V
1 2
50V-20%
.01UF
SUB*_78020
NET_PHYSICAL_TYPE=PLANE
LM_X04--Sub for part consolidation
50V-20%
.01UF
SUB*_78020
21
SUB*_78020
50V-20%
.01UF
21
50V-20%
.01UF
SUB*_78020
CB272
21
SUB*_78020
50V-20%
.01UF
1 2
50V-20%
.01UF
SUB*_78020
1 2
CB353
RB1078
20,21
S3_AD24
21
S3_IDSEL
21
470
Jaguar 2.0 Change: PNP cards not configured, change R 2K to 470 ohm - PN 30800
+3.3V
50V-20%
CB248
.01UF
.01uF 50V
.01uF 50V
2.7K-5% RB106
21
21
SUB*_78020
CB223
1 2
CB229
21
50V-20%
CB130
2.7K-5% R117
21
SUB*_78020
.01UF
21
CB116
1 2
SUB*_78020
50V-20%
.01UF
50V-20%
.01UF
SUB*_78020
1 2
CB122
21
50V-20%
.01UF
CB318
21
SUB*_78020
PCI 2.1 RECOMMENDED RESISTORS
S3_TRST
S3_TCK
220
21
21
21
50V-20%
.01UF
SUB*_78020
20,21
SUB*_78020
50V-20%
.01UF
20,21
220
S3_TDI
21
S3_TMS
21
SUB*_78020
50V-20%
CB187
1 2
.01UF
SUB*_78020
50V-20%
.01UF
21
50V-20%
CB166
1 2
.01UF
21
SUB*_78020
NET_PHYSICAL_TYPE=60MIL
S3_12V
LM_X04--Sub for part consolidation
50V-20%
.01UF
50V-20%
.01UF
21
SUB*_78020
LM_X04--Sub for part consolidation
21
CB257
SUB*_78020
50V-20%
.01UF
SUB*_78020
NET_PHYSICAL_TYPE=60MIL
S3_N12V
21
21
20,21
21
S3_3.3V
21
R97
2.7K-5%
21
C89
21
2.7K-5%
1
2
3
PCI 64-3.3V
SKT
SUB*_1956U
Green Conn
PCI3
4 4
PCIX BUS 3
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
12/5/2003
A02
SHEET
21 OF 63
A B
DC
Page 22
GB_5V_AUX
59
B D
CA
ROOM=GB_5700
+3.3V
22,23,59
GB_3.3V_AUX
GB_1.8V_FP
22,23,54
1
2
3
4
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24,41
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,22,24
17,24
17,24,41
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
17,24
REQ GNT
PME
T26 T25 U26 V26 V25 W25 W26 AA26 AA25 Y24AE10 Y26 Y25 W24 V24 U23 U24 L25 K25 K24 J24 H24 H23 G24 G23 F25 G25 G26 H26 H25 J26 J25 K26 B25 A25 A26 B26 E26 E25 F24 F26 A8 B8 B7 A9 B9 A10 A13 A11 C17 B15 B13 B11 A12 B10 B12 C10 E24 E23 D25 D26 C26 C25 B24 D24
C23
A22 B19 B23 B20 C20 B22 C19 A23
A24 B14 A14 C24 L24 L26 R25 R26
AC3 AF5 AE6A17 AE5 AD7 AE7 V3 AF6 AF7
PCI1_FRAME PCI1_IRDY PCI1_TRDY PCI1_DEVSEL PCI1_STOP PCI1_PAR PIRQ_6 PCI1_PERR PCI1_SERR
AC2
PCI1_BRDCM_REQ
Y1
PCI1_BRDCM_GNT
W2
PCI1_PCIRESET
V2 W1
CK_66M_BCM5700 U2 AF20
NC_DATA0 NC_DATA1 NC_DATA2 NC_DATA3 NC_DATA4 NC_DATA5 NC_DATA6 NC_DATA7 NC_DATA8 NC_DATA9 NC_DATA10 NC_DATA11 NC_DATA12 NC_DATA13 NC_DATA14 NC_DATA15 NC_DATA16 NC_DATA17 NC_DATA18 NC_DATA19 NC_DATA20 NC_DATA21 NC_DATA22 NC_DATA23 NC_DATA24 NC_DATA25 NC_DATA26 NC_DATA27 NC_DATA28 NC_DATA29 NC_DATA30 NC_DATA31 NC_DATA32 NC_DATA33 NC_DATA34 NC_DATA35 NC_DATA36 NC_DATA37 NC_DATA38 NC_DATA39 NC_DATA40 NC_DATA41 NC_DATA42 NC_DATA43 NC_DATA44 NC_DATA45 NC_DATA46 NC_DATA47 NC_DATA48 NC_DATA49 NC_DATA50 NC_DATA51 NC_DATA52 NC_DATA53 NC_DATA54 NC_DATA55 NC_DATA56 NC_DATA57 NC_DATA58 NC_DATA59 NC_DATA60 NC_DATA61 NC_DATA62 NC_DATA63
NC_BW7 NC_BW6 NC_BW5 NC_BW4 NC_BW3 NC_BW2 NC_BW1
NC_BW0
NC_PAR7 NC_PAR6 NC_PAR5 NC_PAR4 NC_PAR3 NC_PAR2 NC_PAR1 NC_PAR0
PCI1_GB_IDSEL
PCI1_PAR64 PCI1_M66EN PCI1_ACK64
GB_5700_VAUX_PRSNT
2.2K-5%
PCI1_AD0 PCI1_AD1 PCI1_AD2 PCI1_AD3 PCI1_AD4 PCI1_AD5 PCI1_AD6 PCI1_AD7 PCI1_AD8 PCI1_AD9 PCI1_AD10 PCI1_AD11 PCI1_AD12 PCI1_AD13 PCI1_AD14 PCI1_AD15 PCI1_AD16 PCI1_AD17 PCI1_AD18 PCI1_AD19 PCI1_AD20 PCI1_AD21 PCI1_AD22 PCI1_AD23 PCI1_AD24 PCI1_AD25 PCI1_AD26 PCI1_AD27 PCI1_AD28 PCI1_AD29 PCI1_AD30 PCI1_AD31 PCI1_AD32 PCI1_AD33 PCI1_AD34 PCI1_AD35 PCI1_AD36 PCI1_AD37 PCI1_AD38 PCI1_AD39 PCI1_AD40 PCI1_AD41 PCI1_AD42 PCI1_AD43 PCI1_AD44 PCI1_AD45 PCI1_AD46 PCI1_AD47 PCI1_AD48 PCI1_AD49 PCI1_AD50 PCI1_AD51 PCI1_AD52 PCI1_AD53 PCI1_AD54 PCI1_AD55 PCI1_AD56 PCI1_AD57 PCI1_AD58 PCI1_AD59 PCI1_AD60 PCI1_AD61 PCI1_AD62 PCI1_AD63
NC_ADDR23 NC_ADSC NC_ADDR22 NC_ADDR21 NC_ADDR20 NC_ADDR19 NC_ADDR18 NC_ADDR17 NC_ADDR16 NC_ADDR15 NC_ADDR14 NC_ADDR13 NC_ADDR12 NC_ADDR11 NC_ADDR10 NC_ADDR9 NC_ADDR8 NC_ADDR7 NC_ADDR6 NC_ADDR5 NC_ADDR4 NC_ADDR3
AE9 AF9 AE8 AD9 AD3 AF4 AE3 AF3 AB3 AE2 AD2 AF2 AB2 AE1 AA3 AD1
Y2
AC1
W3
AB1 AB24 AB26 AC24 AB25 AC23 AC25 AD23 AD24 AC22 AD26 AE24 AD25 AE23 AE26 AD22 AE25 AD21 AF26 AD20 AF25 AD19 AF24 AD18 AF23 AE18 AE22 AD17 AF22 AD16 AF21 AE21 AE20
C9
A7 N24 N25 P25 P26 P24 U25 T24 R24 R23 A15 C18 A21 B21 L23 M23 M24 N26 M26 M25
AD_00 AD_01 AD_02 AD_03 AD_04 AD_05 AD_06 AD_07 AD_08
AD_10 AD_11 AD_12 AD_13 AD_14 AD_15 AD_16 AD_17 AD_18 AD_19 AD_20 AD_21 AD_22 AD_23 AD_24 AD_25 AD_26 AD_27 AD_28 AD_29 AD_30 AD_31 AD_32 AD_33 AD_34 AD_35 AD_36 AD_37 AD_38 AD_39 AD_40 AD_41 AD_42 AD_43 AD_44 AD_45 AD_46 AD_47 AD_48 AD_49 AD_50 AD_51 AD_52 AD_53 AD_54 AD_55 AD_56 AD_57 AD_58 AD_59 AD_60 AD_61 AD_62 AD_63
ADDR_23 ADDR_22 ADDR_21 ADDR_20 ADDR_19 ADDR_18 ADDR_17 ADDR_16 ADDR_15 ADDR_14 ADDR_13 ADDR_12 ADDR_11 ADDR_10 ADDR_09 ADDR_08 ADDR_07 ADDR_06 ADDR_05 ADDR_04 ADDR_03
DATA_00 DATA_01 DATA_02 DATA_03 DATA_04 DATA_05 DATA_06 DATA_07 DATA_08 DATA_09AD_09 DATA_10 DATA_11 DATA_12 DATA_13 DATA_14 DATA_15 DATA_16 DATA_17 DATA_18 DATA_19 DATA_20 DATA_21 DATA_22 DATA_23 DATA_24 DATA_25 DATA_26 DATA_27 DATA_28 DATA_29 DATA_30 DATA_31 DATA_32 DATA_33 DATA_34 DATA_35 DATA_36 DATA_37 DATA_38 DATA_39 DATA_40 DATA_41 DATA_42 DATA_43 DATA_44 DATA_45 DATA_46 DATA_47 DATA_48 DATA_49 DATA_50 DATA_51 DATA_52 DATA_53 DATA_54 DATA_55 DATA_56 DATA_57 DATA_58 DATA_59 DATA_60 DATA_61 DATA_62 DATA_63
BWE_7 BWE_6 BWE_5 BWE_4 BWE_3 BWE_2 BWE_1 BWE_0
PARRAM_7 PARRAM_6 PARRAM_5 PARRAM_4 PARRAM_3 PARRAM_2 PARRAM_1 PARRAM_0
FRAME
NC_5700_A17
TRDYSSRAM_CLK
DEVSEL
PCI1_CBE0 PCI1_CBE1 PCI1_CBE2 PCI1_CBE3 PCI1_CBE4 PCI1_CBE5 PCI1_CBE6 PCI1_CBE7
AF8 AE4 AF1
CBE_0 CBE_1 CBE_2 CBE_3 CBE_4 CBE_5 CBE_6 CBE_7
PARPCI
IDSEL
PCI_RST PCI_CLK
NC_5700_WE
C21
WE
PAR64
NC_5700_OE
C22 AF12
OE M66EN
ACK64
NC_5700_CS1 NC_CS0
A19 A20
REQ64
VAUX_PRSNT
BCM5700 TRIPLE SPEED
LAN CONTROLER 9-20-00
SUB=SUB*_0F828
RB395
21
NP*
4.7K-5% RN132
3 6
4.7K-5% RN132
8
VCC
1
A0
2
A1
3
A2
4
GND
SCL SDA
WP
6 5
GB_EECLK_5V
GB_EEDATA_5V
7
54
D 3
Q27
24C32
SUB*_3C355
U138 was originally 24C32, then 3785T, and as of Jag 2.0 it is 3C355 (same exact part as 3785T but new part #)
3785T BCM SEEPROM 5V
KLM_X04 -- ADDED IDSEL DISABLE CIRCUIT
3C355 BCM SEEPROM 3.3V
17,24
17,24
17,24
17,24
17,24
17,24
40
17,24
17,24
16
17,24
17
17,24
22,23,59
SUB*_30416
DELAY_RULE=:::250
17,22,24
PCI1_AD22
3 D
1 2
2.7K-5% RB400
PU_GB_5700_DIS_CKT
Q32
2N7002
GPO_GB_IDSEL_DIS
44
22
17
17
17,59
SD_X04 -- Changed 5700 Disable to IDSEL method
PCI1_REQ64
1
G
23
23
23
23
23
23
23
23
23
23
23
17,24
GB_3.3V_AUX
RB396
21
1
G
2N7002
Q30
D
3
S
2
GB_TXD0 GB_TXD1 GB_TXD2 GB_TXD3 GB_TXD4
GB_TXD5 GB_TXD6 GB_TXD7
GB_TXEN GB_TXER
GB_GTX_CLK
2 S
8.2K-5% R530
12
NC_TX_1 NC_TX_8
22,23,59
SUB*_9627P
100-5%
1 8
1 2
GB_3.3V_AUX
12
PCI1_GB_IDSEL
1 3
DB1
59
23
RB378
10K-5%
RN135
54
47-5%
RN135
RN135
47-5% 47-5% RN134
3 6
72
RN134
47-5% 47-5%
RN133 RN133
4 5
63
47-5% 47-5%
47-5%
RN133
72
47-5%
NC_TX_4 NC_TX_5
22,23,59
GB_3.3V_AUX
10K-5%
RB371
21
4.7K-5% RN132
2N7002
G
1
S
2N7002
2
G
1
72
Q26
D 3
LM_X04--9627P sub for p/n consolidation
GPO_VAUX_ENABLE GPO_RST_BCM5700 NC_GB_GPIO_2
23
23
23
23
23
23
23
23
23
23
23
23
21
PD_5700_C6 GB_RX_CLK
23
RN135
3 6
72
47-5% RN134
54
47-5% RN134
1 8
S 2
22
GB_RXD0 GB_RXD1 GB_RXD2 GB_RXD3 GB_RXD4 GB_RXD5 GB_RXD6 GB_RXD7
GB_RXDV GB_RXER
GB_COL
GB_CRS
RGB_TXD0 RGB_TXD1 RGB_TXD2 RGB_TXD3 RGB_TXD4 RGB_TXD5 RGB_TXD6 RGB_TXD7
47-5%
RGB_TXEN RGB_TXER
GB_CLK125
23
RGB_GTX_CLK
GB_TX_CLK
23
RN133
81
47-5%
1 2
1000pF
50V-10%
CB545
G
1
1 2
2N7002
1000pF
50V-10%
16V 10%
1 2
CB121
CB608
1000pF
50V-10%
.01uF 50V
Q37
S 2
D 3
GPE_PME_BUS1
1 8
4.7K-5% RN132
C6
GPIO_0
N4
GPIO_1 GPIO_2
A1
A2
B1
B2
C1
C2
D1
D2
E1
RX_DV/RXD8
E2
RX_ER/RXD9
A4
COL
A3
CRS
G2
RX_CLK0
F1
RX_CLK1
M1
M2
L1
L2
K1
K2
J1
J2
H1
TX_EN/TXD8
H2
TX_ER/TXD9
A5
TX_CLKIN
G1
TX_CLKOUT
N1
MII_TCLK
1 2
CB618
21
470
1 2
.01uF 50V
CB530
0.1uF 16V
GB_EECLK
GB_EEDATA
BCM5700 TRIPLE SPEED
LAN CONTROLER 9-20-00
1 2
.01uF 50V
CB556
.01uF 50V
44
1 2
CB149
0.1uF 16V
1000pF
50V-10%
0.1uF 16V
CB615
22
22
VESD_1 VESD_2 VESD_3
LNKRDY
EECLK
EEDATA
LED_EMODE LED_FMODE LED_GMODE
LED_TRAFFIC
TVCOI
TDI
TMS TDO
MDINT
MDC
1 2
1000pF
CB131
CB529
1000pF
CB566
50V-10%
+3.3V
CB550
.01uF 50V
CB586
.01uF 50V
GB_1.8V_FP
CB627
0.1uF 16V
CB553
.01uF 50V
CB587
1000pF
50V-10%
CB602
.01uF 50V
CB555
1000pF
50V-10%
+3.3V
AA1 AF16 AC26
B4
B6
A6
R1 P3 P2 P1
R2
GB_LINKLED
GB_EECLK
GB_EEDATA
NC_5700_R1 NC_5700_P3 NC_5700_P2 NC_5700_P1
NC_5700_R2
23
22
22
RB377
L4
GB_5700_TEST
1 2
10K-5%
G4 J3 H4 L3 J4
M3
N3 N2
GB_5700_TRST NC_5700_J3 5700_PD_TCLK NC_5700_L3 NC_5700_J4
RB1100
1 2
GB_MDIO
GB_MDC
NP*
GB_MINT
23
23
Jaguar 2.0 change:
Add series 0 ohm resistor to GB_MDC
16V 10%
CB570
50V-10%
0.1uF 16V
CB546
1000pF
50V-10%
CB534
.01uF 50V
CB630
.01uF 50V
22,23,54
23
22,23,59
22,23,54
CB588
.01uF 50V
1 2
GB_3.3V_AUX
RB376
1 2
10K-5%
GB_1.8V_FP
CB535
0.1uF 16V
CB538
RB379
RB398
2 1
CB623
0.1uF 16V
22,23,59
21
L52
2.2uF 16V
0.1uF 16V
0.1uF 16V
CB607
GB_3.3V_AUX
+3.3V
0.1uF 16V
12
12
CB569
CB584
0.1uF 16V
CB552
.01uF 50V
CB559
0.1uF 16V
1000pF
CB598
50V-10%
CB603
1000pF
50V-10%
1000pF
50V-10%
CB554
.01uF 50V
CB576
0.1uF 16V
SD_X04 -- changed 3 clamp pins to regular 3.3v
R3
VDDIO33_R3
R4
VDDIO33_R4
T4
VDDIO33_T4
VSSIO_A16 VSSIO_A18
B3
VDDIO33_GMII_B3
C3
VDDIO33_GMII_C3
C5
VDDIO33_GMII_C5
D4
VDDIO33_GMII_D4
D6
VDDIO33_GMII_D6
E3
VDDIO33_GMII_E3
E4
VDDIO33_GMII_E4
F3
VDDIO33_GMII_F3
VSSIO_AA4
VSSIO_AA23
VSSIO_AC4 VSSIO_AC7
VSSIO_AC9 VSSIO_AC10 VSSIO_AC11 VSSIO_AC12 VSSIO_AC13
AA2 AB4
AC5 AC6
AC8 AC14 AC15 AC18 AC21
AD4
AD5
AD8 AD11 AE13
U4 Y3 Y4
VDDIO33_PCI_AA2 VDDIO33_PCI_AB4 VDDIO33_PCI_AB23 VDDIO33_PCI_AC5 VDDIO33_PCI_AC6 VDDIO33_PCI_AC8 VDDIO33_PCI_AC14 VDDIO33_PCI_AC15 VDDIO33_PCI_AC18 VDDIO33_PCI_AC21 VDDIO33_PCI_AD4 VDDIO33_PCI_AD5 VDDIO33_PCI_AD8 VDDIO33_PCI_AD11 VDDIO33_PCI_AE13 VDDIO33_PCI_U4 VDDIO33_PCI_Y3 VDDIO33_PCI_Y4
VSSIO_AC16 VSSIO_AC17 VSSIO_AC19 VSSIO_AC20
VSSIO_AD6 VSSIO_AD10 VSSIO_AD12
VSSIO_B5 VSSIO_B16 VSSIO_B18
VSSIO_C4 VSSIO_C11 VSSIO_C12 VSSIO_C16
VSSIO_D3
VSSIO_D5
VSSIO_D7
VSSIO_D8 VSSIO_D11
B17
VDDIO33_SRAM_B17
C7
VDDIO33_SRAM_C7
C8
VDDIO33_SRAM_C8
C13
VDDIO33_SRAM_C13
C14
VDDIO33_SRAM_C14
C15
VDDIO33_SRAM_C15
D9
VDDIO33_SRAM_D9
D10
VDDIO33_SRAM_D10
D12
VDDIO33_SRAM_D12
D16
VDDIO33_SRAM_D16
D17
VDDIO33_SRAM_D17
D19
VDDIO33_SRAM_D19
D20
VDDIO33_SRAM_D20
D23
VDDIO33_SRAM_D23
F23
VDDIO33_SRAM_F23
J23
VDDIO33_SRAM_J23
N23
VDDIO33_SRAM_N23
T23
VDDIO33_SRAM_T23
V23
VDDIO33_SRAM_V23
VSSIO_D13 VSSIO_D14 VSSIO_D15 VSSIO_D18 VSSIO_D21 VSSIO_D22
VSSIO_F2
VSSIO_F4
VSSIO_G3
VSSIO_H3
VSSIO_K3
VSSIO_K4 VSSIO_K23
VSSIO_M4
VSSIO_P4 VSSIO_P23
VSSIO_V4
VSSIO_W4 VSSIO_W23 VSSIO_Y23
L12
VDDCORE18_L12
L14
VDDCORE18_L14
L16
VDDCORE18_L16
M11
VDDCORE18_M11
M12
VDDCORE18_M12
M14
VDDCORE18_M14
M15
VDDCORE18_M15
M16
VDDCORE18_M16
N14
VDDCORE18_N14
N16
VDDCORE18_N16
P12
VDDCORE18_P12
P16
VDDCORE18_P16
R11
VDDCORE18_R11
R13
VDDCORE18_R13
R15
VDDCORE18_R15
R16
VDDCORE18_R16
T13
VDDCORE18_T13
T15
VDDCORE18_T15
VSSCORE_L11 VSSCORE_L13 VSSCORE_L15 VSSCORE_M13 VSSCORE_N11 VSSCORE_N12 VSSCORE_N13 VSSCORE_N15
VSSCORE_P11 VSSCORE_P13 VSSCORE_P14 VSSCORE_P15 VSSCORE_R12 VSSCORE_R14 VSSCORE_T11 VSSCORE_T12 VSSCORE_T14
T1 T3
U1 T2
ADVDD ADGND
VSSCORE_T16
A3VDD
BCM5700 TRIPLE SPEED
LAN CONTROLER 9-20-00
BROADCOM GIGABIT - MAC (BCM5700/TIGON3)
TITLE
CB560
.01uF 50V
A16 A18 AA4 AA23 AC4 AC7 AC9 AC10 AC11 AC12 AC13 AC16 AC17 AC19 AC20 AD6 AD10 AD12 B5 B16 B18 C4 C11 C12 C16 D3 D5 D7 D8 D11 D13 D14 D15 D18 D21 D22 F2 F4 G3 H3 K3 K4 K23 M4 P4 P23 V4 W4 W23 Y23
L11 L13 L15 M13 N11 N12 N13 N15
P11 P13 P14 P15 R12 R14 T11 T12 T14 T16
V1
1 2
CB601
.01uF 50V
2 1
0.1uF 16V
16V 10%
22,23,59
GB_3.3V_AUX
L53
1 2
2.2uF 16V
COMPUTER CORPORATION
AUSTIN,TEXAS
1
2
3
4
B-0 (P20 MARKED) REV IS P#81EKR B-2 (P22 MARKED) REV IS P#0E246 B-3 (P23 MARKED) REV IS P#0F828
A B
LM_X04--30416 sub for p/n consolidation
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
DC
A02
22 OF 63
Page 23
ROOM=GB_5401
B D
CA
ROOMS COMPLETE
1
2
3
GB_1.8V_FP
A18
B5 B11 C18 E17 F17 G17 H17 J17 K17 M17 P17 V18
W5 Y18
A13 A15 B13 B15
C9 C13 C15
D9 D12 D13 D15 F20 N17
U7
U8
U9 U12 U13 U15
V7
V8
V9 V13 V15 W13 W15 Y13 Y15
B7
C2
C3
D2
D3
D4
D7
F2
F3
F4
G2
G3
H2
H3
H4
K2
K3
K4
L2
L3
L4
N2
N3
N4
P2
P3
R2
R3
R4
U2
U3
U4
V2
V3
U27
OGND_A18 OGND_B5 OGND_B11 OGND_C18 OGND_E17 OGND_F17 OGND_G17 OGND_H17 OGND_J17 OGND_K17 OGND_M17 OGND_P17 OGND_V18 OGND_W5 OGND_Y18
DGND_A13 DGND_A15 DGND_B13 DGND_B15 DGND_C9 DGND_C13 DGND_C15 DGND_D9 DGND_D12 DGND_D13 DGND_D15 DGND_F20 DGND_N17 DGND_U7 DGND_U8 DGND_U9 DGND_U12 DGND_U13 DGND_U15 DGND_V7 DGND_V8 DGND_V9 DGND_V13 DGND_V15 DGND_W13 DGND_W15 DGND_Y13 DGND_Y15
AGND_B7 AGND_C2 AGND_C3 AGND_D2 AGND_D3 AGND_D4 AGND_D7 AGND_F2 AGND_F3 AGND_F4 AGND_G2 AGND_G3 AGND_H2 AGND_H3 AGND_H4 AGND_K2 AGND_K3 AGND_K4 AGND_L2 AGND_L3 AGND_L4 AGND_N2 AGND_N3 AGND_N4 AGND_P2 AGND_P3 AGND_R2 AGND_R3 AGND_R4 AGND_U2 AGND_U3 AGND_U4 AGND_V2 AGND_V3
BCM5401 GIGABIT
ETHERNET TRANSCEIVER
SUB=SUB*_25YEG
22,23,54
OVDD_A4 OVDD_A10 OVDD_A17 OVDD_D18 OVDD_E18 OVDD_F18 OVDD_G18 OVDD_H18 OVDD_J18 OVDD_K18 OVDD_M18 OVDD_P18 OVDD_U18 OVDD_V20
OVDD_Y4 OVDD_Y17
LVDD_A12 LVDD_A14 LVDD_A16 LVDD_B12 LVDD_B14 LVDD_B16 LVDD_C12 LVDD_C14 LVDD_D14 LVDD_U14 LVDD_V12 LVDD_V14 LVDD_W12 LVDD_W14 LVDD_W16 LVDD_Y12 LVDD_Y14 LVDD_Y16
DVDD_A9
DVDD_B9
DVDD_D8 DVDD_F19 DVDD_N18
DVDD_W7
DVDD_W8
DVDD_W9 DVDD_W10
DVDD_Y7
DVDD_Y8 DVDD_Y10 DVDD_L17
AVDD_B6
AVDD_E2
AVDD_E3
AVDD_E4
AVDD_G4
AVDD_J3
AVDD_J4
AVDD_M3
AVDD_M4
AVDD_P4
AVDD_T2
AVDD_T3
AVDD_T4
DLLVDD_A7
BIASVDD_J2 BIASVDD_M2
22,23,59
A4 A10 A17 D18 E18 F18 G18 H18 J18 K18 M18 P18 U18 V20 Y4 Y17
A12 A14 A16 B12 B14 B16 C12 C14 D14 U14 V12 V14 W12 W14 W16 Y12 Y14 Y16
A9 B9 D8 F19 N18 W7 W8 W9 W10 Y7 Y8 Y10
B6 E2 E3 E4 G4 J3 J4 M3 M4 P4 T2 T3 T4
A7
J2 M2
L17
GB_3.3V_AUX
1 2
21
CB153
1000pF
RB128
4.7-5%
50V-10%
GB_1.8V_FP
GB_2.5V_FP
GPO_RST_BCM5700
22
22,23,59
22
22
22
22
22
22
22
22
22,23,54
RB122
1 2
GB_RXD0 GB_RXD1 GB_RXD2 GB_RXD3 GB_RXD4 GB_RXD5 GB_RXD6 GB_RXD7
RB127
6.19K-1%
1 2
1.54K-1%
R equiv is close to 1.24K +/- 1% as possible
23,54
X3
21
25MHz-30ppm
21
21
15pF 50V
L23
21
MMZ2012S601A
1 2
1 2
0.1uF 16V
2.2uF 16V
1 2
NP*
GB_3.3V_AUX
21
4
3
MR
U28
RESETVCC
MAX811_2.63V
0.1uF 16V SUB=SUB*_2E549
GB_2.5V_FP
1 2
15pF 50V
2
23,54
47-5%
3 6
47-5%
4 5
47-5%
22
22
22
22
22
GB_RXDV GB_RXER
GB_COL GB_CRS
GB_RX_CLK
GB_TX_CLK
22
GB_GTX_CLK
22
GB_CLK125
22
rspn
72
1 8
47-5%
47-5%
47-5%
22,23,59
GB_3.3V_AUX
Place these resistors close to BCM5401 (U45)
GB_2.5V_FP
U27
RGB_RXD0
RGB_RXD1
54
RGB_RXD3 RGB_RXD4 RGB_RXD5 RGB_RXD6 RGB_RXD7
47-5%
RGB_RXDV
81
RGB_RXER
72
1 8
63
2 7
47-5%
47-5%
47-5%
GB_RDACDELAY_RULE=:::500
47-5%
54
3 6
47-5%
RGB_COL
RGB_CRS
NC_5401_L20 NC_5401_K20
R51
1 2
47-5% 330-5%
22
22
22
22
22
22
22
22
22
22
RGB_RX_CLK
GB_TXD0 GB_TXD1 GB_TXD2 GB_TXD3 GB_TXD4 GB_TXD5 GB_TXD6 GB_TXD7
GB_TXEN GB_TXER
RGB_TX_CLK
21
47-5%
RGB_CLK125
1 2
47-5%
BCM5401_XIN BCM5401_XOUT
5401_PHY_RST
NC_5401_K1
NC_5401_A19 NC_5401_A20 NC_5401_B1 NC_5401_B18 NC_5401_B19 NC_5401_B20 NC_5401_C1 NC_5401_C6 NC_5401_C7 NC_5401_C16 NC_5401_C17 NC_5401_D6 NC_5401_D16 NC_5401_D17 NC_5401_H1 NC_5401_J1
NC_5401_L18 NC_5401_M1 NC_5401_N1 NC_5401_R17 NC_5401_T17 NC_5401_T18 NC_5401_U6
D19 D20 E19 E20 G19 G20 H19 H20
J19 J20
L1
C19 C20
L20 K20
K19
T19 T20 R19 R20 P19 P20 N19 N20
M19 M20
U20 L19
B17
A6 A5
W11
K1
A19 A20
B1 B18 B19 B20
C1
C6
C7 C16 C17
D6 D16 D17
H1
J1
L18
M1
N1 R17 T17 T18
U6
RX_DV RX_ER
COL CRS
RX_CLK
TX_EN TX_ER
TX_CLK GTX_CLK
CLK125
XTALI XTALO
RESET
NC_A19 NC_A20 NC_B1 NC_B18 NC_B19 NC_B20 NC_C1 NC_C6 NC_C7 NC_C16 NC_C17 NC_D6 NC_D16 NC_D17 NC_H1 NC_J1
NC_L18 NC_M1 NC_N1 NC_R17 NC_T17 NC_T18 NC_U6
PHYA0 PHYA1 PHYA2 PHYA3 PHYA4
FDX HUB
ER
EN_10B
ENRBC
MANMS
EXTLPBK
XOVERSEL
XOVERRX
TRD3+ TRD3-
TRD2+ TRD2-
TRD1+ TRD1-
TRD0+ TRD0-
LINK10
LINK100
LINK1000
FDXLED XMTLED RCVLED
SLAVE
QUALITY
TEST0 TEST1
TRST_B
TDI TCK TMS TDO
MDC
NC_U10 NC_U11 NC_U16 NC_U17
NC_V1
NC_V6 NC_V10 NC_V11 NC_V16 NC_V17
NC_W1
NC_W6 NC_W18 NC_W19
NC_Y6 NC_Y19 NC_Y20
C4 B3 A3 A2 A1 Y5 W4 Y1 Y3 D5 B2 W20 Y2 W3 R18 B4 C5
U1 T1
P1 R1
G1 F1
D1 E1
B8 D11 C11 A8 D10 C10 U19 B10 V19
A11 C8
W2 V5 U5 V4 W17
Y11 Y9
U10 U11 U16 U17 V1 V6 V10 V11 V16 V17 W1 W6 W18 W19 Y6 Y19 Y20
NC_PHYA0_5401_B3RGB_RXD2 NC_PHYA0_5401_A3 NC_PHYA0_5401_A2 NC_PHYA0_5401_A1 NC_FDX_5401_Y5 NC_HUB_5401_W4 NC_ER_5401_Y1 NC_ANEN_5401_Y3 NC_EN_10B_5401_D5 NC_ENRBC_5401_B2 NC_SPD0_5401_W20 NC_SPD1_5401_Y2 NC_MANMS_5401_W3 NC_EXTLBDK_5401_R18 NC_XOVERSEL_5401_B4 NC_XOVERRX_5401_C5
NC_5401_D11 NC_5401_C11 NC_5401_A8
GB_MINT
NC_5401_B10
R52
1 2
330-5%
RB109
330-5%
NC_TDI_5401_V5 NC_TCK_5401_U5 NC_TMS_5401_V4 NC_TDO_5401_W17
NC_5401_U10 NC_5401_U11 NC_5401_U16 NC_5401_U17 NC_5401_V1 NC_5401_V6 NC_5401_V10 NC_5401_V11 NC_5401_V16 NC_5401_V17 NC_5401_W1 NC_5401_W6 NC_5401_W18 NC_5401_W19 NC_5401_Y6 NC_5401_Y19 NC_5401_Y20
1 2
GB_TDR3+ GB_TDR3-
GB_TDR2+
GB_TDR2-
GB_TDR1+ GB_TDR1-
GB_TDR0+ GB_TDR0-
1 2
21
1K-5%
22
GB_QUAL_LED
330-5%
GB_MDIO GB_MDC
GB_LINKLED
GB_ACTLED
1 2
RB115
330-5%
22
22
68nH 300mA
1 2
21
RB118
23
RB397
10K-5%
RB119
49.9-1%
22,23
GREEN
G8_QUAL
22,23,59
21
22,23,59
21
68nH 300mA
21
49.9-1%
13
GB_3.3V_AUX
NP*
GB_3.3V_AUX
21
68nH 300mA
21
RB121
22,23,59
1 2
21
RB120
49.9-1%
GB_3.3V_AUX
21
C30
1000pF
21
68nH 300mA
68nH 300mA
21
RB123
49.9-1%
23
23
23
23
23
23
23
23
GB_2.5V_FP
C81
1 2
50V-10%
1000pF
21
1 2
21
RB124
49.9-1%
21
C17
50V-10%
1 2
21
68nH 300mA
68nH 300mA
21
RB126
49.9-1%
23,54
C13
1000pF
1 2
50V-10%
.1-1%.1-1%.1-1%
1 2
21
RB125
49.9-1%
1000pF
50V-10%
21
22uF 10V
SD_X04 -- Added inductors
SUB*_4H319 SUB*_4H319 SUB*_4H319 SUB*_4H319 SUB*_4H319 SUB*_4H319 SUB*_4H319 SUB*_4H319
68nH 300mA
DELAY_RULE=:::110 DELAY_RULE=:::110 DELAY_RULE=:::110 DELAY_RULE=:::110 DELAY_RULE=:::110 DELAY_RULE=:::110 DELAY_RULE=:::110 DELAY_RULE=:::110
49.9-1%
BE USED ON NEW DESIGNS.
THIS PART IS NOT TO
4 2
1 2
23,54
Subbed to 47nH
22,23,59
23,54
23
23
23
23
23
23
23
23
GB_2.5V_FP
GB_TDR0+
GB_TDR0-
GB_TDR1+
GB_TDR1-
GB_TDR2+
GB_TDR2-
GB_TDR3+
GB_TDR3-
VR1
VOVIN
TAB GND
SC1566IM-1.8V
GB_3.3V_AUX
31
Subbed to Mag/Conn with better common-mode rejection
LM_X05--6J093 is latest Belfuse p/n
May need Heatsink p/n AAVID 573100
Check power dissipation w/heatsink
BE USED ON NEW DESIGNS.
THIS PART IS NOT TO
22uF 10V
C95
BE USED ON NEW DESIGNS.
THIS PART IS NOT TO
GB_1.8V_FP
22uF 10V
1 2
21
22,23,59
GB_3.3V_AUX
R66
8.2K-5%
1 2
23
GB_LINKLED GB_ACTLED
22,23
ENET_1GB
14 13
YELLOW
GREEN
1516
ORANGE
11
1
12
10
4
2
3
6
5
3
6
4
1
2
8
5
7
7
9
4x75ohms to 1000pF 2kV to Shield
10_100_1000_RJ45_MAGNETIC COMBO
8
SUB*_6J093
22,23,54
Jtmax = 125 deg C.
1 2
CB102
0.1uF 16V
Theta JA = 60C/W (for TO-263 pkg). IoMax= 1.5A (35 deg Amb, 3.3V to 1.8V)
R67
BCM5401 GIGABIT
ETHERNET TRANSCEIVER
May need Heatsink p/n AAVID 573100
BE USED ON NEW DESIGNS.
THIS PART IS NOT TO
4 2
22uF 10V
TAB GND
SC1566IM-2.5V
21
VR2
Check power dissipation w/heatsink
BE USED ON NEW DESIGNS.
VOVIN
31
22uF 10V
THIS PART IS NOT TO
1 2
BE USED ON NEW DESIGNS.
THIS PART IS NOT TO
GB_2.5V_FP
22uF 10V
21
1 2
CB147
0.1uF 16V
23,54
Jtmax = 125 deg C. Theta JA = 60C/W (for TO-263 pkg).
B-2 (P22 MARKED) REV IS P#25YEG
22,23,59
GB_3.3V_AUX
IoMax= 1.5A (35 deg Amb, 3.3V to 1.8V)
1
21
ROOM=GB_5401
8.2K-5%
R64
21
R65
1 2
330-5%
2
3
4
GB_3.3V_AUX
21
21
CB111
1000pF
50V-10%
1000pF
50V-10%
1 2
1000pF
CB109
50V-10%
21
21
1000pF
1000pF
50V-10%
1 2
50V-10%
1000pF
50V-10%
21
1 2
CB105
.01uF 50V
1 2
.01uF 50V
21
.01uF 50V
21
.01uF 50V
.01uF 50V
1 2
CB148
1 2
CB100
.01uF 50V
1 2
0.1uF 16V
1 2
0.1uF 16V
21
CB103
0.1uF 16V
21
CB143
50V-10%
1000pF
CB164
50V-10%
.01uF 50V
1 2
1000pF
50V-10%
.01uF 50V
C56
21
CB146
.01uF 50V
1000pF
50V-10%
CB132
1 2
CB110
CB104
1 2
0.1uF 16V
16V 10%
C82
1 2
C83
1000pF
50V-10%
GB_2.5V_FP
21
1000pF
50V-10%
.01uF 50V
1 2
CB145
1000pF
23,54
.01uF 50V
16V 10%
SD_X04 -- added bypass caps for gb emi
1 2
CB119
.01uF 50V
.01uF 50V
21
CB136
.01uF 50V
1 2
CB138
.01uF 50V
.01uF 50V
21
CB161
.01uF 50V
.01uF 50V
1 2
CB141
.01uF 50V
21
CB140
.01uF 50V
.01uF 50V
21
1 2
.01uF 50V
.01uF 50V
CB120
.01uF 50V
.01uF 50V
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
1 2
.01uF 50V
.01uF 50V
CB133
1 2
CB134
0.1uF 16V
.01uF 50V
CB137
0.1uF 16V
CB123
.01uF 50V
CB144
21
16V 10%
.01uF 50V
CB142
.01uF 50V
CB168
.01uF 50V
CB167
.01uF 50V
CB152
CB159
Gigabit Power Rqmts: as of 05/02/2000
Device 1.8V 2.5V 3.3V
5700 .50 -- .15 5401 .50 1.3 .1
Tot 1.00 1.3 .25
BROADCOM GIGABIT - PHY/MAG-RJ45
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
DWG NO.
H3007
12/5/2003
SHEET
4
A02
23 OF 63
A B
DC
Page 24
B D
CA
12-5-2003_10:51
+3.3V
+3.3V
RB342
1 2
10
21
10
1 2
10
50V-20%
.01UF
SUB*_78020
LM_X04--Sub for part consolidation
1
ROOM=960RM
CB631
SUB*_78020
CB525
SUB*_78020
SUB*_78020
12
.01UF
LM_X04--78020 & 83008 sub for p/n consolidation
SUB*_78020
12
.01UF
12
CB536
50V-20%
12
CB524
50V-20%
.01UF
SUB*_78020
.01UF
SUB*_78020
12
CB626
50V-20%
12
CB625
50V-20%
.01UF
50V-20%
.01UF
50V-20%
CB495
2 1
12
CB493
12
CB624
0.1uF 16V
CB491
2 1
0.1uF 16V
CB497
2 1
0.1uF 16V
12
CB544
0.1uF 16V
CB496
2 1
0.1uF 16V
SUB*_83008
SUB*_83008
12
CB539
0.1uF 16V
1uF
10V-10%
1uF
10V-10%
SUB*_78020
12
CB531
SUB*_78020
LM_X04--78020 & 83008 sub for p/n consolidation
.01UF
SUB*_78020
12
CB563
SUB*_78020
.01UF
12
CB526
50V-20%
12
CB648
50V-20%
.01UF
SUB*_78020
.01UF
SUB*_78020
12
CB503
50V-20%
12
CB663
50V-20%
.01UF
50V-20%
.01UF
50V-20%
12
CB591
CB557
2 1
CB527
2 1
0.1uF 16V
12
CB592
0.1uF 16V
12
CB498
0.1uF 16V
CB646
2 1
0.1uF 16V
SUB*_83008
12
CB492
0.1uF 16V
SUB*_83008
CB523
2 1
0.1uF 16V
1uF
10V-10%
1uF
10V-10%
2
3
27
CK_66M_AIC7899
SP_CK_66M_I960_TBD
RB385
1 2
22-5% RB416
22-5%
NP*
AD2 AD5 AD1 AD3 AC2 AC5 AC1 AC4 AB1 AB5 AA2 AB4 AA1 AA5
Y2
AA4
V5 T2 V4 T1 U5 R2 U4 P3 P1 T3 N2 R5 N1 R4 M2 P5
T5 U1 Y1
AB3
L1 M5 L2 N4
S_AD31 S_AD30 S_AD29 S_AD28 S_AD27 S_AD26 S_AD25 S_AD24 S_AD23 S_AD22 S_AD21 S_AD20 S_AD19 S_AD18 S_AD17 S_AD16 S_AD15 S_AD14 S_AD13 S_AD12 S_AD11 S_AD10 S_AD9 S_AD8 S_AD7 S_AD6 S_AD5 S_AD4 S_AD3 S_AD2 S_AD1 S_AD0
S_CBE0 S_CBE1 S_CBE2 S_CBE3 S_CBE4 S_CBE5 S_CBE6 S_CBE7
S_AD63 S_AD62 S_AD61 S_AD60 S_AD59 S_AD58 S_AD57 S_AD56 S_AD55 S_AD54 S_AD53 S_AD52 S_AD51 S_AD50 S_AD49 S_AD48 S_AD47 S_AD46 S_AD45 S_AD44 S_AD43 S_AD42 S_AD41 S_AD40 S_AD39 S_AD38 S_AD37 S_AD36 S_AD35 S_AD34 S_AD33 S_AD32
S_GNT0 S_GNT1 S_GNT2 S_GNT3 S_GNT4 S_GNT5
S_HOLDA
24,27
24,27
24,27
24,27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
PCI2_AD31 PCI2_AD30 PCI2_AD29 PCI2_AD28 PCI2_AD27 PCI2_AD26 PCI2_AD25 PCI2_AD24 PCI2_AD23 PCI2_AD22 PCI2_AD21 PCI2_AD20 PCI2_AD19 PCI2_AD18 PCI2_AD17 PCI2_AD16 PCI2_AD15 PCI2_AD14 PCI2_AD13 PCI2_AD12 PCI2_AD11 PCI2_AD10 PCI2_AD9 PCI2_AD8 PCI2_AD7 PCI2_AD6 PCI2_AD5 PCI2_AD4 PCI2_AD3 PCI2_AD2 PCI2_AD1 PCI2_AD0
PCI2_CBE0 PCI2_CBE1 PCI2_CBE2 PCI2_CBE3 PCI2_CBE4 PCI2_CBE5 PCI2_CBE6 PCI2_CBE7
S_HOLD
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24
PCI2_DEVSEL PCI2_FRAME PCI2_IRDY PCI2_TRDY PCI2_LOCK PCI2_STOP PCI2_PERR PCI2_SERR
W1
S_DEVSEL
Y5
S_FRAME
W2
S_IRDY
Y3
S_TRDY
V3
S_LOCK
W5
S_STOP
V1
S_PERR
U2
S_SERR
S_REQ0 S_REQ1 S_REQ2 S_REQ3 S_REQ4 S_REQ5
S_REQ64
27
PCI2_PCIRST
AE4
S_RST
S_ACK64
R_CK_66M_AIC7899 R_CK_66M_I960PALCLK
SP_CK_66M_I960_2
21
SP_CK_66M_I960_3 SP_CK_66M_I960_4 SP_CK_66M_I960_5
AF3 AF1 AF4 AG1 AF5 AH1
S_CLK0 S_CLK1 S_CLK2 S_CLK3 S_CLK4 S_CLK5
S_M66EN S_PAR64
S_PAR
GC80303 REV 1.0
HETERO 3 OF 5
K3 L5 K1 L4 J2 K5 J1 K4 H2 J5 H1 J4 G2 H5 G1 H3 F3 G5 F1 G4 E2 F5 E1 F4 D2 E5 D1 E4 C2 D4 C1 D3
AE2 AG5 AH3 AH5 AJ5 AL3
AE1 AE5
AK2 AJ1 AG4 AJ4 AK4 AH6
N5
M1
R1 M3 W4
PCI2_AD63 PCI2_AD62 PCI2_AD61 PCI2_AD60 PCI2_AD59 PCI2_AD58 PCI2_AD57 PCI2_AD56 PCI2_AD55 PCI2_AD54 PCI2_AD53 PCI2_AD52 PCI2_AD51 PCI2_AD50 PCI2_AD49 PCI2_AD48 PCI2_AD47 PCI2_AD46 PCI2_AD45 PCI2_AD44 PCI2_AD43 PCI2_AD42 PCI2_AD41 PCI2_AD40 PCI2_AD39 PCI2_AD38 PCI2_AD37 PCI2_AD36 PCI2_AD35 PCI2_AD34 PCI2_AD33 PCI2_AD32
PCI2_GNT0 NC_PCI2_GNT1 NC_PCI2_GNT2 NC_PCI2_GNT3 NC_PCI2_GNT4 NC_PCI2_GNT5
NC_I960_HOLDA I960_HOLD
PCI2_REQ0 PCI2_REQ1 PCI2_REQ2 PCI2_REQ3 PCI2_REQ4 PCI2_REQ5
PCI2_REQ64
PCI2_ACK64
PCI2_PAR64 PCI2_PAR
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
27
24,27
24
24
24
24
24
24,27
24,27
24,27
27
RB386
21
2.7K-5%
PCI2_66MHZ_EN
1 2
66M_DIS
NP0
+3.3V
24
LM_X04--78020 sub for p/n consolidation
2 1
SUB*_78020
.01UF
50V-20%
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22,41
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22,41
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
PCI1_ZION_REQ_DIRECT
24
24,41,59
PCI1_ACK64 PCI1_DEVSEL PCI1_FRAME PCI1_ZION_GNT
17
PCI1_LOCK
17
PCI1_IRDY PCI1_TRDY PCI1_STOP PCI1_PERR PCI1_SERR PCI1_REQ64
PCI_RST_IOP
PCI1_AD31 PCI1_AD30 PCI1_AD29 PCI1_AD28 PCI1_AD27 PCI1_AD26 PCI1_AD25 PCI1_AD24 PCI1_AD23 PCI1_AD22 PCI1_AD21 PCI1_AD20 PCI1_AD19 PCI1_AD18 PCI1_AD17 PCI1_AD16 PCI1_AD15 PCI1_AD14 PCI1_AD13 PCI1_AD12 PCI1_AD11 PCI1_AD10 PCI1_AD9 PCI1_AD8 PCI1_AD7 PCI1_AD6 PCI1_AD5 PCI1_AD4 PCI1_AD3 PCI1_AD2 PCI1_AD1 PCI1_AD0
PCI1_CBE0 PCI1_CBE1 PCI1_CBE2 PCI1_CBE3 PCI1_CBE4 PCI1_CBE5 PCI1_CBE6 PCI1_CBE7
AM6 AH7 AM7 AK8 AL7 AH8 AM8 AJ9
AL9 AK10 AM10 AH10 AL10 AJ11 AM11 AH11 AK14 AL15 AH14 AM16 AJ15 AK16 AH15 AL17 AM18 AH16 AL18 AJ17 AM19 AK18 AL19 AH18
AM9 AM22 AK20 AL21 AH19
AJ7 AM13 AM12 AH12 AJ13 AL13 AM14 AJ19
AM5
AK6
P_AD31 P_AD30 P_AD29 P_AD28 P_AD27 P_AD26 P_AD25 P_AD24 P_AD23 P_AD22 P_AD21 P_AD20 P_AD19 P_AD18 P_AD17 P_AD16 P_AD15 P_AD14 P_AD13 P_AD12 P_AD11 P_AD10 P_AD9 P_AD8 P_AD7 P_AD6 P_AD5 P_AD4 P_AD3 P_AD2 P_AD1 P_AD0
P_CBE0 P_CBE1 P_CBE2 P_CBE3 P_CBE4 P_CBE5 P_CBE6 P_CBE7
P_ACK64 P_DEVSEL P_FRAME P_GNT P_LOCK P_IRDY P_TRDY P_STOP P_PERR P_SERR P_REQ64 P_REQ
P_RST
P_AD63 P_AD62 P_AD61 P_AD60 P_AD59 P_AD58 P_AD57 P_AD56 P_AD55 P_AD54 P_AD53 P_AD52 P_AD51 P_AD50 P_AD49 P_AD48 P_AD47 P_AD46 P_AD45 P_AD44 P_AD43 P_AD42 P_AD41 P_AD40 P_AD39 P_AD38 P_AD37 P_AD36 P_AD35 P_AD34 P_AD33 P_AD32
GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
I_RST
NMI
XINT0 XINT1 XINT2 XINT3 XINT4 XINT5
LCDINIT
TMS
9C725 REV SL4Q4 ????? REV SL57T
ADD=ADD*_724YF_U134
LM_X04--9C725 changed to 724YF at Celestica's request
HEATSINK W/ LOCTITE384 P#724YF
+3.3V
+3.3V
1 2
2.7K-5%
40
40
41
17,22
17,22
PIRQ_4 PIRQ_5
960_IDSEL 960_M66EN PCI1_PAR64 PCI1_PAR
AL5
AM3
AL6
AM4
AH9 AM17 AH20 AH13
P_INTA P_INTB P_INTC P_INTD
P_IDSEL P_M66EN P_PAR64 P_PAR
TDI TDO TCK
SCL SDA
PWRDELAY
R_CLKIN
24
24
24
24
SP_GPIO_I960_5 SP_GPIO_I960_7 SP_GPIO_I960_6 SP_GPIO_I960_4
CK_66M_ROMB
16
1
RN127
2 3 4
8 7 6 5
P_CLK
R_CLKOUT
GC80303
HETERO 1 OF 5
1 2
+3.3V
GPO_IOP_REQ_EN
44
9 8
2N7002
+3.3V
1 2
24
24
24
24
SP_GPIO_I960_3 SP_GPIO_I960_2 SP_GPIO_I960_0 SP_GPIO_I960_1
NP*
1
RN128
2 3 4
8 7 6 5
LM_X04--83XMY sub for p/n consolidation
2.7K-5%
PCI1_ZION_REQ_DIRECT
24
1 2
10K-5%
G
1
NP*
Q33
S 2
D 3
PCI1_ZION_REQ
17
24,26
IOP_SPECIAL_RST
+3.3V
SUB*_83XMY
1 2
1.5K-5%
+3.3V
1 2
4 4
NP*
1 2
0.1uF 16V
3
(2.93V)
VCC
RESET
GND
1
2
24,41,59
PCI_RST_IOP
RB461
SUB*_30416
LM_X04--30416 sub for p/n consolidation
21
14
4 5
74VHC08
6
22-5%
21
IOP_SPECIAL_RST
24,26
NET_PHYSICAL_TYPE=25MIL
1 2
6.3V-10%
4.7uF
U29 U31 U32 V29 V30 W29 W31 W32
T28
N32
U28 T32 T30 R32 R31 R29
P32
K30
AH2 AG2
+3.3V
31
D12
10V-10%
1uF
BAR43
2 1
SUB*_83008 LM_X04--83008 sub for p/n consolidation
NET_PHYSICAL_TYPE=25MIL
NET_PHYSICAL_TYPE=25MIL
LM_X04--Sub for part consolidation
SUB*_78020
50V-20%
50V-20%
.01UF
1 2
21
SUB*_78020
PCI1_AD63 PCI1_AD62 PCI1_AD61 PCI1_AD60 PCI1_AD59 PCI1_AD58 PCI1_AD57 PCI1_AD56 PCI1_AD55 PCI1_AD54 PCI1_AD53 PCI1_AD52 PCI1_AD51 PCI1_AD50 PCI1_AD49 PCI1_AD48 PCI1_AD47 PCI1_AD46 PCI1_AD45 PCI1_AD44 PCI1_AD43 PCI1_AD42 PCI1_AD41 PCI1_AD40 PCI1_AD39 PCI1_AD38 PCI1_AD37 PCI1_AD36 PCI1_AD35 PCI1_AD34 PCI1_AD33 PCI1_AD32
SP_GPIO_I960_7 SP_GPIO_I960_6 SP_GPIO_I960_5 SP_GPIO_I960_4 SP_GPIO_I960_3 SP_GPIO_I960_2 SP_GPIO_I960_1 SP_GPIO_I960_0
I960_I_RST
IOP_NMI_INPUT
PCI2_PIRQA PCI2_PIRQB PCI2_PIRQC PCI2_PIRQD PCI2_PIRQE PCI2_PIRQF
I960_LCD_INIT
I960_TRST
NC_I960_TMS NC_I960_TDI NC_I960_TDO NC_I960_TCK
ENV_SEG5_I960_SCL ENV_SEG5_I960_SDA
I960_66M_FB
R_I960_66M_FB
IOP_PWRDELAY
.01UF
CB543
1 2
4.7uF
6.3V-10%
1 2
6.3V-10%
NET_PHYSICAL_TYPE=25MIL
4.7uF
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
17,22
24
24
24
24
24
24
24
24
25,26
25,26,39,53
25,26,39,53
VCC
21
CB537
21
NET_PHYSICAL_TYPE=25MIL
+3.3V
+3.3V
RB375
1 2
21
100-5%
100-5%
NET_PHYSICAL_TYPE=25MIL
+3.3V
1 2
2.7K-5%
24,27
24,27
24
24
24
24,26
+3.3V
21
2.7K-5%
SUB*_83XMY
RB415
1 2
22-5%
26
100-5%
1.5K-5%
F28
VCCPLL1
Y32
VCCPLL2
AK1
VCCPLL3
P4
B13 B25
C3 C4 C6
C8 C10 C12 C14 C16 C18 C20 C22 C24 C26 C28 C30 C31
D7 D19
E3 E30
G3 G30
J3 J30 J31
L3 L30 M28
N3 N30 P28 P30
VCC5REF
VREF_P VREF_S
VCC_B13 VCC_B25 VCC_C3 VCC_C4 VCC_C6 VCC_C8 VCC_C10 VCC_C12 VCC_C14 VCC_C16 VCC_C18 VCC_C20 VCC_C22 VCC_C24 VCC_C26 VCC_C28 VCC_C30 VCC_C31 VCC_D7 VCC_D19 VCC_E3 VCC_E30 VCC_G3 VCC_G30 VCC_J3 VCC_J30 VCC_J31 VCC_L3 VCC_L30 VCC_M28 VCC_N3 VCC_N30 VCC_P28 VCC_P30
GC80303 REV 1.0
HETERO 4 OF 5
A1
VSS_A1
A2
VSS_A2
A31
VSS_A31
A32
VSS_A32
B1
VSS_B1
B2
VSS_B2
B4
VSS_B4
B7
VSS_B7
B9
VSS_B9
B11
VSS_B11
B15
VSS_B15
B17
VSS_B17
B19
VSS_B19
B21
VSS_B21
B23
VSS_B23
B27
VSS_B27
B31
VSS_B31
B32
VSS_B32
D5
VSS_D5
D9
VSS_D9
D13
VSS_D13
D17
VSS_D17
D21
VSS_D21
D25
VSS_D25
D29
VSS_D29
D31
VSS_D31
F2
VSS_F2
F31
VSS_F31
H4
VSS_H4
H29
VSS_H29
H31
VSS_H31
K2
VSS_K2
K31
VSS_K31
M4
VSS_M4
M29
1 2
M31
P2
P31
T4
VSS_M29 VSS_M31 VSS_P2 VSS_P31 VSS_T4
GC80303 REV 1.0
HETERO 5 OF 5
LM_X04--83XMY sub for p/n consolidation
VCC_R3
VCC_R30
VCC_U3 VCC_U30 VCC_V28
VCC_W3 VCC_W28 VCC_W30 VCC_Y30 VCC_AA3
VCC_AA28 VCC_AA29 VCC_AA30
VCC_AC3
VCC_AC30
VCC_AE3
VCC_AE29 VCC_AE30 VCC_AF28
VCC_AG3
VCC_AG29 VCC_AG30
VCC_AJ3 VCC_AJ8
VCC_AJ20 VCC_AJ30
VCC_AK3 VCC_AK5 VCC_AK7 VCC_AK9
VCC_AK11 VCC_AK13 VCC_AK15 VCC_AK17 VCC_AK19 VCC_AK21 VCC_AK23 VCC_AK25 VCC_AK27 VCC_AK29 VCC_AK30 VCC_AL14 VCC_AL26
VSS_T29 VSS_T31
VSS_V2
VSS_V31
VSS_Y4 VSS_Y29 VSS_Y31 VSS_AB2
VSS_AB31
VSS_AD4
VSS_AD29 VSS_AD31
VSS_AF2
VSS_AF31
VSS_AH4
VSS_AH29
VSS_AJ2 VSS_AJ6
VSS_AJ10 VSS_AJ14 VSS_AJ18 VSS_AJ22 VSS_AJ26 VSS_AJ31
VSS_AL1 VSS_AL2 VSS_AL4 VSS_AL8
VSS_AL12 VSS_AL16 VSS_AL20 VSS_AL24 VSS_AL28 VSS_AL31 VSS_AL32
VSS_AM1 VSS_AM2
VSS_AM31 VSS_AM32
R3 R30 U3 U30 V28 W3 W28 W30 Y30 AA3 AA28 AA29 AA30 AC3 AC30 AE3 AE29 AE30 AF28 AG3 AG29 AG30 AJ3 AJ8 AJ20 AJ30 AK3 AK5 AK7 AK9 AK11 AK13 AK15 AK17 AK19 AK21 AK23 AK25 AK27 AK29 AK30 AL14 AL26
T29 T31 V2 V31 Y4 Y29 Y31 AB2 AB31 AD4 AD29 AD31 AF2 AF31 AH4 AH29 AJ2 AJ6 AJ10 AJ14 AJ18 AJ22 AJ26 AJ31 AL1 AL2 AL4 AL8 AL12 AL16 AL20 AL24 AL28 AL31 AL32 AM1 AM2 AM31 AM32
+3.3V
ROOM=PCI2_PU
24
24
24
24
24
24
24
PCI2_CBE7 PCI2_CBE4 PCI2_CBE5 PCI2_CBE6
PCI2_AD59 PCI2_AD61 PCI2_AD63 PCI2_AD62
PCI2_AD55 PCI2_AD60 PCI2_AD58 PCI2_AD57
PCI2_AD54 PCI2_AD53 PCI2_AD51 PCI2_AD56
PCI2_AD50 PCI2_AD49 PCI2_AD47 PCI2_AD52
PCI2_AD45 PCI2_AD41
PCI2_AD43
PCI2_AD46
PCI2_AD42 PCI2_AD35 PCI2_AD40 PCI2_AD33
PCI2_AD34 PCI2_AD32 PCI2_AD36 PCI2_AD38
PCI2_AD48 PCI2_AD44 PCI2_AD39 PCI2_AD37
PCI2_PAR64
PCI2_REQ0
PCI2_REQ1
PCI2_REQ2
PCI2_REQ3
PCI2_REQ4 PCI2_REQ5
SP_21_2
NC_7034_3
PCI2_PIRQF PCI2_PIRQE PCI2_PIRQD PCI2_PIRQC
PCI2_LOCK PCI2_FRAME PCI2_IRDY
PCI2_TRDY
PCI2_66MHZ_EN
PCI2_SERR PCI2_STOP PCI2_PERR
PCI2_PIRQA PCI2_PIRQB PCI2_REQ64 PCI2_ACK64
PCI2_DEVSEL
1
RN140
2 3 4
1
RN148
2 3 4
1
RN147
2 3 4
1
RN139
2 3 4
1
RN138
2 3 4
1
RN137
2 3 4
8.2K-5%
1
RN145
2 3 4
1
RN144
2 3 4
1
RN146
2 3 4
RB387
1 2
8.2K-5%
COMPUTER CORPORATION
AUSTIN,TEXAS
24,27
24,26
24
24
24
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
24,27
i960RM
+3.3V
1
RNB88
2 3 4
1
RNB86
2 3 4
1
RN125
2 3 4
1
RNB89
2 3 4
1
RNB90
2 3 4
1
RN126
2 3 4
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
1
2
+3.3V
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
21
8 7 6 5
8 7 6 5
8 7 6 5
3
TITLE
ROOM=960RM_CLK
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
DC
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
24 OF 63
Page 25
B D
CA
+3.3V
Jaguar 2.0 - X02 - Isolate VBAT powered Raid Dimm I2C
12-5-2003_10:51
1
2
3
+3.3V
44
44
ROOM=960RM_MISC
+3.3V
0.1uF 16V 1 2
CB488
0.1uF 16V CB567
21
25,26,41
25,26,41
VCC
0.1uF 16V 1 2
Subbed to VHC flavor
GPO_IOP_RESETMODE
#MEMHOLE_EN
GPO_IOP_BIST_DIS
SUB*_83XMY
SUB*_83XMY
RB117
1 2
1.5K-5%
21
RB112
SUB*_83XMY
Switch
OFF's(open) Default(normal)
1.5K-5% 1-8
2-7
25,26
25,26
25,26
25,26
25,26
25,26
25,26
25,26
25,26
25,26
25,26
25,26
25,26
25,26
25,26
25,41
25,41
25,26
25
25,26
25,26
25,26
25,26
25,26,41
25,26,41
25,26,41
25,26,41
25,26
25,26
25,26
25,26
1.5K-5% R450
1.5K-5%
KLM_X04 -- CHANGED TO 3.3V FLASH & POPPED CORRECT ZERO OHM
VCC
RB322
1 2
NP*
24 23 22 21 20 19 18 17 16 15 14 13
40
37 38
A0 A1
VCC10
VCC31 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
8
A12
7
A13
6
A14
5
A15
4
A16
3
A17
2
A18
1
A19 A20
9
CE
RY/BY*
VSS29
VSS30 OE WE
25
25
25
25
I960_RAD0 I960_RAD1 I960_RAD2 I960_RAD3 I960_RAD4 I960_RAD5 I960_RAD6 I960_RAD7
I960_RAD8 ROM_I960_A9 ROM_I960_A10 ROM_I960_A11 ROM_I960_A12 ROM_I960_A13 ROM_I960_A14 ROM_I960_A15 ROM_I960_A16 ROM_I960_A17 ROM_I960_A18 ROM_I960_A19 ROM_I960_A20
I960_RCE0 I960_ROE I960_RWE
28F016S5-090
SUB*_2G453
5V BLANK P#0578E
JAGUAR 5V PROG PART P#91XPJ JAGUAR 3V PROG PART P#2G453
1 2
OC LE 1D 2D 3D 4D 5D 6D 7D 8D
VCC
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q
I960_RALE I960_RAD16 I960_RAD15 I960_RAD14 I960_RAD13 I960_RAD12 I960_RAD11 I960_RAD10 I960_RAD9
220
1
11
3 4 7
8 13 14 17 18
GND
74VHCT373A
21
OC LE 1D 2D 3D 4D 5D 6D 7D 8D
VCC
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q
I960_RAD6 I960_RAD5 I960_RAD4 I960_RAD3
220
1
11
3 4 7
8 13 14 17 18
GND
74VHCT373A
SUB*_83XMY
RB346
21
21
1.5K-5% RB345
1.5K-5%
SUB*_83XMY
21
SUB*_83XMY
21
I960_RAD6
I960_RAD3
I960_RAD2
I960_RAD4
Notes
ON - Hold i960rm reset til cleared by S/W
ON - Enable Prim. Config.
10 31 11
VPP
I960_RAD9
25
DQ0
26
DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
RP
I960_RAD10
27
I960_RAD11
28
I960_RAD12
32
I960_RAD13
33
I960_RAD14
34
I960_RAD15
35
I960_RAD16
36
NC_RAIDROM_36
12
29 30
3.3V BLANK P#25XPD
+3.3V
20
2 5 6 9 12 15 16 19
ROM_I960_A16 ROM_I960_A15 ROM_I960_A14 ROM_I960_A13 ROM_I960_A12 ROM_I960_A11 ROM_I960_A10 ROM_I960_A9
10
SUB*_5C445
+3.3V
20
2 5 6 9 12 15 16 19
ROM_I960_A20 ROM_I960_A19 ROM_I960_A18
ROM_I960_A17 NC_RAIDLTCH_12 NC_RAIDLTCH_15 NC_RAIDLTCH_16 NC_RAIDLTCH_19
10
SUB*_5C445
25,26
25,26
25,26
25,26
I960_I_RST
25,26
25,26
+3.3V
1 2
22uF 6.3V
SUB*_83009
25,26,41
25,26,41
25,26,41
25,26,41
25,26
25,26
25,26
25,26
25
25
25,26
25,26
25,26
25,26
25,26
25,26
25,41
25,41
25
25
I960MEM_SCKE0 I960MEM_SCKE1
IOP_FLASH_POWER
SUB*_83009
1 2
24,26
22uF 6.3V
21
DELAY_RULE=:::500 DELAY_RULE=:::500
RB370
33-5%
1 2
50V-20%
SUB*_78020
LM_X04--Sub for part consolidation
LM_X05--83009 sub for p/n consolidation
21
1 2
.01UF
1 2
33-5%
I960MEM_DQM7
25
I960MEM_DQM6
25
I960MEM_DQM5
25
I960MEM_DQM4
25
I960MEM_DQM3
25
I960MEM_DQM2
25
I960MEM_DQM1
25
I960MEM_DQM0
25
I960MEM_D31
25
I960MEM_D30
25
I960MEM_D29
25
I960MEM_D28
25
I960MEM_D27
25
I960MEM_D26
25
I960MEM_D25
25
I960MEM_D24
25
I960MEM_D23
25
I960MEM_D22
25
I960MEM_D21
25
I960MEM_D20
25
I960MEM_D19
25
I960MEM_D18
25
I960MEM_D17
25
I960MEM_D16
25
I960MEM_D15
25
I960MEM_D14
25
I960MEM_D13
25
I960MEM_D12
25
I960MEM_D11
25
I960MEM_D10
25
I960MEM_D9
25
I960MEM_D8
25
I960MEM_D7
25
I960MEM_D6
25
I960MEM_D5
25
I960MEM_D4
25
I960MEM_D3
25
I960MEM_D2
25
I960MEM_D1
25
I960MEM_D0
25
I960MEM_AA13
25
I960MEM_AA12
25
I960MEM_AA11
25
I960MEM_AA10
25
I960MEM_AA9
25
I960MEM_AA8
25
I960MEM_AA7
25
I960MEM_AA6
25
I960MEM_AA5
25
I960MEM_AA4
25
I960MEM_AA3
25
I960MEM_AA2
25
I960MEM_AA1
25
I960MEM_AA0
25
I960MEM_SBA0
25
I960MEM_SBA1
25
I960MEM_SRAS
25
I960MEM_SCAS
25
I960MEM_SWE
25
I960MEM_SCE0
25
I960MEM_SCE1
25
RI960MEM_SCKE0 RI960MEM_SCKE1
I960MEM_DCLKIN I960MEM_DCLKOUT
RB347
22-5%
1 2
CB583
+3.3V
LM_X04--Sub for part consolidation
SUB*_78020
E15 D15 D22 E23 A14 C15 B20 A20
A3 A4 A5 B6 A6 C7 A7 B8 A8
A9 B10 C11 A11 B12 A12 C13 C23 A23 B24 A24 A25 B26 A26 C27 A27 B28 A28 A29 A30 C32 D30 D32
D14 D16 C17 B16 D18 A16 E19 A17 E20 B18 D20 A18 E21 C19
E18 A15 C21 D23 A21 A19 E22 E16 A10
E17 H28
P29
SUB*_78020
12
CB647
SDQM7 SDQM6 SDQM5 SDQM4 SDQM3 SDQM2 SDQM1 SDQM0
DCLKIN DCLK0UT
.01UF
CB609
50V-20%
12
GC80303 REV 1.0
HETERO 2 OF 5
22pF 50V
SUB*_78020
.01UF
CB640
50V-20%
12
.01UF
12
CB665
50V-20%
RAD6/RST_MODE
RAD5/ONCE RAD4/STEST RAD3/RETRY RAD2/SPMEM
RAD1/32BITPCI_EN
ROOM=960RM
12
CB547
0.1uF 16V
ROE RWE
E13 E14 E24 D24 A13 B14 B22 A22
B3 C5 B5 E6 D6 E7 E8 D8 E9 C9 E10 D10 E11 D11 E12 D12 E25 C25 E26 D26 E27 D27 E28 D28 C29 B29 B30 E31 E32 E29 F29 G29
F32 F30 G32 G31
RAD16 RAD15 RAD14 RAD13 RAD12 RAD11 RAD10
DCLK0 DCLK1 DCLK2 DCLK3
53,61
12
CB604
0.1uF 16V
I960MEM_ECC7 I960MEM_ECC6 I960MEM_ECC5 I960MEM_ECC4 I960MEM_ECC3 I960MEM_ECC2 I960MEM_ECC1 I960MEM_ECC0
I960MEM_D63 I960MEM_D62 I960MEM_D61 I960MEM_D60 I960MEM_D59 I960MEM_D58 I960MEM_D57 I960MEM_D56 I960MEM_D55 I960MEM_D54 I960MEM_D53 I960MEM_D52 I960MEM_D51 I960MEM_D50 I960MEM_D49 I960MEM_D48 I960MEM_D47 I960MEM_D46 I960MEM_D45 I960MEM_D44 I960MEM_D43 I960MEM_D42 I960MEM_D41 I960MEM_D40 I960MEM_D39 I960MEM_D38 I960MEM_D37 I960MEM_D36 I960MEM_D35 I960MEM_D34 I960MEM_D33 I960MEM_D32
I960_ROE I960_RWE I960_RCE0 I960_RCE1 I960_RALE
I960_RAD16 I960_RAD15 I960_RAD14 I960_RAD13 I960_RAD12 I960_RAD11 I960_RAD10 I960_RAD9 I960_RAD8 I960_RAD7 I960_RAD6 I960_RAD5 I960_RAD4 I960_RAD3 I960_RAD2 I960_RAD1 I960_RAD0
RI960MEM_BDCLK3 RI960MEM_BDCLK2 RI960MEM_BDCLK0 RI960MEM_BDCLK1
CMOS_PSUPPLY_PWRGOOD
12
CB639
0.1uF 16V
CB549
0.1uF 16V
25,26,41
25,26,41
25,26
41
25
25,26
25,26
25,26
25,26
25,26,41
25,26,41
25,26,41
25,26,41
25,26
25,26
25,26
25,26
25,26
25,26
25,26
25,26
25,26
12
0.1uF 16V
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
24,26,39,53
24,26,39,53
12
CB577
0.1uF 16V
25,26,56
RN124
1 8
33-5% RN124
33-5%
VCC
2 1
220
12 13
ENV_SEG5_I960_SDA
ENV_SEG5_I960_SCL
12
CB633
0.1uF 16V
VBAT_RAID
RN124
33-5%
54
RB317
1411U143
74VHC08
D 3
22uF 6.3V
1 2
CB649
SUB*_83009
LM_X05--83009 sub for p/n consolidation
8.2K-5%
8.2K-5%
R536
21
1.5K-5%
NP*
R516 needs to be subbed to 83XMY if ever popped
72
RN124
3 6
33-5%
Orange LED
100-1%
100-1%
RB1031
21
2N7002
G
1
S 2
2N7002
D 3
25
25
1 2
R541
21
I960MEM_BDCLK3 I960MEM_BDCLK2 I960MEM_BDCLK0 I960MEM_BDCLK1
RB1029
8.2K-5%
RB1030
21
50V-10%
1000pF
2 1
CB1012
CB1013
1000pF
G
1
50V-10%
S 2
I960MEM_SCE1
I960MEM_SCE0
25
25
25
25
25,26
25,26
21
NP*
21
NP*
25,26,56
VBAT_RAID
SUB*_78020
21
RB1032
NP*
12
21
R1114
8.2K-5%
LM_X04--Sub for part consolidation
SUB*_78020
.01UF
50V-20%
VBAT_RAID
8.2K-5%
NP*
I960MEM_SDA
I960MEM_SCL
12
.01UF
50V-20%
SUB*_78020
25,26,56
12
25
25
SUB*_78020
.01UF
50V-20%
12
12
.01UF
50V-20%
SUB*_78020
RAID_DIMM
DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
CB7 CB6 CB5 CB4 CB3 CB2 CB1 CB0
161 160 159 158 156 155 154 153 151 150 149 144 142 141 140 139 104 103 101 100 99 98 97 95 94 93 92 91 89 88 87 86 77 76 75 74 72 71 70 69 67 66 65 60 58 57 56 55 20 19 17 16 15 14 13 11 10 9 8 7 5 4 3 2
137 136 106 105 53 52 22 21
I960MEM_SBA1
25
I960MEM_SBA0
25
I960MEM_AA13
25
I960MEM_AA12
25
I960MEM_AA11
25
I960MEM_AA10
25
I960MEM_AA9
25
I960MEM_AA8
25
I960MEM_AA7
25
I960MEM_AA6
25
I960MEM_AA5
25
I960MEM_AA4
25
I960MEM_AA3
25
I960MEM_AA2
25
I960MEM_AA1
25
I960MEM_AA0
25
I960MEM_DQM7
25
I960MEM_DQM6
25
I960MEM_DQM5
25
I960MEM_DQM4
25
I960MEM_DQM3
25
I960MEM_DQM2
25
I960MEM_DQM1
25
I960MEM_DQM0
25
I960MEM_SRAS
25
I960MEM_SCAS
25
I960MEM_SWE
25
I960MEM_BDCLK3 I960MEM_BDCLK2 I960MEM_BDCLK1 I960MEM_BDCLK0
I960MEM_SCKE1 I960MEM_SCKE0
I960MEM_SDA
25
I960MEM_SCL
25
NC_I960DIMM_62
NC_I960DIMM_146 NC_I960DIMM_31 NC_I960DIMM_44 NC_I960DIMM_48
NC_I960DIMM_147
25
25
25
25
V8 V9
39
122
132 126 123
38
121
37
120
36
119
35
118
34
117
33
131 130 113 112
47 46 29 28
129
45
114
30
115 111
27
163
79
125
42
63
128
82
83 167 166 165
62 146
31
44
48
147
BA1 BA0
A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
DQMB7 DQMB6 DQMB5 DQMB4 DQMB3 DQMB2 DQMB1 DQMB0
S3 S2 S1 S0
RAS CAS WE
CK3 CK2 CK1 CK0
SDA SCL SA2 SA1 SA0
VREF62 VREF146
REG
/OE /OE /WE2
DIMM-8X72
SOCKET COMBO
ECC3 +3.3V
SIGNAL=VBAT_RAID;6,18,26,40,41,49,59,73,84,90,102,110,124,133,143,157,168
slave address = 1010111b
SUB*_78020
12
.01UF
50V-20%
I960MEM_D63 I960MEM_D62 I960MEM_D61 I960MEM_D60 I960MEM_D59 I960MEM_D58 I960MEM_D57 I960MEM_D56 I960MEM_D55 I960MEM_D54 I960MEM_D53 I960MEM_D52 I960MEM_D51 I960MEM_D50 I960MEM_D49 I960MEM_D48 I960MEM_D47 I960MEM_D46 I960MEM_D45 I960MEM_D44 I960MEM_D43 I960MEM_D42 I960MEM_D41 I960MEM_D40 I960MEM_D39 I960MEM_D38 I960MEM_D37 I960MEM_D36 I960MEM_D35 I960MEM_D34 I960MEM_D33 I960MEM_D32 I960MEM_D31 I960MEM_D30 I960MEM_D29 I960MEM_D28 I960MEM_D27 I960MEM_D26 I960MEM_D25 I960MEM_D24 I960MEM_D23 I960MEM_D22 I960MEM_D21 I960MEM_D20 I960MEM_D19 I960MEM_D18 I960MEM_D17 I960MEM_D16 I960MEM_D15 I960MEM_D14 I960MEM_D13 I960MEM_D12 I960MEM_D11 I960MEM_D10
I960MEM_D9 I960MEM_D8 I960MEM_D7 I960MEM_D6 I960MEM_D5 I960MEM_D4 I960MEM_D3 I960MEM_D2 I960MEM_D1 I960MEM_D0
I960MEM_ECC7 I960MEM_ECC6 I960MEM_ECC5 I960MEM_ECC4 I960MEM_ECC3 I960MEM_ECC2 I960MEM_ECC1 I960MEM_ECC0
.01UF
50V-20%
ROOMS COMPLETE
22uF 6.3V
1 2
SUB*_83009 LM_X05--83009 sub for p/n consolidation
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
1
2
3
ROOM=960RM_DIMM
else RETRY bit needs to be cleared by S/W
GREEN
3-6 ON - MEM HOLE AT FEC0_0000h thru FECF_FFFFh opened
4 4
ON - Selftest disabled4-5
SUB*_5E052
1 3
DS3
A B
2N7002
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
D
3
1
G
S
2
OLD LED P#5958C NEW LED P#5E052
i960RM & MEMORY
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
DWG NO.
H3007
12/5/2003
DC
SHEET
A02
25 OF 63
Page 26
B D
CA
12-5-2003_10:51
1
2
Battery Powered
25,26,56
24
24
VBAT_RAID
IOP_PWRDELAY IOP_SPECIAL_RST
25,26,56
VBAT_RAID
0.1uF 16V
21
0.1uF 16V
1 2
14
9
10
74VHC00 U130
ROOM=960RM_DIMM
14
1 2
74VHC00
8
14
1 2
74VHC00
3
14
4
6
5
74VHC00
3
14
4 5
6
74VHC00 74VHC00
12 13
74VHC00
14
12 13
14
11
11
2N7002
2N7002
Q25
G
Q28
G
ROOMS COMPLETE
VCC
VCC+3.3V
ROOM=960RM_MISC
1 2
75-1%
1
1 2
Jaguar 2.0 - X02: Added R1036 to overcome CPLD bus hold & prevent accidental access to U131.
NP*
21
0.1uF 16V
I960MEM_SCKE0
D
3
1
S
2
I960MEM_SCKE1
D
3
1
S
2
25
25
0.1uF 16V 1 2
10K-5%
21
25,26,41
25,26,41
25,26
25,26
25,26
960_SEL_NVSRAM
41
I960_ROE I960_RWE
IOP_NVRAM_POWER
I960_RAD0 I960_RAD1 I960_RAD2
25
25
25
25
25
25
25
25
25
25
25
25
I960_RAD3 I960_RAD4 I960_RAD5 I960_RAD6 I960_RAD7
I960_RAD8 ROM_I960_A9 ROM_I960_A10 ROM_I960_A11 ROM_I960_A12 ROM_I960_A13 ROM_I960_A14
RB1036
1 2
11 10
28 27 23 26
29
31
22 25 30
0.1uF 16V 1 2
10V-20%
+
150uF
1 2
SUB*_97JUC
VCAPA0
112
A1
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
32
13 14 15 17 18 19 20 21
16
I960_RAD9_5V I960_RAD10_5V I960_RAD11_5V I960_RAD12_5V I960_RAD13_5V I960_RAD14_5V I960_RAD15_5V I960_RAD16_5V
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
I960_RAD9_5V I960_RAD10_5V I960_RAD11_5V I960_RAD12_5V I960_RAD13_5V I960_RAD14_5V I960_RAD15_5V I960_RAD16_5V
NC_U1010_10 NC_U1010_11
A2
8
A3
7
A4
6
A5
5
A6
4
A7
A8 A9 A10 A11
3
A12 A13
2
A14
VSS16
HSB
E G W
NC9
9
24
NC_SIMTEK_9
NC_SIMTEK_24
32Kx8-35ns
301-1%
21
21
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
SUB*_8174U
I960_RAD9 I960_RAD10 I960_RAD11 I960_RAD12 I960_RAD13 I960_RAD14 I960_RAD15
I960_RAD16 NC_U1010_15 NC_U1010_14
25,41
25,41
25,41
25,41
25
25
25
25
NVSRAM
2
25,26,56
VBAT_RAID
ROOM=960RM_MISC
21
10K-5%
9
10
74VHC00
14
8
NC_U208_8
ROOM=960RM_MISC
3
NC_
GPI_RAID_KEY_PRES
+3.3V +3.3V
1 2
8.2K-5% R563
220
NC_RAID_KEY_3 NC_RAID_KEY_5
21
RAID_KEY
21 3 5 7 9
4
6
8
10
K
VERT LATCH
SINGLE SHIELD
NO MOUNTING HOLES
NC_RAID_KEY_2 ENV_SEG5_I960_SCL NC_RAID_KEY_6 ENV_SEG5_I960_SDA NC_RAID_KEY_10
24-26,39,53
24-26,39,53
+3.3V
1K-5%
RN143
+3.3V
72
VCCA0
2 7
A1 WC
3 6
A2 SCL
4
GND
SDA
24C02
NP*
81
ENV_SEG5_I960_SCL ENV_SEG5_I960_SDA
5
1K-5%
NP*
NP*
RN143
18
BLANK P#6782U PROGRAMMED P#94ERE
slave address = 1010100b
RN143
54
NC_RN1004_5NC_RN1004_4
1K-5%
NP*
RN143
1K-5%
NP*
36
24-26,39,53
24-26,39,53
3
Zion CPLD is integrated with
the System CPLD on page 41.
SERIAL DEBUG BOARD
IOP_DEBUG
I960_RAD16_5V
26
I960_RAD15_5V
26
I960_RAD14_5V
24,25
41
25,26
26
I960_RAD0
I960_I_RST 960_SEL_UART I960_RAD1
4 4
25,26
VCC
1 3 5 7
9 11 13 15
24
26
PCI2_PIRQF
I960_RAD13_5V
17 19
H2X10
NP0
2
I960_RAD12_5V
4
I960_RAD11_5V
6
I960_RAD2
8
I960_RAD9_5V
10
I960_RCE0
12
I960_ROE
14 16
I960_RAD10_5V
18
I960_RWE
20
26
26
25,26
26
25
25,26,41
26
25,26,41
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
26 OF 63
A B
DC
Page 27
ROOM=7899
B D
DELAY_RULE=:::1500
CA
12-5-2003_10:51
1
2
3
ROOM=7899_CLOSE ROOM=7899_DISTANT
24
SD_X04 -- Changed 7899 Disable to IDSEL method
BOM changes to go to 7902
ASIC only changes Replace U156 with 7902
Remove RB492 Remove RB481 Replace R552 and RB473 with 1k ohm (22327?) only if
A1 rev parts, remove if using A2 or B rev parts
Remove R595 Replace RN152 with 100 ohm Rpack (4914D?) Remove CB746 Replace RB490 with 6.19k ohm (4930P) Remove C542 Remove RB458 and R597
Oscillator changes Don't need if can reprogram 40 MHz output to 80 MHz Remove R637
Populate R639 with 0 ohm (30661) Populate R633 with 22 ohm (19964?) Populate X7 - need p/n from Jeff Justice for SG-615PCW-80.00MB Populate R640 with 8.2k ohm (69958?) Populate CB694, C564, and C562 with .01 uF (78020) Populate L60
Voltage changes
Remove R632 Populate R634 with 0 ohm (30661) Remove R624 Populate R623 with 0 ohm Replace R612 with 121 ohm (81649) Replace R598 with 121 ohm (81649) Remove R555 Populate VR3 Replace U155 with 93C66 (2817P?) Populate RB483 with 8.2k ohm (69958) Populate RB489 and RB491 with 1k ohm (22327) Populate D23 and D27 Populate CB726 and C567 with 1000 pF (79015)
Replace 0 ohm series resistor on DIFFSENSEs with 10k ohm (19961?)
If using A1 rev parts, populate 0 ohm resistors on pins Y3 and Y4
CK_66M_AIC7899
24,27
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
PCI2_PIRQA PCI2_PIRQB PCI2_REQ0 PCI2_GNT0
PCI2_PCIRST
PCI2_AD63 PCI2_AD62 PCI2_AD61 PCI2_AD60 PCI2_AD59 PCI2_AD58 PCI2_AD57 PCI2_AD56 PCI2_AD55 PCI2_AD54 PCI2_AD53 PCI2_AD52 PCI2_AD51 PCI2_AD50 PCI2_AD49 PCI2_AD48 PCI2_AD47 PCI2_AD46 PCI2_AD45 PCI2_AD44 PCI2_AD43 PCI2_AD42 PCI2_AD41 PCI2_AD40 PCI2_AD39 PCI2_AD38 PCI2_AD37 PCI2_AD36 PCI2_AD35 PCI2_AD34 PCI2_AD33 PCI2_AD32 PCI2_AD31 PCI2_AD30 PCI2_AD29 PCI2_AD28 PCI2_AD27 PCI2_AD26 PCI2_AD25 PCI2_AD24 PCI2_AD23 PCI2_AD22 PCI2_AD21 PCI2_AD20 PCI2_AD19 PCI2_AD18 PCI2_AD17 PCI2_AD16 PCI2_AD15 PCI2_AD14 PCI2_AD13 PCI2_AD12 PCI2_AD11 PCI2_AD10 PCI2_AD9 PCI2_AD8 PCI2_AD7 PCI2_AD6 PCI2_AD5 PCI2_AD4 PCI2_AD3 PCI2_AD2 PCI2_AD1 PCI2_AD0
7902--Adaptec says to change RN152 to 100 ohms for 7902
T1
AB3
AB2
AF1
AE1
GNT
AD1
AC2 AD2 AE2 AC3 AD3 AE3 AF3 AC4 AF4 AC5 AD5 AE5 AF5 AC6 AD6 AE6
ADAPTEC U-160/320 SCSI
AIC- 7899W/7902 REV 8/30/00
HETERO 1 OF 4
TCK TDI TDO TMS
FRAME
DEVSEL
PAR
IDSEL
RAMCS/RSVD
ROMCS ROMOE
MWE BRDWE BRDOE
EXTARBACK/RSVD EXTARBREQ/RSVD
RAMPS/RSVD
MA9
MA8
MA7
MA6
MA5
MA4
MA3
MA2
MA1
MA0
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
MDP/MA16
SEECS SEECK SEEDI SEEDO
R3 T4 P4 R4 U4
AD7 AE7 AD8 AC8 AE8 AF8 AC9 AC15 AD15 AF16 AD9 AE4 AE15 AC16 AD16 AE16 AD4 AC7 AE9 AD12
W4 N23 P24 T23 AB24 AB23 AB26 AB25 V4
T25 R25 R24 T26 P25 P23 P26 R23 U23 U24 U25 U26 V23 V24 V25 W23
T24
+3.3V
8
7
6
5
1K
RN152
1
2
3
4
NC_7899_TDO
PCI2_FRAME PCI2_IRDY PCI2_DEVSEL PCI2_TRDY PCI2_STOP PCI2_PERR PCI2_SERR PCI2_ACK64 PCI2_REQ64 PCI2_PAR64 PCI2_PAR 7899_IDSEL PCI2_CBE7 PCI2_CBE6 PCI2_CBE5 PCI2_CBE4 PCI2_CBE3 PCI2_CBE2 PCI2_CBE1 PCI2_CBE0
NC_7899_RAMCS NC_7899_ROMCS NC_7899_ROMOE NC_7899_MWE NC_7899_BRDWE NC_7899_BRDOE
PD_7899_EXTARBACK
PU_7899_EXTARBREQ PU_7899_RAMPS
NC_7899_MA15 NC_7899_MA14 NC_7899_MA13 NC_7899_MA12 NC_7899_MA11 NC_7899_MA10 NC_7899_MA9 NC_7899_MA8 NC_7899_MA7 NC_7899_MA6 NC_7899_MA5 NC_7899_MA4 NC_7899_MA3 NC_7899_MA2 NC_7899_MA1 NC_7899_MA0
NC_7899_MD7 NC_7899_MD6 NC_7899_MD5 NC_7899_MD4 NC_7899_MD3 NC_7899_MD2 NC_7899_MD1 NC_7899_MD0
NC_7899_MDP
R7899_SEECS R7899_SECK R7899_SEDI
R7899_SEDO
DELAY_RULE=:::1000
DELAY_RULE=:::1000
DELAY_RULE=:::1000
DELAY_RULE=:::1000
GPO_AIC7899_DIS
44
24
24
24
24
24
24
24
24
24
27
24
24
24
24
24
24
24
24
Jaguar H3007 - X00: De-popped R553 & R554, duplicate PUs on RN126.
1 2
7902--Adaptec says RB458 is not needed for 7902 7902--Adaptec says R597 is not needed for 7902 7902--Adaptec says R595 is not needed for 7902
21
220
7902--Adaptec says CB746 is not needed for 7902
LM_X06 7902--0 ohm Rs becomes 10k for 7902
10-5%
1 2
10-5%
2 1
12
10-5%
22-5%
2 1
In and Out swizzled
+3.3V
NP*
8.2K-5%
24
CB746
7899_SEECS 7899_SECK 7899_SEDO 7899_SEDI
24,27
21
8.2K-5%
8.2K-5%
7899A_SRST+
21
PCI2_AD22
NP*
24
21
1000pF
NP*
50V-10%
1 2
2.7K-5%
+3.3V
14
U16
13
VHC14
+3.3V
1 2
8.2K-5%
7899A_SRST-
28
28
28
28
RB458
12
Q39
Q38
2N7002
27,29
27,29
29
3 D
2N7002
D
1
G
S
1
3
2
2 S
G
8.2K-5%
DELAY_RULE=:::500 DELAY_RULE=:::500
21
CB714
12
8.2pF
50V-5%
NP*
1 2
RB487
1 3
D14
R1011
1 2
7899_IDSEL
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
27,29
29
29
29
29
29
29
29
29
29
29
27,29
29
27
220
21
RB490
4.99K-1%
27
SD_X04 -- Changed 7899 Disable to IDSEL method
7899A_SD+15 7899A_SD+14 7899A_SD+13 7899A_SD+12 7899A_SD+11 7899A_SD+10 7899A_SD+9 7899A_SD+8 7899A_SD+7 7899A_SD+6 7899A_SD+5 7899A_SD+4 7899A_SD+3 7899A_SD+2 7899A_SD+1 7899A_SD+0
7899A_SD-15 7899A_SD-14 7899A_SD-13 7899A_SD-12 7899A_SD-11 7899A_SD-10 7899A_SD-9 7899A_SD-8 7899A_SD-7 7899A_SD-6 7899A_SD-5 7899A_SD-4 7899A_SD-3 7899A_SD-2 7899A_SD-1 7899A_SD-0
7899A_SDP+1 7899A_SDP+0 7899A_SCD+ 7899A_SIO+ 7899A_SREQ+ 7899A_SMSG+ 7899A_SACK+ 7899A_SBSY+ 7899A_SATN+ 7899A_SRST+ 7899A_SSEL+
7899A_SDP-1 7899A_SDP-0 7899A_SCD­7899A_SIO­7899A_SREQ­7899A_SMSG­7899A_SACK­7899A_SBSY­7899A_SATN­7899A_SRST­7899A_SSEL-
NC_U3CHA_HDVSPS NC_7899A_SCSI_LED
7899A_WIDEPS
PU_ALTID
NC_7899A_IDDAT
7899_LVD_REXT1 7899_SE_REXT0
RB492
6.19K-1%
1 2
PD_SCLKIN
RB476
1 2
10-5%
D17
SCDAP15
B16
SCDAP14
D15
SCDAP13
A15
SCDAP12
G24
SCDAP11
F23
SCDAP10
F25
SCDAP9
E23
SCDAP8
C21
SCDAP7
A21
SCDAP6
C20
SCDAP5
A20
SCDAP4
C19
SCDAP3
A19
SCDAP2
C18
SCDAP1
A18
SCDAP0
D16
SCDAM15
C16
SCDAM14
C15
SCDAM13
B15
SCDAM12
G25
SCDAM11
F24
SCDAM10
F26
SCDAM9
E24
SCDAM8
D21
SCDAM7
B21
SCDAM6
D20
SCDAM5
B20
SCDAM4
D19
SCDAM3
B19
SCDAM2
D18
SCDAM1
B18
SCDAM0
A17
SCDAPHP
A22
SCDAPLP
D26
E25
D24
REQAP
B25
MSGAP
A24
ACKAP
A23
BSYAP
C22
ATNAP
A26
RESETAP
C26
SELAP
B17
SCDAPHM
B22
SCDAPLM
C25
E26
D25
REQAM
C24
MSGAM
B24
ACKAM
B23
BSYAM
D22
ATNAM
A25
RESETAM
B26
SELAM
H25 D9
DIFFSENSEA DIFFSENSEB
J25
EXTXCVRA/RSVD
K26 L25
LEDA LEDB
J26 L24
STPWCTLA STPWCTLB
J23 L23
WIDEPSA WIDEPSB
J24 K24
EXPACTA EXPACTB
M25 M23
LDALTIDA LDALTIDB
M26 M24
IDDATA IDDATB
C9
LVREXT1
B13
SEREXT1/RSVD
B9
LVREXT2
B12
SEREXT2/RSVD
B11
SCLKINP
AIC- 7899W/7902 REV 8/30/00
ADAPTEC U-160/320 SCSI
HETERO 2 OF 4
SCDBP15 SCDBP14 SCDBP13 SCDBP12 SCDBP11 SCDBP10
SCDBP9 SCDBP8 SCDBP7 SCDBP6 SCDBP5 SCDBP4 SCDBP3 SCDBP2 SCDBP1 SCDBP0
SCDBM15 SCDBM14 SCDBM13 SCDBM12 SCDBM11 SCDBM10
SCDBM9 SCDBM8 SCDBM7 SCDBM6 SCDBM5 SCDBM4 SCDBM3 SCDBM2 SCDBM1 SCDBM0
SCDBPHP SCDBPLP
RESETBP
SELBP
SCDBPHM SCDBPLM
RESETBM
SELBM
EXTXCVRB/RSVD
PCIRSTOUT
SCLKIN/TEST3
IDDQ/TEST0
TESTMODE/TEST1
M2 M4 N1 N3 D6 B6 D5 B5 G1 G3 H1 H3 J1 J3 K2 K4
M3 N4 N2 P3 C6 A6 C5 A5 G2 G4 H2 H4 J2 J4 K3 L4
L2 F3 B2 C4 B3 C2 E1 E3 F1 D2 B1
L3 F4 A2 B4 A3 D1 E2 E4 F2 D3 C1
R_7899B_DIFFSENSER_7899A_DIFFSENSE7899A_DIFFSENSE
K23
N26
NC_U3CHB_HDVSPS
NC_7899B_SCSI_LED
NC_U3CHB_STPWCTLNC_U3CHA_STPWCTL 7899B_WIDEPS
PU_ALTID
NC_7899B_IDDAT
NC_7899_PCIRST_OUT
H24 AB4 AA4
7899_IDDQ 7899_TESTMODE
7899B_SD+15 7899B_SD+14 7899B_SD+13 7899B_SD+12 7899B_SD+11 7899B_SD+10
7899B_SD+9 7899B_SD+8 7899B_SD+7 7899B_SD+6 7899B_SD+5 7899B_SD+4 7899B_SD+3 7899B_SD+2 7899B_SD+1 7899B_SD+0
7899B_SD-15 7899B_SD-14 7899B_SD-13 7899B_SD-12 7899B_SD-11
7899B_SD-10 7899B_SD-9 7899B_SD-8 7899B_SD-7 7899B_SD-6 7899B_SD-5 7899B_SD-4 7899B_SD-3 7899B_SD-2 7899B_SD-1 7899B_SD-0
7899B_SDP+1
7899B_SDP+0 7899B_SCD+ 7899B_SIO+
7899B_SREQ+
7899B_SMSG+
7899B_SACK+
7899B_SBSY+
7899B_SATN+
7899B_SRST+
7899B_SSEL+
7899B_SDP-1
7899B_SDP-0 7899B_SCD­7899B_SIO-
7899B_SREQ-
7899B_SMSG-
7899B_SACK-
7899B_SBSY-
7899B_SATN-
7899B_SRST-
7899B_SSEL-
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
27,29
29
29
29
29
29
29
29
29
29
29
27,29
29
220
7899B_SRST+
1 2
1000pF
NP*
50V-10%
7899B_SRST-
7902--Adaptec says C542 is not needed for 7902
LM_X06 7902--0 ohm Rs becomes 10k for 7902
RB1010
1 2
7899B_DIFFSENSE
29
+3.3V
27
21
RB488
220
1 2
RB473
8.2K-5%
7902--R552 and RB473 become 1k for 7902
RB481
12
21
27,29
27,29
8.2K-5%
27
1
2
+3.3V
21
8.2K-5%
PU_ALTID
3
NP*
+3.3V
CB694
2 1
L60
BLM11A60
.01uF 50V
NP*
12
NP*
12
NP*
2 1
.01uF 50V
REV B = P#53WER
NET_PHYSICAL_TYPE=PLANE
3V_40M
NP*
.01uF 50V
2
1
8.2K-5%
4
SCSI CLOCK OSCILLATOR
40MHZ FOR 7899W 80MHZ DIFF FOR 7902
CK_40M_7899SYN
1 2
NP*
21
NP*
RB475
10-5%
LVREXT
DELAY_RULE=:::500
SHORT TRACE
7902--Adaptec says RB490 should be 6.19k ohms for 7902 7902--Adaptec says RB492 is not needed for 7902
21
OUT
NP*
CK_40M_7889OSC_R
3
DELAY_RULE=:::400
NP*
1 2
33-5%
CK_40M_7899OSC
7899W
X7
80.0000MHz
4
4 4
1
VCC
E/D
GND
2
COMPUTER CORPORATION
SD_X06 -- new osc footprint per CE
AUSTIN,TEXAS
TITLE
WILL NEED A 3.3V OSC HERE IF USED 40MHZ CHANGES TO 80MHZ IF 7902 IS USED
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
27 OF 63
DC
A B
Page 28
ROOM=7899
B D
CA
12-5-2003_10:51
1
2
3
ROOM=7899_CLOSE ROOM=7899_DISTANT
E5 E6
E9 E10 E13 E14 E17 E18 E21 E22
F5 F22
J5 J22
K5 K22 L11 L12 L13 L14 L15 L16 M11 M12 M13 M14 M15 M16 N11 N12 N13 N14 N15 N16 P11 P12 P13 P14 P15 P16 R11 R12 R13 R14 R15 R16 T11 T12 T13 T14 T15 T16
N5 N22
P5 P22
U5 U22
V5 V22 AA5
AB5 AB6 AB9
GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72
3.3V_1
3.3V_2
3.3V_3
3.3V_4
3.3V_5
3.3V_6
3.3V_7
3.3V_8
3.3V_9
3.3V_10
3.3V_11
3.3V_12
3.3V_13
3.3V_14
3.3V_15
3.3V_16
RSVD/MA17 RSVD/MA18
RSVD/VIO_2 RSVD/VIO_3 RSVD/VIO_4 RSVD/VIO_5 RSVD/VIO_6 RSVD/VIO_7 RSVD/VIO_8 RSVD/VIO_9
RSVD/VIO_10
RSVD/SCLKINM RSVD/TERMPWRA RSVD/TERMPWRB
7902--Adaptec says Y4 and Y3 need 1k ohm PU to 3.3V for 7902
RSVD/TEST2 RSVD/TEST4 RSVD/TEST5 RSVD/TEST6 RSVD/TEST7 RSVD/TEST8 RSVD/TEST9
RSVD/TEST10
RESERVED_1 RESERVED_2 RESERVED_3 RESERVED_4
E11 E12 L22 M22 R5 R22 T5 T22 W22 Y22 AF2 AF7 AF10 AF14 AF19 AF22
N25 N24
Y5 AB7 AB8 AB11 AB12 AB15 AB16 AB19 AB20
B10 H23 D12
Y4 G23 D11 D13 V3 W3 Y3 U3
+3.3V
NC_7899W_1 NC_7899W_2
NC_7899W_3
NC_7899W_5 NC_7899W_6 NC_7899W_7 NC_7899W_8 NC_7899W_9 NC_7899W_10 NC_7899W_11
NC_7899W_13 NC_7899W_14 NC_7899W_15 NC_7899W_16
+3.3V
NC_7899W_4
1 2
AGND1
28
7902--Adaptec says remove R632 and stuff R634 for 7902
LM_X06 -- added p/u's for 7902
7902--Adaptec says to stuff RB489 and RB491 for 7902
+3.3V
R1008
1 2
NP*
1K-5%
+3.3V
R1009
1 2
NP*
1K-5%
29
LM_X05--83009 sub for p/n consolidation
21
LM_X05--83009 sub for p/n consolidation
7899_SVCC_33_18
LM_X05--83009 sub for p/n consolidation
7899A_TRMPWR
1 2
1K-5%
NP*
1
D23
8
NP*
2
3
6
ON NEW DESIGNES,
PART NOT TO BE USED
1 2
1000pF
1
2
CB726
NP*
NP*
RB489
TL431ACD
50V-10%
7
PLEASE CONTACT
COMPONENT ENGINEER.
+3.3V
+3.3V
29
28
LM_X05--83009 sub for p/n consolidation
22uF 6.3V
22uF 6.3V
21
SUB*_83009
VCC
NP*
21
22uF 6.3V
21
SUB*_83009
7899B_TRMPWR
1K-5%
D27
8
2
RB491
21
NP*
1
7
6
3
PLEASE CONTACT
ON NEW DESIGNES,
PART NOT TO BE USED
7899_SVCC_33_18
1 2
SUB*_83009
L59
7902--Adaptec says to make sure D23 and D27 have a default voltage reference of 2.5V w/o biasing resistors
TL431ACD
50V-10%
1000pF
2
COMPONENT ENGINEER.
L55
1 2
L58
L57
21
1
NP*
21
21
CB744
21
CB686
AGND1
1 2
CB734
AGND1
1 2
AGND1
21
CB741
AGND1
22uF 6.3V
21
1 2
CB710
.01uF 50V
21
CB743
21
CB738
.01uF 50V
1 2
CB737
.01uF 50V .01uF 50V
L54
21
1 2
CB696
SUB*_83009
AGND1
21
CB706
.01uF 50V
.01uF 50V
.01uF 50V
21
CB742
.01uF 50V
NET_PHYSICAL_TYPE=PLANE
1 2
.01uF 50V
7902_AVCC1_F
7902_AVCC2_F
1 2
.01uF 50V
21
CB709
.01uF 50V
.01uF 50V
21
.01uF 50V
.01uF 50V
.01uF 50V
7902_PXAVCC33_F
7899_AVCC50_18_F
+3.3V
Y1
RSVD/PXAVCC18
Y2
RSVD/PXAGND2
AC1
RSVD/PAGAURDV33
T2
RSVD/PCAVCC33_A
T3
RSVD/PCAVCC33_B
U1
RSVD/PXAVCC33_A
U2
RSVD/PXAVCC33_B
V1
RSVD/PCAGND1
V2
RSVD/PCAGND2
W2
RSVD/PXAGND1
AB1
RSVD/PAGAURDG
D8
RSVD/SRAGARDV33
B8
RSVD/AVCC33_A
A9
RSVD/AVCC33_B
A13
RSVD/AGND_A
B14
RSVD/AGND_B
D10
RSVD/SRAGARDG
C8
RSVD/STAGARDV33
A10
RSVD/AVCC33_C
A11
AVCC33_D
A12
AVCC33_E
C11
AGND_C
C12
RSVD/AGND_D
C10
RSVD/STAGARDG
A8
AVCC50/18
B7
RSVD/AVCC18_A
C7
RSVD/AVCC18_B
D7
RSVD/AVCC18_C
C13
RSVD/AGND_E
C14
RSVD/AGND_F
AA2
RSVD/PZV33
AA3
RSVD/PZGND
W5
VDPCI/VIO_1
ADAPTEC U-160/320 SCSI
AIC- 7899W/7902 REV 8/30/00
HETERO 3 OF 4
SVCCA285/25_1 SVCCA285/25_2 SVCCA285/25_3 SVCCA285/25_4 SVCCA285/25_5 SVCCA285/25_6
SVCCB285/25_1 SVCCB285/25_2 SVCCB285/25_3 SVCCB285/25_4 SVCCB285/25_5 SVCCB285/25_6
SVCC33/18_1 SVCC33/18_2 SVCC33/18_3 SVCC33/18_4
RSVD/PXVCC18
3.3V/CPWR18_1
3.3V/CPWR18_2
3.3V/CPWR18_3
3.3V/CPWR18_4
3.3V/CPWR18_5
3.3V/CPWR18_6
3.3V/CPWR18_7
3.3V/CPWR18_8
3.3V/CPWR18_9
3.3V/CPWR18_10
3.3V/CPWR18_11
3.3V/CPWR18_12
3.3V/CPWR18_13
3.3V/CPWR18_14
3.3V/CPWR18_15
3.3V/CPWR18_16
3.3V/CPWR18_17
3.3V/CPWR18_18
3.3V/CPWR18_19
3.3V/CPWR18_20
RSVD/SVCC33 SVCC50/33_1 SVCC50/33_2 SVCC50/33_3 SVCC50/33_4 SVCC50/33_5
E15 E16 E19 E20 G22 H22
E7 E8 G5 H5 L5 M5
C3 C23 D4 G26
P1
A7 A14 C17 D14 K25 L1 L26 M1 R1 R26 V26 W1 AA1 AA26 AF6 AF9 AF12 AF15 AF18 AF21
A1 A4 A16 D23 H26 K1
7899_SVCCA285_25
7899_SVCCB_285_25
7899_SVCC_33_18
21
CB677
.01uF 50V
1 2
CB739
1 2
CB673
21
.01uF 50V
7902--Adaptec says to remove R624 and stuff R623 for 7902
28
28
28
21
CB732
.01uF 50V
0.1uF 16V
.01uF 50V
SUB*_83009
22uF 6.3V
SUB*_65FJG
VCC
22uF 6.3V
1 2
SUB*_83009
.01uF 50V
0.1uF 16V
CB740
12
21
1 2
150-1%
1 2
CB716
2 1
.01uF 50V
22uF 6.3V
CB733
1
ADJ/GND
2
VOUT TAB
3
VIN
0.1uF 16V
21
CB736
.01uF 50V
VCC
1 2
1 2
SUB*_83009
LM_X05--83009 sub for p/n consolidation
CB735
1 2
.01uF 50V
+3.3V
21
2 1
NP*
CHA: 2.85V FOR 7899W/2.5V REG FOR 7902
21
121-1%
4
22uF 6.3V
LT1117
SUB*_83009
LM_X05--83009 sub for p/n consolidation
2.85V: Rxxx = 121ohms, Ryyy = 154ohms
2.5V : Rxxx = 121ohms, Ryyy = 121ohms
22uF 6.3V
1 2
SUB*_83009
0.1uF 16V
CB745
1 2
CB699
12
0.1uF 16V 2 1
CB688
1 2
CB729
.01uF 50V
0.1uF 16V CB712
12
21
CB725
0.1uF 16V 2 1
CB690
CB731
.01uF 50V
0.1uF 16V CB722
12
1 2
.01uF 50V
12
CB730
NET_PHYSICAL_TYPE=PLANE
7899_SVCCA285_25
0.1uF 16V
1
2
28
3
ADAPTEC U-160/320 SCSI
AIC- 7899W/7902 REV 8/30/00
HETERO 4 OF 4
4Kb SEEPROM for Both Channels
+3.3V
0.1uF 16V 2 1
CB698
0.1uF 16V CB693
12
0.1uF 16V CB691
12
0.1uF 16V 2 1
CB692
0.1uF 16V CB676
12
0.1uF 16V 2 1
CB711
0.1uF 16V 2 1
CB718
0.1uF 16V CB713
12
VCC
0.1uF 16V 2 1
CB705
0.1uF 16V CB674
12
0.1uF 16V 2 1
CB675
SUB*_65FJG
VCC
22uF 6.3V
1.8V REG FOR 7902
1 2
SUB*_83009
22uF 6.3V
150-1%
1 2
SUB*_83009
CHB: 2.85V FOR 7899W/2.5V REG FOR 7902
21
ADJ/GND
1
VOUT TAB
2
VIN
3
LT1117
LM_X05--83009 sub for p/n consolidation
1 2
121-1%
4
22uF 6.3V
1 2
SUB*_83009
2.85V: Rxxx = 121ohms, Ryyy = 154ohms
2.5V : Rxxx = 121ohms, Ryyy = 121ohms
22uF 6.3V
1 2
SUB*_83009
21
CB724
.01uF 50V
CB728
1 2
.01uF 50V
21
CB720
.01uF 50V
CB727
2 1
NET_PHYSICAL_TYPE=PLANE
7899_SVCCB_285_25
1487
0.1uF 16V
28
+3.3V
+3.3V
21
NP*
+3.3V
RB483
4 4
+3.3V
27
27
27
8.2K-5% PU_EEP2_6
7899_SEDI 7899_SEECS 7899_SECK
SUB=SUB*_22327
1 2
8.2K-5%
6
ORG
3
DI
1
CS
2
SK
1 2
VCC
DO
GND
8
4
7899_SEDO
5
RB460
1 2
8.2K-5%
27
LM_X05--83009 sub for p/n consolidation
22uF 6.3V
21
SUB*_83009
22uF 6.3V
1 2
SUB*_83009
+3.3V
1 2
INSTALL IF 7902 POPULATED
VR3
VOVIN
4 2
TAB GND
SC1566IM-1.8V
NP*
BE USED ON NEW DESIGNS.
31
22uF 10V
21
BE USED ON NEW DESIGNS.
THIS PART IS NOT TO
22uF 10V
THIS PART IS NOT TO
NET_PHYSICAL_TYPE=PLANE
1 2
7899_SVCC_33_18
28
7899
COMPUTER
47K-5%
RB465
21
RB466
SUB*_2817P
93C46
CORPORATION
AUSTIN,TEXAS
.01uF 50V
Jaguar H3007 - X00: Changed RB465 to 1K (P/N 22327) from 8.2K. Per Adaptec's reccomendation, to overcome internal 50K PU.
NP*
TITLE
SCHEM,PLN,PE4600,2P
7902--Adaptec says to make RB465 1k for 7902
SUB NM93C66 OR AT93C66 DEVICE FOR 7902
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
12/5/2003
A02
SHEET
28 OF 63
A B
DC
Page 29
B D
CA
1
ROOM=7899_TERM
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
7899A_SIO+ 7899A_SIO­7899A_SREQ+ 7899A_SREQ­7899A_SCD+ 7899A_SCD­7899A_SSEL+ 7899A_SSEL­7899A_SMSG+ 7899A_SMSG­7899A_SD+8 7899A_SD-8 7899A_SD+9 7899A_SD-9 7899A_SD+10 7899A_SD-10 7899A_SD+11 7899A_SD-11
VCC
2 3 4 5 7 8
9 10 11 12 18 19 20 21 23 24 25 26
R1P R1N R2P R2N R3P R3N R4P R4N R5P R5N R6P R6N R7P R7N R8P R8N R9P R9N
FS3
1 2
MSTR/SLV
7902--Adaptec says need to add 10k in series with DIFFSENSE for 7902
ISO
DIFFSENSE
DIFF_CAP
TPWR1 TPWR2
HSGND1 HSGND2
GND
1 2
1K-5%
15
13 16 17 1
27 28
6 22 14
MBRS330T3
2 1
D25
7899A_TRMPWR
7899A_DIFFSENSE DIFF_B_7899A REG0_7899A
BE USED ON NEW DESIGNS.
28,29
THIS PART IS NOT TO
22uF 10V
1 2
SUB*_78020
LM_X04--Sub for part consolidation
C539 1 2
1 2
1
2
4.7uF
6.3V-10%
SUB*_78020
.01UF
50V-20%
2
1
.01UF
21
20K-5%
0.1uF 16V C527
21
2
1
50V-20%
.01UF
SUB*_78020
27,29
50V-20%
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
7899B_SIO+ 7899B_SIO­7899B_SREQ+ 7899B_SREQ­7899B_SCD+ 7899B_SCD­7899B_SSEL+ 7899B_SSEL­7899B_SMSG+ 7899B_SMSG­7899B_SD+8 7899B_SD-8 7899B_SD+9 7899B_SD-9 7899B_SD+10 7899B_SD-10 7899B_SD+11 7899B_SD-11
VCC
2 3 4 5 7 8
9 10 11 12 18 19 20 21 23 24 25 26
R1P R1N R2P R2N R3P R3N R4P R4N R5P R5N R6P R6N R7P R7N R8P R8N R9P R9N
FS4
21
MSTR/SLV
DIFFSENSE
DIFF_CAP
TPWR1 TPWR2
HSGND1 HSGND2
ISO
GND
15
13 16 17 1
27 28
6 22 14
1K-5%
21
MBRS330T3
12
D26
7899B_TRMPWR
7899B_DIFFSENSE DIFF_B_7899B REG0_7899B
BE USED ON NEW DESIGNS.
28,29
THIS PART IS NOT TO
22uF 10V
1
2
21
SUB*_78020
LM_X04--Sub for part consolidation
4.7uF
6.3V-10%
SUB*_78020
.01UF
50V-20%
2
1
1 2
0.1uF 16V 1 2
.01UF
50V-20%
20K-5%
2
1
.01UF
SUB*_78020
27,29
ROOMS COMPLETE
50V-20%
1
2
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
7899A_SDP+1 7899A_SDP-1 7899A_SD+15 7899A_SD-15 7899A_SD+14 7899A_SD-14 7899A_SD+13 7899A_SD-13 7899A_SD+12 7899A_SD-12 7899A_SD+0 7899A_SD-0 7899A_SD+1 7899A_SD-1 7899A_SD+2 7899A_SD-2 7899A_SD+3 7899A_SD-3
10 11 12 18 19 20 21 23 24 25 26
DS2119M
todo need 10k ohm resistor in series with diffsense to 7902
2
R1P
ISO
15
13 16 17 1
SLAVE_7899A
NC_DIFF1_7899A
REG1_7899A
3
R1N
4
R2P
5
R2N
7
R3P
8
R3N
9
R4P
MSTR/SLV
DIFFSENSE
DIFF_CAP
TPWR1 TPWR2
27 28
1 2
220
6.3V-10%
1 2
4.7uF
R6P R6N R7P R7N R8P
GND
6 22 14
R8N R9P R9N
HSGND1 HSGND2
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
7899B_SDP+1 7899B_SDP-1 7899B_SD+15 7899B_SD-15 7899B_SD+14 7899B_SD-14 7899B_SD+13 7899B_SD-13 7899B_SD+12 7899B_SD-12 7899B_SD+3 7899B_SD-3 7899B_SD+2 7899B_SD-2 7899B_SD+1 7899B_SD-1 7899B_SD+0 7899B_SD-0
10 11 12 18 19 20 21 23 24 25 26
2
R1P
3
R1N
4
R2P
5
R2N
7
R3P
8
R3N
9
R4P R4N R5P R5N R6P R6N R7P R7N R8P R8N R9P R9N
DS2119M
MSTR/SLV
ISO
DIFFSENSE
DIFF_CAP
TPWR1 TPWR2
HSGND1 HSGND2
GND
15
13 16 17 1
27 28
6 22 14
SLAVE_7899B
NC_DIFF1_7899B
REG1_7899B
220
21
1 2
4.7uF
6.3V-10%
2
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
7899A_SD+4 7899A_SD-4 7899A_SD+5 7899A_SD-5 7899A_SD+6 7899A_SD-6 7899A_SD+7 7899A_SD-7 7899A_SDP+0 7899A_SDP-0 7899A_SRST+ 7899A_SRST­7899A_SACK+ 7899A_SACK­7899A_SBSY+ 7899A_SBSY­7899A_SATN+ 7899A_SATN-
10 11 12 18 19 20 21 23 24 25 26
DS2119M
2
R1P
3
R1N
4
R2P
5
R2N
7
R3P
8
R3N
9
R4P
MSTR/SLV
DIFFSENSE
DIFF_CAP
TPWR1
TPWR2 R6P R6N
ISO
15
13 16 17 1
27 28
NC_DIFF2_7899A
REG2_7899A
220
1 2
4.7uF
6.3V-10%
21
R7P R7N R8P
GND
6 22 14
R8N R9P R9N
HSGND1 HSGND2
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
7899B_SD+4 7899B_SD-4 7899B_SD+5 7899B_SD-5 7899B_SD+6 7899B_SD-6 7899B_SD+7 7899B_SD-7 7899B_SDP+0 7899B_SDP-0 7899B_SRST+ 7899B_SRST­7899B_SACK+ 7899B_SACK­7899B_SBSY+ 7899B_SBSY­7899B_SATN+ 7899B_SATN-
10 11 12 18 19 20 21 23 24 25 26
2
R1P
3
R1N
4
R2P
5
R2N
7
R3P
8
R3N
9
R4P R4N R5P R5N R6P R6N R7P R7N R8P R8N R9P R9N
DS2119M
MSTR/SLV
ISO
DIFFSENSE
DIFF_CAP
TPWR1 TPWR2
HSGND1 HSGND2
GND
15
13 16 17 1
27 28
6 22 14
NC_DIFF2_7899B
REG2_7899B
1 2
220
1 2
4.7uF
6.3V-10%
3
4
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
28,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
DS2119M
SCSI_A
7899A_SD+12 7899A_SD+13 7899A_SD+14 7899A_SD+15 7899A_SDP+1 7899A_SD+0 7899A_SD+1 7899A_SD+2 7899A_SD+3 7899A_SD+4 7899A_SD+5 7899A_SD+6 7899A_SD+7 7899A_SDP+0
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15
7899A_DIFFSENSE
7899A_TRMPWR
16 17 18
NC_SCSI1_19 NC_SCSI1_53
19 20
7899A_SATN+
21 22
7899A_SBSY+ 7899A_SACK+ 7899A_SRST+ 7899A_SMSG+ 7899A_SSEL+ 7899A_SCD+ 7899A_SREQ+ 7899A_SIO+ 7899A_SD+8 7899A_SD+9 7899A_SD+10 7899A_SD+11
23 24 25 26 27 28 29 30 31 32 33 34
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
7899A_SD-12 7899A_SD-13 7899A_SD-14 7899A_SD-15 7899A_SDP-1 7899A_SD-0 7899A_SD-1 7899A_SD-2 7899A_SD-3 7899A_SD-4 7899A_SD-5 7899A_SD-6 7899A_SD-7 7899A_SDP-0
7899A_TRMPWR
7899A_SBSY­7899A_SACK­7899A_SRST­7899A_SMSG­7899A_SSEL­7899A_SCD­7899A_SREQ­7899A_SIO­7899A_SD-8 7899A_SD-9 7899A_SD-10 7899A_SD-11
7899A_SATN-
28,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
28,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
7899B_SD+12 7899B_SD+13 7899B_SD+14 7899B_SD+15 7899B_SDP+1 7899B_SD+0 7899B_SD+1 7899B_SD+2 7899B_SD+3 7899B_SD+4 7899B_SD+5 7899B_SD+6 7899B_SD+7 7899B_SDP+0
7899B_DIFFSENSE
7899B_TRMPWR
7899B_SATN+
7899B_SBSY+ 7899B_SACK+ 7899B_SRST+ 7899B_SMSG+ 7899B_SSEL+ 7899B_SCD+ 7899B_SREQ+ 7899B_SIO+ 7899B_SD+8 7899B_SD+9 7899B_SD+10 7899B_SD+11
DS2119M
SCSI_B
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
7899B_SD-12 7899B_SD-13 7899B_SD-14 7899B_SD-15 7899B_SDP-1 7899B_SD-0 7899B_SD-1 7899B_SD-2 7899B_SD-3 7899B_SD-4 7899B_SD-5 7899B_SD-6 7899B_SD-7 7899B_SDP-0
7899B_TRMPWR
NC_SCSI2_53NC_SCSI2_19
7899B_SBSY­7899B_SACK­7899B_SRST­7899B_SMSG­7899B_SSEL­7899B_SCD­7899B_SREQ­7899B_SIO­7899B_SD-8 7899B_SD-9 7899B_SD-10 7899B_SD-11
7899B_SATN-
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
28,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
27,29
WILL NEED TO MATCH SCSI TRACES TO 120 OHM DIFFERENTIAL IMPEDENCE
AVOID VIAS. ROUTE +/- ON ONE LAYER AVOID ROUTING ANY OTHER SIGNAL CLOSE ON THAT LAYER ROUTE EACH PAIR PARALLEL
ROUTE EACH PAIR EQUIDISTANT MATCHED LENGTH ALSO
TITLE
DWG NO.
7899
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003 29 OF 63
3
4
A02
A B
DC
Page 30
B D
CA
+3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V
+3.3V
12-5-2003_10:51
21
RB309
2.2K-5%
1 2
2.2K-5%
NP*
ROOM=CIOB2
PULLED UP
APLL Enabled
PULLED DOWN
APLL Disabled
30,31
PCIX4_GNT0
21
2.2K-5%
RB286
1 2
2.2K-5%
21
RB297
NP*
2.2K-5%
RB258
1 2
2.2K-5%
21
NP*
2.2K-5%
1 2
2.2K-5%
RB299
1 2
NP*
2.2K-5%
+3.3V
1
PCIX4_GNT5
30
???
RB301
1 2
2.2K-5%
IMB at 400MHz
Enable Primary Hotplug Controller Disable Primary Hotplug Controller
All Bits of Function # Used for Reg Access
Enable Secondary Hotplug Controller
Only Bit 0 of Function # Used for Reg Access
Disable Secondary Hotplug Controller
IMB Skew in Normal Mode IMB Skew in Test Mode
CIOB ID BIT0 CIOB ID BIT1 CIOB ID BIT2
IMB at 266MHz
30,55
30,35
30,55
30,33
PCIX4_GNT4
30
PCIX4_HP_GNT
PCIX5_GNT0
PCIX5_HP_GNT
PCIX5_GNT4
30
PCIX4_GNT1
PCIX4_GNT2
30
PCIX4_GNT3
30
1
P25 N26 N25 M26 M25 M24 L26 L25 L24 K25 K24 J26 J25 J24 H26 H25 D25 C26 D24 C25 B26 C24 A25 B24 A24 B23 A23 C22 B22 A22 C21
B21 AF23 AD22 AE23 AF24 AD23 AE24 AF25 AD24 AE26 AD25 AC24 AD26 AC25 AC26 AB24 AB25 AB26 AA24 AA25 AA26
Y24
Y25
Y26
W24
W25
W26
V24
V25
V26
U24
U25
U26
P_AD0 P_AD1 P_AD2 P_AD3 P_AD4 P_AD5 P_AD6 P_AD7 P_AD8 P_AD9 P_AD10 P_AD11 P_AD12 P_AD13 P_AD14 P_AD15 P_AD16 P_AD17
PRIMARY PCI-X BUS
P_AD18 P_AD19 P_AD20 P_AD21 P_AD22 P_AD23 P_AD24 P_AD25 P_AD26 P_AD27 P_AD28 P_AD29 P_AD30 P_AD31
P_DEVSEL P_AD32 P_AD33 P_AD34 P_AD35 P_AD36 P_AD37 P_AD38 P_AD39 P_AD40 P_AD41 P_AD42 P_AD43
P_PHPNC1
P_PHPNC2
P_PHPNC3 P_AD44 P_AD45 P_AD46 P_AD47
P_PCICAP1
P_PCICAP2 P_AD48 P_AD49
P_PCIRST P_AD50 P_AD51 P_AD52 P_AD53 P_AD54 P_AD55 P_AD56 P_AD57 P_AD58 P_AD59 P_AD60 P_AD61 P_AD62 P_AD63
SERVERWORKS CIOB-X Ver 1.2
P_CBE0 P_CBE1 P_CBE2 P_CBE3 P_CBE4 P_CBE5 P_CBE6 P_CBE7
P_REQ0 P_REQ1 P_REQ2 P_REQ3 P_REQ4 P_REQ5 P_REQ6
P_GNT0 P_GNT1 P_GNT2 P_GNT3 P_GNT4 P_GNT5 P_GNT6
P_TRDY P_STOP P_LOCK
P_IRDY
P_FRAME
P_PAR P_PERR P_SERR
P_REQ64 P_ACK64 P_PAR64
P_M66EN
PCLKO PFBCLK
2
3
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31,33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
31-33
PCIX4_AD0 PCIX4_AD1 PCIX4_AD2 PCIX4_AD3 PCIX4_AD4 PCIX4_AD5 PCIX4_AD6 PCIX4_AD7 PCIX4_AD8 PCIX4_AD9 PCIX4_AD10 PCIX4_AD11 PCIX4_AD12 PCIX4_AD13 PCIX4_AD14 PCIX4_AD15 PCIX4_AD16 PCIX4_AD17 PCIX4_AD18 PCIX4_AD19 PCIX4_AD20 PCIX4_AD21 PCIX4_AD22 PCIX4_AD23 PCIX4_AD24 PCIX4_AD25 PCIX4_AD26 PCIX4_AD27 PCIX4_AD28 PCIX4_AD29 PCIX4_AD30 PCIX4_AD31 PCIX4_AD32 PCIX4_AD33 PCIX4_AD34 PCIX4_AD35 PCIX4_AD36 PCIX4_AD37 PCIX4_AD38 PCIX4_AD39 PCIX4_AD40 PCIX4_AD41 PCIX4_AD42 PCIX4_AD43 PCIX4_AD44 PCIX4_AD45 PCIX4_AD46 PCIX4_AD47 PCIX4_AD48 PCIX4_AD49 PCIX4_AD50 PCIX4_AD51 PCIX4_AD52 PCIX4_AD53 PCIX4_AD54 PCIX4_AD55 PCIX4_AD56 PCIX4_AD57 PCIX4_AD58 PCIX4_AD59 PCIX4_AD60 PCIX4_AD61 PCIX4_AD62 PCIX4_AD63
HETERO 1 OF 3
ADD=ADD*_724YF_U121 SUB=SUB*_205VF
205VF IS CIOB A1.1
HEATSINK W/ LOCTITE384 P#724YF
LM_X04--9C725 changed to 724YF at Celestica's request
+2.5V
SUB*_83008
10V-10%
1uF
1 2
10V-10%
CB406
1uF
10V-10%
CB483
1uF
1 2
CB471
21
CB472
SUB*_83008
0.1uF 16V CB410
1 2
SUB*_83008
+3.3V
4 4
SUB*_83008
10V-10%
1uF
1 2
CB475
10V-10%
LM_X04--83008 sub for p/n consolidation
SUB*_83008
1uF
10V-10%
CB407
1uF
1 2
10V-10%
CB470
1uF
21
21
0.1uF 16V
21
0.1uF 16V CB414
21
CB397
0.1uF 16V
0.1uF 16V CB451
1 2
CB409
21
K26 H24 E24 C23 R24 T26 T25 T24
C18 B18 A18 C17 B17 A17 C16
A21 C20 B20 A20 C19 B19 A19
E26 F25 F26
E25 D26 F24
G26 G24 G25
R26 P26 R25
B14 A14 A15 B16 A16 C15
B15
AF6 AE6
0.1uF 16V CB474
1 2
0.1uF 16V CB427
1 2
PCIX4_CBE0 PCIX4_CBE1 PCIX4_CBE2 PCIX4_CBE3 PCIX4_CBE4 PCIX4_CBE5 PCIX4_CBE6 PCIX4_CBE7
PCIX4_REQ0 PCIX4_REQ1
PCIX4_HP_REQ
PCIX4_GNT0 PCIX4_GNT1 PCIX4_GNT2 PCIX4_GNT3 PCIX4_GNT4 PCIX4_GNT5 PCIX4_HP_GNT
PCIX4_TRDY PCIX4_STOP PCIX4_LOCK
PCIX4_IRDY PCIX4_FRAME PCIX4_DEVSEL
PCIX4_PAR PCIX4_PERR PCIX4_SERR
PCIX4_REQ64 PCIX4_ACK64 PCIX4_PAR64
31,33
31,33
31,33
31,33
31-33
31-33
31-33
31-33
31
33
55
30,31
30,33
30
30
30
30
30,55
31-33
31-33
31-33
31-33
31-33
31-33
31,33
31-33
31-33
31-33
31-33
31-33
8
7
RNB60
1
2
6
5
3
4
NC_PCIX4_SIL
PCIX4_SEG_RST
55
NC_PCIX4_SOD
PCIX4_M66EN PCIX4_XCAP1 PCIX4_XCAP2
PCIX4_PCIRESET
55
55
55
55
RB231
21
R_CK_100M_CKINPBUF4 CK_100M_FBPBUF4
16
22-5%
CK_100M_CKINPBUF4
Jaguar 2.0 Change: RB231 needs to be terminated at CIOB not at buffer
CIOB WILL NEED A HEATSINK
+2.5V
0.1uF 16V CB447
21
0.1uF 16V CB408
21
50V-10%
1000pF
21
.01uF 50V
CB469
1 2
RB253
RB260
CB468
100-1%100-1%
1 2
1 2
SUB*_83008
LM_X04--83008 sub for p/n consolidation
50V-10%
1000pF
1 2
.01uF 50V
CB412
1 2
21
CB429
CB441
.01uF 50V
1uF
CB418
10V-10%
CB473
21
21
220pF
CB443
50V-10%
CIOB2_IMBVREF
220pF
1 2
50V-10%
1000pF
RB275
1 2
16
50V-10%
CB411
1 2
2.2K-5%
50V-10%
1000pF
21
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35,37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
35-37
50V-10%
CB450
1000pF
21
PCIX5_AD0 PCIX5_AD1 PCIX5_AD2 PCIX5_AD3 PCIX5_AD4 PCIX5_AD5 PCIX5_AD6 PCIX5_AD7 PCIX5_AD8 PCIX5_AD9 PCIX5_AD10 PCIX5_AD11 PCIX5_AD12 PCIX5_AD13 PCIX5_AD14 PCIX5_AD15 PCIX5_AD16 PCIX5_AD17 PCIX5_AD18 PCIX5_AD19 PCIX5_AD20 PCIX5_AD21 PCIX5_AD22 PCIX5_AD23 PCIX5_AD24 PCIX5_AD25 PCIX5_AD26 PCIX5_AD27 PCIX5_AD28 PCIX5_AD29 PCIX5_AD30 PCIX5_AD31 PCIX5_AD32 PCIX5_AD33 PCIX5_AD34 PCIX5_AD35 PCIX5_AD36 PCIX5_AD37 PCIX5_AD38 PCIX5_AD39 PCIX5_AD40 PCIX5_AD41 PCIX5_AD42 PCIX5_AD43 PCIX5_AD44 PCIX5_AD45 PCIX5_AD46 PCIX5_AD47 PCIX5_AD48 PCIX5_AD49 PCIX5_AD50 PCIX5_AD51 PCIX5_AD52 PCIX5_AD53 PCIX5_AD54 PCIX5_AD55 PCIX5_AD56 PCIX5_AD57 PCIX5_AD58 PCIX5_AD59 PCIX5_AD60 PCIX5_AD61 PCIX5_AD62 PCIX5_AD63
30
REV 1.0 -- NEC UPD84915F2-011 REV 1.1 -- NEC UPD84915F2-012 REV 2.0 -- NEC UPD84918F2-011 REV 2.1 -- NEC UPD????????
30
30
CB440
CIOB2_AVDD
CIOB2_AGND
50V-10%
1000pF
M1 M2 M3 L1 L2 L3 K1 K2 J1 J2 J3 H1 H2 H3 G1 G2 C2 C3 A1 A2 B3 C4 A3 B4 A4 B5 A5 C6 B6 A6 C7
B7 AF3 AD4 AE3 AF2 AD3 AE1 AD2 AC3 AD1 AC2 AB3 AC1 AB2 AB1 AA3 AA2 AA1
Y3
Y2
Y1
W3
W2
W1
V3
V2
V1
U3
U2
U1
T3
T2
T1
S_AD0 S_AD1 S_AD2 S_AD3 S_AD4 S_AD5 S_AD6 S_AD7 S_AD8 S_AD9 S_AD10 S_AD11 S_AD12 S_AD13 S_AD14 S_AD15 S_AD16 S_AD17 S_AD18 S_AD19 S_AD20 S_AD21 S_AD22 S_AD23 S_AD24 S_AD25 S_AD26 S_AD27 S_AD28 S_AD29 S_AD30 S_AD31 S_AD32 S_AD33 S_AD34 S_AD35 S_AD36 S_AD37 S_AD38 S_AD39 S_AD40 S_AD41 S_AD42 S_AD43 S_AD44 S_AD45 S_AD46 S_AD47 S_AD48 S_AD49 S_AD50 S_AD51 S_AD52 S_AD53 S_AD54 S_AD55 S_AD56 S_AD57 S_AD58 S_AD59 S_AD60 S_AD61 S_AD62 S_AD63
S_CBE0 S_CBE1 S_CBE2 S_CBE3 S_CBE4 S_CBE5 S_CBE6 S_CBE7
S_REQ0 S_REQ1 S_REQ2 S_REQ3 S_REQ4 S_REQ5
S_GNT0 S_GNT1 S_GNT2
SECONDARY PCI-X BUS
S_GNT3 S_GNT4 S_GNT5
S_TRDY S_STOP S_LOCK
S_IRDY
S_FRAME
S_DEVSEL
S_PAR S_PERR S_SERR
S_REQ64 S_ACK64 S_PAR64
S_PHPNC1 S_PHPNC2 S_PHPNC3
S_M66EN S_PCICAP1 S_PCICAP2
S_PCIRST
SCLKO
SFBCLK
Jaguar 2.0 Change: RB238 needs to be terminated at CIOB not at buffer
K3 G3 D3 C5 P2 R1 R2 R3
A7 C8 B8 A8 C9 B9
A9 C10 B10 C11 A10 B11
D1 E2 E1
D2 C1 E3
F1 F3 F2
N1 N2 P1
A11 C12 B12 C14 A13 B13
A12
AD6 AF5
SERVERWORKS CIOB - X Ver 1.2
HETERO 2 OF 3
205VF IS CIOB REV A2.0 CURRENTLY
L47
47uH 135MA
LM_X05--83009 sub for p/n consolidation
SUB*_83009
22uF 6.3V
1 2
10V-10%
1uF
1 2
CB432
SUB*_83008 LM_X04--83008 sub for p/n consolidation
RB254
1 2
CB435
1 2
ROOM=CIOB_RIGHT
PCIX5_CBE0 PCIX5_CBE1 PCIX5_CBE2 PCIX5_CBE3 PCIX5_CBE4 PCIX5_CBE5 PCIX5_CBE6 PCIX5_CBE7
PCIX5_REQ0 PCIX5_REQ1
PCIX5_HP_REQ
PCIX5_GNT0 PCIX5_GNT1 NC_PCIX5_GNT2 NC_PCIX5_GNT3 PCIX5_GNT4 PCIX5_HP_GNT
PCIX5_TRDY PCIX5_STOP PCIX5_LOCK
PCIX5_IRDY PCIX5_FRAME PCIX5_DEVSEL
PCIX5_PAR PCIX5_PERR PCIX5_SERR
PCIX5_REQ64 PCIX5_ACK64 PCIX5_PAR64
NC_PCIX5_SIL
PCIX5_SEG_RST
NC_PCIX5_SOD
PCIX5_M66EN PCIX5_XCAP1 PCIX5_XCAP2
PCIX5_PCIRESET
R_CK_100M_CKINPBUF5 CK_100M_FBPBUF5
RB248
21
1 2
2.2-5%
+2.5V
16
35,37
35,37
35,37
35,37
35-37
35-37
35-37
35-37
35
37
55
30,35
37
30
30,55
35-37
35-37
35-37
35-37
35-37
35-37
35,37
35-37
35-37
35-37
35-37
35-37
55
55
55
55
55
RB238
1 2
22-5%
CK_100M_CKINPBUF5
+2.5V
249 Ohm-1%
7
8
RNB48
2
1
16
RB249
1 2
21
+3.3V+3.3V
RB315
1 2
2.2K-5%
NP*
5
6
RB296
NP*
2.2K-5%
1 2
2.2K-5%
21
2.2K-5%
NP*
RB252
1 2
2.2K-5%
21
RB305
2.2K-5%
RB313
1 2
NP*
2.2K-5%
21
RB306
2.2K-5%
21
CIOB ID FOR I2C
4
3
RB250
2.2K-5%
ID = 2 FOR I2C ADDR C4/5 AS OF 8/2
BITS ARE USED AS BINARY ENCODED -ID
LOOP_SNGL_B_IMB_UP_CLK
1 2
39-5%
RB278
1 2
RB279
2
NP*
RB283
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
B_IMB_DN_D0 B_IMB_DN_D1 B_IMB_DN_D2 B_IMB_DN_D3 B_IMB_DN_D4 B_IMB_DN_D5 B_IMB_DN_D6 B_IMB_DN_D7 B_IMB_DN_D8 B_IMB_DN_D9 B_IMB_DN_D10 B_IMB_DN_D11 B_IMB_DN_D12 B_IMB_DN_D13 B_IMB_DN_D14 B_IMB_DN_D15
B_IMB_DN_CLK B_IMB_DN_CON B_IMB_DN_PAR
30
30
CIOB2_IMBCOMP0
CIOB2_IMBVREF
30
CIOB2_AVDD
CIOB2_AGND
+2.5V
R_B_IMB_UP_CLK
30
AD12 AF19
IMBD_R0 IMBD_R1 IMBD_R2 IMBD_R3 IMBD_R4 IMBD_R5 IMBD_R6 IMBD_R7 IMBD_R8 IMBD_R9 IMBD_R10 IMBD_R11 IMBD_R12 IMBD_R13 IMBD_R14 IMBD_R15
IMBD_T0 IMBD_T1 IMBD_T2 IMBD_T3 IMBD_T4 IMBD_T5 IMBD_T6 IMBD_T7 IMBD_T8
IMBD_T9 IMBD_T10 IMBD_T11 IMBD_T12 IMBD_T13 IMBD_T14 IMBD_T15
IMBCLK_R IMBCLK_T
AF9 AF17
IMBCON_R IMBCON_T
AE9 AE16
IMBPAR_R IMBPAR_T
AF7 AD7
AD8 AE7 AE8
AD9
AF8
AA4
AVDD1 AVDD2
AGND1 AGND2 AGND3
IMBCOMP0
VREFIMB
VCC25_1
PCIRST
DPLLRST
CLKIN
ALERT
RSVD_A26
RSVD_AF26
TESTMODE
VCC25_2
AC5 AC8
AE2
B2
B25
D5 D11 D14 D17 D20 E23
G4 M23 N24
P3 W23
VCC25_3 VCC25_4 VCC25_5 VCC25_6 VCC25_7 VCC25_8 VCC25_9 VCC25_10 VCC25_11 VCC25_12 VCC25_13 VCC25_14 VCC25_15 VCC25_16 VCC25_17 VCC25_18 VCC25_19 VCC25_20 VCC25_21 VCC25_22 VCC25_23 VCC25_24 VCC25_25 VCC25_26
POWER/GROUND IMB BUS
VCC_AA23
VCC_AB4 VCC_AC7
VCC_AC22
VCC_D7
VCC_D9 VCC_D12 VCC_D15 VCC_D19 VCC_D22
VCC_E4 VCC_G23
VCC_H4 VCC_J23
VCC_K4 VCC_L23
VCC_M4
VCC_N3 VCC_P24
VCC_R4 VCC_R23
VCC_U4 VCC_U23
VCC_W4
SDA SCK
C13
AF1
AE5
AE4
AD5 AF4
A26 AF26 B1
SERVERWORKS CIOB-X Ver 1.2
HETERO 3 OF 3
1 2
1 2
39-5%
NP*
LOOP_DBL_B_IMB_UP_CLK
RB284
39-5%
RN123
R_B_IMB_UP_D0
R_B_IMB_UP_D1
R_B_IMB_UP_D2
R_B_IMB_UP_D3
R_B_IMB_UP_D4 81
R_B_IMB_UP_D5
R_B_IMB_UP_D6
R_B_IMB_UP_D7 4 5 R_B_IMB_UP_D8 B_IMB_UP_D8 R_B_IMB_UP_D9 2 7
R_B_IMB_UP_D10 R_B_IMB_UP_D11 B_IMB_UP_D11
R_B_IMB_UP_D12
R_B_IMB_UP_D13
R_B_IMB_UP_D14
R_B_IMB_UP_D15
R_B_IMB_UP_CLK
R_B_IMB_UP_CON
PCI_RST_CIOB
PLLRST
1 8
39 OHM-5%
RN123
39 OHM-5%
RN120
39 OHM-5%
RN118
39 OHM-5%
RN116
39 OHM-5%
1 2
39-5%
30
R_B_IMB_UP_PAR
11,13-15,17,39,60
39 OHM-5%
54
39 OHM-5%
63
39 OHM-5%
39 OHM-5%
81
39 OHM-5%
RN123
RN120
RN120
RN118
RN116
2 7
17,59
CK_33M_CIOB2
GPE_CIOB2_ALERT
NC_CIOB2_A26 NC_CIOB2_AF26
CIOB2_TESTMODE
R1095
A1.2 CIOB INSTALL RB230
+3.3V
A1.2 CIOB DEPOP R1017 A2.0 CIOB INSTALL R1017
A2.0 CIOB DEPOP RB230
B_IMB_UP_CLK
RB285
NP*
11
21
B_IMB_UP_D0
72
RN123
3 6
39 OHM-5%
RN120
2 7
39 OHM-5%
RN118
B_IMB_UP_D1 B_IMB_UP_D2 B_IMB_UP_D3 B_IMB_UP_D4 B_IMB_UP_D5 B_IMB_UP_D6 B_IMB_UP_D7
81
B_IMB_UP_D9 B_IMB_UP_D10
63
39 OHM-5%
RN118
4 5
39 OHM-5%
RN116
63
39 OHM-5%
B_IMB_UP_D12 B_IMB_UP_D13 B_IMB_UP_D14 B_IMB_UP_D15
RN116
4 5
39 OHM-5%
B_IMB_UP_CON
21
B_IMB_UP_PAR
39-5%
SD_X06 -- added new reset line for ciob's
4
39
1 2
1 2
R1098
R1099
NP*
ENV_SEG0_25V_SDA
ENV_SEG0_25V_SCL
NP*
11,15,17,53
11,15,17,53
+3.3V
1 2
8.2K-5%
1 2
8.2K-5%
R1094
COMPUTER CORPORATION
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
+3.3V
21
21
RB236
3
2.2K-5%
220
NP*
AUSTIN,TEXAS
SUB*_83008
SUB*_83008
TITLE
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
DC
SCHEM,PLN,PE4600,2P
H3007
SHEET
A02
30 OF 6312/5/2003
Page 31
B D
CA
12-5-2003_10:51
ROOMS COMPLETE
1
ROOM=SLOT4
31
NET_PHYSICAL_TYPE=PLANE
S4_EN_GATE
31
S4_SENSE_5V
VCC +3.3V
SUB*_24044
1 2
.01-1%
R47
SUB*_24044
.01-1%
R70
21
S4_SENSE_3V
31
NET_PHYSICAL_TYPE=PLANE
5
QB5
SI4410DY SI4410DY
4
837
5162738
Q3
SI4410DY
4
S4_EN_GATE
31
SI4410DY
4
5162738
Q10
261
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
31,55
PCIX4_AD61 PCIX4_AD60 PCIX4_AD59 PCIX4_AD58 PCIX4_AD57 PCIX4_AD56 PCIX4_AD54 PCIX4_AD55 PCIX4_AD53 PCIX4_AD52
S4_QS_EN
SUB*_8174U
VCC
8
6
5
LM_X04--Sub for part consolidation
50V-20%
4
372
1
.01UF
SUB*_78020
21
+3.3V
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
PCIX4_AD51 PCIX4_AD50 PCIX4_AD49 PCIX4_AD48 PCIX4_AD46 PCIX4_AD47 PCIX4_AD45 PCIX4_AD44 PCIX4_AD43 PCIX4_AD42
VCC
VCC
U92
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
S4_AD61 S4_AD60 S4_AD59 S4_AD58 S4_AD57 S4_AD56 S4_AD54 S4_AD55 S4_AD53 S4_AD52
S4_AD51 S4_AD50 S4_AD49 S4_AD48 S4_AD46 S4_AD47 S4_AD45 S4_AD44 S4_AD43 S4_AD42
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
LM_X04--Sub for part consolidation
50V-20%
.01UF
SUB*_78020
LM_X04--Sub for part consolidation
50V-20%
.01UF
SUB*_78020
VCC
VCC
21
1 2
+3.3V
+3.3V
30,33
30,33
30,33
30,33
30,33
30,33
30,33
30,33
30,33
30,33
31,55
30,33
30,33
30,33
30,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
PCIX4_AD27 PCIX4_AD26 PCIX4_AD25 PCIX4_AD24 PCIX4_CBE3 PCIX4_AD23 PCIX4_AD22 PCIX4_AD21 PCIX4_AD20 PCIX4_AD19
S4_QS_EN
PCIX4_AD18 PCIX4_AD17 PCIX4_AD16 PCIX4_CBE2 PCIX4_FRAME PCIX4_IRDY PCIX4_TRDY PCIX4_DEVSEL PCIX4_STOP PCIX4_LOCK
VCC
SUB*_8174U
VCC
U44
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U56
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
S4_AD27 S4_AD26 S4_AD25 S4_AD24 S4_CBE3 S4_AD23 S4_AD22 S4_AD21 S4_AD20 S4_AD19
S4_AD18 S4_AD17 S4_AD16 S4_CBE2 S4_FRAME S4_IRDY S4_TRDY S4_DEVSEL S4_STOP S4_LOCK
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
1
2
LM_X04--Sub for part consolidation
50V-20%
.01UF
C37
21
SUB*_78020
+3.3V
31,55
31
1 2
S4_PWR_FAULT S4_EN_GATE
31
0.1uF 16V
S4_5V
S4_SENSE_3V
SUB*_63206
12.1K1% is sub p/n
C43
1 2
32
100-5%
21
1
M12VIN
2
FLT
3
3V5VG
4
VCC
5
12VIN
6
3VISEN
7
3VS
8
OCSET
UB4
HIP1011CB
SUB*_7372P
M12VO M12VG
GND
5VISEN
5VS
PWRON
16
S4_N12V
15
S4_N12VG
14
S4_12VG 13 12
S4_12V 11
S4_SENSE_5V 10 9
S4_PWR_EN
1 2
S4_3.3V
0.1uF 16V 1 2
31,32
31
31
31,32
31
55
32
VCC
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
+3.3V
31,55
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
31,55
40
40
40
40
30
30
30,33
30,33
30,33
30,33
31,55
S4_QS_EN
PCIX4_AD41 PCIX4_AD40 PCIX4_AD39 PCIX4_AD38 PCIX4_AD37 PCIX4_AD36 PCIX4_AD35 PCIX4_AD33 PCIX4_AD34 PCIX4_AD32
S4_QS_EN
PIRQ_19 PIRQ_20 PIRQ_21 PIRQ_22
PCIX4_GNT0 PCIX4_REQ0 PCIX4_AD30 PCIX4_AD31 PCIX4_AD29 PCIX4_AD28
S4_QS_EN
SUB*_8174U
VCC
SUB*_8174U
VCC
SUB*_8174U
1 12
ON GND
5C6800 QSOP24
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U33
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S4_AD41 S4_AD40 S4_AD39 S4_AD38 S4_AD37 S4_AD36 S4_AD35 S4_AD33 S4_AD34 S4_AD32
S4_PIRQA S4_PIRQB S4_PIRQC S4_PIRQD S4_GNT S4_REQ S4_AD30 S4_AD31 S4_AD29 S4_AD28
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
VCC VCC
+3.3V
+3.3V
31,55
30,32,33
30,32,33
30,33
30,33
30,33
30,33
30,33
30,33
30,33
30,33
31,55
30,33
30,33
30,33
30,33
30,33
30,33
30,33
30,33
30,33
30,33
31,55
S4_QS_EN
PCIX4_PERR PCIX4_SERR PCIX4_PAR PCIX4_AD15 PCIX4_CBE1 PCIX4_AD14 PCIX4_AD13 PCIX4_AD12 PCIX4_AD11 PCIX4_AD10
S4_QS_EN
PCIX4_AD9 PCIX4_CBE0 PCIX4_AD8 PCIX4_AD7 PCIX4_AD6 PCIX4_AD5 PCIX4_AD4 PCIX4_AD3 PCIX4_AD2 PCIX4_AD1
S4_QS_EN
SUB*_8174U
VCC
SUB*_8174U
VCC
SUB*_8174U
13
BIASV
1 12
ON GND
5C6800 QSOP24
U65
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U73
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S4_PERR S4_SERR S4_PAR S4_AD15 S4_CBE1 S4_AD14 S4_AD13 S4_AD12 S4_AD11 S4_AD10
S4_AD9 S4_CBE0 S4_AD8 S4_AD7 S4_AD6 S4_AD5 S4_AD4 S4_AD3 S4_AD2 S4_AD1
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
2
3
31,55
31
31,32
31,32
S4_PWR_FAULT
S4_EN_GATE
S4_12V
S4_N12V
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
+3.3V
30,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
30,32,33
31,55
PCIX4_AD0 PCIX4_ACK64 PCIX4_REQ64 PCIX4_CBE7 PCIX4_CBE6 PCIX4_CBE5 PCIX4_CBE4 PCIX4_PAR64 PCIX4_AD62 PCIX4_AD63
S4_QS_EN
SUB*_8174U
U84
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
5C6800 QSOP24
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
S4_AD0 S4_ACK64 S4_REQ64 S4_CBE7 S4_CBE6 S4_CBE5 S4_CBE4 S4_PAR64 S4_AD62 S4_AD63
3
32
32
32
32
32
32
32
32
32
32
50V-10%
31
31
S4_N12VG
S4_12VG
1 2
.033uF
50V-10%
21
.033uF
50V-10%
C20
1 2
.033uF
50V-10%
100pF
C34
21
PCI4
4 4
PCIX BUS 4
COMPUTER CORPORATION
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
31 OF 63
Page 32
B D
CA
12-5-2003_10:51
ROOMS COMPLETE
1
2
3
31,32
31,32
31,32
16
S4_N12V
S4_5V
S4_3.3V
32
31
31
32,55
32,55
CK_100M_SWSLOT4
31
31
31
31
31
31
31
31
31
31
31
31
31
32,55
31
31
31
31
31
31
31
32,55
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31,32
31,32
31,32
Side B
S4_3.3V
S4_5V
S4_12V
Side A
B1
S4_TCK
NC_S4_TDO
B2 B3 B4
p
B5
B6 S4_PIRQB S4_PIRQD S4_PRESA NC_S4_RSVDB10 S4_PRESB
NC_S4_RSVDB14
B7
B8
B9
B10 B11
B14
B D
IOV
B15 B16
IOV
B17
S4_REQ
S4_AD31 S4_AD29
B18 B19 B20 B21
IOV
B22 S4_AD27 S4_AD25
B23
B24
B25 S4_CBE3 S4_AD23
B26
B27
B28 S4_AD21 S4_AD19
B29
B30
B31 S4_AD17 S4_CBE2
B32
B33
B34 S4_IRDY
B35
B36 S4_DEVSEL S4_XCAP S4_LOCK S4_PERR
B37
B38
B39
B40
B41 S4_SERR
B42
B43 S4_CBE1 S4_AD14
B44
B45
B46 S4_AD12 S4_AD10 S4_M66EN
B47
B48
B49
B50
B51 S4_AD8 S4_AD7
B52
B53
B54 S4_AD5 S4_AD3
B55
B56
B57 S4_AD1
S4_ACK64
B58
B59
B60
IOV
B61
B62
NC_S4_RSVDB63
B63
B64 S4_CBE6 S4_CBE4
B65
B66
IOV
B67 S4_AD63 S4_AD61
S4_AD59 S4_AD57
B68
B69
B70
B71
B72
IOV
B73 S4_AD55 S4_AD53
B74
B75
IOV
B76 S4_AD51 S4_AD49
S4_AD47 S4_AD45
B77
B78
B79
B80
B81
IOV
B82 S4_AD43 S4_AD41
B83
B84
IOV
B85 S4_AD39 S4_AD37
S4_AD35 S4_AD33
B86
B87
B88
B89
B90
IOV
B91 NC_S4_RSVDB92 NC_S4_RSVDA92 NC_S4_RSVDB93
B92
B93
IOV
A1
S4_TRST A2 A3 A4
S4_TMS
S4_TDI A5 A6
A
A7
C
S4_PIRQA
S4_PIRQC A8 A9
NC_S4_RSVDA9 A10 A11
A14 A15
NC_S4_RSVDA11
NET_PHYSICAL_TYPE=15MIL
S4_3V3AUX
S4_PCIRST A16 A17
S4_GNT A18 A19 A20
ISO_PME_BUS4
S4_AD30 A21 A22 A23
S4_AD28
S4_AD26 A24 A25 A26
S4_AD24
S4_IDSEL A27 A28 A29
S4_AD22
S4_AD20 A30 A31 A32
S4_AD18
S4_AD16 A33 A34
S4_FRAME A35 A36
S4_TRDY A37 A38
S4_STOP A39 A40 A41
NC_S4_SDONE
NC_S4_SBO A42 A43 A44
S4_PAR
S4_AD15 A45 A46 A47
S4_AD13
S4_AD11 A48 A49
S4_AD9 A50 A51 A52
S4_CBE0 A53 A54
p
A55
S4_AD6
S4_AD4 A56 A57 A58
S4_AD2
S4_AD0 A59 A60
S4_REQ64 A61 A62
A63 A64 A65
S4_CBE7
S4_CBE5 A66 A67 A68
S4_PAR64
S4_AD62 A69 A70 A71
S4_AD60
S4_AD58 A72 A73 A74
S4_AD56
S4_AD54 A75 A76 A77
S4_AD52
S4_AD50 A78 A79 A80
S4_AD48
S4_AD46 A81 A82 A83
S4_AD44
S4_AD42 A84 A85 A86
S4_AD40
S4_AD38 A87 A88 A89
S4_AD36
S4_AD34 A90 A91
S4_AD32 A92 A93 A94B94
NC_S4_RSVDA94
32
32
32
31
31
55
31
34,44
31
31
31
31
32
31,32
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
+3.3V_AUX
LB9
1 2
FERRITE
1206
ROOM=SLOT4
LM_X05--83009 sub for p/n consolidation SUB*_83009
CB156
1 2
22uF 6.3V
S4_AD22
S4_XCAP
32,55
32,55
32,55
31,32
Jaguar 2.0 Change: PNP cards not configured, change R 2K to 470 ohm - PN 30800
S4_PRESA
S4_PRESB
S4_M66EN
32,55
2.7K-5%
50V-20%
.01UF
SUB*_78020
NET_PHYSICAL_TYPE=PLANE
31,32
NET_PHYSICAL_TYPE=PLANE
RB1079
21
470
+3.3V
1 2
RB160
2.7K-5% RB105
2.7K-5%
21
SUB*_78020
50V-20%
CB251
.01UF
21
LM_X04--Sub for part consolidation
21
50V-20%
CB129
.01UF
CB222
1 2
.01uF 50V
CB228
21
.01uF 50V
31,32
S4_3.3V
SUB*_83009
LM_X05--83009 sub for p/n consolidation
31,32
NET_PHYSICAL_TYPE=PLANE
S4_3.3V
50V-20%
.01UF
50V-20%
CB176
21
SUB*_78020
LM_X04--Sub for part consolidation
S4_IDSEL
21
CB115
21
SUB*_78020
S4_5V
.01UF
32
22uF 6.3V
1 2
CB321
SUB*_83009
22uF 6.3V
21
SUB*_78020
SUB*_78020
1 2
50V-20%
.01UF
LM_X04--Sub for part consolidation
SUB*_78020
50V-20%
1 2
CB335
.01UF
LM_X04--Sub for part consolidation
50V-20%
.01UF
SUB*_78020
SUB*_78020
50V-20%
.01UF
50V-20%
1 2
CB271
SUB*_78020
CB275
21
LM_X04--Sub for part consolidation
1 2
1 2
.01UF
SUB*_78020
50V-20%
.01UF
50V-20%
.01UF
CB260
21
21
SUB*_78020
PCI 2.1 RECOMMENDED RESISTORS
SUB*_78020
50V-20%
.01UF
50V-20%
.01UF
SUB*_78020
SUB*_78020
50V-20%
.01UF
21
220
1 2
CB245
1 2
21
S4_TRST
S4_TCK
21
SUB*_78020
50V-20%
.01UF
31,32
50V-20%
CB171
.01UF
SUB*_78020
31,32
220
31,32
32
32
1 2
CB292
S4_12V
CB298
21
32
32
S4_TDI
S4_TMS
50V-20%
.01UF
CB317
21
SUB*_78020
50V-20%
.01UF
SUB*_78020
1 2
NET_PHYSICAL_TYPE=60MIL
50V-20%
.01UF
SUB*_78020
50V-20%
.01UF
21
50V-20%
.01UF
NET_PHYSICAL_TYPE=60MIL
S4_N12V
S4_3.3V
21
2.7K-5%
21
R98
2.7K-5%
21
SUB*_78020
LM_X04--Sub for part consolidation
C90
21
SUB*_78020
LM_X04--Sub for part consolidation
30,31,33
30,31,33
PCIX4_REQ64
PCIX4_ACK64
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
PCIX4_PERR
PCIX4_SERR
30,31,33
30,31,33
PCIX4_FRAME
PCIX4_IRDY
PCIX4_DEVSEL
PCIX4_TRDY
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
30,31,33
PCIX4_STOP
PCIX4_LOCK
PCIX4_AD32 PCIX4_AD33 PCIX4_AD34 PCIX4_AD35 PCIX4_AD36 PCIX4_AD37 PCIX4_AD38 PCIX4_AD39 PCIX4_AD40 PCIX4_AD41 PCIX4_AD42 PCIX4_AD43 PCIX4_AD44 PCIX4_AD45 PCIX4_AD46 PCIX4_AD47 PCIX4_AD48 PCIX4_AD49 PCIX4_AD50 PCIX4_AD51 PCIX4_AD52 PCIX4_AD53 PCIX4_AD54 PCIX4_AD55 PCIX4_AD56 PCIX4_AD57 PCIX4_AD58 PCIX4_AD59 PCIX4_AD60 PCIX4_AD61 PCIX4_AD62 PCIX4_AD63 PCIX4_CBE4 PCIX4_CBE5 PCIX4_CBE6 PCIX4_CBE7 PCIX4_PAR64
ROOM=PCI4
1 2
8.2K-5%
RNB68
8.2K-5%
RNB68
8.2K-5%
RNB67
8.2K-5%
RNB67
8.2K-5%
RNB63
8.2K-5%
RNB65
8.2K-5%
RNB75
8.2K-5%
RNB74
8.2K-5%
RNB73
8.2K-5%
RNB72
8.2K-5%
RNB71
8.2K-5%
RNB70
8.2K-5%
RNB69
8.2K-5%
RB311
1 2
8.2K-5%
21
36
18
18
36
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
RNB63
RNB65
RNB75
RNB74
RNB73
RNB72
RNB71
RNB70
RNB69
8.2K-5%
RNB68
5 4
8.2K-5%
72
RNB63
8.2K-5%
72
RNB65
8.2K-5%
72
RNB75
8.2K-5%
72
RNB74
8.2K-5%
72
RNB73
8.2K-5%
72
RNB72
8.2K-5%
72
RNB71
8.2K-5%
72
RNB70
8.2K-5%
72
RNB69
8.2K-5%
RNB68
7 2
8.2K-5%
RNB67
7 2
8.2K-5%
RNB67
5 4
8.2K-5%
RNB63
8.2K-5%
RNB65
8.2K-5%
RNB75
8.2K-5%
RNB74
8.2K-5%
RNB73
8.2K-5%
RNB72
8.2K-5%
RNB71
8.2K-5%
RNB70
8.2K-5%
RNB69
8.2K-5%
1
+3.3V
2
+3.3V
54
54
54
54
54
3
54
54
54
54
PCI 64-3.3V
SKT
SUB*_1956U
Green Conn
PCI4
4 4
PCIX BUS 4
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
12/5/2003
A02
SHEET
32 OF 63
A B
DC
Page 33
B D
CA
12-5-2003_10:51
ROOMS COMPLETE
1
ROOM=SLOT5
S5_SENSE_5V
33
NET_PHYSICAL_TYPE=PLANE
S5_EN_GATE
33
VCC +3.3V
SUB*_24044
1 2
.01-1%
R48
SUB*_24044
.01-1%
R71
21
S5_SENSE_3V
33
NET_PHYSICAL_TYPE=PLANE
8
7
5
QB4
SI4410DY SI4410DY
4
3
261
SI4410DY
5162738
Q4
4
S5_EN_GATE
33
SI4410DY
5162738
Q11
4
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
33,55
PCIX4_AD61 PCIX4_AD60 PCIX4_AD59 PCIX4_AD58 PCIX4_AD57 PCIX4_AD56 PCIX4_AD54 PCIX4_AD55 PCIX4_AD53 PCIX4_AD52
S5_QS_EN
SUB*_8174U
VCC
5
4
8
LM_X04--Sub for part consolidation
50V-20%
.01UF
37261
SUB*_78020
21
+3.3V
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
PCIX4_AD51 PCIX4_AD50 PCIX4_AD49 PCIX4_AD48 PCIX4_AD46 PCIX4_AD47 PCIX4_AD45 PCIX4_AD44 PCIX4_AD43 PCIX4_AD42
VCC
VCC
U93
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
S5_AD61 S5_AD60 S5_AD59 S5_AD58 S5_AD57 S5_AD56 S5_AD54 S5_AD55 S5_AD53 S5_AD52
S5_AD51 S5_AD50 S5_AD49 S5_AD48 S5_AD46 S5_AD47 S5_AD45 S5_AD44 S5_AD43 S5_AD42
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
+3.3V
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
33,55
30,31
30,31
30,31
30,31
30-32
30-32
30-32
30-32
30-32
30-32
PCIX4_AD27 PCIX4_AD26 PCIX4_AD25 PCIX4_AD24 PCIX4_CBE3 PCIX4_AD23 PCIX4_AD22 PCIX4_AD21 PCIX4_AD20 PCIX4_AD19
S5_QS_EN
PCIX4_AD18 PCIX4_AD17 PCIX4_AD16 PCIX4_CBE2 PCIX4_FRAME PCIX4_IRDY PCIX4_TRDY PCIX4_DEVSEL PCIX4_STOP PCIX4_LOCK
VCC
SUB*_8174U
VCC
U45
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U57
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
S5_AD27 S5_AD26 S5_AD25 S5_AD24 S5_CBE3 S5_AD23 S5_AD22 S5_AD21 S5_AD20 S5_AD19
S5_AD18 S5_AD17 S5_AD16 S5_CBE2 S5_FRAME S5_IRDY S5_TRDY S5_DEVSEL S5_STOP S5_LOCK
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
1
2
LM_X04--Sub for part consolidation
50V-20%
.01UF
SUB*_78020
21
+3.3V
RB184
1 2
33,55
33
S5_PWR_FAULT S5_EN_GATE
S5_SENSE_3V
33
0.1uF 16V C52
1 2
S5_5V
12.1K1% is sub p/n SUB*_63206
34
100-5%
21
1
M12VIN
2
FLT
3
3V5VG
4
VCC
5
12VIN
6
3VISEN
7
3VS
8
OCSET
UB3
HIP1011CB
SUB*_7372P
M12VO M12VG
GND
5VISEN
5VS
PWRON
16
S5_N12V
15
S5_N12VG
14
S5_12VG 13 12
S5_12V 11
S5_SENSE_5V 10 9
S5_PWR_EN
1 2
S5_3.3V
0.1uF 16V 1 2
33,34
33
33
33,34
33
55
34
VCC
VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
SUB*_78020
LM_X04--Sub for part consolidation
50V-20%
.01UF
SUB*_78020
1 2
VCC
1 2
+3.3V
+3.3V
33,55
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
33,55
40
40
40
40
30,31
30,31
30,31
30,31
33,55
30
30
S5_QS_EN
PCIX4_AD41 PCIX4_AD40 PCIX4_AD39 PCIX4_AD38 PCIX4_AD37 PCIX4_AD36 PCIX4_AD35 PCIX4_AD33 PCIX4_AD34 PCIX4_AD32
S5_QS_EN
PIRQ_15 PIRQ_16 PIRQ_17 PIRQ_18
PCIX4_GNT1 PCIX4_REQ1 PCIX4_AD30 PCIX4_AD31 PCIX4_AD29 PCIX4_AD28
S5_QS_EN
SUB*_8174U
SUB*_8174U
SUB*_8174U
VCC
VCC
1 12
ON GND
5C6800 QSOP24
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U34
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S5_AD41 S5_AD40 S5_AD39 S5_AD38 S5_AD37 S5_AD36 S5_AD35 S5_AD33 S5_AD34 S5_AD32
S5_PIRQA S5_PIRQB S5_PIRQC S5_PIRQD S5_GNT S5_REQ S5_AD30 S5_AD31 S5_AD29 S5_AD28
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
VCC VCC
+3.3V
+3.3V
33,55
30-32
30-32
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
33,55
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
33,55
S5_QS_EN
PCIX4_PERR PCIX4_SERR PCIX4_PAR PCIX4_AD15 PCIX4_CBE1 PCIX4_AD14 PCIX4_AD13 PCIX4_AD12 PCIX4_AD11 PCIX4_AD10
S5_QS_EN
PCIX4_AD9 PCIX4_CBE0 PCIX4_AD8 PCIX4_AD7 PCIX4_AD6 PCIX4_AD5 PCIX4_AD4 PCIX4_AD3 PCIX4_AD2 PCIX4_AD1
S5_QS_EN
SUB*_8174U
SUB*_8174U
VCC
VCC
SUB*_8174U
13
BIASV
1 12
ON GND
5C6800 QSOP24
U66
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U74
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S5_PERR S5_SERR S5_PAR S5_AD15 S5_CBE1 S5_AD14 S5_AD13 S5_AD12 S5_AD11 S5_AD10
S5_AD9 S5_CBE0 S5_AD8 S5_AD7 S5_AD6 S5_AD5 S5_AD4 S5_AD3 S5_AD2 S5_AD1
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
2
3
33,55
33,34
33,34
S5_PWR_FAULT
S5_EN_GATE
33
S5_12V
S5_N12V
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
+3.3V
30,31
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
33,55
PCIX4_AD0 PCIX4_ACK64 PCIX4_REQ64 PCIX4_CBE7 PCIX4_CBE6 PCIX4_CBE5 PCIX4_CBE4 PCIX4_PAR64 PCIX4_AD62 PCIX4_AD63
S5_QS_EN
SUB*_8174U
U85
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
5C6800 QSOP24
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
S5_AD0 S5_ACK64 S5_REQ64 S5_CBE7 S5_CBE6 S5_CBE5 S5_CBE4 S5_PAR64 S5_AD62 S5_AD63
3
34
34
34
34
34
34
34
34
34
34
50V-10%
33
33
S5_N12VG
S5_12VG
1 2
.033uF
50V-10%
21
.033uF
50V-10%
C44
1 2
.033uF
50V-10%
100pF
C18
21
PCI5
4 4
PCIX BUS 4
COMPUTER CORPORATION
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
33 OF 63
Page 34
B D
CA
12-5-2003_10:51
ROOMS COMPLETE
1
2
3
33,34
33,34
33,34
CK_100M_SWSLOT5
16
S5_N12V
S5_5V
S5_3.3V
34
33
33
34,55
34,55
33
33
33
33
33
33
33
33
33
33
33
33
33
34,55
33
33
33
33
33
33
33
34,55
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33,34
33,34
33,34
Side B
S5_3.3V
S5_5V
S5_12V
Side A
B1
S5_TCK
NC_S5_TDO
B2 B3 B4
p
B5
B6 S5_PIRQB S5_PIRQD S5_PRESA NC_S5_RSVDB10 S5_PRESB
NC_S5_RSVDB14
B7
B8
B9
B10 B11
B14
B D
IOV
B15 B16
IOV
B17
S5_REQ
S5_AD31 S5_AD29
B18 B19 B20 B21
IOV
B22 S5_AD27 S5_AD25
B23
B24
B25 S5_CBE3 S5_AD23
B26
B27
B28 S5_AD21 S5_AD19
B29
B30
B31 S5_AD17 S5_CBE2
B32
B33
B34 S5_IRDY
B35
B36 S5_DEVSEL S5_XCAP S5_LOCK S5_PERR
B37
B38
B39
B40
B41 S5_SERR
B42
B43 S5_CBE1 S5_AD14
B44
B45
B46 S5_AD12 S5_AD10 S5_M66EN
B47
B48
B49
B50
B51 S5_AD8 S5_AD7
B52
B53
B54 S5_AD5 S5_AD3
B55
B56
B57 S5_AD1
S5_ACK64
B58
B59
B60
IOV
B61
B62
NC_S5_RSVDB63
B63
B64 S5_CBE6 S5_CBE4
B65
B66
IOV
B67 S5_AD63 S5_AD61
S5_AD59 S5_AD57
B68
B69
B70
B71
B72
IOV
B73 S5_AD55 S5_AD53
B74
B75
IOV
B76 S5_AD51 S5_AD49
S5_AD47 S5_AD45
B77
B78
B79
B80
B81
IOV
B82 S5_AD43 S5_AD41
B83
B84
IOV
B85 S5_AD39 S5_AD37
S5_AD35 S5_AD33
B86
B87
B88
B89
B90
IOV
B91 NC_S5_RSVDB92 NC_S5_RSVDA92 NC_S5_RSVDB93
B92
B93
IOV
A1
S5_TRST A2 A3 A4
S5_TMS
S5_TDI A5 A6
A
A7
C
S5_PIRQA
S5_PIRQC A8 A9
NC_S5_RSVDA9 A10 A11
A14 A15
NC_S5_RSVDA11
NET_PHYSICAL_TYPE=15MIL
S5_3V3AUX
S5_PCIRST A16 A17
S5_GNT A18 A19 A20
ISO_PME_BUS4
S5_AD30 A21 A22 A23
S5_AD28
S5_AD26 A24 A25 A26
S5_AD24
S5_IDSEL A27 A28 A29
S5_AD22
S5_AD20 A30 A31 A32
S5_AD18
S5_AD16 A33 A34
S5_FRAME A35 A36
S5_TRDY A37 A38
S5_STOP A39 A40 A41
NC_S5_SDONE
NC_S5_SBO A42 A43 A44
S5_PAR
S5_AD15 A45 A46 A47
S5_AD13
S5_AD11 A48 A49
S5_AD9 A50 A51 A52
S5_CBE0 A53 A54
p
A55
S5_AD6
S5_AD4 A56 A57 A58
S5_AD2
S5_AD0 A59 A60
S5_REQ64 A61 A62
A63 A64 A65
S5_CBE7
S5_CBE5 A66 A67 A68
S5_PAR64
S5_AD62 A69 A70 A71
S5_AD60
S5_AD58 A72 A73 A74
S5_AD56
S5_AD54 A75 A76 A77
S5_AD52
S5_AD50 A78 A79 A80
S5_AD48
S5_AD46 A81 A82 A83
S5_AD44
S5_AD42 A84 A85 A86
S5_AD40
S5_AD38 A87 A88 A89
S5_AD36
S5_AD34 A90 A91
S5_AD32 A92 A93 A94B94
NC_S5_RSVDA94
ROOM=SLOT5
34
34
34
33
33
+3.3V_AUX
LB8
1 2
55
33
32,44
33
33
33
33,34
34
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
FERRITE
1206
LM_X05--83009 sub for p/n consolidation SUB*_83009
CB160
1 2
22uF 6.3V
34,55
34,55
34,55
S5_PRESA
S5_PRESB
S5_M66EN
34,55
S5_XCAP
33,34
NET_PHYSICAL_TYPE=PLANE
S5_3.3V
33,34
22uF 6.3V
SUB*_83009
S5_5V
LM_X04--Sub for part consolidation
SUB*_78020
1 2
CB226
50V-20%
.01UF
SUB*_78020
LM_X05--83009 sub for p/n consolidation
1 2
50V-20%
CB181
NET_PHYSICAL_TYPE=PLANE
SUB*_83009
22uF 6.3V
1 2
CB290
33,34
S5_3.3V
NET_PHYSICAL_TYPE=PLANE
LM_X04--Sub for part consolidation LM_X04--Sub for part consolidation
SUB*_78020
50V-20%
.01UF
21
50V-20%
SUB*_78020
.01UF
CB242
21
50V-20%
.01UF
SUB*_78020
1 2
RB1080
33,34
S5_AD24
21
S5_IDSEL
34
470
Jaguar 2.0 Change: PNP cards not configured, change R 2K to 470 ohm - PN 30800
+3.3V
1 2
2.7K-5%
50V-20%
.01UF
SUB*_78020
RB158
21
2.7K-5% RB104
21
SUB*_78020
50V-20%
CB247
.01UF
21
LM_X04--Sub for part consolidation
50V-20%
CB128
2.7K-5%
21
.01UF
21
SUB*_78020
CB114
CB221
1 2
.01uF 50V
CB227
21
.01uF 50V
SUB*_78020
50V-20%
1 2
CB259
.01UF
LM_X04--Sub for part consolidation
50V-20%
.01UF
.01UF
SUB*_78020
SUB*_78020
50V-20%
CB279
.01UF
21
SUB*_78020
1 2
50V-20%
CB195
CB269
21
.01UF
SUB*_78020
CB297
PCI 2.1 RECOMMENDED RESISTORS
21
1 2
50V-20%
.01UF
50V-20%
.01UF
SUB*_78020
S5_TRST
S5_TCK
220
50V-20%
CB170
.01UF
SUB*_78020
SUB*_78020
50V-20%
1 2
CB356
21
21
220
33,34
SUB*_78020
21
1 2
.01UF
33,34
SUB*_78020
50V-20%
.01UF
33,34
S5_TDI
34
S5_TMS
34
50V-20%
.01UF
50V-20%
.01UF
CB175
21
1 2
50V-20%
.01UF
SUB*_78020
21
SUB*_78020
NET_PHYSICAL_TYPE=60MIL
S5_12V
50V-20%
CB270
21
.01UF
SUB*_78020
21
NET_PHYSICAL_TYPE=60MIL
S5_N12V
34
34
S5_3.3V
21
R99
2.7K-5%
50V-20%
.01UF
50V-20%
.01UF
21
2.7K-5%
21
SUB*_78020
LM_X04--Sub for part consolidation
C91
21
SUB*_78020
LM_X04--Sub for part consolidation
1
2
3
PCI 64-3.3V
SKT
SUB*_1956U
Green Conn
PCI5
4 4
PCIX BUS 4
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
12/5/2003
A02
SHEET
34 OF 63
A B
DC
Page 35
B D
CA
12-5-2003_10:51
ROOMS COMPLETE
1
ROOM=SLOT6
35
NET_PHYSICAL_TYPE=PLANE
S6_EN_GATE
35
S6_SENSE_5V
VCC
SUB*_24044
1 2
.01-1%
R49
+3.3V
SUB*_24044
.01-1%
R72
21
35
S6_SENSE_3V
NET_PHYSICAL_TYPE=PLANE
8
7
5
QB3
SI4410DY SI4410DY
4
3
261
SI4410DY
5162738
Q5
4
S6_EN_GATE
35
SI4410DY
5162738
Q12
4
QB9
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
35,55
PCIX5_AD61 PCIX5_AD60 PCIX5_AD59 PCIX5_AD58 PCIX5_AD57 PCIX5_AD56 PCIX5_AD54 PCIX5_AD55 PCIX5_AD53 PCIX5_AD52
S6_QS_EN
SUB*_8174U
VCC
8
726
5
4
3
1
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
+3.3V
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
PCIX5_AD51 PCIX5_AD50 PCIX5_AD49 PCIX5_AD48 PCIX5_AD46 PCIX5_AD47 PCIX5_AD45 PCIX5_AD44 PCIX5_AD43 PCIX5_AD42
VCC
VCC
U94
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
S6_AD61 S6_AD60 S6_AD59 S6_AD58 S6_AD57 S6_AD56 S6_AD54 S6_AD55 S6_AD53 S6_AD52
S6_AD51 S6_AD50 S6_AD49 S6_AD48 S6_AD46 S6_AD47 S6_AD45 S6_AD44 S6_AD43 S6_AD42
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
+3.3V
30,37
30,37
30,37
30,37
30,37
30,37
30,37
30,37
30,37
30,37
35,55
30,37
30,37
30,37
30,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
PCIX5_AD27 PCIX5_AD26 PCIX5_AD25 PCIX5_AD24 PCIX5_CBE3 PCIX5_AD23 PCIX5_AD22 PCIX5_AD21 PCIX5_AD20 PCIX5_AD19
S6_QS_EN
PCIX5_AD18 PCIX5_AD17 PCIX5_AD16 PCIX5_CBE2 PCIX5_FRAME PCIX5_IRDY PCIX5_TRDY PCIX5_DEVSEL PCIX5_STOP PCIX5_LOCK
VCC
SUB*_8174U
VCC
U46
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U58
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
S6_AD27 S6_AD26 S6_AD25 S6_AD24 S6_CBE3 S6_AD23 S6_AD22 S6_AD21 S6_AD20 S6_AD19
S6_AD18 S6_AD17 S6_AD16 S6_CBE2 S6_FRAME S6_IRDY S6_TRDY S6_DEVSEL S6_STOP S6_LOCK
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
1
2
LM_X04--Sub for part consolidation
50V-20%
.01UF
SUB*_78020
S6_5V
36
S6_3.3V
36
35,55
S6_QS_EN
SUB*_8174U
VCC
VCC
1 2
35,36
35
35
35,36
35
55
0.1uF 16V 1 2
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
+3.3V
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
35,55
40
40
40
40
30,37
30,37
30,37
30,37
35,55
30
30
PCIX5_AD41 PCIX5_AD40 PCIX5_AD39 PCIX5_AD38 PCIX5_AD37 PCIX5_AD36 PCIX5_AD35 PCIX5_AD33 PCIX5_AD34 PCIX5_AD32
S6_QS_EN
SUB*_8174U
VCC
PIRQ_27 PIRQ_28 PIRQ_29 PIRQ_30
PCIX5_GNT0 PCIX5_REQ0 PCIX5_AD30 PCIX5_AD31 PCIX5_AD29 PCIX5_AD28
S6_QS_EN
SUB*_8174U
RB180
1 2
UB2
GND
5VS
16
S6_N12V
15
S6_N12VG
14
S6_12VG 13 12
S6_12V 11
S6_SENSE_5V 10 9
S6_PWR_EN
1
M12VIN
C38
21
35,55
35
S6_PWR_FAULT S6_EN_GATE
+3.3V
S6_SENSE_3V
35
SUB*_63206
0.1uF 16V 1 2
12.1K1% is sub p/n
C45
100-5%
2
FLT
3
3V5VG
4
VCC
5
12VIN
6
3VISEN
7
3VS
8
OCSET
HIP1011CB
SUB*_7372P
M12VO M12VG
5VISEN
PWRON
21
1 12
ON GND
5C6800 QSOP24
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U35
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S6_AD41 S6_AD40 S6_AD39 S6_AD38 S6_AD37 S6_AD36 S6_AD35 S6_AD33 S6_AD34 S6_AD32
S6_PIRQA S6_PIRQB S6_PIRQC S6_PIRQD S6_GNT S6_REQ S6_AD30 S6_AD31 S6_AD29 S6_AD28
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
+3.3V
35,55
30,36,37
30,36,37
30,37
30,37
30,37
30,37
30,37
30,37
30,37
30,37
35,55
30,37
30,37
30,37
30,37
30,37
30,37
30,37
30,37
30,37
30,37
35,55
S6_QS_EN
PCIX5_PERR PCIX5_SERR PCIX5_PAR PCIX5_AD15 PCIX5_CBE1 PCIX5_AD14 PCIX5_AD13 PCIX5_AD12 PCIX5_AD11 PCIX5_AD10
S6_QS_EN
PCIX5_AD9 PCIX5_CBE0 PCIX5_AD8 PCIX5_AD7 PCIX5_AD6 PCIX5_AD5 PCIX5_AD4 PCIX5_AD3 PCIX5_AD2 PCIX5_AD1
S6_QS_EN
SUB*_8174U
SUB*_8174U
VCC
VCC
SUB*_8174U
VCC
VCC
13
BIASV
1 12
ON GND
5C6800 QSOP24
U67
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U75
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S6_PERR S6_SERR S6_PAR S6_AD15 S6_CBE1 S6_AD14 S6_AD13 S6_AD12 S6_AD11 S6_AD10
S6_AD9 S6_CBE0 S6_AD8 S6_AD7 S6_AD6 S6_AD5 S6_AD4 S6_AD3 S6_AD2 S6_AD1
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
2
3
35,55
35,36
35,36
35
S6_PWR_FAULT
S6_EN_GATE
S6_12V
S6_N12V
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
+3.3V
30,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
30,36,37
35,55
PCIX5_AD0 PCIX5_ACK64 PCIX5_REQ64 PCIX5_CBE7 PCIX5_CBE6 PCIX5_CBE5 PCIX5_CBE4 PCIX5_PAR64 PCIX5_AD62 PCIX5_AD63
S6_QS_EN
SUB*_8174U
U86
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
5C6800 QSOP24
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
S6_AD0 S6_ACK64 S6_REQ64 S6_CBE7 S6_CBE6 S6_CBE5 S6_CBE4 S6_PAR64 S6_AD62 S6_AD63
36
36
36
36
36
36
36
36
36
36
3
50V-10%
35
35
S6_N12VG
S6_12VG
1 2
.033uF
50V-10%
21
.033uF
50V-10%
C21
1 2
.033uF
50V-10%
100pF
C35
21
PCI6 PCIX BUS 5
4 4
COMPUTER CORPORATION
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
35 OF 63
Page 36
35,36
S6_3.3V
ROOM=SLOT6
B D
CA
12-5-2003_10:51
ROOMS COMPLETE
1
2
3
16
35,36
35,36
35,36
S6_N12V
S6_5V
S6_3.3V
36
S6_TCK
NC_S6_TDO
S6_PIRQB
35
S6_PIRQD
35
36,55
S6_PRESA NC_S6_RSVDB10
36,55
S6_PRESB
NC_S6_RSVDB14
CK_100M_SWSLOT6
S6_REQ
35
S6_AD31
35
S6_AD29
35
S6_AD27
35
S6_AD25
35
S6_CBE3
35
S6_AD23
35
S6_AD21
35
S6_AD19
35
S6_AD17
35
S6_CBE2
35
S6_IRDY
35
S6_DEVSEL
35
35
35
35
35
35
35
35
35
35
35
35
35
35
S6_XCAP S6_LOCK S6_PERR
S6_SERR
S6_CBE1 S6_AD14
S6_AD12 S6_AD10 S6_M66EN
S6_AD8 S6_AD7
S6_AD5 S6_AD3
S6_AD1
S6_ACK64
36,55
36,55
NC_S6_RSVDB63
S6_CBE6
35
S6_CBE4
35
S6_AD63
35
S6_AD61
35
S6_AD59
35
S6_AD57
35
S6_AD55
35
S6_AD53
35
S6_AD51
35
S6_AD49
35
S6_AD47
35
S6_AD45
35
S6_AD43
35
S6_AD41
35
S6_AD39
35
S6_AD37
35
S6_AD35
35
S6_AD33
35
NC_S6_RSVDB92 NC_S6_RSVDA92 NC_S6_RSVDB93
Side B
35,36
35,36
S6_5V
S6_12V
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11
B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93
p
B D
IOV
IOV
IOV
IOV
IOV
IOV
IOV
IOV
IOV
IOV
IOV
35,36
S6_3.3V
LM_X04--Sub for part consolidation
ROOM=PCI5
NET_PHYSICAL_TYPE=PLANE
50V-20%
CB188
SUB*_78020
.01UF
21
1
CB258
Side A
22uF 6.3V
1 2
CB230
50V-20%
.01UF
1 2
CB355
50V-20%
.01UF
1 2
CB244
SUB*_78020
50V-20%
.01UF
21
50V-20%
CB169
.01UF
21
+3.3V
A C
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36
S6_TRST
S6_TMS S6_TDI
S6_PIRQA S6_PIRQC
NC_S6_RSVDA9
NC_S6_RSVDA11
NET_PHYSICAL_TYPE=15MIL
S6_3V3AUX S6_PCIRST
S6_GNT
ISO_PME_BUS5 S6_AD30
S6_AD28 S6_AD26
S6_AD24 S6_IDSEL
S6_AD22 S6_AD20
S6_AD18 S6_AD16
S6_FRAME
S6_TRDY
36
36
36
35
35
55
35
38,44
35
35
35
35
36
35,36
35
35
35
35
35
+3.3V_AUX
LB7
1 2
FERRITE
1206
LM_X05--83009 sub for p/n consolidation SUB*_83009
CB154
1 2
22uF 6.3V
35,36
S6_3.3V
NET_PHYSICAL_TYPE=PLANE
35,36
NET_PHYSICAL_TYPE=PLANE
SUB*_78020
SUB*_83009
S6_5V
LM_X04--Sub for part consolidation
50V-20%
.01UF
LM_X05--83009 sub for p/n consolidation
SUB*_83009
22uF 6.3V
1 2
50V-20%
SUB*_78020
21
SUB*_78020
.01UF
SUB*_78020
LM_X04--Sub for part consolidation
SUB*_78020
21
50V-20%
.01UF
SUB*_78020
21
50V-20%
.01UF
SUB*_78020
50V-20%
.01UF
21
CB285
CB256
21
SUB*_78020
50V-20%
.01UF
SUB*_78020
50V-20%
.01UF
1 2
SUB*_78020
21
SUB*_78020
50V-20%
.01UF
35,36
50V-20%
.01UF
35,36
SUB*_78020
50V-20%
1 2
CB278
.01UF
1 2
CB287
SUB*_78020
NET_PHYSICAL_TYPE=60MIL
S6_12V
SUB*_78020
50V-20%
21
.01UF
21
NET_PHYSICAL_TYPE=60MIL
S6_N12V
50V-20%
.01UF
50V-20%
.01UF
21
SUB*_78020
LM_X04--Sub for part consolidation
C92
21
SUB*_78020
LM_X04--Sub for part consolidation
30,35,37
30,35,37
30,35,37
30,35,37
PCIX5_FRAME
PCIX5_TRDY
30,35,37
PCIX5_PERR
PCIX5_SERR
30,35,37
30,35,37
PCIX5_DEVSEL
30,35,37
PCIX5_LOCK
30,35,37
PCIX5_STOP
PCIX5_ACK64
30,35,37
PCIX5_REQ64
8.2K-5%
PCIX5_IRDY
RNB19
5 4
8.2K-5%
RNB19
6 3
8.2K-5%
RNB20
8.2K-5%
12
6 3
27
8.2K-5%
8.2K-5%
8 1
8.2K-5%
8 1
8.2K-5%
RNB20
8.2K-5%
12
RNB19
27
RNB19
RNB20
2
RNB20
45
A37
8.2K-5%
A38
S6_STOP
35
A39 A40 A41
NC_S6_SDONE
NC_S6_SBO A42 A43 A44 A45 A46 A47
S6_PAR
S6_AD15
S6_AD13
S6_AD11
35
35
35
35
35,36
S6_AD22
R1081
470
21
S6_IDSEL
36
+3.3V A48 A49 A50 A51 A52 A53 A54
p
A55 A56 A57 A58 A59 A60 A61 A62
A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91
S6_AD9
S6_CBE0
S6_AD6 S6_AD4
S6_AD2 S6_AD0
S6_REQ64
S6_CBE7 S6_CBE5
S6_PAR64 S6_AD62
S6_AD60 S6_AD58
S6_AD56 S6_AD54
S6_AD52 S6_AD50
S6_AD48 S6_AD46
S6_AD44 S6_AD42
S6_AD40 S6_AD38
S6_AD36 S6_AD34
S6_AD32
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
36,55
36,55
36,55
S6_PRESA
S6_PRESB
S6_M66EN
36,55
S6_XCAP
Jaguar 2.0 Change: PNP cards not configured, change R 2K to 470 ohm - PN 30800
2.7K-5%
50V-20%
.01UF
SUB*_78020
+3.3V
1 2
RB157
21
2.7K-5% RB103
21
SUB*_78020
50V-20%
CB246
.01UF
21
LM_X04--Sub for part consolidation
50V-20%
CB127
2.7K-5% R121
21
.01UF
21
SUB*_78020
CB215
1 2
.01uF 50V
CB207
21
.01uF 50V
CB113
PCI 2.1 RECOMMENDED RESISTORS
S6_TRST
S6_TCK
220
21
21
220
35,36
36
36
36
36
S6_TDI
S6_TMS
S6_3.3V
21
2.7K-5%
21
2.7K-5%
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
30,35,37
PCIX5_AD32 PCIX5_AD36 PCIX5_AD39
PCIX5_AD33
PCIX5_AD38 PCIX5_AD35 PCIX5_AD42
PCIX5_AD34
PCIX5_AD43
PCIX5_AD41
PCIX5_AD40
PCIX5_AD37
PCIX5_AD47
PCIX5_AD46
PCIX5_AD45
PCIX5_AD44
PCIX5_AD51
PCIX5_AD50
PCIX5_AD49
PCIX5_AD48
PCIX5_AD55
PCIX5_AD54
PCIX5_AD53
PCIX5_AD52
PCIX5_AD59
PCIX5_AD58
PCIX5_AD57
PCIX5_AD56
PCIX5_AD63
PCIX5_AD62
PCIX5_AD61
PCIX5_AD60
PCIX5_CBE4
PCIX5_CBE5
PCIX5_CBE6
PCIX5_CBE7
PCIX5_PAR64
RNB46
8.2K-5%
RNB43
8.2K-5%
RNB29
8.2K-5%
RNB26
8.2K-5%
RNB25
8.2K-5%
RNB24
8.2K-5%
RNB23
8.2K-5%
RNB22
8.2K-5%
RNB21
8.2K-5%
1 2
8.2K-5%
RNB46
72
8.2K-5%
RNB43
72
8.2K-5%
RNB29
72
8.2K-5%
RNB26
72
8.2K-5%
RNB25
72
8.2K-5%
RNB24
72
8.2K-5%
RNB23
72
8.2K-5%
RNB22
72
8.2K-5%
RNB21
72
8.2K-5%
RNB46
8.2K-5%
RNB43
8.2K-5%
RNB29
8.2K-5%
RNB26
8.2K-5%
RNB25
8.2K-5%
RNB24
8.2K-5%
RNB23
8.2K-5%
RNB22
8.2K-5%
RNB21
8.2K-5%
RNB46
54
8.2K-5%
RNB43
54
8.2K-5%
RNB29
54
8.2K-5%
RNB26
54
8.2K-5%
RNB25
54
8.2K-5%
RNB24
54
8.2K-5%
RNB23
54
8.2K-5%
RNB22
54
8.2K-5%
RNB21
54
8.2K-5%
3
A92 A93 A94B94
NC_S6_RSVDA94
PCI 64-3.3V
SKT
SUB*_1956U
Green Conn
PCI6
4 4
PCIX BUS 5
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
12/5/2003
A02
SHEET
36 OF 63
A B
DC
Page 37
B D
CA
12-5-2003_10:51
ROOMS COMPLETE
1
ROOM=SLOT7
S7_SENSE_5V
37
NET_PHYSICAL_TYPE=PLANE
S7_EN_GATE
37
VCC +3.3V
SUB*_24044
1 2
.01-1%
R50
SUB*_24044
.01-1%
R73
21
37
S7_SENSE_3V
NET_PHYSICAL_TYPE=PLANE
8
7
5
QB2
SI4410DY SI4410DY
4
3
261
SI4410DY
5162738
Q6
4
S7_EN_GATE
37
SI4410DY
5162738
Q13
4
QB8
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
37,55
PCIX5_AD61 PCIX5_AD60 PCIX5_AD59 PCIX5_AD58 PCIX5_AD57 PCIX5_AD56 PCIX5_AD54 PCIX5_AD55 PCIX5_AD53 PCIX5_AD52
S7_QS_EN
SUB*_8174U
VCC
8
7
615
4
3
2
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
+3.3V
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
PCIX5_AD51 PCIX5_AD50 PCIX5_AD49 PCIX5_AD48 PCIX5_AD46 PCIX5_AD47 PCIX5_AD45 PCIX5_AD44 PCIX5_AD43 PCIX5_AD42
VCC
VCC
U95
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
S7_AD61 S7_AD60 S7_AD59 S7_AD58 S7_AD57 S7_AD56 S7_AD54 S7_AD55 S7_AD53 S7_AD52
S7_AD51 S7_AD50 S7_AD49 S7_AD48 S7_AD46 S7_AD47 S7_AD45 S7_AD44 S7_AD43 S7_AD42
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
+3.3V
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
+3.3V
30,35
30,35
30,35
30,35
30,35
30,35
30,35
30,35
30,35
30,35
37,55
30,35
30,35
30,35
30,35
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
PCIX5_AD27 PCIX5_AD26 PCIX5_AD25 PCIX5_AD24 PCIX5_CBE3 PCIX5_AD23 PCIX5_AD22 PCIX5_AD21 PCIX5_AD20 PCIX5_AD19
S7_QS_EN
PCIX5_AD18 PCIX5_AD17 PCIX5_AD16 PCIX5_CBE2 PCIX5_FRAME PCIX5_IRDY PCIX5_TRDY PCIX5_DEVSEL PCIX5_STOP PCIX5_LOCK
VCC
SUB*_8174U
VCC
U47
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U59
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
S7_AD27 S7_AD26 S7_AD25 S7_AD24 S7_CBE3 S7_AD23 S7_AD22 S7_AD21 S7_AD20 S7_AD19
S7_AD18 S7_AD17 S7_AD16 S7_CBE2 S7_FRAME S7_IRDY S7_TRDY S7_DEVSEL S7_STOP S7_LOCK
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
1
2
LM_X04--Sub for part consolidation
50V-20%
.01UF
SUB*_78020
S7_5V
38
S7_3.3V
38
37,55
S7_QS_EN
SUB*_8174U
VCC
VCC
1 2
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
37,55
PCIX5_AD41 PCIX5_AD40 PCIX5_AD39 PCIX5_AD38 PCIX5_AD37 PCIX5_AD36 PCIX5_AD35 PCIX5_AD33 PCIX5_AD34 PCIX5_AD32
S7_QS_EN
RB183
1 2
VCC
SUB*_8174U
LM_X04--Sub for part consolidation
50V-20%
UB1
GND
5VS
16
S7_N12V
15
S7_N12VG
14
S7_12VG 13 12
S7_12V 11
S7_SENSE_5V 10 9
S7_PWR_EN
37,38
37
37
37,38
37
55
0.1uF 16V 1 2
VCC
SUB*_78020
1
M12VIN
C28
21
37,55
37
S7_PWR_FAULT S7_EN_GATE
+3.3V
S7_SENSE_3V
37
SUB*_63206
0.1uF 16V 1 2
12.1K1% is sub p/n
C46
100-5%
2
FLT
3
3V5VG
4
VCC
5
12VIN
6
3VISEN
7
3VS
8
OCSET
HIP1011CB
SUB*_7372P
M12VO M12VG
5VISEN
PWRON
21
.01UF
+3.3V
1 2
40
40
40
40
30,35
30,35
30,35
30,35
37,55
30
30
PIRQ_23 PIRQ_24 PIRQ_25 PIRQ_26
PCIX5_GNT1 PCIX5_REQ1 PCIX5_AD30 PCIX5_AD31 PCIX5_AD29 PCIX5_AD28
S7_QS_EN
SUB*_8174U
VCC
1 12
ON GND
5C6800 QSOP24
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U36
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S7_AD41 S7_AD40 S7_AD39 S7_AD38 S7_AD37 S7_AD36 S7_AD35 S7_AD33 S7_AD34 S7_AD32
S7_PIRQA S7_PIRQB S7_PIRQC S7_PIRQD S7_GNT S7_REQ S7_AD30 S7_AD31 S7_AD29 S7_AD28
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
VCC
LM_X04--Sub for part consolidation
50V-20%
SUB*_78020
.01UF
1 2
+3.3V
+3.3V
37,55
30,35,36
30,35,36
30,35
30,35
30,35
30,35
30,35
30,35
30,35
30,35
37,55
30,35
30,35
30,35
30,35
30,35
30,35
30,35
30,35
30,35
30,35
37,55
S7_QS_EN
PCIX5_PERR PCIX5_SERR PCIX5_PAR PCIX5_AD15 PCIX5_CBE1 PCIX5_AD14 PCIX5_AD13 PCIX5_AD12 PCIX5_AD11 PCIX5_AD10
S7_QS_EN
PCIX5_AD9 PCIX5_CBE0 PCIX5_AD8 PCIX5_AD7 PCIX5_AD6 PCIX5_AD5 PCIX5_AD4 PCIX5_AD3 PCIX5_AD2 PCIX5_AD1
S7_QS_EN
SUB*_8174U
SUB*_8174U
VCC
VCC
SUB*_8174U
VCC VCC
13
BIASV
1 12
ON GND
5C6800 QSOP24
U68
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
5C6800 QSOP24
U76
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10 15
A9 B9
11
A10
13
BIASV
1 12
ON GND
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16
14
5C6800 QSOP24
S7_PERR S7_SERR S7_PAR S7_AD15 S7_CBE1 S7_AD14 S7_AD13 S7_AD12 S7_AD11 S7_AD10
S7_AD9 S7_CBE0 S7_AD8 S7_AD7 S7_AD6 S7_AD5 S7_AD4 S7_AD3 S7_AD2 S7_AD1
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
2
3
37,55
37,38
37,38
S7_PWR_FAULT
S7_EN_GATE
37
S7_12V
S7_N12V
LM_X04--Sub for part consolidation
50V-20%
.01UF
21
SUB*_78020
+3.3V
30,35
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
30,35,36
37,55
PCIX5_AD0 PCIX5_ACK64 PCIX5_REQ64 PCIX5_CBE7 PCIX5_CBE6 PCIX5_CBE5 PCIX5_CBE4 PCIX5_PAR64 PCIX5_AD62 PCIX5_AD63
S7_QS_EN
SUB*_8174U
U87
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
5C6800 QSOP24
B1 B2 B3 B4 B5 B6 B7 B8
B10
23 22 21 20 19 18 17 16 1510 14
121
S7_AD0 S7_ACK64 S7_REQ64 S7_CBE7 S7_CBE6 S7_CBE5 S7_CBE4 S7_PAR64 S7_AD62 S7_AD63
38
38
38
38
38
38
38
38
38
38
3
50V-10%
37
37
S7_N12VG
S7_12VG
1 2
.033uF
50V-10%
21
.033uF
50V-10%
C22
1 2
.033uF
50V-10%
100pF
C32
21
PCI7
4 4
PCIX BUS 5
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
37 OF 63
Page 38
37,38
S7_3.3V
ROOM=SLOT7
B D
CA
12-5-2003_10:51
ROOMS COMPLETE
1
2
3
37,38
37,38
37,38
CK_100M_SWSLOT7
16
S7_N12V
S7_5V
S7_3.3V
38
37
37
38,55
38,55
37
37
37
37
37
37
37
37
37
37
37
37
37
38,55
37
37
37
37
37
37
37
38,55
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37,38
37,38
Side B
S7_5V
S7_12V
Side A
B1
S7_TCK
NC_S7_TDO
B2 B3 B4
p
B5
B6 S7_PIRQB S7_PIRQD S7_PRESA NC_S7_RSVDB10 S7_PRESB
NC_S7_RSVDB14
B7
B8
B9
B10 B11
B14
B D
IOV
B15 B16
IOV
B17
S7_REQ
S7_AD31 S7_AD29
B18 B19 B20 B21
IOV
B22 S7_AD27 S7_AD25
B23
B24
B25 S7_CBE3 S7_AD23
B26
B27
B28 S7_AD21 S7_AD19
B29
B30
B31 S7_AD17 S7_CBE2
B32
B33
B34 S7_IRDY
B35
B36 S7_DEVSEL S7_XCAP S7_LOCK S7_PERR
B37
B38
B39
B40
B41 S7_SERR
B42
B43 S7_CBE1 S7_AD14
B44
B45
B46 S7_AD12 S7_AD10 S7_M66EN
B47
B48
B49
B50
B51 S7_AD8 S7_AD7
B52
B53
B54 S7_AD5 S7_AD3
B55
B56
B57 S7_AD1
S7_ACK64
B58
B59
B60
IOV
B61
B62
NC_S7_RSVDB63
B63
B64 S7_CBE6 S7_CBE4
B65
B66
IOV
B67 S7_AD63 S7_AD61
S7_AD59 S7_AD57
B68
B69
B70
B71
B72
IOV
B73 S7_AD55 S7_AD53
B74
B75
IOV
B76 S7_AD51 S7_AD49
S7_AD47 S7_AD45
B77
B78
B79
B80
B81
IOV
B82 S7_AD43 S7_AD41
B83
B84
IOV
B85 S7_AD39 S7_AD37
S7_AD35 S7_AD33
B86
B87
B88
B89
B90
IOV
B91 NC_S7_RSVDB92 NC_S7_RSVDA92 NC_S7_RSVDB93
B92
B93
IOV
A1
S7_TRST A2 A3 A4
S7_TMS
S7_TDI A5 A6
A
A7
C
S7_PIRQA
S7_PIRQC A8 A9
NC_S7_RSVDA9 A10 A11
A14 A15
NC_S7_RSVDA11
NET_PHYSICAL_TYPE=15MIL
S7_3V3AUX
S7_PCIRST A16 A17
S7_GNT A18 A19 A20
ISO_PME_BUS5
S7_AD30 A21 A22 A23
S7_AD28
S7_AD26 A24 A25 A26
S7_AD24
S7_IDSEL A27 A28 A29
S7_AD22
S7_AD20 A30 A31 A32
S7_AD18
S7_AD16 A33 A34
S7_FRAME A35 A36
S7_TRDY A37 A38
S7_STOP A39 A40 A41
NC_S7_SDONE
NC_S7_SBO A42 A43 A44
S7_PAR
S7_AD15 A45 A46 A47
S7_AD13
S7_AD11 A48 A49
S7_AD9 A50 A51 A52
S7_CBE0 A53 A54
p
A55
S7_AD6
S7_AD4 A56 A57 A58
S7_AD2
S7_AD0 A59 A60
S7_REQ64 A61 A62
A63 A64 A65
S7_CBE7
S7_CBE5 A66 A67 A68
S7_PAR64
S7_AD62 A69 A70 A71
S7_AD60
S7_AD58 A72 A73 A74
S7_AD56
S7_AD54 A75 A76 A77
S7_AD52
S7_AD50 A78 A79 A80
S7_AD48
S7_AD46 A81 A82 A83
S7_AD44
S7_AD42 A84 A85 A86
S7_AD40
S7_AD38 A87 A88 A89
S7_AD36
S7_AD34 A90 A91
S7_AD32 A92 A93 A94B94
NC_S7_RSVDA94
38
38
38
37
37
55
37
36,44
37
37
37
37,38
38
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
+3.3V_AUX
LB6
1 2
FERRITE
1206
LM_X05--83009 sub for p/n consolidation
SUB*_83009
CB155
1 2
22uF 6.3V
38,55
38,55
38,55
S7_PRESA
S7_PRESB
S7_M66EN
38,55
S7_XCAP
2.7K-5%
50V-20%
.01UF
SUB*_78020
NET_PHYSICAL_TYPE=PLANE
37,38
NET_PHYSICAL_TYPE=PLANE
37,38
S7_AD24
Jaguar 2.0 Change: PNP cards not configured, change R 2K to 470 ohm - PN30800
+3.3V
1 2
RB156
21
2.7K-5% RB102
21
SUB*_78020
50V-20%
CB249
.01UF
21
LM_X04--Sub for part consolidation
50V-20%
CB126
2.7K-5%
21
.01UF
21
SUB*_78020
CB211
1 2
.01uF 50V
CB216
21
.01uF 50V
37,38
S7_3.3V
NET_PHYSICAL_TYPE=PLANE
S7_3.3V
50V-20%
.01UF
21
SUB*_78020
CB112
37,38
22uF 6.3V
SUB*_83009
S7_5V
1 2
CB316
SUB*_83009
50V-20%
.01UF
SUB*_78020
LM_X05--83009 sub for p/n consolidation
22uF 6.3V
1 2
SUB*_78020
LM_X04--Sub for part consolidation
SUB*_78020
50V-20%
.01UF
CB163
21
SUB*_78020
RB1082
21
470
LM_X04--Sub for part consolidation
SUB*_78020
1 2
50V-20%
.01UF
50V-20%
.01UF
50V-20%
CB291
.01UF
50V-20%
.01UF
21
LM_X04--Sub for part consolidation
SUB*_78020
50V-20%
1 2
CB354
.01UF
1 2
CB192
21
SUB*_78020
1 2
50V-20%
.01UF
SUB*_78020
S7_IDSEL
1 2
CB201
50V-20%
.01UF
50V-20%
.01UF
CB183
21
SUB*_78020
38
PCI 2.1 RECOMMENDED RESISTORS
S7_TRST
S7_TCK
21
R63
220
SUB*_78020
50V-20%
.01UF
1 2
SUB*_78020
21
R62
220
37,38
21
37,38
37,38
38
38
50V-20%
CB165
.01UF
SUB*_78020
50V-20%
NET_PHYSICAL_TYPE=60MIL
S7_12V
38
38
S7_TDI
S7_TMS
.01UF
SUB*_78020
21
50V-20%
.01UF
50V-20%
.01UF
21
SUB*_78020
.01UF
50V-20%
CB268
1 2
CB277
NET_PHYSICAL_TYPE=60MIL
S7_N12V
S7_3.3V
21
R59
2.7K-5%
21
R60
2.7K-5%
C94
21
SUB*_78020
LM_X04--Sub for part consolidation
C93
21
SUB*_78020
LM_X04--Sub for part consolidation
1
2
3
PCI 64-3.3V
SKT
SUB*_1956U
Green Conn
PCI7
4 4
PCIX BUS 5
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
12/5/2003
A02
SHEET
38 OF 63
A B
DC
Page 39
+3.3V
0.1uF 16V 1 2
CB263
0.1uF 16V 1 2
CB210
0.1uF 16V 1 2
CB178
+3.3V
0.1uF 16V 1 2
CB254
0.1uF 16V 1 2
CB186
0.1uF 16V 1 2
CB262
0.1uF 16V
SUB*_78020
50V-20%
1 2
CB172
ROOM=CSB
LM_X04--Sub for part consolidation
SUB*_78020
.01UF
21
50V-20%
CB253
.01UF
1 2
50V-20%
CB252
.01UF
1 2
50V-20%
CB202
.01UF
SUB*_78020
CB220
21
B D
+3.3V
R81
1 2
CSB_SMI_OUT
39
CA
+3.3V
14
9
10
74VHC08
39
39
U23
8
CSB_STPCLK_3V
CSB_SLP_3V
SMI_CPU_3V
U40
3 4
U40
9 8
U40
21
H_STPCLK
H_SLP
5
5
5
+3.3V
1 2
2.2K-5% R207
2.2K-5% R200
21
NP*
2.2K-5% 2.2K-5% R198
21
1 2
1 2
2.2K-5% R217
2.2K-5% R216
21
PCI0_GNT_CSB0 PCI0_GNT_CSB1 PCI0_GNT_CSB2
12-5-2003_10:51
39,46
39,48
39,50
1
SUB*_78020
REV 1.2 -- FIXES ALL KNOWN ERRATA (EXCEPT FLOPPY BUG)
NP*
NP*
STRAPPING OPTIONS
1
REV 1.3 -- FIXES ALL KNOWN ERRATA
+3.3V
REV 2.0 -- IS 1.3 WITH ATA-100 & SMB2.0
PCI0_GNT_CSB0# 0=DISABLE INTERNAL ARBITER
1=ENABLE INTERNAL ARBITER
REV 2.1 -- IS FIX OF ALL ERRATA KNOWN
1 2
1K-5%
2.2K-5%
RB153
1 2
RB171
1 2
2.2K-5% RB151
CPU_REQ/CPU_GNT CAN BE USED AS PCIREQ/GNT#3
KLM_X04 -- ADDED PULLUP TO S1_SLP#
T4 V1 U2 T3 U1 T2 P4 T1 P3 R1 P2 P1 N3 N2 N1 M4 J2 J3 H1 H2 H3 G1 G2 G3 F2 G4 F3 E3 D1 C1 E4 D3
F18 E19 D20 E18 G18 C20 E17 D18 C18 B19 A20 A19 B18 B17 C17 D16
C13 B13 A13 D12 C12 B12 B11 C11 A11 A10 B10 C10 D10
A9 C9 D9
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
DD_P0 DD_P1 DD_P2 DD_P3 DD_P4 DD_P5 DD_P6 DD_P7 DD_P8 DD_P9 DD_P10 DD_P11 DD_P12 DD_P13 DD_P14 DD_P15
DD_S0 DD_S1 DD_S2 DD_S3 DD_S4 DD_S5 DD_S6 DD_S7 DD_S8 DD_S9 DD_S10 DD_S11 DD_S12 DD_S13 DD_S14 DD_S15
2
3
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
42
42
42
42
42
42
42
42
42
42
42
42
42
42
42
42
PCI0_AD0 PCI0_AD1 PCI0_AD2 PCI0_AD3 PCI0_AD4 PCI0_AD5 PCI0_AD6 PCI0_AD7 PCI0_AD8 PCI0_AD9 PCI0_AD10 PCI0_AD11 PCI0_AD12 PCI0_AD13 PCI0_AD14 PCI0_AD15 PCI0_AD16 PCI0_AD17 PCI0_AD18 PCI0_AD19 PCI0_AD20 PCI0_AD21 PCI0_AD22 PCI0_AD23 PCI0_AD24 PCI0_AD25 PCI0_AD26 PCI0_AD27 PCI0_AD28 PCI0_AD29 PCI0_AD30 PCI0_AD31
RIDE_PDD0 RIDE_PDD1 RIDE_PDD2 RIDE_PDD3 RIDE_PDD4 RIDE_PDD5 RIDE_PDD6 RIDE_PDD7 RIDE_PDD8 RIDE_PDD9 RIDE_PDD10 RIDE_PDD11 RIDE_PDD12 RIDE_PDD13 RIDE_PDD14 RIDE_PDD15
NC_IDE_SDD0 NC_IDE_SDD1 NC_IDE_SDD2 NC_IDE_SDD3 NC_IDE_SDD4 NC_IDE_SDD5 NC_IDE_SDD6 NC_IDE_SDD7 NC_IDE_SDD8 NC_IDE_SDD9 NC_IDE_SDD10 NC_IDE_SDD11 NC_IDE_SDD12 NC_IDE_SDD13 NC_IDE_SDD14 NC_IDE_SDD15
LM_X05--7J188 is rev 2.1 p/n THIS ABOVE SYMBOL IS REV 1.5 PINOUT
4 4
1 2
2.2K-5% RB159
2.2K-5% R172
21
A20M_3V
NMI_3V
INTR_3V
IGNNE_3V
CSB_SLP_S1
U61
32 BIT PCI BUS
P_IDE
S_IDE
SERVERWORKS CSB5 REV1.5
HETERO 1 OF 2
SUB*_7J188
39,41
39,41
39,41
39,41
39
P_CBE0 P_CBE1 P_CBE2 P_CBE3
P_REQ0 P_REQ1 P_REQ2
P_GNT0/XARB_STRAP P_GNT1/XROM_STRAP
P_GNT2/IMB_STRAP
P_TRDY P_STOP
P_IRDY
P_FRAME
P_DEVSEL
P_PAR P_PERR P_SERR
PCIRST
CPUGNT CPUREQ
FLUSHREQ
PCILOCKL
PCICLK
P_IDECS00 P_IDECS01 P_IDE_IOR P_IDE_IOW
P_IDEDRQ
P_IORDY_IN
P_IDEDAK
S_IDECS00 S_IDECS01 S_IDE_IOR S_IDE_IOW
S_IDEDRQ
S_IORDY_IN
S_IDEDAK
IDE_DA0 IDE_DA1 IDE_DA2
R3
PCI0_CBE0
M2
PCI0_CBE1
J1
PCI0_CBE2
F1
PCI0_CBE3
W5 Y5 V6
V4
PCI0_GNT_CSB0
U5
PCI0_GNT_CSB1
Y3
PCI0_GNT_CSB2
L3
PCI0_TRDY
K3
PCI0_STOP
L4
PCI0_IRDY
M1
PCI0_FRAME
K1
PCI0_DEVSEL
J4
PCI0_PAR
L2
PCI0_PERR
L1
PCI0_SERR
Y6
U3 M3 V2
CSB_FLUSHREQ
C2
PCI0_LOCK
V9
H18 F19 E20 G17 A17 A18 D14
B8 C8 B14 A14 C14 A8 B15
G20 G19 F20
CSB_IMB_UP_BRKOUT_CLK
39
+3.3V
1 2 3
46-48,50
46-48,50
46-48,50
46-48,50
39,46
39,48
39,50
8 7 6 54
NC_CRQ1
NC_CRQ8
PCI0_REQ_CSB0 PCI0_REQ_CSB1 PCI0_REQ_CSB2
+3.3V
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
46-48,50
39,46,47,50
39,46,47,50
PCI_RST_32
CSB5_CPUGNT CSB5_CPUREQ
CK_33M_CSB5
RIDE_PDCS1 RIDE_PDCS3 RIDE_PDIOR RIDE_PDIOW IDE_PDDREQ IDE_PIORDY RIDE_PDDACK
44,46,48,51,59
46
4
42
42
42
42
42
42
42
39,44
SIO_SCI_OUT
39,44
Jaguar H3007 - X00: Removed No-Pop on R220
and changed to 2.2K from 1K.
VCC
NC_S_IDECS00 NC_S_IDECS01 NC_S_IDE_IOR NC_S_IDE_IOW
PD_S_IDEDRQ PU_S_IORDY_IN
NC_S_IDEDAK
RIDE_PDA0 RIDE_PDA1 RIDE_PDA2
SP_RN3333_4
SP_RN3333_5
1 2 3 4
22 Ohm
1 2
8 7 6 5
1K-5%
1 2
8.2K-5%
LOOP_SNGL_CSB_IMB_UP_CLK
1 2
NP*
RB136
RB139
21
LOOP_DBL_CSB_IMB_UP_CLK
CSB_IMB_UP_D0
11
CSB_IMB_UP_D1
11
CSB_IMB_UP_D2
11
CSB_IMB_UP_D3
11
CSB_IMB_UP_BRKOUT_CLK
39
CSB_IMB_UP_CON
11
CSB_IMB_UP_PAR
11
Y5= IDE_REQ1, W5=IDE_REQ0 FOR 2.0 IF ENABLED
1
2
3
4 5
42
6
7
8
CSB_MEMACK
USB_OVRCUR
SIO_SCI_OUT
44,51
GPE_ESM_IRQ15
+2.5V
+3.3V
1 2
IDE_PDA0 IDE_PDA1 IDE_PDA2
NP*
22-5%
1 2
RB138
46
48
50
1 2
NP*
NP*
RB169
+3.3V
1 2
1 2
USB_PWREN
42
42
42
RB137
21
CSB_IMB_UP_CLK
1 2
RB140
54
+3.3V_AUX
39
21
21
NP*
220
RB154
21
42
1 2
LM_X05--83009 sub for p/n consolidation
NP*
39
15K-5%
3 6
NP*
21
KB_GATE_A20
44
21
RB130
1 8
22-5% RB144
1 2
22-5%
VREF_CSB_IMB
72
15K-5%
CSB_SMI_OUT
39
SUB=SUB*_30424
L33
47uH 135MA
39
11
NC_RN301_4 NC_RN301_52 7
22-5%
NC_RN301_1 NC_RN301_81 8
22-5%
4 5
22-5%
3 6
22-5%
2 7
22-5%
3 6
22-5%
4 5
R_CSB_IMB_UP_D0 R_CSB_IMB_UP_D1 R_CSB_IMB_UP_D2 R_CSB_IMB_UP_D3
R_CSB_IMB_UP_CLK R_CSB_IMB_UP_CON R_CSB_IMB_UP_PAR
22-5%
39,41
4
42
42
42
42
15K-5%
1 8
1K-5%
12
15K-5%
+3.3V
+3.3V
21
RB150
21
39,41
39,41
41,43
41,43
39,41
4,44
39,44
39
40
40
40
9
CSB_STPCLK_3V
39
39
39
39
39
44
CK_14M_CSB
4
RB152
1 2
MEMOFF_CSB_SER
RB148
220
1 2
NP*
11,13-15,17,30,60
39
39
40,55
44
40
40
USB_PWREN
PIRQ_LTCH SIO_SERIRQ
SER_PIRQ0_15 SER_PIRQ16_31
P_IDEIRQ PU_IRQ15
PLLRST
AVDD_CSB_PLL
21
22uF 6.3V
1 2
SUB*_83009
0.1uF 16V
2 1
AGND
+3.3V
A20M_3V
CK_48M_USB
USBP0­USBP0+ USBP1­USBP1+ USBP2­USBP2+ USBP3­USBP3+
CSB_USB_EN
CSB_XALAT_0 CSB_XALAT_1 CSB_XALAT_2
CSB_FERR_3V IGNNE_3V
NMI_3V
X_RD X_WR INTR_3V
CSB_MEMACK CSB_SLP_3V CSB_SLP_BUTTON CSB_SLP_S1 CSB_SLP_S3 CSB_SLP_S5
CSB_INIT
+3.3V
KLM_X03 -- POPPED PULLUP ON ESM IRQ
U61
J17
O_DATA0
K19
O_DATA1
K17
O_DATA2
K18
O_DATA3
J18
O_CLOCK
H19
O_CONTROL
H20
O_PARITY
J20
IMB_VREF
A15
W12
USBCLK
Y15
USBP0N
W14
USBP0P
W15
USBP1N
V14
USBP1P
Y14
USBP2N
V13
USBP2P
W13
USBP3N
Y13
USBP3P
W17
USB_IN_EN
U7
XALAT0
Y7
XALAT1
Y11
XALAT2
V7
Y9
IGNNE
V16
SMI
Y10
NMI
U11
STPCLK/PMBUS
V11
XRC
Y12
XWC
P20
C19
SIO_WAKEUP
W6
MEMACK
B1
D2
SLPBTTNX
R19
SLP_S1
B16
SLP_S3
R18
SLP_S5
V18
OVRCUR
C15
V8
EXTEVENT
W8
OSC
Y17
KBD_A20
Y18
MEM_OFF/APICCLK
W18
PWREN
C16
PIRQ_LATCH
A6
SERIRQ
C7
PIRQ0
B6
PIRQ1
B4
P_IDEIRQ
A3
S_IDEIRQ
B20
PLLRST
W10
V10
A1
VDDIO_A1
A5
VDDIO_A5
A12
VDDIO_A12
A16
VDDIO_A16
E2
VDDIO_E2
B9
VDDIO_B9
D19
VDDIO_D19
J19
VDDIO_J19
K2
VDDIO_K2
N19
VDDIO_N19
R2
VDDIO_R2
W7
VDDIO_W7
W11
VDDIO_W11
W16
VDDIO_W16
W19
VDDIO_W19
IMB BUS
POWER
I_DATA0 I_DATA1 I_DATA2 I_DATA3
I_CLOCK
I_CONTROL
I_PARITY
GEVENT0 GEVENT1 GEVENT2 GEVENT3 GEVENT4 GEVENT5 GEVENT6 GEVENT7 GEVENT8
GEVENT9 GEVENT10 GEVENT11 GEVENT12 GEVENT13 GEVENT14 GEVENT15 GEVENT16 GEVENT17 GEVENT18
GEVENT19/APICD0 GEVENT20/APICD1
GEVENT21
GEVENT22/ROMCS
GEVENT23
GEVENT_X1/PGNT5 GEVENT_X2/PREQ5
LFRAME
GPOC0 GPOC1 GPOC2
NC_A4 NC_B5 NC_C5 NC_C6 NC_D7
VDD25_D6 VDD25_D11 VDD25_D15
VDD25_F4 VDD25_F17
VDD25_K4 VDD25_L17
VDD25_R4
VDD25_U6 VDD25_U10 VDD25_U15 VDD25_R17
VDD5_E1 VDD5_V5
L18 M20 M19 M18
L19 K20 L20
V3 W1 W2 W3 W4 Y4 Y1 Y2 Y19 V17 U16 V15 T20 T19 T18 U18 Y16 V12 U12 V19 W20 U14 Y20 U19
Y8 U9
A7 B7 D5 C4 B3 B2 A2 C3
P17 P19 R20 P18 N20 M17 N18
U20 V20 T17
W9
A4 B5 C5 C6 D7
D6 D11 D15 F4 F17 K4 L17 R4 U6 U10 U15 R17
E1 V5
PCI0_GNT_CSB3 PCI0_REQ_CSB3
NC_CSB_A4 NC_CSB_B5 NC_CSB_C5 NC_CSB_C6
CSB_IMB_DN_D0 CSB_IMB_DN_D1 CSB_IMB_DN_D2 CSB_IMB_DN_D3
CSB_IMB_DN_CLK CSB_IMB_DN_CON CSB_IMB_DN_PAR
SP_RN7068_4 SP_RN7067_2 SP_RN7067_3
CSB_XAD0 CSB_XAD1 CSB_XAD2 CSB_XAD3 CSB_XAD4 CSB_XAD5 CSB_XAD6 CSB_XAD7
LAD0 LAD1 LAD2 LAD3 LDRQ0 LDRQ1 LFRAME
NC_CSB_GPOC2
CSB_SPKR
0.1uF 16V 1 2
VCC
2.7K-5%
1 2
47
47
40,41,43
40,41,43
40,41,43
40,41,43
40,43
40,43
40,43
40,43
39,44,51
39,44,51
39,44,51
39,44,51
39,44
39
39,44,51
57
SD_X05 -- added p/d for new test pin
50V-20%
.01UF
CB197
SUB*_78020
6
7
8
3
2
1
RB1000
1 2
1K-5%
1 2
CB219
11
11
11
11
11
11
11
8
7
1
6
2
3
5
4
8
1
5
6
7
4
3
2
+3.3V
RB172
21
rspn
Req/Gnt swapped per bad documentation!!!
CSB_SCL CSB_SDA
+2.5V
SUB*_78020
50V-20%
LM_X04--Sub for part consolidation
.01UF
1 2
50V-20%
CB191
SUB*_78020
.01UF
1 2
CB194
5
8
4
1
SUB*_78020
50V-20%
.01UF
PCI0_GNT_CSB1# 0=ENABLE X-BUS LOGIC
1=DISABLE X-BUS LOGIC
PCI0_GNT_CSB2# 0=DISABLE IMB LOGIC
1=ENABLE IMB LOGIC
+3.3V
8 7 6 54
CSB_USB_EN CSB_STPCLK_3V CSB_SLP_3V SP_PU_TO_3V_1
SP_RN7070_8
SP_RN7070_7
1
2 3
1K
+3.3V
+3.3V
1 2
CSB_INIT
39,44
1K-5%
8
7
6
5
6
7
5
18
RB142
21
CSB_SLP_BUTTON
39
1K-5%
1
4
3
2
2
3
4
8.2K-5%
GEVENT11# PULLED LOW ENABLES INTERNAL PLL
RB170
SP_RN7070_2 SP_RN7070_1 SP_RN7069_4 SP_RN7067_4
GPE_ESM2SCI GPE_CMIC_FATAL GPE_CMIC_ALERT GPE_REMC_ALERT GPE_CIOB1_ALERT GPE_CIOB2_ALERT GPE_IERR1 GPE_IERR2 STRAP_CS PCI0_PERR PCI0_SERR GPE_GEVENT11
GPE_ESM2SMI
GPE_MCERR
GPE_SOFT_NMI_SMI_SCI1
GPE_NMI_BUTTON XCPLD_TCK XCPLD_TDO XCPLD_TDI XCPLD_TMS
GPE_SOFT_NMI_SMI_SCI2
SIO_SMI_OUT CSB_ROMCS NMI_3V
1 2
1K-5%
51
11,51,55
11,55
15
17
30
9
9
41
39,46,47,50
39,46,47,50
51
9
44
57
41,51
41,51
41
41,51
44
44
41,43
39,41
KLM_X03 -- CHANGED SYMBOL TO REV 1.5
VCC
0.1uF 16V 1 2
16
VCC
IA0 IA1 IA2 IA3
IB0 IB1 IB2 IB3
S0 S1
EA EB
1 2
6 5 4 3
10 11 12 13
14 2
1 15
6.3V-10%
4.7uF
CB209
ENV_SEG0_SCL
ENV_SEG5_I960_SCL
ENV_SEG3_SCL ENV_SEG7_SCL
ENV_SEG0_SDA
ENV_SEG5_I960_SDA
ENV_SEG3_SDA ENV_SEG7_SDA
GPO_I2C_MUX_SEL0 GPO_I2C_MUX_SEL1
RB271
21
220
CB232
12
21
1 2
6,13,53,57
24-26,53
13,53
14,53
6,13,53,57
24-26,53
13,53
14,53
44
44
100-1%100-1%
LM_X04--83008 sub for p/n consolidation SUB*_83008
1uF
1 2
10V-10%
2 1
0.1uF 16V
VREF_CSB_IMB
21
220pF
50V-10%
1 2
50V-20%
CB238
SUB*_78020
.01UF
1 2
7
9
CB240
YA
YB
5C3253 QSOP16
SUB*_78020
50V-20%
.01UF
39
39
39
2
3
39
ROOM=CSB
PINOUT REV != SILICON REV
56FEM IS CSB5 A1.3
REV 1.0 -- NEC UPD69725S1-011 REV 1.1 -- NEC UPD69725S1-012 REV 1.2 -- NEC UPD69725S1-013 REV 1.3 -- NEC UPD69725S1-014
REV 2.0 -- NEC UPD85625S1-011 REV 2.1 -- NEC UPD?????????
A B
LPC
39,44,51
39,44
LFRAME
SP_LPC_HDR
1
1
3
3
5 6
5 6
TSM 2X4 SMT HDR
2
2
4
4
87
87
NP*
Stuff with Samtec TSM-104-xx-xx-DV
LAD0 LAD1 LAD2 LAD3
39,44,51
39,44,51
39,44,51
39,44,51
39,44,51
39,44
39
39,44,51
39,44,51
39,44,51
39,44,51
LFRAME LDRQ0 LDRQ1
LAD0 LAD1 LAD2 LAD3
RN53
3 6
8.2K-5%
RN52
6 3
8.2K-5%
RN52
8.2K-5%
8.2K-5%
1 8
8.2K-5%
4 5
8.2K-5%
27
8.2K-5%
RN53
RN53
RN53
RN52
SERVERWORKS CSB5 REV 1.5
HETERO 2 OF 2
72
LM_X05--7J188 is rev 2.1 p/n
MEMOFF_CSB
11
RB174
1 2
45
AGND
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
SUB*_7J188
75
21
MEMOFF_CSB_SER
SUB*_9655T LM_X04--9655T sub for p/n consolidation
39
TITLE
DWG NO.
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
39 OF 63
DC
Page 40
NC_JUSTFORTHEFUNOFIT
NC_JUSTFORTHEFUNOFIT
B D
CA
12-5-2003_10:51
1
39,55
PIRQ_LTCH
ROOMS COMPLETE
+3.3V
8
7
6
5
6
7
8
1
4
3
2
RN9
1
SP_PIRQ_31 PIRQ_30
35
PIRQ_29
35
PIRQ_28
35
+3.3V
4
3
2
1
1
2
3
4
35
37
37
37
PIRQ_27 PIRQ_26 PIRQ_25 PIRQ_24
+3.3V
5
1 2
8.2K-5% R24
2
3
4
PIRQ 31 PIRQ 30 PIRQ 29 PIRQ 28 PIRQ 27 PIRQ 26 PIRQ 25 PIRQ 24
+3.3V
16
1
11 12 13 14
3 4 5 6
10
VCC
SHFTLD
A B C D E F G H
SER
U8
QH QH
9 7
SER_PIRQ24_31
NC_165_7_3
1
2
8
5
6
7
8
7
6
5
39
RB116
1 2
8.2K-5%
CSB_XALAT_0
U60
VCCCLR
11
CLK
3 2
1D 1Q
4 5
2D 2Q
7 6
3D 3Q
8 9
4D 4Q
13 12
5D 5Q
14 15
6D 6Q
17 16
7D 7Q
18 19
8D 8Q
74VHC273
TSSOP
U39
VCCCLR
CSB_XALAT_1
39
11
CLK
3 2
1D 1Q
4 5
2D 2Q
7 6
3D 3Q
8 9
4D 4Q
13 12
5D 5Q
14 15
6D 6Q
17 16
7D 7Q
18 19
8D 8Q
74VHC273
TSSOP
U48
VCCCLR
CSB_XALAT_2
39
CSB_XAD0 CSB_XAD1 CSB_XAD2 CSB_XAD3 CSB_XAD4 CSB_XAD5 CSB_XAD6 CSB_XAD7
39,41,43
39,41,43
39,41,43
39,41,43
39,43
39,43
39,43
39,43
11
CLK
3 2
1D 1Q
4 5
2D 2Q
7 6
3D 3Q
8 9
4D 4Q
13 12
5D 5Q
14 15
6D 6Q
17 16
7D 7Q
18 19
8D 8Q
74VHC273
TSSOP
+3.3V
201
201
201
X_ADDR0 X_ADDR1 X_ADDR2 X_ADDR3 X_ADDR4 X_ADDR5 X_ADDR6 X_ADDR7
X_ADDR8 X_ADDR9 X_ADDR10 X_ADDR11 X_ADDR12 X_ADDR13 X_ADDR14 X_ADDR15
X_ADDR16 X_ADDR17 X_ADDR18
X_ADDR19 NC_X_ADDR20 NC_X_ADDR21 NC_X_ADDR22 NC_X_ADDR23
41,43
41,43
43
43
43
43
43
43
43
43
43
43
43
43
43
43
43
43
43
43
15
CLKINHBT
4
CK_33M_PIRQ3
+3.3V
8
7
6
5
6
7
8
5
+3.3V
2
CLK
8
GND
74HC165
SUB*_0J204
LM_X05--0J204 is p/n for LV165
U6
16
VCC
1
SHFTLD
11
A
12
B
13
C
14
D
3
E
4
F
5
G
6
H
10
SER
15
CLKINHBT
2
CLK
8
GND
16
VCC
1
SHFTLD
11
A
12
B
13
C
14
D
3
E
4
F
5
G
6
H
10
SER
15
CLKINHBT
2
CLK
74HC165
U4
9
QH
7
QH
SUB*_0J204
SR_SER_PIRQ16_31 NC_165_7_1
LM_X05--0J204 is p/n for LV165
QH QH
9 7
SER_IRQ8_15 NC_165_7_2
40
Allows for PIRQ Routing in Hotplug FPGA
55
SR_SER_PIRQ0_15
40
SR_SER_PIRQ16_31
40
55
S6_GREEN
S7_GREEN
NP*
NP*
R2
21
R4
1 2
R1
21
1 2
0-5% 0-5%
1 2
0-5%0-5%
2
S6_AMBER
NP*
SER_PIRQ0_15
SER_PIRQ16_31
21
NP*
S7_AMBER
55
39
39
55
CK_33M_PIRQ2
4
CK_33M_PIRQ1
4
37
31
31
31
31
33
33
33
33
18
18
18
18
20
20
20
PIRQ_23 PIRQ_22 PIRQ_21 PIRQ_20 PIRQ_19 PIRQ_18 PIRQ_17 PIRQ_16
PIRQ_15 PIRQ_14 PIRQ_13 PIRQ_12 PIRQ_11 PIRQ_10 PIRQ_9 PIRQ_8
1
8
1
RN6
1
2
3
4
3
2
4
PIRQ 23 PIRQ 22 PIRQ 21 PIRQ 20 PIRQ 19 PIRQ 18 PIRQ 17 PIRQ 16
+3.3V
8
7
6
5
6
7
5
8.2K-5%
+3.3V
R22
4
3
2
RN4
1
2
3
4
PIRQ 15 PIRQ 14 PIRQ 13 PIRQ 12 PIRQ 11 PIRQ 10 PIRQ 9 PIRQ 8
21
3
20
22
24
24
50
47
46
46
PIRQ_7 PIRQ_6 PIRQ_5 PIRQ_4 PIRQ_3 PIRQ_2 PIRQ_1 PIRQ_0
8
RN1
1
+3.3V
7
6
5
8
5
6
7
+3.3V
8
GND
74HC165
SUB*_0J204
LM_X05--0J204 is p/n for LV165
3
U2
16
1
11 12 13 14
3 4 5 6
10
VCC
SHFTLD
A B C D E F G H
SER
QH QH
9 7
SR_SER_PIRQ0_15 NC_165_7_4
40
2
3
4
1
2
4
3
PIRQ 7 PIRQ 6 PIRQ 5 PIRQ 4 PIRQ 3 PIRQ 2 PIRQ 1 PIRQ 0
15
CLKINHBT
CK_33M_PIRQ0
4
1K-5%
2
CLK
8
GND
SUB*_0J204
74HC165
LM_X05--0J204 is p/n for LV165
21
4 4
ROOM=CSB
ROOM=IRQ
COMPUTER CORPORATION
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
40 OF 63
Page 41
SPEED SELECTION FOR FOSTER CPUs
B D
CA
12-5-2003_10:51
1
MULTIPLIER
8
9
10
11
12
13
14
15
16
NMI
A20M INTRIGNE
1 1 1
1
1
1
0
0 0
1
1
0 0 0
0
1111
0
0
111
00
1 1
11
00
1
1 11
GHz
Safe
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
CHANGED ON C-STEP PROCESSORS
1
ROOM=CPLD
2
3
17
18
19
20
21
22
23
0 0
0
0 0
1 1
1 1
1
00
0 0
1 1
1
0 0 0
111 0
24
SPEED SELECTION FOR GALLATIN CPUs
MULTIPLIER
12
13
14
15
16
17
18
19
20
21
22
23
24
26
28
30
NMI
0 0 0 0
0
0
11
1 1
1
1 0
1
1
1
0 1
0
0 0
0 0
1
1
1
01
0
0
0
10
1
1
39,41,51
39,51
39,41
39,41,51
IGNE INTRA20M
0 1
1
0 1
0
1 1
0
1 1
1K-5%
XCPLD_TCK XCPLD_TDO XCPLD_TDI XCPLD_TMS
000
1
0000
100
010
11
0
0
11
0
0
0
11
0
+3.3V_AUX
1 2
1.7
1.8
1.9
2.0
2.1
2.2
U79
43
U79
13 12
U79
1 2
U79
11 10
H_IGNNE
H_A20M
H_INTR
5
5
+3.3V
5
5
+3.3V_AUX
2.3
2.4
LM_X04--83008 sub for p/n consolidation SUB*_83008
SP_RN53_6
8.2K-5%
36
0.1uF 16V
SP_RN53_3
1 2
10V-10%
CB225
1uF
GHz
1.2
1.3
1.4
1.5
1.6
1.7
J2 1 3 5
1.8
1.9
2.0
Jaguar 2.0 Change: Pop Debug Connector only for prototype builds!
SUB=POP9
2.1
2.2
2.3
2.4
2.6
2.8
3.0
8
J3 1 2 3 4 5 6
8
8
51
8
51
+3.3V_AUX +3.3V
CMIC_DLYRST NMI_3V
IGNNE_3V INTR_3V PCI_RST_IOP
CK_20M_CPLD
4
6,8
RBAT_DSCHRGD
56
RBAT_DRAIN
56
6,8
BMC_RESET XLNX_DATA
55
XLNX_INIT
55
XROM_CCLK
55
XLNX_CCLK
55
XROM_DONE
55
XLNX_DONE
55
XROM_PROGRAM
55
X_WR X_RD STRAP_CS
39
X_ADDR0 X_ADDR1 CSB_XAD0 CSB_XAD1 CSB_XAD2 CSB_XAD3 PSUPPLY_PWRGOOD
R1019
1 2
A20M_3V
H0_VID1
H0_VID2
H0_VID3
8
8
VRM0_VENID0 VRM0_91 VRM1_VENID0 CPLD_COM0_RES VRM1_91 CPLD_COM1_RES VRM0_VENID1
VRM1_VENID1
U69 was originally XC9572-15TQ, then substituted with 357wx, and as of Jag 2.0 is changed to a XC95144 Dell p/n 4F148
2 4 6
VRM0_I2C_A0
VRM0_I2C_A1
VRM1_I2C_A0
CPLD_COM0
VRM1_I2C_A1
CPLD_COM1
5 4
8.2K-5% RN5418RN54
8.2K-5%
21
RB1088
7 2
8.2K-5% RN54
+3.3V
8.2K-5%
21
R1089
RB406
H1_CPU_PRES
6
H0_CPU_PRES
6
1 2
RB405
21
0-5% GREEN
Jaguar 2.0 Change: Change for 9.1 VRM: added 8.2K pullups to VRM enable lines
8.2K-5% RB1025
1 2
R1024
1 2
R1023
1 2
R1021
1 2
R1022
1 2
11
39
39
6,8
39
39
24,59
51-53
39,43
39,43
40,43
40,43
39,40,43
39,40,43
39,40,43
39,40,43
43,51,55,56,59,61
R1020
1 2
+3.3V_AUX
21
VRM1_PRES
5
VCCINT1
57
VCCINT2
98
VCCINT3
16
IO1/FB1
13
IO2/FB1
18
IO3/FB1
20
IO4/FB1
14
IO5/FB1
15
IO6/FB1
25
IO7/FB1
17
IO8/FB1
22
IO9/GCK1
28
IO10/FB1
23
IO11/GCK2
33
IO12/FB1
36
IO13/FB1
27
IO14/GCK3
29
IO15/FB1
39
IO16/FB1
30
IO17/FB1
40
IO18/FB1
87
IO1/FB2
94
IO2/FB2
91
IO3/FB2
93
IO4/FB2
95
IO5/FB2
96
IO6/FB2
3
IO7/GTS1
97
IO8/FB2
99
IO9/GSR
1
IO10/FB2
4
IO11/GTS2
6
IO12/FB2
8
IO13/FB2
9
IO14/FB2
11
IO15/FB2
10
IO16/FB2
12
IO17/FB2
92
IO18/FB2
2
NC1
7
NC2
19
NC3
24
NC4
34
NC5
43
NC6
46
NC7
73
NC8
80
NC9
U69
XC9572-15TQ
XC95144XL-10TQ
SUB*_P0053
VCCIO1 VCCIO2 VCCIO3 VCCIO4
IO1/FB3 IO2/FB3 IO3/FB3 IO4/FB3 IO5/FB3 IO6/FB3 IO7/FB3 IO8/FB3
IO9/FB3 IO10/FB3 IO11/FB3 IO12/FB3 IO13/FB3 IO14/FB3 IO15/FB3 IO16/FB3 IO17/FB3 IO18/FB3
IO1/FB4
IO2/FB4
IO3/FB4
IO4/FB4
IO5/FB4
IO6/FB4
IO7/FB4
IO8/FB4
IO9/FB4 IO10/FB4 IO11/FB4 IO12/FB4 IO13/FB4 IO14/FB4 IO15/FB4 IO16/FB4 IO17/FB4 IO18/FB4
TCK TDI TDO TMS
26 38 51 88
41 32 49 50 35 53 54 37 42 60 52 61 63 55 56 65 58 59
66 64 71 72 67 76 77 68 70 81 74 82 85 78 89 86 90 79
48 45 83 47
RB1024
0.1uF 16V
RBAT_QCHRG RBAT_PRSNT
H0_VID0
I960_RBAT_EN
H0_VID4 CSB_ROMCS GPI_VRM2_PRES
I960_RAD12 I960_RAD9 I960_RAD10 I960_RAD11 I960_RCE1 I960_ROE I960_RWE 960_SEL_NVSRAM 960_SEL_UART ROM_I960_A20 ROM_I960_A19
SPG_TREE
960_IDSEL
ALL_25V_PWRGD
VRM_EN SYN_PWRDN
XCPLD_TCK XCPLD_TDI
XCPLD_TD_MID
XCPLD_TMS
1 2
NP*
21
VRM_VID4 VRM_VID3 VRM_VID2 VRM_VID1 VRM_VID0
PAL_960_IDSEL PAL_PCI1_AD8
R1116
10V-10%
1uF
H1_VID0 H1_VID1 H1_VID2 H1_VID3 H1_VID4
1 2
21
SUB*_83008 LM_X04--83008 sub for p/n consolidation
Jaguar 2.0 - X02: VCCIO is connected to 3.3V_AUX for Power Domain issues - page 41
Jaguar 2.0 change: bad design since trace governed by 74XX & VRM, added R1028 -> 10K
8
8
8
8
8
6,8
6,8
6,8
6,8
6,8
39,41,51
39,41
51
39,41,51
1 2
1K-5%
51,56
51,56
6,8
56
6,8
39,43
8,44,51
25,26
25,26
25,26
25,26
25
25,26
25,26
26
26
25
25
60
24
60
13,14,58
4
RB1028
21
10K-5%
DS2
SD_X04 -- CPLD now controls clock and VRM startup SD_X04 -- connected ~SYN_PWRDN to CPLD
31
SUB*_5E052
1 2
330-5%
RB304
330-5%
2
Orange LED
OLD LED P#5958C NEW LED P#5E052
LM_X04 -- changed R194 to 1K SD_X04 -- changed led power to 3.3v
CPU_VRM_EN
PCI1_AD24
21
PCI1_AD8
8,51,60
17,22,24
17,22,24
MIS-MATCHED
PROCESSORS
3
8,44,51
GPI_VRM1_PRES
7278P IS OLD BLANK 3.3V 357WX IS OLD PROGRAMMED PART
Jag 2.0 X02: R1019-1024 & RB1025 are popped to enable VRM 9.1
4F148 IS NEW BLANK 3.3V P0053 IS NEW PROGRAMMED PART
Blank p/n 4F148
95144XL
Program I/O E2.3
CE#
I/O E3.2
Reset#
Data
Data Drive
I/O E3.3
I/O E3.1
I/O E3.0
I/O E2.2
4 4
Hotplug FPGA
SysCPLD
Reset#
Program
CE#
Reset#
Data
Program
CE#CE#
Reset#
Jaguar Prog p/n P0053
SEEPROM
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
Data
A B
Data
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
DC
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
41 OF 63
Page 42
B D
42
CA
IDE_PDD7
USING NON-LATCHING CONNECTOR
12-5-2003_10:51
1
IDE_PRST
59
IDE_PDD7
42
IDE_PDD6
42
IDE_PDD5
42
IDE_PDD4
42
IDE_PDD3
42
IDE_PDD2
42
IDE_PDD1
42
IDE_PDD0
42
IDE_PDIOW
42
RIDE_PIORDY
42
RP_IDEIRQ
42
IDE_PDA1
39
IDE_PDA0
39
42
FLP_RDATA
44
FLP_TRK0
44
FLP_WDATA
44
FLP_DIR
44
FLP_MTR1
44
VCC
8.2K-5%
1 2
IOCONN
1 3 5
2 4 6 87
9
11
10 12 1413 1615 1817
19
20 2221 2423 2625 2827
29
30 3231
IDE_PDCS1
NC_IDE_LED_P3 FLP_HDSEL
3433 3635 3837
39
40 4241 4443
RIDE_PDDREQ
IDE_PDIOR
IDE_PDDACK
IDE_PDCS3
FLP_WP
FLP_WGATE
FLP_STEP
FLP_DENSEL
4645
49 51 53 55 57 59
4847 50 52 54 56 58 60
FLP_DSKCHG
FLP_DR1
FLP_INDEX
IDE_CABLE_SEL
IDE_PDD8
IDE_PDD9 IDE_PDD10 IDE_PDD11
IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15
IDE_PDA2
42
42
42
42
42
42
42
42
42
42
42
39
42
44
44
44
44
44
44
44
21
220
VCC
1 2
1K-5%
R76
39
39
44
P_IDEIRQ
IDE_PDDREQ
1 2
1 2
47-5%
33-5%
8.2K-5%
1
RP_IDEIRQ
21
RIDE_PDDREQ
42
42
2
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
RIDE_PDCS1
39
RIDE_PDCS3
39
RIDE_PDIOR
39
RIDE_PDIOW
39
RIDE_PDDACK
RIDE_PDD15
RIDE_PDD14
RIDE_PDD13
RIDE_PDD12
RIDE_PDD11
RIDE_PDD10
RIDE_PDD9
RIDE_PDD8
RIDE_PDD7
RIDE_PDD6
RIDE_PDD5
RIDE_PDD4
RIDE_PDD3
RIDE_PDD2
RIDE_PDD1
RIDE_PDD0
2 7
33-5%
8 1
33-5%
7 2
33-5%
33-5%
7 2
33-5%
33-5%
3 6
33-5%
5 4
33-5%
33-5%
7 2
33-5%
VERT PLUG D-SHAPE
81
33-5%
5 4
33-5%
36
33-5% RN43
1 8
63
33-5% RN44
72
33-5% RN43
54
36
33-5%
45
33-5% RN44
54
33-5%
18
18
33-5%
36
33-5%
IDE_PDCS1
IDE_PDCS3
IDE_PDIOR
IDE_PDIOW
IDE_PDD15
IDE_PDD14
IDE_PDD13
IDE_PDD12
IDE_PDD11
IDE_PDD10
IDE_PDD9
IDE_PDD8
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0
42
42
42
42
42
42
42
42
42
42
42
42
42
42
42
42
42
42
42
42
X04_LM--2J605 has vacuum plate and board locks for machine placement
SUB*_2J605
39
IDE_PIORDY
VCC
1 2
1K-5%
33-5%
2
21
RIDE_PIORDY
42
RB129
21
IDE_PDDACK
42
3
NET_PHYSICAL_TYPE=50MIL
VCC
FS5
33-5%
3
ROOM=USB_NIC
21
KLM_X03 -- CHANGED OC# NET BEHIND FERRITE
6V
Jaguar H3007 - X00: Added No-Pop Ckt. (3) 47K res. (P/N 31107) to set USB_OVRCUR input to CSB at +3.3V, previously +5V.
(3) 47K res. (P/N 31107) were used as these P/Ns already exist on the BOM in sufficient quantity.
21
PLACE R1131 - R1133 NEAR CSB5
L22
FERRITE
1812-1.5A
USB_ENET
9A
MH1
10A
MH2
11A
MH3
12A
MH4
USB
4 4
CHASSIS_GND
50
B1 B2 B3 B4
T1 T2 T3 T4
1A 2A 3A 4A
5A 6A 7A 8A
CRUSBP0­CRUSBP0+
CRUSBP1­CRUSBP1+
+
12
C78
NP*
150uF
C98
10V-20%
21
0.1uF 16V
10V-20%
+
100uF
C53
50V-20%
.01UF
1 2
21
SUB*_99477
1 2
50V-20%
.01UF
LB4
LB3
1 2
SUB*_99477
1 2
50V-20%
.01UF
21
RB496
1 2
47K-5%
NP*
ROOM=CSB
SUB*_99477
LB2
1 2
50V-20%
.01UF
USB_OVRCUR
39
ROOM=CSB
DELAY_RULE=:::1000
NP*
ROOM=CSB
RUSBP0-
RUSBP0+
RUSBP1-
RUSBP1+
3 6
33-5%
1 8
33-5%
54
33-5%
72
33-5%
LB1
1 2
RB498
1 2
SUB*_99477
72
21
RB497
1 2
NP*
47K-5% 47K-5%
ROOM=CSB
4 5
15K-5%
3 6
15K-5%
15K-5%
81
15K-5%
54
50V-10%
3 6
50V-10%
DELAY_RULE=:::1000 DELAY_RULE=:::1000 DELAY_RULE=:::1000
2 7
50V-10%
USBP0-
USBP0+
USBP1-
USBP1+
39
39
39
39
81
50V-10%
Depop 150uf in prototype!
A B
SUB*_33267
SUB*_33267
PLACE RESISTORS & CAPS AT CONNECTOR
SUB*_33267
SUB*_33267
99477 = 200mA Ferrite 120ohm@100MHz SM0603 33267 = 47pF 5% SM0603 COG
30661 = 0 OHM SM0603
Place caps and series resistors <1" from CSB
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
42 OF 63
Page 43
B D
CA
ROOMS COMPLETE
12-5-2003_10:51
1
BIOS JUMPER
1
JUMPER PINS 1-2 FOR PROM_ICE BIOS
JUMPER PINS 2-3 FOR ONBOARD FLASH BIOS
RESISTOR RB106 MUST BE REMOVED IN ORDER
TO USE JUMPER PROPERLY
2
39,41
CSB_ROMCS
39,41
44
+3.3V
14
9
10
74VHC32
GPO_FLWR_EN
8
U38
14
12 13
74VHC32
FL_BIOSCS
U38
11
NP*
LM_X05 -- CHANGED TO 8MBIT PART TO DRIVE MRP FOR PILOT
LM_X04 -- CHANGED TO 4MBIT PART FOR JULY BUILD
+3.3V
21
8.2K-5%
1 2 3
+3.3V
RB107
1 2
NP*
RB108
1 2
ROOM=FLASH
40,41,43
40,41,43
40,43
40,43
40,43
40,43
40,43
40,43
40,43
40,43
40,43
40,43
40,43
40,43
40,43
8.2K-5%
39,41,43
40,43
40,43
40,43
40,43
40,43
JUMP_FL_BIOSCS
X_ADDR0 X_ADDR1 X_ADDR2 X_ADDR3 X_ADDR4 X_ADDR5 X_ADDR6 X_ADDR7 X_ADDR8 X_ADDR9 X_ADDR10 X_ADDR11 X_ADDR12 X_ADDR13 X_ADDR14 X_ADDR15 X_ADDR16 X_ADDR17 X_ADDR18 X_ADDR19
U26
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
36
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
40
A17
13
A18
37
A19
22
CE
24
OE
9
WE
28F008BV
PKG_TYPE=TSOP40_BEST
SUB*_2G456
VCC30 VCC31
VPP
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
RP
WP
VSS39 VSS23
30 31 11
25 26 27 28 32 33 34 35
10
12
39 23
CSB_XAD0 CSB_XAD1 CSB_XAD2 CSB_XAD3 CSB_XAD4 CSB_XAD5 CSB_XAD6 CSB_XAD7
BOOTVPP
NET_PHYSICAL_TYPE=25MIL
39-41,43
39-41,43
39-41,43
39-41,43
39,40,43
39,40,43
39,40,43
39,40,43
LM_X04--Sub for part consolidation
50V-20%
.01UF
1 2
SUB*_78020
0.1uF 16V C571
21
1 2
21
VCC
R75
21
NP*
0.1uF 16V 1 2
LM_X05--83009 sub for p/n consolidation
22uF 6.3V
SUB*_83009
1 2
1K-5%
1 2
0.1uF 16V CB97
21
R74
0-5%0-5%
+3.3V
21
VCC
RB110
10-5%
21
PROM_ICE
1
1
3
3
40,43
40,43
40,43
40,43
40,43
40,43
40,43
39,41,43
40,43
39,40,43
39,40,43
39,40,43
39,40,43
39-41,43
X_ADDR18 X_ADDR17 X_ADDR14 X_ADDR13 X_ADDR8 X_ADDR9 X_ADDR11 X_RD X_ADDR10
CSB_XAD7 CSB_XAD6 CSB_XAD5 CSB_XAD4 CSB_XAD3
5
5
7
7
9
9
11
11
15
15
17
17
19 20
19 20
21
21
23
23
25
25
27
27
29
29
31
31
33 34
33 34
TSM 2X17
SMT HDR
NP*
Stuff with Samtec TSM-117-xx-xx-DV
10 12 1413 16 18
22 24 26 28 30 32
2
2
4
4
6
6
8
8
10 12 1413 16 18
22 24 26 28 30 32
X_ADDR19 X_ADDR16 X_ADDR15 X_ADDR12 X_ADDR7 X_ADDR6 X_ADDR5 X_ADDR4 X_ADDR3 X_ADDR2 X_ADDR1 X_ADDR0
CSB_XAD0 CSB_XAD1 CSB_XAD2
40,43
40,43
40,43
40,43
40,43
40,43
40,43
40,43
40,43
40,43
40,41,43
40,41,43
39-41,43
39-41,43
39-41,43
2
3
41,51,55,56,59,61
PSUPPLY_PWRGOOD
1 2
1K-5%
BASEPG
2N7002
Q14
G
220
VCC
21
D
1
S
3
2
1K-5%
1 2
1K-5%
BASEPWD
Q7
1
3
2
NP*
3
PWRGOOD IS OPEN COLLECTOR CAN'T SOURCE MUCH CURRENT
5V BLNK P#9779R
3.3V BLNK 4Mb P#58PDC JAGUAR PRGMD 4M/3V P#58CWU
3.3V BLNK 8Mb P#556DH JAGUAR PRGMD 3V/8Mb P#2G456
3.3V BLNK 8Mb P#1U323 (changed in H3007 - X00) NEW JAGUAR PRGMD 3V/8Mb P#2G456
4 4
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
12/5/2003
A02
SHEET
43 OF 63
DC
A B
Page 44
BRD REVISION
B D
CA
12-5-2003_10:51
ROOMS COMPLETE
1
REV1 REV0
X00 0 0
X01 NOT BUILT X02 0 1 X03 1 0 X04 1 1
+3.3V +3.3V
1 2
8.2K-5%
220
8.2K-5%
220
21
21
1 2
KLM_X03 -- CHANGED REV TO THE LEFT & BELOW KLM_X04 -- CHANGED REV TO THE LEFT & BELOW
GPI_BRD_REV0 GPI_BRD_REV1
44
44
+3.3V
1 2
CB151
L19
.01uF 50V
ROOM=SIO
1
SIO_VBAT
21
SIO_VDD
0.1uF 16V C146
C86
21
.01uF 50V
6.3V-10%
4.7uF
1 2
C54
C79
1 2
.01uF 50V
C60
21
.01uF 50V
C39
1 2
.01uF 50V
21
0.1uF 16V
21
.01uF 50V
0.1uF 16V
C63
21
0.1uF 16V
C96
21
16V 10%
C62
1
C61
21
2
+3.3V_AUX
57
2
3
+3.3V_AUX
21
10
39
8.2K-5%
SIO_SLPBTN
CMIC_INIT CSB_INIT
21
RB114
NP*
NP*
SD_X06 -- added ~VRM[1:0]_VRM91 to SIO
+3.3V
21
2.7K-5% 1 2
44
BUS1 HAS NO SLOTS TO ISOLATE
36,38
32,34
2.7K-5%
44
2.7K-5%
SIO_SERIRQ
SIO_GPIO00
GPO_FLWR_EN
39,44
44
43,44
+3.3V
1411U23
KB_RST
+3.3V
12 13
NB_H_INIT
74VHC08
14
4 5
U23
6
74VHC08
BUS0 HAS ONE SLOT TO ISOLATE BUT ALSO HAS I559
+3.3V_AUX
6
7
8
ISO_PME_BUS5
ISO_PME_BUS4
1
2
3
4 5
14
1 2
U41
3
74VHC32
14
4 5
U41
6
74VHC32
U40
5 6
39
39
SIO_SCI_OUT SIO_SMI_OUT
VCORE
RB408
1 2
8.2K-5%
H_INIT
+3.3V_AUX
4,39
39
21
CSB_SLP_S5 CSB_SLP_S3
+3.3V
10K-5%
5
4
1 2
22
50
CK_48M_SIO
10K-5%
21
21
NP*
GPE_PME_BUS5 GPE_PME_BUS4 GPE_PME_BUS3 GPE_PME_BUS1 GPE_PME_BUS0
R90
21
NP*
R93
1 2
+3.3V_AUX
8.2K-5%
1 2
NP*
R89
220
1 2
8.2K-5%
+3.3V_AUX
1 2
8.2K-5%
21
8.2K-5%
21
+3.3V_AUX
1 2
27
59
59
21
510K-5%
32KHz
220
39,46,48,51,59
10K-5%
SIO_CKIN48_STRAP GPO_AIC7899_DIS GPO_AIC7890_DIS
GPO_I559_DIS
8,41,51
8,41,51
51,57
8
22
44
14,51
13,51
4
4
44,51,61
44,57,61
61
61
44
44
39
39
25
25
39,44
39,44
59
24,44
57
39,51
43,44
8
44,57
44
21
20M-5%
51,61
39,51
39,51
39,51
39,51
39,51
39,44
NC_U19_GPO61
CK_48M_SIO_END GPI_VRM2_PRES GPI_VRM1_PRES
PWRBTN SP_GPE_SIO_47 SP_GPE_SIO_46 VRM0_VRM91 GPO_GB_IDSEL_DIS NC_SIO_PWRBUTOUT SIO_SLPBTN MC_PRES_B MC_PRES_A GPI_SPREAD_EN GPI_SYN_SEL100 GPI_SLIM_DETECT GPI_FVS_TESTMODE GPI_EN_PASSWD GPI_NVRAM_CLR GPI_BRD_REV1 GPI_BRD_REV0 GPE_SOFT_NMI_SMI_SCI2 GPE_SOFT_NMI_SMI_SCI1 GPO_IOP_RESETMODE GPO_IOP_BIST_DIS GPO_I2C_MUX_SEL1 GPO_I2C_MUX_SEL0 GPO_IOP_DIS GPO_IOP_REQ_EN GPO_PWR_BUTTON_DIS GPE_ESM_IRQ15 GPO_FLWR_EN
VRM1_VRM91 GPO_SPKR_DIS SIO_GPIO00
PARALLEL_PT_EN
LAD0 LAD1 LAD2 LAD3 CK_33M_SIO
4
39
LFRAME
SIO_SERIRQ
NC_SIO_P47 NC_SIO_P46
KB_GATE_A20
39
PCI_RST_32
NC_SIO_13
+3.3V_AUX
21
10K-5%
39
ONCTL
121
P12/PPDIS
113
112
111
110
114
118
117
LFRAME
120
LRESET
119
SERIRQ
47
NC_47
46
NC_46
55
GPO64/WDO/CKIN48
48
GPO63
34
GPO62
33
GPO61
32
GPO60
56
GPIO55/CLKIN
54
GPIO54/VDDFELL
45
GPIO53/LFCKOUT/MSEN0
38
GPIO52/SIOSCI
37
GPIO51/SIOSMI
36
GPIO50/PWBTIN
53
GPIOE47/SLPS5
52
GPIOE46/SLPS3
51
GPIOE45/LED2
50
GPIOE44/LED1
49
GPIOE43/PWBTOUT
35
GPIOE42/SLBTIN
21
GPIOE41
20
GPIOE40
31
GPIO37
30
GPIO36
29
GPIO35
28
GPIO34
27
GPIO33
26
GPIO32
25
GPIO31
24
GPIO30
23
GPIO27
22
GPIO26
19
GPIO25
18
GPIO24
17
GPIO23
16
GPIO22
15
GPIO21
14
GPIO20
8
GPIOE17
7
GPIOE16
6
GPIOE15
5
GPIOE14
4
GPIOE13
3
GPIOE12
2
GPIOE11
1
GPIOE10
13
GPIO07/HFCKOUT
10
GPIO06
9
GPIO05
124
GPIO00/CLKRUN
123
44
32KX2
42
32KX1_32KCLKIN
U20
SUPER I/O PC87414 REV 0.13
SUB*_8K759
P#236CY National 87414 W/ DELL KEYBOARD CODE
VDD69 VDD92
VDD116
DSKCHG
INDEX
DR0
DR1/P16
MTR1/P17
DIR
WP RDATA HDSEL
DENSEL DRATE0
SOUT1
RTS1/TRIS
DTR1_BOUT1/BADDR
RI1
SOUT2
DTR2_BOUT2
RI2
STB_WRITE
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 ACK
BUSY_WAIT
PE
AFD_DSTRB
ERR
SLIN_ASTRB
GPIO04/MDAT
GPIO03/MCLK GPIO02/KBDAT GPIO01/KBCLK
KBRST
VSS43 VSS11 VSS68 VSS93
VSS115
69 92 116 41 40 12
57 72 67 70 71 66 65 64 63 62 61 60 59 58 74 73
98 97 96 100 99 95 94 101
106 105 108 104 107 103 102 109
91 89 87 85 83 82 81 80 79 78 77 76 75 90 88 86 84
128 127 126 125 122
43 11 68 93 115
SER_SOUTA
SER_SINA
SER_CTSA SER_DSRA SER_DCDA
SER_RIA
RPRN_STB RPRN_PD0 RPRN_PD1 RPRN_PD2 RPRN_PD3 RPRN_PD4 RPRN_PD5 RPRN_PD6 RPRN_PD7 RPRN_ACK
RPRN_BUSY
RPRN_PE RPRN_SLCT RPRN_AFD
RPRN_ERR RPRN_INIT RPRN_SLIN
MSE_DATA
MSE_CLK
KB_DATA
KB_CLK
0.1uF 16V
21
HOST_SER_SOUTB
HOST_SER_RTSB HOST_SER_DTRB HOST_SER_SINB HOST_SER_CTSB HOST_SER_DSRB HOST_SER_DCDB
HOST_SER_RIB
0.1uF 16V
45
45
45
45
45
45
51,53
51,53
53
51,53
51,53
53
53
53
44,45
45
45
45
45
45
45
45
45
45
45
45
45
44,45
45
44,45
44,45
45
45
45
45
21
CB124
21
R53
NP*
10K-5%
KB_RST
NP*
R54
1 2
16V 10%
1
2
SER_RTSA
SER_DTRA
7
8
1
2
+3.3V
R80
1 2
6
3
4 5
45
45
1K
VCC
1K-1%
44
R78
21
FLP_DSKCHG
FLP_INDEX
NC_FLP_DR0
FLP_DR1
NC_FLP_MTR0
FLP_MTR1
FLP_DIR
FLP_STEP FLP_WDATA FLP_WGATE
FLP_TRK0
FLP_WP FLP_RDATA FLP_HDSEL
FLP_DENSEL
NC_FLP_DRATE0
42
42
42
42
42
42
42
42
42
42
42
42
42
BASE ADDRESS (~SER_DSTRA/BADDR)
No pullup: 2Eh-2Fh 10k pullup: 4Eh-4Fh
TRI-STATE DEVICE (~SER_RTSA/TRIS)
No pullup: pins active 10k pullup: pins tristated
COULD USE PIN #13 FOR 40MHZ OUTPUT SCSI
44,57,61
24,44
44,57
44,51,61
39,44
39,44
GPI_FVS_TESTMODE GPO_IOP_REQ_EN GPO_SPKR_DIS GPI_SLIM_DETECT
GPO_I2C_MUX_SEL1
GPO_I2C_MUX_SEL0
1 2 3
1 2
8.2K-5%
8.2K-5%
RB100
RB274
+3.3V
8 7 6 54
2
21
3
14
19,21
46
ISO_PME_BUS3
ISO_PME_BUS0
9
10
74VHC32
14
12 13
74VHC32
U41
U41
8
11
D3
BAR43
21
13
X2
50V-5%
14
21
50V-5%
NATIONAL PC87414-ICG/VLA NSC 00 A1 (REV A1)
NATIONAL PC87414-ICG/VLA NSC00A2 (REV A2)
P#8K759 National 87414 Rev A4 W/ DELL KEYBOARD CODE
NATIONAL PC87414-ICG/VLA FLO 0126 (REV A4)
SIO
4 4
53
INTRUSION_VAUX
NEED GND SHAPE UNDER XTAL
ALSO WANT GROUNDED TRACE GUARDING XTAL CIRCUIT
NOTE: HFCLKOUT DEFAULTS TO CLK!
+3.3V
44,45
44,45
44,45
44,45
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
RPRN_AFD RPRN_INIT RPRN_SLIN RPRN_STB
1
2 3 4
8 7 6 5
TITLE
SCHEM,PLN,PE4600,2P
DWG NO.
H3007
12/5/2003
Super I/O Controller
COMPUTER CORPORATION
AUSTIN,TEXAS
A02
SHEET
44 OF 63
A B
DC
Page 45
0.1uF 16V 1 2
C68
+5V_AUX
B D
CA
VCC
12-5-2003_10:51
ROOMS COMPLETE
1
2
SUB*_83008
10V-10%
1uF
21
LM_X04--83008 sub for p/n consolidation
SER_SOUTA
44
SER_DTRA
44
SER_RTSA
VCC
R55
1 2
12
R56
8.2K-5%
220
44
44
44
44
44
44
SER_DCDA
SER_SINA SER_DSRA SER_CTSA SER_RIA
SD_X05 -- changed FORCEON to p/ud from p/d, (typ2)
0.1uF 16V 1 2
C70
LM_X04--83008 sub for p/n consolidation
10V-10%
SUB*_83008
51,53
53
51,53
51,53
51,53
53
51,53
51,53
21
NP*
+5V_AUX
8.2K-5%
12
8.2K-5%
VCC
R1007
8.2K-5%
1 2
SD_X05 -- Added strapping to allow shutdown of tx during main powerdown
1 2
1uF
SER_SOUTB SER_DTRB SER_RTSB
SER_DCDB
NC_U10_18
SER_SINB SER_DSRB SER_CTSB SER_RIB
28 24
1 2
14 13 12
19 18 17 16 15 20
23 22
28 24
1 2
14 13 12
19 18 17 16 15 20
23 22
C1+ C1­C2+ C2-
R1OUT R2OUT R3OUT R4OUT R5OUT R2OUTB
FORCEON FORCEOFF
C1+ C1­C2+ C2-
R1OUT R2OUT R3OUT R4OUT R5OUT R2OUTB
FORCEON FORCEOFF
U10
MAX3243
U11
MAX3243
VCC
V+ V-
T1OUT T2OUT T3OUT
INVALID
GND
VCC
V+ V-
T1OUT T2OUT T3OUT
INVALID
GND
26 27 3
9 10 11
4 5 6 7 8
21
SOUTA
NC_INVALID_A
RIA
45
45
45
45
45
45
45
45
SUB*_83008
LM_X04--83008 sub for p/n consolidation
25
See spec sheet prior to changing cap values
+5V_AUX
26 27 3
9 10 11
4 5 6 7 8
21
25
SOUTB
NC_INVALID_B
RIB
45
45
45
45
45
45
45
45
SUB*_83008
LM_X04--83008 sub for p/n consolidation
10V-10%
10V-10%
1uF
1uF
1 2
1 2
SUB*_83008
10V-10%
1uF
21
10V-10%
1uF
21
SUB*_83008
C69
10V-10%
1uF
SUB*_83008
0.1uF 16V
21
1 2
ROOM=COMMPORT
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
RPRN_STB
RPRN_PD0 RPRN_PD1 RPRN_PD2 RPRN_PD3
RPRN_PD4 RPRN_PD5 RPRN_PD6 RPRN_PD7
RPRN_ACK
RPRN_BUSY
RPRN_PE
RPRN_SLCT
RPRN_AFD
RPRN_ERR
RPRN_INIT
RPRN_SLIN
50V-10%
470pF
21
C64
50V-10%
1 2
470pF
50V-10%
1 2
470pF
C65
C66
50V-10%
470pF
21
50V-10%
1 2
470pF
C67
C71
50V-10%
470pF
21
50V-10%
470pF
21
C72
C73
50V-10%
1 2
470pF
330pF 50V
1 2
C14
330pF 50V
C74
680pF 50V
CB37
21
1 2
CB53
680pF 50V
R20
1 2
33-5%
1
2 3 4
1
33
2 3 4
LM_X04--9627P sub for p/n consolidation
RB43
33
21
100-5%
RB47
1 2
8 7 6 5
8 7 6 5
SUB*_9627P
33-5%
RB46
21
33-5%
50V-10%
470pF
21
CB52
C29
30K-5%
NP*
21
SUB*_9627P
1 2
100-5%
1 2
8
1
RB44
30K-5%
21
7
2
NP*
5
6
4
3
1 2
RB45
33-5%
8
1
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
D2
13
1
PARALLEL
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
26 27 28 29 30 31 32 33 34
35 36 37 38 39 40 41 42 43
44 45 46 47
1
1A
2
2A
3
3A
4
4A
5
5A
6
6A
7
7A
8
8A
9
9A 10A 11A 12A 13A 14A 15A 16A 17A 18A 19A 20A 21A 22A 23A 24A
2
25A
1B 2B 3B 4B 5B
Right COM port when viewed from rear
6B 7B 8B 9B
1C 2C 3C 4C 5C 6C
Left COM port when viewed from rear
7C 8C 9C
MH1 MH2 MH3 MH4
PRN_STB
PRN_PD0 PRN_PD1 PRN_PD2 PRN_PD3 PRN_PD4 PRN_PD5 PRN_PD6 PRN_PD7
PRN_ACK
PRN_BUSY
PRN_PE
PRN_SLCT
PRN_AFD
PRN_ERR PRN_INIT PRN_SLIN
NET_PHYSICAL_TYPE=50MIL
PULPTVCC
7
6
5
2
3
4
8
1
5
6
7
4
3
2
8
1
7
6
5
2
3
4
1 2
L11
FERRITE
1206
L13
FERRITE
1206
L7
FERRITE
1206
L9
FERRITE
1206
NC_RN62_1
1 2
21
1 2
21
1 2
21
L6
FERRITE
1206
L12
FERRITE
1206
L14
FERRITE
1206
L8
FERRITE
1206
L10
FERRITE
1206
21
21
3
ROOM=SERDRV
VCC
50V-20%
.01UF
SUB*_78020
NET_PHYSICAL_TYPE=50MIL
L20
1 2
FERRITE
1812-1.5A
C76
50V-20%
.01UF
21
SUB*_78020
LM_X04--Sub for part consolidation
LM_X05--83009 sub for p/n consolidation
KBVCC
21
C40
22uF 6.3V
1 2
C41
SUB*_83009
FS1
25F/9M/9M
SUB*_08HEJ
R18
1 2
DDC_VCC
49
3
21
21
R39
R41
8.2K-5%
1 2
8.2K-5%
GPI_KYB_FVCC
NET_PHYSICAL_TYPE=50MIL
NET_PHYSICAL_TYPE=50MIL
21
KYBD_MOUSE
R38
1 2
R40
8.2K-5%
8.2K-5% L15
FERRITE
1206
21
L16
1 2
FERRITE
1206
KBCLK
KBDATA
NC_KEY2
NC_KEY6
BOTTOM 5 3 1 2 4 6
3
5
6
1
2
4
THESE ARE COLOR CODED PER PC99
OLD BLACK P#87584
NEW COLOR P#08HEJ
GND
TOP
11
12
9
10
STACKED 6 PIN
MINI-DIN RT
7
8
OLD BLACK P#69309 NEW COLOR P#34EFW
44
44
44
44
KB_CLK
KB_DATA
MSE_CLK
MSE_DATA
L17
FERRITE
1206
21
L18
1 2
FERRITE
1206
C26
21
330pF 50V
C25
C24
1 2
330pF 50V
21
330pF 50V
C23
1 2
330pF 50V
MSECLK
MSEDAT
NC_MSE8
NC_MSE12
1M-5%
R19
21
11
9 7 8
10 12
50V-20%
.01UF
C31
13
21
14 15 16
SUB*_78020
LM_X04--Sub for part consolidation
17
4 4
SUB*_34EFW
COMPUTER
ROOM=KEYMOUSE
CORPORATION
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
45 OF 63
Page 46
+3.3V
B D
CA
VCC
12-5-2003_10:51
1
2
VCC
FOR CSB5 A1.0 USE STRONGER PULLUP FOR FRAME# & IRDY# FOR CSB5 A1.1 CHANGE BACK TO 2.7K
81
PCI0_FRAME
39,46-48,50
2.7K-5% RN47
2 7
PCI0_IRDY
39,46-48,50
2.7K-5% RN47
63
PCI0_TRDY
39,46-48,50
2.7K-5% RN47
4 5
PCI0_DEVSEL
39,46-48,50
2.7K-5% RN51
81
PCI0_STOP
39,46-48,50
2.7K-5% RN51
2 7
PCI0_LOCK
39,46
2.7K-5% RN51
63
PCI0_PERR
39,46,47,50
2.7K-5% RN51
4 5
PCI0_SERR
39,46,47,50
2.7K-5%
12
2 1
PCI0_REQ64_SLT1
PCI0_ACK64_SLT1
46
46
4
46
40
CK_33M_SLOT1
PCI0_REQ_CSB0
39
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
39,46-48,50
39,46-48,50
39,46
39,46,47,50
39,46,47,50
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
Side B
PCI0_TCK_SLT1
NC_TDO_SLT1
PIRQ_1
NC_PA_SLT1 NC_PRSVD1_SLT1 NC_PB_SLT1
NC_PRSVD3_SLT1
PCI0_AD31 PCI0_AD29
PCI0_AD27 PCI0_AD25
PCI0_CBE3 PCI0_AD23
PCI0_AD21 PCI0_AD19
PCI0_AD17 PCI0_CBE2
PCI0_IRDY
PCI0_DEVSEL
PCI0_LOCK PCI0_PERR
PCI0_SERR
PCI0_CBE1 PCI0_AD14
PCI0_AD12 PCI0_AD10
61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98
99 100 101 102 103 104 105 106 107 108 109
Side A
1
1
PCI0_TRST_SLT1
46
2 3 4 5 6
A
B D
7
C
8 9 10 11 12 13 14 15 16 17
PCI0_TMS_SLT1
PCI0_TDI_SLT1
PIRQ_0
NC_PRSVD0_SLT1
NC_PRSVD2_SLT1
S2_3V3AUX
PCI_RST_32
PCI0_GNT_CSB0
46
46
40
NET_PHYSICAL_TYPE=15MIL
39,44,48,51,59
39
+3.3V_AUX
L24
1 2
FERRITE
1206
SD_X04 -- deep6'ed pci aux current limiter
LM_X05--83009 sub for p/n consolidation SUB*_83009
1 2
22uF 6.3V
18 19 20
ISO_PME_BUS0
PCI0_AD30
44
39,47,48,50
21
ID
22 23 24 25 26 27 28 29 30 31 32
IDSEL_SLT1
PCI0_AD28 PCI0_AD26 PCI0_AD24
PCI0_AD22 PCI0_AD20
PCI0_AD18 PCI0_AD16
100-5%
39,47,48,50
39,47,48,50
39,46-48,50
21
SUB*_9627P
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
PCI0_AD24
39,46-48,50
LM_X04--9627P sub for p/n consolidation
+3.3V_AUX
90160 IS A 2K 5% RESISTOR A 2K PULL-UP IN ADDITION TO AN 8.2K PULL-UP ON THE BACKPLANE WAS USED TO DECREASE THE RISE TIME ON THE IPMI BUS TO UNDER 1000 nS (1 uS) PER IPMI SPEC
2
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
PCI0_FRAME
PCI0_TRDY
PCI0_STOP
IPMB_PCI_SCL IPMB_PCI_SDA
PCI0_PAR PCI0_AD15
PCI0_AD13 PCI0_AD11
39,46-48,50
39,46-48,50
39,46-48,50
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
SUB*_90160
8.2K-5%
2K 5%
1 2
RB145
SUB*_90160
8.2K-5% RB146
21
2K 5%
1 2
RB149
IPMB_SCL
21
IPMB_SDA
51,53
51,53
48 49
PCI0_AD9
39,47,48,50
3
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
PCI0_ACK64_SLT1
46
PCI0_AD8 PCI0_AD7
PCI0_AD5 PCI0_AD3
PCI0_AD1
+3.3V_AUX
LM_X04--83008 sub for p/n consolidation
110 111 112 113 114 115 116 117 118 119 120
MCA_SKT
SUB*_2603C
VCC
SUB*_83009
50 51 52 53 54 55 56 57 58 59 60
PCI0_CBE0
PCI0_AD6 PCI0_AD4
PCI0_AD2 PCI0_AD0
PCI0_REQ64_SLT1
LM_X05--83009 sub for p/n consolidation
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
39,47,48,50
46
3
VCC
R91
220
21
0.1uF 16V0.1uF 16V
1 2
NP*
1 2
0.1uF 16V NP*
SUB*_83008
1 2
1uF
10V-10%
+3.3V
12
PCI0_TDI_SLT1
46
12
PCI0_TMS_SLT1
46
12
PCI0_TRST_SLT1
46
C97
1 2
1 2
22uF 6.3V 22uF 6.3V
NP*
21
0.1uF 16V NP*
21
1 2
1 2
0.1uF 16V NP*
ROOM=PCI1_CAPS
21
0.1uF 16V NP*
21
0.1uF 16V NP*
1 2
0.1uF 16V NP*
0.1uF 16V 0.1uF 16V
R94
12
220
PCI0_TCK_SLT1
46
SUB*_83009
LM_X05--83009 sub for p/n consolidation
ROOM=PCI1
ROOM=PCI0_RES
4 4
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
12/5/2003
A02
SHEET
46 OF 63
A B
DC
Page 47
B D
CA
U96
CDP IOP
CDM IOM
LED
MA9 MA8 MA7 MA6 MA5 MA4 MA3 MA2 MA1 MA0
MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0
MRW MDP
B14 C14 B19 C3 B15 A18 P20 Y7 L4 G3 D6 D11 D15 F4 F17 K4 L17 R4 R17 U6 U10 U15 D5 D7 C8 D10 A12 K2 H3 E1 D2 C17 D18 F18 G20 J20 L19 N18
J4 J2 K3 L1 C12 B11 A11 B10 B2 B1 D3 C1 E3 F3 F2 G2 H2 C4 A8 A9 C9 A6 C6 A4 B4 B6 A7
J3 J1 K1 L2 B12 C11 A10 C10 A2 C2 E4 D1 E2 G4 F1 G1 H1 B3 B8 B9 C7 D9 B5 C5 A3 A5 B7
A15 C16 A19 C13 A14 C15 B16
B20 C19 C20 D19 D20 E19 E20 F19 F20 G19 H19 H20 J19 K19 K20 L20
G17 G18 H18 J17 J18 K17 K18 L18
E18 E17 N20 M19 M18 M17 M20 C18
7891_SD+15 7891_SD+14 7891_SD+13 7891_SD+12 7891_SD+11 7891_SD+10 7891_SD+9 7891_SD+8 7891_SD+7 7891_SD+6 7891_SD+5 7891_SD+4 7891_SD+3 7891_SD+2 7891_SD+1 7891_SD+0 7891_SDP+1 7891_SDP+0 7891_SCD+ 7891_SIO+ 7891_SREQ+ 7891_SMSG+ 7891_SACK+ 7891_SBSY+ 7891_SATN+ 7891_SRST+ 7891_SSEL+
7891_SD-15 7891_SD-14 7891_SD-13 7891_SD-12 7891_SD-11 7891_SD-10 7891_SD-9 7891_SD-8 7891_SD-7 7891_SD-6 7891_SD-5 7891_SD-4 7891_SD-3 7891_SD-2 7891_SD-1 7891_SD-0 7891_SDP-1 7891_SDP-0 7891_SCD­7891_SIO­7891_SMSG­7891_SREQ­7891_SACK­7891_SBSY­7891_SATN­7891_SRST­7891_SSEL-
RDIFFSENSE_7891 NC_7891_HDVSPS NC_7891_LED 7891_REXT1 7891_REXT0 NC_7891_STPWCTL
NC_7891_MA15 NC_7891_MA14 NC_7891_MA13 NC_7891_MA12 NC_7891_MA11 NC_7891_MA10 NC_7891_MA9 NC_7891_MA8 NC_7891_MA7 NC_7891_MA6 NC_7891_MA5 NC_7891_MA4 NC_7891_MA3 NC_7891_MA2 NC_7891_MA1 NC_7891_MA0
NC_7891_MD7 NC_7891_MD6 NC_7891_MD5 NC_7891_MD4 NC_7891_MD3 7891_SECK 7891_SEDI 7891_SEDO
NC_7891_EXTARBREQ NC_7891_RAMPS NC_7891_RAMCS NC_7891_ROMCS 7891_SEECS NC_7891_MRW NC_7891_MDP
0.1uF 16V 1 2
SUB*_78020
7891VCC2_85
FAT TRACE
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
50V-20%
.01UF
SUB*_78020
50V-20%
.01UF
CB305
SUB*_78020
50V-20%
.01UF
CAN USE SIO FOR 40MHZ OUTPUT IF NEEDED
7891AVCC
22uF 6.3V
1 2
LM_X04--Sub for part consolidation
SUB*_78020
50V-20%
1 2
CB314
50V-20%
1 2
CB332
SUB*_78020
1 2
SUB*_83009 LM_X05--83009 sub for p/n consolidation
50V-20%
1 2
.01UF
.01UF
47
1 2
.01UF
CB326
SUB*_78020
50V-20%
.01UF
CB302
SUB*_78020
LM_X04--Sub for part consolidation
+3.3V
ROOM=7890
VCC
NP*
L45
12
BLM11A60
NP*
CB274
47
47
47
47
2 1
.01uF 50V
NP*
12
1 2
SUB*_78020
50V-20%
1 2
.01UF
CB337
0.1uF 16V
1 2
CB323
39,46-48,50
RB189
1 2
2.7K-5%
NO GNT PULLUP NEEDED
NP*
.01uF 50V
21
11.8K-1%
RB196
SHORT TRACE
D14 B18 B17 N19 D16
L3 T2
SCLKIN BRDWE BRDOE IDDAT CLKIN PCLK PCIRST
AVCC1 AVCC0 CVCC7 CVCC6 CVCC5 CVCC4 CVCC3
21
RB195
220
PD_66MHZ NC_7891_BRDWE NC_7891_BRDOE NC_7891_IDDAT CK_40M_7890
47
CK_33M_7890
4
PCI_RST_AIC7890
59
CVCC2 CVCC1
CVCC0 PVCC14 PVCC13 PVCC12 PVCC11 PVCC10
PVCC9
PVCC8
PVCC7
1
VCC
22uF 6.3V
1 2
U89
1
GND
2
VOUT
3
VIN
LT1117-2.85
TAB
7891VCC2_85
47
4
22uF 6.3V
1 2
22uF 6.3V
1 2
PVCC6
PVCC5
PVCC4
SUB*_83009
LM_X05--83009 sub for p/n consolidation
SUB*_83009
SUB*_83009
PVCC3
SVCC8
SVCC7
SVCC6
SUB*_78020
50V-20%
.01UF
1 2
50V-20%
.01UF
CB327
CB336
0.1uF 16V 1 2
CB339
0.1uF 16V 50V-20%
CB338
.01UF
1 2
VCC
CB320
SVCC5 SVCC4 SVCC3 SVCC2
21
SUB*_78020
LM_X04--Sub for part consolidation
21
21
SUB*_78020
RB188
1 2
RB192
8.2K-5%
8.2K-5%
SVCC1 SVCC0 MVCC6 MVCC5 MVCC4 MVCC3 MVCC2
M1
PULLUP1
U3
PULLUP2
T1
V2
U1
W2
V1
W3
AD26 SCDP11
W1
W4
Y2
W6
Y3
W7
Y4
W8
Y6
W9
W14
Y15
W15
Y16
W16
Y18
W17
AD9
Y19
AD8
W20
AD7
W19
AD6
V20
AD5
V19
AD4
U20
AD3
U19
AD2
T20
AD1
T19
AD0
MVCC1 MVCC0
SCDP15 SCDP14 SCDP13 SCDP12
SCDP10
SCDP9 SCDP8 SCDP7 SCDP6 SCDP5 SCDP4 SCDP3 SCDP2 SCDP1
SCDP0 SCDPHP SCDPLP
RESETP
SCDM15 SCDM14 SCDM13 SCDM12
2
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46-48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
7890_ACK64 7890_REQ64
PCI0_AD31 PCI0_AD30 PCI0_AD29 PCI0_AD28 PCI0_AD27 PCI0_AD26 PCI0_AD25 PCI0_AD24 PCI0_AD23 PCI0_AD22 PCI0_AD21 PCI0_AD20 PCI0_AD19 PCI0_AD18 PCI0_AD17 PCI0_AD16 PCI0_AD15 PCI0_AD14 PCI0_AD13 PCI0_AD12 PCI0_AD11 PCI0_AD10 PCI0_AD9 PCI0_AD8 PCI0_AD7 PCI0_AD6 PCI0_AD5 PCI0_AD4 PCI0_AD3 PCI0_AD2 PCI0_AD1 PCI0_AD0
SCDM11 SCDM10
SCDM9
SCDM8
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
PCI0_CBE3 PCI0_CBE2 PCI0_CBE1 PCI0_CBE0 PCI0_PAR
Y1
Y8 Y14 W18 W13
SCDM7 SCDM6 SCDM5 SCDM4 SCDM3 SCDM2
W10 W11
Y9 W12 Y10
W5
R1
FRAME TRDY IRDY STOP DEVSEL IDSEL PREQ
SCDM1
SCDM0 SCDPHM SCDPLM
3
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,46,48,50
39,47
PCI0_FRAME PCI0_TRDY PCI0_IRDY PCI0_STOP PCI0_DEVSEL 7891_IDSEL
47
PCI0_REQ_CSB3
U2 Y12 Y13
GNT PERR SERR
NEED 90 OHM FOR MULTI-MODE
SCSI TRACES TO 120 OHM FOR LVD ONLY
WILL NEED TO MATCH
AVOID VIAS. ROUTE +/- ON ONE LAYER
CLOSE ON THAT LAYER
AVOID ROUTING ANY OTHER SIGNAL
ROUTE EACH PAIR EQUIDISTANT
ROUTE EACH PAIR PARALLEL
MATCHED LENGTH & MATCHED VIAS ALSO
39,46,50
39,46,50
PCI0_GNT_CSB3
39
PCI0_PERR PCI0_SERR
RESETM
PIRQ_2
40
7891_EXPACT NC_EXTPAUSE
VCC
1
2 3 4
1K
8 7 6 5
7891_TCK 7891_TDI NC_7891_TDO 7891_TMS PU_7891_TRST 7891_PDPUDIS
1
2 3 4
8
NC_RN48_8 7 6 5
7891_TESTMODE AGND2
47
VCC
VCC
4 4
47
47
47
7891_SEDI 7891_SEECS 7891_SECK
1 2
8.2K-5% RB191
1 2
47K-5%
3 1 2
RB193
DI CS SK
U77
93C46
VCC
DO
GND
RB190
8 4
1 2
8.2K-5%
7891_SEDO
47
5
R2 A16 A17
N1
P2
P1
N2
M2 R20 P19 D12 A13 B13
A1
D4
D8 D13 D17
H4 H17
J9 J10 J11 J12
K9 K10 K11 K12
L9 L10 L11 L12
M9 M10 M11 M12
N4 N17
U4
U8 U13 U17
DIFFSENS
EXTXCVR
LVREXT SEREXT
STPWCTL
WIDEPS
EXTARBACK EXTARBREQ
RAMPS RAMCS ROMCS SEECS
L39
1 2
FERRITE
1206
50V-20%
1 2
1 2
.01UF
CB310
SUB*_78020
CB340
PCI0_AD22
NET_PHYSICAL_TYPE=PLANE
NP*
2 1
.01uF 50V
OSC_ENAB
10K-1%
AGND2
1 2
CB303
50V-20%
.01UF
50V-20%
0.1uF 16V
SUB*_78020
.01UF
1 2
1 2
1 2
SUB*_78020
50V-20%
.01UF
CB342
SUB*_78020
CB343
1 2
CB309
SUB*_78020
100-5%
12
RB185
SUB*_9627P
LM_X04--9627P sub for p/n consolidation
PCI0_REQ_CSB3
CK_40M_7890SYN
4
CK_40M_7890OSC
47
5V_40M
2
1
8.2K-5%
NP*
X5
4
40MHz
VCC
GND
31
OUTOE
40MHZ_RCLK1
DELAY_RULE=:::300
2
RB201
21
7891_DIFFSENSE
22K-5%
21
0.1uF 16V 1 2
47
VCC
VCC
VCC
50V-20%
.01UF
0.1uF 16V
7891_IDSEL
39,47
1 2
CB289
LM_X05--83009 sub for p/n consolidation
1 2
CB304
1 2
CB312
SUB*_83009
22uF 6.3V
22uF 6.3V
1 2
CB288
SUB*_83009
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
7891_SD+11 7891_SD-11 7891_SD+10 7891_SD-10 7891_SD+9 7891_SD-9 7891_SD+8 7891_SD-8 7891_SIO+ 7891_SIO­7891_SMSG+ 7891_SMSG­7891_SSEL+ 7891_SSEL­7891_SCD+ 7891_SCD­7891_SREQ+ 7891_SREQ-
7891_SD+3 7891_SD-3 7891_SD+2 7891_SD-2 7891_SD+1 7891_SD-1 7891_SD+0 7891_SD-0 7891_SDP+1 7891_SDP-1 7891_SD+12 7891_SD-12 7891_SD+13 7891_SD-13 7891_SD+14 7891_SD-14 7891_SD+15 7891_SD-15
1 2
CK_40M_7890
47
1 2
NP*
SCSI CLOCK
OSCILLATOR -
BACKUP FOR COMBO
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
7891_SRST+ 7891_SRST­7891_SACK+ 7891_SACK­7891_SBSY+ 7891_SBSY­7891_SATN+ 7891_SATN­7891_SDP+0 7891_SDP-0 7891_SD+4 7891_SD-4 7891_SD+5 7891_SD-5 7891_SD+6 7891_SD-6 7891_SD+7 7891_SD-7
CLOCK CHIP (PG 4)
NP*
1 2
33-5%
47
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
CK_40M_7890OSC
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
7891_SD+12 7891_SD+13 7891_SD+14 7891_SD+15 7891_SDP+1 7891_SD+0 7891_SD+1 7891_SD+2 7891_SD+3 7891_SD+4 7891_SD+5 7891_SD+6 7891_SD+7 7891_SDP+0
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15
7891_DIFFSENSE
7891_TRMPWR
16 17 18
NC_SCSI1_19_7891 NC_SCSI1_53_7891
19 20
7891_SATN+
21 22
7891_SBSY+ 7891_SACK+ 7891_SRST+ 7891_SMSG+ 7891_SSEL+ 7891_SCD+ 7891_SREQ+ 7891_SIO+ 7891_SD+8 7891_SD+9 7891_SD+10 7891_SD+11
23 24 25 26 27 28 29 30 31 32 33 34
10 11 12 18 19 20 21 23 24 25 26
10 11 12 18 19 20 21 23 24 25 26
10 11 12 18 19 20 21 23 24 25 26
SCSI_C
2 3 4 5 7 8 9
2 3 4 5 7 8 9
2 3 4 5 7 8 9
FS2
R1P R1N R2P R2N R3P R3N R4P R4N R5P R5N R6P R6N R7P R7N R8P R8N R9P R9N
R1P R1N R2P R2N R3P R3N R4P R4N R5P R5N R6P R6N R7P R7N R8P R8N R9P R9N
R1P R1N R2P R2N R3P R3N R4P R4N R5P R5N R6P R6N R7P R7N R8P R8N R9P R9N
35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
NET_PHYSICAL_TYPE=50MIL
21
1 2
1K-5%
ISO
GND
15
13 16 17 1
27 28
6 22 14
MSTR/SLV
DIFFSENSE
DIFF_CAP
TPWR1 TPWR2
HSGND1 HSGND2
DS2119M
ISO
GND
15
13 16 17 1
27 28
6 22 14
MSTR/SLV
DIFFSENSE
DIFF_CAP
TPWR1 TPWR2
HSGND1 HSGND2
DS2119M
ISO
GND
15
13 16 17 1
27 28
6 22 14
MSTR/SLV
DIFFSENSE
DIFF_CAP
TPWR1 TPWR2
HSGND1 HSGND2
DS2119M
ROOM=7890TERM
7891_SD-12 7891_SD-13 7891_SD-14 7891_SD-15 7891_SDP-1 7891_SD-0 7891_SD-1 7891_SD-2 7891_SD-3 7891_SD-4 7891_SD-5 7891_SD-6 7891_SD-7 7891_SDP-0
7891_TRMPWR
7891_SATN-
7891_SBSY­7891_SACK­7891_SRST­7891_SMSG­7891_SSEL­7891_SCD­7891_SREQ­7891_SIO­7891_SD-8 7891_SD-9 7891_SD-10 7891_SD-11
MBRS330T3
2 1
D11
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
47
7891_TRMPWR
NET_PHYSICAL_TYPE=50MIL
THIS PART IS NOT TO
BE USED ON NEW DESIGNS.
7891_DIFFSENSE
DIFF_B_7891
REG0_7891
DELAY_RULE=:::1000
SLAVE_7891
NC_DIFF1_7891
REG1_7891
DELAY_RULE=:::1000
PLACE NEXT TO 7890
NC_DIFF2_7891
REG2_7891
DELAY_RULE=:::1000
21
220
1 2
47
22uF 10V
1 2
2
1
47
47
TITLE
DWG NO.
ROOMS COMPLETE
21
.01uF 50V
1 2
.01uF 50V
.01uF 50V
1 2
4.7uF
6.3V-10%
1 2
0.1uF 16V
220
1 2
4.7uF
6.3V-10%
1 2
4.7uF
6.3V-10%
7891_SRST+
50V-10%
1000pF
7891_SRST-
ULTRA2/LVD SCSI: AHA7890
SCHEM,PLN,PE4600,2P
21
20K-5%
21
12
COMPUTER CORPORATION
AUSTIN,TEXAS
H3007
SHEET
12/5/2003
1 2
.01uF 50V
47
47 OF 63
1
.01uF 50V
2
3
A02
AIC7890ACB
A B
DC
Page 48
A B C
D
1
2
3
+3.3V
START WITH GECKO II
+3.3V
1 2
10K-5%
39,44,46,51,59
Jaguar H3007 - X00: Populated R165 and changed to PD. Internal PU on ATI chip unreliable. - Page 48
12
ATI_ROMCS
48
8.2K-5% RB179
12
48,49
8.2K-5% RB178
2 1
NP*
48,49
8.2K-5% RB167
12
NP*
48,49
8.2K-5% RB168
2 1
NP*
48,49
8.2K-5% RB177
12
NP*
48,49
8.2K-5% RB166
2 1
NP*
48,49
8.2K-5% RB176
2 1
48,49
8.2K-5% RB493
2 1
8.2K-5%
RB165
NP*
12
NP*
Jaguar H3007 - X00: RB162 - 168, 177, and 178 connected
to GND instead of +3.3V. Still NP. Internal PUs on ATI chip unreliable. Added pads for option of connecting MA6 to PD. In case of future need to enable 3.3V signaling vs. 5V. - Page 48
48,49
8.2K-5% RB175
2 1
48,49
8.2K-5% RB164
2 1
NP*
48,49
8.2K-5% RB162
12
NP*
VRMA10
48,49
8.2K-5% RB163
2 1
NP*
VRM_BA0
48,49
8.2K-5%
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46-48,50
39,46,47,50
LAYOUT FOR THIS SECTION
PCI0_AD0 PCI0_AD1 PCI0_AD2 PCI0_AD3 PCI0_AD4 PCI0_AD5 PCI0_AD6 PCI0_AD7 PCI0_AD8 PCI0_AD9 PCI0_AD10 PCI0_AD11 PCI0_AD12 PCI0_AD13 PCI0_AD14 PCI0_AD15 PCI0_AD16 PCI0_AD17 PCI0_AD18 PCI0_AD19 PCI0_AD20 PCI0_AD21 PCI0_AD22 PCI0_AD23 PCI0_AD24 PCI0_AD25 PCI0_AD26 PCI0_AD27 PCI0_AD28 PCI0_AD29 PCI0_AD30 PCI0_AD31
NC_AGP_ST0 NC_AGP_ST1 NC_AGP_ST2
CK_33M_VIDEO PCI33_EN_XL
PCI0_GNT_CSB1
39
4
PCI_RST_32
21
VGA_RST
READ BIOS STRAPS (DON'T)
BUS CLOCK SELECT (PCI33,5V)
AGP SKEW (DEFAULT)
AGP SKEW (DEFAULT)
1XCLK SKEW (DEFAULT)
1XCLK SKEW (DEFAULT)
ID DISABLE (NORMAL)
BUS TYPE (PCI33,5V)
VGA DISABLE (VGA ENABLED)
ENABLE INT PIN (DISABLED)
IDSEL IN AGP MODE (DEFAULT)
AGP VCO GAIN (DEFAULT)
AGP VCO GAIN (DEFAULT)
U62
V16
AD0
W16
AD1
V15
AD2
Y16
AD3
W15
AD4
Y15
AD5
V14
AD6
W14
AD7
Y14
AD8
V12
AD9
Y13
W12
Y12
V11
Y11
W11
V8
W8
W7
Y7
V7
Y6
W5
Y5
W3
Y3
V3
Y2
W2
Y1
V2
W1
T1
ST0
T3
ST1
R2
ST2
V1
CPUCLK
U16
PCI33EN
T2
GNT
U2
RESET
SBA7/IDSEL
C/BE0 C/BE1 C/BE2 C/BE3
AD_ST0 AD_ST1
PAR
REQ INTR IRDY
SB_ST
FRAME
DEVSEL
N2 N3 P2 P3 P1 V5 W6 V6
V13 W10 Y8 W4
W13 Y4
U10
U1 U3 Y9 R1 V10 V9 W9 Y10
VCC
1 2
39,46-48,50
NC_AGP_SBA0 NC_AGP_SBA1 NC_AGP_SBA2 NC_AGP_SBA3 NC_AGP_SBA4 NC_AGP_SBA5 NC_AGP_SBA6
VGA_IDSEL
PCI0_CBE0 PCI0_CBE1 PCI0_CBE2 PCI0_CBE3
NC_AGP_AD_ST0 NC_AGP_AD_ST1
PCI0_PAR
PCI0_REQ_CSB1 NC_INTA_VGA PCI0_IRDY NC_AGP_SB_ST PCI0_STOP PCI0_TRDY PCI0_FRAME PCI0_DEVSEL
47K-5%
47K-5%
1 2
47K-5%
47K-5%
1 2
47K-5%
47K-5%
PU_ATI_AS
21
PU_ATI_DS
PU_ATI_I2CCK
21
PU_ATI_I2CDAT
PU_ATI_BYTCLK
NP*
21
PU_ATI_SRDY
PCI0_AD30
SUB*_9627P
1 2
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
39,46,47,50
1 2
8.2K-5%
VRDQM0 VRDQM1 VRDQM2 VRDQM3 NC_VRDQM4 NC_VRDQM5 NC_VRDQM6 NC_VRDQM7
RVID_CS0 NC_RVID_CS1
VRM_BA1 RVMCKE RVM_CLK
VRWE VRCAS0 VRRAS0 ATI_ROMCS
NC_ATI_DVS0 NC_ATI_DVS1 NC_ATI_DVS2 NC_ATI_DVS3 NC_ATI_DVS4 NC_ATI_DVS5 NC_ATI_DVS6 NC_ATI_DVS7
NC_ATI_DVSCLK
NC_ATI_SAD0 NC_ATI_SAD1 NC_ATI_SAD2 NC_ATI_SAD3 NC_ATI_SAD4 NC_ATI_SAD5 NC_ATI_SAD6 NC_ATI_SAD7
PU_ATI_AS PU_ATI_DS PU_ATI_I2CCK PU_ATI_I2CDAT PU_ATI_BYTCLK PU_ATI_SRDY
NC_AGP_XTALOUT
100-5%
48,49
48,49
48,49
48,49
48,49
48,49
48,49
48,49
48,49
48
48
48
48
48
48
48,49
48,49
48,49
49
49
49
49
49
49
49
48
49
49
49
48
LM_X04--9627P sub for p/n consolidation
48
48
48
48
48
48
CK_14M_XLSYN
4
VCC
TESTEN_PD
LM_X04--83008 sub for p/n consolidation
10V-10%
1uF
SUB*_83008
CB204
21
NC_AGP_TX0P NC_AGP_TX0M NC_AGP_TX1P NC_AGP_TX1M NC_AGP_TX2P NC_AGP_TX2M NC_AGP_TXCP NC_AGP_TXCM
U62
Y18 L18
MA0 MD0
Y19 Y20 W18 W19 W20 V18 V19 V20 U18 U19 U20
P19 P18 R20 R19 R18 T20 T19 T18
W17 Y17
P17 N18 N20
R17 L20 P20
D3
D1 C1 C2 B2 A2 C3 B3 A3
E1
G1 G2 G3 F2 F1 F3 E3 E2
J1 H2 J2 J3 H1 H3
A1
B1
U15
U8 F4
B6 A6 B5 A5 B4 A4 B7 A7
MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11
CS0 CS1
DSF CKE MCLK
WE CAS RAS ROMCS
DVSCLK
AS DS I2CCK I2CDAT BYTCLK SRDY/IRQ
XTALIN
XTALOUT
TESTEN AGPCLAMP GIOCLAMP
HSYNC VSYNC
MONID0 MONID1 MONID2 MONID3
MONDET DFPCLK DFPDAT
MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9
L19 K18 K19 K20 J18 J19 J20 H18 H19 H20 G17 G18 G19 G20 F17 F18 F19 F20 E17 E18 E19 E20 D17 D18 D19 D20 C18 C19 C20 B20 A20 B19 A19 B18 A18 C17 B17 A17 C16 B16 A16 C15 B15 A15 D14 C14 B14 A14 D13 C13 B13 A13 D12 C12 B12 A12 D11 C11 B11 A11 C10 B10 A10
L1
R
M1
G
N1
B
L2
M2 M3
K1 K2 K3 J4
E4 M18 V17
N17
RAGE PRO XL
HETERO 2 OF 3
SUB*_839RD
VMD0 VMD1 VMD2 VMD3 VMD4 VMD5 VMD6 VMD7 VMD8 VMD9 VMD10 VMD11 VMD12 VMD13 VMD14 VMD15 VMD16 VMD17 VMD18 VMD19 VMD20 VMD21 VMD22 VMD23 VMD24 VMD25 VMD26 VMD27 VMD28 VMD29 VMD30 VMD31 NC_VMD32 NC_VMD33 NC_VMD34 NC_VMD35 NC_VMD36 NC_VMD37 NC_VMD38 NC_VMD39 NC_VMD40 NC_VMD41 NC_VMD42 NC_VMD43 NC_VMD44 NC_VMD45 NC_VMD46 NC_VMD47 NC_VMD48 NC_VMD49 NC_VMD50 NC_VMD51 NC_VMD52 NC_VMD53 NC_VMD54 NC_VMD55 NC_VMD56 NC_VMD57 NC_VMD58 NC_VMD59 NC_VMD60 NC_VMD61 NC_VMD62 NC_VMD63
RED GREEN BLUE
AGP_RSET
RHSYNC RVSYNC
NC_ATI_MONID0 RDDC_SDA RDDC_SCLK NC_ATI_MONID3
NC_ATI_MONDET NC_ATI_DFPCLK NC_ATI_DFPDAT
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
Jaguar 2.0 Change: *
49
49
49
49
49
49
49
49
49
+2.5V
1 2
365-1%
49
49
* Inductors on ATI RAGE have too much DC resistance
49
49
+3.3V
0.1uF 16V 1 2
BE USED ON NEW DESIGNS.
+3.3V
22uF 10V
THIS PART IS NOT TO
1 2
CB241
0.1uF 16V
0.1uF 16V
21
CB212
21
0.1uF 16V CB21421CB231
21
0.1uF 16V
0.1uF 16V CB218
21
0.1uF 16V CB236
21
BE USED ON NEW DESIGNS.
+2.5V
22uF 10V
THIS PART IS NOT TO
0.1uF 16V
CB203
1 2
0.1uF 16V
21
CB224
21
0.1uF 16V CB235
21
Single connection point
0.1uF 16V CB190
21
BE USED ON NEW DESIGNS.
THIS PART IS NOT TO
ATI_TXVDDR
1 2
1 2
BE USED ON NEW DESIGNS.
THIS PART IS NOT TO
ATI_AVDD
21
ATI_PVDD
SUB*_78020
0.1uF 16V 1 2
21
LM_X04--Sub for part consolidation
50V-20%
.01UF
2 1
BE USED ON NEW DESIGNS.
THIS PART IS NOT TO
ATI_LPVDD
0.1uF 16V0.1uF 16V0.1uF 16V
21
21
NC_RAGEXL_NC1 NC_RAGEXL_NC2 NC_RAGEXL_NC3 NC_RAGEXL_NC4 NC_RAGEXL_NC5 NC_RAGEXL_NC6 NC_RAGEXL_NC7 NC_RAGEXL_NC8 NC_RAGEXL_NC9 NC_RAGEXL_NC10 NC_RAGEXL_NC11 NC_RAGEXL_NC12 NC_RAGEXL_NC13 NC_RAGEXL_NC14 NC_RAGEXL_NC15
SUB*_5990P
48
SUB*_5990P
48
L26
BLM21A601S
SUB*_5990P
48
SUB*_5990P
48
AVSS
L27
BLM21A601S
TXVSSR
L25
1 2
BLM21A601S
AVSS
21
22uF 10V
1 2
PVSS
L28
1 2
BLM21A601S
21
22uF 10V
22uF 10V
BE USED ON NEW DESIGNS.
THIS PART IS NOT TO
22uF 10V
48
Change inductors L25-L28 to P/N 5990P (from DCR of
1.5ohm to < 0.3 ohm)
0.1uF 16V CB234
21
+3.3V
0.1uF 16V CB233
1 2
48
48
48
48
T4 U6 U9
U14
D4
D7 D10 D16
G4 H17 K17 M17
D8 L17
P4 U11
C5
C7
N4
L3
B9
B8
C8
C9
D2
D5
D6 M19 M20 N19
R3
U4
U5 U13 U17
V4
+3.3V
22uF 10V
AVSS PVSS TXVSSR LPVSS
VDDR1 VDDR2 VDDR3 VDDR4 VDDR5 VDDR6 VDDR7 VDDR8
VDDC1 VDDC2 VDDC3 VDDC4
TXVDDR1 TXVDDR2
LPVDD
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15
22uF 10V
ROOMS COMPLETE
BE USED ON NEW DESIGNS.
THIS PART IS NOT TO
1 2
0.1uF 16V CB196
0.1uF 16V 1 2
CB199
0.1uF 16V
21
1 2
1 2
U62
AVSS1 AVSS2
TXVSSR1 TXVSSR2 TXVSSR3
LPVSS
RAGE PRO XL
HETERO 3 OF 3
48
48
48
48
BE USED ON NEW DESIGNS.
+2.5V
THIS PART IS NOT TO
1 2
1 2
D9 D15 H4 J9 J10 J11 J12 J17 K9 K10 K11 K12 L9 L10 L11 L12 M9 M10 M11 M12 R4 T17 U7 U12
K4 L4
A8 C4 C6
M4
A9
TXVSSR AVSS
0.1uF 16V
CB189
1 2
1 2
CB198
1 2
1
2
3
4
1 2
NP*
RAGE PRO XL
HETERO 1 OF 3
48
RVM_CLK
839RD IS B41 REV OF XL
47-5%
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
21
VMCLK0
49
TITLE
DWG NO.
PCI VIDEO
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
DCBA
4
A02
SHEET
48 OF 6312/5/2003
Page 49
A B C
ROOM=VGA
BUS_NAME=VIDEO_DATA
BUS_NAME=VIDEO_ADDR/CON
Use sub_18360 for 4M option
45
DDC_VCC
LM_X04--Sub for part consolidation
50V-20%
.01UF
D
ROOMS COMPLETE
VESA standard monitor modes:
HSYNC
ON OFF
1 2
C10
ON OFF
ON ON OFF OFF
MODEVSYNC
Normal Standby (screen blank) Shut down (low power) Off
1
2
3
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
VRMA0
VRMA3
VRMA1
VRMA2
VRMA4
VRMA5
VRMA6
VRMA7
VRMA8
VRMA9
RVID_CS0
VRM_BA0
VRMA10
VRDQM3
VRDQM2
VRM_BA1
VRRAS0
VRDQM0
VRDQM1
RVMCKE
RN64
22-5%
RN64
3 6
22-5%
RN64
2 7
22-5%
RN64
1 8
22-5%
RN65
4 5
22-5%
RN65
3 6
22-5%
RN65
2 7
22-5%
RN65
1 8
22-5%
RN66
4 5
22-5%
RN66
3 6
22-5%
RN66
2 7
22-5%
RN66
1 8
22-5%
RN67
4 5
22-5%
RN67
3 6
22-5%
RN67
2 7
22-5%
RN67
1 8
22-5%
RN68
4 5
22-5%
RN68
3 6
22-5%
RN68
2 7
22-5%
RN68
1 8
22-5%
SUB*_78020
ROOM=VGACON
1
L1
21
R_OUT G_OUT
22pF 50V
B_OUT
NC_VGA4
21
+3.3V
+3.3V
L21
FERRITE
1206
RED
48
1 2
12
75-1% 75-1% 75-1%
R28
22pF 50V
FERRITE
.17x.12
21
12
54
21
VID_CS0
VM_BA0
VMA10
VDQM3
VDQM2
VWE
VRAS0
VDQM0
VDQM1
VMCKE
VM_BA1
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
+3.3V
2.2K-5% RB494
12
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
48
VM_BA1 VM_BA0
VWE VID_CS0
VRAS0 VCAS0
VDQM0 VDQM1 VDQM2 VDQM3
VMCKE
VMCLK0
NC_14_2MX32 NC_21_2MX32 NC_30_2MX32 NC_57_2MX32 NC_69_2MX32 NC_70_2MX32 NC_73_2MX32
U78
1 15 29 43
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6
23
22
25 26 27 60 61 62 63 64 65 66 24
BA1 BA0
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10
VDDQ7 VDDQ8
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11
17
WE
20
CS
THIS PART IS NOT TO
19
BE USED ON NEW DESIGNS
18
RAS CAS
16
71
28
59
67
CKE
68
CLK
14
NC1
21
NC2
30
NC3
57
NC4
69
DELL PART #53RYH
70 73
NC5 NC6 NC7
REPLACED WITH PART #4T398
44
58
72
86
SUB*_4T398
2Mx32
125MHz
VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8
3 9 35 41 49 55 75 81
2 4 5 7 8 10 11 13 74 76 77 79 80 82 83 85 31 33 34 36 37 39 40 42 45 47 48 50 51 53 54 56
6 12 32 38 46 52 78 84
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
220
BE USED ON NEW DESIGNS.
+3.3V
THIS PART IS NOT TO
22uF 10V
1 2
C280
0.1uF 16V 1 2
C48
12
C85
21
CB294
0.1uF 16V
12
C59
0.1uF 16V
22uF 10V
THIS PART IS NOT TO
BE USED ON NEW DESIGNS.
3V_SYNC_FIL
48
48
RHSYNC
TRINFIX
R33
48
48
0.1uF 16V 1 2
50V-20%
.01UF
C84
1 2
9
12
RDDC_SDA
RDDC_SCLK
21
0.1uF 16V
62
U12 74VHC125
14
8
10
U12 74VHC125
14
11
13
CB295
48
48
R2HSYNC
R2VSYNCRVSYNC
1 2
CB265
GREEN
0.1uF 16V
1 2
R29
1 2
R30
R31
1 2
33-5%
R32
1 2
33-5%
1 2
L2
21
FERRITE
22pF 50V
.17x.12
21
L3
21
FERRITE
22pF 50V
.17x.12
21
L4
1 2
FERRITE
.17x.12
50V-5%
HSYNC
50V-5%
21
L5
VSYNC
330pF 50V
1 2
SUB*_9627P
FERRITE
.17x.12
21
R26
21
DDC_SDA
R25
21
100-5%
LM_X04--9627P sub for p/n consolidation
50V-20%
.01UF
1 2
CB267
100-5%
SUB*_9627P
VIDEO SDRAM DECOUPLING
22pF 50V
21
21
21
330pF 50V
1 2
DDC_SCLK
DDC_VCC
NC_VGA11
DDC_SDA
HS_OUT VS_OUT
DDC_SCLK
SUB*_58551
R43
21
2.2K-5%
R42
21
2.2K-5%
VGA
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15
DDC
DSUB_VGA
SCREW LOCK
2
VCC
13
D1
3
4
48
VRCAS0
22-5%
1 2
22-5%
VCAS0
49
Jaguar H3007 - X00: Added 2.2K +3.3V PU on CKE. Internal PU on ATI chip unreliable. - Page 49
+3.3V
0.1uF 16V 1 2
CB264
0.1uF 16V 1 2
CB266
SUB*_78020
50V-20%
.01UF
SUB*_78020
1 2
CB293
LM_X04--Sub for part consolidation
0.1uF 16V0.1uF 16V 1 2
CB193
LM_X04--Sub for part consolidation
0.1uF 16V 1 2
CB182
50V-20%
.01UF
SUB*_78020
CB296
21
SUB*_78020
TITLE
AGP MEMORY
COMPUTER CORPORATION
AUSTIN,TEXAS
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003 49 OF 63
DCBA
A02
Page 50
B D
CA
ROOMS COMPLETE
1
2
3
ROOM=NIC
+3.3V_AUX
LB5
FERRITE
1206
0.1uF 16V 2 1
NEED TO PROGRAM THE NIC EEPROM AT FVS TO SPEED UP THE DELL FACTORY INSTALL PROCESS
NIC_EEDO
50
NIC_EEDI
50
NIC_EECS
50
NIC_EECLK
50
21
16V 10%
1 2
SUB*_83008
16V 10%
CB117
1 2
10V-10%
1uF
2 1
10V-10%
1uF
10V-10%
CB125
1uF
12
SUB*_83008
LM_X04--83008 sub for p/n consolidation
SUB*_83008
TXO+/-,RXI+/- should be routed with equal lengths and sep.
50
50
50
50
SD_X04 -- changed 559 caps to 603 1%
U21
3
DI
1
CS
2
SK
VCC
DO
GND
8 4 5
ROOM=NIC_CORNER
2 1
0.1uF 16V 1 2
0.1uF 16V 1 2
0.1uF 16V 1 2
CB150
0.1uF 16V
ROOM=NICMAG
21
LM_A00--Cap on TCT (C15, C9, or C27) should be 10 pF or less Only one should be populated if ever needed
100-1%
1 2
place close to 82559
21
C15
.01UF
50V-20%
NP*
NP*
LM_X04--Sub for part consolidation
559_3.3V_AUX
12
C9
0.1uF 16V NP*
0.1uF 16V
21
559_3.3V_AUX
100-1%
C27
1 2
50
1 2
CB106
C47
2 1
0.1uF 16V C55
12
0.1uF 16V
470pF
C80
50V-10%
SUB*_78020
0.1uF 16V
21
50
CHASSIS_GND
.01UF
1 2
CB108
8B
10B
2B
1B
3B
4B
6B
5B
11B 12B 13B 14B
42
C87
2 1
50V-20%
0.1uF 16V 1 2
CB107
0.1uF 16V
use right angle led
DS1
31
NP*
GREEN
TX+
TCT
TX-
RX+
RCT
RX-
0.1uF 16V NP*
50
559_3.3V_AUX
21
USB_ENET
YEL
GRN
RJMAG-6
R61
1 2
330-5%
1 2
559_3.3V_AUX
559_SPEEDLED
NP*
1 2 3 4 5 6 7 8
SUB*_6J864
R11
NP*
7B
9B
R58
12
R45
50
12
559_AUX_POWER
LEDLINK
10M
ORG
GRN
OFF
ROOM=USB_NIC
50
1 2
330-5%
LM_X05--6J864 is new Belfuse p/n
559_ACTLED
R27
1 2
330-5%
50
559_LILED
CLKEN
+3.3V_AUX
7
8
2
1
50
50
U25
VIO
X1
X2 TDP TDN RDP RDN
TI
TO
TCK
E12 G5 G6 H5 H6 H7 H8 J5 J6 J7 J8 J9 J10 J11 K4 K5 K6 K7 K8 K9 K10 K11 L4 L5 L9 L10
A3 A7 E1 K3 N6 P2 G13 K13 N8 P12 A11
G2 C12
N11 P11
X1_559
X2_559 C13 C14 E13 E14 C11 A12 B11 B13 B14
D12 B12 D13 D14 A10 B10 C9 C5
NC_WOL_EVENT
C8
A13
PD_559_TEST 1 8
A1 A14 D9 D10 G4 H4 J4 L7 L8 P1 P14
D4 D5 D6 D7 D8 D11 E4 E5 E6 E7 E8 E9 E10 E11 F4 F5 F6 F7 F8 F9 F10 F11 G7 G8 G9 G10 G11
559_3.3V_AUX
559_VIO NC_VREF
RBIAS100 RBIAS10
PD_5559_TI NC_559_TEST_OUT PD_559_TEXEC
PD_559_TCK
559_ALERT_CLK NC_559_SMBALERT 559_ALERT_DATA
559_CLKRUN
LM_X04--Sub for part consolidation
SUB*_78020
50
50
50
50
4.7K-5%
NC_559_1 NC_559_14 NC_559_51 NC_559_52 NC_559_88 NC_559_102 NC_559_116 NC_559_147 NC_559_148 NC_559_183 NC_559_196
CB139
.01UF
50V-20%
RB111
1 2
47K-5%
50
50
50
1 2
47K-5%
50
1
12
VCC
R79
1 2
CK_25M_I559SYN
4
2
NP*
R92
21
C99
21
22pF 50V
X1
10M
1 2
25MHz-30ppm
R96
1 2
1 2
22pF 50V
SUB*_1395U
50
50
4.7K-5% RN33
72
3 6
4.7K-5% RN33
4.7K-5% RN33
54
11.8K-1% RB78
604-1%
21
Yields 575 ohm
1 2
CHANGE 1199P 604 OHM 1%
1 2
619-1%
604-1%
1 2
NP*
3
LM_X04--9627P sub for p/n consolidation
50
SUB*_9627P
RB101
39,46-48,50
PCI0_AD20
21
100-5%
ROOM=NIC
NC_ISPU_5
5
6
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46,47
39,46,47
39,46-48
4
3
NC_ISPU_4
53,56,57,60
559_ALERT_CLK 559_ALERT_DATA 559_PURST
50
50
50
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48,50
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
39,46-48
PCI0_CBE3 PCI0_CBE2 PCI0_CBE1 PCI0_CBE0 PCI_NIC_IDSEL PCI0_FRAME PCI0_IRDY PCI0_TRDY PCI0_DEVSEL PCI0_STOP PCI0_PERR PCI0_SERR PCI0_PAR CK_33M_NIC100
4
PIRQ_3
40
559_PURST
50
PCI0_GNT_CSB2
39
PCI0_REQ_CSB2
39
GPE_PME_BUS0
44
PCI_RST_I559
59
3.3VAUX_PWRGOOD
PCI0_AD31 PCI0_AD30 PCI0_AD29 PCI0_AD28 PCI0_AD27 PCI0_AD26 PCI0_AD25 PCI0_AD24 PCI0_AD23 PCI0_AD22 PCI0_AD21 PCI0_AD20 PCI0_AD19 PCI0_AD18 PCI0_AD17 PCI0_AD16 PCI0_AD15 PCI0_AD14 PCI0_AD13 PCI0_AD12 PCI0_AD11 PCI0_AD10 PCI0_AD9 PCI0_AD8 PCI0_AD7 PCI0_AD6 PCI0_AD5 PCI0_AD4 PCI0_AD3 PCI0_AD2 PCI0_AD1 PCI0_AD0
NC_559_FLD7 NC_559_FLD6 NC_559_FLD5 NC_559_FLD4 NC_559_FLD3 NC_559_FLD2 NC_559_FLD1 NC_559_FLD0
NC_559_FLA16_A_CLK NIC_EECLK
50
NIC_EEDO
50
NIC_EEDI
50
NC_559_FLADD12 NC_559_FLADD11 NC_559_FLADD10 NC_559_FLADD9 NC_559_FLADD8 CLKEN
50
NC_559_FLADD6 NC_559_FLADD5 NC_559_FLADD4 NC_559_FLADD3 NC_559_FLADD2 559_AUX_POWER
50
NC_559_FLADD0
C4
F3
L3
M4
A4
IDSEL
F2
FRAME
F1
G3
H3
DEVSEL
H1
J2
A2
J1
PAR
G1
CLK
H2
C2
RST
J3
GNT
C3
REQ
A6
PME
B9
ISOLATE
A9
ALTRST
B8
A8
C7
C6
B6
B5
A5
B4
B2
B1
C1
D3
D2
D1
E3
K1
L2
L1
M3
M2
M1
N2
N3
AD9
P3
AD8
N4
AD7
P4
AD6
M5
AD5
N5
AD4
P5
AD3
P6
AD2
M7
AD1
N7
AD0
J14
H12
H13
H14
G12
F12
F13
F14
P9
FLA16
M10
FLA15/EESK
N10
FLA14/EEDO
P10
FLA13/EEDI
M11
FLA12
M12
FLA11
N13
FLA10
P13
N14
FLA8/IOCHRDY
M13
M14
L12
L13
L14
K14
J12
J13
VCC_68 VCC_89
VCC_90 VCC_103 VCC_104 VCC_105 VCC_106 VCC_117 VCC_118 VCC_119 VCC_120 VCC_121 VCC_122 VCC_123 VCC_130 VCC_131 VCC_132 VCC_133 VCC_134 VCC_135 VCC_136 VCC_137 VCC_144 VCC_145 VCC_149 VCC_150
VCCPP_3 VCCPP_7
VCCPP_57 VCCPP_129 VCCPP_174 VCCPP_184
VCCPL_97 VCCPL_139 VCCPL_176 VCCPL_194
VCCPT_11
ACTLED
LILED SPEEDLED RBIAS100
RBIAS10
TEXEC
SMBCLK
SMBALERT
CSTSCHG
CLKRUN
NC_102 NC_116 NC_147 NC_148 NC_183 NC_196
VSS_46 VSS_47 VSS_48 VSS_49
50
NIC_EECS
NC_559_FLCS NC_559_FLOE NC_559_FLWE
P7 N9 M8 M9
VSS_50 VSS_53 VSS_60 VSS_61 VSS_62
1 2
1K-5%
H9 H10 H11
L6 L11
B3
B7
E2
K2
M6
N1 G14 K12 N12
P8 C10
VSS_107 VSS_108 VSS_109 VSS_146 VSS_151 VSSPP_17 VSSPP_21 VSSPP_58 VSSPP_128 VSSPP_160 VSSPP_169 VSSPL_98 VSSPL_138 VSSPL_180 VSSPL_190 VSSPT_38
VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95
93C46
CB118
SUB*_8717P
4 4
????? IS 64x16 SEEPROM PROG PART U20
.01UF
1 2
50V-20%
SUB*_78020
LM_X04--Sub for part consolidation
82559
8717P IS 64x16 SEEPROM BLANK
INTEL NIC
2817P IS 256x16 SEEPROM
ROOM=NICROM
1K EEPROM
(64 x 16)
A B
NIC EEPROM
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
SCHEM,PLN,PE4600,2P
DWG NO.
H3007
12/5/2003
DC
COMPUTER CORPORATION
AUSTIN,TEXAS
A02
SHEET
50 OF 63
Page 51
B D
9,51-54,59,60
P3V3AUX_DIRECT
CA
CK_10M_ZIRCONSYN
4
LM_X04--83008 sub for p/n consolidation
1
SD_X05 -- added 2 pd's for Zircon strapping
2
51,52
51,52
51,52
51,52
8,41,44
51,52
51,52
51,52
51,52
51,52
51
54
54
51
51,52
54
51,52
54
3
BMC_A2 BMC_D0 BMC_D2 BMC_D3
GPI_VRM1_PRES
BMC_A1 BMC_A3 BMC_D1 BMC_RD BMC_A5 BMC_EXGPCS FAN_GRN_LED_1 FAN_AMB_LED_1 BMC_CLKOUT BMC_A6 FAN_GRN_LED_2 BMC_A4 FAN_AMB_LED_2
8,41,60
~VID_CONFLICT & PSPG
Jaguar 2. 0 - X02: Tied pin 80 to H_RST_3V
RB1001
21
GPI_SLIM_DETECT ICE_DBG
53
AC_PWRGOOD
61
51
PWRGOOD_BEFORE_OC
60
BMC_RESET
41,43,55,56,59,61
39,44,46,48,51,59
AMUX_SEL0
54
AMUX_SEL1
54
I2C_MUX_SEL0
53
I2C_MUX_SEL2
53
I2C_MUX_SEL1
53
CPU_VRM_EN
BMC_RESERVED_1
51
51,53
51,52
45,53
44,53
EMP_EN CPLD_COM0
41
CPLD_COM1
41
BMC_SER_SOUTB
51
SER_SOUTB HOST_SER_SINB H_RST_3V
9
44,61
44,61
8,41,44
41,51-53
BMC_WR
9572XL
P3V3AUX_DIRECT
9,51-54,59,60
1 2
R1000
P3V3AUX_DIRECT
4
3
2
1
RN150
51
51
9,51-54,59,60
ESM_SYSID0 ESM_SYSID1
5
VCCINT1
57
VCCINT2
98
VCCINT3
16
IO1/FB1
13
IO2/FB1
18
IO3/FB1
20
IO4/FB1
14
IO5/FB1
15
IO6/FB1
25
IO7/FB1
17
IO8/FB1
22
IO9/GCK1
28
IO10/FB1
23
IO11/GCK2
33
IO12/FB1
36
IO13/FB1
27
IO14/GCK3
29
IO15/FB1
39
IO16/FB1
30
IO17/FB1
40
IO18/FB1
87
IO1/FB2
94
IO2/FB2
91
IO3/FB2
93
IO4/FB2
95
IO5/FB2
96
IO6/FB2
3
IO7/GTS1
97
IO8/FB2
99
IO9/GSR
1
IO10/FB2
4
IO11/GTS2
6
IO12/FB2
8
IO13/FB2
9
IO14/FB2
11
IO15/FB2
10
IO16/FB2
12
IO17/FB2
92
IO18/FB2
2
NC1
7
NC2
19
NC3
24
NC4
34
NC5
43
NC6
46
NC7
73
NC8
80
NC9
PCI_RST_32
5
6
7
8
NC_XCESM_1
NC_XCESM_92
XC9572-15TQ
XC95144XL-10TQ
SUB*_W1123
Blank p/n 7278P Jaguar Prog p/n 79UMD
1 2
RB402
NP*
1 2
2.7K-5%8.2K-5% RB401
1 2
8.2K-5%
2.7K-5%
RB403
NP*
RB404
21
SUB*_83008
VCCIO1 VCCIO2 VCCIO3 VCCIO4
IO1/FB3 IO2/FB3 IO3/FB3 IO4/FB3 IO5/FB3 IO6/FB3 IO7/FB3 IO8/FB3
IO9/FB3 IO10/FB3 IO11/FB3 IO12/FB3 IO13/FB3 IO14/FB3 IO15/FB3 IO16/FB3 IO17/FB3 IO18/FB3
IO1/FB4
IO2/FB4
IO3/FB4
IO4/FB4
IO5/FB4
IO6/FB4
IO7/FB4
IO8/FB4
IO9/FB4 IO10/FB4 IO11/FB4 IO12/FB4 IO13/FB4 IO14/FB4 IO15/FB4 IO16/FB4 IO17/FB4 IO18/FB4
TCK TDI TDO TMS
26 38 51 88
41 32 49 50 35 53 54 37 42 60 52 61 63 55 56 65 58 59
66 64 71 72 67 76 77 68 70 81 74 82 85 78 89 86 90 79
48 45 83 47
NC_U135_41
FAN_GRN_LED_3
ESM_SYSID1
RCYC_BLUE
ESM_SYSID0 FAN_GRN_LED_4 FAN_AMB_LED_4
NC_U135_37
BMC_RAW_FLCS
FAN_MUX_SEL
FAN_AMB_LED_3
BMC_FLCS
BMC_RAW_SRCS
BMC_SRCS RCYC_AMBER BEZEL_INTRUDED CPNL_MUX_SEL0 CPNL_MUX_SEL1
RBAT_PRSNT VFPCP_OSC VRM1_PWRGOOD MC_VR_PG_B VRM2_PWRGOOD FAN_GRN_LED_5 FAN_AMB_LED_5 MC_PRES_B RBAT_QCHRG MC_PRES_A HOST_SER_SOUTB H1_THERMTRIP_3V MC_VR_PG_A FAN_GRN_LED_6 H0_PROCHOT_3V H0_THERMTRIP_3V H1_PROCHOT_3V FAN_AMB_LED_6
XCPLD_TCK
XCPLD_TD_MID
XCPLD_TDO XCPLD_TMS
10V-10%
54
54
54
54
54
54
54
39,41
41
39,41
39,41
1uF
41,56
53
8,60
60
8,60
14,44
41,56
13,44
44,53
9
60
9
9
9
1 2
51
52
51
51
54
54
51,52
51
51,52
52
53
57
57
rspn
Jaguar 2. 0 - A01: Changed ESM CPLD part number from 1F889 to W1123, because
code changes are not backwards compatible with older planars.
41,51-53
10V-10%
CB667
1uF
SUB*_83008
9,51-54,59,60
BMC_RESET
SUB*_83008
10V-10%
1uF
21
P3V3AUX_DIRECT
1 2
1K-5%
RB478
D
3
Q60
2N7002
1
G
S
2
21
LM_X04--83008 sub for p/n consolidation
BMC_RAW_FLCS
51
BMC_RAW_SRCS
51
3.3VAUX_PWRGOOD
RB422
NP*
1 2
NP*
21
52,53
BMC_FLCS
BMC_SRCS
51,52
51,52
ROOM=BMC
9,51-54,59,60
57,61
ESM_ALERT
9,51-54,59,60
SD_X06 -- added ~FLASH_WP
P3V3AUX_DIRECT
1 2
8.2K-5% 8.2K-5%
P3V3AUX_DIRECT
21
22uF 6.3V
1 2
CB704
22uF 6.3V
CB689
21
SUB*_83009
LM_X05--83009 sub for p/n consolidation
L56
FERRITE
1206
21
1 2
RB479
0.1uF 16V
SUB*_83009
CB717
21
54
54
54
54
54
54
54
54
54
54
54
57,60
11,39,55
53
57
57
RB434
39,44
39
39
46,53
46,53
53
53
57
54
54
52
51,53
51
45,53
45,53
45,53
45,53
45,53
51
51
44,57
44,53
SUB*_83008
10V-10%
1uF
10V-10%
CB666
21
SUB*_83008
NET_PHYSICAL_TYPE=PLANE
22uF 6.3V
22uF 6.3V
21
SUB*_83009
A2D_2_5_REF A2D_2_5 A2D_BAT A2D_3_3 A2D_MUX3 A2D_MUX2
A2D_ROMB_BAT
A2D_VCORE_1
FAN1_RPM FAN2_RPM FAN3_RPM NC_FAN4_RPM
SYSTEM_PWRGOOD
NC_SLEEP
GPE_CMIC_FATAL
INTRUDED
CPNL_DATA CPNL_CLK
NC_BMC_36
NC_BMC_37
NC_BMC_38
NC_BMC_39
NC_BMC_42
NC_BMC_43
NC_BMC_44
NC_BMC_45
GPE_ESM_IRQ15
GPE_ESM2SMI GPE_ESM2SCI
IPMB_SDA IPMB_SCL ENV_SDA ENV_SCL
PWR_LED
FANFAST_1 FANFAST_2 FLASH_WP
EMP_EN
NC_BMC_76
NC_BMC_77
NC_BMC_78
NC_BMC_79
BMC_SER_SOUTB SER_SINB SER_CTSB SER_DCDB SER_RIB SER_RTSB
BMC_RESERVED_0 BMC_RESERVED_1
PWRBTN HOST_SER_RTSB
1 2
1uF
1 2
CB661
SUB*_83009
0.1uF 16V CB687
1 2
0.1uF 16V 1 2
0.1uF 16V
CB660
CB702
21
BMC_A2D_3.3VFP
LM_X05--83009 sub for p/n consolidation
156
ADCVDD
157
ADCGND
158
A2D12
159
A2D11
160
A2D10
1
2
3
4
5
6
7
8
9
10
26
TACH_IN0/GPIO0
27
TACH_IN1/GPIO1
28
TACH_IN2/GPIO2
29
TACH_IN3/GPIO3
30
TACH_IN4/GPIO4
31
TACH_IN5/GPIO5
32
TACH_IN6/GPIO6
33
TACH_IN7/GPIO7
34
PSP_RD/GPIO36
35
PSP_WR/GPIO37
36
PSP_D4/GPIO38
37
PSP_D5/GPIO39
38
PSP_D6/GPIO40
39
PSP_D7/GPIO41
42
TACH_IN8/GPIO8
43
TACH_IN9/GPIO9
44
TACH_IN10/GPIO10
45
TACH_IN11/GPIO11
47
BT_IRQ/GPIO32
48
KCS1_IRQ/GPIO33
49
KCS2_IRQ/GPIO34
50
KCS3_IRQ/GPIO35
63
I2C_SDA0
64
I2C_SCL0
65
I2C_SDA1/GPIO12
66
I2C_SCL1/GPIO13
67
I2C_SDA2/GPIO14
68
I2C_SCL2/GPIO15
69
GPIO16
70
GPIO17
72
PWM0/GPIO48
73
PWM1/GPIO49
74
PWM2/GPIO50
75
PWM3/GPIO51
76
PWM4/GPIO52
77
PWM5/GPIO53
78
PWM6/GPIO54
79
PWM7/GPIO55
82
GPIO56
83
GPIO57
84
GPIO58
85
GPIO59
86
UART0_DOUT
87
UART0_DIN
88
UART0_CTS/GPIO26
89
UART0_DCD/GPIO27
90
UART0_RI/GPIO28
91
UART0_RTS/GPIO29
93
UART1_DOUT/GPIO30
94
UART1_DIN/GPIO31
148
GPIO42
149
GPIO43
54
17.734480MHz
4
VCC
1
E/D
GND
OUT
3
2
10Mhz, 100PPM, 3.3V
RB472
1 2
NP*
IMPORTANT NOTE IF YOU POPULATE U152:
PIN 1 (E/D) SHOULD BE TIED TO VCC WITH A 5K RESISTOR NOT DIRECTLY AS IT IS NOW. OTHERWISE THERE MAY BE NOISE PROBLEMS. SEE MERLOT SCHEMATICS.
TDI
TMS TRST TCLK
BHE
BLE READ
D0 D1 D2 D3 D4 D5 D6 D7 D8
D9 D10 D11 D12 D13 D14 D15
40 46 51 58 71 92 113 132 154
11 12
13
18 15 17 16 14
19
20 21 22 23 24
53 54 55 56 59 60 61
95 96 97 98 99 100 101
103 104 105 106 107 108 109 110 111 112 114 115 116 117 118 119
122 123 124 125 126 127 128 129 130 131 133 134 135 136 137 138
139 140 141
VDD_9 VDD_8 VDD_7 VDD_6 VDD_5 VDD_4 VDD_3 VDD_2 VDD_1
CELLVDD CELLGND
REFCLK
PLLBYPASS PLLFILTER
PLLVDD PLLGND SUBGND
RESET
TDO/TESTOUT
LAD0/PSP_D0 LAD1/PSP_D1 LAD2/PSP_D2 LAD3/PSP_D3
LFRAME LRESET
WRITE FLASH_CS SCANTEST CLOCKOUT
ADR1/RST_TMODE
ADR7/ARMTEST ADR8/NANDTEST ADR9/BISTMODE ADR10/ADCTEST
ADR11/FWTEST ADR12/PLLTEST
ADR13/POWERDOWN
ADR14/TRISTATE ADR15/PSP_MODE
ADR16/FLASH_BOOT
ADR17/GPIO18
ADR18/GPIO19
ADR19/GPIO20
NET_PHYSICAL_TYPE=PLANE
BMC_RESET
TDO TDI TMS TRST TCLK
LAD0 LAD1 LAD2 LAD3 LFRAME
PCI_RST_32
CK_33M_ZIRCON
BMC_BHE BMC_BLE BMC_RD BMC_WR
BMC_RAW_FLCS
NC_ZIR_100
BMC_CLKOUT
BMC_D0 BMC_D1 BMC_D2 BMC_D3 BMC_D4 BMC_D5 BMC_D6 BMC_D7 BMC_D8 BMC_D9 BMC_D10 BMC_D11 BMC_D12 BMC_D13 BMC_D14 BMC_D15
BMC_A1 BMC_A2 BMC_A3 BMC_A4 BMC_A5 BMC_A6 BMC_A7 BMC_A8 BMC_A9 BMC_A10 BMC_A11 BMC_A12 BMC_A13 BMC_A14 BMC_A15 BMC_A16
BMC_A17 BMC_A18 BMC_A19
1 2
RB470
SHORT STUB BETWEEN RESISTORS
LM_X04--83XMY sub for p/n consolidation
SUB*_83XMY
RB463
1 2
1.5K-5%
22uF 6.3V
41,51-53
53
53
53
LM_X05--83009 sub for p/n consolidation
53
53
SUB*_83009
39,44
39,44
39,44
39,44
39,44
39,44,46,48,51,59
4
52
52
51,52
51,52
51
51
51,52
51,52
51,52
51,52
52
52
52
52
52
52
52
52
52
52
52
52
51,52
51,52
51,52
51,52
51,52
51,52
52
52
52
52
52
52
52
52
52
52,53
52
52
Goes to page 52
FERRITE
1206
21
21
0.1uF 16V C492
21
50V-10%
1000pF
1
2
1
CB678
2
3
4
95144XL
Blank p/n 4F148 Jaguar Prog p/n W1123
= GPIO not available on Zircon-Lite = Extra GPIO
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
NC_VID_LTCH NC_VID_DATA
NC_BMC_152
NC_BMC_153
150
GPIO44
151
GPIO45
152
GPIO46
153
GPIO47
ZIRCON LH1
SUB*_9C014
633MY IS ZIRCON LH1 9C014 IS ZIRCON LITE
RDY/GPIO21 CS0/GPIO22 CS1/GPIO23 CS2/GPIO24 CS3/GPIO25
142 144 145 146 147
HOST_SER_CTSB BMC_RAW_SRCS
BMC_EXGPCS
NC_BMC_146
NC_BMC_147
TITLE
DWG NO.
44,53
51
51
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
4
A02
51 OF 63
A B
DC
Page 52
B D
CA
LM_X04--83008 sub for p/n consolidation LM_X05--83009 sub for p/n consolidation
52,57
SRAM_VCC
1
2
SD_X04 -- EMP deleted
+3.3V_AUX
14
51,52
52
BMC_BLE SRAM_CS
9
10
74VHC32
Jaguar 2.0 Change Depop U151 for cost-savings
Jaguar 2.0 Change
+3.3V_AUX
Depop U151 for cost-savings
14
52
51,52
SRAM_CS BMC_BHE
12 13
74VHC32
8
NP*
11
NP*
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51-53
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51-53
51,52
51,52
51,52
51,52
51,52
51,52
BMC_RD BMC_WR
BMC_RD BMC_WR
BMC_A5 BMC_A4 BMC_A3 BMC_A2 BMC_A15 BMC_A14 BMC_A13 BMC_A17 BMC_A12 BMC_A11 BMC_A10 BMC_A9 BMC_A16 BMC_A1 BMC_A8 BMC_A7 BMC_A6
BMC_A5 BMC_A4 BMC_A3 BMC_A2 BMC_A15 BMC_A14 BMC_A13 BMC_A17 BMC_A12 BMC_A11 BMC_A10 BMC_A9 BMC_A16 BMC_A1 BMC_A8 BMC_A7 BMC_A6
1 2 3
4 13 14 15 16 17 18 19 20 21 29 30 31 32
5 28 12
NP*
1
2
3
4 13 14 15 16 17 18 19 20 21 29 30 31 32
5 28 12
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16
CS OE WE
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16
CS OE WE
128Kx8
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6 D7
8 24
6 7 10 11 22 23 26 27
9 25
8 24
6 7 10 11 22 23 26 27
9 25
SRAM_VCC
BMC_D2 BMC_D3 BMC_D4 BMC_D5 BMC_D6 BMC_D7 BMC_D0 BMC_D1
SRAM_VCC
BMC_D14 BMC_D15 BMC_D11 BMC_D10 BMC_D8 BMC_D9 BMC_D13 BMC_D12
52,57
SRAM
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
rspn
52,57
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
KLM_X04 -- CHANGED FROM 5E049 TO 17MEY
SRAM_VCC
0.1uF 16V CB684
21
ROOM=SRAM
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51-53
51,52
51,52
51,52
51,52
52,57
0.1uF 16V CB682
1 2
52
BMC_A1 BMC_A2 BMC_A3 BMC_A4 BMC_A5 BMC_A6 BMC_A7 BMC_A8 BMC_A9 BMC_A10 BMC_A11 BMC_A12 BMC_A13 BMC_A14 BMC_A15 BMC_A16
SRAM_CS BMC_BLE BMC_BHE BMC_RD BMC_WR
5
44 43 42 27 26 25 24 21 20 19 18
39 40 41 17
A0
4
A1
3
A2
2
A3
1
A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
6
CS BLE BHE OE WE
VDD1 VDD2
VSS1 VSS2
I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8
I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15
SRAM,64kx16
SUB*_17MEY
SIGNAL=BMC_A17;22 SIGNAL=~BMC_RAW_FLCS;23
33 11
12 34
7 8 9 10 13 14 15 16 29 30 31 32 35 36 37 38
BMC_D0 BMC_D1 BMC_D2 BMC_D3 BMC_D4 BMC_D5 BMC_D6 BMC_D7 BMC_D8 BMC_D9 BMC_D10 BMC_D11 BMC_D12 BMC_D13 BMC_D14 BMC_D15
0.1uF 16V
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
1 2
CB723
10V-10%
1uF
SUB*_83008
17MEY is StdPwr 64kx16 3C373 is LowPwr 64kx16 5E049 is StdPwr 256kx16
1 2
CB680
22uF 6.3V
CB683
21
SUB*_83009
1
2
128Kx8
NP*
SRAM Chip Select and Vcc Generation
2N7002
Q44
SRAM_VCC
D 3
20K-5%
21
NP*
RB467
SRAM_CS
53,54
51
BMC_SRCS
NP*
52,57
G
1
S 2
52
9,51-54,59,60
P3V3AUX_DIRECT
LM_X04--83008 sub for p/n consolidation
3
Rear Cyclops
output impedance should be around 40ohm ( 5 - 3.8 ) / ( 40 + Rblue ) = .020 / 3 -> Rblue= 140 ( 5 - 1.85 ) / ( 40 + Ramber ) = .020 / 3 -> Ramber= 433
1 2
8.2K-5% 8.2K-5% R5
51
RCYC_BLUE
+5V_AUX
1412U1
13
74VHCT04
142U1
1
74VHCT04
144U1
3
74VHCT04
NET_PHYSICAL_TYPE=20MIL NET_PHYSICAL_TYPE=20MIL NET_PHYSICAL_TYPE=20MIL
1 2
75-1%
1 2
75-1%
1 2
75-1%
R3
R7
R10
+5V_AUX
0.1uF 16V
NET_PHYSICAL_TYPE=20MIL
NET_PHYSICAL_TYPE=20MIL
R16
1 2
20.5 Ohm-1%
1 2
FLASH
8.2K-5% RB486
1 2
8.2K-5% RB485
NP*
0.1uF 16V CB685
1 2
10V-10%
1uF
1 2
CB721
12
BMC_FLCS
51
51,52
51,52
41,51,53
1 2
C2
9,51-54,59,60
P3V3AUX_DIRECT
51
FLASH_WP
BMC_RD BMC_WR
BMC_RESET
RB1016
1 2
RB448
Blue: Vf=3.80 @ 20mA -> Rf=190
Amber: Vf=1.85 @ 20mA -> Rf=92.5
CYCLOPS
1 2 3
POCKET SHR
Amber
51,53
53,56,57
3.3VAUX_PWRGOOD
VBAT
NET_PHYSICAL_TYPE=30
ROOM=SRAM
Q51
21
SD_X06 -- added write-protect
8 567
SUB*_7K141
NET_PHYSICAL_TYPE=30
22uF 6.3V
SRAM_VCC
52,57
4
D13
123
SI4435DY
NP*
31
NP*
CB719
21
SUB*_83009 LM_X05--83009 sub for p/n consolidation
2 1
8.2K-5%
RB1015
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51-53
51,52
51
BMC_A1 BMC_A2 BMC_A3 BMC_A4 BMC_A5 BMC_A6 BMC_A7 BMC_A8 BMC_A9 BMC_A10 BMC_A11 BMC_A12 BMC_A13 BMC_A14 BMC_A15 BMC_A16 BMC_A17 BMC_A18
26
CE
28
OE
11
WE
47
12
RP
14
WP
25
A0
24
A1
23
A2
22
A3
21
A4
20
A5
19
A6
18
A7
8
A8
7
A9
6
A10
5
A11
4
A12
3
A13
2
A14
1
A15
48
A16
17 46
A17 VSS2
VCC
VPP
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9
37
13
29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45
27
BMC_D0 BMC_D1 BMC_D2 BMC_D3 BMC_D4 BMC_D5 BMC_D6 BMC_D7 BMC_D8 BMC_D9 BMC_D10 BMC_D11 BMC_D12 BMC_D13 BMC_D14 BMC_D15
SUB*_83008
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
51,52
3
4
51
RCYC_AMBER
R9
21
146U1
5
74VHCT04
R13
1 2
365-1%
R17
1 2
20.5 Ohm-1%
NET_PHYSICAL_TYPE=20MIL
ROOM=FLASH
Jaguar Prog p/n = 008WG Blank 512kx16 p/n = 5E001 Blank 256kx16 p/n = 34WGU
28F400BWG-90
SUB*_008WG
SIGNAL=BMC_A19;16
4
COMPUTER
148U1
9
R15
1 2
CORPORATION
NET_PHYSICAL_TYPE=20MIL
365-1%
AUSTIN,TEXAS
74VHCT04
1411U1
R12
TITLE
SCHEM,PLN,PE4600,2P
10
74VHCT04
NET_PHYSICAL_TYPE=20MIL NET_PHYSICAL_TYPE=20MIL NET_PHYSICAL_TYPE=20MIL
1 2
365-1%
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
12/5/2003
A02
SHEET
52 OF 63
DC
A B
Page 53
B D
CA
1
2
EMP/COM REDIRECT
Host
44,51
44
44,51
44
44,51
44
44,51
+3.3V_AUX
EMP_EN
51
PSUPPLY_PWRGOOD_NEG
61
U53
14
1
VHC14
44
2
BMC
UART 1 UART 0
UART
(CLPD)
Inside CPLD
COM 2 COM 2
QS
+5V_AUX
HOST_SER_SOUTB HOST_SER_DTRB HOST_SER_RTSB HOST_SER_DCDB HOST_SER_SINB HOST_SER_DSRB HOST_SER_CTSB HOST_SER_RIB
1 2
NP*
R1003
8.2K-5% R1004
14
1 2
74VHC32
3 6
15K-5%
U80
3
EMP_EN_AUTO
15K-5%
72
R1005
NP*
1 8
15K-5%
NC_SS_10 NC_SS_11
21
8.2K-5%
1 2
R1006
EMP_EN_AUTO_OR_DIS
Inside
CPLD
U17
24
VCC
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8 A9 B9
11
A10
13
BIASV
ON GND
5C6800 QSOP24
23
B1
22
B2
21
B3
20
B4
19
B5
18
B6
17
B7
16
B8
1510 14
B10
121
SUB*_8174U
R57
1 2
8.2K-5%
SER_SOUTB SER_DTRB SER_RTSB SER_DCDB SER_SINB SER_DSRB SER_CTSB
SER_RIB NC_SS_15 NC_SS_14
45,51
45
45,51
45,51
45,51
45
45,51
45,51
LOG/FRU SEEPROM
2M021 is programmed p/n for generic FRU
P3V3AUX_DIRECT
VCC
GND2
24C02
SDA
8 7
5
0.1uF 16V 1 2
220
2 1
9,51-54,59,60
1
A0
2
A1
3 6
A2 SCL
4
GND1
SUB*_2M021
PLANAR TEMPERATURE
6,13,39,53,57
6,13,39,53,57
ENV_SEG0_SDA
ENV_SEG0_SCL
NC_BTI
1
SDA
2
SCL
3
OS
4
GND
SUB*_0C085
subbed to 3.3v flavor
ENV_SEG1_SCL ENV_SEG1_SDA
8
VCC
7
A0
6
A1
5
A2
53
53
+3.3V
25,61
CMOS_PSUPPLY_PWRGOOD
46,51,53
46,51,53
IPMB_SDA
IPMB_SCL
1 2
74VHC08
51
51
51
51
51
+3.3V
143U143
100-1%
Q48
2N7002
D 3
Jaguar 2.0 - X02 - Isolate Backplane I2C
R1104
21
8.2K-5%
21
1
D 3
100-1%
R1111
G
S 2
Q45
2N7002
21
1
R1110
G
S 2
50V-10%
1000pF
2 1
C1010
C1009
1000pF
50V-10%
SUB=NP*
21
SUB=NP*
JTAG PORT
9,51-54,59,60
P3V3AUX_DIRECT
1 8
4.7K-5% RN149
4.7K-5%
4.7K-5%
4 5
RN149
2 7
RN149
4.7K-5%
3 6
RN149
1 2
21
1 3 5 7
NP0
+3.3V
21
R1105
J5
8.2K-5%
2 4 6 8 109 1211 1413
21
R1106
BMC_RESET
8.2K-5%
EXT_IPMB_SDA
EXT_IPMB_SCL
57
57
41,51,52
51,52
51
ZIRCON STRAPPINGS & JUMPERS
P3V3AUX_DIRECT
1 2
NP0
NP*
ICE_DBG
NP*
8.2K-5%
1 2
8.2K-5%
21
21
BMC_A16
ICE_DBG
9,51-54,59,60
1= EXT FLASH MODE
IPMB
9,51-54,59,60
46,51,53
46,51,53
IPMB_SDA
IPMB_SCL
P3V3AUX_DIRECT
8.2K-5%
21
8.2K-5%
1 2
RB471
SHROUDED
8.2K-5%
FL_MODE
1 2 3
2.5mm
21
1
2
3
0xx
1xx
21
ENV I2C SEGMENTS
General Organization
x00 x10 x11
CPU 1&2 MEM A Ctrl Pnl CPU Brd
MEM B I/O Brd HP Ctrl
SEL
x01
PDB PS's
SD_X05 -- added ability to disable EMP serial permanently
Jaguar 2.0 change: 2.5V trace entering gate of Qb14,15 is
DIMMs
Crd A
REMC's
DIMMs
Crd B
REMC's
6,13,39,53,57
6,13,39,53,57
coupling 600MHz noise, add C 0.01uF. Placed CB1010 in middle of trace going to gates of QB14 and QB15
+2.5V
1 2
CB1010
8.2K-5% R397
8.2K-5%
21
ENV_SEG0_SCL
ENV_SEG0_SDA
NP*
.01uF 50V
2N7002
G
1
D 3
NP*
S 2
2N7002
G
1
12
D 3
S 2
RB247
ENV_SEG0_25V_SCL
ENV_SEG0_25V_SDA
11,15,17,30
11,15,17,30
52,53,56,57
52-54
VBAT
BEZEL_INTRUDED
51
BZL_PRES_VBAT
57
To reset intrusdion detect, drive High value. During all other times, signal shall be tri-state by uC.
1 2
1 2
NP*
1K-5%
21
S 2
50V-10%
1000pF
1
2
G
Chassis Intrusion DetectBezel Intrusion Detect
51
VBAT
INTRUDED
S 2
INTRUSION
1 2
POCKET SHR
G
1
INTRUSION_CONN
2N7002
Q56
1 2
1K-5%
14
D 3
8 9
74VHC02
1 2
14
5 6
4
0ohm's allow use of
polarity switch
74VHC02
1 2
1K-5%
50V-10%
1000pF
1
INTR_CONN_RC
2
10
1 2
NP*
21
11 12
INTR_POLARITY
Q15
D 3
14
74VHC02
+5V_AUX
2N7002
13
G
1
S
INTRUSION_VAUX
2
This signal gates PME#. It is not the true Intrusion signal.
0.1uF 16V 1 2
44
3
52,53,56,57
2N7002
1
Q29
D 3
14 U137
8 9
1K-5%
10
1 2
11 12
74VHC02
14
13
14 U137
2 3
74VHC02
1
1 2
To reset intrusdion detect, drive High value. During all other times, signal shall be tri-state by uC.
0.1uF 16V
52-54
74VHC02
Open (1)
Shorted (0)
= Not Intruded = Intruded
51,53
51,53
51,53
51,53
I2C_MUX_SEL0 I2C_MUX_SEL1 I2C_MUX_SEL2
ENV_SCL
+5V_AUX
16
I2C
+3.3V
+5V_AUX
9,51-54,59,60
21
220
S0 S1 S2
I0 I1 I2 I3 I4 I5 I6 I7
7
E
11 10 9
4 3 2 1 15 14 13 12
VCC
5
Y
P3V3AUX_DIRECT
3.9K-5% R1062
12
3.9K-5% R1063
12
R1084
12
2.2K-5% R1073
12
3.9K-5% R1066
12
3.9K-5% R1067
12
3.9K-5% R1068
12
2.2K-5% R1074
12
ENV_SEG5_I960_SCL
NC_ENV_SEG6_SCL
51,53
51,53
Stuff with Samtec TSM-104-xx-xx-DV
ENV_SEG0_SCL ENV_SEG1_SCL ENV_SEG2_SCL ENV_SEG3_SCL ENV_SEG4_SCL
ENV_SEG7_SCL
ENV_SCL ENV_SDA
1
1
3
3
5 6
5 6
TSM 2X4 SMT HDR
6,13,39,53,57
53
61
13,39
14,55
24-26,39
14,39
2 4
87
2 4
87
NP*
I2C_MUX_SEL0 I2C_MUX_SEL1 I2C_MUX_SEL2
51,53
51,53
51,53
+5V_AUX
51
VFPCP_OSC
D21
BAR43
31
1 2
560
1 2
1000pF
50V-10%
CHARGE PUMP
21
560
D20
BAR43
Max Ioh= 2.63 @ Vdd-0.4V Max Iol= 4.5 @ 0.4V
todo update calcs
+3.3V_AUX
31
0.1uF 16V
52-54
BAR43
DB1007
31
21
CB1007
1 2
0.1uF 16V
D
Q52
2N7002
3
1 2
1M-5%
RB1102
2.2K-5% RB482
2.63 = (3.3-0.4)/R
--> R >= (3.3-0.4)/2.63m >= 1100
R:=2k, C:=0.2uF --> 4t= 4*2k*0.2u= 1.6mS
min VFPCP= 5+3.3-2*0.4-2*0.3= 6.9V max VFPCP= 5+3.3-2*0.1-2*0.24= 7.6V
min charge time= 1uf/0.2uf*2*1.6m= 16mS
4
51,53
ENV_SDA
+5V_AUX
16
QS3251
9,51-54,59,60
P3V3AUX_DIRECT
+5V_AUX
*Above and Below
+3.3V
51-53
3.3VAUX_PWRGOOD
* Jaguar 2.0 Change: I2C violation on rise time, changed
R-packs to discrete resistors of lower value. Changed 3.3V to 5V_AUX pullup on Env Seg 2
6,13,39,53,57
ENV_SEG1_SDA ENV_SEG2_SDA ENV_SEG3_SDA ENV_SEG4_SDA
ENV_SEG7_SDA
53
61
13,39
14,55
24-26,39
14,39
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
S0 S1 S2
I0 I1 I2 I3 I4 I5 I6 I7
7
E
11
3.9K-5%
3.9K-5%
R106412R1065
2.2K-5%
R1085
3.9K-5%
R1075
3.9K-5%
R1069
3.9K-5%
R1070
2.2K-5%
R1071
R1076
10 9
12
4
12
12
12
12
12
12
ENV_SEG0_SDA
3 2 1 15 14 13
ENV_SEG5_I960_SDA
NC_ENV_SEG6_SDA
12
VCC
5
Y
QS3251
1
G
S
2
50,56,57,60
3.3VAUX_PWRGOOD
Q55
2N7002
21
3.3VAUX_PWRGOOD
D
3
51-53
4
1
G
S
2
TITLE
SCHEM,PLN,PE4600,2P
DWG NO.
H3007
12/5/2003
COMPUTER CORPORATION
AUSTIN,TEXAS
A02
SHEET
53 OF 63
A B
DC
Page 54
B D
CA
1
NC_RN8073_3
RN155
3 6
8.2K-5% RN155
4 5
8.2K-5%
NC_RN8073_6
NC_RN8073_5NC_RN8073_4
RN151
3 6
1.5K-5%
RN156
1.5K-5%
NC_RN7047_6
NC_RN8071_554
0 1 2 3 4 5 6 7
00
Vcore Vcore
5V
3.3V Vbat
2.5V
2.5V Reference
01 10 11
GB 2.5V12V GB 1.8V
MCA 2.5V MCB 2.5V
MCA VTT MCB VTT
SD_X06 flipped res and fet
52-54
56
57
3.01K-1%
52-54
ESM_VBAT
21
NC_RN142_8 8 1
Q57
2N7002
D 3
Q53
2N7002
G
1
D 3
1
S 2
RN151
1.5K-5%
G
S 2
VCC
+3.3V
+2.5V
NC_RN142_1
VCORE
1K-1%
RN151
7 2
BMC_A2D_3.3VFP
51
0.1uF 16V
0.1uF 16V
21
Factor Nominal V
1/5 1/2 3/4 1/1
0.1uF 16V
1 2
0.1uF 16V
CB658
21
0.1uF 16V
1 2
CB657
0.1uF 16V
CB681
21
0.1uF 16V
1 2
CB715
38.6mV
23.0mV
1 2
0.1uF 16V 0.1uF 16V
CB708
1 2
CB659
43.9mV
17.6mV
8.8mV 8.8mV
0.1uF 16V
CB701
21
Total ErrR Err A2D Err
0.1uF 16V
1 2
CB695
82.5mV
40.6mV
24.1mV11.7mV12.4mV
CB703
21
0.1uF 16V
0.1uF 16V
CB700
21
1 2
CB707
A2D_VCORE_1
51
1
1.5K-5%
1 2
A2D_ROMB_BAT
51
1K-1%
21
1 2
RB430
1 2
A2D_12
54
3.01K-1% 1K-1%
RB423
1 2
21
54
1K-1%1K-1%
RB468
21
1 2
A2D_3_3
51
1K-1% 3.01K-1%
RB484
1 2
10K-1%
RN154
1.5K-5%
81
A2D_BAT
51
RN154
2 7
A2D_2_5
51
1.5K-5%
2
3
FAN CONNECTORS & SPEED CONTROL
9,51-54,59,60
FAN_GRN_LED_1
51
FAN_AMB_LED_1
51
FAN_GRN_LED_2
51
FAN_AMB_LED_2
51
FAN_GRN_LED_3
51
FAN_AMB_LED_3
51
FAN_GRN_LED_4
51
FAN_AMB_LED_4
51
FAN_GRN_LED_5
51
FAN_AMB_LED_5
51
FAN_GRN_LED_6
51
FAN_AMB_LED_6
51
SD_X05 -- changed 12V to FAN_12V
FAN_12V
59
FANFAST_5V_1
54
FAN_RPM_RAW_1
54
FAN_GRN_LED_DRV_1
54
FAN_AMB_LED_DRV_1
54
FAN_RPM_RAW_2
54
FAN_GRN_LED_DRV_2
54
FAN_AMB_LED_DRV_2
54
SUB=SUB*_254KH
P3V3AUX_DIRECT
14
1
74VHC04
14
5
74VHC04
14
74VHC04
14
1
74VHC04
14
5
74VHC04
14
11
74VHC04
1 2 3 4 5 6 7 8
9 10 11 12
2
6
10
13
2
6
10
13
REAR_FANS
1 2 3 4 5 6 7 8 9 10 11 12
2X12 WIRE TO BOARD HEADER
14
3
74VHC04
14
9
74VHC04
14
74VHC04
14
3
74VHC04
14
9
74VHC04
14
74VHC04
13 14 15 16 17 18 19 20 21 22 23 24
4
8
12
4
8
12
13 14 15 16 17 18 19 20 21 22 23 24
RN34
8 1
150-5%
RN34
150-5%
RN34
6 3
150-5%
RN34
150-5%
RN37
150-5%
RN37
7 2
150-5%
RN37
150-5%
RN37
5 4
150-5%
RN136
150-5%
RN136
7 2
150-5%
RN136
150-5%
RN136
5 4
150-5%
FAN_GRN_LED_DRV_3 FAN_AMB_LED_DRV_3
FAN_GRN_LED_DRV_4 FAN_AMB_LED_DRV_4
FAN_GRN_LED_DRV_1
SUB*_8D460
27
FAN_AMB_LED_DRV_1
SUB*_8D460
FAN_GRN_LED_DRV_2
SUB*_8D460
45
FAN_AMB_LED_DRV_2
SUB*_8D460
18
FAN_GRN_LED_DRV_3
SUB*_8D460
FAN_AMB_LED_DRV_3
SUB*_8D460
36
FAN_GRN_LED_DRV_4
SUB*_8D460
FAN_AMB_LED_DRV_4
SUB*_8D460
18
FAN_GRN_LED_DRV_5
SUB*_8D460
FAN_AMB_LED_DRV_5
SUB*_8D460
36
FAN_GRN_LED_DRV_6
SUB*_8D460
FAN_AMB_LED_DRV_6
SUB*_8D460
FAN_RPM_RAW_3
FAN_RPM_RAW_4
Subbed to LCX/TSSOP flavor!!!
Must be able to drive 24mA
R-Pak's subbed to 130
54
54
54
54
54
54
54
54
54
54
54
54
54
54
57
57
57
57
U29 U29 U29
SUB*_1442V PKG_TYPE=TSSOP14 SUB*_1442V PKG_TYPE=TSSOP14 SUB*_1442V PKG_TYPE=TSSOP14 SUB*_1442V PKG_TYPE=TSSOP14 SUB*_1442V PKG_TYPE=TSSOP14 SUB*_1442V PKG_TYPE=TSSOP14
SUB*_1442V PKG_TYPE=TSSOP1411
SUB*_1442V PKG_TYPE=TSSOP14 SUB*_1442V PKG_TYPE=TSSOP14 SUB*_1442V PKG_TYPE=TSSOP14 SUB*_1442V PKG_TYPE=TSSOP14 SUB*_1442V PKG_TYPE=TSSOP14
FAN_RPM_RAW_1
54
FAN_RPM_RAW_2
54
FAN_RPM_RAW_3
54
FAN_RPM_RAW_4
54
U29 U29 U29
VCC
4 5
RN141
VCC
8.2K-5%8.2K-5% RN141
63
VCC
2 7
8.2K-5% RN141
VCC
8.2K-5% RN141
81
VCC
8.2K-5% RN155
RN142
4 5
1.5K-5%
RN142
3 6
1.5K-5%
RN142
1.5K-5%
RN142
1.5K-5%
RN154
23
GB_2.5V_FP
63
A2D_2_5_GB
54
1.5K-5%
RN154
22,23
GB_1.8V_FP
4 5
A2D_1_8_GB
54
2
1.5K-5%
RN153
13
VCC25_MECA
1 8
A2D_2_5_MEM_A
54
1.5K-5%
VCC
RN153
1K-5%
1 2
R77
1K-5%
13
VTT_SSTL_A
2 7
1.5K-5%
A2D_DVTT_MEM_A
54
RN153
31
D1001
BAR43
51
51
FANFAST_1
FANFAST_2
U51
SIGNAL=P5VAUX;14
U51
SIGNAL=P5VAUX;14
21
43
FANFAST_5V_1
54
14
VCC25_MECB
3 6
1.5K-5%
RN153
14
VTT_SSTL_B
4 5
1.5K-5%
65
FANFAST_5V_2
57
0.1uF 16V
0.1uF 16V
21
0.1uF 16V
1 2
0.1uF 16V
21
1 2
10M 5% RESISTOR
0.1uF 16V
0.1uF 16V
CB679
21
SUB*_6023T
0.1uF 16V
1 2
1 2
0.1uF 16V0.1uF 16V
1 2
0.1uF 16V
21
0.1uF 16V
1 2
0.1uF 16V
21
0.1uF 16V
21
1 2
A01: C512 WAS CHANGED TO A 10M OHM RESISTOR (6023T)
A2D_2_5_MEM_B
A2D_DVTT_MEM_B
54
54
SO THAT THE BATTERY VOLTAGE A2D_BAT WOULD DRAIN
9,51-54,59,60
10
A
9
B
12
X0
14
X1
15
X2
11
X3
1
Y0
5
Y1
2
Y2
4
Y3
6
INH
AND ESM COULD SENSE A LOW BATTERY VOLTAGE
P3V3AUX_DIRECT
LM_X04--83008 sub for p/n consolidation
VDD
16
10V-10%
13
X
SUB*_83008
A2D_MUX2
21
1uF
51
SUB*_1X621
VEE
VSS
3
Y
7
8
A2D_MUX3
51
14052BD
KLM_X04 -- WE DEPOPPED CB689 ON X03
9,51-54,59,60
P3V3AUX_DIRECT
220
RB469
21
D16
COMPONENT ENGINEER.
PART NOT TO BE USED
1 ON NEW DESIGNES,
PLEASE CONTACT
6.3V-10% 1 2
4.7uF
6.3V-10%
CB697
8
TL431ACD
7
6
3
2
Need >1mA
3.3V-2.5V= 0.8V
0.8V / 1mA <= 800ohm
4.7uF
21
6.3V-10%
4.7uF
1 2
A2D_2_5_REF
6.3V-10%
4.7uF
21
3
51
50V-20%
.01UF
D1002
1 3
50V-20%
.01UF
31
D1003
72
50V-20%
.01UF
D1004
1 3
81
50V-20%
.01UF
21
LM_X04--Sub for part consolidation
SUB*_78020
1 2
CB668
SUB*_78020
CB670
21
SUB*_78020
1 2
CB669
51
RN156
1.5K-5%
FAN_MUX_SEL
NC_U404_14 NC_U404_13
AMUX_SEL0
51
AMUX_SEL1
51
+5V_AUX
63
15
11 10 14 13
E
1
S
2
0A
3
1A
5
0B
6
1B 0C 1C 0D 1D
VCC
YA
YB
YC
YD
16
4
7
9
12
FAN1_RPM
FAN2_RPM
FAN3_RPM
NC_U404_12
51
51
51
A2D_12
54
A2D_2_5_GB
54
A2D_2_5_MEM_A
54
A2D_DVTT_MEM_A
54
54
A2D_1_8_GB
54
A2D_2_5_MEM_B
54
A2D_DVTT_MEM_B
54
RN151
4 5
1.5K-5%
QS3257
SD_X04 -- Added caps to get the reg out of the oscillation zone
31
SUB*_78020
4
Front fans (Zone2) are driven through CtrlPnl
FAN_RPM_RAW_5
57
FAN_RPM_RAW_6
57
81
VCC
8.2K-5% RN155
72
RN156
1.5K-5%
RN156
1.5K-5%
D1005
81
50V-20%
.01UF
1 2
CB671
SD_X06 -- added diodes to protect against 12v spikes from fan
4
SUB*_78020
D1006
BAR43 BAR43 BAR43 BAR43 BAR43
1 3
72
TITLE
50V-20%
.01UF
1 2
CB672
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
SUB*_78020
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
COMPUTER CORPORATION
AUSTIN,TEXAS
A02
SHEET
54 OF 6312/5/2003
A B
DC
Page 55
B D
CA
+3.3V
12-5-2003_10:51
1
2
3
19,55
21,55
32,55
34,55
36,55
38,55
XCAP_STRONGPU
55
S2_XCAP
S3_XCAP
S4_XCAP
S5_XCAP
S6_XCAP
S7_XCAP
+3.3V
1K-5%
21
74VHC125
21
1K-5%
8
14
9
10
74VHC125
21
1K-5%
11
14
12
13
RB4
74VHC125
1 2
1K-5%
14
3
2
1
RB9
74VHC125
1 2
1K-5%
14
6
5
4
74VHC125
21
1K-5%
8
14
9
10
RB2
74VHC125
1 2
1K-5%
11
14
12
13
XCap Detection
1K-5%
1 2
RB3
56K-5%
56K-5%
1 2
56K-5%
RB8
1 2
56K-5%
56K-5%
RB1
1 2
56K-5%
+3.3V
21
21
21
38,55
36,55
34,55
32,55
21,55
19,55
55
55
38
38
55
36
36
2.2K-5%
55
55
34
34
55
32
32
2.2K-5%
55
55
21
21
55
19
19
2.2K-5%
+3.3V
16
VCC
INFO_LOAD
1 2
2.2K-5%
RB5
INFO_LOAD
RB7
21
INFO_LOAD
2.2K-5%
RB6
21
1 2
2.2K-5% RB10
1 2
55
55
55
INFO_CLK
+3.3V
INFO_CLK
+3.3V
INFO_CLK
1
SHFTLD
11
A
12
B
13
C
14
D
3
E
4
F
5
G
6
H
10
SER
15
CLKINHBT
2
CLK
8
GND
16
VCC
1
SHFTLD
11
A
12
B
13
C
14
D
3
E
4
F
5
G
6
H
10
SER
15
CLKINHBT
2
CLK
8
GND
16
VCC
1
SHFTLD
11
A
12
B
13
C
14
D
3
E
4
F
5
G
6
H
10
SER
15
CLKINHBT
2
CLK
8
GND
LM_X05--0J204 is p/n for LV165
74HC165
74HC165
LM_X05--0J204 is p/n for LV165
21
74HC165
ROOM=HPC_SPPRT
Card Strappings
0 ohm to GND
10k ohm to GND
U7
9
QH
7
QH
SUB*_0J204
S67_INFO NC_PRES_17
U5
QH QH
9 7
S45_INFO NC_PRES_27
LM_X05--0J204 is p/n for LV165
SUB*_0J204
U3
9
QH
7
QH
SUB*_0J204
S23_INFO NC_PRES_37
PCI PCI-X 66MHz
Floating PCI-X 133MHz
55
55
55
55
55
55
55
55
55
55
55
40,55
40,55
40,55
40,55
S2_GREEN__LED_DATA
S2_AMBER__LED_LOAD
S3_GREEN__LED_CLK
S3_AMBER
S4_GREEN
S4_AMBER
S5_GREEN
S5_AMBER
S6_GREEN
S6_AMBER
S7_GREEN
S7_AMBER
U14
1 2
U14
65
U14
11 10
U13
21
U13
5 6
U13
1011
U14
43
U14
9 8
U14
1213
U13
3 4
U13
89
U13
13 12
DHPI_1
BICOLOR
SG
3 4
Y
BICOLOR
SG
Y
1 2
DHPO_1
DHPI_2
BICOLOR
SG
3 4
Y
BICOLOR
SG
Y
1 2
DHPO_2
DHPI_3
BICOLOR
SG
3 4
Y
BICOLOR
SG
Y
1 2
DHPO_3
DHPI_4
BICOLOR
SG
3 4
Y
BICOLOR
SG
Y
1 2
DHPO_4
DHPI_5
BICOLOR
SG
3 4
Y
BICOLOR
SG
Y
1 2
DHPO_5
DHPI_6
BICOLOR
SG
3 4
Y
BICOLOR
SG
Y
1 2
DHPO_6
SUB=SUB*_5442P
21
43
SUB=SUB*_5442P
SUB=SUB*_5442P
21
43
SUB=SUB*_5442P
SUB=SUB*_5442P
21
43
SUB=SUB*_5442P
SUB=SUB*_5442P
21
43
SUB=SUB*_5442P
SUB=SUB*_5442P
21
43
SUB=SUB*_5442P
SUB=SUB*_5442P
21
43
SUB=SUB*_5442P
+3.3V
+3.3V
0.1uF 16V 1 2
CB2
+3.3V
0.1uF 16V CB7
21
0.1uF 16V 1 2
CB1
0.1uF 16V CB35
21
0.1uF 16V 1 2
C49
16,55
16,55
16,55
S2_QS_EN
S3_QS_EN
S4_QS_EN
12
+3.3V
12
R23
8.2K-5%
12
8.2K-5%
12
RB3112RB24
8.2K-5%
8.2K-5%
12
R21
8.2K-5%
8.2K-5%
1
2 3 4
220
1
RN2
2 3 4
220
8 7 6 5
8
7 6 5
SW_S1
55
1
2 3 4
220
1
RN3
2 3 4
220
8 7 6 5
8 7 6 5
55
55
55
55
55
1
2
PUSH BUTTON
SW_S2
1
2
PUSH BUTTON
3
SUB*_83008
4
10V-10%
1uF
10V-10%
CB4
1uF
1 2
10V-10%
CB8
1uF
21
CB3
21
SUB*_83008
10V-10%
1uF
1 2
10V-10%
C1
1uF
21
16,55
S5_QS_EN
3
SUB*_83008
4
LM_X04--83008 sub for p/n consolidation
SUB*_83008
SUB*_83008
16,55
S6_QS_EN
SW_S3
1
1
2 3 4
220
8 7 6 5
2
PUSH BUTTON
SW_S4
1
3
16,55
S7_QS_EN
4
+3.3V
3
KLM_X04 -- CHANGED POP OF RB4 & RB5
1
RN5
2 3 4
220
8 7 6 5
2
PUSH BUTTON
SW_S5
1
2
1
2 3 4
220
8 7 6 5
PUSH BUTTON
SW_S6
1
2
1
RN7
2 3 4
220
1
2 3 4
220
1
RN8
2 3 4
220
1
2 3 4
220
1
2 3 4
220
8 7
PUSH BUTTON 6 5
8 7 6 5
8 7 6 5
Part of IRQ Router
8 7 6 5
8 7
41,55
XLNX_INIT 6 5
+3.3V
4
3
4
3
4
+3.3V
21
39,40
11,39,51
11,39
PCIX4_SEG_RST
30
PCIX4_HP_REQ
30
PCIX4_XCAP1
30
PCIX4_HP_GNT
30
PCIX4_XCAP2
30
PCIX4_M66EN
30
31
31
32
33
33
34
30
17
17
17
17
17
17
18
18
19
20
20
21
S4_PCIRST S4_QS_EN S4_PWR_EN S4_PWR_FAULT S4_M66EN S5_PCIRST S5_QS_EN S5_PWR_EN S5_PWR_FAULT S5_M66EN PCIX5_PCIRESET
PCIX3_SEG_RST PCIX3_HP_REQ PCIX3_HP_GNT PCIX3_M66EN PCIX3_XCAP1 PCIX3_XCAP2 S2_PCIRST
S2_QS_EN S2_PWR_EN S2_PWR_FAULT S2_M66EN S3_PCIRST S3_QS_EN S3_PWR_EN S3_PWR_FAULT S3_M66EN
32,55
16,55
34,55
16,55
PIRQ_LTCH
GPE_CMIC_FATAL GPE_CMIC_ALERT
19,55
16,55
21,55
16,55
+3.3V
8.2K-5% RB287
21
NC_XLNX_22
1 2
8.2K-5% R428
+3.3V
12
VCC_12
25
VCC_25
37
VCC_37
51
VCC_51
63
VCC_63
75
VCC_75
89
VCC_89
100
VCC_100
2
I/O_PGCK1_GCK1
3
I/O_3
4
I/O_TDI
5
I/O_TCK
6
I/O_TMS
7
I/O_7
8
I/O_8
9
I/O_9
10
I/O_10
13
I/O_13
14
I/O_14
15
I/O_15
16
I/O_16
17
I/O_17
18
I/O_18
19
I/O_19
20
I/O_20
21
I/O_SGCK2_GCK2
22
NC_M1
27
I/O_PGCK2_GCK3
28
I/O_HDC
29
I/O_29
30
I/O_LDC*
31
I/O_31
32
I/O_32
33
I/O_33
34
I/O_34
35
I/O_35
36
I/O_INIT*
39
I/O_39
40
I/O_40
41
I/O_41
42
I/O_42
43
I/O_43
44
I/O_44
45
I/O_45
46
I/O_46
47
I/O_47
U9
MODE_M0
PROGRAM
I/O_SGCK3_GCK4
I/O_D7
I/O_PGCK3_GCK5
I/O_D6 I/O_56 I/O_D5 I/O_58 I/O_59 I/O_60 I/O_D4 I/O_62 I/O_D3 I/O_66 I/O_67 I/O_D2 I/O_69 I/O_D1 I/O_71
I/O_D0_DIN
I/O_SGCK4_GCK6_DOUT
0_TDO
I/O_78
I/O_PGCK4_GCK7
I/O_CS1
I/O_81 I/O_82 I/O_83 I/O_84 I/O_85 I/O_86 I/O_87 I/O_90 I/O_91 I/O_92 I/O_93 I/O_94 I/O_95 I/O_96 I/O_97 I/O_98
I/O_SGCK1_GCK8
24 50 52 74
48 53 54 55 56 57 58 59 60 61 62 65 66 67 68 69 70 71 72 73 76 78 79 80 81 82 83 84 85 86 87 90 91 92 93 94 95 96 97 98 99
12
PSUPPLY_PWRGOOD
S67_INFO S45_INFO S23_INFO INFO_CLK XLNX_DATA INFO_LOAD XCAP_STRONGPU ENV_SEG4_SDA ENV_SEG4_SCL
PCIX4_PCIRESET
141U15
74VHCT04
144U15
3
74VHCT04
145U15
74VHCT04
1412U15
13
74VHCT04
1411U15
74VHCT04
148U15
9
74VHCT04
R87
XLNX_DONE
XLNX_CCLK
S2_GREEN__LED_DATA S2_AMBER__LED_LOAD
S3_GREEN__LED_CLK
PCIX5_SEG_RST
2
6
10
S3_AMBER S4_GREEN S4_AMBER S5_GREEN S5_AMBER S6_GREEN S6_AMBER S7_GREEN S7_AMBER
PCIX5_HP_REQ PCIX5_HP_GNT
PCIX5_M66EN PCIX5_XCAP1 PCIX5_XCAP2
S6_PCIRST
S6_QS_EN
S6_PWR_EN
S6_PWR_FAULT
S6_M66EN
S7_PCIRST
S7_QS_EN
S7_PWR_EN
S7_PWR_FAULT
S7_M66EN
CK_33M_HPC
.1uF 25V
C1005
21
C1004
21
C1003
21
C1002
21
.1uF 25V.1uF 25V.1uF 25V.1uF 25V.1uF 25V
C1001
21
+3.3V +3.3V
146U22
5
74VHC08
21
41
41,43,51,56,59,61
41
55
55
55
55
55
55
55
55
40,55
40,55
40,55
40,55
55
55
55
55
41,55
55
55
14,53
14,53
30
30
30
30
30
30
36,55
16,55
35
35
36
38,55
16,55
37
37
38
30
4
21
NP*
S2_QS_EN
C1006
143U224
1 2
74VHC08
RB19
21
S3_QS_EN
S4_QS_EN
S5_QS_EN
S6_QS_EN
S7_QS_EN
XLNX_BOOTING
PCIX3_PCIRESET
RB20
1 2
R88
12
18
20
31
33
35
37
PCI_RST_64
17
57,59
1
60
2
3
XCS05XL
SUB*_40YNG
Asserts RST when PSUPPLY_PWRGOOD is deasserted.
Subbed to XCS20XL
1 PCI-X 66 Card
2 PCI-X 66 Cards 56k
2 PCI-X 66 & Jumper
System PU
56k
56k2 PCI-X 66 & Jumper
56k || 1k1 PCI-X 66 Card 56k || 1k2 PCI-X 66 Cards 56k || 1k
.918 .849 .777
.165 .090 .062
Low VHigh V
.902 .822 2.445 - 3.029 .741
.139 .075
0.168 - 0.545
.051
10V-10%
1uF
21
SUB*_83008
LM_X04--83008 sub for p/n consolidation
BLANK P#40YNG
ROOM=HPC
RAID cards must see RST when power is to be removed.
19,55
S2_PCIRST
To PCI Hotplug LED Panel
BLANK P#1455USURFACE MOUNT
+3.3V
VERSION
8.2K-5%
U49
41,55
41,55
41,55
41,55
XLNX_DATA XROM_CCLK XLNX_INIT XROM_DONE
2 3 4
SPARE SO8
NP*
4 4
81 7 6 5
8
VCC
41,55
41,55
41,55
XROM_CCLK XLNX_INIT XROM_DONE
2
CLK
3
OE/RESET
4
CE
U50
CEO VPP GND
1 6 7 5
XC1765D
SUB*_92DYW
12
XLNX_DATA
JAGUAR PROG P#92DYW
VCC+3.3V
1 2
LM_X04--Sub for part consolidation
50V-20%
.01UF
1 2
SUB*_78020
21
NP*
2 1
8.2K-5% R152
41,55
21
If local LEDs are used, this hardware should be depopped
NP*
55
S2_GREEN__LED_DATA
21
330pF 50V
12
NP*
R14
1 2
2201K-5%
C8
NP*
VCC
PCI_LED_PNL
21 3 5
4
6
SHROUDED
NP*
NC_HP_KEY
NP*
330pF 50V
2 1
C3
1 2
NP*
330pF 50V
C4
12
NP*
R6
1K-5%
R8
220
NP*
21,55
32,55
34,55
36,55
38,55
S2_AMBER__LED_LOAD
21
S3_GREEN__LED_CLK
55
55
S3_PCIRST
S4_PCIRST
S5_PCIRST
S6_PCIRST
S7_PCIRST
Hotplug Controller
1 2
2.2K-5%
2.2K-5%
2.2K-5%
21
21
21
2.2K-5%
1 2
2.2K-5%
1 2
2.2K-5%
8196P=blank XC17S20XLPD8C
xxxxx=programmed
1455U=blank AT17C256
92DYW=programmed
XROM_PROGRAM
41
Q18
2N7002
D
3
1
G
S
2
ROOM=XROM
A B
ROOM=BLINKIE_CONN
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DC
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
55 OF 63
Page 56
BATTERY PACK DEPLETION DETECT AND DISCONNECT
B D
CA
12-5-2003_10:51
1
SUB*_5691E
1 2
649K-1% 205K-1%
21
3
4
5
6
+
-
REF
GND
V+
V-
1N914 1K-5%
VCC
D17
31
D24
31
+3.3V
ROOM=RAID_BAT
1
3 1
21
BAR43
D10
RBAT_DSCHRGD
41
+3.3V_AUX
1 2
SUB*_69958
7
MMBZ5234B
8
2
13
D18
50V-20%
.01UF
1
20K-5%
8.2k - 5%
Jaguar 2.0 - X02 - Substituted R581 20k with 8.2k
1 2
LM_X04--Sub for part consolidation
SUB*_78020
2
3
LM_X04--21774 is 15 ohm 1206 resistor per Will's request
16V 10%
1 2
NP*
1 2
330-5%
-20%+80%
1uF 16V
1 2
47K-5%
21
2M-5%
21
21
SUB*_21774
RB436
RB437
RB438
RB442
RB443
RB444
10
1 2
10
10
SUB*_21774
10
1 2
10
10
SUB*_21774
21
21
SUB*_21774
SUB*_21774
21
SUB*_21774
RB439
RB440
RB441
1 2
.01uF 50V
1 2
LM_X04--Changed R516 to 1K at Shawn's request
1 2
68K-5%
22K-5%
1 2
1K-5%
NC_P0
21
SUB*_21774
10
SUB*_21774
10
21
10
SUB*_21774
5
15
1
16
7
10
9 3 4
THI V+ VLIMIT REF TEMP PGM3 PGM2 PGM0 PGM1
21
LINEAR CHARGER
1 2
21
NP*
NP*
1 2
3
S
G
1
1 2
10-5%
RB454
3
S
G
1
10-5%
RB456
21
3
S
G
1
1 2
10-5%
MAX712CSE
MAX921CSA
D
4
20P03
D
4
20P03
20P03
RB455
BATT+
BATT-
RBAT_DCHRG_BATV
Q43
NET_PHYSICAL_TYPE=25MIL
Q41
D
4
Q42
2 1
CMSH1-40
While draining bat
0V here disables 712
14
DRV
2
GND TLO
CC
8
13 6 11
12
-20%+80%
1uF 16V
SD_X04 -- added 805 pads for flexibility
50,53,57,60
68K-5%
3.3VAUX_PWRGOOD
56
RBAT_EN
56
1 2
68K-5%
21
Q1002
2N7002
3
1
G
S
2
Q1003
2N7002
D
1 2
68K-5%
D15
DISCHARGE
100-5%
100-5%
21
NET_PHYSICAL_TYPE=100MIL
NET_PHYSICAL_TYPE=100MIL
1 2
100-5%
D
3
S
2
100-5%
Q31
2N7002
1
G
.01uF 50V
NP*
1 2
21
LM_X04-Depopped C466/popped C598 at Will's req
LM_X04-Changed C598 to 1 uF at Will's request
100-5%
21 1 2
100-5%
NET_PHYSICAL_TYPE=100MIL NET_PHYSICAL_TYPE=100MIL NET_PHYSICAL_TYPE=100MIL NET_PHYSICAL_TYPE=100MIL NET_PHYSICAL_TYPE=100MIL
NET_PHYSICAL_TYPE=100MIL
4
20N03
Q40
1
3
VCC
8.2K-5% 47K-5%8.2K-5%
470
21
54,56
1
0.1uF 16V 1 2
D
3
S
2
D
Q34
2N7002
1
G
SHUNT_VRAID_REG
D
3
2N7002
1
G
S
2
54,56
3
S
2
Q1004
G
Jaguar2.0 - X02: Changed three 2222A (Q46, 47, 49) to 2N7002 (Q1002 - Q1004)
16V 10%
1 2
100-5% 100-5%
21 1 2
21
Jaguar 2.0 - X02: Added R1100 pull down on RBAT_DRAIN
RBAT_DRAIN
1 2
100-5% 100-5%
21
100-5%
100-5%
21 1 2
41
21
12
R1100
RBAT_DCHRG_BATV
56
1 2
47K-5%
47K-5%
U16
6
21
1 2
1 2
+3.3V +3.3V
U16
14
3
4
14
5
VHC14 VHC14
4
SI4435DY
Q35
21
16V 10%
8 5
21
47K-5%
Q54
2222A
21
1
TRICKLE RATE ADJUST
RBAT_QCHRG
765 8
321
IN SHUN
LT1121CS8
SUB*_93988
1 2
3
2
SUB*_7K141
MAIN POWER SWITCH
OUT GND
SI4410DY
41,51
1 3
5162738
Q50
4
+80%-20%
22uF 10V
1 2
21
+80%-20%
RAID_BAT
POCKET SHR
1 2
21
NET_PHYSICAL_TYPE=PLANE
VBAT_RAID
22uF 10V
1 2
+80%-20%
22uF 10V
+80%-20%
22uF 10V
1 2
21
1 2 3 4
NET_PHYSICAL_TYPE=25MIL
NET_PHYSICAL_TYPE=25MIL
+3.3V
1 2
8.2K-5% R611
RBAT_PRSNT
41,51
21
NP*
SD_X04 -- added placehold to allow for increased
25,26
Jaguar 2.0 Change: PWRGood signal ties directly to Q58 gate causes cap switching noise to feedback to psupply_pwrgood signal
41,43,51,55,59,61
PSUPPLY_PWRGOOD
ESM
I960
BIOS
added R 1K in series with gate
52,53,57
41
VBAT
R1060
1 2
1K-5%
I960_RBAT_EN
RECOND_ACK RECOND_REQ
RECOND_REQ RECOND_ACK
BAT_EN
BAT_EN
Q58
S 2
G
BAR43
1
D22
2N7002
31
2
DRAIN
DSCHRGD
PRSNT QCHRG
RBAT
BAT_EN
3
1K-5%
D 3
21
5 6
4
14
2 3
74VHC02 74VHC02
U16114
1
RBAT_EN
56
The Schmitt's filter out bounced due to -BATT and the lower two resistors help as well
4 4
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
12/5/2003
A02
SHEET
56 OF 63
DC
A B
Page 57
1
B D
CA
SD_X05 -- swapped pins 14 & 16
CTRL PANEL
12-5-2003_10:51
ROOMS COMPLETE
1
61
GPI_FVS_TESTMODE
51,61
53
53
BP_PSUPPLY_PWRGOOD
ESM_ALERT EXT_IPMB_SDA EXT_IPMB_SCL
54
52
FANFAST_5V_2
SRAM_VCC
44,61
VCC
Jaguar 2.0 Change: CMOS_Psupply_Pwrgood driver overloaded by
backplane capacitive loads (page 57) R1017 from 0 to 100ohms
Jaguar 2.0 - X02: Isolated Backplane Reset
SD_X06 -- added PSPG option for SCSI BP reset
BACKPLANE
12
NC_BP_3 NC_BP_5 NC_BP_7 FAN_AMB_LED_DRV_5 NC_BP_9
R1017
1 2
100-5%
BACKPLANE
21 3 5 7 9
11 13 15 17 18 19
NO MOUNTING HOLES!
ONE LOCATOR PEG
4
6
8
10
12
14
16
20
FAN_RPM_RAW_6
FAN_RPM_RAW_5
1 2
R1018
NP*
FAN_GRN_LED_DRV_6 FAN_AMB_LED_DRV_6 FAN_GRN_LED_DRV_5
NC_BP_10
54
54
54
54
54
54
+5V_AUX
52,53,56,57
BZL_PRES_VBAT
53
NMI_BTN
57
VBAT SW_ON
57
PWR_LED
51
SPKROUT
57
+3.3V_AUX
CTRL_PNL
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
2X10 MILLI-GRID
HEADER
2 4 6
8 10 12 14 16 18 20
SUB=SUB*_7D875
2 4 6 8 10 12 14 16 18
CPNL_DATA CPNL_CLK CPNL_MUX_SEL0 CPNL_MUX_SEL1 ENV_SEG0_SCL ENV_SEG0_SDA NC_EMP_RX
3.3VAUX_PWRGOOD
NC_EMP_DSR20
51
51
51
51
6,13,39,53
6,13,39,53
50,53,56,60
VCC
SUB*_78020
CSB_SPKR
39
GPO_SPKR_DIS
44
50V-20%
.01UF
21
LM_X04--Sub for part consolidation
+3.3V
148U22
9
10
74VHC08
SPKRD
SD_X04 changed speaker drive circuit
ROOM=SPKDRV
+12V
43
21
LM_X04--83008 sub for p/n consolidation
1.2K-5%
1.2K-5%
1 2
1.2K-5%
1 2
1.2K-5%
10V-10%
SUB*_83008
1uF
21
21
12
16V-20%
1uF
21
SPKROUT
NP*
57
2
55,59
Buffer is to prevent 7404 leakage from spoiling RST during ramp-up/dn
PCI_RST_64
+3.3V_AUX
14
9
10
U80
74VHC32
SUB*_9627P
SPEAKER DRIVE
+3.3V
1 2
1K-5%
U79
8
5 6
STRONG_DRV_PCI_RST
57
USING 1210 TO SAVE USE OF A 1206 REEL
2
BATTERY
Required by product safety
D19
31
RB480
SIO_VBAT
21
ESM_VBAT
54
44
3
ON-BOARD CONTROL
PANEL STUFF
RESET
1
2
PUSH BUTTON
3
4
ROOM=SW
+3.3V
8.2K-5%
21
1K-5%
21
6.3V-10%
4.7uF
21
C77
+3.3V
14
1
U16
2
VHC14
13 12
SYSTEM_PWRGOOD
51,60
LEDs
Required by product safety
1 3
132
4
TH/SMT SKT
3V COIN
BATTERY
-+
5
NET_PHYSICAL_TYPE=25MIL
SUB=SUB*_1311P
ADD=ADD*_75481_BATTERY
P# 86810 TH Socket P# 1311P SM Socket P# 75481 BATTERY
1K-5%
D7
NET_PHYSICAL_TYPE=25MIL
SM Socket
1 2
1K-5%
+3.3V_AUX
D6
16V 10%
1 2
.01uF 50V
PLACE CAPS CLOSE TO CSB
31
21
ROOM=BAT
52,53,56,57
3
+3.3V_AUX
POWER
1
2
PUSH BUTTON
Jaguar 2.0 - X02: Added pullup to 3.3Aux to overcome 7407 leakage current
+3.3V_AUX
1 2
1K-5%
+3.3V_AUX
+3.3V_AUX
SW_ON
57
3
4
2.7K-5%
21
1K-5%
RB147
21
6.3V-10% 1 2
4.7uF
3
GPO_PWR_BUTTON_DIS
44
14
U53
4
VHC14
1 2
1K-5%
4 5
14
U80
74VHC32
U51
6
SIGNAL=P5VAUX;14
21
R1112
PWRBTN
44,51
STRONG_DRV_PCI_RST
57
21
220
1 2
220
1 2
330-5%
DS6
3 1
GREEN
DS5
GREEN
DS4
3 1
GREEN
+3.3V
13
+5V_AUX
SD_X04 -- some 22uF caps changed to 4.7uF to save money
ROOM=LED
4 4
+3.3V
ROOM=SW
+3.3V
1
2
PUSH BUTTON
NMI_BTN
57
2 1
3
4
8.2K-5% R603
1 2
1K-5%
6.3V-10%
4.7uF
21
C58
14
U16
9
8
VHC14
GPE_NMI_BUTTON
39
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
H3007
COMPUTER CORPORATION
AUSTIN,TEXAS
A02
SHEET
57 OF 6312/5/2003
DC
A B
Page 58
B D
ASK ABOUT 5% RESISTOR SUBSTITUTE BECAUSE OF INDUSTRY STANDARD VALUE 5%
CA
12-5-2003_10:51
ROOMS COMPLETE
1
1
ROOM=REG_2.5V
D9
2 1
CMSH1-40
2
3
1 2
1uF 16V
-20%+80%
SD_X04 -- changed VRM Enable from PSPG to CPLD VRM_EN
Jaguar 2.0 change: insufficient softstart due to leaky diodes
added FET, pullups,pulldown, removed diode D8
2.5V VID = 1 1 0 1 0
1 2
1uF 16V
13,14,41
-20%+80%
VRM_EN
12
+
NP*
270uF
16V-20%
RB1083
1 2
+3.3V
RB1061
1 2
21
RB1072
SUB*_30416
NP*
1K-5%
2N7002
Jaguar 2.0 - X02 - Add 1uF VCC Bypass Cap to L6911C - page 58
Keep close to U70 pins 18 and 16
-20%+80%
21
1 2
1 2
0.1uF 16V
D
3
1
G
S
QB1006
2
1 2
20K-5%
1 2
2200pf
50V-10%
21
50V-5%
2.2K-5%
1000pF
50V-10%
VCC25_OCSET VCC25_SS
VCC25_COMP VCC25_FB
U70
1
NC_VCC25_VID1
NC_VCC25_VID3 NC_VCC25_VID4
2
OCSET
3
SS
4
5 6 7 8 9
10 11
NOT FOR USE
ON NEW DESIGNS
L6911B
RT OVP VCC
LGATE
SUB*_M2983
Jaguar 2.0 - X02: L6911B is EOL. The L6911C is not suitable, so we have qualified a new vendor: Intersil
Jaguar H3007 - X00: Swapped out ST Micro and Intersil part (P/N 3F153) to JUST Intersil (P/N M2983) for Merlot gap-out.
21
33K
1 2
1K-5%
1 2
.082uF 16V
U70.16:C1011.2:0:500
20 19 18 17 16 15 14 13 12
1 2
20-1%
VCC25_RT NC_OVP
VCC25_LGATE
VCC25_BOOT VCC25_UGATE VCC25_PHASE
1uF 16V
12
C1011
VCC
U70.18:C1011.1:0:500
1K-5%
1 2
VCC25_PWRGD
3.01K-1% R225
21
60
2.2-5%
1 2
2.2-5%
21
1 2
0.1uF 16V
2.2-5%
1 2
.068uF 16V
1 2
3.01K-1%
Q21
D
2
MOSFET NCHAN 20V_20A
1
G
S
3
VERIFY P/N FITS
CB237
1 2
0.1uF 16V
2
+2.5V
L34
21
2.2uH 12A
4V-20%
Q22
D
2
MOSFET NCHAN 30V_20A
1
G
S
3
21
VERIFY P/N FITS
Q23
D
2
MOSFET NCHAN 30V_20A
1
G
S
3
VERIFY P/N FITS
820uF
+
1 2
4V-20%
820uF
4V-20%
+
21
820uF
+
21
1uF
1 2
10V-10%
SUB*_83008 LM_X04--83008 sub for p/n consolidation
3
12
+
270uF
16V-20%
1 2
510K-5%
4 4
2.5V GENERATION
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
A B
DWG NO.
DC
H3007
SHEET
12/5/2003 58 OF 63
A02
Page 59
B D
CA
12-5-2003_10:51
1
44
44
11
GPO_I559_DIS
GPO_AIC7890_DIS
CMIC_PCIRST
21
8.2K-5%
R82
1 2
22-5%
Place res by CMIC
CMIC_PCI_RST_BUF
14
12 13
74VHC08
U24
11
148U24
9
10
74VHC08
R84
1 2
146U24
4 5
74VHC08
21
R85
14
1 2
74VHC08
U23
3
+3.3V
143U24
1 2
74VHC08
1 2
+3.3V
14
1 2
74VHC08
R_REMC_PCIRST
R_PCI_RST_32
R_PCI_RST_64
U37
3
R_PCI_RST_AIC7890
R_PCI_RST_I559
R_IDE_PRST
R86
22-5%
R83
1 2
22-5%
22-5%
1 2
22-5%
21
1 2
22-5%
22-5%
21
21
IDE_PRST
U22
PCI_RST_I559
PCI_RST_AIC7890
U79
9 8
+3.3V
14
12 13
74VHC08
+2.5V
200-5%
42
PCI_RST_32
PCI_RST_64
11
1 2
22-5% CIOB's get there own reset line since they tend to backdrive during power-up
50
47
12
REMC_RESET
39,44,46,48,51
55,57
SD_X06 -- added new reset line for ciob's
PCI_RST_CIOB
13-15
17,30
+5V_AUX
1 2
.1-1% .1-1%
LM_X05--83009 sub for p/n consolidation
21
1 2
.1-1% .1-1%
3VAUX_HALF
21
22uF 6.3V
SUB*_83009
1 2
1
EN
2
IN
3
GND
VR4
TAB ADJ OUT
MIC29302
Vo and Adj are swapped for Micrel 6 5 4
SUB*_X0030
PKG_TYPE=TO263_5L
Note the package change!
SD_X05 -- changed package type
todo tune resistors for 1.24V ref
Jaguar H3007 - X00: Changed VR4 from 37CPE to X0030. X0030 includes BOTH Sipex and Micrel parts.
4.99K-1%
1 2
3VAUX_REF
1 2
3.01K-1% R635
1 2
22uF 6.3V
1 2
SUB*_83009
LM_X05--83009 sub for p/n consolidation
0.1uF 16V 1 2
P3V3AUX_DIRECT
9,51-54,59,60
+3.3V
1
SUB*_7K141
8 567
123
SI4435DY
4
SI4435DY
Q36
2
17,22
PCI1_PCIRESET
GPO_IOP_DIS
44
R95
1 2
8.2K-5%
1 2
21
8.2K-5%
10
+3.3V
8.2K-5%
14
9
74VHC08
8
DELAY=:::3000
22-5%
4
8.2K-5%
21
PCI_RST_IOP
24,41
21
8.2K-5% R465
21
765 8
SUB*_7K141
321
Q16
+3.3V_AUX
NET_PHYSICAL_TYPE=PLANE
SUB*_7K141
9,51-54,59,60
P3V3AUX_DIRECT
2N7002
1 2 3
SI4435DY
D
3
85 6 7
4
Q24
2
Fan Holdoff
BAR43
R1035
21
3 1
16V 10%
D1000
CB1001
21
16V 10%
1 2
2 1
CB1002
RB1059
Q1000
1 2 3
SI4435DY SI4435DY
4
SUB*_0001P
Q1001
1
G
S
2
D
2N7002
41,43,51,55,56,59,61
+5V_AUX
2
SUB*_0001P
1 2
321
4
3.3V Aux VR
8.2K-5%
RB1054
QB1004
TP0610T
3
1
GB_5V_AUX
22
PSUPPLY_PWRGOOD
1 2
8.2K-5%
1
G
3
S
2
3
Jaguar 2.0 change: Incorrect design, changed R1059 ->270K and added R1035 -> 560K
removed C1000 for space savings - not being used
85 6 7
765 8
NET_PHYSICAL_TYPE=100MIL
SD_X05 -- added fan pwr holdoff circuit
FAN_12V
54
GB_3.3V_AUX
22,23,59
2 1
220
D
3
QB1002
2N7002
RB1057
1K-1%
Jaguar 2.0 Change: Glitch on 3.3V AUX - add ckt to switch the 3.3V aux etc
21
1
G
S
2
.01uF 50V
RB1101
NP*
CB1011
12
NP*
NET_PHYSICAL_TYPE=PLANE
+3.3V_AUX
+5V_AUX
1 2
8.2K-5% R476
321
SI4435DY
4
765 8
Q17
SUB*_7K141
NET_PHYSICAL_TYPE=PLANE
GB_3.3V_AUX
0.1uF 16V CB1008
1 2
Q17.4:CB1008.2:0:2000:Q17.4:RB1058.1:0:2000
22,23,59
Place QB1005 near Q17 according to specfied rules in ECAD
RB1058
1 2
+5V_AUX
C1009.1:Q1005.2:0:2000
100-1%
3
3.3V Aux VR
3.3V
GB 3.3V Aux
3.3V Aux
41,43,51,55,56,59,61
22
PSUPPLY_PWRGOOD
GPO_VAUX_ENABLE
1 2
8.2K-5%
8.2K-5%
2N7002
21
G
10V-10%
1 2
8.2K-5%
D
3
1
S
2N7002
2
D
3
1
G
S
2
QB1003
2N7002
D
3
1
G
S
2
RB1055
QB1005
TP0610T
1
2
3
QB1005.3:RB1058.2:0:2000
1 2
8.2K-5%
RB1056
1uF
CB1009
21
ESM 3.3V Aux
Jaguar 2.0 Change: Modified circuit to fix glitch on 3.3V aux - giagbit NIC is coming on line too soon.
4 4
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
SCHEM,PLN,PE4600,2P
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
A B
DWG NO.
DC
H3007
A02
SHEET
59 OF 6312/5/2003
Page 60
+3.3V
B D
CA
12-5-2003_10:51
1
50,53,56,57,60
3.3VAUX_PWRGOOD
8,41,51
4 5
74VHC32
CPU_VRM_EN
14
U38
6
U52
1 2
U52
5 6
+3.3V
1 2
1K-1%
SPG Assertion RC Delay: 10u*(12k)= 120ms SPG Deassertion RC Delay: 10u*(0)= 0
21
10K-1%
3 1
D5
16V 10%
21
1 2
1K-1%
14
9
U53
8
+3.3V_AUX
14
U53
5
6
VHC14VHC14
Jaguar 2.0 - X02: Changed pull up on R455 from 3.3v to 5v
Jaguar 2.0 - X02: Changed R values for RB431 & R489 to overcome 7407 leakage current
U52
11 10
VCC
1 2
1K-5%
1 2
SUB*_05173
220 - 5%
U52
+2.5V
2.7K-5% R489
21
VCORE
1K-5%
21
SUB*_30405
150 - 5%
RB431
SYSTEM_PWRGOOD
CMIC_SRESET
1
51,57
9,11
2
8,51
8,51
VRM1_PWRGOOD VRM2_PWRGOOD
+3.3V
4 5
146U37
U40
13 12
740774VHC08
+3.3V_AUX
+3.3V
+2.5V
1 2
1K-5%
PWRGOOD_BEFORE_OC
1213
51
H_PWRGOOD
5,6
2
VTT_PWRGD_A
13
VCC25_PWRGD_A
13
VTT_PWRGD_B
14
VCC25_PWRGD_B
14
+3.3V
146U81
4 5
74VHC08
+3.3V
143U81
1 2
74VHC08
MC_VR_PG_A
MC_VR_PG_B
+3.3V
51
51
41
CPLD
SPG_TREE
NP*
D4
1 3
1 2
2.2K-5%
16V 10%
21
C51
11
14
U16
10
VHC14
U52
9 8
740774VHC32
PLLRST Assertion RC Delay: 10u*(2.2k)= 22ms PLLRST Deassertion RC Delay: 10u*(2.2k)= 22ms
PLLRST
11,13-15,17,30,39
12 13
14
U80
11
SD_X04 -- allowed CPLD to control startup of VRM's and clocks
3
58
55
VCC25_PWRGD
XLNX_BOOTING
9
10
U52
148U81
74VHC08
43
+3.3V
12 13
74VHC08
1411U81
ALL_25V_PWRGD
3
41
Power
PS PG
VRM Enable
2.5V
9,51-54,59
P3V3AUX_DIRECT
2.5V PG
3
SUB*_4F520
(2.93V)
VCC
RESET
GND
1
21
1 2
1K-5%
3.3VAUX_PWRGOOD
3.3v AUXGOOD GENERATION
50,53,56,57,60
2
Clk En
Clk's
PLLRST
SUB*_30416
POWER GOOD
LM_X04--30416 sub for p/n consolidation
4 4
Sys PG
ROOM=3VFPPG
X03 BOM change - LM 3/23/01
4F520 is 3.08V part
A B
ROOM=PWRGOOD
<10ms
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
>1ms>100us
TITLE
DWG NO.
DC
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
60 OF 63
Page 61
POWER CONNECTORS
B D
CA
ROOM=DISPERSE
12-5-2003_11:04
1
2
+3.3V
+3.3V
POWER CONNECTORS
ROOM=PWR
VCC
VCC
6A
7A
8A
9A 10
10A
6A
7A
8A
9A 10
10A
POWER1
6
1 1A
7
2 2A
8
3 3A
9
4 4A 5 5A
HDR,PWR,RTF
POWER2
6
1 1A
7
2 2A
8
3 3A
9
4 4A 5 5A
HDR,PWR,RTF
53
+3.3V
+3.3V
1 2
8.2K-5%
SP_POWER3_27 ENV_SEG2_SDA
NC_POWER3_MT1
RB141
ENV_SEG2_SCL
53
AC_PWRGOOD
51
RAW_PWRGOOD
SP_POWER3_17
Jaguar 2.0 - X02: Isolated Backplane Reset
+3.3V_AUX
14
U53
13
VHC14
12
+3.3V_AUX
U53
14
11
VHC14
CMOS_PSUPPLY_PWRGOOD
10
PSUPPLY_PWRGOOD_NEG
25,53
53
SENSE LINES
POWER3
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
+5V_AUX
-12V -12V
19
19
21
21
23
23
25
25
27
27
29
29
MT1
MT1
2X15 MILLI-GRID
10 12 14 16 18 20 22 24 26 28 30
2
2
4
4
6
6
8
8 10
SP_POWER3_10
12 14
16 18 20 22 24 26 28 30
HEADER
Jaguar H3007 - A02: Replace refdes Power3 P/N 5D595 to P/N 88THY. See justification at page 63
VCC
44,51
+5V_AUX
ESM_ALERT
3 4
+3.3V
65
SP_POWER3_2
51,57
475-1%
2 1
R1107
BP_PSUPPLY_PWRGOOD
475-1%
2 1
PSUPPLY_PWRGOOD
+3.3V
+3.3V
+3.3V
57
41,43,51,55,56,59
8.2K-5%
1 2
8.2K-5%
WH3
40RD20 40RD20
WH5
40RD20
NC_WH6
NC_WH5
WH6
40RD20
NO_PKG
40RD20
NC_WH4
40RD20
NO_PKG
40RD20
NC_WH3
NO_PKG
NC_WH2
NO_PKGNO_PKG
NC_WH1
NO_PKG
NC_WH7
NO_PKG
40RD20
40RD20
40RD20
WH1
WH9
WH4
WH8
NC_WH9 NC_WH13
40RD2040RD20
NO_PKG
NC_WH10
40RD20
NO_PKG
NC_WH11
NO_PKG
NC_WH12
NO_PKG
WH7
WH2
NO_PKG
NC_WH14
NO_PKG
1
PROTOTYPE GROUND STAKES
NP*
1
J4
NP*
1
J7
NP*
1
J6
NP*
1
J1
NP*
1
J8
BULK DECOUPLING
JUMPERS
+3.3V
VCC
21
GPI_EN_PASSWD
GPI_NVRAM_CLR
44
44
25V-20%
470uF
+
1 2
25V-20%
470uF
+
21
25V-20%
470uF
+
1 2
25V-20%
470uF
+
21
2
2 3 4 5 6 7 8 9
.147 DRILL
.375 PAD
SLOT 1
PEM STUD OR STDF
TO 8 GND VIAS
SUB*_1065C
2 3 4 5 6 7 8 9
.147 DRILL
.375 PAD
SLOT 1
PEM STUD OR STDF
TO 8 GND VIAS SUB*_1065C
50V-20%
SUB*_78020
50V-20%
.01UF
SUB*_78020
.01UF
21
1 2
0.1uF 16V
CB299
1 2
CB179
SUB*_78020
50V-20%
.01UF
SUB*_78020
50V-20%
CB173
.01UF
50V-20%
.01UF
21
SUB*_78020
LM_X04--Sub for part consolidation
SUB*_78020
0.1uF 16V
CB328
21
21
50V-20%
.01UF
1 2
50V-20%
1 2
.01UF
SUB*_78020
0.1uF 16V
21
21
0.1uF 16V
SUB*_78020
50V-20%
CB177
.01UF
21
50V-20%
CB261
.01UF
21
SUB*_78020
0.1uF 16V
21
21
0.1uF 16V
SUB*_78020
50V-20%
CB174
.01UF
21
21
0.1uF 16V
50V-20%
CB180
.01UF
SUB*_78020
21
1 2
0.1uF 16V 1 2
0.1uF 16V
21
1 2
8.2K-5%
NO_PKG
ADD*_81526
21
NO_PKG
Change Refdes next pass
81526 are the jumper plugs
NVRAM_CLR
21
ADD*_81526
21
NO_PKG
GPI_FVS_TESTMODE
PASSWD
44,57
ROOM=BULKS
CLIP1
P1 P2
3
V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SUB=SUB*_0342R
ADD1=ADD*_0342R
CLIP14
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SUB=SUB*_0342R
ADD1=ADD*_0342R
CLIP7
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SUB=SUB*_0342R
ADD1=ADD*_0342R
CLIP2
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SUB=SUB*_0342R
ADD1=ADD*_0342R
CLIP6
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SUB=SUB*_0342R
ADD1=ADD*_0342R
CLIP3
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SUB=SUB*_0342R
ADD1=ADD*_0342R
CLIP10
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SUB=SUB*_0342R
ADD1=ADD*_0342R
CLIP4
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SUB=SUB*_0342R
ADD1=ADD*_0342R
CLIP13
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SUB=SUB*_0342R
ADD1=ADD*_0342R
CLIP8
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SUB=SUB*_0342R
ADD1=ADD*_0342R
CS1
NC
CPTV SCREW
17640
SNAP STYLE
NC_CPTV_SCREW
0.1uF 16V 1 2
0.1uF 16V
21
0.1uF 16V
21
1 2
100-5%
0.1uF 16V
R1121
CB499
1 2
1 2
100-5%
0.1uF 16V
21
R1120
100-5%
0.1uF 16V
1 2
R1119
1 2
220-5%
100-5%
SUB*_81927
1 2
100-5%
1 2
RB1035
R1118
+2.5V
0.1uF 16V 1 2
220-5%
1 2
100-5%
SUB*_81927
0.1uF 16V
21
0.1uF 16V
220-5%
R1123
0.1uF 16V
21
1 2
100-5%
SUB*_81927
1 2
0.1uF 16V
220-5%
100-5%
R1124
SUB*_81927
0.1uF 16V
1 2
21
CB351
1 2
R1125
0.1uF 16V CB352
21
VCC
0.1uF 16V C366
21
+3.3V
0.1uF 16V
1 2
C7
+3.3V
0.1uF 16V CB438
1 2
0.1uF 16V 1 2
0.1uF 16V
C5
21
0.1uF 16V CB489
21
0.1uF 16V C555
21
0.1uF 16V
1 2
C12
0.1uF 16V 1 2
0.1uF 16V
C6
21
Jaguar 2.0 - X02: Added R1118 - R1121, R1123-R1129 & RB1035 as bleeder resistors for proper reset in power down.
+2.5V +3.3V
1 2
0.1uF 16V C587
21
0.1uF 16V
50V-20%
LM_X04--Sub for part consolidation
1 2
.01UF
SUB*_78020
0.1uF 16V 1 2
CB282
0.1uF 16V
C57
0.1uF 16V 1 2
50V-20%
.01UF
0.1uF 16V 1 2
21
CB135
21
SUB*_78020
0.1uF 16V
21
0.1uF 16V
1 2
1 2
1.2K-5% R1126
1.2K-5%
50V-20%
.01UF
SUB*_78020
1 2
R1127
21
1.2K-5%
50V-20%
CB185
SUB*_78020
1 2
R1128
VCC
SUB*_78020
.01UF
21
1 2
1.2K-5% R1129
-20%+80%
1uF 16V
1 2
-20%+80%
rspn
SUB*_78020
21
21
50V-20%
CB184
50V-20%
SUB*_78020
.01UF
.01UF
1 2
21
50V-20%
.01UF
LM_X04--Sub for part consolidation
SUB*_78020
50V-20%
.01UF
1uF 16V
21
50V-20%
CB306
.01UF
SUB*_78020
SUB*_78020
50V-20%
CB280
.01UF
21
1 2
-20%+80%
1uF 16V
1 2
SUB*_78020
50V-20%
CB334
.01UF
50V-20%
CB307
.01UF
SUB*_78020
1 2
21
-20%+80%
1uF 16V
1 2
50V-20%
CB284
.01UF
SUB*_78020
50V-20%
CB283
.01UF
-20%+80%
CB255
21
SUB*_78020
CB333
21
1uF 16V
21
SUB*_78020
50V-20%
.01UF
1 2
3
CLIP9
P1 P2 V1
4 4
V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SUB=SUB*_0342R
ADD1=ADD*_0342R
ADD1=ADD*_0342R
CLIP12
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
SUB=SUB*_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
ADD1=ADD*_0342R
CLIP11
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
SUB=SUB*_0342R
CLIP5
GPI_SLIM_DETECT
V10 V11 V12 V13 V14 V15 V16
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8 V9
SMT GND CLIP
86 SLOT
16 GND VIAS
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
SUB=SUB*_0342R
ADD1=ADD*_0342R
NP*
1 2
44,51
PWA assembly
PWB
Assembly Drawing
Schematic
ID Barcode
REV Barcode
CAPTIVE SCREW
PCI STANDOFF PCI STANDOFF
P#H3009 ADD=ADD*_H3008_PWB ADD1=ADD*_H3006_ASSYDWG ADD2=ADD*_H3007_SCHEM ADD3=ADD*_42610_BARCODE ADD4=ADD*_42753_LABEL
P#17640 ADD5=ADD*_4C179_ASSYDWG ADD6=ADD*_4C179_ASSYDWG
0.1uF 16V
21
Jaguar 2.0 - X02: Added R1118 - R1121, R1123-R1129 & RB1035 as bleeder resistors for proper reset in power down.
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
0.1uF 16V
0.1uF 16V
1 2
C75
21
0.1uF 16V
1 2
0.1uF 16V
21
0.1uF 16V
1 2
0.1uF 16V C487
21
0.1uF 16V 1 2
0.1uF 16V C446
21
0.1uF 16V 1 2
0.1uF 16V C11
21
0.1uF 16V 1 2
TITLE
DWG NO.
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
61 OF 63
DC
A B
Page 62
B D
CA
12-5-2003_10:51
1
3V_SYNC_FIL
3V_SYNC_FIL
49,62
R37
1 2
49,62
14
2
U12 74VHC125
3
1
R34
21
1K-5%
NC_U24_2 NC_U24_3
220
21
220
SP_U39_1 SP_U39_2
21
+3.3V
14
1 2
74VHC32
+3.3V
+3.3V
1 2
U38
3
SP_U39_3
1K-5%
1K-5%
1 2
SP_U410_12 SP_U410_13
12 13
74VHC08
1
1411U37
SP_U410_11
2
R36
1 2
14
5
220220
U12 74VHC125
4
21
1K-5%
NC_U24_5 NC_U24_66
R35
Spares
+3.3V
74VHC125
NC_U1008_3
3
1
+3.3V
14
2
1 2
8.2K-5% R587
+3.3V_AUX
14
4 5
74VHC32
+3.3V_AUX
14
1 2
74VHC32
NP*
6
3
NP*
NP*
+5V_AUX
SUB*_9627P
1 2
100-5%
LM_X04--9627P sub for p/n consolidation
U51
9 8
SIGNAL=P5VAUX;14
U51
1011
SIGNAL=P5VAUX;14
U51
13 12
SIGNAL=P5VAUX;14
NC_U8_8
NC_U8_10
NC_U8_12
2
Z_L1_50
1 2
3
RY
ZSE3PINS2R
COUPON TEST
+RX
Coupons
DELAY_RULE=::6000:10000
Z50_TOP
1
1
ZEP
COUPON TEST
Z_L1_60
3
RY
ZSE3PINS2R
COUPON TEST
74VHC125
NC_U1008_6
21
+RX
DELAY_RULE=::6000:10000
Z60_TOP
1
1
ZEP
COUPON TEST
14
6
5
4
1K-5%
21
NC_RN1008_4
VCC
21
NC_RN1008_5
54
15K-5%
Jaguar 2.0 - X02: Changed R460 from pull down (GND) to pull up (5V)
8.2K-5% U128
NC_U125_6
65
+3.3V
NC_RN131_8
1
RN131
2 3 4
8 7 6 5
9 8
1011
13 12
NC_U1000_8
NC_U1000_10
NC_U1000_12
3
Z_L3_50
1 2
3
RY
ZSE3PINS2R
COUPON TEST
Z_L4_50
3
RY
ZSE3PINS2R
COUPON TEST
Z_L7_50
3
RY
ZSE3PINS2R
COUPON TEST
+RX
+RX
+RX
DELAY_RULE=::6000:10000
21
DELAY_RULE=::6000:10000
21
DELAY_RULE=::6000:10000
Z50_I1
Z50_I2
Z50_I3
1
1
ZEP
COUPON TEST
1
1
ZEP
COUPON TEST
ZEP11
1
1
ZEP
COUPON TEST
Z_L3_60
1 2
3
RY
ZSE3PINS2R
COUPON TEST
Z_L4_60
3
RY
ZSE3PINS2R
COUPON TEST
Z_L7_60
3
RY
ZSE3PINS2R
COUPON TEST
+RX
+RX
+RX
DELAY_RULE=::6000:10000
21
DELAY_RULE=::6000:10000
21
DELAY_RULE=::6000:10000
Z60_I1
Z60_I2
Z60_I3
1
1
ZEP
COUPON TEST
1
1
ZEP
COUPON TEST
1
1
ZEP
COUPON TEST
NC_U125_1011 10
3
LM_X04 -- spares
Z_L8_50
1 2
3
RY
ZSE3PINS2R
COUPON TEST
Z_L3_50AGTL
1 2
3
RY
ZSE3PINS2R
COUPON TEST
Z_L6_50AGTL
4 4
+RX
DELAY_RULE=::6000:10000
+RX
DELAY_RULE=::6000:10000
21
+RX
Z50_I4
Z50_I1_GTL
Z50_GD2_GTL
ZEP10
1
1
ZEP
COUPON TEST
ZEP12
1
1
ZEP
COUPON TEST
ZEP13
1
1
1 2
3
3
1
Z_L8_60
RY
ZSE3PINS2R
COUPON TEST
Z_L10_60
RY
ZSE3PINS2R
COUPON TEST
Z_L10_120D
RX
+RX
DELAY_RULE=::6000:10000
21
+RX
DELAY_RULE=::6000:10000
2
+
Z120D_BOT
Z60_I4
Z60_BOT
1
1
ZEP
COUPON TEST
1
1
ZEP
COUPON TEST
COUPON TEST
ZEP
1
1
ZEP15
+3.3V
2 1
8.2K-5%
9
10
74VHC08
+3.3V
14
U37
8
NC_U36_8
RB202
8.2K-5%
RB198
1 2
8.2K-5%
RB197
8.2K-5%
Jaguar 2.0 Change: REMC should not answer on I2C when addressed.
21
NP*
NP*
21
NP*
+2.5V
12 13
74VHC08
9
10
74VHC08
1411U172
NP*
14
4 5
148U172
NC_U4000_11
74VHC08
NP*
6
NP*
NC_U4000_8
NC_U4000_6
Depop U172, RB197, RB198, RB202
SPARES
3
RY
ZSE3PINS2R
COUPON TEST
DELAY_RULE=::6000:10000
ZEP
COUPON TEST
3
RY
ZDI4PINS2R
COUPON TEST
4
-
DELAY_RULE=::6000:10000 DELAY_RULE=::6000:10000
ZEP14
1
1
ZEP
COUPON TEST
COMPUTER CORPORATION
AUSTIN,TEXAS
TITLE
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
DC
SCHEM,PLN,PE4600,2P
H3007
SHEET
12/5/2003
A02
62 OF 63
Page 63
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Revision Information
Actual Attributes for PN changes are on Page 61
Changed PWA to new part number: H3009. Previous PWA was F0058.
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Changed PWB to new part number: H3008. Previous PWB was F0057.
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Changed Schematic P/N to H3007 Previous Schematic P/N was F0055 Rev. A01 Changed assembly drawing number to H3006. Previous Assembly Drawing was F0056. Changed ECO to 150199. Previous was 134552.
Changes for Jaguar H3007 - X00/A00
Jaguar H3007 - X00: Swapped out ST Micro & Intersil part (P/N 009TG) to JUST Intersil (P/N 3F153) for Merlot gap-out. - Page 58
Jaguar H3007 - X00: Changed VR4 from 37CPE to X0030. X0030 includes BOTH Sipex and Micrel parts. - Page 59
Jaguar H3007 - X00: Changed prgmd part 2G456 to 1U323 for U26 (BIOS Flash). - Page 43
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Jaguar H3007 - X00: Added No-Pop Ckt. RB496, RB497, RB498 to set USB_OVRCUR input to CSB at +3.3V, previously +5V.
(3) 47K res. (P/N 31107) were used as these P/Ns already exist on the BOM in sufficient quantity. - Page 42
Jaguar H3007 - X00: Removed No-Pop on R220 and changed to 2.2K (P/N 30424) from 1K. OVRCUR on CSB5 now 2.2K PU +3.3V. - Page 39
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Jaguar H3007 - X00: Added RB495, 8.2K +3.3V PU to PCI1_REQ64 on CIOB-X for embedded PCI (i960 and BCM5700). - Page 17
Jaguar H3007 - X00: De-popped R553 & R554, duplicate PUs on RN126. - Page 27
Jaguar H3007 - X00: Changed RB465 to 1K (P/N 22327) from 8.2K. Per Adaptec's reccomendation, to overcome int. 50K PU. - Page 28
Jaguar H3007 - X00: Changed R433 on GCOMP1 from 249 to 332 ohm (P/N 20JDN) to avoid FSB parity errors, per SW. - Page 11
Jaguar H3007 - X00: RB162-168, 177, and 178 connected to GND instead of +3.3V. Still NP. Internal PUs on ATI chip unreliable.
Added pads, RB493, for option of connecting MA6 to PD. In case of future need to enable 3.3V signaling vs. 5V. - Page 48
Jaguar H3007 - X00: Populated R165 and changed to PD. Internal PU on ATI chip unreliable. - Page 48
Jaguar H3007 - X00: Added RB494, 2.2K +3.3V PU on CKE. Internal PU on ATI chip unreliable. - Page 49
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Changes for Jaguar H3007 - A01
Jaguar H3007 - A01: There was a mistake in X00/A00 revision list. It should have said "Swapped out ST Micro & Intersil part
(P/N 3F153) to JUST Intersil (P/N M2983) for Merlot gap-out." - Page 58
Jaguar H3007 - A01: U26 (BIOS Flash) was subbed as 1U323 (which is a blank part) and it should have been subbed as 2G456.
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(which is a prgmd part) Corrected that - Page 43
Changes for Jaguar H3007 - A02
Jaguar H3007 - A02: Change Power3 connector P/N 5D595 to P/N 88THY. The reason is we are currently cropping the legs on the
current parts as during manufacture we are getting 100% shorts underneath, by cutting lead length, the shorts do
not occur. New part has shorter lead length. - Page 61
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Note to ECAD: Do Not Move Test Points or High Speed Nets.
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLN,PE4600,2P
H3007
DCBA
4
A02
SHEET
63 OF 6312/5/2003
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