5
MSI
MS-9158 REV 0B
4
3
2
1
Alderwood + ICH6R Schematics
D D
Table of Contents
Page
01
02
03
04
05
06
07
08
09
10
11
C C
12
13
14
15
16
17
18
19
20
21
22
23
Title
Cover / Table of Contents
System Block Diagram
Power Delivery Block Diagram
System Clock Block Diagram
System Reset Block Diagram
System SMB Block Diagram
DDRII Routing Block Diagram
Interrupt Block Diagram
Hardwar Monitor Block Digara m
CK410 - CY28410
Intel LGA775 Signal Block
Intel LGA775 Power
Intel LGA775 GND
Alderwood CPU/PCI Signal
Alderwood Memory Signal
Alderwood Misc/Power Signal
Alderwood Power/Gnd
DDR II DIMM 1/2
DDR II DIMM 3/4
DDR II VTT/ICH6 DEC OUP LI NG
PCI -EXPRESS X16-PORT
ICH6 - PCI, DMI, CPU, IRQ
ICH6 - LPC, ATA, USB, GPIO
24 ICH6 - POWER
25
26
B B
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
A A
43
44
45
5
PCI_E x1/Mini PCI Slot
PCI Slot1/2
IEEE 1394 Connectors
LAN - Broadcom BCM5751
AC97 Audio - ALC202/AD1981B
FWH/SATA/PS2 Connectors
USB2.0/SATA Connectors
LPC I/O PC87366
Hardware Monitor ADT7463
ADT7463/CPU/SYSTEM FAN
ATX & Front Panel
VRM 10.1 Intersil 6556 4Pase
VRM 10.1 Decoupling
DDR2 Power&Regulator Voltage
System Power Control
PCI Reset & XDP
IBM1
IBM2
MSIC
GPIO
History
4
Revision History
Revision
0A - (xx/xx/xx)
2003/10/16
0B - (xx/xx/xx)
2004/01/13
History
Start to make up IBM FireBird Schematics - Joe Yu
IBM FireBird Schematics Revision to 0B - Andy Tseng
3
Page
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Cover /Table of Content s
Size Document Number Rev
MS-9158
2
Date: Sheet
14 5 Monday, February 16, 2004
1
0B Custom
of
5
4
3
2
1
FireBird
D D
MS-9158 SYSTEM BLOCK DIAGRAM
Preliminary Spec
* Intel Alderwood / ICH6R Chipset
* Supporting Tejas/Prescott LGA-775 CPUs
VRM 10.1
Intersil 6556B
4-Phase PWM
External
Graphics Card
Connector
C C
ATA Primary
SATA 0~3
USB2.0 Port 0~7
PCI Express X16
BW = 8GB/s
Ultra DMA 66/100
SATA
USB 2.0
Intel LGA-775
Prescott/Tejas
PSB
800/533MHz
Alderwood
(MCH)
DMI Bus
ICH6
DDR2 Channel A
64bit
DDR2
400/533MHz
DDR2 Channel B
DDR2 DIMM x2
Modules
DDR2 DIMM x2
Modules
PCI BUS
PCI EXPRESS X1
PCI Slot 1/2
Mini-PCI
Socket
IEEE 1394
TI/TSB43AB23
* 6 Layer BTX Form Factor (10.5"X10.4")
* 4 DDR2 unbuffered ECC DIMMs (2 Channel)
* PCI Express X16 for Graphic + PCIe X1 Slot
* USB 2.0 (Rear x2, Front x1)
* 2 PCI slots + 1 Mini PCI slot
* AD1981B AC97 codec
* Serial ATA (4 channel) + RAID 0, 1
* IEEE 1394 Ti chip on-board (Rear x1, Front x1)
* Gigabit LAN BCM5721 (Support ASF 2.0)
PCI Express X1
B B
ADI1981B/
ALC202A
AC'97 Codec
GIGA LAN
AC'97 Link
12.288MHz@1.536MB/s
PCI Express X1
BCM5721
A A
5
LPC Bus
FWH
4
LPC SIO
NS
PC87366
PS2 - KB
PS2 - MS
Floppy
Parallel Port
3
Serial Port
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
System Block Diagram
Size Document Number Rev
MS-9158
2
Date: Sheet
24 5 Monday, February 16, 2004
1
0B Custom
of
5
4
3
2
1
MS-9158 POWER DELIEVERY DIAGRAM
D D
P12V_CPU
31.88A
+12V
20.795A+?
C C
VCC5
B B
21.304A+?
(1.2*95)/(12*0.8)=11.875
11.875A
VRD10.1 CPU
Switch Reg
7A
Fan*3
5.8A
PCI[0:2]
9.5mA+?
P5V_AUD
Linear Reg
4.4A
PCI Express X16
0.5A
PCI Express X1
3A
PWR1394
Power Isolation
5.35A
Switch
19.65A
95A
1.5A
VCC_DDR2 5VDUAL
Switch
AD1981B
J1394CON1
1.65A
18A
VCC3
MCH
DIMMx4
0.56A
0.107A
0.18A
95.4mA
7.6mA
4.4A
0.5A
CK410
FWH
ICH6
1394
PCI[0:2]
PCI Express X16
PCI Express X1
5VSB
1.597A+?
5mA+?
5VDUAL USB*6
Switch
1.592A+?
3VSB
U114
5mA
(Note 3)
?mA
400mA
388mA
6mA
400mA
475mA
(Note 4)
Keyboard
& Mouse
P1V_STBY
Linear Reg
ICH6
ADT7463*2
BCM5721
PCI[0:2]
3mA
EEPROM(U43)
AT25160
95.4mA
V_1P5_CORE
1394
15A
PCI[0:2]
A A
5
6.61A
MCH
ICH6
0.86A
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Power Delivery Block Diagram
Size Document Number Rev
MS-9158
4
3
2
Date: Sheet
34 5 Monday, February 16, 2004
1
0B Custom
of
5
4
3
2
1
MS-9158 CLOCK BLOCK DIAGRAM
D D
DDR2A_CMDCLK_A0_P/N
DDR2A_CMDCLK_A1_P/N
CPU0
CPU1
CPU0
C C
3V66_3
USB_48
SMA
CONNECTOR
14.318MHZ
Crystal
B B
PCI2
REF0
DOT_48
PCI3
SRC
PCIF0
PCIF1
PCI0
PCIF2
PCI2
MCH_BCLK_P/N (200MHZ)
MCH_100MHZ_CLKP/N
ITP_BCLK_P/N (200MHZ)
ICH_DMI_100MHZ_CLKP/N
ICH_USB_48MHZ_CLK
ICH_33MHZ_CLK
ICH_14MHZ_CLK
SIO_48MHZ_CLK
SIO_33MHZ_CLK
SRC_100MHZ_CLK_P/N
PCI_SLOT0_33MHZ_CLK
PCI_SLOT1_33MHZ_CLK
MPCI_33MHZ_CLK
1394_33MHZ_CLK
FWH_33MHZ_CLK
2
2
ITP_XDP
32.768KHZ
Crystal
ICH6
SIO
2
PCI 32/33 ( SLOT # 1 )
PCI 32/33 ( SLOT # 2 )
MINI PCI 32/33 ( SLOT # 3 )
24.576MHZ
Crystal
IEEE 1394
FWH
MCH
DDR2B_CMDCLK_B0_P/N
DDR2B_CMDCLK_B1_P/N
SRC1
SRC1#
EXP_SLOT1_100MHZ_CLK_P/N
SRC2
SRC2#
EXP_SLOT1_100MHZ_CLK_P/N
SRC3
SRC3#
SRC4
SRC4#
MCH_SRC_100MHZ_CLK_P/N
ICHSATA_SRC_100MHZ_CLK_P/N
SRC5
SRC5#
SRC6
SRC6#
ICH_SRC_100MHZ_CLK_P/N
LAN_SRC_100MHZ_CLK_P/N
2
2
2
2
DDR II DIMM # A1
DDR II DIMM # B1
2
DDR II DIMM # A2
DDR II DIMM # B2
PCI EXPRESS X16 SLOT # 1
PCI EXPRESS X1 SLOT # 1
SATA
BCM5721
25MHZ
Crystal
A A
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
System Clock Block Diagram
Size Document Number Rev
MS-9158
5
4
3
2
Date: Sheet
44 5 Monday, February 16, 2004
1
0B Custom
of
5
4
3
2
1
MS-9158 SYSTEM RESET BLOCK DIAGRAM
INIT_N
Voltage
Translation
Logic
VIDPWRGD
PWRGOOD
DBR_N
DBR_RESET_N
IDE_RST_N
PCIRST_SIO_FWH_N
PCIRST_1394_N
VID_GD
VID_PWRGD
CPU_PWR_GD
0-ohm
IDE
RST_N
RST_N
FP_RESET_N
FWH
1394
CPU_VRD_PWR_GD
VTT_PWRGD
CPU0 VRD
OUTEN
CPU0_VID[5:0] PWR_GD
D D
CPU BSEL[0:2] VTT_PWRGD
BSEL comparator
circuit
VTT_GD
ENABLE
1.2V Reg
PWRGD
VTT_PWRGD
VTT_PWRGD VTT_PWRGD_N CK409B_PWR_GD_N
PWROK_N
VCC3_CLK
PWRGD
RSTIN_N PCIRST_MCH_N
4.7K-ohm
ALDERWOOD
CK410
PWRDWN_N
CPURST_N
3.3V
Prescott or Tejas
VTTEN
(LGA775 CPU)
RESET_N
ITP_XDP
C C
ICH_PWRBTN_N
PWRBTN_N
FP_RESET_N
ASR SLP_S5_N
CPU_VRD_PWR_GD
3.3V STBY
SYS_PWR_GD_3_3V
RSM_RST_N
SYS_RESET_N
VRMPWRGD
PWROK
RSMRST_N
PLTRST_ICH6_N
ICH6
LAN_RST_N
RSM_RST_N
INI T_N
SLP_S3_N
SLP_S4_N
SLP_S5_N
Sus_STAT_N
CPU_PWR_GD
PCIRST_N
10K
SB_CPU_INIT_N
SLP_S3_N
SLP_S4_N
SUS_STAT_N
CPU_PWR_GD
RESET_N
B B
PWR_OK
AND
LOGIC
PLTRST_MCH_N
PCIRST_SLOT_N
RST_N PCI 32 (SLOT 1&2&MiniPCI)
MCH
PLTRST_EXP_SLOT_N PCI EXPRESS (SLOT # 1)
GPIO_LAN_DIS_N LAN_ENABLE
RSMRST_N
A A
AND
LOGIC
PS_ON_N PWR_OK PWR_OK PSON_N
Power Supply
5
PS_PWR_GD
LAN_DIS_N
BCM5721
BTX_PDG_N
4
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
System Reset Block Diagram
Size Document Number Rev
MS-9158
3
2
Date: Sheet
54 5 Monday, February 16, 2004
1
0B Custom
of
5
D D
4
3
2
1
MS-9158 SMBus Block Diagram
ICH6
3.3V STBY
ICH_SMB*
3.3V
DDR CHA
DIMM A1
R
SMBus
ISOATATION
R
* Slave Address = 0XA0
DIMM A2
* Slave Address = 0XA2
DDR CHB
DIMM B1
* Slave Address = 0XA4
DIMM B2
* Slave Address = 0XA6
BCM
C C
PCI-Express X16 Slot
B B
5721 GbE
R
0-OHM
(EMPTY)
SMBUS ISOLATE
0-OHM
(EMPTY)
R
0-OHM
(EMPTY)
CK410
R
PCI-Express X1 Slot
HM ADT7463
VCC5
R
5.1K
PCI 32 / 33 Slot
( SLOT # 1 )
VCC5
R
R
0-OHM
(EMPTY)
5.1K
PCI 32 / 33 Slot
( SLOT # 2 )
Dynamic Bus Addressing for I/O Slots
A A
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
System SMBus Block Diagram
Size Document Number Rev
MS-9158
5
4
3
2
Date: Sheet
64 5 Monday, February 16, 2004
1
0B Custom
of
5
4
3
2
1
MS-9158 DDRII Routing Block Diagram
D D
DIMMA
DIMMB
Signal
CLKP0
CLKN0
CLKP1
CLKN1
CLKP2
CLKN2
CS0
CS2
ODT0
ODT2
CKE0
CKE2
CS1
CS3
ODT1
ODT3
CKE1
CKE3
Signal
CKE0
CKE1
CKE2
CKE3
CLKP3
CLKN3
CLKP4
CLKN4
CLKP5
CLKN5
CS0
CS1
CS2
CS3
C C
ODT0
ODT1
ODT2
ODT3
CKE0
CKE1
CKE2
CKE3
CLKP0
B B
CLKN0
CLKP1
CLKN1
CLKP2
CLKN2
CLKP3
CLKN3
CLKP4
CLKN4
CLKP5
CLKN5
CS0
CS1
CS2
CS3
ODT0
ODT1
ODT2
ODT3
CKE0
CKE1
CKE2
CKE3
CLKP0
CLKN0
CLKP1
CLKN1
CLKP2
CLKN2
CLKP3
CLKN3
CLKP4
CLKN4
CLKP5
CLKN5
CS0
CS1
CS2
CS3
Relative to
DIMMA1,2
DIMMB1,2
DIMMA3,4
DIMMB3,4
Relative to
DIMMA1,2
DIMMB1,2
DIMMA3,4
DIMMB3,4
DIMM PN
193,76
193,76
193,76
193,76
DIMM PN
52,171
52,171
52
52
*Separate Channel A and B
for clocks
A A
5
4
A1
A2
B1
B2
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
DDRII Routing Block Diagram
Size Document Number Rev
MS-9158
3
2
Date: Sheet
74 5 Monday, February 16, 2004
1
0B Custom
of
5
4
3
2
1
MS-9158 INTERRUPT & ERROR LOGIC DIAGRAM
D D
Prescott
Processor
(LGA775)
IERR_N
C C
F
S
B
B B
MEMORY WRITE ( ALDERWOOD to PROCESSOR )
INIT_N
NMI
INTR
CPU0_IERR_N
SMI_N
IGNNE_N
FERR_N
SB_CPU_FERR_N PIRQH_N
SB_CPU_IGNNE_N
ICH_CPU_SMI_N
SB_CPU_NMI
SB_CPU_INTR
SB_CPU_INIT_N
GTL TO 3.3V
TRANSLATION
LOGIC
SB_CPU0_IERR_N
MCH
ALDERWOOD
MEMORY WRITE
( ICH6 TO
ALDERWOOD)
FERR_N
IGNNE_N
SMI_N
NMI
INTR
INIT_N
GPI7
DMI
SIO
SERIRQ
ICH6
IDE IRQ14
IDE Primary
PCI EXPRESS X 1 SLOT
PCI Express
PIRQF_N
PIRQG_N
PB_PERR_N
PB_SERR_N
PIRQA_N
PIRQB_N
PIRQC_N
PIRQD_N
PIRQE_N
Device # 4
IDSEL = AD25
REQ/GNT # 4
PIRQG_N
PIRQG_N
PIRQH_N
PB_PERR_N
PB_SERR_N
PIRQA_N
PIRQB_N
PIRQC_N
PIRQD_N
PIRQE_N
1394A
Device # 3
IDSEL = AD124
REQ/GNT # 3
Mini PCI-32
SLOT
AB
B
Device # 1
IDSEL = AD22
REQ/GNT # 1
PCI-32 SLOT
B
A
Device # 2
IDSEL = AD22
REQ/GNT # 2
PCI-32 SLOT
C
D
C
A
D
A A
5
4
PCI Express
PCI EXPRESS X 16 SLOT
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Interrupt Block Diagram
Size Document Number Rev
MS-9158
3
2
Date: Sheet
84 5 Monday, February 16, 2004
1
0B Custom
of
5
4
3
2
1
MS-9158 HARDWARE MONITOR DIAGRAM
D D
ADT7463 (U25)
CPU VID [ 5 : 0 ]
CPU_THERMAL_DIODE
VCORE
C C
B B
VID [ 5 : 0 ]
RTD ( 1
)
VCCP
ALERT#
PWM1
PWM2
PWM3
TACH1
TACH2
TACH3
+3.3V +3.3V
10K 10K
10K
+3.3V
FET
AMP
FET
AMP
FET
AMP
CPU FAN
SYSTEM FAN1
SYSTEM FAN2
FAN1
FAN2
FAN3
HM0_ALERT_N
GPI8
ICH6
INTRUDER_N
intruder switch
A A
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Hardware Monitor Block Diagram
Size Document Number Rev
MS-9158
5
4
3
2
Date: Sheet
94 5 Monday, February 16, 2004
1
0B Custom
of
5
4
3
2
1
D D
VCC3
C C
B B
VCC3
FB6 80-0805-3A
CB37
0.1u-25V
FB4 80-0805-3A
CB36
0.1u-25V
H_FSBSEL0 11,12,16
H_FSBSEL1 11,12,16
H_FSBSEL2 11,12,16
C152
10u-10V-0805
VCC3VA
C126
10u-10V-0805
SMB_CLK 18,19,33,41
SMB_DATA 18,19,33,41
R199 10K
R191 10K
R154 10K
C171
0.1u-25V
SEL0
SEL1
SEL2
C176
0.1u-25V
Clock Generator - CY28410
42 43
C155
0.1u-25V
C169
0.1u-25V
C137
0.1u-25V
C151
0.1u-25V
C124
0.1u-25V
C123
0.1u-25V
CPU_VDD CPU0#
45
CPU_GND
21 19
SRC_VDD SRC1
28 22
SRC_VDD SRC2
34
SRC_VDD
C175
0.1u-25V
29
SRC_GND
37
VDDA
38
VSSA
1
PCI_VDD
2
PCI_GND
7
PCI_VDD
6
PCI_GND
11
48_VDD
13
48_GND
48
REF_VDD
51
REF_GND
46
SCLK
47
SDATA
18
FSA
16
FSB/TEST_MODE
53
FSC/TEST_SEL
U16
CPU0
CPU1
CPU1#
CPU2_ITP/SRC7
CPU2_ITP#/SRC7#
SRC1#
SRC2#
SRC3
SRC3#
SRC4_SATA
SRC4_SATA#
SRC5
SRC5#
SRC6
SRC6#
DOT96
DOT96#
PCIF0/ITP_EN
PCIF1
PCIF2
PCI0
PCI1
PCI2
PCI3
PCI4
PCI5
USB_48M
REF
VTT_PWRGD#/PD
IREF
ICS954101DF
X1
X2
Trace length less than 0.5inchs
MCHCLK
44
MCHCLK#
CPUCLK
41
CPUCLK#
40
ITPCLK
36
ITPCLK#
35
CK_PE_SRC1
CK_PE_SRC1#
20
CK_PE_SRC2
CK_PE_SRC2#
23
CK_PE_SRC3
24
CK_PE_SRC3#
25
CK_PE_SRC4
26
CK_PE_SRC4#
27
CK_PE_SRC5
31
CK_PE_SRC5#
30
CK_PE_SRC6
33
CK_PE_SRC6#
32
14
15
PCICLK1
8
PCICLK0
9
PCICLK2
10
PCICLK3
54
ICHPCLK
55
FWHPCLK
56
SIOPCLK
3
4
5
SIO48 CK_48M_ICH_SIO
USB48
12
52
50
49
17
IREF
39
R164 33R
R178 33R
R187 33R
R195 33R
R207 33R
R212 33R
R194 33R
R201 33R
R211 33R
R216 33R
R223 33R
R230 33R
R256 33R
R237 33R
R253 33R
R224 33R
R227 33R
PCI clock follow routing direction
R152 33R
R163 33R
R172 33R
R149 33R
R142 33R
R135 33R
R147 33R
R183 33R
R181 33R
R155 33R
PLL_XI
PLL_XO
CLK_GD#
Y2
14M-32pf-HC49S-D
R202 475RST
22p C130
22p C129
CK_H_MCH
CK_H_MCH#
CK_H_CPU
CK_H_CPU#
CK_H_ITP
CK_H_ITP#
CK_PE_100M_16PORT
CK_PE_100M_16PORT#
CK_PE_100M_1PORT
CK_PE_100M_1PORT#
CK_PE_100M_MCH
CK_PE_100M_MCH#
CK_ICHSATA
CK_ICHSATA#
CK_PE_100M_ICH
CK_PE_100M_ICH#
CK_PE_100M_LAN
CK_PE_100M_LAN#
PCI_CLK1
PCI_CLK0
1394_33MHZ_CLK
MPCI_CLK
ICH_PCLK
FWH_PCLK
SIO_PCLK
CK_48M_ICH_USB
CK_14M_ICH
CK_H_MCH 14
CK_H_MCH# 14
CK_H_CPU 11
CK_H_CPU# 11
CK_H_ITP 40
CK_H_ITP# 40
CK_PE_100M_16PORT 21
CK_PE_100M_16PORT# 21
CK_PE_100M_1PORT 25
CK_PE_100M_1PORT# 25
CK_PE_100M_MCH 14
CK_PE_100M_MCH# 14
CK_ICHSATA 23
CK_ICHSATA# 23
CK_PE_100M_ICH 22
CK_PE_100M_ICH# 22
CK_PE_100M_LAN 28
CK_PE_100M_LAN# 28
PCI_CLK1 26
PCI_CLK0 26
1394_33MHZ_CLK 27
MPCI_CLK 25
ICH_PCLK 22
FWH_PCLK 30
SIO_PCLK 32
CK_48M_ICH_SIO 32
CK_48M_ICH_USB 23
CK_14M_ICH 23
CK_H_CPU
CK_H_CPU#
CK_H_MCH
CK_H_MCH#
CK_H_ITP
CK_H_ITP#
CK_PE_100M_16PORT
CK_PE_100M_16PORT#
CK_PE_100M_1PORT
CK_PE_100M_1PORT#
CK_PE_100M_MCH
CK_PE_100M_MCH#
CK_ICHSATA
CK_ICHSATA#
CK_PE_100M_ICH
CK_PE_100M_ICH#
CK_PE_100M_LAN
CK_PE_100M_LAN#
1394_33MHZ_CLK
PCI_CLK1
PCI_CLK0
MPCI_CLK
ICH_PCLK
FWH_PCLK
SIO_PCLK
CK_48M_ICH_USB
CK_48M_ICH_SIO
R188 49.9RST
R196 49.9RST
R165 49.9RST
R179 49.9RST
R208 49.9RST
R213 49.9RST
R193 49.9RST
R200 49.9RST
R210 49.9RST
R215 49.9RST
R222 49.9RST R249 33R
R229 49.9RST
R248 49.9RST
R255 49.9RST
R238 49.9RST
R254 49.9RST
R225 49.9RST
R228 49.9RST
EMC HF filter capacitors, located close to PLL
C194
X_0.1u-25V
VCC3
C143
X_0.1u-25V
Please close to U1 as possible
C190
X_0.1u-25V
C139
X_0.1u-25V
C119
X_0.1u-25V
X_10p C146
X_10p C134
X_10p C140
X_10p C132
X_10p C128
X_10p C125
X_10p C131
X_10p C150
X_10p C156
C122
X_0.1u-25V
Clock Generator VTT Power Down Block
CLK_GD#
A A
Q22
2N3904S
5
R184 10K
VTTGD
4
VCC3VA
R232 10K
VTT_GD 36,38
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
CK410-CY28410
Size Document Number Rev
MS-9158
3
Date: Sheet
2
of
10 45 Monday, February 16, 2004
1
0B Custom
5
4
3
2
1
R364 0R-0402
CPU SIGNAL BLOCK
TP54
TP50
TP49
TP52
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
H_A#[3..31]
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
B15
C14
D52#
H_A#3
H_A#6
H_A#7
H_A#4
H_A#8
H_A#5
H_A#10
A16#
D29#
H_A#9
H_A#13
H_A#11
H_A#12
H_A#15
H_A#14
AC2
AN3
AN4
A9#
A8#
A7#
A6#
A5#
A4#
D22#
D21#
D20#
D19#
D18#
D10
E10D7E9F9F8G9D11
D17#
A3#
D16#
D15#
DBR#
D14#
C12
VCC_SENSE
D13#
D12#
B12D8C11
A15#
A14#
A13#
A12#
A11#
A10#
D28#
D27#
D26#
D25#
D24#
D23#
F14
G13
E13
D13
F12
F11
H_A#28
H_A#25
H_A#27
H_A#31
H_A#26
H_A#24
H_A#29
H_A#30
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
AF5
AB4
AC5
AB5
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
C15
A14
D17
D20
G22
D22
E22
G21
F21
E21
F20
E19
E18
F18
F17
H_A#17
H_A#20
H_A#22
H_A#19
H_A#21
H_A#18
H_A#23
AA5
A24#
D37#
G17
H_A#16
AD6
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5
A23#
A22#
A21#
A20#
A19#
A18#
A17#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
G18
E16
E15
G16
G15
F15
G14
D D
H_DBI#[0..3] 14
C C
VTT_OUT_RIGHT
B B
H_D#[0..63] 14
H_DBI#[0..3]
H_EDRDY# 14
H_IERR# 12,32
H_FERR# 22
H_STPCLK# 22
H_INIT# 22
H_DBSY# 14
H_DRDY# 14
H_TRDY# 14
H_ADS# 14
H_LOCK# 14
H_BNR# 14
H_HIT# 14
H_HITM# 14
H_BPRI# 14
H_DEFER# 14
H_TDI 40
H_TDO 40
H_TMS 40
H_TRST# 40
H_TCK 40
H_THRMDA 33
H_THRMDC 33
TRMTRIP# 22
H_PROCHOT# 12
H_IGNNE# 22
ICH_H_SMI# 22
H_A20M# 22
H_SLP# 22
C303 X_0.1u-25V
R365 X_62R
LL_ID0 36
H_FSBSEL0 10,12,16
H_FSBSEL1 10,12,16
H_FSBSEL2 10,12,16
H_PWRGD 12,22,40
H_CPURST# 12,14,40
H_D#[0..63]
TP55
TP38
TP47
TP22
TP33
TP18
TP9
TP48
TP46
TP51
TP35
TP45
LL_ID0
H_A#[3..31] 14
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
CPU_BOOT
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
VSS_SENSE
TP60
TP57
AN5
AN6
AJ3
AK3
RSVD
RSVD
ITP_CLK1
ITP_CLK0
VSS_SENSE
D11#
D10#
D9#
D8#
D7#
D6#
B10
A11
A10A7B7B6A5C6A4C5B4
FP_RST# 23,40
R377 X_0R-0402
R379 X_0R-0402
ITP_CLKOUT# 40
ITP_CLKOUT 40
TP58
VID4
VID3
VID2
VID1
VID5
AM5
AL4
AK4
AL6
AM3
RSVD
VID5#
VID4#
VID3#
VID2#
GTLREF
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
COMP3
COMP2
COMP1
COMP0
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D5#
D4#
D3#
D2#
D1#
D0#
VID0
AL5
AM2
VID1#
RSVD
RSVD
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
DP3#
DP2#
DP1#
DP0#
TEJAS
VID0#
U22A
VID[0..5]
H1
AG3
AF2
AG2
AD2
AJ1
AJ2
G5
J6
K6
M6
J5
K4
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
VCC_VRM_SENSE VCC_SENSE
VSS_VRM_SENSE
CPU_GTLREF
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_PCREQ#
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
H_RS#2
H_RS#1
H_RS#0
H_COMP3
H_COMP2
H_COMP1
H_COMP0
VCC_VRM_SENSE 36
VSS_VRM_SENSE 36
VID[0..5] 33,36
CPU_GTLREF 12
H_BPM#[0..5]
H_PCREQ# 14
H_REQ#[0..4] 14
R361 62R-0402
R358 62R-0402
R352 62R-0402
R355 62R-0402
R353 62R-0402
V_FSB_VTT
R276 62R-0402
R362 62R-0402
R522 X_62R-0402
R350 X_62R-0402
CK_H_CPU# 10
CK_H_CPU 10
H_RS#[0..2] 14
TP43
TP44
H_BR#0 12,14
R359 100RST-0402
R349 100RST-0402
R360 60.4RST-0402
R305 60.4RST-0402
TP23
TP19
TP24
TP21
H_ADSTB#1 14
H_ADSTB#0 14
H_DSTBP#3 14
H_DSTBP#2 14
H_DSTBP#1 14
H_DSTBP#0 14
H_DSTBN#3 14
H_DSTBN#2 14
H_DSTBN#1 14
H_DSTBN#0 14
H_NMI 22
H_INTR 22
H_BPM#[0..5] 40
VTT_OUT_LEFT
VTT_OUT_LEFT
VTT_OUT_RIGHT
H_TESTHI0
VTT_OUT_LEFT
Place resistor outside socket cavity. If no r o om
for variable resistor, then don't place
VTT_OUT_RIGHT 12,36,38,40
C488
0.1u-25V
C302
X_0.1u-25V
R265 121RST-0402
R560
100RST-0402
VTT_OUT_LEFT 12
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
V_FSB_VTT
VCC3
R533 49.9RST
R532 49.9RST
R531 49.9RST
R530 49.9RST
R528 49.9RST
R526 49.9RST
C202
10u-10V-1206
C203
C204
10u-10V-1206
0.1u-25V
VTT_OUT_RIGHT
C205
0.1u-25V
PLACE BPM TERMINATION NEAR CPU
H_D#44
H_D#46
H_D#48
H_D#53
H_D#50
H_D#49
H_D#52
H_D#51
A A
H_D#[0..63]
H_D#47
H_D#45
H_D#42
H_D#43
H_D#41
H_D#40
H_D#39
H_D#38
H_D#37
H_D#35
H_D#36
H_D#33
H_D#34
H_D#32
H_D#31
H_D#30
H_D#29
H_D#27
H_D#28
H_D#25
H_D#26
H_D#23
H_D#24
H_D#22
H_D#21
H_D#20
H_D#19
H_D#17
H_D#18
H_D#15
H_D#16
H_D#14
H_D#13
H_D#12
H_D#11
H_D#10
H_D#9
H_D#7
H_D#8
H_D#6
H_D#5
H_D#4
H_D#3
H_D#1
H_D#2
H_D#0
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Intel LGA775 Signal Block
Size Document Number Rev
MS-9158
5
4
3
2
Date: Sheet
11 45 Monday, February 16, 2004
1
0B Custom
of
5
VCORE
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
VCORE
AF19
AF18
AF15
D D
C C
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AE9
AB8
AA8
VCORE
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y30
Y8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y24
Y25
Y26
Y27
Y28
Y29
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W25
W26
W27
W28
W29
W30W8Y23
VCC
VCC
W24
VCC
VCC
W23
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U29
U30U8V8
AH14
VCC
VCC
U28
AH15
VCC
VCC
U27
AH18
VCC
VCC
U26
AH19
VCC
VCC
U25
AH21
VCC
VCC
U24
AH22
VCC
VCC
4
AH25
VCC
VCC
AH26
T30T8U23
VCC
VCC
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
VCC
VCC
AJ12
VCC
VCC
AJ14
VCC
VCC
AJ15
VCC
VCC
AJ18
VCC
VCC
N30N8P8R8T23
AJ19
VCC
VCC
N29
AJ21
VCC
VCC
N28
AJ22
N27
VCC
VCC
AJ25
N26
VCC
VCC
AJ26
N25
VCC
VCC
3
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AN8
AN9
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
K26
K27
K28
K29
K30K8L8
M23
M24
M25
M26
M27
M28
M29
M30M8N23
N24
2
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
RSVD
VCC-IOPLL
VTTPWRGD
VTT_OUT
VTT_OUT
VTT_SEL
RSVD/VTT_PKGSENSE
VCC
VCC
VCC
VCC
VCC
AN30
AN29
AN26
AN25
TEJAS
U22B
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
H_VCCA
A23
H_VSSA
B23
D23
H_VCCIOPLL
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
VCCFUSEPRG
D29
VIDFUSEPRG
D30
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
R269
R267
0R-0402
0R-0402
VTT_PWR 38
R264 X_1K-0402
VTT_SEL
TEJ/PSC
0
1
RSVD
1
V_FSB_VTT
VCC3
V_FSB_VTT
B B
DC voltage drop should
be less than 70mV.
A A
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
It support DC current if 100mA.
L11 1uH-0805-0.1A
R277 X_0R-0402
L12 1uH-0805-0.1A
R291 X_0R-0402
TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12 MILS
V_FSB_VTT
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
R261 470R
R260 470R
R262 470R R270 62R-0402
5
R534
0R-0402
C223
X_1u-10V
EC17
22u-6.3V-1206
H_FSBSEL0
H_FSBSEL1
H_FSBSEL2
EC18
10u-10V-1206
H_FSBSEL0 10,11,16
H_FSBSEL1 10,11,16
H_FSBSEL2 10,11,16
4
H_VCCIOPLL
H_VSSA
C224
X_1u-10V
H_VCCA
VTT_OUT_RIGHT 11,36,38,40
VTT_OUT_LEFT 11
VTT_OUT_RIGHT H_PROCHOT#
VTT_OUT_LEFT
3
VTT_OUT_RIGHT
R354
100RST
R356
210RST
100 OHMS OVER 210 OHMS RESISTORS
C299
1u-10V
Place at CPU end of routing
R375 X_120R-0402
R357 100R
R347 62R
R367 62R-0402
H_PWRGD
H_BR#0
H_CPURST#
C301
220p-16V-0402
H_PROCHOT# 11
H_PWRGD 11,22,40
H_BR#0 11,14
H_CPURST# 11,14,40
H_IERR# 11,32
CPU_GTLREF 11
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
Title
Size Document Number Rev
2
Date: Sheet
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Intel LGA775 Power
MS-9158
1
of
12 45 Monday, February 16, 2004
0B Custom
5
4
3
2
1
GTL_DET 14
D D
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H28
AC4
AE3
AE4D1D14
E23
E24E5E6E7F23F6B13H2J2J3N4P5T2V1W1Y3Y7Y5Y2W7W4V7V6
VSS
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
AA23
VSS
AA24
VSS
AA25
VSS
AA26
VSS
AA27
VSS
C C
B B
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE29
VSS
AE30
AE5
VSS
AE7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF10
AF13
AF16
AF17
AF20
AF23
AF24
AF25
AF26
AF27
AF28
RSVD
VSS
VSS
VSS
VSS
VSS
VSS
AF29
AF3
AF30
AF6
AF7
AG10
AG13
RSVD
VSS
RSVD
VSS
AG16
VSS
AG17
VSS
AG20
VSS
AG23
VSS
VSS
AG24
AG7
VSS
VSS
AH1
VSS
VSS
AH10
VSS
VSS
V30V3V29
V28
V27
V26
V25
V24
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH13
AH16
AH17
AH20
AH23
AH24
AH3
AH6
AH7
AJ10
AJ13
AJ16
AJ17
AJ20
R29
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
P28
P27
P26
P25
P24
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
AL17
AL20
AL23
VSS
VSS
AL24
VSS
VSS
AL27
VSS
VSS
AL28
AL3
VSS
VSS
AL7
VSS
VSS
L28
AM1
VSS
VSS
L27
AM10
VSS
VSS
L26
AM13
VSS
VSS
L25
AM16
VSS
VSS
L24
VSS
VSS
AM17
L23K7K5
VSS
VSS
VSS
VSS
AM20
AM23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM24
AM27
AM28
AM4
H29H3H6H7H8H9J4J7K2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM7
AN1
AN10
AN13
AN16
AN17
AN2
AN20
AN23
AN24
AN27
AN28
AN7B1B11
VSS
VSS
B14
VSS
VSS
VSS
VSS
TEJAS
U22C
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
A A
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Intel LGA775 GND
Size Document Number Rev
MS-9158
5
4
3
2
Date: Sheet
13 45 Monday, February 16, 2004
1
of
0B Custom
5
4
3
2
1
L29
L31
L28
J28
L26
T27
T31
T26
T29
F33
F31
J31
F26
J26
J19
F19
L35
J35
L34
L33
J32
J29
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16
HA17
HA18
HA19
HA20
HA21
HA22
HA23
HA24
HA25
HA26
HA27
HA28
HA29
HA30
HA31
HREQ0
HREQ1
HREQ2
HREQ3
HREQ4
HADSTB0
HADSTB1
HDSTBP0
HDSTBN0
HDINV0
HDSTBP1
HDSTBN1
HDINV1
HDSTBP2
HDSTBN2
HDINV2
HDSTBP3
HDSTBN3
HDINV3
HADS
HBNR
HBPRI
HBREQ0
HCPURST
HDBSY
HDEFER
HDRDY
HEDRDY
HHIT
HHITM
HLOCK
HPCREQ
HRS0
HRS1
HRS2
HTRDY
DCL_CORE_GMCH
ALDERWOOD
REV=1.0
CORE
NB
X_ALDERWOOD
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
HSWING
HSCOMP
HRCOMP
HVREF
HCLKP
HCLKN
1 of 8
U24A
J33
H33
J34
G35
H35
G34
F34
G33
D34
C33
D33
B34
C34
B33
C32
B32
E28
C30
D29
H28
G29
J27
F28
F27
E27
E25
G25
J25
K25
L25
L23
K23
J22
J24
K22
J21
M21
H23
M19
K21
H20
H19
M18
K18
K17
G18
H18
F17
A25
C27
C31
B30
B31
A31
B27
A29
C28
A28
C25
C26
D27
A27
E24
B25
A23
D24
B23
A24
M23
M22
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
HXSWING
HXSCOMP
HXRCOMP
MCH_GTLREF
CK_H_MCH
CK_H_MCH#
H_A#[3..31] 11
D D
H_REQ#[0..4] 11
H_ADSTB#0 11
H_TRDY# 11
H_ADSTB#1 11
H_DSTBP#0 11
H_DSTBN#0 11
H_DBI#0 11
H_DSTBP#1 11
H_DSTBN#1 11
H_DBI#1 11
H_DSTBP#2 11
H_DSTBN#2 11
H_DBI#2 11
H_DSTBP#3 11
H_DSTBN#3 11
H_DBI#3 11
H_ADS# 11
H_BNR# 11
H_BPRI# 11
H_BR#0 11,12
H_CPURST# 11,12,40
H_DBSY# 11
H_DEFER# 11
H_DRDY# 11
H_EDRDY# 11
H_HIT# 11
H_HITM# 11
H_LOCK# 11
H_PCREQ# 11
H_RS#[0..2]
C C
B B
H_RS#[0..2] 11
H_ADSTB#0
H_ADSTB#1
H_DSTBP#0
H_DSTBN#0
H_DBI#0
H_DSTBP#1
H_DSTBN#1
H_DBI#1
H_DSTBP#2
H_DSTBN#2
H_DBI#2
H_DSTBP#3
H_DSTBN#3
H_DBI#3
H_ADS#
H_BNR#
H_BPRI#
H_BR#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DRDY#
H_EDRDY#
H_HIT#
H_HITM#
H_LOCK#
H_PCREQ#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H29
K29
G30
G32
K30
M30
K27
K33
M28
R29
N26
M26
N31
P26
N29
P28
R28
N33
U28
E32
H31
G31
N27
E33
E35
E34
H26
K19
B29
C29
B26
M31
M35
E30
R33
G24
M32
P33
N35
E31
K34
P34
N34
H_D#[0..63] 11
CK_H_MCH 10
CK_H_MCH# 10
U24B
EXP_TXP0
EXP_TXN0
EXP_TXP1
EXP_TXN1
EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9
EXP_TXN9
EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
EXP_COMPO
EXP_COMPI
2 of 8
X_ALDERWOOD
C10
C9
A9
A8
C8
C7
A7
A6
C6
C5
C2
D2
E3
F3
F1
G1
G3
H3
H1
J1
J3
K3
K1
L1
L3
M3
M1
N1
N3
P3
P1
R1
R3
T3
T1
U1
U3
V3
V5
W5
Y10
W10
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
EXP_A_TXP_0 21
EXP_A_TXN_0 21
EXP_A_TXP_1 21
EXP_A_TXN_1 21
EXP_A_TXP_2 21
EXP_A_TXN_2 21
EXP_A_TXP_3 21
EXP_A_TXN_3 21
EXP_A_TXP_4 21
EXP_A_TXN_4 21
EXP_A_TXP_5 21
EXP_A_TXN_5 21
EXP_A_TXP_6 21
EXP_A_TXN_6 21
EXP_A_TXP_7 21
EXP_A_TXN_7 21
EXP_A_TXP_8 21
EXP_A_TXN_8 21
EXP_A_TXP_9 21
EXP_A_TXN_9 21
EXP_A_TXP_10 21
EXP_A_TXN_10 21
EXP_A_TXP_11 21
EXP_A_TXN_11 21
EXP_A_TXP_12 21
EXP_A_TXN_12 21
EXP_A_TXP_13 21
EXP_A_TXN_13 21
EXP_A_TXP_14 21
EXP_A_TXN_14 21
EXP_A_TXP_15 21
EXP_A_TXN_15 21
DMI_MTP_IRP_0 22
DMI_MTN_IRN_0 22
DMI_MTP_IRP_1 22
DMI_MTN_IRN_1 22
DMI_MTP_IRP_2 22
DMI_MTN_IRN_2 22
DMI_MTP_IRP_3 22
DMI_MTN_IRN_3 22
EXP_A_RXP_0 21
EXP_A_RXN_0 21
EXP_A_RXP_1 21
EXP_A_RXN_1 21
EXP_A_RXP_2 21
EXP_A_RXN_2 21
EXP_A_RXP_3 21
EXP_A_RXN_3 21
EXP_A_RXP_4 21
EXP_A_RXN_4 21
EXP_A_RXP_5 21
EXP_A_RXN_5 21
EXP_A_RXP_6 21
EXP_A_RXN_6 21
EXP_A_RXP_7 21
EXP_A_RXN_7 21
EXP_A_RXP_8 21
EXP_A_RXN_8 21
EXP_A_RXP_9 21
EXP_A_RXN_9 21
EXP_A_RXP_10 21
EXP_A_RXN_10 21
EXP_A_RXP_11 21
EXP_A_RXN_11 21
EXP_A_RXP_12 21
EXP_A_RXN_12 21
EXP_A_RXP_13 21
EXP_A_RXN_13 21
EXP_A_RXP_14 21
EXP_A_RXN_14 21
EXP_A_RXP_15 21
EXP_A_RXN_15 21
DMI_ITP_MRP_0 22
DMI_ITN_MRN_0 22
DMI_ITP_MRP_1 22
DMI_ITN_MRN_1 22
DMI_ITP_MRP_2 22
DMI_ITN_MRN_2 22
DMI_ITP_MRP_3 22
DMI_ITN_MRN_3 22
CK_PE_100M_MCH 10
CK_PE_100M_MCH# 10
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
E11
F11
J11
H11
F9
E9
F7
E7
B3
B4
D5
E5
G6
G5
H8
H7
J6
J5
K8
K7
L6
L5
P10
R10
M8
M7
N6
N5
P7
P8
R6
R5
U5
U6
T9
T8
V7
V8
V10
U10
A11
B11
K13
J13
EXP_RXP0
EXP_RXN0
EXP_RXP1
EXP_RXN1
EXP_RXP2
EXP_RXN2
EXP_RXP3
EXP_RXN3
EXP_RXP4
EXP_RXN4
EXP_RXP5
EXP_RXN5
EXP_RXP6
EXP_RXN6
EXP_RXP7
EXP_RXN7
EXP_RXP8
EXP_RXN8
EXP_RXP9
EXP_RXN9
EXP_RXP10
EXP_RXN10
EXP_RXP11
EXP_RXN11
EXP_RXP12
EXP_RXN12
EXP_RXP13
EXP_RXN13
EXP_RXP14
EXP_RXN14
EXP_RXP15
EXP_RXN15
DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3
GCLKP
GCLKN
RSV
RSV
REV=1.0
BOM=CORE
FIN=NB
V_FSB_VTT
HD_SWING VOLTAGE "12 MIL TRACE WIDTH, 10
V_FSB_VTT
MIL TRACE SPACEING"
HD_SWING S/B 1/4*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R308
301RST-0402
A A
R317
102RST-0402
HXSWING
C254
0.01u
GTL_DET 13
5
VCORE +12V V_FSB_VTT
R562
10K
R561
619RST
Q63
2N7002E
4
R300
100RST-0402
R301
210RST-0402
C237
0.1u-25V
MCH_GTLREF
C236
220p-16V-0402
L15 0R-1206
3
+
CT16
330u-6.3V
V_1P5_PCIEXPRESS V_1P5_CORE
R320 24.9RST-0402
C243 10u-10V-0805
C244 10u-10V-0805
R309 60.4RST-0402
GRCOMP
2
HXSCOMP
C248
2.2p
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Alderwood CPU/PCI Signal
Size Document Number Rev
MS-9158
Date: Sheet
R316 20RST-0402
1
HXRCOMP
0B Custom
of
14 45 Monday, February 16, 2004