MSI MS-9151 Schematic 100

MSI

MS-9151 REV 100

Tumwater + ICH5R + PXH Schematics

Table of Contents

TitlePage

01 02 03 04 05 06 07 08 09 10-11

20 PCI-E x16 Slot

30 USB / SATA / IDE Connectors

A A

31 AC'97 AD1981B CODEC 32 PCI-32 SLOTs 33 GbE BCM5721 34 IEEE 1394 35-36 VGA RADEON 7000-M 37 FWH / ASR / PERR / Improper Shutdown 38-39 PXH

41 PCI-X 100MHz Slot support ZCR (Black Color)

43-45 SCSI (AIC-7902W) 46 SIO PC87366 / LEGECY IO Ports 47 I2C Mux. circuits 48 Hardware Monitor ADT7468 49 50-51 52

Table of Contents System Block Diagram Power Delivery Block Diagram System Clock Block Diagram System Reset Block Diagram System SMBus Block Diagram DDRII Routing Block Diagram Interrupt Routing Block Diagram Hardwar Monitor Block Diagram Processor 0 Processor 112-13 Processor Level Shift / ITP Port14 CK409B Clock Gen. / DB800 SRC Buffer15 MCH (Tumwater)16-19

DDRII 40021-27 ICH5-R28-29

PCI-X 133MHz Slot (Green Color)40

PCI-X 100MHz Slot42

Front Panel / Power Connctor System Voltage Regulators NMI / S3 Circuit / 5V Dual Circuit Processor 0 VRD53 Processor 1 VRM54 Manule Part / BOM options55 Revision Change History56

Parts P/N difference between projects

Part Reference OAK/Spruce (BOM default) N3 Memo

N32-1040481-F02 N32-1030091-H06FAN1~FAN4

N59-09M0021-F02 N51-09M0021-F02COM1/COM2

N59-25F0071-F02 N51-25F0041-F02LPT1

N32-1120031-M06JFP1 N32-1080131-H06 N3 use 8 pin header

N3 use 3 pin FAN

with 2 pcs screws

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

Table of Contents

Size Document Number Rev

MS-9151-100

Date: Sheet of

1 56Thursday, June 03, 2004

100Custom

MS-9151 SYSTEM BLOCK DIAGRAM

D D

SCSI Conn ( INTERNAL )

SCSI 0

SCSI Conn ( INTERNAL )

SCSI 1

SCSI Ctrl. AIC7902

SCSI VRegs ( 1.8V & 2.5V )

CPU0 VRD CPU1 VRM

ITP

CPU 0 CPU 1

( NOCONA / JAYHAWK )

( 800MT/S - 6.4GB/S )

( NOCONA / JAYHAWK )

DIMM B3

DIMM B2

DIMM B1 DIMM A1

DIMM A3

DIMM A2

1.8V VRD ( DDR II )

S3 SUPPORT CIRCUITRY

PCI-X ( 100MT/S-800MB/S )

PCI-X 100MHZ SLOT #2

PCI-X 133MHZ SLOT

C C

B B

BroadCom BCM5721

GbE

RJ45

PCI EXPRESS X 16 SLOT # 6

PCI-X 100MHZ SLOT

PCI-X ( 133MT/S-1GB/S )

PCI EXPRESS X4 ( 2GB/S )

PCI EXPRESS X16 ( 8GB/S )

(ZCR)

PXH

PCI 32-BIT 33MHZ 5V ( 133MB/S )

PCI EXPRESS X4 ( 2GB/S )

GROUP A LINKS 4-7

GROUP A LINKS 0

GROUP B & C

MCH

HUB INTERFACE 1.5

CK409B CLOCK

DB800 BUFFER

ICH5-R

PCI 32/33 5V SLOT

S-ATA

DDR II ( 400MT/S )

1.5V VRD (MCH/PXH

/ICH5)

FWH

49LF008A

LPC

USB PORT #0 / #1

USB PORT #2 / #3

USB PORT #4 / #5

PRIMARY ATA-100

1.2V VRD ( FSB VTT )

Super I/O PC87366

SERIAL PORT X 2

PARALLEL PORT

FLOPPY

PS/2 KEYBOARD

PS/2 MOUSE

REAR USB

FRONT USB

IDE

A A

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

System Block Diagram

Size Document Number Rev

MS-9151-100

Date: Sheet of

2 56Wednesday, June 02, 2004

100Custom

(1.275*120)/(12*0.8)=15.94

15.94A

VRD10.1

Switch Reg

D D

C C

B B

A A

31.88A

P12V_CPU

P12V

20.829A+?

P5V

38.235A+?

15.94A

VRM10.1 CPU1

Switch Reg

5.02A

P1V8

Switch Reg

(1.8*26.75)/(12*0.8)=5.02

Fan*4

5.8A

PCI[1:6]

(Note 1)

P5V_AUD AD1981B

Linear RegVR7

PWR1394

Power Isolation

(1.5*12.47)/(5*0.7)=5.35

5.35A

P1V5 MCH

Switch Reg

85mA

Lattice ISP2032E

?mA

PAL16V6 ( U63 )

P2V5_VGA RADEON

VR6

Linear Reg

0.4A

VCC25_A

VR2

Linear Reg

0.4A

VCC25_B

VR3

Linear Reg

LVTTRMPWR _A

D39

Power Isolation

LVTTRMPWR _B

D40

Power Isolation

3A+?

P5V_USB USB*6

Switch

?mA

1394 UB TI_TSB

25A

PCI[2:6]

(Note 2)

120A

6.00A

Q34

19.65A

1.1A

?mA9.5 mA+?

9.5mA

1.5A

6.61A

0.86A

5.00A

?mA?mA

0.8A

?mA

CPU0

P_VTT

Linear Reg

P1V8_AUX

Switch

DDR

Termination

SM2211

J1394CON1

1394_USB1B

ICH5

PXH

7000M

AIC-7902

SCSI_A

SCSI_B

Keyboard & Mouse

(Reference Intel)



6.00A

1.65A

18A

CPU MCH ICH5

MCH

DIMMx6

MS-9151 POWER DELIEVERY DIAGRAM

?mA ?mA

RADEON

P3V3

Note 1: PCI & PCI-X is 0.5A , PCI Express*16 is 3.3A Note 2: PCI & PCI-X is 5A Note 3: 500uA for power down , 2.5mA for wake up Note 4: 20mA for power down , 375mA for wake up

7000M

?mA

P1V8_VGA

VR1 Linear Reg

AIC-7902

0.78A

SVCC18

VR4

Linear Reg

VCC3_CLK

Power Isolation

FB1

VCC3_CLKA

Power Isolation

FB2

VCC3 _SRCLK

FB3

Power Isolation

VCC3 _SRCLK2

FB4

Power Isolation

0.48A

ICH5

0.60A

PXH

0.03A

PC87417

95.4mA

1394

150mA

NC7S08*3

( U89,91,124 )

3mA

EEPROM(U11)

AT24C02N

PCI[1:6]

?mA

JSCSI_BPI

P5V_STBY

0.78A0.36A

0.35A0.35A

CK409B

0.25A0.25A

DB800

1.597A+?

5mA+?

P5V_USB USB*6

Switch

1.592A+?

P3V3_STBY P1V8_STBY

U114 VR5Linear Reg Linear Reg

Title

Size Document Number Rev

Date: Sheet of

5mA

(Note 3)

?mA

?mA 300?mA

300mA

400mA

388mA

20mA

6mA

?mA

38uA

3mA

475mA

(Note 4)

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Power Delivery Block Diagram

MS-9151-100

Keyboard & Mouse

P1V8_STBY

Linear Reg

P1V_STBY

Linear Reg

ICH5

PC87417

ADT7463*2

BCM5721

PCA9545

PCA9557*2

EEPROM(U43)

AT24C32N

PCI[1:6]

bird

300mA

400mA

3 56Wednesday, June 02, 2004

P1V8_AUX

Switch

BCM5721

100Custom

MS-9151 CLOCK BLOCK DIAGRAM

D D

CPU3

CPU2

CPU1

3V66_1

CPU0

C C

3V66_3

USB_48

PCIF0

SMA

CONNECTOR

14.318MHZCrystal

B B

A A

REF0

DOT_48

PCIF1

SRC

PCI1

PCI2

PCI3

PCI4

PCI5

PCIF2

P0_BCLK_P/N (200MHZ)

P1_BCLK_P/N (200MHZ)

MCH_BCLK_P/N (200MHZ)

MCH_66MHZ_CLK

ITP_BCLK_P/N (200MHZ)

ICH_HI_66MHZ_CLK

ICH_USB_48MHZ_CLK

ICH_33MHZ_CLK

ICH_14MHZ_CLK

SIO_48MHZ_CLK

SIO_33MHZ_CLK

SRC_100MHZ_CLK_P/N

PERR_33MHZ_CLK

PCI_SLOT2_33MHZ_CLK

PCI_SLOT3_33MHZ_CLK

1394_33MHZ_CLK

FWH_33MHZ_CLK

BCLK(P/N-1/0)

PAL16V8

PCI 32/33 ( SLOT # 2 )

PCI 32/33 ( SLOT # 3 )

27MHZ Crystal

RADEON 7000M

24.576MHZ Crystal

IEEE 1394

FWH

ITP_XDP

32.768KHZ Crystal

ICH5

SIO



CPU0

CPU1

MCH



ICH_SRC_100MHZ_CLK_P/N

DDRA_CMDCLK_A0_P/N

DDRA_CMDCLK_A1_P/N

DDRA_CMDCLK_A2_P/N

DDRB_CMDCLK_B0_P/N

DDRB_CMDCLK_B1_P/N

DDRB_CMDCLK_B2_P/N

MCH_SRC_100MHZ_CLK_P/N

2 2

DIFF0 DIFF1 DIFF6

SRC

DDR II DIMM #

25MHZ Crystal



DDR II DIMM #

BCM5721

EXP_NW_100MHZ_CLK_P/N

DB800 ( SRC - DIFFERENTIAL BUFFER )

DDR II DIMM #

PCI EXPRESS X16 SLOT # 1

EXP_SLOT1_100MHZ_CLK_P/N

DIFF7

DIFF4

PAPCLKO(6) PAPCLKI

PBPCLKO(6) PBPCLKI

2 PXH_SRC_100MHZ_CLK_P/N

PAPCLKO(0)

PXH

PBPCLKO(0)

PXH_PBPCLKO(0)

PAPCLKO(1)

PAPCLKO(2)

PXH_PAPCLKO(0)

PXH_PAPCLKO(1)

PXH_PAPCLKO(2)

PCI-X SLOT # 5 SUPPORTS ZCR

PCI-X SLOT # 5

PCI-X SLOT # 6

U320 SCSI AIC7902

80MHZ Osc

PCI-X SLOT # 4(133MHZ)

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

System Clock Block Diagram

Size Document Number Rev

MS-9151-100

Date: Sheet of

4 56Wednesday, June 02, 2004

100Custom

MS-9151 SYSTEM RESET BLOCK DIAGRAM

DBR_N

CPU1_SKTOCC_N, CPU BSELSSB_VTT_PWRGD BSEL comparator

CPU0 VRD

OUTEN

SB_VTT_PWRGD

CPU1 VRD

OUTEN

SB_VTT_PWRGD

VIDPWRGD

PWRGOOD

VIDPWRGD

DBR_RESET_N

Voltage Translation Logic

CPU0_VID[5:0]

CPU1_VID[5:0]

VID_PWRGD

CPU_PWR_GD

VID_PWRGD

0-ohm

VID_PWRGD

FP_RESET_N

D D

On-board Power switch ( Debug Only )

C C

Front Panel

FWH

JSCSI_BP1

RST_N

SLP_S3_N

WAKE_N ICH_PWRBTN_N

PME_N

SLP_S4_N

GPIO_WOL_EN_N

FP_PWRBTN_NFP_BTN_N

PCIRST_BUFF3_N

ASR

3.3V STBY

DAL16V6

B B

PCI 32 (SLOT # 2) RST_N

PCI 32 (SLOT # 3) RST_N

PCIRST_BUFF1_N

PWR_OKPS_ON_N PS_PWR_GDPSON_N SYS_PWR_GD_3_3V

Power Supply

JRST1

Note: O=(AB+C+D)(E)

ICH_PWRBTN_N

FP_RESET_N

CPU_VRD_PWR_GD

SYS_PWR_GD_3_3V

RSM_RST_N

PWRBTN_N

SYS_RESET_N

VRMPWRGD

PWROK

RSMRST_N

PS_PWR_GD_N

ICH5

Sus_STAT_N

CPU_PWR_GD

LAN_RST_N

RSM_RST_N

SYS_PWR_GD_BUFF1

FP_RESET_N

PS_PWR_GD_N

INI T_N

SLP_S3_N

SLP_S4_N

SLP_S5_N

PCIRST_N

10K

5V Dual Source Switch Circuit

SB_CPU_INIT_N SLP_S3_N

SLP_S4_N

SLP_S5_N

SUS_STAT_N

CPU_PWR_GD

SYS_PWR_GD_3_3V

PCIRST_BUFF2_N

IDE_RSTDRV_N

PCIRST_BUFF1_N

PCIRST_BUFF2_N

PCIRST_BUFF3_N

PCIRST_BUFF4_N

PWRGD

RSTIN_N

CPU_VRD_PWR_GD

TUMWATER

IDE

3.3V

CPURST_N

VTT_EN

circuit

CPU0_PWRGD

CPU1_PWRGD

VTTEN

RESET_N

VTTEN

RESET_N

ENABLE

1.2V Reg

PWRGD

PWR_GD

Nocona (CPU0)

INIT_N

Nocona (CPU1)

ITP_XDP

SB_VTT_PWRGD

RADEON 7000M

1394

SIO

BCM5721

A A

RST_N

LRESET_N

LAN_DIS_N

PWRDWN_N

1394_PCIRST_N

PCIRST_BUFF2_N

LAN_ENABLE GPIO_LAN_DIS_N

4.7K-ohm

AND LOGIC

VCC3_CLK

PCIRST_BUFF1_N GPIO_VGA_DIS_NVGA_PCIRST_N

PCIRST_BUFF1_N GPIO_1394_DIS_N

PCIRST_BUFF2_N

CK409B

CK409B_PWR_GD_N

SB_VTT_PWRGDVTT_PWRGD_N

FP_PWRBTN_N

SYS_PWR_GD_BUFF1

SYS_PWR_GD_3_3V

PCIRST_BUFF4_N

POWER_ON_J

RESET

PWRDG

PWROK

RST IN_N

JMGT1

PCI EXPRESS (SLOT # 1)

PB_PCIRST_N PA_PCIRST_N

PXH

RESET_N

PS_PWR_GD

RST_N PCI-X 133MHZ (SLOT # 4)

RST_N PCI-X 100MHZ (SLOT # 6)

SCSI Controller

PRST_N

ENABLE

1.5V D2D

PWRGD_1_5V

PWR_GD

PCI-X 100MHZ (SLOT # 5)RST_N

1.8V D2D

ENABLE

PWRGD_1_8V

PWR_GD

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

System Reset Block Diagram

Size Document Number Rev

MS-9151-100

Date: Sheet of

RESET_N

DIMM # A1

DIMM # A2

DIMM # A3

DIMM # B1RESET_N

DIMM # B2

DIMM # B3

5 56Wednesday, June 02, 2004

100Custom

MS-9151 SMBus Block Diagram

D D

ICH5-R

* Slave Address = 0X44

3.3V STBY

ICH_SMB*

HM ADT7463

* Slave Address = 0X58

3.3V

DDR CHA DDR CHB

DIMM A1

* Slave Address = 0XA0 * Slave Address = 0XA8

JMGT1

* Slave Address = ???

C C

BCM

DIMM A2

DIMM A3

5721 GbE

* Slave Address = ???

3.3V

PCA9545

SMBus Repeater

2 0

* Slave Address = 0XE0

B B

DIMM_SMB*

MCH_SMB*

TUMWATER

* Slave Address = 0X60

* Slave Address = 0XC0

HM ADT7468

* Slave Address = 0X5C

PXH

* Slave Address = 0XAA* Slave Address = 0XA2

* Slave Address = 0XAC* Slave Address = 0XA4

DIMM B1

DIMM B2

DIMM B3

0-OHM (EMPTY)

3.3V STBY

5.1K

3.3V STBY

5.1K

3.3V STBY

5.1K

3.3V STBY

5.1K

3.3V STBY

5.1K

3.3V STBY

5.1K

PCI-Express X16 Slot

( SLOT # 1 )

PCI 32 / 33 Slot

( SLOT # 2 )

PCI 32 / 33 Slot

( SLOT # 3 )

PCI-X 133 Slot

( SLOT # 4 )

PCI-X 100 Slot (ZCR)

( SLOT # 5 )

PCI-X 100 Slot (ZCR)

( SLOT # 6 )

Dynamic Bus Addressing for I/O Slots

CK409B

* Slave Address = 0XD2

DB800

* Slave Address = 0XDC

P5V3.3V

3.3V STBY

PCA9557PW

* Slave Address = 0X30

PWR BP

A A

IDE_RSTDRV_N

I2C_PWR

* Slave Address = 0XA0, 0XA2, 0XA6, 0X46, 0X76

Isolate Logic

EEPROM

* Slave Address = 0XAE

SCSI BP I2C_DASD

* Slave Address = 0X40, 0X90, 0X9C 0XA0, 0XA4, 0XE2

PCA9557PW

* Slave Address = 0X32

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

System SMBus Block Diagram

Size Document Number Rev

MS-9151-100

Date: Sheet of

6 56Wednesday, June 02, 2004

100Custom

RANK2 RANK3(/2) RANK4(/1)

D D

CS0 CS1

CS2 CS3

CS4 CS5

CS0

ODT0

CS0

ODT0

CS1

ODT1

CS0 CS0

ODT0 ODT0

CS1

ODT1

CS6 CS7

C C

CKE0 CKE1 CKE2 CKE3 CKE4 CKE5 CKE6 CKE7

CKE0

CKE1

CKE0

CS1 CS1

ODT1 ODT1

CS0 CS0

ODT0 ODT0

CKE1

CKE0

Signal Relative to

CS0 CS1 CS2 CS3 CS4 CS5 CS6 CS7

Signal Relative to

CKE0 CKE1 CKE2 CKE3 CKE4 CKE5 CKE6 CKE7

DIMM3 DIMM3 DIMM1,2 DIMM1,2 DIMM2 DIMM2 DIMM3 DIMM3

DIMMA3 DIMMB3 DIMMA1,2 DIMMB1,2 DIMMA2 DIMMB2 DIMMA3 DIMMB3

DIMM PN

76 77 193,76 195,77 193 195 193 195

DIMM PN

171 171 52,171 52,171 52 52 52 52

CMDCLKP0 CMDCLKN0 CMDCLKP1

B B

CMDCLKN1 CMDCLKP2

p185

p186

CMDCLKN2 CMDCLKP3

p185

p186

p185p185

p186 p186

p185

p186

p185

p186

CMDCLKN3

*Separate Channel A and B for clocks

A1 A2 A3B1 B2 B3

A A

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

DDRII Routing Block Diagram

Size Document Number Rev

MS-9151-100

Date: Sheet of

7 56Wednesday, June 02, 2004

100Custom

MS-9151 INTERRUPT & ERROR LOGIC DIAGRAM

D D

NOCONA /JAYHAWK

IERR_N

SB_CPU1_IERR_N

SB_CPU0_IERR_N

( CPU0 )

MCERR_NMCERR_N

BINIT_NBINIT_N

INTRINTR

C C

F S B

INIT_N INIT_N

IGNNE_NIGNNE_N

NMINMI

FERR_NFERR_N

SMI_NSMI_N

SB_CPU_FERR_N

SB_CPU_IGNNE_N SB_CPU_INIT_N SB_CPU_INTR ICH_CPU_SMI_N

SB_CPU_NMI

NOCONA /JAYHAWK ( CPU1 )

SB_CPU1_IERR_N

B B

MEMORY WRITE ( MSI - TUMWATER to PROCESSOR )

SB_MCERR_N

SB_BINIT_N

MSI (UPSTREAM) PCI Express

IERR_N

MCERR_N

BINIT_N

GTL TO 3.3V TRANSLATION LOGIC

External NMI Logic (P.52)

GPIO_NMI_N

MCH

CPU1_IERR_N

CPU0_IERR_N

IGNNE_N INIT_N INTR SMI_N

GPIO40

FERR_N

MEMORY WRITE (MSI - ICH5 TO TUMWATER

HI 1.5

SIO

SIO_SMI_N

GPI2

GPI3

ICH5

GPI15

IDE IRQ14

PIRQG_N PIRQH_N PB_PERR_N PB_SERR_N PIRQA_N PIRQB_N PIRQC_N PIRQD_N

IDE Primary

PXH PCI Bus B Device # 1 System slot IDSEL = AD17 REQ/GNT B # 0



PXH PCI Bus A Device # 2 System slot IDSEL = AD18 REQ/GNT B # 1

PCI-X 133 PCI-X 100 PCI-X 100 (ZCR)

A A AB B BC C CD D D

ICH5 Internal PIRQ assignment : PIRQA-- USB1.1 Controller # 1 & 4 PIRQB-- SMBUS, AC'97, Modem, CSA PIRQC-- USB1.1 Controller # 3, Native IDE, S-ATA PIRQD-- USB1.1 Controller # 2 PIRQE-- LAN ( DEVICE 8 ) PIRQH-- USB2.0 Controller #1



Device # 4 IDSEL = AD20 REQ/GNT # 3

TDI

Device # 3 IDSEL = AD19 REQ/GNT # 2

VGA 1394A

PXH PCI Bus A Device # 1 System slot IDSEL = AD17 REQ/GNT B # 0



PXH PCI Bus A Device # 3 IDSEL = AD19 or Control logic if MROMB card is present REQ/GNT B # 2

Device # 1 IDSEL = AD17 REQ/GNT # 0

PCI-32 SLOT

A B C D



SCSI Controller

INTA_N INTB_N

PERR_N

SERR_N

Device # 2 IDSEL = AD18 REQ/GNT # 1

PCI-32 SLOT

A B C D

82570EI

PCI EXPRESS X 16 SLOT

A A

MSI ( UPSTREAM )

PCI

Express

MEMORY WRITE (MSI - PXH to TUMWATER)

PCI

Express

PBIRQ_N (0)

PBIRQ_N (1)

PBIRQ_N (3)

PBIRQ_N (2)

PBIRQ_N (4)

PBIRQ_N (5)

PB_PERR_N

PB_SERR_N

MROMB_PRESENT_N

ENB

PXH

PB_PERR_N

PAIRQ_N (3)

PAIRQ_N (2)

PAIRQ_N (0)

PAIRQ_N (1)

PAIRQ_N (5)

PAIRQ_N (4)

Title

Size Document Number Rev

Date: Sheet of

PB_SERR_N

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Interrupt Routing Block Diagram

MS-9151-100

PAIRQ_N (7)

PAIRQ_N (6)

8 56Wednesday, June 02, 2004

100Custom

MS-9151 HARDWARE MONITOR DIAGRAM

D D

ADT7468 (U39)

CPU0 VID [ 5 : 0 ]

CPU0_THERMAL_DIODE

CPU1_THERMAL_DIODE

P_VCCP0

C C

VID [ 5 : 0 ]

RTD ( 1 )

RTD ( 2 )

VCCP

THERM#

ALERT#

PWM1

PWM2

PWM3

TACH1

TACH2

TACH3

TACH4

CPU0_PROCHOT_N

CPU0

FAN4

FAN1

FAN3

FAN2

HM1_ALERT_N

GPI9

GPI10

ICH5-R

INTRUDER_N

ADT7463 (U40)

intruder switch

CPU1 VID [ 5 : 0 ]

B B

P_VCCP1

VID [ 5 : 0 ]

VCCP

THERM#

ALERT#

CPU1_PROCHOT_N

CPU1

A A

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

Hardwar Monitor Block Diagram

Size Document Number Rev

MS-9151-100

Date: Sheet of

9 56Wednesday, June 02, 2004

100Custom

CPU1A

SB_BPRI_N12,17

SB_CPU0_BREQ_23_N SB_BREQ_N1 SB_BREQ_N0

SB_CPURST_N

D D

C C

B B

SB_RS_N212,17

SB_RS_N112,17

SB_RS_N012,17

SB_RSP_N12,17

SB_CPU_A20M_N SB_CPU_IGNNE_N SB_CPU_INIT_N NMI SB_CPU_INTR

CPU_PWR_GD ICH_CPU_SMI_N

SB_CPU_SLP_N SB_CPU_STPCLK_N

P0_BCLK_N15

P0_BCLK15

ITP_TCK014

ITP_TDI_P014

OUT

ITP_TDO_P014

ITP_TMS12,14

ITP_TRST_N12,14

CPU0_VTT_BSEL1 CPU0_VTT_BSEL0

OUT

OUT OUT OUT OUT OUT OUT IN

PU_VCCPLL_CPU0 VTT_EN

P_VCCP_A_CPU0

AGND_CPU0

P_VTT

VID_CPU0_R548,53 VID_CPU0_R448,53 VID_CPU0_R348,53 VID_CPU0_R248,53 VID_CPU0_R148,53 VID_CPU0_R048,53

VID_PWRGD12,50

P0_VCCSENSE53

P0_VSSSENSE53

Sighting #23

D23 D10 E11 F12 D20

F21 D22 E21

F27 C26

D6 G23 B24

AB7 C27

AE6

E24 C24 E25 A25 F24

AA28 AA29 AB28 AB29 AC29 AD28 AD29 AE30

AB3 AA3

AD1 AD4

AB4 B27

AA5 D26

R1 49.9R1%

BPRI_N BR3_N BR2_N BR1_N BR0_N

RESET_N RS2_N

RS1_N RS0_N RSP_N

A20M_N IGNNE_N INIT_N LINT1_NMI LINT0_INTR

NOCONA 1/5

PWRGOOD SMI_N

SLP_N STPCLK_N

BCLK1

BCLK0 TCK

TDI TDO TMS TRST_N

N/C N/C N/C N/C N/C N/C N/C N/C

BSEL1 BSEL0

VID5

VID4 VID3 VID2

VID1

VID0

VIDPWRGD VCCPLL

VTTEN VCCIOPLL VCCA VCCSENSE

VSSA VSSSENSE

SOCKET_604

Put the VREF & VCCA in the Cavity

775 mV

90.9R1%

Trace Width >= 12 mil

C1 C1U16X50805

FERR_N/PBE_N

THERMTRIP_N

PROCHOT_N

BOOT_SELECT

FORCEPR_N

OPTIMIZED_COMPAT_N

84.5R1% -->90.9R1%

R19 49.9R1%

84.5R1% -->90.9R1%

Place close to pin AD4

L1 10U150m_1210

P_VTT

A A

L2 10U150m_1210

R22

90.9R1%

775 mV Trace Width >= 12 mil

C4 C1U16X50805

Trace Width >= 12 mil

P_VCCP_A_CPU0

C7 C22U16Y1210

AGND_CPU0

Place between pin AB4 & AA5

Place close to pin AB4

Trace Width >= 12 mil

PU_VCCPLL_CPU0

C8 X_C4.7U10Y1206

C9 X_C0.1U16X

Notes: Value X_ means non-stuff

R42 X_0R

P1V5

EC1 X_CD470U6.3EL11

D19

ADS_N

F11

BINIT_N

F20

BNR_N

BPM5_N

BPM4_N

BPM3_N

BPM2_N

BPM1_N

BPM0_N

F18

DBSY_N

C23

DEFER_N

E18

DRDY_N

E22

HIT_N

A23

HITM_N

E19

TRDY_N

A17

LOCK_N

MCERR_N

IERR_N

E27 F26 B25

AC28

COMP3

D25

COMP2

E16

COMP1

AD16

COMP0

GTLREF3

F23

GTLREF2

GTLREF1

W23

GTLREF0

ODTEN

SKTOCC_N

TESTHI0

TESTHI1

TESTHI2

TESTHI3

AA7

TESTHI4

AD5

TESTHI5

AE5

TESTHI6

A26

TESTHI7

Y29

TESTHI8

A16

TEST_BUS

RESERVED

AC1

RESERVED

AE15

RESERVED

AE16

RESERVED

AE29

RESERVED

AE28

RESERVED

AE4

SMB_PRT

Y28

THERMDC

Y27

THERMDA

G7 A15 AC30

SLEW_CTRL

VREF_P_VTT_CPU0_0

C2 C220P50N

VREF_P_VTT_CPU0_3

C5 C220P50N

C10 X_C0.1U16X

SB_CPU0_IERR_N SB_CPU_FERR_N SB_CPU_THERMTRIP_N SB_CPU0_PROCHOT_N

PU_COMP3_CPU0 PU_COMP2_CPU0 PD_COMP1_CPU0 PD_COMP0_CPU0

VREF_P_VTT_CPU0_3 VREF_P_VTT_CPU0_0

PU_ODTEN_CPU0 CPU0_SKTOCC_N

PU_CPU0_0 PU_CPU0_1 PU_CPU0_2 PU_CPU0_3 PU_CPU0_4 PU_CPU0_5 PU_CPU0_6 PU_CPU0_7 PU_CPU0_8

PU_BOOT_SELECT_CPU0 SB_CPU0_FORCEPR_N CPU0_SLEW_CTRL CPU0_OPTIM_COMPAT_CTRL

C3 C220P50N

C6 C220P50N

SB_ADS_N 12,17

SB_BINIT_N 12,17

SB_BNR_N 12,17

CPU_BPM_N5 12,14

CPU_BPM_N4 12,14

CPU_BPM_N3 12,14

CPU_BPM_N2 12,14

CPU_BPM_N1 12,14

CPU_BPM_N0 12,14

SB_DBSY_N 12,17

SB_DEFER_N 12,17

SB_DRDY_N 12,17

SB_HIT_N 12,17

SB_HITM_N 12,17

SB_TRDY_N 12,17

SB_LOCK_N 12,17

SB_MCERR_N 12,17

SB_CPU0_CPU1_TESTBUS 12

OUT

CPU0_THERMDC 48

OUT

CPU0_THERMDA 48

P_VTT

R2 220R R4 220R R6 220R R9 220R R11 220R R12 220R R13 220R R14 220R R15 51R R17 510R R18 510R

R21 X_51R R23 51R R1198 51R R1199 51R

R24 51R R25 330R R28 X_51R R29 X_51R R31 51R R32 51R R34 51R R35 51R R36 51R R37 51R R38 51R

R39 X_51R R40 X_51R R41 X_51R

SB_D_N6312,17 SB_D_N6212,17 SB_D_N6112,17 SB_D_N6012,17 SB_D_N5912,17 SB_D_N5812,17 SB_D_N5712,17 SB_D_N5612,17 SB_D_N5512,17 SB_D_N5412,17 SB_D_N5312,17 SB_D_N5212,17 SB_D_N5112,17 SB_D_N5012,17 SB_D_N4912,17 SB_D_N4812,17 SB_D_N4712,17 SB_D_N4612,17 SB_D_N4512,17 SB_D_N4412,17 SB_D_N4312,17 SB_D_N4212,17 SB_D_N4112,17 SB_D_N4012,17 SB_D_N3912,17 SB_D_N3812,17 SB_D_N3712,17 SB_D_N3612,17 SB_D_N3512,17 SB_D_N3412,17 SB_D_N3312,17 SB_D_N3212,17 SB_D_N3112,17 SB_D_N3012,17 SB_D_N2912,17 SB_D_N2812,17 SB_D_N2712,17 SB_D_N2612,17 SB_D_N2512,17 SB_D_N2412,17 SB_D_N2312,17 SB_D_N2212,17 SB_D_N2112,17 SB_D_N2012,17 SB_D_N1912,17 SB_D_N1812,17 SB_D_N1712,17 SB_D_N1612,17 SB_D_N1512,17 SB_D_N1412,17 SB_D_N1312,17 SB_D_N1212,17 SB_D_N1112,17 SB_D_N1012,17

SB_D_N912,17 SB_D_N812,17 SB_D_N712,17 SB_D_N612,17 SB_D_N512,17 SB_D_N412,17 SB_D_N312,17 SB_D_N212,17 SB_D_N112,17 SB_D_N012,17

SB_CPU_A20M_N SB_CPU_SLP_N NMI SB_CPU_INTR ICH_CPU_SMI_N SB_CPU_INIT_N SB_CPU_IGNNE_N SB_CPU_STPCLK_N SB_CPU_FERR_N VTT_EN CPU0_VTT_BSEL0 CPU0_VTT_BSEL1

SB_CPU0_FORCEPR_N SB_CPU0_BREQ_23_N SB_BREQ_N0 SB_BREQ_N1

PU_ODTEN_CPU0 CPU_PWR_GD PU_CPU0_8 PU_CPU0_7 PU_CPU0_6 PU_CPU0_5 PU_CPU0_4 PU_CPU0_3 PU_CPU0_2 PU_CPU0_1 PU_CPU0_0

PU_BOOT_SELECT_CPU0 CPU0_OPTIM_COMPAT_CTRL CPU0_SLEW_CTRL

R43 X_0R

R44 X_51R

OUT OUT OUT

IN IN IN IN IN IN IN IN

CPU1B

AB6

D63_N

D62_N

AA8

D61_N

AC5

D60_N

AC6

D59_N

AE7

D58_N

AD7

D57_N

AC8

D56_N

AB10

D55_N

AA10

D54_N

AA11

D53_N

AB13

D52_N

AB12

D51_N

AC14

D50_N

AA14

D49_N

AA13

D48_N

AC9

D47_N

AD8

D46_N

AD10

D45_N

AE9

D44_N

AC11

D43_N

AE10

D42_N

AC12

D41_N

AD11

D40_N

AD14

D39_N

AD13

D38_N

AB15

D37_N

AD18

D36_N

AE13

D35_N

AC17

D34_N

AA16

D33_N

AB16

D32_N

AB17

D31_N

AD19

D30_N

AD21

D29_N

AE20

D28_N

AE22

D27_N

AC21

D26_N

AC20

D25_N

AA18

D24_N

AC23

D23_N

AE23

D22_N

AD24

D21_N

AC24

D20_N

AE25

D19_N

AD25

D18_N

AC26

D17_N

AE26

D16_N

AA19

D15_N

AB19

D14_N

AB22

D13_N

AB20

D12_N

AA21

D11_N

AA22

D10_N

AB23

D9_N

AB25

D8_N

AB26

D7_N

AA24

D6_N

Y23

D5_N

AD27

D4_N

AA25

D3_N

Y24

D2_N

AA27

D1_N

Y26

D0_N

SOCKET_604

SB_CPU_A20M_N 12,28 SB_CPU_SLP_N 12,28 NMI 12,28 SB_CPU_INTR 12,28 ICH_CPU_SMI_N 12,28 SB_CPU_INIT_N 12,28,37 SB_CPU_IGNNE_N 12,28 SB_CPU_STPCLK_N 12,28 SB_CPU_FERR_N 12,28 CPU0_VTT_BSEL0 14 CPU0_VTT_BSEL1 14

SB_CPU0_FORCEPR_N 14

SB_BREQ_N0 12,17

SB_BREQ_N1 12,17

CPU_PWR_GD 12,28

NOCONA 2/5

P_VTT

P3V3

P3V3_STBY

P_VTT

A35_N

A34_N

A33_N

A32_N

A31_N

C11

A30_N

D12

A29_N

E13

A28_N

A27_N

A26_N

D13

A25_N

E14

A24_N

C12

A23_N

B11

A22_N

B10

A21_N

A10

A20_N

F15

A19_N

D15

A18_N

D16

A17_N

C14

A16_N

C15

A15_N

A12

A14_N

B13

A13_N

B14

A12_N

B16

A11_N

A13

A10_N

D17

A9_N

C17

A8_N

A19

A7_N

C18

A6_N

B18

A5_N

A20

A4_N

A22

A3_N

B22

REQ4_N

C20

REQ3_N

C21

REQ2_N

B21

REQ1_N

B19

REQ0_N

AB9

DBI3_N

AE12

DBI2_N

AD22

DBI1_N

AC27

DBI0_N

AP1_N

E10

AP0_N

AE17

DP3_N

AC15

DP2_N

AE19

DP1_N

AC18

DP0_N

F14

ADSTB1_N

F17

ADSTB0_N

Y11

DSTBP3_N

Y14

DSTBP2_N

Y17

DSTBP1_N

Y20

DSTBP0_N

Y12

DSTBN3_N

Y15

DSTBN2_N

Y18

DSTBN1_N

Y21

DSTBN0_N

R3 51R R5 51R R7 51R R10 51R

R16 4.7KR

R20 X_4.7KR

R26 100R1% R27 100R1% R30 49.9R1% R33 49.9R1%

SB_CPU0_IERR_N SB_CPU0_PROCHOT_N SB_CPU_THERMTRIP_N SB_CPURST_N

CPU0_SKTOCC_N

PU_COMP2_CPU0 PU_COMP3_CPU0 PD_COMP0_CPU0 PD_COMP1_CPU0

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

P0 Processor & Termination

Size Document Number Rev

MS-9151-100

Date: Sheet of

SB_A_N35 12,17

SB_A_N34 12,17

SB_A_N33 12,17

SB_A_N32 12,17

SB_A_N31 12,17

SB_A_N30 12,17

SB_A_N29 12,17

SB_A_N28 12,17

SB_A_N27 12,17

SB_A_N26 12,17

SB_A_N25 12,17

SB_A_N24 12,17

SB_A_N23 12,17

SB_A_N22 12,17

SB_A_N21 12,17

SB_A_N20 12,17

SB_A_N19 12,17

SB_A_N18 12,17

SB_A_N17 12,17

SB_A_N16 12,17

SB_A_N15 12,17

SB_A_N14 12,17

SB_A_N13 12,17

SB_A_N12 12,17

SB_A_N11 12,17

SB_A_N10 12,17

SB_A_N9 12,17

SB_A_N8 12,17

SB_A_N7 12,17

SB_A_N6 12,17

SB_A_N5 12,17

SB_A_N4 12,17

SB_A_N3 12,17

SB_REQ_N4 12,17

SB_REQ_N3 12,17

SB_REQ_N2 12,17

SB_REQ_N1 12,17

SB_REQ_N0 12,17

SB_DBI_N3 12,17

SB_DBI_N2 12,17

SB_DBI_N1 12,17

SB_DBI_N0 12,17

SB_AP_N1 12,17

SB_AP_N0 12,17

SB_DP_N3 12,17

SB_DP_N2 12,17

SB_DP_N1 12,17

SB_DP_N0 12,17

SB_ADSTB_N1 12,17

SB_ADSTB_N0 12,17

SB_DSTBP_N3 12,17

SB_DSTBP_N2 12,17

SB_DSTBP_N1 12,17

SB_DSTBP_N0 12,17

SB_DSTBN_N3 12,17

SB_DSTBN_N2 12,17

SB_DSTBN_N1 12,17

SB_DSTBN_N0 12,17

OUT

SB_CPU0_IERR_N 14

OUT

SB_CPU_THERMTRIP_N 12,28

SB_CPURST_N 12,14,17,37

OUT

VTT_EN 12,50

10 56Wednesday, June 02, 2004

100Custom

CPU1C

L31

GND

L29

GND

L27

GND

L25

GND

L23

GND

D D

C C

B B

L7 L5 L3

L1 K30 K28 K26 K24

K2 J31 J29 J27 J25 J23

H30 H28 H26 H24

H8 H6 H4

H2 G31 G29 G27 G25

G1 F30 F28 F25 F19 F13

F2 E31 E29 E23 E17 E15

E9 D30 D28 D27 D21 D11

D2 C31 C29 C25 C19 C13

C7 B30 B28 B23 B17 B15

B2 A31 A29 A27 A21 A11

SOCKET_604

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

NOCONA 3/5

GND

GN1

GN2

GN3

GN4

GN5

GN6

GN7

GN8

GND

GN9

GND

GN10

GND

GN11

GND

GN12

GND

GN13

GND

GN14

GND

GN15

GND

GN16

GND

GN17

GND

GN18

GND

GN19

GND

GN20

AA30 AA23 AA17 AA15 AA9 AA2 Y31 Y25 Y19 Y13 Y7 Y5 Y1 W30 W28 W26 W24 W4 W2 V31 V29 V27 V25 V23 V9 V7 V5 V3 V1 U30 U28 U26 U24 U8 U6 U4 U2 T31 T29 T27 T25 T23 T9 T7 T5 T3 T1 R30 R28 R26 R24 R8 R6 R4 R2 P31 P29 P27 P25 P23 P9 P7 P5 P3 P1 N30 N28 N26 N24 N8 N6 N4 N2 M30 M28 M26 M24 M8 M6 M4 M2 A5

P_VCCP0 P_VCCP0 P_VTT P_VTTP_VCCP0

CPU1D

L28 L26 L24

L8 L6 L4

L2 K31 K29 K27 K25 K23

K1 J30 J28 J26 J24

H31 H29 H27 H25 H23

H9 H7 H5 H3

H1 G30 G28 G26 G24

F31 F29 F22 F16

F1 E30 E28 E26 E20

E2 D31 D29 D24 D18 D14

D1 C30 C28 C22 C16

C2 B31 B29 B26 B20

B6 A30 A28 A24 A18 A14

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

SOCKET_604

NOCONA 4/5

L30 AA31 AA26 AA20 AA6 AA4 AA1 Y30 Y22 Y16 Y2 W31 W29 W27 W25 W1 V30 V28 V26 V24 V8 V6 V4 V2 U31 U29 U27 U25 U23 U9 U7 U5 U3 U1 T30 T28 T26 T24 T8 T6 T4 T2 R31 R29 R27 R25 R23 R9 R7 R5 R3 R1 P30 P28 P26 P24 P8 P6 P4 P2 N31 N29 N27 N25 N23 N9 N7 N5 N3 N1 M31 M29 M27 M25 M23 M9 M7 M5 M3 M1

CPU1E

AD12 AC10 AA12

AE24 AE18 AE14

AD30 AD26 AD20

AC31 AC22 AC16

AB30 AB24 AB18 AB14

Y10 F10 E12

AE8 AE3

AD6 AD2

AC4 AC3

AB8 AB2

VTT VTT VTT VTT VTT VTT

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

SOCKET_604

NOCONA 5/5

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

VTT

C10

VTT

B12

VTT

AE27 AE21 AE11 AE2 AD31 AD23 AD17 AD15 AD9 AD3 AC25 AC19 AC13 AC7 AC2 AB31 AB27 AB21 AB11 AB5 AB1

SIGNAL C-STEP SIGNALPin Out CPU0_TEST1C5 CPU0_TEST0

B4 VCCFUSEPRG

P_VTT

C11 C22U16Y1210

C12 C22U16Y1210

VCCVIDPRG

C13 C0.1U16X

C14 C1U6.3X5

Nacona Processor (667 MHz) Pin Out Differences Relative to Nocana Processor (533 MHz)

Nacona Processor (667 MHz) Nocana Processor (533 MHz)Pin Out

OPTIMIZED/COMPAT#C1 E1 VSS G7 VSS A1 RESERVED AD1 RESERVED A4 VCCVID B4, B12, C10, E12, F10,

Y10, AA12, AC10, AD12

VTTEN

VIDPWRGD

VID5

VCCPLL

VTT

VSS

VCCVIDLBC5 VCC

Jayhawk Processor (667 MHz) Pin Out Differences Relative to Nocana Processor (667 MHz)

Jayhawk Processor (667 MHz) Nacona Processor (667 MHz)Pin Out

COMP[2..3]D25, AC28 A26, Y29 RESERVED, N/C

TESTHI[7..8]

RESERVED, N/C

R45 0R R46 0R

P_VTT

A A

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

P0 Processor & PWR/GND/Misc.

Size Document Number Rev

MS-9151-100

Date: Sheet of

11 56Wednesday, June 02, 2004

100Custom

CPU2A

SB_BINIT_N SB_BNR_N SB_HIT_N SB_HITM_N SB_MCERR_N

R82 0R

R83 X_51R

SB_D_N6310,17 SB_D_N6210,17 SB_D_N6110,17 SB_D_N6010,17 SB_D_N5910,17 SB_D_N5810,17 SB_D_N5710,17 SB_D_N5610,17 SB_D_N5510,17 SB_D_N5410,17 SB_D_N5310,17 SB_D_N5210,17 SB_D_N5110,17 SB_D_N5010,17 SB_D_N4910,17 SB_D_N4810,17 SB_D_N4710,17 SB_D_N4610,17 SB_D_N4510,17 SB_D_N4410,17 SB_D_N4310,17 SB_D_N4210,17 SB_D_N4110,17 SB_D_N4010,17 SB_D_N3910,17 SB_D_N3810,17 SB_D_N3710,17 SB_D_N3610,17 SB_D_N3510,17 SB_D_N3410,17 SB_D_N3310,17 SB_D_N3210,17 SB_D_N3110,17 SB_D_N3010,17 SB_D_N2910,17 SB_D_N2810,17 SB_D_N2710,17 SB_D_N2610,17 SB_D_N2510,17 SB_D_N2410,17 SB_D_N2310,17 SB_D_N2210,17 SB_D_N2110,17 SB_D_N2010,17 SB_D_N1910,17 SB_D_N1810,17 SB_D_N1710,17 SB_D_N1610,17 SB_D_N1510,17 SB_D_N1410,17 SB_D_N1310,17 SB_D_N1210,17 SB_D_N1110,17 SB_D_N1010,17

SB_D_N910,17 SB_D_N810,17 SB_D_N710,17 SB_D_N610,17 SB_D_N510,17 SB_D_N410,17 SB_D_N310,17 SB_D_N210,17 SB_D_N110,17 SB_D_N010,17

OUT OUT

BI BI BI BI BI

SB_BPRI_N10,17

SB_CPU1_BREQ_23_N

SB_BREQ_N010,17 SB_BREQ_N110,17

SB_CPURST_N10,14,17,37

D D

SB_CPU_A20M_N10,28

SB_CPU_IGNNE_N10,28

SB_CPU_INIT_N10,28,37

NMI10,28

SB_CPU_INTR10,28

CPU_PWR_GD10,28

ICH_CPU_SMI_N10,28

SB_CPU_SLP_N10,28

SB_CPU_STPCLK_N10,28

C C

VID_CPU1_R548,54 VID_CPU1_R448,54 VID_CPU1_R348,54 VID_CPU1_R248,54 VID_CPU1_R148,54 VID_CPU1_R048,54

VID_PWRGD10,50

P1_VCCSENSE54

P1_VSSSENSE54

B B

IN BI

IN IN

SB_RS_N210,17

SB_RS_N110,17

SB_RS_N010,17

SB_RSP_N10,17

IN IN IN IN IN

IN IN

P1_BCLK_N15

P1_BCLK15

ITP_TCK114

ITP_TDI_P114

OUT

ITP_TDO_P114

ITP_TMS10,14

ITP_TRST_N10,14

CPU1_VTT_BSEL1 CPU1_VTT_BSEL0

OUT OUT OUT OUT OUT OUT IN

PU_VCCPLL_CPU1

OUT

VTT_EN10,50

P_VCCP_A_CPU1

OUT

AGND_CPU1

OUT

P_VTT

D23 D10 E11 F12 D20

F21 D22 E21

F27 C26

G23

B24

AB7

C27

AE6

E24 C24 E25 A25 F24

AA28 AA29 AB28 AB29 AC29 AD28 AD29 AE30

AB3 AA3

C3 D3

AD1 AD4

AB4

B27

AA5

D26

R47 49.9R1%

BPRI_N BR3_N BR2_N BR1_N BR0_N

RESET_N RS2_N

RS1_N RS0_N RSP_N

A20M_N IGNNE_N INIT_N LINT1_NMI LINT0_INTR

NOCONA 1/5

PWRGOOD SMI_N

SLP_N STPCLK_N

BCLK1

BCLK0 TCK

TDI TDO TMS TRST_N

N/C N/C N/C N/C N/C N/C N/C N/C

BSEL1 BSEL0

VID5

VID4 VID3 VID2

VID1

VID0

VIDPWRGD VCCPLL

VTTEN VCCIOPLL VCCA VCCSENSE

VSSA VSSSENSE

SOCKET_604

Put the VREF & VCCA in the Cavity

754 mV

R53

84.5R1%

Trace Width >= 12 mil

C15 C1U16X50805

FERR_N/PBE_N

THERMTRIP_N

PROCHOT_N

BOOT_SELECT

FORCEPR_N

OPTIMIZED_COMPAT_N

64.9R1% -->49.9R1%

R63 49.9R1%

64.9R1% -->49.9R1%

Place close to pin AD4

L3 10U150m_1210

P_VTT

P1V5

L4 10U150m_1210

Place close to pin AB4

R84 X_0R

A A

Notes: Value X_ means non-stuff

R67

84.5R1%

EC2 X_CD470U6.3EL11

754 mV Trace Width >= 12 mil

C23 C1U16X50805

Trace Width >= 12 mil

P_VCCP_A_CPU1

C26 C22U16Y1210

AGND_CPU1

Trace Width >= 12 mil

PU_VCCPLL_CPU1

C27 X_C4.7U10Y1206

Place between pin AB4 & AA5

C28 X_C0.1U16X

ADS_N

BINIT_N

BNR_N BPM5_N BPM4_N BPM3_N BPM2_N BPM1_N BPM0_N

DBSY_N

DEFER_N

DRDY_N

HIT_N

HITM_N TRDY_N LOCK_N

MCERR_N

IERR_N

COMP3 COMP2 COMP1 COMP0

GTLREF3 GTLREF2 GTLREF1 GTLREF0

ODTEN

SKTOCC_N

TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6 TESTHI7 TESTHI8

TEST_BUS

RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED

SMB_PRT THERMDC THERMDA

SLEW_CTRL

C16 C220P50N

C24 C220P50N

C29 X_C0.1U16X

D19

SB_BINIT_N

F11

SB_BNR_N

F20 E4 E8 F5 E7 F8 F6

F18 C23 E18

SB_HIT_N

E22

SB_HITM_N

A23 E19 A17

SB_MCERR_N

SB_CPU1_IERR_N

E5 E27 F26

SB_CPU1_PROCHOT_N

B25

PU_COMP3_CPU1

AC28

PU_COMP2_CPU1

D25

PD_COMP1_CPU1

E16

PD_COMP0_CPU1

AD16

VREF_P_VTT_CPU1_3

F9 F23

VREF_P_VTT_CPU1_0

W9 W23

PD_ODTEN_CPU1

CPU1_SKTOCC_N

PU_CPU1_0

PU_CPU1_1

PU_CPU1_2

PU_CPU1_3

PU_CPU1_4

AA7

PU_CPU1_5

AD5

PU_CPU1_6

AE5

PU_CPU1_7

A26

PU_CPU1_8

Y29 A16

W3 Y3 AC1 AE15 AE16 AE29 AE28

AE4 Y28 Y27

PU_BOOT_SELECT_CPU1

SB_CPU1_FORCEPR_N

A15

CPU1_SLEW_CTRL

AC30

CPU1_OPTIM_COMPAT_CTRL

VREF_P_VTT_CPU1_0

C17 C220P50N

VREF_P_VTT_CPU1_3

C25 C220P50N

SB_ADS_N 10,17

CPU_BPM_N5 10,14

CPU_BPM_N4 10,14

CPU_BPM_N3 10,14

CPU_BPM_N2 10,14

CPU_BPM_N1 10,14

CPU_BPM_N0 10,14

SB_DBSY_N 10,17

SB_DEFER_N 10,17

SB_DRDY_N 10,17

SB_TRDY_N 10,17

SB_LOCK_N 10,17

OUT

SB_CPU_FERR_N 10,28

OUT

SB_CPU_THERMTRIP_N 10,28

SB_CPU0_CPU1_TESTBUS 10

OUT

CPU1_THERMDC 48

OUT

CPU1_THERMDA 48

P_VTT

R48 51R R50 51R

R54 510R R55 510R

R56 39R R58 39R R59 39R R60 39R R61 39R

R64 51R R65 51R R66 51R R68 51R R70 51R R71 51R R73 51R R74 51R R76 51R R77 X_51R R78 X_51R R79 X_51R R80 51R

SB_CPU1_FORCEPR_N SB_CPU1_BREQ_23_N

CPU1_VTT_BSEL0 CPU1_VTT_BSEL1

C18 C47P50N C19 C47P50N C20 C47P50N C21 C47P50N C22 C47P50N

PU_CPU1_8 PU_CPU1_7 PU_CPU1_6 PU_CPU1_5 PU_CPU1_4 PU_CPU1_3 PU_CPU1_2 PU_CPU1_1 PU_CPU1_0 PU_BOOT_SELECT_CPU1 CPU1_OPTIM_COMPAT_CTRL CPU1_SLEW_CTRL SB_CPU0_CPU1_TESTBUS

R81 X_100R

CPU2B

AB6

D63_N

D62_N

AA8

D61_N

AC5

D60_N

AC6

D59_N

AE7

D58_N

AD7

D57_N

AC8

D56_N

AB10

D55_N

AA10

D54_N

AA11

D53_N

AB13

D52_N

AB12

D51_N

AC14

D50_N

AA14

D49_N

AA13

D48_N

AC9

D47_N

AD8

D46_N

AD10

D45_N

AE9

D44_N

AC11

D43_N

AE10

D42_N

AC12

D41_N

AD11

D40_N

AD14

D39_N

AD13

D38_N

AB15

D37_N

AD18

D36_N

AE13

D35_N

AC17

D34_N

AA16

D33_N

AB16

D32_N

AB17

D31_N

AD19

D30_N

AD21

D29_N

AE20

D28_N

AE22

D27_N

AC21

D26_N

AC20

D25_N

AA18

D24_N

AC23

D23_N

AE23

D22_N

AD24

D21_N

AC24

D20_N

AE25

D19_N

AD25

D18_N

AC26

D17_N

AE26

D16_N

AA19

D15_N

AB19

D14_N

AB22

D13_N

AB20

D12_N

AA21

D11_N

AA22

D10_N

AB23

D9_N

AB25

D8_N

AB26

D7_N

AA24

D6_N

Y23

D5_N

AD27

D4_N

AA25

D3_N

Y24

D2_N

AA27

D1_N

Y26

D0_N

SOCKET_604

SB_CPU1_FORCEPR_N 14

CPU1_VTT_BSEL0 14 CPU1_VTT_BSEL1 14

SB_BINIT_N 10,17 SB_BNR_N 10,17 SB_HIT_N 10,17 SB_HITM_N 10,17 SB_MCERR_N 10,17

NOCONA 2/5

P_VTT

P3V3_STBY

A35_N

A34_N

A33_N

A32_N

A31_N

C11

A30_N

D12

A29_N

E13

A28_N

A27_N

A26_N

D13

A25_N

E14

A24_N

C12

A23_N

B11

A22_N

B10

A21_N

A10

A20_N

F15

A19_N

D15

A18_N

D16

A17_N

C14

A16_N

C15

A15_N

A12

A14_N

B13

A13_N

B14

A12_N

B16

A11_N

A13

A10_N

D17

A9_N

C17

A8_N

A19

A7_N

C18

A6_N

B18

A5_N

A20

A4_N

A22

A3_N

B22

REQ4_N

C20

REQ3_N

C21

REQ2_N

B21

REQ1_N

B19

REQ0_N

AB9

DBI3_N

AE12

DBI2_N

AD22

DBI1_N

AC27

DBI0_N

AP1_N

E10

AP0_N

AE17

DP3_N

AC15

DP2_N

AE19

DP1_N

AC18

DP0_N

F14

ADSTB1_N

F17

ADSTB0_N

Y11

DSTBP3_N

Y14

DSTBP2_N

Y17

DSTBP1_N

Y20

DSTBP0_N

Y12

DSTBN3_N

Y15

DSTBN2_N

Y18

DSTBN1_N

Y21

DSTBN0_N

R49 51R R51 51R R1140 100R1% R1141 100R1%

R62 4.7KR

R69 49.9R1% R72 49.9R1% R75 51R

SB_CPU1_IERR_N SB_CPU1_PROCHOT_N PU_COMP2_CPU1 PU_COMP3_CPU1

CPU1_SKTOCC_N

PD_COMP0_CPU1 PD_COMP1_CPU1 PD_ODTEN_CPU1

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

P1 Processor & Termination

Size Document Number Rev

MS-9151-100

Date: Sheet of

OUT

SB_CPU1_IERR_N 14

OUT

CPU1_SKTOCC_N 47,49

SB_A_N35 10,17

SB_A_N34 10,17

SB_A_N33 10,17

SB_A_N32 10,17

SB_A_N31 10,17

SB_A_N30 10,17

SB_A_N29 10,17

SB_A_N28 10,17

SB_A_N27 10,17

SB_A_N26 10,17

SB_A_N25 10,17

SB_A_N24 10,17

SB_A_N23 10,17

SB_A_N22 10,17

SB_A_N21 10,17

SB_A_N20 10,17

SB_A_N19 10,17

SB_A_N18 10,17

SB_A_N17 10,17

SB_A_N16 10,17

SB_A_N15 10,17

SB_A_N14 10,17

SB_A_N13 10,17

SB_A_N12 10,17

SB_A_N11 10,17

SB_A_N10 10,17

SB_A_N9 10,17

SB_A_N8 10,17

SB_A_N7 10,17

SB_A_N6 10,17

SB_A_N5 10,17

SB_A_N4 10,17

SB_A_N3 10,17

SB_REQ_N4 10,17

SB_REQ_N3 10,17

SB_REQ_N2 10,17

SB_REQ_N1 10,17

SB_REQ_N0 10,17

SB_DBI_N3 10,17

SB_DBI_N2 10,17

SB_DBI_N1 10,17

SB_DBI_N0 10,17

SB_AP_N1 10,17

SB_AP_N0 10,17

SB_DP_N3 10,17

SB_DP_N2 10,17

SB_DP_N1 10,17

SB_DP_N0 10,17

SB_ADSTB_N1 10,17

SB_ADSTB_N0 10,17

SB_DSTBP_N3 10,17

SB_DSTBP_N2 10,17

SB_DSTBP_N1 10,17

SB_DSTBP_N0 10,17

SB_DSTBN_N3 10,17

SB_DSTBN_N2 10,17

SB_DSTBN_N1 10,17

SB_DSTBN_N0 10,17

12 56Wednesday, June 02, 2004

100Custom

CPU2C

D D

C C

B B

L31

GND

L29

GND

L27

GND

L25

GND

L23

GND

K30

GND

K28

GND

K26

GND

K24

GND

J31

GND

J29

GND

J27

GND

J25

GND

J23

GND

H30

GND

H28

GND

H26

GND

H24

GND

G31

GND

G29

GND

G27

GND

G25

GND

F30

GND

F28

GND

F25

GND

F19

GND

F13

GND

E31

GND

E29

GND

E23

GND

E17

GND

E15

GND

D30

GND

D28

GND

D27

GND

D21

GND

D11

GND

C31

GND

C29

GND

C25

GND

C19

GND

C13

GND

B30

GND

B28

GND

B23

GND

B17

GND

B15

GND

A31

GND

A29

GND

A27

GND

A21

GND

A11

GND

SOCKET_604

NOCONA 3/5

GND

GN1

GN2

GN3

GN4

GN5

GN6

GN7

GN8

GND

GN9

GND

GN10

GND

GN11

GND

GN12

GND

GN13

GND

GN14

GND

GN15

GND

GN16

GND

GN17

GN18

GND

GN19

GND

GN20

P_VCCP1 P_VCCP1 P_VTT P_VTTP_VCCP1

L28 L26 L24

L8 L6 L4

L2 K31 K29 K27 K25 K23

J30 J28 J26 J24

J2 H31 H29 H27 H25 H23

H9 H7 H5 H3

H1 G30 G28 G26 G24

F31 F29 F22 F16

F1 E30 E28 E26 E20

E2 D31 D29 D24 D18 D14

D1 C30 C28 C22 C16

C2 B31 B29 B26 B20

B6 A30 A28 A24 A18 A14

CPU2D

SOCKET_604

NOCONA 4/5

CPU2E

AD12

VTT

AC10 AA12

AE24 AE18 AE14

AD30 AD26 AD20

AC31 AC22 AC16

AB30 AB24 AB18 AB14

Y10 F10 E12

AE8 AE3

AD6 AD2

AC4 AC3

AB8 AB2

VTT VTT VTT VTT VTT

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

SOCKET_604

P_VTT

C30 C0.1U16X

NOCONA 5/5

C31

C32

C1U6.3X5

C22U16Y1210

C33 C22U16Y1210

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

VTT

C10

VTT

B12

VTT

AE27 AE21 AE11 AE2 AD31 AD23 AD17 AD15 AD9 AD3 AC25 AC19 AC13 AC7 AC2 AB31 AB27 AB21 AB11 AB5 AB1

A A

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

P1 Processor & PWR/GND/Misc.

Size Document Number Rev

MS-9151-100

Date: Sheet of

13 56Wednesday, June 02, 2004

100Custom

D D

SB_CPURST_N10,12,17,37

CPU_BPM_N510,12 CPU_BPM_N410,12 CPU_BPM_N310,12 CPU_BPM_N210,12 CPU_BPM_N110,12 CPU_BPM_N010,12

C C

SB_CPU0_IERR_N10

B B

GPIO_CPU0_FORCEPR_N28

A A

Notes: Value X_ means non-stuff

Place R? at the place where the HCPURST# singal starts to branch

ITP_BCLK_N15

ITP_BCLK15

ITP_FBO SB_CPURST_N

CPU_BPM_N5

CPU_BPM_N4 ITP_TDI_P0

CPU_BPM_N3

CPU_BPM_N2

CPU_BPM_N1

CPU_BPM_N0

CPU_BPM_N0 CPU_BPM_N1 CPU_BPM_N2 CPU_BPM_N3 CPU_BPM_N4 CPU_BPM_N5

R1275

51R

R1128 2.7KR

R1153 4.7KR

R91 0R

BPM1_ITP BPM0_ITP

R96 51R R97 51R R98 51R R100 51R R101 51R R106 22R R102 51R

P3V3

R1127 1KR

Q119

N-MMBT3904

E C

R1152

4.7KR

Q130

N-MMBT3904

E C

OUT

GPIO_CPU0_IERR 28

E C

25 23 21 19 17 15 13 11

9 7 5 3 1

P_VTT

Close to ICH5

OUT

SB_CPU0_FORCEPR_N 10

Q129 N-MMBT3904

GND BPM5DR# BCLKN BCLKP FBO RESET# BPM#5 BPM#4 BPM#3 BPM#2 BPM#1 BPM#0 GND

X_ITP_PORT

GPIO_CPU1_FORCEPR_N28

P3V3

P_VTT

R85

R86

1.5KR

X_150RJITP1

R94 X_220R

R103 22R R105 22R

ITP_TDO_P1

ITP_TCK ITP_TRST_N ITP_TMS

R92 0R

R1285 39R

ITP_TCK ITP_TCK ITP_FBO

ITP_TDO_P1 12

OUT

ITP_TRST_N 10,12

OUT

ITP_TMS 10,12

OUT

ITP_TDI_P0 10

OUT

FP_RESET_N 28,37,47,49

P_VTT

PWR

GND

TRST#

TMS GND

DBR#

DBA#

GND

TDO

TCK

24 22 20

R90 X_0R

FBI

16 14 12 10

TDI

8 6 4 2

ITP_TCK010

ITP_TCK112

Closed to CPU

P_VTTP_VTT

R1276

51R

R1130 2.7KR

SB_CPU1_IERR_N12

R1150 4.7KR

P3V3

R1129 1KR

OUT

GPIO_CPU1_IERR 28

Q120

N-MMBT3904

E C

P3V3P3V3

OUT

E C

Q127 N-MMBT3904

SB_CPU1_FORCEPR_N 12

R1149

4.7KR

Q128

N-MMBT3904

E C

CPU0_VTT_BSEL010

CPU0_VTT_BSEL110

CPU1_VTT_BSEL012

CPU1_VTT_BSEL112

UP : 1-2 DP : 2-3

P_VTT

R88

closed to ITP closed to P1

JITP2

ITP_TDO_P1

ITP_TDO_P0

ITP_TDI_P1

D1x3-BK

ITP_TDI_P0

ITP_TRST_N

75R1%

closed to P0

R93 150R

R95 680R

closed to ITP

P3V3

R99

3.3KR

R104 100R

R108 100R

R111 100R

R126 100R

E C

P3V3

R107

3.3KR

E C

P3V3

R109

3.3KR

E C

P3V3

R114

3.3KR

E C

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

Level Shift / ITP Debug Port

Size Document Number Rev

MS-9151-100

Date: Sheet of

R89 150R

P_VTT

Q2 N-MMBT3904

Q4 N-MMBT3904

Q6 N-MMBT3904

Q8 N-MMBT3904

OUT

E C

ITP_TDO_P0 10 ITP_TDI_P1 12

OUT

CPU0_BSEL0 15

Q1 N-MMBT3904

OUT

CPU0_BSEL1 15

Q3 N-MMBT3904

OUT

CPU1_BSEL0 15

Q5 N-MMBT3904

OUT

CPU1_BSEL1 15

Q7 N-MMBT3904

14 56Wednesday, June 02, 2004

100Custom

P3V3

D D

C C

B B

A A

Notes: Value X_ means non-stuff

FB1 300L700m_250_0805

C170 C10U6.3X51206

SB_VTT_PWRGD50,53,54

P3V3

R201 1KR R203 1KR R205 1KR R206 1KR

P3V3 VCC3_SRCLK

FB3 300L700m_250_0805

VCC3_CLK VCC3_SRCLK2

FB4 300L700m_250_0805

C171

C172 C0.1U16X

C173 C0.1U16X

C179 C10U6.3X51206

C182 C10U6.3X51206

VCC3_CLK

C0.1U16X

P3V3 VCC3_CLKA

FB2 300L700m_250_0805

VCC3_CLK VCC3_CLKB

R184 10R_0805

R1106 10KR

E C

CPU0_BSEL0 CPU0_BSEL1 CPU1_BSEL0 CPU1_BSEL1

C184 C10U6.3X51206

C190 C10U6.3X51206

CPU1_BSEL0 14

CPU1_BSEL1 14

C185 C0.1U16X

C191 C0.1U16X

C186 C0.1U16X

C174

C175

C0.1U16X

C180 C0.1U16X

C183 C0.1U16X

R1105 10KR

CK409B_PWR_GD_N

Q115 N-MMBT3904

C187

C188

C0.1U16X

C1386 X_C10P50N C1387 X_C10P50N C1388 X_C10P50N C1389 X_C10P50N C1390 X_C10P50N C1391 X_C10P50N C1392 X_C10P50N

VCC3_CLK

C176 C0.1U16X

C189 C0.1U16X

VCC3_SRCLK VCC3_SRCLK

C177 C0.1U16X

MCH_SMBDAT17,38,47 MCH_SMBCLK17,38,47

CPU0_BSEL014 CPU0_BSEL114

VCC3_SRCLK VCC3_SRCLK

VCC3_SRCLK

VCC3_SRCLK2

VCC3_SRCLK

SIO_48MHZ_CLK ICH_USB_48MHZ_CLK 1394_33MHZ_CLK VGA_33MHZ_CLK PCI_SLOT3_33MHZ_CLK PCI_SLOT2_33MHZ_CLK SIO_33MHZ_CLK

VCC3_CLKA

VCC3_CLK

VCC3_CLKB

C178 C33P50N Y1

14.318MHZ32P_D C181 C33P50N

MCH_SMBDAT

MCH_SMBCLK

CPU0_BSEL0

CPU0_BSEL1

CK409B_PWRDWN_N CK409B_PWR_GD_N

VCC3_CLK

R198

4.7KR

CK409B_PWRDWN_N

SRC_100MHZ_CLKP SRC_100MHZ_CLKN

R207 10KR R210 X_10KR R212 10KR R213 X_10KR

MCH_SMBCLK

CK409B_PWRDWN_N

R221 10KR R222 10KR R226 X_10KR R229 475R1%

MCH_SMBDAT

R232 1KR

R238 1KR

R191 475R1%

TP53

VDD_A

VDD_3V66

VDD_CPU

VDD_PCI

VDD_SRC

VDD_REF

VDD_48

XTAL_IN

XTAL_OUT

SDAT

SCLK

FS_A

FS_B

PWRDWN_N

VTT_PWRGD_N

IREF

VSS_A

VSS_3V66

VSS_CPU

VSS_PCI

VSS_SRC

VSS_48

VSS_IREF

VSS_REF

CK409B

SRC_IN_P

SRC_IN_N

SRC_DIV2_N

PLL / BYPASS_N

SCL

SDA

PWRDWN_N

SRC_STOP_N

PLL_BW

LOCK

IREF

OE_7

OE_6

OE_5

OE_4

OE_3

OE_2

OE_1

OE_0

VDD_A

VDD4

VDD3

VDD2

VDD1

VDD0

DB800

F_SEL1 F_SEL0 FREQ.

CK409B

000

111

DB800

100 Mhz 133 Mhz 200 Mhz 166 Mhz

REF1 REF0

CPU_3_P CPU_3_N

CPU_2_P CPU_2_N

CPU_1_P CPU_1_N

CPU_0_P CPU_0_N

PCIF2 PCIF1 PCIF0

DOT_48

USB_48

VCH/3V66_4

3V66_3 3V66_2 3V66_1 3V66_0

SRC_P SRC_N

DIF_7_P DIF_7_N

DIF_6_P DIF_6_N

DIF_5_P DIF_5_N

DIF_4_P DIF_4_N

DIF_3_P DIF_3_N

DIF_2_P DIF_2_N

DIF_1_P DIF_1_N

DIF_0_P DIF_0_N

VSS_A

VSS5 VSS4 VSS3 VSS2 VSS1 VSS0

PCI6 PCI5 PCI4 PCI3 PCI2 PCI1 PCI0

2 1

50 49

47 46

44 43

41 40

9 8 7

20 19 18 15 14 13 12

32 31

29 27 26 23 22

38 37

42 41

38 37

34 33

30 29

20 21

16 17

12 13

8 9

47 40 32 25 18 10 3

R164 33R R166 33R

R167 33R R168 33R

R170 33R R171 33R

R173 33R R174 33R

R175 33R R1117 33R

R177 33R R179 33R

R181 33R R183 33R R186 33R R1114 33R R1115 33R R1374 33R

R187 33R R188 33R

R190 33R R192 33R

R194 33R R195 33R

R202 33R R204 33R

R208 33R R211 33R

R214 33R R216 33R

R219 33R R220 33R

R223 33R R227 33R

R230 33R R233 33R

R236 33R R237 33R

R239 33R R241 33R

OUT

P0_BCLK P0_BCLK_N

P1_BCLK P1_BCLK_N

MCH_BCLK MCH_BCLK_N

ITP_BCLK ITP_BCLK_N

SRC_100MHZ_CLKP SRC_100MHZ_CLKN

EXP_SLOT1_100MHZ_CLK_P EXP_SLOT1_100MHZ_CLK_N

EXP_NW_100MHZ_CLK_P EXP_NW_100MHZ_CLK_N

R215 4 9.9R1% R217 4 9.9R1%

PXH_SRC_100MHZ_CLK_P PXH_SRC_100MHZ_CLK_N

R224 4 9.9R1% R228 4 9.9R1%

R231 4 9.9R1% R234 4 9.9R1%

MCH_SRC_100MHZ_CLK_P MCH_SRC_100MHZ_CLK_N

ICH_SRC_100MHZ_CLK_P ICH_SRC_100MHZ_CLK_N

ICH_14MHZ_CLK 28

OUT

P0_BCLK 10

OUT

P0_BCLK_N 10

OUT

P1_BCLK 12

OUT

P1_BCLK_N 12

OUT

MCH_BCLK 17

OUT

MCH_BCLK_N 17

OUT

ITP_BCLK 14

OUT

ITP_BCLK_N 14

OUT

FWH_33MHZ_CLK 37

OUT

SIO_33MHZ_CLK 46

OUT

ICH_33MHZ_CLK 28

OUT

1394_33MHZ_CLK 34

OUT

VGA_33MHZ_CLK 35

OUT

PCI_SLOT3_33MHZ_CLK 32

OUT

PCI_SLOT2_33MHZ_CLK 32

OUT

PERR_33MHZ_CLK 37

OUT

FWH2_33MHZ_CLK 37

OUT

SIO_48MHZ_CLK 46

OUT

ICH_USB_48MHZ_CLK 28

OUT

ICH_HI_66MHZ_CLK 28

OUT

MCH_66MHZ_CLK 17

R163 49.9R1%

R165 49.9R1%

R169 49.9R1%

R172 49.9R1%

R176 49.9R1%

R178 49.9R1%

R182 49.9R1%

R185 49.9R1%

R189 49.9R1%

SRC_100MHZ_CLKP SRC_100MHZ_CLKN

R193 49.9R1%

R196 49.9R1%

EXP_SLOT1_100MHZ_CLK_P EXP_SLOT1_100MHZ_CLK_N

R197 49.9R1%

R199 49.9R1%

EXP_NW_100MHZ_CLK_P EXP_NW_100MHZ_CLK_N

OUT

EXP_SLOT1_100MHZ_CLK_P 20

OUT

EXP_SLOT1_100MHZ_CLK_N 20

OUT

EXP_NW_100MHZ_CLK_P 33

OUT

EXP_NW_100MHZ_CLK_N 33

OUT

PXH_SRC_100MHZ_CLK_P 38

OUT

PXH_SRC_100MHZ_CLK_N 38

OUT

MCH_SRC_100MHZ_CLK_P 18

OUT

MCH_SRC_100MHZ_CLK_N 18

OUT

ICH_SRC_100MHZ_CLK_P 28

OUT

ICH_SRC_100MHZ_CLK_N 28

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

CK409B / DB800 SRC Buffer

Size Document Number Rev

MS-9151-100

Date: Sheet of

R200 49.9R1%

R209 49.9R1%

PXH_SRC_100MHZ_CLK_P PXH_SRC_100MHZ_CLK_N

R218 49.9R1%

R225 49.9R1%

MCH_SRC_100MHZ_CLK_P MCH_SRC_100MHZ_CLK_N

R235 49.9R1%

R240 49.9R1%

ICH_SRC_100MHZ_CLK_P ICH_SRC_100MHZ_CLK_N

R242 49.9R1%

P0_BCLK P0_BCLK_N

P1_BCLK P1_BCLK_N

MCH_BCLK MCH_BCLK_N

ITP_BCLK ITP_BCLK_N

15 56Monday, June 07, 2004

100Custom

U2A

D D

C C

DDRA_CMDCLK2_P23,27 DDRA_CMDCLK2_N23,27 DDRA_CMDCLK1_P22,27 DDRA_CMDCLK1_N22,27 DDRA_CMDCLK0_P21,27 DDRA_CMDCLK0_N21,27

DDRA_CS_N723,27 DDRA_CS_N623,27 DDRA_CS_N522,27 DDRA_CS_N422,27 DDRA_CS_N321,22,27 DDRA_CS_N221,22,27 DDRA_CS_N123,27 DDRA_CS_N023,27

DDRA_CAS_N21,22,23,27 DDRA_RAS_N21,22,23,27

DDRA_WE_N21,22,23,27

B B

DDRA_DQS821,22,23

DDRA_DQS_N821,22,23

DDRA_DQS721,22,23

DDRA_DQS_N721,22,23

DDRA_DQS621,22,23

DDRA_DQS_N621,22,23

DDRA_DQS521,22,23

DDRA_DQS_N521,22,23

DDRA_DQS421,22,23

DDRA_DQS_N421,22,23

DDRA_DQS321,22,23

DDRA_DQS_N321,22,23

DDRA_DQS221,22,23

DDRA_DQS_N221,22,23

DDRA_DQS121,22,23

DDRA_DQS_N121,22,23

DDRA_DQS021,22,23

DDRA_DQS_N021,22,23

A A

OUT

DDRA_A1321,22,23,27

OUT

DDRA_A1221,22,23,27

OUT

DDRA_A1121,22,23,27

OUT

DDRA_A1021,22,23,27

OUT

DDRA_A921,22,23,27

OUT

DDRA_A821,22,23,27

OUT

DDRA_A721,22,23,27

OUT

DDRA_A621,22,23,27

OUT

DDRA_A521,22,23,27

OUT

DDRA_A421,22,23,27

OUT

DDRA_A321,22,23,27

OUT

DDRA_A221,22,23,27

OUT

DDRA_A121,22,23,27

OUT

DDRA_A021,22,23,27

DDRA_CB721,22,23

DDRA_CB621,22,23

DDRA_CB521,22,23

DDRA_CB421,22,23

DDRA_CB321,22,23

DDRA_CB221,22,23

DDRA_CB121,22,23

DDRA_CB021,22,23

OUT

MEM_CKE324,25,27

OUT

MEM_CKE221,22,27

OUT

MEM_CKE126,27

OUT

MEM_CKE023,27

OUT OUT OUT OUT OUT OUT

OUT OUT OUT OUT OUT OUT OUT OUT

DDRA_MCH_VREF DDRB_MCH_VREF

OUT OUT OUT

OUT

DDRA_BA021,22,23,27

OUT

DDRA_BA121,22,23,27

OUT

DDRA_BA221,22,23,27

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

P1V8_AUX P1V8_AUX

R129 75R1%

DDRA_MCH_VREF DDRB_MCH_VREF

R131 75R1%

DDR_A_MA13

AG23

DDR_A_MA12

AF22

DDR_A_MA11

AE4

DDR_A_MA10

AJ22

DDR_A_MA09

AK20

DDR_A_MA08

AN20

DDR_A_MA07

AF18

DDR_A_MA06

AH17

DDR_A_MA05

AJ16

DDR_A_MA04

AK15

DDR_A_MA03

AL14

DDR_A_MA02

AD14

DDR_A_MA01

AH5

DDR_A_MA00

AE10

DDR_A_CB7

AF10

DDR_A_CB6

AH10

DDR_A_CB5

AJ10

DDR_A_CB4

AD11

DDR_A_CB3

AE11

DDR_A_CB2

AG11

DDR_A_CB1

AJ9

DDR_A_CB0

AK26

DDR_CKE3

AL26

DDR_CKE2

AN26

DDR_CKE1

AE26

DDR_CKE0

AC10

DDR_A_CMDCLK_P3

AD9

DDR_A_CMDCLK_N3

AH13

DDR_A_CMDCLK_P2

AG12

DDR_A_CMDCLK_N2

AH11

DDR_A_CMDCLK_P1

AJ12

DDR_A_CMDCLK_N1

AF13

DDR_A_CMDCLK_P0

AF12

DDR_A_CMDCLK_N0

DDR_A_CS_N7

DDR_A_CS_N6

DDR_A_CS_N5

DDR_A_CS_N4

T10

DDR_A_CS_N3

DDR_A_CS_N2

DDR_A_CS_N1

DDR_A_CS_N0

AM3

DDR_A_VREF

DDR_A_CAS_N

AA6

DDR_A_RAS_N

Y10

DDR_A_WE_N

AB5

DDR_A_BA0

AF6

DDR_A_BA1

AE25

DDR_A_BA2

AF9

DDR_A_DQS_P8

AG9

DDR_A_DQS_N8

DDR_A_DQS_P7

DDR_A_DQS_N7

DDR_A_DQS_P6

DDR_A_DQS_N6

DDR_A_DQS_P5

DDR_A_DQS_N5

AC6

DDR_A_DQS_P4

AD6

DDR_A_DQS_N4

AG14

DDR_A_DQS_P3

AG15

DDR_A_DQS_N3

AH19

DDR_A_DQS_P2

AH20

DDR_A_DQS_N2

AJ24

DDR_A_DQS_P1

AJ25

DDR_A_DQS_N1

AJ30

DDR_A_DQS_P0

AJ31

DDR_A_DQS_N0

TUMWATER

MCH 1/8

DDR Group A

DDR_A_DQ63 DDR_A_DQ62 DDR_A_DQ61 DDR_A_DQ60 DDR_A_DQ59 DDR_A_DQ58 DDR_A_DQ57 DDR_A_DQ56 DDR_A_DQ55 DDR_A_DQ54 DDR_A_DQ53 DDR_A_DQ52 DDR_A_DQ51 DDR_A_DQ50 DDR_A_DQ49 DDR_A_DQ48 DDR_A_DQ47 DDR_A_DQ46 DDR_A_DQ45 DDR_A_DQ44 DDR_A_DQ43 DDR_A_DQ42 DDR_A_DQ41 DDR_A_DQ40 DDR_A_DQ39 DDR_A_DQ38 DDR_A_DQ37 DDR_A_DQ36 DDR_A_DQ35 DDR_A_DQ34 DDR_A_DQ33 DDR_A_DQ32 DDR_A_DQ31 DDR_A_DQ30 DDR_A_DQ29 DDR_A_DQ28 DDR_A_DQ27 DDR_A_DQ26 DDR_A_DQ25 DDR_A_DQ24 DDR_A_DQ23 DDR_A_DQ22 DDR_A_DQ21 DDR_A_DQ20 DDR_A_DQ19 DDR_A_DQ18 DDR_A_DQ17 DDR_A_DQ16 DDR_A_DQ15 DDR_A_DQ14 DDR_A_DQ13 DDR_A_DQ12 DDR_A_DQ11 DDR_A_DQ10 DDR_A_DQ09 DDR_A_DQ08 DDR_A_DQ07 DDR_A_DQ06 DDR_A_DQ05 DDR_A_DQ04 DDR_A_DQ03 DDR_A_DQ02 DDR_A_DQ01 DDR_A_DQ00

DDR_A_DQS_P17 DDR_A_DQS_N17 DDR_A_DQS_P16 DDR_A_DQS_N16 DDR_A_DQS_P15 DDR_A_DQS_N15 DDR_A_DQS_P14 DDR_A_DQS_N14 DDR_A_DQS_P13 DDR_A_DQS_N13 DDR_A_DQS_P12 DDR_A_DQS_N12 DDR_A_DQS_P11 DDR_A_DQS_N11 DDR_A_DQS_P10 DDR_A_DQS_N10 DDR_A_DQS_P09 DDR_A_DQS_N09

closed to MCH closed to MCH

C38

C39

C1U6.3X5

C0.1U16X

H7 K7 L10 L9 K10 K8 J5 K5 M9 N8 T5 P9 L6 L7 R5 R6 V5 W5 U10 W10 U7 V6 AA5 U9 AD5 AE5 AA9 AB10 AB7 AB8 AG5 AH4 AD17 AE16 AJ15 AE17 AD12 AE13 AF15 AF16 AG20 AJ18 AD21 AE22 AG18 AF19 AG21 AF21 AG24 AH25 AF27 AE28 AD23 AD24 AG26 AG27 AG29 AG30 AK33 AJ33 AF28 AH29 AH31 AK32

AH8 AJ7 J6 H6 P10 N10 Y7 Y6 AD8 AC7 AH14 AJ13 AE20 AE19 AF25 AF24 AL32 AL31

DDRA_DQ63 21,22,23

DDRA_DQ62 21,22,23

DDRA_DQ61 21,22,23

DDRA_DQ60 21,22,23

DDRA_DQ59 21,22,23

DDRA_DQ58 21,22,23

DDRA_DQ57 21,22,23

DDRA_DQ56 21,22,23

DDRA_DQ55 21,22,23

DDRA_DQ54 21,22,23

DDRA_DQ53 21,22,23

DDRA_DQ52 21,22,23

DDRA_DQ51 21,22,23

DDRA_DQ50 21,22,23

DDRA_DQ49 21,22,23

DDRA_DQ48 21,22,23

DDRA_DQ47 21,22,23

DDRA_DQ46 21,22,23

DDRA_DQ45 21,22,23

DDRA_DQ44 21,22,23

DDRA_DQ43 21,22,23

DDRA_DQ42 21,22,23

DDRA_DQ41 21,22,23

DDRA_DQ40 21,22,23

DDRA_DQ39 21,22,23

DDRA_DQ38 21,22,23

DDRA_DQ37 21,22,23

DDRA_DQ36 21,22,23

DDRA_DQ35 21,22,23

DDRA_DQ34 21,22,23

DDRA_DQ33 21,22,23

DDRA_DQ32 21,22,23

DDRA_DQ31 21,22,23

DDRA_DQ30 21,22,23

DDRA_DQ29 21,22,23

DDRA_DQ28 21,22,23

DDRA_DQ27 21,22,23

DDRA_DQ26 21,22,23

DDRA_DQ25 21,22,23

DDRA_DQ24 21,22,23

DDRA_DQ23 21,22,23

DDRA_DQ22 21,22,23

DDRA_DQ21 21,22,23

DDRA_DQ20 21,22,23

DDRA_DQ19 21,22,23

DDRA_DQ18 21,22,23

DDRA_DQ17 21,22,23

DDRA_DQ16 21,22,23

DDRA_DQ15 21,22,23

DDRA_DQ14 21,22,23

DDRA_DQ13 21,22,23

DDRA_DQ12 21,22,23

DDRA_DQ11 21,22,23

DDRA_DQ10 21,22,23

DDRA_DQ9 21,22,23

DDRA_DQ8 21,22,23

DDRA_DQ7 21,22,23

DDRA_DQ6 21,22,23

DDRA_DQ5 21,22,23

DDRA_DQ4 21,22,23

DDRA_DQ3 21,22,23

DDRA_DQ2 21,22,23

DDRA_DQ1 21,22,23

DDRA_DQ0 21,22,23

DDRA_DQS17 21,22,23

DDRA_DQS_N17 21,22,23

DDRA_DQS16 21,22,23

DDRA_DQS_N16 21,22,23

DDRA_DQS15 21,22,23

DDRA_DQS_N15 21,22,23

DDRA_DQS14 21,22,23

DDRA_DQS_N14 21,22,23

DDRA_DQS13 21,22,23

DDRA_DQS_N13 21,22,23

DDRA_DQS12 21,22,23

DDRA_DQS_N12 21,22,23

DDRA_DQS11 21,22,23

DDRA_DQS_N11 21,22,23

DDRA_DQS10 21,22,23

DDRA_DQS_N10 21,22,23

DDRA_DQS9 21,22,23

DDRA_DQS_N9 21,22,23

OUT

DDRB_A1324,25,26,27

OUT

DDRB_A1224,25,26,27

OUT

DDRB_A1124,25,26,27

OUT

DDRB_A1024,25,26,27

OUT

DDRB_A924,25,26,27

OUT

DDRB_A824,25,26,27

OUT

DDRB_A724,25,26,27

OUT

DDRB_A624,25,26,27

OUT

DDRB_A524,25,26,27

OUT

DDRB_A424,25,26,27

OUT

DDRB_A324,25,26,27

OUT

DDRB_A224,25,26,27

OUT

DDRB_A124,25,26,27

OUT

DDRB_A024,25,26,27

DDRB_CB724,25,26

DDRB_CB624,25,26

DDRB_CB524,25,26

DDRB_CB424,25,26

DDRB_CB324,25,26

DDRB_CB224,25,26

DDRB_CB124,25,26

DDRB_CB024,25,26

OUT

MEM_CKE726,27

OUT

MEM_CKE623,27

OUT

MEM_CKE525,27

OUT

MEM_CKE422,27

DDRB_CMDCLK2_N26,27 DDRB_CMDCLK2_P26,27 DDRB_CMDCLK1_N25,27 DDRB_CMDCLK1_P25,27 DDRB_CMDCLK0_N24,27 DDRB_CMDCLK0_P24,27

DDRB_CS_N726,27 DDRB_CS_N626,27 DDRB_CS_N525,27 DDRB_CS_N425,27 DDRB_CS_N324,25,27 DDRB_CS_N224,25,27 DDRB_CS_N126,27 DDRB_CS_N026,27

DDRB_CAS_N24,25,26,27 DDRB_RAS_N24,25,26,27

DDRB_WE_N24,25,26,27

DDRB_DQS824,25,26

DDRB_DQS_N824,25,26

DDRB_DQS724,25,26

DDRB_DQS_N724,25,26

DDRB_DQS624,25,26

DDRB_DQS_N624,25,26

DDRB_DQS524,25,26

DDRB_DQS_N524,25,26

DDRB_DQS424,25,26

DDRB_DQS_N424,25,26

DDRB_DQS324,25,26

DDRB_DQS_N324,25,26

DDRB_DQS224,25,26

DDRB_DQS_N224,25,26

DDRB_DQS124,25,26

DDRB_DQS_N124,25,26

DDRB_DQS024,25,26

DDRB_DQS_N024,25,26

OUT OUT OUT OUT OUT OUT

OUT OUT OUT OUT OUT OUT OUT OUT

OUT OUT OUT

OUT

DDRB_BA024,25,26,27

OUT

DDRB_BA124,25,26,27

OUT

DDRB_BA224,25,26,27

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

R130 75R1%

R132

C40

75R1%

C1U6.3X5

U4 AH23 AH22

AC4 AJ21 AL20

AD18 AG17 AH16 AD15 AK14 AN14 AE14

AF7

AL5

AN5

AK8

AN8

AL4

AM4

AL7

AM7

AH28

AJ28 AJ27

AH26

AL8

AK9

AE8

AG8

AG6

AH6

AJ6

AH7

L3 M6 M2 N4

AN4

Y9 W4

AA8 AE7

AM25

AK5 AK6

H3 H1

P1 R2

AA3 AB4 AG2 AH2

AK11

AL11

AK17

AL17 AM22 AN23 AM28 AN29

C41 C0.1U16X

U2B

TUMWATER

DDR_B_MA13 DDR_B_MA12 DDR_B_MA11 DDR_B_MA10 DDR_B_MA09 DDR_B_MA08 DDR_B_MA07 DDR_B_MA06 DDR_B_MA05 DDR_B_MA04 DDR_B_MA03 DDR_B_MA02 DDR_B_MA01 DDR_B_MA00

DDR_B_CB7 DDR_B_CB6 DDR_B_CB5 DDR_B_CB4 DDR_B_CB3 DDR_B_CB2 DDR_B_CB1 DDR_B_CB0

DDR_CKE7 DDR_CKE6 DDR_CKE5 DDR_CKE4

DDR_B_CMDCLK_N3 DDR_B_CMDCLK_P3 DDR_B_CMDCLK_N2 DDR_B_CMDCLK_P2 DDR_B_CMDCLK_N1 DDR_B_CMDCLK_P1 DDR_B_CMDCLK_N0 DDR_B_CMDCLK_P0

DDR_B_CS_N7 DDR_B_CS_N6 DDR_B_CS_N5 DDR_B_CS_N4 DDR_B_CS_N3 DDR_B_CS_N2 DDR_B_CS_N1 DDR_B_CS_N0

DDR_B_VREF

DDR_B_CAS_N DDR_B_RAS_N DDR_B_WE_N

DDR_B_BA0 DDR_B_BA1 DDR_B_BA2

DDR_B_DQS_P8 DDR_B_DQS_N8 DDR_B_DQS_P7 DDR_B_DQS_N7 DDR_B_DQS_P6 DDR_B_DQS_N6 DDR_B_DQS_P5 DDR_B_DQS_N5 DDR_B_DQS_P4 DDR_B_DQS_N4 DDR_B_DQS_P3 DDR_B_DQS_N3 DDR_B_DQS_P2 DDR_B_DQS_N2 DDR_B_DQS_P1 DDR_B_DQS_N1 DDR_B_DQS_P0 DDR_B_DQS_N0

MCH 2/8

DDR Group B

Title

Size Document Number Rev

Date: Sheet of

DDR_B_DQ63 DDR_B_DQ62 DDR_B_DQ61 DDR_B_DQ60 DDR_B_DQ59 DDR_B_DQ58 DDR_B_DQ57 DDR_B_DQ56 DDR_B_DQ55 DDR_B_DQ54 DDR_B_DQ53 DDR_B_DQ52 DDR_B_DQ51 DDR_B_DQ50 DDR_B_DQ49 DDR_B_DQ48 DDR_B_DQ47 DDR_B_DQ46 DDR_B_DQ45 DDR_B_DQ44 DDR_B_DQ43 DDR_B_DQ42 DDR_B_DQ41 DDR_B_DQ40 DDR_B_DQ39 DDR_B_DQ38 DDR_B_DQ37 DDR_B_DQ36 DDR_B_DQ35 DDR_B_DQ34 DDR_B_DQ33 DDR_B_DQ32 DDR_B_DQ31 DDR_B_DQ30 DDR_B_DQ29 DDR_B_DQ28 DDR_B_DQ27 DDR_B_DQ26 DDR_B_DQ25 DDR_B_DQ24 DDR_B_DQ23 DDR_B_DQ22 DDR_B_DQ21 DDR_B_DQ20 DDR_B_DQ19 DDR_B_DQ18 DDR_B_DQ17 DDR_B_DQ16 DDR_B_DQ15 DDR_B_DQ14 DDR_B_DQ13 DDR_B_DQ12 DDR_B_DQ11 DDR_B_DQ10 DDR_B_DQ09 DDR_B_DQ08 DDR_B_DQ07 DDR_B_DQ06 DDR_B_DQ05 DDR_B_DQ04 DDR_B_DQ03 DDR_B_DQ02 DDR_B_DQ01 DDR_B_DQ00

DDR_B_DQS_P17 DDR_B_DQS_N17 DDR_B_DQS_P16 DDR_B_DQS_N16 DDR_B_DQS_P15 DDR_B_DQS_N15 DDR_B_DQS_P14 DDR_B_DQS_N14 DDR_B_DQS_P13 DDR_B_DQS_N13 DDR_B_DQS_P12 DDR_B_DQS_N12 DDR_B_DQS_P11 DDR_B_DQS_N11 DDR_B_DQS_P10 DDR_B_DQS_N10 DDR_B_DQS_P09 DDR_B_DQS_N09

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

G2 G1 K4 L1 E1 F2 K1 K2 P4 P3 U1 U3 N2 N1 T1 T4 Y1 AA2 AD3 AD2 Y4 Y3 AC1 AC3 AF3 AG3 AK2 AK3 AF4 AF1 AJ4 AJ3 AL10 AM10 AM13 AL13 AM9 AN9 AM12 AK12 AL16 AM16 AM19 AL19 AM15 AN15 AM18 AK18 AK21 AL22 AK24 AL25 AM21 AN21 AN24 AM24 AK27 AL28 AM31 AK30 AM27 AN27 AN30 AM30

AM6 AN6 J3 J2 T2 R3 AB2 AB1 AJ1 AH1 AN12 AN11 AN18 AN17 AK23 AL23 AK29 AL29

DDRB_DQ63 24,25,26

DDRB_DQ62 24,25,26

DDRB_DQ61 24,25,26

DDRB_DQ60 24,25,26

DDRB_DQ59 24,25,26

DDRB_DQ58 24,25,26

DDRB_DQ57 24,25,26

DDRB_DQ56 24,25,26

DDRB_DQ55 24,25,26

DDRB_DQ54 24,25,26

DDRB_DQ53 24,25,26

DDRB_DQ52 24,25,26

DDRB_DQ51 24,25,26

DDRB_DQ50 24,25,26

DDRB_DQ49 24,25,26

DDRB_DQ48 24,25,26

DDRB_DQ47 24,25,26

DDRB_DQ46 24,25,26

DDRB_DQ45 24,25,26

DDRB_DQ44 24,25,26

DDRB_DQ43 24,25,26

DDRB_DQ42 24,25,26

DDRB_DQ41 24,25,26

DDRB_DQ40 24,25,26

DDRB_DQ39 24,25,26

DDRB_DQ38 24,25,26

DDRB_DQ37 24,25,26

DDRB_DQ36 24,25,26

DDRB_DQ35 24,25,26

DDRB_DQ34 24,25,26

DDRB_DQ33 24,25,26

DDRB_DQ32 24,25,26

DDRB_DQ31 24,25,26

DDRB_DQ30 24,25,26

DDRB_DQ29 24,25,26

DDRB_DQ28 24,25,26

DDRB_DQ27 24,25,26

DDRB_DQ26 24,25,26

DDRB_DQ25 24,25,26

DDRB_DQ24 24,25,26

DDRB_DQ23 24,25,26

DDRB_DQ22 24,25,26

DDRB_DQ21 24,25,26

DDRB_DQ20 24,25,26

DDRB_DQ19 24,25,26

DDRB_DQ18 24,25,26

DDRB_DQ17 24,25,26

DDRB_DQ16 24,25,26

DDRB_DQ15 24,25,26

DDRB_DQ14 24,25,26

DDRB_DQ13 24,25,26

DDRB_DQ12 24,25,26

DDRB_DQ11 24,25,26

DDRB_DQ10 24,25,26

DDRB_DQ9 24,25,26

DDRB_DQ8 24,25,26

DDRB_DQ7 24,25,26

DDRB_DQ6 24,25,26

DDRB_DQ5 24,25,26

DDRB_DQ4 24,25,26

DDRB_DQ3 24,25,26

DDRB_DQ2 24,25,26

DDRB_DQ1 24,25,26

DDRB_DQ0 24,25,26

DDRB_DQS17 24,25,26

DDRB_DQS_N17 24,25,26

DDRB_DQS16 24,25,26

DDRB_DQS_N16 24,25,26

DDRB_DQS15 24,25,26

DDRB_DQS_N15 24,25,26

DDRB_DQS14 24,25,26

DDRB_DQS_N14 24,25,26

DDRB_DQS13 24,25,26

DDRB_DQS_N13 24,25,26

DDRB_DQS12 24,25,26

DDRB_DQS_N12 24,25,26

DDRB_DQS11 24,25,26

DDRB_DQS_N11 24,25,26

DDRB_DQS10 24,25,26

DDRB_DQS_N10 24,25,26

DDRB_DQS9 24,25,26

DDRB_DQS_N9 24,25,26

MCH DDR Channel A/B

MS-9151-100

16 56Wednesday, June 02, 2004

100Custom

U2C

SB_BREQ_N1 SB_BREQ_N0

B27 H25 G25

H24 B31 A28 D29

F24

J24 H27 B28 B30

F27 E25 E28 C29

F9 E15 D16

C5 D7 C6 D5

C9 A11 A10 B10 H12 K13 G11

J12

H10

D8 G10

F12

E9 D11 G13

F11 H13 C11 E12 K14 G14 H16 K16 G16

F15

F14

J14

J17 E16 K17 G17

F17 H18

J18 E18 B12 C12 D14 A13 A14 B13 A16 D17 B18 C17 B16 A19 A17 C14 B19 C18

ADS_N AP_N1 AP_N0

MCERR_N BNR_N BPRI_N BREQ_N1 BREQ_N0

CPURST_N DBSY_N DEFER_N DRDY_N

DEP3_N DEP2_N DEP1_N DEP0_N

DBI_N3 DBI_N2 DBI_N1 DBI_N0

HD_N63 HD_N62 HD_N61 HD_N60 HD_N59 HD_N58 HD_N57 HD_N56 HD_N55 HD_N54 HD_N53 HD_N52 HD_N51 HD_N50 HD_N49 HD_N48 HD_N47 HD_N46 HD_N45 HD_N44 HD_N43 HD_N42 HD_N41 HD_N40 HD_N39 HD_N38 HD_N37 HD_N36 HD_N35 HD_N34 HD_N33 HD_N32 HD_N31 HD_N30 HD_N29 HD_N28 HD_N27 HD_N26 HD_N25 HD_N24 HD_N23 HD_N22 HD_N21 HD_N20 HD_N19 HD_N18 HD_N17 HD_N16 HD_N15 HD_N14 HD_N13 HD_N12 HD_N11 HD_N10 HD_N09 HD_N08 HD_N07 HD_N06 HD_N05 HD_N04 HD_N03 HD_N02 HD_N01 HD_N00

TUMWATER

P_VTT

R151

49.9R1%

R154

90.9R1%

MCH 3/8

SB Interface

C47 C1U16X50805

SB_ADS_N10,12

SB_AP_N110,12

D D

C C

B B

A A

Notes: Value X_ means non-stuff

SB_AP_N010,12

SB_MCERR_N10,12

SB_BREQ_N110,12 SB_BREQ_N010,12

SB_CPURST_N10,12,14,37

SB_DEFER_N10,12

SB_DRDY_N10,12

BI BI

SB_BNR_N10,12

OUT

SB_BPRI_N10,12

IN BI

OUT

SB_DBSY_N10,12

OUT

BI BI

SB_DP_N310,12

SB_DP_N210,12

SB_DP_N110,12

SB_DP_N010,12

SB_DBI_N310,12

SB_DBI_N210,12

SB_DBI_N110,12

SB_DBI_N010,12

SB_D_N6310,12

SB_D_N6210,12

SB_D_N6110,12

SB_D_N6010,12

SB_D_N5910,12

SB_D_N5810,12

SB_D_N5710,12

SB_D_N5610,12

SB_D_N5510,12

SB_D_N5410,12

SB_D_N5310,12

SB_D_N5210,12

SB_D_N5110,12

SB_D_N5010,12

SB_D_N4910,12

SB_D_N4810,12

SB_D_N4710,12

SB_D_N4610,12

SB_D_N4510,12

SB_D_N4410,12

SB_D_N4310,12

SB_D_N4210,12

SB_D_N4110,12

SB_D_N4010,12

SB_D_N3910,12

SB_D_N3810,12

SB_D_N3710,12

SB_D_N3610,12

SB_D_N3510,12

SB_D_N3410,12

SB_D_N3310,12

SB_D_N3210,12

SB_D_N3110,12

SB_D_N3010,12

SB_D_N2910,12

SB_D_N2810,12

SB_D_N2710,12

SB_D_N2610,12

SB_D_N2510,12

SB_D_N2410,12

SB_D_N2310,12

SB_D_N2210,12

SB_D_N2110,12

SB_D_N2010,12

SB_D_N1910,12

SB_D_N1810,12

SB_D_N1710,12

SB_D_N1610,12

SB_D_N1510,12

SB_D_N1410,12

SB_D_N1310,12

SB_D_N1210,12

SB_D_N1110,12

SB_D_N1010,12

SB_D_N910,12

SB_D_N810,12

SB_D_N710,12

SB_D_N610,12

SB_D_N510,12

SB_D_N410,12

SB_D_N310,12

SB_D_N210,12

SB_D_N110,12

SB_D_N010,12

84.5R1% --> 90.9R1%

MCH_SB_VREF

C48 C220P50N

HDSTBN3

HDSTBP3

D10

HDSTBN2

E10

HDSTBP2

H15

HDSTBN1

J15

HDSTBP1

B15

HDSTBN0

C15

HDSTBP0

E30

HIT

D28

HITM

C30

HLOCK

A30

HTRDY

K23

HREQ4

H22

HREQ3

J23

HREQ2

J21

HREQ1

K20

HREQ0

TEST_N

RSTIN_N

HCRES0

HODTRES

HSLWCRES

HDVREF1 HDVREF0

HAVREF

HA_N35 HA_N34 HA_N33 HA_N32 HA_N31 HA_N30 HA_N29 HA_N28 HA_N27 HA_N26 HA_N25 HA_N24 HA_N23 HA_N22 HA_N21 HA_N20 HA_N19 HA_N18 HA_N17 HA_N16 HA_N15 HA_N14 HA_N13 HA_N12 HA_N11 HA_N10 HA_N09 HA_N08 HA_N07 HA_N06 HA_N05 HA_N04 HA_N03

HCLKINN HCLKINP

HADSTB_N1 HADSTB_N0

RS_N2 RS_N1 RS_N0

RSP_N

BINIT_N

PME_N GPE_N

L12 C2

SB_CRES0_MCH

C27

R135 48.7R1%

E27

R136 442R1%

F26

MCH_SB_VREF

E13 D13

F23

D20 C21 C20 D19 A20 B24 A23 D23 B21 A22 C24 D25 B25 A25 B22 D22 A26 C26 D26 F20 F21 E19 F18 E21 E22 G19 H19 K19 H21 G22 G23 J20 K22

J11 K11

C23 G20

G28 D31 F29

J26

G26

M24

R148 8.2KR

L25

TP42

SB_DSTBN_N3 10,12

SB_DSTBP_N3 10,12

SB_DSTBN_N2 10,12

SB_DSTBP_N2 10,12

SB_DSTBN_N1 10,12

SB_DSTBP_N1 10,12

SB_DSTBN_N0 10,12

SB_DSTBP_N0 10,12

SB_HIT_N 10,12

SB_HITM_N 10,12

SB_LOCK_N 10,12

OUT

SB_TRDY_N 10,12

SB_REQ_N4 10,12

SB_REQ_N3 10,12

SB_REQ_N2 10,12

SB_REQ_N1 10,12

SB_REQ_N0 10,12

PCIRST_BUFF2_N 46,49

R135 : 49.9R1%-->48.7R1% R136 : 549R1%-->442R1%

SB_A_N35 10,12

SB_A_N34 10,12

SB_A_N33 10,12

SB_A_N32 10,12

SB_A_N31 10,12

SB_A_N30 10,12

SB_A_N29 10,12

SB_A_N28 10,12

SB_A_N27 10,12

SB_A_N26 10,12

SB_A_N25 10,12

SB_A_N24 10,12

SB_A_N23 10,12

SB_A_N22 10,12

SB_A_N21 10,12

SB_A_N20 10,12

SB_A_N19 10,12

SB_A_N18 10,12

SB_A_N17 10,12

SB_A_N16 10,12

SB_A_N15 10,12

SB_A_N14 10,12

SB_A_N13 10,12

SB_A_N12 10,12

SB_A_N11 10,12

SB_A_N10 10,12

SB_A_N9 10,12

SB_A_N8 10,12

SB_A_N7 10,12

SB_A_N6 10,12

SB_A_N5 10,12

SB_A_N4 10,12

SB_A_N3 10,12

MCH_BCLK_N 15

MCH_BCLK 15

SB_ADSTB_N1 10,12

SB_ADSTB_N0 10,12

OUT

SB_RS_N2 10,12

OUT

SB_RS_N1 10,12

OUT

SB_RS_N0 10,12

OUT

SB_RSP_N 10,12

SB_BINIT_N 10,12

OUT

MCHPME_N 28 P3V3

U2E

E31

HIA_STRBS28 HIA_STRBF28

MCH_HI_VSWING MCH_HI_RCOMP MCH_HI_VREF MCH_PLLSEL1_N

MCH_66MHZ_CLK15

MCH_SMBCLK15,38,47 MCH_SMBDAT15,38,47

R1120 X_1KR

P_VTT

R1121 X_1KR

TP5 R1123 X_1KR R1124 1KR

DDRRES1 DDRRES2

P3V3

R137 X_1KR

P1V8_AUX

R138 40.2R1% R140 40.2R1%

BI BI

HI_STBS

D32

HI_STBF

H31

HISWING

K25

HIRCOMP

F32

HIVREF

L24

HICLK

SMBCLK

SMBDATA

TMS

TDI

TDO

TCK

TRST_N

AE2

DDR_RES1

AE1

DDR_RES2

AJ19

RESERVED

AF30

RESERVED

AE23

RESERVED

AD20

RESERVED

AA24

RESERVED

R32

RESERVED

R10

RESERVED

L33

RESERVED

RESERVED / EXPHPINTR_N

TUMWATER

C43

C44

C0.1U16X

DDRRES2

P1V5

MCH 5/8

Hub Interface 1.5

D57

A C

1N5817_DO214AC

DDRSLWCRES

DDRCRES0

DDRIMPCRES

TDIOCATHODE

TDIOCANODE

P1V5

P3V3

H33

V3REF

PLLSEL1# PLLSEL0#

DEBUG7 DEBUG6 DEBUG5 DEBUG4 DEBUG3 DEBUG2 DEBUG1 DEBUG0

R139 X_10KR R141 0R

R142 X_10KR R143 0R

FSB Speed

533 MHz

667 MHz

800 MHz

DDRSLWCRES

AK1

DDRCRES0

AC9

DDRIMPCRES

AL2 A29

MCH_PLLSEL0_N

C31 G32

HI11

J29

HI10

E33

HI09

F30

HI08

J27

HI07

K26

HI06

H28

HI05

G29

HI04

G31

HI03

C32

HI02

H30

HI01

J30

HI00

D1 L11 D3 B2 H9 G8 G7 J8

F33 D33

MCH_PLLSEL1_N

MCH_PLLSEL0_NDDRRES1

Memory PLLSEL1# P LLSEL0# DDR 266

DDR 333

DDRII 400

DDR 266 DDR 333

DDRII 400 1.5V Ground

DDR 266 DDR 333

DDRII 400 Ground Ground

C42 C0.1U16X

1.5V Ground

1.5V

1.5V Ground

Ground

825R1% --> 976R1%

R133 976R1%

R134 287R1%

HI_A11 28

HI_A10 28

HI_A9 28

HI_A8 28

HI_A7 28

HI_A6 28

HI_A5 28

HI_A4 28

HI_A3 28

HI_A2 28

HI_A1 28

HI_A0 28

Ground Ground

Ground

1.5V Ground

HUB INTERFACE VREF CIRCUITS

P1V5

P1V5 P1V5

20 mils

R144 43.2R1%

R145

78.7R1%

20 mils

R147 0R

R149

24.3R1%

MCH_HI_RCOMP

R146

43.2R1%

MCH_HI_VREF MCH_HI_VSWING

354mV 804mV

C45 C0.01U50X

Micro-Star Int'l Co., Ltd.

No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw

Title

MCH System Bus / HI 1.5

Size Document Number Rev

MS-9151-100

Date: Sheet of

20 mils

R150

49.9R1%

C46 C0.01U50X

17 56Wednesday, June 02, 2004

100Custom

+ 39 hidden pages

MSI MS-9151 Schematic 100

Specifications and Main Features

Frequently Asked Questions

User Manual