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MS-9142
Schematics
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Schematics
51 pgs1.82 Mb0

MSI MS-9142 Schematics

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Page 1
A B C
EVERGLADES MOTHERBOARD
Dell Controlled Print
D
REVISIONS
REV
X00-00 22 MAY 2003 A00-00
146313
FIRST PROTOTYPES
A00 PRODUCTION RELEASE
DESCRIPTIONECO DATE
06 JUNE 2003 SCOTT RAMSEY
APPROVED
1
1U DDR DIMM (PC2100)
1U DDR DIMM (PC2100)
Registered ECC SDRAMRegistered ECC SDRAM
2
1U DDR DIMM (PC2100)
1U DDR DIMM (PC2100)
PCI-X 133 SLOT
3
BLOCK DIAGRAM
4
64 bits data
DATA QUAD PUMPED
(4266 MB/S)
64
Registered ECC SDRAM
SEPARATE INBOUND & OUTBOUND
Registered ECC SDRAM
MEMORY BUS
128 bits data
64
DATA DOUBLE PUMPED
133MHz
(4266 MB/S)
IMB BUS 16 bits
DATA DOUBLE PUMPED
64 BIT PCI-X BUS
400 MHz
(1600 MB/S
EACH WAY)
PCI-X 133
(1067 MB/S)
16
PCI-X 133 SLOT
MAIN
EXPORT RESTRICTION:
THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.
PRESTONIA
PROCESSOR 1
64
P6 Bus
133MHz
PRESTONIA
PROCESSOR 2
RCC
GCLE
CMIC
SEPARATE INBOUND & OUTBOUND
SEPARATE INBOUND & OUTBOUND
16 DATA
AB
EACH IS 4 bits
DOUBLE PUMPED
(200 MB/S EACH WAY)
DATA DOUBLE PUMPED
(1600 MB/S
RCC
CIOB-E
PCI Bridge
RJ-45
Connector
GB ETHERNET
RJ-45
Connector
GB ETHERNET
64 BIT PCI-X BUS
PCI-X 133
(1067 MB/S)
THIN IMB BUS
200MHz
16
IMB BUS 16 bits 400 MHz
EACH WAY)
CIOB-X2
PCI Bridge
32Mb (4MB)
FLASH
(BIOS)
X BUS
LPC BUS
16 DATA
HARD DRIVES
ATA-100
IDE
FLOPPY
ON BACKPLANE
PCI-X 100
(800 MB/S)
RCC
ON BACKPLANE
64 BIT PCI-X BUS
LSI
53C1030
Channel
Ultra 320
EXTERNAL BACKPLANE
Connector
Ultra320 SCSI
USB 1
USB 2
Connector
RCC
CSB5
South
Bridge
NATIONAL
PC87414
Super
I/O Chip
PS/2
Connectors
KB & MOUSE
Connector
USB 3
Connector
Connector
ON CTRL PANEL
USB4
32 BIT PCI BUS
33 MHz
(133 MB/S)
PRIMARY IDE
SECONDARY IDE
SERIAL PORT B
SERIAL A
INTEL
i80321
"Verde"
Processor
ROMB CARD
THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP., EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
Header
CD-ROM
ON BACKPLANE
ON BACKPLANE
OPTIONAL
OPTIONAL
PROPRIETARY NOTE
TABLE OF CONTENTS
VGA
ATI
RAGE XL
Video
ESM4
Agilent
SP2
Processor
ESM4 FPGA
OPTIONAL
USB4
LPC BUS
RAID Memory
128MB DDR200
16Mb (2MB)
FLASH
(RAID)
32
8 MB
SDRAM
(2Mx32)
OPTIONAL
ESM4 CARD
SDRAM
FLASH
QLOGIC ZIRCON
ESM3
BMC
Processor
I2C
128KB
FLASH
DRAWN DESIGNED CHECKED APPROVED APPROVED APPROVED APPROVED RELEASED
TABLE OF CONTENTS
XILINX
XC9572XL
Support
ESM3
EVERGLADES TEAM
SHANE CHIASSON WILL SMITH STUART HAYES
DESCRIPTION
...
1
TABLE OF CONTENTS and BLOCK DIAGRAM
...
2
CLOCK DIAGRAM
...
3
...
4
CLOCKS
...
5
MEMORY & PCI CLOCKS
...
6
PROCESSORS PROCESSORS
...
7
...
8
PROCESSORS
...
9
...
10
ITP & LEVEL TRANSLATION
...
11
CMIC-LE (MEMORY INTERFACE)
...
12
CMIC-LE
...
13
CMIC-LE DECOUPLING & SUPPORT
...
14
DDR DIMMS
...
15
DDR DIMMS
16...
DDR TERMINATION
...
17
SPARE GATES
...
18
...
19
IRQ SERIALIZATION & X-BUS ADDRESS LATCHES
...
20
USB, REAR CYCLOPS
21
...
SYSTEM BIOS FLASH, CSB5 I2C MUX
...
22
SIO
...
23
PS/2 AND SERIAL
...
24
ATI VIDEO
25...
VIDEO MEMORY & CONNECTOR
...
26
CIOB-X2
...
27
CIOB-X2 POWER
28...
CIOB-E -- PCI-X AND PHYSICAL LAYER INTERFACE
...
29
CIOB-E -- IMB BUS AND STRAPPING
...
30
CIOB-E -- POWER
...
31
SECONDARY PCI-X BUS SERIES TERMINATORS
32
...
PHYSICAL LAYER NIC CONNECTORS
...
33
PCI-X BUS -- PULL-UPS AND CONNECTORS
...
34
-12V INVERTER ESM3 -- ZIRCON BMP and SUPPORT CPLD
...
35
...
36
ESM3 -- SRAM and FLASH ESM3 -- I2C
...
37
ESM3 -- FANS
38... 39
...
ESM3 -- ESM4 and INTRUSION DETECTION
...
40
ESM3 -- VOLTAGE MONITORING
...
41
DC/DC CONVERTERS: 5V, 3.3V, 2.5V, 1.8V, 1.5V, 1.25V
...
42
BACKPLANE CONNECTOR
...
43
LSI SCSI CONTROLLER--PCI-X/SCSI DIFFERENTIAL PAIRS
44...
LSI SCSI CONTROLLER--POWER/MISC
...
45
SCSI TERMINATION AND EXTERNAL SCSI CONNECTOR
...
46
FRONT PANEL CONNECTOR & IMPEDANCE TEST COUPONS
...
47
POWERGOOD CPLD
48...
POWER SUPPLY CONNECTOR
...
49
ESM4 NIC CONNECTOR
50...
RESET BLOCK DIAGRAM
...
51
ROMB (CONNECTOR, BATTERY, CHARGER, SUPPORT CIRCUITRY)
PWA P/N
02/14/03
02/14/03 02/14/03 02/14/03
MSI Celestica
A CURRENT ISSUE OF THIS DRAWING MUST INCLUDE A COPY OF THE FOLLOWING ECO'S: ECO
ECO ECO ECO ECO ECO ECO ECO
TITLE
EVERGLADES MB
DWG NO.
P1348 H1631
SCHEM,PLNR,PE1750,533MSI
X1004
6/6/2003
DCBA
Build 1 Build 2
COMPUTER CORPORATION AUSTIN,TEXAS
SHEET
1 OF 51
1
6-9-2003_13:45EVERGLADES
1
2
3
4
A00-00
Page 2
B D
CA
80MHz
OSC
CLOCK DISTRIBUTION DIAGRAM
100MHz
1
14.3MHz XTAL
XTALOUTXTALIN
133MHz 133MHz
133M
CDC950
2
CLOCK
GENERATOR
33M
REF
48M
133MHz
133MHz
33MHz
14.3MHz
14.3MHz
48MHz 48MHz
3
PRESTONIA
PROCESSOR
HOST
PRESTONIA
PROCESSOR
HOST
ITP
(DEBUG)
HOST
1-to-9
ZERO
DELAY
Buffer
IN FB
CMIC-LE
NORTH BRIDGE
MCLK
IMB_CLK_A_R
BCLK
IMB_CLK_A_T
IMB_CLK_B_R IMB_CLK_B_T
IMB_CLK_T
133MHz
133MHz
33MHz
200MHz 200MHz
200MHz 200MHz
DIMM DIMM DIMM DIMM
1-to-10
BUFFER
10MHz
OSC
CLKOUT
33MHz 33MHz 33MHz 33MHz 33MHz 33MHz 33MHz 33MHz 33MHz 33MHz
200MHz 200MHz
200MHz 200MHz
PIRQ
SHIFTER
CLK
PIRQ
SHIFTER
CLK
ESM4
CONNECTOR
PCICLK
ESM3 CPLD
LPCCLK
ESM3
PROCESSOR
LPCCLK
CLKIN
CIOB-X2
PFBCLK
PCLK0
FSCLK_T FSCLK_R
33M
SFBCLK SCLK0
CIOB-E
PFBCLK
PCLK0 PCLK0 PCLK0
FSCLK_T FSCLK_R
33M
14.3MHz
33/66/133MHz 33/66/133MHz
25 MHz
XTAL
PCICLK
XTALIN XTALOUT
LPCCLK
48MHz
CLKIN
ATI
VIDEO
MEM_CLK CLK
SUPER I/O
87414
100MHz 100MHz
33/66/133MHz 33/66/133MHz
PROG
VIDEO
MEMORY
64 BIT PCI-X SLOT
14.3MHz 48MHz
80MHz
CLKOUT
SOUTH BRIDGE
PCICLK
REFCLK USBCLK
64 BIT PCI-X SLOT
CSB5
LSI
1030
SCSICLK
PCICLK
ROMB SOCKET
PCICLK_IN
1
2
3
4
A B
14.3MHz
14.3MHz
48MHz 48MHz
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
EVERGLADES 2 6-9-2003_13:55
DC
AUSTIN,TEXAS
REV.
SHEET
2 OF 51
A00-00
4
Page 3
B D
CA
1
2
GREY BOX 1
3
GREY BOX 2
$8.35 for 100W SIP
+3.3V_AUX
+12V
+12V
+3.3V_FP
PWRGOOD
AC_OKPS_ON
+12V
+3.3V_FP
PWRGOOD
AC_OKPS_ON
PAGE 48
+12V
+12V
+12V
+12V
+2.5V
+12V
+12V
+5V
8-9A
IN
ENABLE
+5V
PWRGOOD
+1.8V
1.7A
IN
+1.8V
PWRGOODENABLE
+3.3V
11A
IN
+3.3V
PWRGOODENABLE
+2.5V
18A
IN
+2.5V
PWRGOODENABLE
+1.5V
2.7A
IN
+1.5V
DDR_TERM
5-6A
IN
+1.25V
PWRGOODENABLE
+3.3V_AUX
+5V
40W SIP=8A MAX ...OR 1x40W + 1x15W
PAGE 41
15W SIP
PAGE 41
40W SIP=10A MAX ...OR 1x40W + SMALL LINEAR?
PAGE 41
100W SIP=25A MAX
PAGE 41
LINEAR FROM 2.5V
PAGE 41
15W SIP
PAGE 41
+3.3V_AUX
+3.3V
INCOMPLETE!
+5V_AUX
5V_AUX
100mA
IN
+2.5V
PAGE 37
-12V
IN
100mA
PAGE 34
+2.5V
+3.3V_NIC
+2.5V_AUX
0.5A
IN
+2.5V
+3.3V_NIC or +2.5V_NIC ???
PAGE 30
+1.2V_AUX
1.9A
IN
+5V
PAGE 30
PROC 1
VID
PWRGOOD
THERMTRIP
PROC 2
V_CORE V_CORE
PWRGOOD
VID
THERMTRIP
+2.5V_NIC
LINEAR
+1.2V_NIC
LINEAR
CORE VRM 1
V_CORE
VIDV_CORE
ENABLEPWRGOOD
PAGE 9
CORE VRM 2
VID
ENABLE
PWRGOOD
PAGE 9
POWERGOOD
CPLD
VRM_ENVID1
THERMTRIP1 VID2
THERMTRIP2
PIRQ CONNECTIONS
PIRQ0
PIRQ1
PIRQ2
PIRQ3
PIRQ4
PIRQ5
DEVICE CIOB-E LSI 1030 SCSI VERDE ROMB
PCI-X SLOT 1 PCI-X SLOT 2 ESM4 ESM3
PCI DEVICE NUMBERS
DEVICE BUS AD LINE DEVICE
CMIC CIOB-E CIOB-X2
ATI VIDEO CSB5 -- MAIN CSB5 -- IDE
CSB5 -- LPC BUS CSB5 -- XIOAPIC (UNUSED) ESM4
PCI-X SLOT 1 1
LSI 1030 SCSI
PCI-X SLOT 2
GIGABIT NIC A GIGABIT NIC B
B
A
A A
USES GPIOE16 ON THE SUPER I/O CHIP -- MUST BE SOFTWARE CONFIGURED TO GENERATE IRQ
0 0 0
0 0 0 0 0 AD31 0xF 3 0 0
2VERDE ROMB 2
3
4
PIRQ6
B B
A B C D
AD16
AD30 0xE AD31 0xF 0 AD31 0xF AD31 0xF
AD31 AD24
AD22
AD19 AD21
AD20
TO USE ITP CONNECTOR,
POPULATE THE FOLLOWING COMPONENTS: R106/R107 ON PAGE 4 WITH 22 OHM (133MHz CLOCK TO ITP)
J15 and P11 WITH APPROPRIATE CONNECTORS
PIRQ7
PIRQ8
PIRQ9
A B C D
0xF
PIRQ10
PIRQ11
PIRQ12
FUNCTION
0
8
6
3 5
4
1 14
PIRQ13
PIRQ14
0
1 2CSB5 -- USB
4-6
0 1
PIRQ15
1
DCBA
2
3
4
VOLTAGE CONVERTER BLOCK DIAGRAM
A B
-12V
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
EVERGLADES 3 6-9-2003_13:55
DC
AUSTIN,TEXAS
REV.
SHEET
3 OF 51
A00-00
4
Page 4
ROOM=MAINCLK
B D
CA
R199
R185
21
1
CK_SYN_XIN1
10pF
50V-5%
21
CB191
1 2
0.1uF 16V
CK_SYN_XIN2
R176
475-1%
1 2
21
CB17021CB189
0.1uF 16V
0.1uF 16V
0.1uF 16V
4
4 4
4,7,12,22
V_3P3_SYN1
V_3P3_SYN2
X3
21
14.31818MHz
R179
12
1M-5%
NP*
21
10pF
1 2
C235
NP*
+3.3V
21
2
C248
+3.3V
21
C230
4.7uF
4.7uF
C247
1 2
6.3V-10%
C231
1 2
6.3V-10%
L41
600mA
.01UF
50V-20%
L39
1 2
600mA
.01UF
50V-20%
21
21
CB193
21
CB172
4.7uF
CB190
6.3V-10%
4.7uF
CB178
6.3V-10%
1 2
0.1uF 16V0.1uF 16V
21
1 2
CB169
CB167
CB192
0.1uF 16V
.01UF
1 2
50V-20%
1 2
50V-5%
.01UF
50V-20%
1 2
CB179
1 2
CB168
.01UF
50V-20%
C242
.01UF
NP*
50V-20%
CB171
22-5%
47
4 4
4
R184
1 2
22-5%
R_CK_33M_PCI GPI_SYN_SEL100
R_CK_14M_CSB SYN_IREF_26 R_CK_48M_USB
R_CK_48M_SIO SYN_MULTSEL0
SYN_MULTSEL1
GPI_SPREAD_EN SYNTH_EN
R183
1 2
22-5%
21
22-5%
22 7
XIN HCLK0
23
XOUT
1
CLK33
48
SEL100/133
19
REF
26
IREF
3
3V48/SELA
4
3V48B/SELB
30
MULTISEL0
29
MULTISEL1
20
SPREAD
44
PWRDWN
2
VDD0
6
VDD1
12
VDD2
18
VDD3
24
VDD4
25
VDD5
31
VDD6
37
VDD7
43
VDD8
46
VDD9
U24
HCLKB0
HCLKB1
HCLKB2
HCLKB3
HCLKB4
HCLKB5
HCLKB6
HCLKB7
CDC950/9248
TSSOP48
SUB*_4C853
HCLK1
HCLK2
HCLK3
HCLK4
HCLK5
HCLK6
HCLK7
GND0 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9
8 10
11 13
14 16
17 42
41 39
38 36
35 33
32
5 9 15 21 27 28 34 40 45 47
CK_14M_TO_BUFFER
CK_48M_SIO
CK_48M_USB
CK_33M_PBUF2
4
22
18
5
R_CK_100M_CPU0_P
R_CK_100M_CPU0_N
R_CK_100M_CPU1_P
R_CK_100M_CPU1_N
NC_CK_100M_MEM_P
NC_CK_100M_MEM_N
NC_CK_100M_SYN_16
NC_CK_100M_SYN17
R_CK_100M_ITP_P
R_CK_100M_ITP_N
NC_CK_100M_SP2_P
NC_CK_100M_SP2_N
R_CK_100M_CMIC_P
R_CK_100M_CMIC_N
NC_CK_100M_SYN33_P
NC_CK_100M_SYN32_N
1 2
NP0
1 2
R195
22-5%
R197
22-5%
R171
22-5%
R173
22-5%
1 2
21
1 2
NP0
21
1 2
R194
22-5%
R196
22-5%
R170
22-5%
R172
22-5%
21
21
R208
R210
49.9-1%
21
R209
49.9-1%
21
49.9-1%
R211
21
49.9-1%
21
R152
R154
49.9-1%
21
R153
49.9-1%
21
49.9-1%
R155
21
49.9-1%
CK_100M_CPU0_P
CK_100M_CPU0_N
CK_100M_CPU1_P
CK_100M_CPU1_N
CK_100M_ITP_P
CK_100M_ITP_N
CK_100M_CMIC_P
CK_100M_CMIC_N
1
6
6
6
6
10
10
12
12
2
4C853 RCC_SYN (TSSOP48) IS:
TI CDC950DGG ICS ICS9248AG-150 PHILIPS PCK2022RDGG PERICOM PI6C210A
+3.3V
14 U65
R470
1 2
2
1
3 74VHC02
5 6
74VHC02
8 9
74VHC02
11 12
74VHC02
220
CK_14M_XLSYN_R
SUB*_907XP
+3.3V
SUB TO LCX FOR EDGE RATE
14 U65
4
CK_14M_CSB_R
SUB*_907XP
+3.3V
SUB TO LCX FOR EDGE RATE
14 U65
10
CK_14M_RNDM_R
SUB*_907XP
+3.3V
SUB TO LCX FOR EDGE RATE
14 U65
13
NC_14MBUF_X2
SUB*_907XP SUB TO LCX FOR EDGE RATE
X01 -- BUFFERED 14MHz CLOCK TO IMPROVE EDGE RATES
3
+3.3V
R214
21
NP
10K-5%
R193
1 2
NP
10K-5%
R192
21
NP
10K-5%
R174
1 2
NP
10K-5%
R175
21
10K-5%
R198
21
NP
10K-5%
R169
1 2 10K-5%
21
R212
1 2
SPREAD LOW = SPREAD ENABLED
4
SPREAD HIGH = SPREAD DISABLED SEL100 LOW = 100MHZ
SEL100 HIGH = 133MHZ MULTSEL0 & MULTSEL1 SELECTION
0 0 60ohm, 0.71V 0 1 50ohm, 0.71V
SELA & SELB SELECTION
0 0 H=NORMAL MODE
R207
1K-5%
R205
1K-5%
1 2
R156
1K-5%
NP
21
21
220
R157
220
R213
1 2
220
21
R151
NP
220
R_CK_14M_CSB
R_CK_48M_SIO
R_CK_48M_USB
SYN_MULTSEL0
SYN_MULTSEL1
GPI_SPREAD_EN
GPI_SYN_SEL100
4
4
4
4
4
4
4,7,12,22
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
CK_14M_TO_BUFFER
4
+3.3V
21
CB509
0.1uF 16V
A B
R472
33-5%
R471
33-5%
R494
33-5%
21
CK_14M_XLSYN
21
CK_14M_CSB
21
CK_14M_RNDM
NP*
24
18
47
3
4
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
DATE
X1004
6/6/2003
EVERGLADES 4 6-9-2003_13:55
DC
AUSTIN,TEXAS
REV.
SHEET
4 OF 51
A00-00
Page 5
B D
CK_133M_MCLK_P
11
CK_133M_MCLK_N
11
1
CK_MEM_FB_133M_N
+2.5V
C345
1 2
1 2
CB271
0.1uF 16V
L46
600mA
L45
600mA
0.1uF 16V
21
21
6.3V-10%
4.7uF
CB272
1
2
C328
1 2
CB284
1 2
CB283
3300pF
50V-10%
.01UF
CB282
50V-20%
1 2
0.1uF 16V
.01UF
1 2
1 2
CB281
50V-20%
1 2
CB273
0.1uF 16V
0.1uF 16V
CK_MEM_FB_133M_P
+2.5V
C335
1 2
.01UF
1 2
CB285
50V-20%
0.1uF 16V
1 2
CB274
2
OVERLAP THESE THREE PINS IF POSSIBLE
CA
R294
1 2 100-1%
ROOM=DDRCLK
U33
0-5%0-5%
RB137 RB133
1 2
0-5%
CLK0_P CLK0_N
CLK1_P CLK1_N
CLK2_P CLK2_N
CLK3_P CLK3_N
CLK4_P CLK4_N
CLK5_P CLK5_N
CLK6_P CLK6_N
CLK7_P CLK7_N
CLK8_P CLK8_N
CLK9_P CLK9_N
FBOUT_P FBOUT_N
12
NP*
3 2
5 6
10 9
20 19
22 23
46 47
44 43
39 40
29 30
27 26
32 33
1 2 100-1%
14,15,21 14,15,21
R295
1 2
0-5%
C332
1 2
0.1uF 16V
0.1uF 16V
R276
ASDATA_2P5V ASCLK_2P5V
13
CLKIN_P
14
CLKIN_N
35
FBIN_N
36
FBIN_P
37
SDA
12
SCK
16
AVCC
17
AGND
4
VDDQ0
11
VDDQ1
15
I2CVDD
21
VDDQ3
28
VDDQ4
34
VDDQ5
38
VDDQ6
45
VDDQ7
1
GND0
7
GND1
8
GND2
18
GND3
24
GND4
25
GND5
31
GND6
41
GND7
42
GND8
48
GND9
2.5V PLL CLOCK DRIVER
FBIN_N AND FBIN_P ARE SWAPPED ON DIFFERENT VENDORS BUT FBOUT_P AND FBOUT_N ARE ALSO SWAPPED
NOTE
SO IT IS NOT A PROBLEM
0-5%
12
RB134
NP*
FBOUT_LOOP1_N
12
RB141 RB139
1 2
FBOUT_LOOP2_N
0-5%
NP*
59PRT IS:
TI CDCV850DGG ICS ICS93701BG PHILIPS PCK2057DGG
CK_SP5_133M_P CK_SP5_133M_N
CK_SP1_133M_P CK_SP1_133M_N CK_SP2_133M_P CK_SP2_133M_N CK_SP3_133M_P CK_SP3_133M_N
CK_DBG_133M_P CK_DBG_133M_N
CK_SP4_133M_P CK_SP4_133M_N
CK_133M_DDR3_P CK_133M_DDR3_N CK_133M_DDR2_P
CK_133M_DDR2_N CK_133M_DDR1_P CK_133M_DDR1_N CK_133M_DDR0_P
CK_133M_DDR0_N CK_MEM_FB_OUT_133M_P
CK_MEM_FB_OUT_133M_N
OVERLAP THESE THREE PINS IF POSSIBLE
5 5
5 5
5 5
5 5
5 5
15 15
15 15
14 14
14 14
HEADER FOR LOGIC ANALYZER CLOCK
J4
1
NP*
100-1%
J3
1
NP*
5
5
5
CK_SP1_133M_P
CK_SP1_133M_N
CK_SP2_133M_P
R292
1 2
100-1%
R297
1 2
2
R293
100-1%
1
CK_SP2_133M_N
5
CK_SP3_133M_P
5
CK_SP3_133M_N
5
CK_SP4_133M_P
5
1 2
R296
1 2
100-1%100-1%
OVERLAP THESE THREE PINS
33 MHz PCI CLOCK GENERATION
3
+3.3V
1 2
0.1uF 16V C426
21
L50
600mA
21
CB427
4.7uF
21
CB413
6.3V-10%
V_3P3_PBUF2
C418
1 2
0.1uF 16V
.01UF
50V-20%
C397
1 2
.01UF
50V-20%
1 2
C405
C398
1 2
0.1uF 16V
CK_33M_PBUF2
4
.01UF
50V-20%
1 2
CB415
.01UF
50V-20%
RB267
10K-5%
21
4
2204T CKBUF_M (SSOP28) IS:
ROOM=PCICLK
10K-5%
VDD0 VDD1 VDD2 VDD3 VDD4 VDD5
SDATA
SCLOCK
BUF_IN VSS0
VSS1 VSS2 VSS3 VSS4 VSS5
W40S11_02
SUB*_2204T
U37
R371
10K-5%
1
5 10 19 24 28
14
21
15
9
4
8 12 17 21 25
R345
21
VDDIIC
SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDRAM9
VSSIIC
PBUF2_OE
13
20
OE
2 3 6 7 22 23 26 27 11 18
16
R_CK_33M_LPC
R_CK_33M_CIOB
R_CK_33M_VIDEO
R_CK_33M_SIO
R_CK_33M_PIRQ0
R_CK_33M_RISER
R_CK_33M_ESM4
R_CK_33M_CPLD1
R_CK_33M_CSB5
R_CK_33M_PIRQ1
RB242
22-5%
RB246
22-5%
R344
22-5%
R336
1 2
22-5%
R347
22-5%
R343
21
22-5%
21
RB245
21
22-5%
21
RB244
21
22-5%
21
RB241
21
22-5%
RB265
21
22-5%
21
IF POSSIBLE
CK_33M_LPC
CK_33M_CIOB
CK_33M_VIDEO
CK_33M_SIO
CK_33M_PIRQ0
CK_33M_CIOBE
CK_33M_ESM4
CLK_PCI32_ZIRCON
CK_33M_CSB5
CK_33M_PIRQ1
0-5%
NP*
12
RB136
0-5% 0-5%
FBOUT_LOOP1_P
12
RB142 RB140
1 2
FBOUT_LOOP2_P
0-5% 0-5%
NP*
19
27
24
22
19
28
39
35
18
19
12
RB138 RB135
1 2
NP*
MEMORY CLOCK GENERATION
CYPRESS W40S11-02 PERICOM PI6C182AH ICS ICS9279AF-03
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
A B
OVERLAP THESE THREE PINS IF POSSIBLE
R275
CK_SP4_133M_N
5
CK_SP5_133M_P
5
CK_SP5_133M_N
5
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
DATE
X1004
6/6/2003
EVERGLADES 5 6-9-2003_13:55
DC
1 2
R300
100-1%
1 2
COMPUTER CORPORATION AUSTIN,TEXAS
REV.
SHEET
5 OF 51
A00-00
3
4
Page 6
B D
CA
1
H_A3
6,11
H_A4
6,11
H_A5
6,11
H_A6
6,11
H_A7
6,11
H_A8
6,11
H_A9
6,11
H_A10
6,11
H_A11
6,11
H_A12
6,11
H_A13
6,11
H_A14
6,11
H_A15
6,11
H_A16
6,11
H_A17
6,11
H_A18
6,11
H_A19
6,11
H_A20
6,11
H_A21
6,11
H_A22
6,11
H_A23
6,11
H_A24
6,11
H_A25
6,11
H_A26
6,11
H_A27
6,11
H_A28
6,11
H_A29
6,11
H_A30
6,11
H_A31
6,11
H_A32
6,11
H_A33
2
3
6,11 6,11 6,11
6,11 6,11
6,11 6,11 6,11
6,11
6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11
6,11 6,11 6,11 6,11 6,11
6,10 6,10 6,10 6,10
6,10,12
6,10
6,10 6,11
6,10 6,10 6,10 6,10
H_A34 H_A35
H_AP0 H_AP1
H_BNR H_BPRI H_BREQ0 H_BREQ1
6
H_BREQ23_PU
6
H_BREQ23_PU
6
H_LOCK
H_ADSTB0 H_ADSTB1 H_ADS H_REQ0 H_REQ1 H_REQ2 H_REQ3 H_REQ4
H_RS0 H_RS1 H_RS2 H_RSP H_TRDY
CK_100M_CPU0_P
4
CK_100M_CPU0_N
4
H_INTR H_NMI H_SLP H_STPCLK H_RST H_INIT
H0_IERR
10
H_MCERR H_BINIT
H_A20M H_SMI H_FERR H_IGNNE
A22 A20 B18 C18 A19 C17 D17 A13 B16 B14 B13 A12 C15 C14 D16 D15 F15 A10 B10 B11 C12 E14 D13
A9
B8 E13 D12 C11
B7
A6
A7
C9
C8
E10
D9
F20 D23 D20 F12 E11 D10 A17
F17 F14 D19 B19 B21 C21 C20 B22
E21 D22 F21
C6 E19
Y4
W5 B24 G23 AE6
D4
Y8
D6
E5
D7 F11
F27 C27 E27 C26
PRESTONIA/NOCONA 604 PROCESSOR
4
PROC_0
A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35
AP0 AP1
BNR BPRI BR0 BR1 BR2 BR3 LOCK
ADSTB0 ADSTB1 ADS REQ0 REQ1 REQ2 REQ3 REQ4
RS0 RS1 RS2 RSP TRDY
BCLK0 BCLK1 LINT0 LINT1 SLP STPCLK RESET INIT
IERR MCERR BINIT
A20M SMI FERR IGNNE
REV. 1.5-EMTS, ZIF SKT
HETERO 1 OF 5
ADD1=ADD*_Y0363_SCREW ADD2=ADD*_Y0363_SCREW ADD3=ADD*_Y0363_SCREW ADD4=ADD*_Y0363_SCREW ADD5=ADD*_Y0363_SCREW ADD6=ADD*_Y0363_SCREW ADD7=ADD*_Y0363_SCREW ADD8=ADD*_Y0363_SCREW
D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63
DP0 DP1 DP2 DP3
DSTBN0 DSTBN1 DSTBN2 DSTBN3 DSTBP0 DSTBP1 DSTBP2 DSTBP3
HITM
HIT
DEFER
DBI0 DBI1 DBI2 DBI3 DBSY DRDY
H_A3
6,11
H_A4
6,11
H_A5
6,11
H_A6
6,11
Y26
D0
AA27
D1
Y24
D2
AA25
D3
AD27
D4
Y23
D5
AA24
D6
AB26
D7
AB25
D8
AB23
D9
AA22 AA21 AB20 AB22 AB19 AA19 AE26 AC26 AD25 AE25 AC24 AD24 AE23 AC23 AA18 AC20 AC21 AE22 AE20 AD21 AD19 AB17 AB16 AA16 AC17 AE13 AD18 AB15 AD13 AD14 AD11 AC12 AE10 AC11 AE9 AD10 AD8 AC9 AA13 AA14 AC14 AB12 AB13 AA11 AA10 AB10 AC8 AD7 AE7 AC6 AC5 AA8 Y9 AB6
AC18 AE19 AC15 AE17
Y21 Y18 Y15 Y12 Y20 Y17 Y14 Y11
A23 E22 C23
AC27 AD22 AE12 AB9 F18 E18
H_DSTBN0 H_DSTBN1 H_DSTBN2 H_DSTBN3 H_DSTBP0 H_DSTBP1 H_DSTBP2 H_DSTBP3
H_HITM H_HIT H_DEFER
H_DBI0 H_DBI1 H_DBI2 H_DBI3
H_DBSY H_DRDY
H_D0 H_D1 H_D2 H_D3 H_D4 H_D5 H_D6 H_D7 H_D8
H_D9 H_D10 H_D11 H_D12 H_D13 H_D14 H_D15 H_D16 H_D17 H_D18 H_D19 H_D20 H_D21 H_D22 H_D23 H_D24 H_D25 H_D26 H_D27 H_D28 H_D29 H_D30 H_D31 H_D32 H_D33 H_D34 H_D35 H_D36 H_D37 H_D38 H_D39 H_D40 H_D41 H_D42 H_D43 H_D44 H_D45 H_D46 H_D47 H_D48 H_D49 H_D50 H_D51 H_D52 H_D53 H_D54 H_D55 H_D56 H_D57 H_D58 H_D59 H_D60 H_D61 H_D62 H_D63
H_DP0 H_DP1 H_DP2 H_DP3
6,11 6,11 6,11 6,11
6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11
6,11 6,11 6,11 6,11
6,12 6,12 6,12 6,12 6,12 6,12 6,12 6,12
6,11 6,11 6,11
6,11 6,11
Swizzled.
ADD1=ADD*_89JJP_SCREW2 ADD2=ADD*_89JJP_SCREW2 ADD3=ADD*_89JJP_SCREW2 ADD4=ADD*_89JJP_SCREW2 ADD5=ADD*_89JJP_SCREW2 ADD6=ADD*_89JJP_SCREW2 ADD7=ADD*_89JJP_SCREW2 ADD8=ADD*_89JJP_SCREW2
6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11
6,11 6,11
6,11 6,11
6,11
6,11
6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11
6,11 6,11 6,11 6,11 6,11
6,10 6,10 6,10 6,10
6,10,12
6,10
6,10 6,11
6,10 6,10 6,10 6,10
H_A7 H_A8 H_A9 H_A10 H_A11 H_A12 H_A13 H_A14 H_A15 H_A16 H_A17 H_A18 H_A19 H_A20 H_A21 H_A22 H_A23 H_A24 H_A25 H_A26 H_A27 H_A28 H_A29 H_A30 H_A31 H_A32 H_A33 H_A34 H_A35
H_AP0 H_AP1
H_BNR H_BPRI H_BREQ1
6
H_BREQ0 H_BREQ23_PU
6
H_BREQ23_PU
6
H_LOCK
H_ADSTB0 H_ADSTB1 H_ADS H_REQ0 H_REQ1 H_REQ2 H_REQ3 H_REQ4
H_RS0 H_RS1 H_RS2 H_RSP H_TRDY
CK_100M_CPU1_P
4
CK_100M_CPU1_N
4
H_INTR H_NMI H_SLP H_STPCLK H_RST H_INIT
H1_IERR
10
H_MCERR H_BINIT
H_A20M H_SMI H_FERR H_IGNNE
A22 A20 B18 C18 A19 C17 D17 A13 B16 B14 B13 A12 C15 C14 D16 D15 F15 A10 B10 B11 C12 E14 D13
A9
B8 E13 D12 C11
B7
A6
A7
C9
C8
E10
D9
F20 D23 D20 F12 E11 D10 A17
F17 F14 D19 B19 B21 C21 C20 B22
E21 D22 F21
C6 E19
Y4
W5 B24 G23 AE6
D4
Y8
D6
E5
D7 F11
F27 C27 E27 C26
PRESTONIA/NOCONA 604 PROCESSOR
SOURCE SYNC GROUP 1 - BUS_NAME=GTL1 SOURCE SYNC GROUP 2 - BUS_NAME=GTL2 SOURCE SYNC GROUP 3 - BUS_NAME=GTL3 SOURCE SYNC GROUP 4 - BUS_NAME=GTL4 SOURCE SYNC GROUP 5 - BUS_NAME=GTL5 SOURCE SYNC GROUP 6 - BUS_NAME=GTL6 GTL "WIRE-OR" SIGNALS - BUS_NAME=GTL_WIREOR GTL COMMON CLOCK INPUT SIGNALS - BUS_NAME=GTL_INPUT GTL COMMON CLOCK I/O SIGNALS - BUS_NAME=GTL_IO
PROC_1
A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35
AP0 AP1
BNR BPRI BR0 BR1 BR2 BR3 LOCK
ADSTB0 ADSTB1 ADS REQ0 REQ1 REQ2 REQ3 REQ4
RS0 RS1 RS2 RSP TRDY
BCLK0 BCLK1 LINT0 LINT1 SLP STPCLK RESET INIT
IERR MCERR BINIT
A20M SMI FERR IGNNE
REV. 1.5-EMTS, ZIF SKT
HETERO 1 OF 5
D0 D1 D2 D3 D4 D5 D6 D7 D8
D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63
DP0 DP1 DP2 DP3
DSTBN0 DSTBN1 DSTBN2 DSTBN3 DSTBP0 DSTBP1 DSTBP2 DSTBP3
HITM
HIT
DEFER
DBI0 DBI1 DBI2 DBI3 DBSY DRDY
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
Y26 AA27 Y24 AA25 AD27 Y23 AA24 AB26 AB25 AB23 AA22 AA21 AB20 AB22 AB19 AA19 AE26 AC26 AD25 AE25 AC24 AD24 AE23 AC23 AA18 AC20 AC21 AE22 AE20 AD21 AD19 AB17 AB16 AA16 AC17 AE13 AD18 AB15 AD13 AD14 AD11 AC12 AE10 AC11 AE9 AD10 AD8 AC9 AA13 AA14 AC14 AB12 AB13 AA11 AA10 AB10 AC8 AD7 AE7 AC6 AC5 AA8 Y9 AB6
AC18 AE19 AC15 AE17
Y21 Y18 Y15 Y12 Y20 Y17 Y14 Y11
A23 E22 C23
AC27 AD22 AE12 AB9 F18 E18
H_DSTBN0 H_DSTBN1 H_DSTBN2 H_DSTBN3 H_DSTBP0 H_DSTBP1 H_DSTBP2 H_DSTBP3
H_HITM H_HIT H_DEFER
H_DBI0 H_DBI1 H_DBI2 H_DBI3
H_DBSY H_DRDY
H_D0 H_D1 H_D2 H_D3 H_D4 H_D5 H_D6 H_D7 H_D8
H_D9 H_D10 H_D11 H_D12 H_D13 H_D14 H_D15 H_D16 H_D17 H_D18 H_D19 H_D20 H_D21 H_D22 H_D23 H_D24 H_D25 H_D26 H_D27 H_D28 H_D29 H_D30 H_D31 H_D32 H_D33 H_D34 H_D35 H_D36 H_D37 H_D38 H_D39 H_D40 H_D41 H_D42 H_D43 H_D44 H_D45 H_D46 H_D47 H_D48 H_D49 H_D50 H_D51 H_D52 H_D53 H_D54 H_D55 H_D56 H_D57 H_D58 H_D59 H_D60 H_D61 H_D62 H_D63
H_DP0 H_DP1 H_DP2 H_DP3
6,11 6,11 6,11 6,11
6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11
ROOM=LEVEL_TRANSLATION
6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11 6,11
6,11 6,11 6,11 6,11
6,12 6,12 6,12 6,12 6,12 6,12 6,12 6,12
6,11 6,11 6,11
6,11 6,11
ROOM=PROC_0
ROOM=PROC_0
ROOM=PROC_0
ROOM=PROC_0
ROOM=PROC_0
ROOM=PROC_0
ROOM=PROC_0
ROOM=PROC_0
ROOM=PROC_0
ROOM=PROC_0
ROOM=PROC_1
ROOM=PROC_0
ROOM=PROC_0
ROOM=PROC_0
NACONA GUIDELINES RECOMMEND 47pF HERE INSTEAD OF 27pF LIKE BOXSTER
A B
ASYNC LINES DRIVEN BY PROCESSORS
THERMTRIP--TERMINATE AT RECEIVER ONLY FERR--TERMINATE BOTH ENDS OF LINE
VCORE
RB167
56.2-1% RB185
12
12
IERR--TERMINATED AT RECEIVER ONLY
H_FERR
Put RB424 close to PROC_0
6,10
Put RB411 close to LEVEL TRANSLATION
56.2-1%
ASYNC LINES DRIVEN BY CHIPSET
RB168
1 2
H_A20M
301-1%
RB183
1 2
301-1%
RB189
1 2
301-1%
RB173
1 2
301-1%
RB233
1 2
301-1%
RB156
1 2
301-1%
RB170
1 2
H_IGNNE
H_SMI
SUB*_143MM
H_STPCLK
H_SLP
H_INIT
H_INTR
SUB TO 130 OHM
301-1%
RB191
1 2
301-1%
RB219
1 2
H_NMI
H_PWRGOOD
301-1%
BREQ SIGNALS (NO ON-DIE TERMINATION)
RB164
1 2
49.9-1% RB192
1 2
49.9-1% RB153
1 2
49.9-1% RB155
1 2
H_BREQ1
H_BREQ0
H_BREQ23_PU
49.9-1%
PLACEMENT NOT CRITICAL
6,10
6,10
6,10
6,10
6,10
6,10
6,10
6,10
7,47
BREQ1--TERMINATE AT EITHER END (DOESN'T GO TO CHIPSET)
6
BREQ0--TERMINATE AT END FARTHER FROM CHIPSET
6,11
BREQ23--LOCATION ISN'T CRITICAL
6
WIRED-OR SIGNALS AC TERM AT MIDDLE PROCESSOR
ROOM=PROC_1
CB294
47pF 50V-5% CB293
47pF 50V-5% CB292
47pF 50V-5% CB297
47pF 50V-5% CB289
47pF 50V-5%
21
21
21
21
21
RB145
1 2
40.2-1%
RB144
1 2
40.2-1%
RB143
1 2
40.2-1%
RB162
1 2
40.2-1%
RB146
1 2
40.2-1%
H_BINIT
H_BNR
H_HIT
H_HITM
H_MCERR
6,11
6,11
6,11
6,11
6,10
TERMINATION
PROCESSORS 1 & 2
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
DATE
X1004
6/6/2003
AUSTIN,TEXAS
DC
SHEET
REV.
6 OF 51
6-9-2003_13:556EVERGLADES
1
2
3
4
A00-00
Page 7
1
VCORE
21
R322
49.9-1%
R321
100-1%100-1%
SUB TO 84.5 OHM
FOR NOCONA
SUB*_97604
1 2
VCORE
21
R314
49.9-1%
R315
1 2
SUB TO 84.5 OHM
FOR NOCONA
SUB*_97604
1 2
CB371
1 2
CB321
1uF
10V-10%
1uF
CB322
10V-10%
H0_GTLREF01
CB363
2 1
CB35921CB370
0.1uF 16V
H0_GTLREF23
2 1
0.1uF 16V
21
21
CB320
0.1uF 16V
21
CB323
0.1uF 16V
7
0.1uF 16V
7
0.1uF 16V
NC_PROC0HS_3 NC_PROC0HS_4
B D
CHANGED FOR NOCONA SUPPORT:
PIN A4 CONNECTED TO PIN C5 ADDED 50OHM PULL-UP TO PIN A15 CHANGED PIN C1 FROM GND TO 50OHM PULL-DOWN CHANGED PIN G7 FROM GND TO NO CONNECT CHANGED PIN AC30 FROM GND TO PU/PD OPTION CHANGED CAPS ON WIRED-OR AC TERM FROM 27pF TO 47pF
--S HAYES 4/30/02
ITP_TDI_H0
7,10
PLACE THIS RESISTOR NEAR PROC_0
22,35,47
PROC0_HS P1
1
P2
P3
3 4 5
MP1 MP2
SW PUSHBUTTON
SPDT
NP*
+3.3V_AUX
2
R319
1 2
8.2K-5% GPI_PROC0_HS_PRES
NC_PROC0HS_5
+3.3V
8.2K-5%
1 2
PERHAPS 3.3V WOULD BE BETTER HERE?
VCORE
RB193
1 2
150-1%
7
CPU_SMBALERT
7,22,35,47 7,22,35,47
RB215
H1_CPU_PRES H0_CPU_PRES
+3.3V_AUX
RB166
1 2
RB174
1 2
8.2K-5%
8.2K-5%
ROOM=PROC_0 ROOM=PROC_1
CA
+3.3V_AUX
PROC1_HS P1
1
P3
NC_PROC1HS_3 NC_PROC1HS_4 NC_PROC1HS_5
3 4 5
MP1 MP2
SW PUSHBUTTON
SPDT
NP*
R320
1 2
P2
8.2K-5%
2
GPI_PROC1_HS_PRES
22,35,47
VCORE
21
R324
49.9-1%100-1%
R323
1 2
SUB*_97604
SUB TO 84.5 OHM
FOR NOCONA
VCORE
21
R316
49.9-1%
R317
100-1%
1 2
SUB TO 84.5 OHM
FOR NOCONA
SUB*_97604
1 2
CB367
CB315
1uF
1 2
CB366
2 1
10V-10%
1uF
CB316
10V-10%
H1_GTLREF01
CB351
0.1uF 16V
H1_GTLREF23
2 1
CB318
0.1uF 16V
21
0.1uF 16V
21
0.1uF 16V
21
CB355
CB317
7
0.1uF 16V
21
0.1uF 16V
1
7
VCORE
21
1K-1%
RB172
On DIE term enabled
2
SUB COMP TO 43.2 PER SERVERWORKS
X01 -- CHANGING BACK TO 49.9 TO IMPROVE MARGIN -swh10/18
Tsensor = 30h/31h
PI-ROM = A0h/A1h
3
VCORE
RB225
1 2
0-5%
SUB TO 0 OHM
RB224
1 2
0-5%
2 1
4.7uH 30mA
SUB*_7H671
4.7uH 30mA
SUB*_7H671
H0_CPU_TYPE
18
LB7
LB4
21
220
RB158
NP
RB218
1 2
49.9-1%
1K-1%
1K-1%
RB217
RB210
1 2
1 2
+80%-20%
22uF 10V
CB408
1 2
1 2
CB401
22uF 10V
1 2
8.2K-5%
22uF 10V
SUB*_3X016
1 2
1 2
CB407
+80%-20%
SUB*_3X016
CB402
+80%-20%
22uF 10V
+80%-20%
SUB*_3X016
12
SUB 22uF CAPS ON BOTTOM OF BOARD UNDER PROCESSORS TO LOW-PROFILE VERSION
+3.3V_AUX
RB220
7,22,35,47
21
RB154
49.9-1%
CB386
2 1
0.1uF 16V
0.1uF 16V 2 1
SUB*_3X016
4 4
6,7,47
7,21,37,46 7,21,37,46
CB385
4,7,12,22
H0_ODTEN H0_PROCHOT
10
H_PWRGOOD H0_CPU_PRES H0_THERMTRIP
10
H0_COMP0 H0_COMP1
7
H0_SM_EP_A012
H0_SM_TS_A01
GPO_SMB_WP
7
H_BPM02
7,10
H_BPM13
7,10
H_BPM4
7,10
H_BPM5
7,10
ITP_TCK
7,10
ITP_TDI_H0
7,10
ITP_TDO_H0
10
ITP_TMS
7,10
ITP_TRST
7,10
9,47 9,47 9,47 9,47 9,47
7
7
7 7 7 7 7 7 7
H0_THERM_D+
37
H0_THERM_D-
37
GPI_SYN_SEL100
CPU_SMBALERT ENV_SEG0_SCL ENV_SEG0_SDA
H0_VID0 H0_VID1 H0_VID2 H0_VID3 H0_VID4
V_VID_H0_VCCA NC_H0_VCCSENSE H0_VSSA NC_H0_VSSSENSE V_VID_H0_VPLL
H0_GTLREF01
H0_GTLREF23
H0_TESTHI0 H0_TESTHI1 H0_TESTHI2 H0_TESTHI3 H0_TESTHI4 H0_TESTHI5 H0_TESTHI6
NC_H0_RSVD77
B5 B25 AB7
A3 F26
AD16
E16
+3.3V
AE29 AE28 AD28 AC28 AC29
AA29 AB29 AB28 AA28
Y29
AD29
F6
F8
E7
F5
E8
E4
E24 C24 E25 A25 F24
F3
E3
D3
C3
B3
AB4 B27 AA5 D26 AD4
W23
W9 F23
F9
W6
W7
W8
Y6 AA7 AD5 AE5
Y27 Y28 AE4
AA3 AB3
PRESTONIA/NOCONA 604 PROCESSOR
PROC_0
ODTEN PROCHOT PWRGOOD SKTOCC THRMTRIP
COMP0 COMP1
SM_VCC_AE29 SM_VCC_AE28 SM_ALERT SM_CLK SM_DAT
SM_EP_A0 SM_EP_A1 SM_EP_A2 SM_TS1_A0 SM_TS1_A1
SM_WP
BPM0 BPM1 BPM2 BPM3 BPM4 BPM5
TCK TDI TDO TMS TRST
VID0 VID1 VID2 VID3 VID4
VCCA VCCSENSE VSSA VSSSENSE VCCIOPLL
GTLREF0 GTLREF1 GTLREF2 GTLREF3
TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6
THRM_ANODE THRM_CATH SMB_PRT
BSEL0 BSEL1
REV. 1.5-EMTS, ZIF SKT
VCCVID/RSVD_A4
FORCEPR/RSVD_A15
VCCVIDLB/RSVD_C5
HETERO 2 OF 5
RSVD_A1
RSVD_A16 RSVD_A26
RSVD_B1
RSVD_D25
RSVD_W3
RSVD_Y3 RSVD_AC1 RSVD_AD1
RSVD_AE15 RSVD_AE16
A1 A4 A15 A16 A26 B1 C5 D25 W3 Y3 AC1 AD1 AE15 AE16
VCORE
NC_H0_RSVD1 H0_VCCVIDLOOP H0_FORCEPR NC_H0_RSVD4 NC_H0_RSVD5 NC_H0_RSVD8
NC_H0_RSVD17 NC_H0_RSVD89 NC_H0_RSVD66 NC_H0_RSVD80 NC_H0_RSVD83 NC_H0_RSVD87 NC_H0_RSVD88
RB200
12
SUB*_6610C
1K-1% RB197
12
SUB*_6610C
1K-1% RB194
12
SUB*_6610C
1K-1% RB205
12
SUB*_6610C
1K-1% RB206
12
SUB*_6610C
1K-1% RB231
12
SUB*_6610C
1K-1% RB232
12
SUB*_6610C
1K-1%
H0_TESTHI0
H0_TESTHI1
H0_TESTHI2
H0_TESTHI3
H0_TESTHI4
H0_TESTHI5
H0_TESTHI6
7
7
7
7
7
7
7
VCORE
21
RB147
49.9-1%
X01 -- CHANGING BACK TO 49.9 TO IMPROVE MARGIN -swh10/18
SUB COMP TO 43.2 PER SERVERWORKS
Tsensor = 32h/33h
PI-ROM = A2h/A3h
VCORE
2 1
4.7uH 30mA
SUB*_7H671
4.7uH 30mA
SUB*_7H671
H1_CPU_TYPE
18
LB5
LB6
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
RB222
1 2
0-5%
RB223
1 2
0-5%
A B
VCORE
21
NP
RB165
On DIE term disabled
1K-1% 1K-1%
RB175
1 2
RB208
12
RB207
12
CB405
1 2
+80%-20%
22uF 10V
8.2K-5%
21
RB221
+80%-20%
22uF 10V
SUB*_3X016
CB393
1 2
1 2
CB406
22uF 10V
SUB*_3X016
49.9-1%
+80%-20%
SUB*_3X016
+3.3V
100-1% 1K-1%
+80%-20%
22uF 10V
SUB*_3X016
1 2
CB394
12
SUB 22uF CAPS ON BOTTOM OF BOARD UNDER PROCESSORS TO LOW-PROFILE VERSION
+3.3V_AUX
RB230
1 2
7,22,35,47
R318
1 2
49.9-1%
CB381
2 1
0.1uF 16V
0.1uF 16V 2 1
CB382
4,7,12,22
10
6,7,47
10
7,21,37,46 7,21,37,46
H1_SM_PR_A1 H1_SM_PR_A2 H1_SM_TS_A0
7
7,10 7,10
7,10 7,10
7,10
10
10 7,10 7,10
7
7
7 7 7 7 7 7 7
37
37
H1_ODTEN H1_PROCHOT H_PWRGOOD H1_CPU_PRES H1_THERMTRIP
H1_COMP0 H1_COMP1
7
NC_H1_SM_TS_A1
H_BPM02 H_BPM13
H_BPM4 H_BPM5
ITP_TCK ITP_TDI_H1 ITP_TDO_H1 ITP_TMS ITP_TRST
GPI_SYN_SEL100 NC_H1_RSVD77
+3.3V
CPU_SMBALERT ENV_SEG0_SCL ENV_SEG0_SDA
H1_SM_EP_A0
GPO_SMB_WP
H1_VID0
9,47
H1_VID1
9,47
H1_VID2
9,47
H1_VID3
9,47
H1_VID4
9,47
V_VID_H1_VCCA NC_H1_VCCSENSE H1_VSSA NC_H1_VSSSENSE V_VID_H1_VPLL
H1_GTLREF01
H1_GTLREF23
H1_TESTHI0 H1_TESTHI1 H1_TESTHI2 H1_TESTHI3 H1_TESTHI4 H1_TESTHI5 H1_TESTHI6
H1_THERM_D+ H1_THERM_D-
B5 B25 AB7
A3 F26
AD16
E16
AE29 AE28 AD28 AC28 AC29
AA29 AB29 AB28 AA28
Y29
AD29
F6
F8
E7
F5
E8
E4
E24 C24 E25 A25 F24
F3
E3
D3
C3
B3
AB4 B27 AA5 D26 AD4
W23
W9 F23
F9
W6
W7
W8
Y6 AA7 AD5 AE5
Y27 Y28 AE4
AA3 AB3
PRESTONIA/NOCONA 604 PROCESSOR
PROC_1
ODTEN PROCHOT PWRGOOD SKTOCC THRMTRIP
COMP0 COMP1
SM_VCC_AE29 SM_VCC_AE28 SM_ALERT SM_CLK SM_DAT
SM_EP_A0 SM_EP_A1 SM_EP_A2 SM_TS1_A0 SM_TS1_A1
SM_WP
BPM0 BPM1 BPM2 BPM3 BPM4 BPM5
TCK TDI TDO TMS TRST
VID0 VID1 VID2 VID3 VID4
VCCA VCCSENSE VSSA VSSSENSE VCCIOPLL
GTLREF0 GTLREF1 GTLREF2 GTLREF3
TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6
THRM_ANODE THRM_CATH SMB_PRT
BSEL0 BSEL1
REV. 1.5-EMTS, ZIF SKT
VCCVID/RSVD_A4
FORCEPR/RSVD_A15
VCCVIDLB/RSVD_C5
HETERO 2 OF 5
RSVD_AE15 RSVD_AE16
RSVD_A1
RSVD_A16 RSVD_A26
RSVD_B1
RSVD_D25
RSVD_W3
RSVD_Y3 RSVD_AC1 RSVD_AD1
A1 A4 A15 A16 A26 B1 C5 D25 W3 Y3 AC1 AD1 AE15 AE16
VCORE
NC_H1_RSVD1 H1_VCCVIDLOOP H1_FORCEPR NC_H1_RSVD4 NC_H1_RSVD5 NC_H1_RSVD8
NC_H1_RSVD17 NC_H1_RSVD89 NC_H1_RSVD66 NC_H1_RSVD80 NC_H1_RSVD83 NC_H1_RSVD87 NC_H1_RSVD88
RB198
12
H1_TESTHI0
SUB*_6610C
1K-1% RB196
12
H1_TESTHI1
SUB*_6610C
1K-1% RB195
12
H1_TESTHI2
SUB*_6610C
1K-1% RB203
12
H1_TESTHI3
SUB*_6610C
1K-1% RB209
12
H1_TESTHI4
SUB*_6610C
1K-1% RB216
12
H1_TESTHI5
SUB*_6610C
1K-1% RB213
12
H1_TESTHI6
SUB*_6610C
1K-1%
VCORE
21
RB163
49.9-1%
7
7
7
7
7
7
7
PROCESSORS 1 & 2
CPU-- Misc. & RSVD
COMPUTER CORPORATION
TITLE
EVERGLADES MB
AUSTIN,TEXAS
SCHEM,PLNR,PE1750,533MSI
DWG NO.
DATE
DC
X1004
6/6/2003
SHEET
7 OF 51
REV.
6-9-2003_13:557EVERGLADES
A00-00
2
3
Page 8
B D
ROOM=PROC_0
ROOM=PROC_1
L6 L8 L24 L26 L28 L30 M1 M3 M5 M7 M9 M23 M25 M27 M29 M31 N1 N3 N5 N7 N9 N23 N25 N27 N29 N31 P2 P4 P6 P8 P24 P26 P28 P30 R1 R3 R5 R7 R9 R23 R25 R27 R29 R31 T2 T4 T6 T8 T24 T26 T28 T30 U1 U3 U5 U7 U9 U23 U25 U27 U29 U31 V2 V4 V6 V8 V24 V26 V28 V30 W1 W25 W27 W29 W31 Y2 Y10 Y16 Y22 Y30
Y19 Y25 Y31 AA2 AA9 AA15 AA17 AA23 AA30 AB1 AB5 AB11 AB21 AB27 AB31 AC2 AC7 AC13 AC19 AC25 AC30 AD3 AD9 AD15 AD17 AD23 AD31 AE2 AE11 AE21 AE27
VCOREVCORE
PROC_1
VSS_A5 VSS_A11 VSS_A21 VSS_A27 VSS_A29 VSS_A31 VSS_B2 VSS_B9 VSS_B15 VSS_B17 VSS_B23 VSS_B28 VSS_B30 VSS/TESTLOW VSS_C7 VSS_C13 VSS_C19 VSS_C25 VSS_C29 VSS_C31 VSS_D2 VSS_D5 VSS_D11 VSS_D21 VSS_D27 VSS_D28 VSS_D30 VSS_E1 VSS_E9 VSS_E15 VSS_E17 VSS_E23 VSS_E29 VSS_E31 VSS_F2 VSS_F7 VSS_F13 VSS_F19 VSS_F25 VSS_F28 VSS_F30 VSS_G1 VSS_G3 VSS_G5 VSS/BOOTSEL VSS_G9 VSS_G25 VSS_G27 VSS_G29 VSS_G31 VSS_H2 VSS_H4 VSS_H6 VSS_H8 VSS_H24 VSS_H26 VSS_H28 VSS_H30 VSS_J1 VSS_J3 VSS_J5 VSS_J7 VSS_J9 VSS_J23 VSS_J25 VSS_J27 VSS_J29 VSS_J31 VSS_K2 VSS_K4 VSS_K6 VSS_K8 VSS_K24 VSS_K26 VSS_K28 VSS_K30 VSS_L1 VSS_L3 VSS_L5
REV. 1.5-EMTS, ZIF SKT
HETERO 4 OF 5
VSS_L7
VSS_L9 VSS_L23 VSS_L25 VSS_L27 VSS_L29 VSS_L31
VSS_M2
VSS_M4
VSS_M6
VSS_M8 VSS_M24 VSS_M26 VSS_M28 VSS_M30
VSS_N2
VSS_N4
VSS_N6
VSS_N8 VSS_N24 VSS_N26 VSS_N28 VSS_N30
VSS_P1
VSS_P3
VSS_P5
VSS_P7
VSS_P9 VSS_P23 VSS_P25 VSS_P27 VSS_P29 VSS_P31
VSS_R2
VSS_R4
VSS_R6
VSS_R8 VSS_R24 VSS_R26 VSS_R28 VSS_R30
VSS_T1
VSS_T3
VSS_T5
VSS_T7
VSS_T9 VSS_T23 VSS_T25 VSS_T27 VSS_T29 VSS_T31
VSS_U2
VSS_U4
VSS_U6
VSS_U8 VSS_U24 VSS_U26 VSS_U28 VSS_U30
VSS_V1
VSS_V3
VSS_V5
VSS_V7
VSS_V9 VSS_V23 VSS_V25 VSS_V27 VSS_V29 VSS_V31
VSS_W2
VSS_W4 VSS_W24 VSS_W26 VSS_W28 VSS_W30
VSS_Y1
VSS_Y5
VSS_Y7 VSS_Y13
L7 L9 L23 L25 L27 L29 L31 M2 M4 M6 M8 M24 M26 M28 M30 N2 N4 N6 N8 N24 N26 N28 N30 P1 P3 P5 P7 P9 P23 P25 P27 P29 P31 R2 R4 R6 R8 R24 R26 R28 R30 T1 T3 T5 T7 T9 T23 T25 T27 T29 T31 U2 U4 U6 U8 U24 U26 U28 U30 V1 V3 V5 V7 V9 V23 V25 V27 V29 V31 W2 W4 W24 W26 W28 W30 Y1 Y5 Y7 Y13
VCORE
+80%-20%
22uF 10V
+80%-20%
22uF 10V
CB291
1 2
SUB*_3X016
VCORE
+80%-20%
22uF 10V
CB365
1 2
SUB*_3X016
SUB 22uF CAPS ON BOTTOM OF BOARD UNDER PROCESSORS TO LOW-PROFILE VERSION 3X016
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
1 2
C373
+80%-20%
22uF 10V
CB348
1 2
SUB*_3X016
+80%-20%
22uF 10V
SUB*_3X016
+80%-20%
22uF 10V
SUB*_3X016
NC_H1_BS
VCORE
RB226
H1_SLEWCTL
RB227
A5 A11 A21 A27 A29 A31
B2
B9 B15 B17 B23 B28 B30
C1
H1_C1
21
RB176
21
1 2
C7 C13 C19 C25 C29
49.9-1% C31
D2
D5 D11 D21 D27 D28 D30
E1
E9 E15 E17 E23 E29 E31
F2
F7 F13 F19 F25 F28 F30
G1
G3
G5
G7
G9 G25 G27 G29 G31
H2
H4
H6
H8 H24 H26 H28 H30
J1
J3
J5
J7
J9 J23 J25 J27 J29 J31
K2
K4
K6
K8 K24 K26 K28 K30
L1
L3
L5
PRESTONIA/NOCONA 604 PROCESSOR
49.9-1%0-5% NP*
VCOREVCORE
PROC_0
A2
VCC_A2
A8
VCC_A8
A14
VCC_A14
A18
VCC_A18
A24
VCC_A24
A28
VCC_A28
A30
VCC_A30
1
2
3
B4
VCC_B4
B6
VCC_B6
B12
VCC_B12
B20
VCC_B20
B26
VCC_B26
B29
VCC_B29
B31
VCC_B31
C2
VCC_C2
C4
VCC_C4
C10
VCC_C10
C16
VCC_C16
C22
VCC_C22
C28
VCC_C28
C30
VCC_C30
D1
VCC_D1
D8
VCC_D8
D14
VCC_D14
D18
VCC_D18
D24
VCC_D24
D29
VCC_D29
D31
VCC_D31
E2
VCC_E2
E6
VCC_E6
E12
VCC_E12
E20
VCC_E20
E26
VCC_E26
E28
VCC_E28
E30
VCC_E30
F1
VCC_F1
F4
VCC_F4
F10
VCC_F10
F16
VCC_F16
F22
VCC_F22
F29
VCC_F29
F31
VCC_F31
G2
VCC_G2
G4
VCC_G4
G6
VCC_G6
G8
VCC_G8
G24
VCC_G24
G26
VCC_G26
G28
VCC_G28
G30
VCC_G30
H1
VCC_H1
H3
VCC_H3
H5
VCC_H5
H7
VCC_H7
H9
VCC_H9
H23
VCC_H23
H25
VCC_H25
H27
VCC_H27
H29
VCC_H29
H31
VCC_H31
J2
VCC_J2
J4
VCC_J4
J6
VCC_J6
J8
VCC_J8
J24
VCC_J24
J26
VCC_J26
J28
VCC_J28
J30
VCC_J30
K1
VCC_K1
K3
VCC_K3
K5
VCC_K5
K7
VCC_K7
K9
VCC_K9
K23
VCC_K23
K25
VCC_K25
K27
VCC_K27
K29
VCC_K29
K31
VCC_K31
L2
VCC_L2
L4
VCC_L4
PRESTONIA/NOCONA 604 PROCESSOR
REV. 1.5-EMTS, ZIF SKT
VCORE
HETERO 3 OF 5
PROC_0
AA1
VCC_AA1
AA4
VCC_AA4
AA6
VCC_AA6
AA12
VCC_AA12
AA20
VCC_AA20
AA26
VCC_AA26
AA31
VCC_AA31
AB2
VCC_AB2
AB8
VCC_AB8
AB14
VCC_AB14
AB18
VCC_AB18
AB24
VCC_AB24
AB30
VCC_AB30
SCHEM,PLNR,PE1750,533MSI
AC3
VCC_AC3
AC4
VCC_AC4
AC10
VCC_AC10
AC16
VCC_AC16
AC22
VCC_AC22
AC31
VCC_AC31
AD2
VCC_AD2
AD6
4 4
AD12 AD20 AD26 AD30
AE3
AE8 AE14 AE18 AE24
PRESTONIA/NOCONA 604 PROCESSOR
SLEWCTRL/VSS VCC_AD6 VCC_AD12 VCC_AD20 VCC_AD26 VCC_AD30 VCC_AE3 VCC_AE8 VCC_AE14 VCC_AE18 VCC_AE24
REV. 1.5-EMTS, ZIF SKT
HETERO 5 OF 5
ROOM=PROC_0
VCC_L6
VCC_L8 VCC_L24 VCC_L26 VCC_L28 VCC_L30
VCC_M1
VCC_M3
VCC_M5
VCC_M7
VCC_M9 VCC_M23 VCC_M25 VCC_M27 VCC_M29 VCC_M31
VCC_N1
VCC_N3
VCC_N5
VCC_N7
VCC_N9 VCC_N23 VCC_N25 VCC_N27 VCC_N29 VCC_N31
VCC_P2
VCC_P4
VCC_P6
VCC_P8 VCC_P24 VCC_P26 VCC_P28 VCC_P30
VCC_R1
VCC_R3
VCC_R5
VCC_R7
VCC_R9 VCC_R23 VCC_R25 VCC_R27 VCC_R29 VCC_R31
VCC_T2
VCC_T4
VCC_T6
VCC_T8 VCC_T24 VCC_T26 VCC_T28 VCC_T30
VCC_U1
VCC_U3
VCC_U5
VCC_U7
VCC_U9 VCC_U23 VCC_U25 VCC_U27 VCC_U29 VCC_U31
VCC_V2
VCC_V4
VCC_V6
VCC_V8 VCC_V24 VCC_V26 VCC_V28 VCC_V30
VCC_W1 VCC_W25 VCC_W27 VCC_W29 VCC_W31
VCC_Y2 VCC_Y10 VCC_Y16 VCC_Y22 VCC_Y30
VSS_Y19 VSS_Y25 VSS_Y31 VSS_AA2 VSS_AA9
VSS_AA15 VSS_AA17 VSS_AA23 VSS_AA30
VSS_AB1 VSS_AB5
VSS_AB11 VSS_AB21 VSS_AB27 VSS_AB31
VSS_AC2 VSS_AC7
VSS_AC13 VSS_AC19 VSS_AC25
VSS_AD3 VSS_AD9
VSS_AD15 VSS_AD17 VSS_AD23 VSS_AD31
VSS_AE2
VSS_AE11 VSS_AE21 VSS_AE27
L6 L8 L24 L26 L28 L30 M1 M3 M5 M7 M9 M23 M25 M27 M29 M31 N1 N3 N5 N7 N9 N23 N25 N27 N29 N31 P2 P4 P6 P8 P24 P26 P28 P30 R1 R3 R5 R7 R9 R23 R25 R27 R29 R31 T2 T4 T6 T8 T24 T26 T28 T30 U1 U3 U5 U7 U9 U23 U25 U27 U29 U31 V2 V4 V6 V8 V24 V26 V28 V30 W1 W25 W27 W29 W31 Y2 Y10 Y16 Y22 Y30
Y19 Y25 Y31 AA2 AA9 AA15 AA17 AA23 AA30 AB1 AB5 AB11 AB21 AB27 AB31 AC2 AC7 AC13 AC19 AC25 AC30 AD3 AD9 AD15 AD17 AD23 AD31 AE2 AE11 AE21 AE27
A5
VSS_A5
A11
VSS_A11
A21
VSS_A21
A27
VSS_A27
A29
VSS_A29
A31
VSS_A31
B2
VSS_B2
B9
VSS_B9
B15
VSS_B15
B17
VSS_B17
B23
VSS_B23
B28
VSS_B28
B30
VSS_B30
C1
H0_C1
21
RB184
49.9-1%
NC_H0_BS
H0_SLEWCTL
VSS/TESTLOW
C7
VSS_C7
C13
VSS_C13
C19
VSS_C19
C25
VSS_C25
C29
VSS_C29
C31
VSS_C31
D2
VSS_D2
D5
VSS_D5
D11
VSS_D11
D21
VSS_D21
D27
VSS_D27
D28
VSS_D28
D30
VSS_D30
E1
VSS_E1
E9
VSS_E9
E15
VSS_E15
E17
VSS_E17
E23
VSS_E23
E29
VSS_E29
E31
VSS_E31
F2
VSS_F2
F7
VSS_F7
F13
VSS_F13
F19
VSS_F19
F25
VSS_F25
F28
VSS_F28
F30
VSS_F30
G1
VSS_G1
G3
VSS_G3
G5
VSS_G5
G7
VSS/BOOTSEL
G9
VSS_G9
G25
VSS_G25
G27
VSS_G27
G29
VSS_G29
G31
VSS_G31
H2
VSS_H2
H4
VSS_H4
H6
VSS_H6
H8
VSS_H8
H24
VSS_H24
H26
VSS_H26
H28
VSS_H28
H30
VSS_H30
J1
VSS_J1
J3
VSS_J3
J5
VSS_J5
J7
VSS_J7
J9
VSS_J9
J23
VSS_J23
J25
VSS_J25
J27
VSS_J27
J29
VSS_J29
J31
VSS_J31
K2
VSS_K2
K4
VSS_K4
K6
VSS_K6
K8
VSS_K8
K24
VSS_K24
K26
VSS_K26
K28
VSS_K28
K30
VSS_K30
L1
VSS_L1
L3
VSS_L3
L5
VSS_L5
PRESTONIA/NOCONA 604 PROCESSOR
REV. 1.5-EMTS, ZIF SKT
HETERO 4 OF 5
VCORE
21
RB229
49.9-1%0-5% NP*
RB228
1 2
PROC_0
VSS_L7
VSS_L9 VSS_L23 VSS_L25 VSS_L27 VSS_L29 VSS_L31
VSS_M2
VSS_M4
VSS_M6
VSS_M8 VSS_M24 VSS_M26 VSS_M28 VSS_M30
VSS_N2
VSS_N4
VSS_N6
VSS_N8 VSS_N24 VSS_N26 VSS_N28 VSS_N30
VSS_P1
VSS_P3
VSS_P5
VSS_P7
VSS_P9 VSS_P23 VSS_P25 VSS_P27 VSS_P29 VSS_P31
VSS_R2
VSS_R4
VSS_R6
VSS_R8 VSS_R24 VSS_R26 VSS_R28 VSS_R30
VSS_T1
VSS_T3
VSS_T5
VSS_T7
VSS_T9 VSS_T23 VSS_T25 VSS_T27 VSS_T29 VSS_T31
VSS_U2
VSS_U4
VSS_U6
VSS_U8 VSS_U24 VSS_U26 VSS_U28 VSS_U30
VSS_V1
VSS_V3
VSS_V5
VSS_V7
VSS_V9 VSS_V23 VSS_V25 VSS_V27 VSS_V29 VSS_V31
VSS_W2
VSS_W4 VSS_W24 VSS_W26 VSS_W28 VSS_W30
VSS_Y1
VSS_Y5
VSS_Y7 VSS_Y13
L7 L9 L23 L25 L27 L29 L31 M2 M4 M6 M8 M24 M26 M28 M30 N2 N4 N6 N8 N24 N26 N28 N30 P1 P3 P5 P7 P9 P23 P25 P27 P29 P31 R2 R4 R6 R8 R24 R26 R28 R30 T1 T3 T5 T7 T9 T23 T25 T27 T29 T31 U2 U4 U6 U8 U24 U26 U28 U30 V1 V3 V5 V7 V9 V23 V25 V27 V29 V31 W2 W4 W24 W26 W28 W30 Y1 Y5 Y7 Y13
A14 A18 A24 A28 A30
B12 B20 B26 B29 B31
C10 C16 C22 C28 C30
D14 D18 D24 D29 D31
E12 E20 E26 E28 E30
F10 F16 F22 F29 F31
G24 G26 G28 G30
H23 H25 H27 H29 H31
J24 J26 J28 J30
K23 K25 K27 K29 K31
PRESTONIA/NOCONA 604 PROCESSOR
VCORE
AA1 AA4
AA6 AA12 AA20 AA26 AA31
AB2
AB8 AB14 AB18 AB24 AB30
AC3
AC4 AC10 AC16 AC22 AC31
AD2
AD6 AD12 AD20 AD26 AD30
AE3
AE8 AE14 AE18 AE24
PRESTONIA/NOCONA 604 PROCESSOR
PROC_1
A2
VCC_A2
A8
VCC_A8 VCC_A14 VCC_A18 VCC_A24 VCC_A28 VCC_A30
B4
VCC_B4
B6
VCC_B6 VCC_B12 VCC_B20 VCC_B26 VCC_B29 VCC_B31
C2
VCC_C2
C4
VCC_C4 VCC_C10 VCC_C16 VCC_C22 VCC_C28 VCC_C30
D1
VCC_D1
D8
VCC_D8 VCC_D14 VCC_D18 VCC_D24 VCC_D29 VCC_D31
E2
VCC_E2
E6
VCC_E6 VCC_E12 VCC_E20 VCC_E26 VCC_E28 VCC_E30
F1
VCC_F1
F4
VCC_F4 VCC_F10 VCC_F16 VCC_F22 VCC_F29 VCC_F31
G2
VCC_G2
G4
VCC_G4
G6
VCC_G6
G8
VCC_G8 VCC_G24 VCC_G26 VCC_G28 VCC_G30
H1
VCC_H1
H3
VCC_H3
H5
VCC_H5
H7
VCC_H7
H9
VCC_H9 VCC_H23 VCC_H25 VCC_H27 VCC_H29 VCC_H31
J2
VCC_J2
J4
VCC_J4
J6
VCC_J6
J8
VCC_J8 VCC_J24 VCC_J26 VCC_J28 VCC_J30
K1
VCC_K1
K3
VCC_K3
K5
VCC_K5
K7
VCC_K7
K9
VCC_K9 VCC_K23 VCC_K25 VCC_K27 VCC_K29 VCC_K31
L2
VCC_L2
L4
VCC_L4
REV. 1.5-EMTS, ZIF SKT
VCC_L6
VCC_L8 VCC_L24 VCC_L26 VCC_L28 VCC_L30
VCC_M1
VCC_M3
VCC_M5
VCC_M7
VCC_M9 VCC_M23 VCC_M25 VCC_M27 VCC_M29 VCC_M31
VCC_N1
VCC_N3
VCC_N5
VCC_N7
VCC_N9 VCC_N23 VCC_N25 VCC_N27 VCC_N29 VCC_N31
VCC_P2
VCC_P4
VCC_P6
VCC_P8 VCC_P24 VCC_P26 VCC_P28 VCC_P30
VCC_R1
VCC_R3
VCC_R5
VCC_R7
VCC_R9 VCC_R23 VCC_R25 VCC_R27 VCC_R29 VCC_R31
VCC_T2
VCC_T4
VCC_T6
VCC_T8 VCC_T24 VCC_T26 VCC_T28 VCC_T30
VCC_U1
VCC_U3
VCC_U5
VCC_U7
VCC_U9 VCC_U23 VCC_U25 VCC_U27 VCC_U29 VCC_U31
VCC_V2
VCC_V4
VCC_V6
VCC_V8 VCC_V24 VCC_V26 VCC_V28 VCC_V30
VCC_W1 VCC_W25 VCC_W27 VCC_W29 VCC_W31
VCC_Y2 VCC_Y10 VCC_Y16 VCC_Y22 VCC_Y30
HETERO 3 OF 5
PROC_1
VSS_Y19
VCC_AA1 VCC_AA4 VCC_AA6 VCC_AA12 VCC_AA20 VCC_AA26 VCC_AA31 VCC_AB2 VCC_AB8 VCC_AB14 VCC_AB18 VCC_AB24 VCC_AB30 VCC_AC3 VCC_AC4 VCC_AC10 VCC_AC16 VCC_AC22 VCC_AC31 VCC_AD2 VCC_AD6 VCC_AD12 VCC_AD20 VCC_AD26 VCC_AD30 VCC_AE3 VCC_AE8 VCC_AE14 VCC_AE18 VCC_AE24
REV. 1.5-EMTS, ZIF SKT
ROOM=PROC_1
VSS_Y25 VSS_Y31 VSS_AA2 VSS_AA9
VSS_AA15 VSS_AA17 VSS_AA23 VSS_AA30
VSS_AB1 VSS_AB5
VSS_AB11 VSS_AB21 VSS_AB27 VSS_AB31
VSS_AC2 VSS_AC7
VSS_AC13 VSS_AC19 VSS_AC25
SLEWCTRL/VSS
VSS_AD3 VSS_AD9
VSS_AD15 VSS_AD17 VSS_AD23 VSS_AD31
VSS_AE2
VSS_AE11 VSS_AE21 VSS_AE27
HETERO 5 OF 5
A B
CA
VCORE
2.5V-20%-2STACK 1 2
680uF
+
VCORE
2.5V-20%-2STACK 1 2
680uF
+
+80%-20%
22uF 10V
CB311
1 2
1 2
+80%-20%
22uF 10V
CB339
1 2
1 2
2.5V-20%-2STACK
C357
2.5V-20%-2STACK
C380
+80%-20%
22uF 10V
C374
SUB*_3X016
+80%-20%
22uF 10V
C375
680uF
+
680uF
+
CB306
1 2
1 2
C376
2.5V-20%-2STACK
C390
21
2.5V-20%-2STACK
C393
21
1 2
C307
+80%-20%
22uF 10V
CB336
1 2
SUB*_3X016
+80%-20%
22uF 10V
CB380
1 2
SUB*_3X016
VCORE
1 2
CB304
0.1uF 16V
680uF
+
21
680uF
+
21
VCORE
10V-10%
VCORE
10V-10%
VCORE
1 2
CB332
0.1uF 16V
0.1uF 16V
+80%-20%
22uF 10V
CB379
1 2
SUB*_3X016
+80%-20%
22uF 10V
1 2
SUB*_3X016
1 2
CB305
0.1uF 16V
2.5V-20%-2STACK
C377
2.5V-20%-2STACK
C359
10V-10%
CB400
1 2
1uF
10V-10%
CB387
1 2
1uF
1 2
CB331
0.1uF 16V
+80%-20%
22uF 10V
SUB*_3X016
+80%-20%
22uF 10V
CB340
SUB*_3X016
1 2
CB310
CB377
0.1uF 16V
VCORE
0.1uF 16V
2.5V-20%-2STACK
680uF
+
680uF
+
1uF
1uF
1 2
CB314
680uF
+
C356
21
2.5V-20%-2STACK
680uF
+
C364
21
10V-10%
10V-10%
CB398
CB334
1 2
1 2
C370
10V-10%
1uF
1uF
1 2
1 2
C386
1 2
1uF
10V-10%
1 2
1uF
ROOM=PROC_0
0.1uF 16V
ROOM=PROC_1
+80%-20%
22uF 10V
CB309
1 2
+80%-20%
22uF 10V
CB383
1 2
1 2
CB347
0.1uF 16V
0.1uF 16V
22uF 10V
SUB*_3X016
+80%-20%
22uF 10V
SUB*_3X016
1 2
0.1uF 16V
0.1uF 16V CB308
12
+80%-20%
CB345
1 2
SUB*_3X016
CB307
1 2
SUB*_3X016
1 2
CB378
0.1uF 16V
2 1
CB29512CB298
21
21
10V-10%
CB360
1uF
10V-10%
C387
1uF
CB399
1 2
CB344
1 2
SUB*_3X016
CB372
1 2
0.1uF 16V
C354
C355
+80%-20%
SUB*_3X016
+80%-20%
0.1uF 16V
2 1
2.5V-20%-2STACK
680uF
+
21
2.5V-20%-2STACK
680uF
+
21
10V-10%
10V-10%
CB396
1 2
1 2
C367
1uF
1uF
10V-10%
10V-10%
CB353
CB390
1 2
1 2
1uF
1uF
VCORE
CB346
VCORE
CB343
+80%-20%
22uF 10V
22uF 10V
CB397
1 2
SUB*_3X016
22uF 10V
+80%-20%
22uF 10V
CB373
1 2
1 2
SUB*_3X016
1 2
C369
CB312
0.1uF 16V
0.1uF 16V CB325
CB301
12
2.5V-20%-2STACK
680uF
+
C363
21
2.5V-20%-2STACK
680uF
+
C365
21
10V-10%
CB303
1 2
1 2
1uF
10V-10%
CB392
1 2
1 2
1uF
1 2
1 2
CB333
0.1uF 16V
0.1uF 16V
603 pkg
1 2
1 2
CB338
0.1uF 16V
0.1uF 16V
+80%-20%
22uF 10V
CB342
1 2
1 2
SUB*_3X016
+80%-20%
22uF 10V
CB389
CB356
1 2
SUB*_3X016
1 2
1 2
CB337
0.1uF 16V
2.5V-20%-2STACK
680uF
C391
2.5V-20%-2STACK
680uF
C392
10V-10%
1 2
C382
C383
1uF
10V-10%
CB375
CB327
1 2
1uF
1 2
CB335
0.1uF 16V
1 2
CB329
0.1uF 16V
+80%-20%
22uF 10V
CB324
SUB*_3X016
+80%-20%
22uF 10V
1 2
SUB*_3X016
1 2
CB299
0.1uF 16V
0.1uF 16V
+
+
10V-10%
1uF
10V-10%
1uF
1 2
CB341
1 2
C385
CB395
1 2
SUB*_3X016
+80%-20%
CB391
SUB*_3X016
1 2
CB349
ROOMS COMPLETE
2.5V-20%-2STACK
680uF
+
C362
C378
ROOM=PROC_0
21
21
1 2
CB361
21
2.5V-20%-2STACK
680uF
+
C379
21
C358
ROOM=PROC_1
ROOM=PROC_0
CB352
1 2
ROOM=PROC_1
CB362
CB350
1 2
CB302
1 2
CB313
1 2
1 2
CB369
1 2
1 2
C368
0.1uF 16V
0.1uF 16V
1 2
CB328
0.1uF 16V
0.1uF 16V
+80%-20%
22uF 10V
CB357
1 2
SUB*_3X016
+80%-20%
22uF 10V
CB300
1 2
SUB*_3X016
0.1uF 16V
1 2
C366
0.1uF 16V
0.1uF 16V
1 2
CB326
0.1uF 16V
0.1uF 16V
+80%-20%
22uF 10V
+80%-20%
22uF 10V
CB404
1 2
SUB*_3X016
+80%-20%
22uF 10V
22uF 10V
CB388
1 2
SUB*_3X016
1 2
C371
0.1uF 16V
0.1uF 16V
TITLE
EVERGLADES MB
DWG NO.
X1004
DATE
6/6/2003
DC
1 2
CB358
0.1uF 16V
0.1uF 16V
1 2
CB330
0.1uF 16V
0.1uF 16V
REV.
8 OF 51
6-9-2003_13:558EVERGLADES
C381
C388
1 2
C384
1 2
CB354
COMPUTER CORPORATION AUSTIN,TEXAS
SHEET
1 2
0.1uF 16V
1 2
0.1uF 16V
A00-00
1
2
3
Page 9
B D
DELL USES VRM9.0 KEYING FOR VRMS EVEN IN VRM9.1 APPLICATIONS
CA
ROOMS COMPLETE
+12V
VRM1_+12V
9
1
9,47
9
+
C336
2 1
270uF
16V-20%
VRM1_+12V
9
NC_VRM1_5 VRM_VID3 NC_VRM1_9 VRM1_GND_SENSE
VCORE
2
NC_VRM1_51 VCORE_EN_1
47
VRM_VID0
9,47
VRM_VID4
9,47
12
+
C353
1 2
VIN+_1 VIN+_2
3 4
VIN+_3 VIN+_4
5
RSVD_1
7 8
VID3 VID1
9
RSVD_2
11
VO-SEN-
13 14
VO-_1 VO+_1
15 16
VO-_2 VO+_2
17 18
VO-_3 VO+_3
19 20
VO-_4 VO+_4
21 22
VO-_5 VO+_5
23 24
VO-_6 VO+_6
25 26
VO-_7 VO+_7
27 28
VO-_8 VO+_8
29
VO-_9
31
VO-_10
33
VO+_10
35
VO+_11 VO-_13
37
VO+_12
39
VO+_13
41
VO+_14
43
VO+_15
45
VO+_16
47
VO+_17
49
VO+_18
51
RSVD_4
53
OUTEN
55
VID0
57
VID4
59 60
VIN-_1 VIN-_2
61 62
VIN-_3 VIN-_4
MH1 MH2
MH1 MH2
VRM, 12V, 9.1, 1U
SUB*_2U299
VCORE
R299
VRM1_VCORE_SENSE
9
VRM1_GND_SENSE
3
9
1 2
0-5% R309
0-5%
21
270uF
16V-20%
VRM1
VRM-PRES
1 2
1uH 4.4A
L48
1 2
1uH 4.4A
KEY 6
10
PWRGD
12
RSVD_3
30
VO+_9
32
VO-_11
34
VO-_12
36 38
VO-_14
40
VO-_15
42
VO-_16
44
VO-_17
46
VO-_18
48
VO-_19
50
VO+_20
52
VO-SEN+
54
ISHARE
56
VID2
58
MS2MS1
MS2MS1
0X621 IS ARTESYN 2U299 IS CELESTICA
9,35,47
+3.3V
VCORE
R312
1K-5%
SUB*_69958
1 2
R235
1 2
22-5%
VRM_VID1 VCORE_PWRGOOD_1_ATVRM NC_VRM1_12
VCORE
VRM1_VCORE_SENSE VRM1_ISHARE VRM_VID2 NC_VRM1_58 VRM_VID2
VCORE_PWRGOOD_1
X01: CHANGING TO WEAKER PULL-UP (AT RAMESH'S REQUEST), AND USING HYSTERESIS BUFFER TO KEEP EDGE AT CPLD FAST
--STUART 10/7/2002
+3.3V_AUX+3.3V_AUX
SUB TO 8.2K
21
C361
VRM1_ISHARE
9
Q20
D
2N7002
1
G
S
U30
R227
3144
0-5%
21
21
C272
9,47
PLACE NEAR VRM PIN 52!
1000pF
50V-10%
NP*
9 9 9,47
R313
1 2
VRM2_ISHARE
0-5%
VRM1_OK
13
GREEN
1 2
3
2
R311
220
NP*
+3.3V
1000pF
50V-10%
1142
VHC14VHC14
U30
9
VCORE_PWRGOOD_1
9,35,47
9,35,47
9
NC_VRM2_5 VRM_VID3
9,47
NC_VRM2_9 VRM2_GND_SENSE
9
NC_VRM2_51 VCORE_EN_2
47
VRM_VID0
9,47
VRM_VID4
9,47
VCORE_PWRGOOD_2
VRM2_+12V
VCORE
Q18
2N7002
L49
VRM2_+12V
9
12
C317
+
270uF
C316
16V-20%
+
2 1
270uF
16V-20%
1uH 4.4A
1uH 4.4A
+3.3V
C360
21
9148
1000pF
50V-10%
NP*
VRM2
1 2
VIN+_1 VIN+_2
3 4
VIN+_3 VIN+_4
5
RSVD_1
7 8
VID3 VID1
9
RSVD_2
11
VO-SEN-
13 14
VO-_1 VO+_1
15 16
VO-_2 VO+_2
17 18
VO-_3 VO+_3
19 20
VO-_4 VO+_4
21 22
VO-_5 VO+_5
23 24
VO-_6 VO+_6
25 26
VO-_7 VO+_7
27 28
VO-_8 VO+_8
29
VO-_9
31
VO-_10
33
VO+_10
35
VO+_11 VO-_13
37
VO+_12
39
VO+_13
41
VO+_14
43
VO+_15
45
VO+_16
47
VO+_17
49
VO+_18
51
RSVD_4
53
OUTEN
55
VID0
57
VID4
59 60
VIN-_1 VIN-_2
61 62
VIN-_3 VIN-_4
MH1 MH2
MH1 MH2
KEY 6
PWRGD
RSVD_3
VO+_9 VO-_11 VO-_12
VO-_14 VO-_15 VO-_16 VO-_17 VO-_18 VO-_19 VO+_20
VO-SEN+
ISHARE
VID2
VRM-PRES
MS2MS1
10 12
30 32 34 36 38 40 42 44 46 48 50 52 54 56 58
MS2MS1
VCORE
R301
1K-5%
SUB TO 8.2K
SUB*_69958
1 2
R236
1 2
22-5%
VRM_VID1 VCORE_PWRGOOD_2_ATVRM NC_VRM2_12
VCORE
VRM2_VCORE_SENSE VRM2_ISHARE
NC_VRM2_58
VRM, 12V, 9.1, 1U
SUB*_2U299
0X621 IS ARTESYN
+3.3V
R281
1 2
220
D
3
1
G
S
2
VRM2_OK
13
GREEN
2U299 IS CELESTICA
VRM2_VCORE_SENSE
9
VRM2_GND_SENSE
9
ROOM=VRM_P0
VRM1
HS_HOLD_1
GND1
+3.3V
8.2K-5%
8 1
RNB59
8.2K-5%
8.2K-5%
8.2K-5%
6 3
RNB59
RNB5945RNB59
27
8.2K-5% RB181
12
8.2K-5% R57
12
8.2K-5%
5 4
RN336RN3
8.2K-5%
8.2K-5%
7 2
RN318RN3
8.2K-5%
4
+3.3V+3.3V
RN11
7 2
8.2K-5%
RN1136RN11
5 4
8.2K-5%
18
RN11
8.2K-5%
8.2K-5%
12
8.2K-5%
RB15
VRM_VID0 VRM_VID1 VRM_VID2 VRM_VID3 VRM_VID4
H0_VID3 H0_VID2 H0_VID1 H0_VID0 H0_VID4
H1_VID0 H1_VID1 H1_VID2 H1_VID3 H1_VID4
9,47 9,47 9,47 9,47 9,47
7,47 7,47 7,47 7,47 7,47
7,47 7,47 7,47 7,47 7,47
GND2 GND3 GND4 GND5 GND6 GND7 GND8
GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16
HEATSINK CLIP DELL PN 52JXN
16 GND VIAS
HS_HOLD_3
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16
HEATSINK CLIP DELL PN 52JXN
16 GND VIAS
HS_HOLD_2
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8
GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16
HEATSINK CLIP DELL PN 52JXN
16 GND VIAS
HS_HOLD_4
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16
HEATSINK CLIP DELL PN 52JXN
16 GND VIAS
VRM2
ADD1=ADD*_0W836_BRCKT
ADD2=ADD*_4W001_BUMPER
575EM is VRM 9.0 keyed with no latches 7G715 is VRM 9.1 keyed with latches 5F852 is VRM 9.1 keyed with latches 00JDV is VRM 9.0 keyed with latches
PLASTIC HEATSINK HOLDERS
ROOM=PWRGOOD_CPLD
VID SIGNAL PULL-UPS
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
+12V
L43
21
L44
21
+3.3V_AUX+3.3V_AUX
1000pF
50V-10%
5146
U30
U30
R231
VHC14 VHC14
9,47
0-5%
21
21
C279
NP*
PLACE NEAR VRM PIN 52!
9 9 9,47
VCORE
R310
1 2
0-5% R307
21
0-5%
ROOM=VRM_P1
Core VRMs
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
DC
VCORE_PWRGOOD_2
COMPUTER CORPORATION
AUSTIN,TEXAS
9,35,47
REV.
SHEET
9 OF 51
6-9-2003_13:559EVERGLADES
1
2
3
4
A00-00
Page 10
B D
CA
ROOMS COMPLETE
VCORE
21
C337
1
7,10 7,10
7,10 7,10 6,12
CHANGED TRST# PULLDOWN TO 560 OHMS
2
FROM 150 OHMS, PER ITP700 DESIGN GUIDE VER 1.20
SUBBED BPM TERM TO 50 OHMS
H0_THERMTRIP
7
1uF
1 2
R266
10V-10%
49.9-1%
C338
1 2
0.1uF 16V
H_BPM02 H_BPM13
H_BPM4 H_BPM5 H_RST
CK_100M_ITP_P
4
CK_100M_ITP_N
4
--S HAYES 4/30/2002
--S HAYES 6/26/02
VCORE
56.2-1% RB190
12
RB188
2.7K-5%
3
VCORE
56.2-1% RB180
12
RB179
VCORE
21
R305
1 2
2.7K-5%
150-1%
R306
1 2
2.7K-5%
H1_THERMTRIP
7
H_MCERR
6
4
ROOM=LEVEL_TRANSLATION
ITP PORT
+3.3V
ROOM=ITP
R268
R269
R265
R267
1 2
3904
21
3904
QB8
1 2
40.2-1%
SUB*_6610C
+3.3V
21
RB187
1
+3.3V
RB177
1 2
QB5
1
Q19
3904
1
40.2-1%
SUB*_6610C
1K-1%
3
2
H1_THERMTRIP_3V
3
2
+3.3V
R357
1 2
1 2
1 2
40.2-1%
40.2-1%
SUB*_6610C
SUB*_6610C
(FBO)
(BPM5DR#)
H0_THERMTRIP_3V
1K-1%
2.7K-5% GPE_MCERR
3
2
1 3 4 5 6 7 8
9 11 12 13 14 15 16 17 18 19 21 22 23 25
2MM SMT
KEY 26
47
47
7
18
P2
2
10
20
24 26
K
7,10 7,10
7,10 7,10
7
H1_PROCHOT
ITP_FBI
ITP_PWR
21
R289
H_BPM02 H_BPM13
H_BPM4 H_BPM5
H0_PROCHOT
SIGNAL LEVEL TRANSLATION -- PROCESSOR OUTPUTS
A B
R290
1 2
560
40.2-1%
21
R288
RNBB1
VCORE
21
RB161
R286
1 2
C346
1 2
27-5%
VCORE
54
39 OHM-5%
SUB*_389YV
56.2-1%
RB148
1 2
2.7K-5%
R285
75-1%
1 2
1.5K-1%
21
R287
220
NP
0.1uF 16V
RNBB1
RNBB1
1 8
3 6
39 OHM-5%
39 OHM-5%
SUB*_389YV
SUB*_389YV
THESE SHOULD BE PLACED AT FAR END OF THESE LINES (AWAY FROM ITP CONNECTOR)
72
RNBB1
R291
1 2
39 OHM-5%
SUB*_389YV
1.5K-5%
NC_ITP_DBA ITP_DBR
ITP_TDI_H0 ITP_TMS ITP_TRST ITP_TCK
ITP_TDO_H1 NC_ITP_26_KEY
ROOM=PROC_1
VCORE
RB169
1 2
56.2-1%
RB152
2.7K-5%
QB1
3904
1
QB3
3904
1
21
+3.3V
1K-1%
RB159
1 2
H1_PROCHOT_3V
3
2
+3.3V
21
1K-1%
RB151
H0_PROCHOT_3V
3
2
H_FERR
6
35
35
RB178
2.7K-5%
47
7 7 7 7
7,10
21
6
QB7
3904
1
H1_IERR
6
+3.3V
21
RB186
3
2
VCORE
RB160
1 2
1 2
J2
3
VCORE
1 2
56.2-1%
H0_IERR
1K-1%
CSB_FERR_3V
150-1%
RB150
VCORE
56.2-1%
ITP_TDI_H1 ITP_TDO_H0 ITP_TDO_H1
V1
3904
RB149
21
2.7K-5%
1 2
RB171
1 2
2.7K-5%
RB182
1 2
2.7K-5%
QB2
1
RB157
FOR JTDO:
Install 1-2 for TWO processor system Install 2-3 for UNI processor system
(UNI-PROCESSOR IS WITH PROC_0 INSTALLED ONLY!)
PROC_0 PROC_1
7 7 7,10
+3.3V
R430
1 2
2.7K-5% GPE_IERR1
3
+3.3V
2
R436
1 2
2.7K-5%
QB4
3
3904
1
2
+3.3V
1K-1%
RB333
1 2
QB6
3904
1
CSB_FERR_3V
3
2
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
18,35
GPE_IERR0
18,35
18
TDO
ITP_TDO_H0
ITP_TDI_H1
JTDO
TDITDI
1 2
3
CSB_SMI_OUT
18
CSB_STPCLK_3V
18
CSB_SLP_3V
18
A20M_3V
18
INTR_3V
18
IGNNE_3V
18
NMI_3V
18
P_INIT
SIGNAL LEVEL TRANSLATION -- PROCESSOR INPUTS
TDO
SUB*_22327
SUB TO 1K
2.2K-5%
1 2
RB290
+3.3V
RB284
4.7K
21
+3.3V
2.2K-5%
1 2
RB304
ITP_TDI_H0
ITP_TD0_H1
ITP ROUTING DRAWING
1 2
1K-5%
1K-5%
RB293
R435
21
NP*
NP*
1 2
1 2
2.2K-5%
2.2K-5%
1 2
RB28921RB297
+2.5V
RB322
1K-5%
1 2
U51
5 6
7407
RB305
0-5% R429
0-5%
U51
7407
U51
7407
U51
7407
U51
1 2
7407
U51
9 8
7407
ROOM=LEVEL_TRANSLATION
H_SMI
H_STPCLK
H_SLP
1011
H_A20M
1213
H_INTR
43
H_IGNNE
H_NMI
PROCESSOR SIDE PULL-UPS ARE ON PAGE 6
H_INIT
6
6
6
6
6
6
6
611,18,22
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
AUSTIN,TEXAS
SHEET
DC
10 OF 51
1
2
3
4
REV.
A00-00
6-9-2003_13:5510EVERGLADES
Page 11
ROOM=CMIC (FOR THE CMIC CHIP ITSELF)
B D
CA
U_CMIC
A_SD0_0 A_SD0_1 A_SD0_2 A_SD0_3 A_SD0_4 A_SD0_5 A_SD0_6 A_SD0_7
A_SD1_0 A_SD1_1 A_SD1_2 A_SD1_3 A_SD1_4 A_SD1_5 A_SD1_6 A_SD1_7
A_SD2_0 A_SD2_1 A_SD2_2 A_SD2_3 A_SD2_4 A_SD2_5 A_SD2_6 A_SD2_7
A_SD3_0 A_SD3_1 A_SD3_2 A_SD3_3 A_SD3_4 A_SD3_5 A_SD3_6 A_SD3_7
A_SD4_0 A_SD4_1 A_SD4_2 A_SD4_3 A_SD4_4 A_SD4_5 A_SD4_6 A_SD4_7
A_SD5_0 A_SD5_1 A_SD5_2 A_SD5_3 A_SD5_4 A_SD5_5 A_SD5_6 A_SD5_7
A_SD6_0 A_SD6_1 A_SD6_2 A_SD6_3 A_SD6_4 A_SD6_5 A_SD6_6 A_SD6_7
A_SD7_0 A_SD7_1 A_SD7_2 A_SD7_3 A_SD7_4 A_SD7_5 A_SD7_6 A_SD7_7
A_SD8_0 A_SD8_1 A_SD8_2 A_SD8_3 A_SD8_4 A_SD8_5 A_SD8_6 A_SD8_7
A_DQS0_0 A_DQS0_1
A_DQS1_0 A_DQS1_1
A_DQS2_0 A_DQS2_1
A_DQS3_0 A_DQS3_1
A_DQS4_0 A_DQS4_1
A_DQS5_0 A_DQS5_1
A_DQS6_0 A_DQS6_1
A_DQS7_0 A_DQS7_1
A_DQS8_0 A_DQS8_1
ACKE BCKE
REMC
B_SD0_0 B_SD0_1 B_SD0_2 B_SD0_3 B_SD0_4 B_SD0_5 B_SD0_6 B_SD0_7
B_SD1_0 B_SD1_1 B_SD1_2 B_SD1_3 B_SD1_4 B_SD1_5 B_SD1_6 B_SD1_7
B_SD2_0 B_SD2_1 B_SD2_2 B_SD2_3 B_SD2_4 B_SD2_5 B_SD2_6 B_SD2_7
B_SD3_0 B_SD3_1 B_SD3_2 B_SD3_3 B_SD3_4 B_SD3_5 B_SD3_6 B_SD3_7
B_SD4_0 B_SD4_1 B_SD4_2 B_SD4_3 B_SD4_4 B_SD4_5 B_SD4_6 B_SD4_7
B_SD5_0 B_SD5_1 B_SD5_2 B_SD5_3 B_SD5_4 B_SD5_5 B_SD5_6 B_SD5_7
B_SD6_0 B_SD6_1 B_SD6_2 B_SD6_3 B_SD6_4 B_SD6_5 B_SD6_6 B_SD6_7
B_SD7_0 B_SD7_1 B_SD7_2 B_SD7_3 B_SD7_4 B_SD7_5 B_SD7_6 B_SD7_7
B_SD8_0 B_SD8_1 B_SD8_2 B_SD8_3 B_SD8_4 B_SD8_5 B_SD8_6 B_SD8_7
B_DQS0_0 B_DQS0_1
B_DQS1_0 B_DQS1_1
B_DQS2_0 B_DQS2_1
B_DQS3_0 B_DQS3_1
B_DQS4_0 B_DQS4_1
B_DQS5_0 B_DQS5_1
B_DQS6_0 B_DQS6_1
B_DQS7_0 B_DQS7_1
B_DQS8_0 B_DQS8_1
RAS CAS
HETERO 3 OF 6
SYMBOL PROBLEM:
PIN P1 IS B_DQS5_0 PIN P3 IS B_DQS5_1 PIN R10 IS B_DQS6_0 PIN U2 IS B_DQS6_1
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
WE
Y20 AA21 AA19 V17 V18 Y19 AB20 Y18
AF22 AE21 Y17 V16 AE22 AE20 AC18 AE18
AF16 AF15 AC15 AB14 AG16 AG15 AD14 Y15
AA13 AD13 AC12 AG9 V13 AE12 AF10 AG7
AB4 AB2 AA1 T8 AA3 AA2 Y1 AA5
P8 R3 P5 J8 P10 N2 N5 N6
W3 V1 T2 T1 T6 U4 R7 R8
M1 J1 M5 L10 K1 L2 M6 M8
AD9 AD8 AG4 AD7 V12 Y12 AE7 AG3
AA20 AB21
AF20 AE19
AE15 AD15
AG11 AG10
AA4 Y5
R10
U2
P1 P3
L4 M7
AC9 AF6
AC1 W8 AB1
R_B_SD0_0 R_B_SD0_1 R_B_SD0_2 R_B_SD0_3 R_B_SD0_4 R_B_SD0_5 R_B_SD0_6 R_B_SD0_7
R_B_SD1_0 R_B_SD1_1 R_B_SD1_2 R_B_SD1_3 R_B_SD1_4 R_B_SD1_5 R_B_SD1_6 R_B_SD1_7
R_B_SD2_0 R_B_SD2_1 R_B_SD2_2 R_B_SD2_3 R_B_SD2_4 R_B_SD2_5 R_B_SD2_6 R_B_SD2_7
R_B_SD3_0 R_B_SD3_1 R_B_SD3_2 R_B_SD3_3 R_B_SD3_4 R_B_SD3_5 R_B_SD3_6 R_B_SD3_7
R_B_SD4_0 R_B_SD4_1 R_B_SD4_2 R_B_SD4_3 R_B_SD4_4 R_B_SD4_5 R_B_SD4_6 R_B_SD4_7
R_B_SD5_0 R_B_SD5_1 R_B_SD5_2 R_B_SD5_3 R_B_SD5_4 R_B_SD5_5 R_B_SD5_6 R_B_SD5_7
R_B_SD6_0 R_B_SD6_1 R_B_SD6_2 R_B_SD6_3 R_B_SD6_4 R_B_SD6_5 R_B_SD6_6 R_B_SD6_7
R_B_SD7_0 R_B_SD7_1 R_B_SD7_2 R_B_SD7_3 R_B_SD7_4 R_B_SD7_5 R_B_SD7_6 R_B_SD7_7
R_B_SD8_0 R_B_SD8_1 R_B_SD8_2 R_B_SD8_3 R_B_SD8_4 R_B_SD8_5 R_B_SD8_6 R_B_SD8_7
R_B_DQS0_0 R_B_DQS0_1
R_B_DQS1_0 R_B_DQS1_1
R_B_DQS2_0 R_B_DQS2_1
R_B_DQS3_0 R_B_DQS3_1
R_B_DQS4_0 R_B_DQS4_1
R_B_DQS6_0 R_B_DQS6_1
R_B_DQS5_0 R_B_DQS5_1
R_B_DQS7_0 R_B_DQS7_1
R_B_DQS8_0 R_B_DQS8_1
MRAS
MCAS
MWE
12 OHM-5%12 OHM-5%
3 6RNB4
12 OHM-5%
4 5RNB1
12 OHM-5%
2 7RNB4
12 OHM-5%
4 5RNB7
12 OHM-5%
4 5RNB11
12 OHM-5%
2 7RNB7
12 OHM-5%
2 7RNB9
12 OHM-5%
1 8RNB11
12 OHM-5%
1 8RNB14
12 OHM-5%
2 7RNB11
12 OHM-5%
3 6RNB16
12 OHM-5%
4 5RNB18
12 OHM-5%
1 8RNB20
12 OHM-5%
3 6RNB18
12 OHM-5%
2 7RNB20
12 OHM-5%
4 5RNB37
12 OHM-5%
3 6RNB39
12 OHM-5%
3 6RNB37
12 OHM-5%
1 8RNB39
12 OHM-5%
2 7RNB42
12 OHM-5%
4 5RNB46
12 OHM-5%
1 8RNB42
12 OHM-5%
2 7RNB46
12 OHM-5%
4 5RNB48
12 OHM-5%
1 8RNB50
12 OHM-5%
2 7RNB48
12 OHM-5%
3 6RNB50
12 OHM-5%
1 8RNB52
12 OHM-5%
3 6RNB55
12 OHM-5%
2 7RNB52
12 OHM-5%
1 8RNB54
12 OHM-5%
4 5RNB24
12 OHM-5%
4 5RNB28
12 OHM-5%
2 7RNB22
12 OHM-5%
3 6RNB28
12 OHM-5%
1 8RNB1
12 OHM-5%
1 8RNB7
12 OHM-5%
3 6RNB14
12 OHM-5%
4 5RNB20
12 OHM-5%
4 5RNB39
12 OHM-5%
2 7RNB50
12 OHM-5%
1 8RNB44
12 OHM-5%
4 5RNB55
12 OHM-5%
2 7RNB24
12 OHM-5%
36
12 OHM-5%
45
12 OHM-5%
45
12 OHM-5%
36 RNB34
12 OHM-5%
RB89
12 OHM 5%
RB92
12 OHM 5%
B_SD0_0
2 7RNB1
B_SD0_1
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
RNB29
RNB29
RNB34
X_MRAS
Y_MRAS
X_MCAS
Y_MCAS
21
21
X_MWE
Y_MWE
B_SD0_2 B_SD0_3
4 5RN9
B_SD0_4 B_SD0_5
3 6RNB1
B_SD0_6
1 8RNB4
B_SD0_7 B_SD1_0
3 6RN6338
B_SD1_1 B_SD1_2
3 6RNB11
B_SD1_3 B_SD1_4
4 5RNB9
B_SD1_5 B_SD1_6
1 8RNB9
B_SD1_7 B_SD2_0
4 5RNB14
B_SD2_1 B_SD2_2
2 7RNB16
B_SD2_3 B_SD2_4
2 7RNB14
B_SD2_5 B_SD2_6
1 8RNB16
B_SD2_7 B_SD3_0
2 7RNB18
B_SD3_1 B_SD3_2
4 5RNB22
B_SD3_3 B_SD3_4
1 8RNB18
B_SD3_5 B_SD3_6
3 6RNB22
B_SD3_7 B_SD4_0
2 7RNB37
B_SD4_1 B_SD4_2
4 5RNB42
B_SD4_3 B_SD4_4
1 8RNB37
B_SD4_5 B_SD4_6
3 6RNB42
B_SD4_7 B_SD5_0
4 5RNB44
B_SD5_1 B_SD5_2
3 6RNB46
B_SD5_3 B_SD5_4
3 6RNB44
B_SD5_5 B_SD5_6
1 8RNB46
B_SD5_7 B_SD6_0
3 6RNB48
B_SD6_1 B_SD6_2
3 6RNB52
B_SD6_3 B_SD6_4
1 8RNB48
B_SD6_5 B_SD6_6
4 5RNB52
B_SD6_7 B_SD7_0
3 6RNB54
B_SD7_1 B_SD7_2
1 8RNB55
B_SD7_3 B_SD7_4
4 5RNB54
B_SD7_5 B_SD7_6
2 7RNB55
B_SD7_7 B_SD8_0
3 6RNB24
B_SD8_1 B_SD8_2
2 7RNB28
B_SD8_3 B_SD8_4
1 8RNB22
B_SD8_5 B_SD8_6
1 8RNB28
B_SD8_7 B_DQS0_0
4 5RNB4
B_DQS0_1
B_DQS1_0
3 6RNB9
B_DQS1_1
B_DQS2_0
4 5RNB16
B_DQS2_1 B_DQS3_0
3 6RNB20
B_DQS3_1
B_DQS4_0
2 7RNB39
B_DQS4_1
B_DQS6_0 B_DQS6_1
4 5RNB50
B_DQS5_0 B_DQS5_1
2 7RNB44
B_DQS7_0
2 7RNB54
B_DQS7_1 B_DQS8_0
1 8RNB24
B_DQS8_1
14,16
15,16
14,16
15,16
14,16
15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
A1
A27
B5
B6 B10 B11 B14 C17 C18 C25
D5
D6 D10 D11 D14 D21 D23 D25
E2 E17 E18 E22 E24 F10 F11 F14
G7 G17 G18 G26
J2
J4
J6
J7
J9 J11 J13 J15 J17 J19 J21 J23 J25
K2
K4
K6 K16 K21 K23 K25
L9 L12 L14 L16 L19 M11 M13 M15 M18
N9 N12 N14 N16 N19
P2
SERVERWORKS "CMIC-LE" - REV 1.01
R_MCS0
11
R_MCS1
11
R_MCS3
11
R_MCS2
11
U_CMIC
GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65
GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 GND_82 GND_83 GND_84 GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 GND_91 GND_92 GND_93 GND_94 GND_95 GND_96 GND_97 GND_98
GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130
HETERO 6 OF 6
RNB40
81
39 OHM-5%
RNB40
2 7
39 OHM-5%
RNB40
63
39 OHM-5%
RNB40
4 5
39 OHM-5%
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
DC
P6 P11 P13 P15 P22 P26 R9 R12 R14 R16 R19 T11 T13 T15 T18 U3 U5 U7 U12 U14 U16 V3 V5 V7 V21 V23 V25 W9 W11 W13 W15 W19 W21 W23 W25 AA10 AA11 AA14 AA17 AB17 AB18 AC2 AC4 AC6 AC10 AC11 AC21 AC23 AC25 AD2 AD4 AD6 AD17 AD18 AD21 AD23 AD25 AE10 AE11 AF7 AF14 AF17 AF18 AG1 AG27
MCS0
14
MCS1
15
MCS3
15
MCS2
14
COMPUTER CORPORATION AUSTIN,TEXAS
REV.
SHEET
11 OF 51
6-9-2003_13:5511EVERGLADES
A00-00
ADS PA3
PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 PA32 PA33 PA34 PA35
AD_STB0 AD_STB1
AP0 AP1
BPRI BREQ0 BINIT BNR
DRDY DBSY DEFER HIT HITM LOCK
RS0 RS1 RS2
RSP HREQ0
HREQ1 HREQ2 HREQ3 HREQ4
P_TRDY DP0
DP1 DP2 DP3
MA0 MA1 MA2 MA3 MA4 MA5 MA6
R_CS_0 CS_1 CS_2 CS_3
HETERO 1 OF 6
11
11
11
11
11
11
11
U_CMIC
HOST
BUS
REMC
MA7
MA10
MA12
MA5
MA0
MA1
MA13
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8
PD9 PD10 PD11 PD12 PD13 PD14 PD15 PD16 PD17 PD18 PD19 PD20 PD21 PD22 PD23 PD24 PD25 PD26 PD27 PD28 PD29 PD30 PD31 PD32 PD33 PD34 PD35 PD36 PD37 PD38 PD39 PD40 PD41 PD42 PD43 PD44 PD45 PD46 PD47 PD48 PD49 PD50 PD51 PD52 PD53 PD54 PD55 PD56 PD57 PD58 PD59 PD60 PD61 PD62 PD63
DINV0 DINV1 DINV2 DINV3
P_INIT
MA7
MA8
MA9 MA10 MA11 MA12 MA13 MA14
CS_4 CS_5 CS_6 CS_7
27 RNB30
12 OHM-5%
18
12 OHM-5%
36
12 OHM-5%
45
12 OHM-5%
27 RNB33
12 OHM-5%
18
12 OHM-5%
36
12 OHM-5%
45
12 OHM-5%
27 RNB32
12 OHM-5%
18
12 OHM-5%
36
12 OHM-5%
45
12 OHM-5%
18
12 OHM-5%
27
12 OHM-5%
C2 E3 B3 C3 F3 D4 A2 D2 D3 A3 H6 F6 G8 F5 H8 H10 F7 G9 E7 E6 A4 B4 D7 A5 G10 K11 B7 C6 F8 C7 E9 K12 D8 C8 D9 B9 E10 A7 A10 A8 B12 A11 F12 A12 G13 F13 K13 H12 B13 D12 A13 E13 C13 C14 A15 B15 D15 E14 E15 H14 K14 C15 A16 G14
G5 A6 C10 H13
AF23
AE2 AD3 AE3 AF2 Y8 V10 AA7 AB6
AE1 AD1 AA6
CK_133M_MCLK_N CK_133M_MCLK_P
Y6
H_D0 H_D1 H_D2 H_D3 H_D4 H_D5 H_D6 H_D7 H_D8 H_D9 H_D10 H_D11 H_D12 H_D13 H_D14 H_D15 H_D16 H_D17 H_D18 H_D19 H_D20 H_D21 H_D22 H_D23 H_D24 H_D25 H_D26 H_D27 H_D28 H_D29 H_D30 H_D31 H_D32 H_D33 H_D34 H_D35 H_D36 H_D37 H_D38 H_D39 H_D40 H_D41 H_D42 H_D43 H_D44 H_D45 H_D46 H_D47 H_D48 H_D49 H_D50 H_D51 H_D52 H_D53 H_D54 H_D55 H_D56 H_D57 H_D58 H_D59 H_D60 H_D61 H_D62 H_D63
H_DBI0 H_DBI1 H_DBI2 H_DBI3
P_INIT
MA7 MA8 MA9 MA10 MA11 MA12 MA13 MA14
NC_MCS4 NC_MCS5
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
6 6 6 6
10,18,22
11 11 11 11 11 11 11 11
5 5
CMIC-LE "P" CLOCK TO PLL's "N" CLOCK
X_MA7
14,16
RNB30
RNB30
RNB30
RNB33
RNB33
RNB33
RNB32
RNB32
RNB32
RNB34
RNB34
Y_MA7
X_MA10
Y_MA10
X_MA12
Y_MA12
X_MA5
Y_MA5
X_MA0
Y_MA0
X_MA1
Y_MA1
X_MA13
Y_MA13
15,16
14,16
15,16
14,16
15,16
14,16
15,16
14,16
15,16
14,16
15,16
14,16
15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
14,15,16 14,15,16
A_SD0_0 A_SD0_1 A_SD0_2 A_SD0_3 A_SD0_4 A_SD0_5 A_SD0_6 A_SD0_7
A_SD1_0 A_SD1_1 A_SD1_2 A_SD1_3 A_SD1_4 A_SD1_5 A_SD1_6 A_SD1_7
A_SD2_0 A_SD2_1 A_SD2_2 A_SD2_3 A_SD2_4 A_SD2_5 A_SD2_6 A_SD2_7
A_SD3_0 A_SD3_1 A_SD3_2 A_SD3_3 A_SD3_4 A_SD3_5 A_SD3_6 A_SD3_7
A_SD4_0 A_SD4_1 A_SD4_2 A_SD4_3 A_SD4_4 A_SD4_5 A_SD4_6 A_SD4_7
A_SD5_0 A_SD5_1 A_SD5_2 A_SD5_3 A_SD5_4 A_SD5_5 A_SD5_6 A_SD5_7
A_SD6_0 A_SD6_1 A_SD6_2 A_SD6_3 A_SD6_4 A_SD6_5 A_SD6_6 A_SD6_7
A_SD7_0 A_SD7_1 A_SD7_2 A_SD7_3 A_SD7_4 A_SD7_5 A_SD7_6 A_SD7_7
A_SD8_0 A_SD8_1 A_SD8_2 A_SD8_3 A_SD8_4 A_SD8_5 A_SD8_6 A_SD8_7
A_DQS0_0 A_DQS0_1
A_DQS1_0 A_DQS1_1
A_DQS2_0 A_DQS2_1
A_DQS3_0 A_DQS3_1
A_DQS4_0 A_DQS4_1
A_DQS5_0 A_DQS5_1
A_DQS6_0 A_DQS6_1
A_DQS7_0 A_DQS7_1
A_DQS8_0 A_DQS8_1
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
18
RN9
36
RN13
45
RN5
45
RN13
27 RN18
27 RN26
18 RN20
45 RN20
18 RN30
36 RN32
36
RN30
45
RN32
36 RN36
18 RN46
45 RN36
27 RN46
36 RN57
27
RN67
45
RN57
18 RN67
27
RN78
36 RN82
18 RN78
45
RN82
27 RN87
27
RN98
45 RN87
18 RN98
27 RN100
45
RN104
18
RN100
36 RN104
27
RN48
36 RN53
45
RN46
45 RN53
27
RN9
27
RN20
45
RN30
27
RN40
36 RN61
36
RN78
18
RN92
36
RN100
45
RN48
27 RN5 1 8RN5
18 RN13
12 OHM-5%
36
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
12 OHM-5%
14,16 15,16
RN5
27 RN13
18
RN18
18
RN26
36
RN18
36
RN20
45 RN26
18
RN32
36
RN26
27 RN32
18
RN36
36 RN40
27
RN36
45
RN40
18
RN57
27 RN61
27 RN57
45
RN61
36
RN67
18 RN82
45 RN67
27 RN82
18
RN87
45
RN92
36
RN87
27 RN92
45 RN98
27 RN104
36
RN98
45
RN100
18 RN48
18 RN53
36
RN46
27
RN53
36 RN9
45 RN18
27
RN30
18
RN40
18
RN61
45
RN78
36 RN92
18 RN104
36 RN48
X_CKE Y_CKE
R_A_DQS0_0 R_A_DQS0_1
R_A_DQS1_0 R_A_DQS1_1
R_A_DQS2_0 R_A_DQS2_1
R_A_DQS3_0 R_A_DQS3_1
R_A_DQS4_0 R_A_DQS4_1
R_A_DQS5_0 R_A_DQS5_1
R_A_DQS6_0 R_A_DQS6_1
R_A_DQS7_0 R_A_DQS7_1
R_A_DQS8_0 R_A_DQS8_1
R_A_SD0_0 R_A_SD0_1 R_A_SD0_2 R_A_SD0_3 R_A_SD0_4 R_A_SD0_5 R_A_SD0_6 R_A_SD0_7
R_A_SD1_0 R_A_SD1_1 R_A_SD1_2 R_A_SD1_3 R_A_SD1_4 R_A_SD1_5 R_A_SD1_6 R_A_SD1_7
R_A_SD2_0 R_A_SD2_1 R_A_SD2_2 R_A_SD2_3 R_A_SD2_4 R_A_SD2_5 R_A_SD2_6 R_A_SD2_7
R_A_SD3_0 R_A_SD3_1 R_A_SD3_2 R_A_SD3_3 R_A_SD3_4 R_A_SD3_5 R_A_SD3_6 R_A_SD3_7
R_A_SD4_0 R_A_SD4_1 R_A_SD4_2 R_A_SD4_3 R_A_SD4_4 R_A_SD4_5 R_A_SD4_6 R_A_SD4_7
R_A_SD5_0 R_A_SD5_1 R_A_SD5_2 R_A_SD5_3 R_A_SD5_4 R_A_SD5_5 R_A_SD5_6 R_A_SD5_7
R_A_SD6_0 R_A_SD6_1 R_A_SD6_2 R_A_SD6_3 R_A_SD6_4 R_A_SD6_5 R_A_SD6_6 R_A_SD6_7
R_A_SD7_0 R_A_SD7_1 R_A_SD7_2 R_A_SD7_3 R_A_SD7_4 R_A_SD7_5 R_A_SD7_6 R_A_SD7_7
R_A_SD8_0 R_A_SD8_1 R_A_SD8_2 R_A_SD8_3 R_A_SD8_4 R_A_SD8_5 R_A_SD8_6 R_A_SD8_7
AA22 AD22 AC19 AA18 AB23 AB19 AD19
Y16
V15 AG22 AB15 AD16 AG21 AF19 AG17 AB16
AG14
Y14 AF13 AG12 AE14
V14 AG13 AE13
Y13
AF9
AE8 AD10 AA12
AG8
AG6
AG5
T10
R11
M10
K10
AF3
AG2 AB10
AA9
AE6
AF5
AC8
AB9 AC20
AD20 AG20
AG19 AB13
AC13
AE9
AF8
N10
Y11
V11
AB8
AE4
Y4
T7 W5 Y3 U6 U1
T3 R2 R4 R5 T5 R1 K8 R6
N3 N1 M2 M4 N8 N4 L1 M3
H1 H2 L6
J5 J3 L8
Y2 W1
T4 P7
N7 H4
H3
SERVERWORKS "CMIC_LE" - REV 1.01
RB88
MA11
11
21
12 OHM 5%
RB87
21
12 OHM 5%
X_MA11
Y_MA11
14,16
15,16
ROOM=MEM_SERIESTERM (FOR MEMORY BUS SERIES TERMINATION RESISTORS)
H_ADS
6
1
H_ADSTB0
6
H_ADSTB1
6
H_AP0
6
H_AP1
6
H_BPRI
6
H_BREQ0
6
H_BINIT
2
6
H_BNR
6
H_DRDY
6
H_DBSY
6
H_DEFER
6
H_HIT
6
H_HITM
6
H_LOCK
6
H_RS0
6
H_RS1
6
H_RS2
6
H_RSP
6
H_REQ0
6
H_REQ1
6
H_REQ2
6
H_REQ3
6
H_REQ4
6
H_TRDY
6
H_DP0
6
H_DP1
6
H_DP2
6
H_DP3
6
H_A3
6
H_A4
6
H_A5
6
H_A6
6
H_A7
6
H_A8
6
H_A9
6
H_A10
6
H_A11
6
H_A12
6
H_A13
6
H_A14
6
H_A15
6
H_A16
6
H_A17
6
H_A18
6
H_A19
6
H_A20
6
H_A21
6
H_A22
6
H_A23
6
H_A24
6
H_A25
6
H_A26
6
H_A27
6
H_A28
6
H_A29
6
H_A30
6
H_A31
6
H_A32
6
H_A33
6
H_A34
6
H_A35
6
K15 A17 A19 B18 A18 B19 A20 G16 C19 E19 H17 H16 D19 F18 H18 G19 F19 A23 B23 A22 A21 F20 B20 A24 A25 D20 B21 E20 B25 B27 A26 C22 D22
D18 C20
E23 C24
F23 F21 H19
K17
D24 E16
G15 F15 C16 H15
C26 B26 E21 E25
F1
G2
H5
E1 C1 D1 G3
B1 G1 F2
F4
I2C FOR CMIC IS C0h
MA0
11
MA1
11
MA2
11
MA3
11
MA4
11
MA5
MA8
MA9
MA2
MA14
MA4
MA3
MA6
11 11
11 11 11 11
27 RNB31
12 OHM-5%
18
12 OHM-5%
36
12 OHM-5%
45
12 OHM-5%
27 RNB25
12 OHM-5%
18
12 OHM-5%
36
12 OHM-5%
45
12 OHM-5%
27 RNB26
12 OHM-5%
18
12 OHM-5%
36
12 OHM-5%
45
12 OHM-5%
27 RNB29
12 OHM-5%
18
12 OHM-5%
MA6 R_MCS0
R_MCS1 R_MCS2 R_MCS3
RNB31
RNB31
RNB31
RNB25
RNB25
RNB25
RNB26
RNB26
RNB26
RNB29
X_MA8
Y_MA8
X_MA9
Y_MA9
X_MA2
Y_MA2
X_MA14
Y_MA14
X_MA4
Y_MA4
X_MA3
Y_MA3
X_MA6
Y_MA6
3
11
11
11
11
11
4 4
11
11
AD5 AE5 Y10 AA8
Y9 Y7
AF1
U8
U10
W7 V8
SERVERWORKS "CMIC-LE" REV 1.01
14,16
15,16
14,16
15,16
14,16
15,16
14,16
15,16
14,16
15,16
14,16
15,16
14,16
15,16
A B
1
2
3
Page 12
B D
CA
CMIC_SRESET
12,47
CMIC_PLL_EN
12
CMIC_DEFER_EN
12
COMP_IMB
12
IOQ_DEPTH
12
DETERMINISTIC_IMB
12
IMB_TRAINING
12
IMB_CRC_PARITY
12
1
IMB_R_W_PTR_DLY
12
19
OEB
2
A1
4
A2
6
A3
11
B1
13
B2
15
B3
74VHC244
SUB*_8H192
U20
+2.5V
14 213
CMIC_SRESET
12,47
201
VOEA
18
YA1
16
YA2
14
YA3
128
YA4A4
9
YB1
7
YB2
5
YB3
317
YB4B4
U18 74VHC125
+2.5V
14
+2.5V
GPE_CMIC_FATAL CMIC_WARMRST MEMOFF_CSB MEMOFFACK ENV_SEG4_25V_SCL ENV_SEG4_25V_SDA GPE_CMIC_ALERT CMIC_TM_R
U18 74VHC125
645
+2.5V
U18 74VHC125
14
9108
+2.5V
U18 74VHC125
14
12
13
R114
1 2
0-5%
NP*
11
12,18,35 12 12,18 12 12,21 12,21 12,18
CMIC_TESTMODE
GPE_CIOB2_ALERT TO CIOB-E
GPE_CIOB1_ALERT TO CIOBX2
PCIX_SCSI_GNT2 TO CIOBX2
PCIX_SEC_GNT3 TO CIOB-E
12
18,28
18,27
26
28,29
12
IMB_R_W_PTR_DLY
+2.5V +2.5V
21
RB75
PU : normal operation
PD : do not use
ON CMIC 3.0 --
1 2
2.7K-5%
12
R139
CMIC_RSVD
21
R125
1K-5%
1 2
NP
PD : 6 Clocks
PU : 5 Clocks
R142
2.7K-5%
12
1K-5%
NP
PU : TIMB is 100MHz
PD : TIMB is 200MHz
IOQ_DEPTH
NP
+2.5V
RB82
1 2
R131
1 2
2.7K-5%
1K-5%
+2.5V +2.5V
NP
RB79
1 2
R128
1 2
2.7K-5%
1K-5%
COMP_IMB
12
PD : IOQ DEPTH IS 12 (default)
PU : IOQ DEPTH IS 1
PU : A_IMB IS COMPATIBILITY IMB
GPI_SYN_SEL100
4,7,22
PD : 533MHz
RB76
1 2
Q12
NP
R124
1 2
2.7K-5%
1K-5%
PU : DEFER ENABLED (DEFAULT)PU : 400MHz
CMIC_PLL_EN
12
PD : DEFER IS DISABLED
CMIC_DEFER_EN
12
D
3
2N7002
1
G
S
PD : THIN IMB IS COMPATIBILITY IMB (DEFAULT)
2
+2.5V
RB74
1 2
2.7K-5%
R122
1 2
NP
1K-5%
DETERMINISTIC_IMB
12
PU : APLL DISABLED
PD : APLL IS ENABLED (DEFAULT)
+2.5V
RB83
1 2
R135
NP
1 2
2.7K-5%
1K-5%
IMB_TRAINING
12
PD : Deterministic IMB
PU : Non Deterministic IMB (DEFAULT)
+2.5V
RB81
1 2
2.7K-5%
R133
1K-5%
1 2
NP
PU : ENABLE IMB Training (DEFAULT)
IMB_CRC_PARITY
12
PD : DISABLE IMB Training
+2.5V
RB77
1 2
2.7K-5%
R129
1K-5%
1 2
NP
PD : IMB Parity Checking
PU : IMB CRC Checking (DEFAULT)
ROOM=CHIPSET_STRAP
E4 E5 E8 E11 E12 F16 F17 G4 G11 G12 G20 J10 J12 J14 J16 J18
G6
DSTBN0
F9
DSTBN1
C9
DSTBN2
D13
DSTBN3
H7
DSTBP0
H11
DSTBP1
A9
DSTBP2
A14
DSTBP3
C27
CPURST
AE24 AE26 AF26
PCIRST
CMIC_WARMRST CMIC_TESTMODE
MEMOFFACK MEMOFF_CSB
1 2
21
2.2-5%
VCORE
+2.5V
R181
H_DSTBN0 H_DSTBN1 H_DSTBN2 H_DSTBN3
H_DSTBP0 H_DSTBP1 H_DSTBP2 H_DSTBP3
H_RST NC_CMIC_DLYRST CMIC_WARMRST CMIC_PCIRST
12 12
12 12,18
6 6 6 6
6 6 6 6
6,10
12 47
+1.5V
E26
VDD_1.5_E26
G23
VDD_1.5_G23
K19
VDD_1.5_K19
K22
VDD_1.5_K22
K24
VDD_1.5_K24
K26
VDD_1.5_K26
L22
VDD_1.5_L22
L24
VDD_1.5_L24
L26
VDD_1.5_L26
M17
+2.5V
VDD_1.5_M17
M19
VDD_1.5_M19
K3
VDD_2.5_K3
K5
VDD_2.5_K5
K7
VDD_2.5_K7
K9
VDD_2.5_K9
L3
VDD_2.5_L3
L5
VDD_2.5_L5
L7
VDD_2.5_L7
L11
VDD_2.5_L11
L13
VDD_2.5_L13
L15
VDD_2.5_L15
M9
VDD_2.5_M9
M12
VDD_2.5_M12
M14
VDD_2.5_M14
M16
VDD_2.5_M16
N11
VDD_2.5_N11
N13
VDD_2.5_N13
N15
VDD_2.5_N15
P4
VDD_2.5_P4
P9
VDD_2.5_P9
P12
VDD_2.5_P12
P14
VDD_2.5_P14
P16
VDD_2.5_P16
R13
VDD_2.5_R13
R15
VDD_2.5_R15
T9
VDD_2.5_T9
T12
VDD_2.5_T12
T14
VDD_2.5_T14
T16
VDD_2.5_T16
U11
VDD_2.5_U11
U13
VDD_2.5_U13
U15
VDD_2.5_U15
V2
VDD_2.5_V2
V4
VDD_2.5_V4
V6
VDD_2.5_V6
V9
VDD_2.5_V9
V22
VDD_2.5_V22
W2
VDD_2.5_W2
SERVERWORKS "CMIC-LE" - REV 1.01
HETERO 5 OF 6
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
EVERGLADES 12 6-9-2003_13:55
DC
U_CMIC
VDD_1.5_P24 VDD_1.5_P19 VDD_1.5_P17 VDD_1.5_T17 VDD_1.5_T19 VDD_1.5_U22 VDD_1.5_U24 VDD_1.5_U26 VDD_1.5_V19 VDD_1.5_V24 VDD_1.5_V26
VDD_2.5_W4
VDD_2.5_W6 VDD_2.5_W10 VDD_2.5_W12 VDD_2.5_W14 VDD_2.5_W16 VDD_2.5_W18 VDD_2.5_Y23 VDD_2.5_Y25
VDD_2.5_AA15 VDD_2.5_AA16
VDD_2.5_AB3 VDD_2.5_AB5 VDD_2.5_AB7
VDD_2.5_AB11 VDD_2.5_AB12 VDD_2.5_AB22 VDD_2.5_AB24 VDD_2.5_AB26
VDD_2.5_AC3 VDD_2.5_AC5 VDD_2.5_AC7
VDD_2.5_AC14 VDD_2.5_AC16 VDD_2.5_AC17 VDD_2.5_AC22 VDD_2.5_AC24 VDD_2.5_AC26 VDD_2.5_AD11 VDD_2.5_AD12 VDD_2.5_AE16 VDD_2.5_AE17
VDD_2.5_AF4
VDD_2.5_AF11 VDD_2.5_AF12 VDD_2.5_AF21 VDD_2.5_AF24
COMPUTER CORPORATION AUSTIN,TEXAS
SHEET
12 OF 51
P24 P19 P17 T17 T19 U22 U24 U26 V19 V24 V26
W4 W6 W10 W12 W14 W16 W18 Y23 Y25 AA15 AA16 AB3 AB5 AB7 AB11 AB12 AB22 AB24 AB26 AC3 AC5 AC7 AC14 AC16 AC17 AC22 AC24 AC26 AD11 AD12 AE16 AE17 AF4 AF11 AF12 AF21 AF24
+1.5V
REV.
+2.5V
A00-00
+2.5V
21
R13221RB80
10K-5%
CMIC_AVDD
CMIC_AGND
VCORE
B2
B8 B16 B17 B22 B24
C4
C5 C11 C12 C21 C23 D16 D17 D26
AG18
F22 G21 H20
AB27
H9 K18
AF25 AG24 AG26 AD26
SERVERWORKS "CMIC-LE" - REV 1.01
R123
10K-5%
1 2
0.1uF 16V CB150
1 2
A_IMB_UP_CLK_N
27
A_IMB_UP_CLK_P
27
B_IMB_UP_CLK_N
29
B_IMB_UP_CLK_P
12,18,35
12,21
28,47
29
A_IMB_UP_CON
27
B_IMB_UP_CON
29
A_IMB_UP_PAR
27
B_IMB_UP_PAR
29
A_IMB_UP_D0
27
A_IMB_UP_D1
27
A_IMB_UP_D2
27
A_IMB_UP_D3
27
A_IMB_UP_D4
27
A_IMB_UP_D5
27
A_IMB_UP_D6
27
A_IMB_UP_D7
27
A_IMB_UP_D8
27
A_IMB_UP_D9
27
A_IMB_UP_D10
27
A_IMB_UP_D11
27
A_IMB_UP_D12
27
A_IMB_UP_D13
27
A_IMB_UP_D14
27
A_IMB_UP_D15
27
B_IMB_UP_D0
29
B_IMB_UP_D1
29
B_IMB_UP_D2
29
B_IMB_UP_D3
29
B_IMB_UP_D4
29
B_IMB_UP_D5
29
B_IMB_UP_D6
29
B_IMB_UP_D7
29
B_IMB_UP_D8
29
B_IMB_UP_D9
29
B_IMB_UP_D10
29
B_IMB_UP_D11
29
B_IMB_UP_D12
29
B_IMB_UP_D13
29
B_IMB_UP_D14
29
B_IMB_UP_D15
29
CSB_IMB_UP_D0
18
CSB_IMB_UP_D1
18
CSB_IMB_UP_D2
18
CSB_IMB_UP_D3
18
CSB_IMB_UP_CLK
18
CSB_IMB_UP_CON
18
CSB_IMB_UP_PAR
18
CMIC_IMB_COMP_PD
12
CMIC_IMB_COMP_PU
12
CMIC_IMB_RCOMP
12
GPE_CMIC_FATAL ENV_SEG4_25V_SCL
CK_100M_CMIC_P
4
CK_100M_CMIC_N
4
PLLRST_CMIC
12
12
12
2
3
+1.5V
RB102
1 2
CMIC_IMB_COMP_PU
100-1%
RB97
1 2
CMIC_IMB_RCOMP
100-1%
R186
1 2
CMIC_IMB_COMP_PD
4 4
249 Ohm-1%
H24
A_IMBCLK_R_N
H25
A_IMBCLK_R_P
P27
B_IMBCLK_R_N
P25
B_IMBCLK_R_P
F25 M20
A_IMBCON_R A_IMBCON_T
N20 R20
B_IMBCON_R B_IMBCON_T
F26 L23
A_IMBPAR_R A_IMBPAR_T
N21 V27
B_IMBPAR_R B_IMBPAR_T
L20
A_IMBD_R0
L17
A_IMBD_R1
L18
A_IMBD_R2
K20
A_IMBD_R3
J24
A_IMBD_R4
H23
A_IMBD_R5
H22
A_IMBD_R6
J22
A_IMBD_R7
H26
A_IMBD_R8
F27
A_IMBD_R9
G24
A_IMBD_R10
G27
A_IMBD_R11
G25
A_IMBD_R12
E27
A_IMBD_R13
F24
A_IMBD_R14
J20
A_IMBD_R15
R25
B_IMBD_R0
T23
B_IMBD_R1
R26
B_IMBD_R2
R27
B_IMBD_R3
R22
B_IMBD_R4
P23
B_IMBD_R5
R24
B_IMBD_R6
R23
B_IMBD_R7
N25
B_IMBD_R8
N22
B_IMBD_R9
P21
B_IMBD_R10
N23
B_IMBD_R11
N24
B_IMBD_R12
P20
B_IMBD_R13
R18
B_IMBD_R14
R17
B_IMBD_R15
Y26
T_IMBD_R0
W24
T_IMBD_R1
AA26
T_IMBD_R2
W22
T_IMBD_R3
Y27 AA24
T_IMBCLK_R T_IMBCLK_T
AA27 AA23
T_IMBCON_R T_IMBCON_T
W20 AB25
T_IMBPAR_R T_IMBPAR_T
D27
IMB_COMP_PD
H21
IMB_COMP_PU
G22
IMB_RCOMP
AG23 AE23
SCL SDA
AD27
BCLKP
AE27
BCLKN
AE25
DLLRST SERVERWORKS "CMIC-LE" - REV 1.01
HETERO 2 OF 6
CMIC-LE heatsink (U3001)
ADD=ADD*_P0199_U_CMIC
SUB*_C1550
A3.0 rev CMIC IS 6U018 A3.1 rev CMIC IS 3X719 A3.2 rev CMIC IS C1550
IM
RAS
A_IMBCLK_T_N A_IMBCLK_T_P B_IMBCLK_T_N B_IMBCLK_T_P
A_IMBD_TO A_IMBD_T1 A_IMBD_T2 A_IMBD_T3 A_IMBD_T4 A_IMBD_T5 A_IMBD_T6 A_IMBD_T7 A_IMBD_T8
A_IMBD_T9 A_IMBD_T10 A_IMBD_T11 A_IMBD_T12 A_IMBD_T13 A_IMBD_T14 A_IMBD_T15
B_IMBD_TO
B_IMBD_T1
B_IMBD_T2
B_IMBD_T3
B_IMBD_T4
B_IMBD_T5
B_IMBD_T6
B_IMBD_T7
B_IMBD_T8
B_IMBD_T9 B_IMBD_T10 B_IMBD_T11 B_IMBD_T12 B_IMBD_T13 B_IMBD_T14 B_IMBD_T15
T_IMBD_TO
T_IMBD_T1
T_IMBD_T2
T_IMBD_T3
T_IMBVREFF
ALERTFATAL
IMBVREF1
RSVD MEMVREF MEMVREF
M23
A_IMB_DN_CLK_N
L25
A_IMB_DN_CLK_P
W27
B_IMB_DN_CLK_N
W26
B_IMB_DN_CLK_P
A_IMB_DN_CON B_IMB_DN_CON
A_IMB_DN_PAR B_IMB_DN_PAR
M26
A_IMB_DN_D0
M25
A_IMB_DN_D1
N27
A_IMB_DN_D2
N18
A_IMB_DN_D3
N17
A_IMB_DN_D4
M24
A_IMB_DN_D5
N26
A_IMB_DN_D6
L27
A_IMB_DN_D7
M27
A_IMB_DN_D8
L21
A_IMB_DN_D9
M22
A_IMB_DN_D10
H27
A_IMB_DN_D11
J27
A_IMB_DN_D12
K27
A_IMB_DN_D13
J26
A_IMB_DN_D14
M21
A_IMB_DN_D15
U21
B_IMB_DN_D0
U23
B_IMB_DN_D1
T20
B_IMB_DN_D2
U18
B_IMB_DN_D3
U17
B_IMB_DN_D4
V20
B_IMB_DN_D5
U20
B_IMB_DN_D6
T22
B_IMB_DN_D7
T21
B_IMB_DN_D8
R21
B_IMB_DN_D9
T25
B_IMB_DN_D10
U27
B_IMB_DN_D11
T24
B_IMB_DN_D12
U25
B_IMB_DN_D13
T27
B_IMB_DN_D14
T26
B_IMB_DN_D15
Y22
R_CSB_IMB_DN_D0
AA25
R_CSB_IMB_DN_D1
Y21
R_CSB_IMB_DN_D2
Y24
R_CSB_IMB_DN_D3 R_CSB_IMB_DN_CLK
R_CSB_IMB_DN_CON R_CSB_IMB_DN_PAR
U19
CMIC_T_IMBVREF
AF27AG25
GPE_CMIC_ALERT ENV_SEG4_25V_SDA
P18
CMIC_IMBVREF
AD24
CMIC_RSVD U9 W17
+2.5V
R148
1 2
4.7K R137
4.7K
27 27 28 28
27 29
27 29
27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27
29 29 29 29 29
X01 -- CHANGING TO 24.3 TO IMPROVE MARGIN ON GTL BUS --SWH 10/18
29 29 29 29 29 29 29 29 29 29 29
RN71
3 6
24 OHM-5%
RN71
2 7
24 OHM-5%
RN66
2 7
24 OHM-5%
13
12,18 12,21
13 12
GPE_CMIC_ALERT
21
GPE_CMIC_FATAL
RN71
24 OHM-5%
RN66
1 8
24 OHM-5%
SUB*_4282E SUB*_4282E SUB*_4282E
24 OHM-5%
54
RN71
1 8
24 OHM-5%
RN66
3 6
24 OHM-5%
SUB*_4282E SUB*_4282E
Sub to 33 Ohm
12,18
12,18,35
VCORE
RB105
1 2 100-1%
(SW RECOMMENDS 23.5 WITH 43.2 ON PROC)
RN66
4 5
SUB*_4282E
(OR 24.5 WITH 49.9 ON PROC)
SP_RN2093_5SP_RN2093_4
CSB_IMB_DN_D0 CSB_IMB_DN_D1 CSB_IMB_DN_D2 CSB_IMB_DN_D3
CSB_IMB_DN_CLK CSB_IMB_DN_CON CSB_IMB_DN_PAR
SUB*_4282E SUB*_4282E
RB104
21
249 Ohm-1%
SUB*_20JDN SUB TO 332 1% FOR CMIC 3.1
1X055 -- 24.3 OHMS 0603 1% 6W083 -- 23.7 OHMS 0603 1%
18 18 18 18
18 18 18
+2.5V
R143
21
249 Ohm-1%
RB103
1 2
20.5 Ohm-1%
SUB*_1X055 AC27
SUB TO 24.3
CMIC_DCOMP CMIC_GTL_COMP_PD
CMIC_GTL_COMP_PU CMIC_GTL_RCOMP
CMIC_AVDD
12
CMIC_AGND
12
CMIC_GTLVREF1
13
CMIC_GTLVREF2
13
CMIC_SRESET
12,47
MEMOFF_CSB
12,18
MEMOFFACK
12
CMIC_TESTMODE
12
12
12
U_CMIC
U_CMIC
VTT_1.2_B2 VTT_1.2_B8 VTT_1.2_B16 VTT_1.2_B17 VTT_1.2_B22 VTT_1.2_B24 VTT_1.2_C4 VTT_1.2_C5 VTT_1.2_C11 VTT_1.2_C12 VTT_1.2_C21 VTT_1.2_C23 VTT_1.2_D16 VTT_1.2_D17 VTT_1.2_D26
DCOMP GTL_COMP_PD
GTL_COMP_PU GTL_RCOMP
AVDD AGND
GTLVREF1 GTLVREF2
RESET & TEST
SRESET MEMOFF MEMOFFACK TESTMODE
HETERO 4 OF 6
21
RB78
1K-5%
10K-5%
22uF 10V
10V-10%
1 2
1 2
C216
1uF
VTT_1.2_E4 VTT_1.2_E5
VTT_1.2_E8 VTT_1.2_E11 VTT_1.2_F12 VTT_1.2_F16 VTT_1.2_F17
VTT_1.2_G4 VTT_1.2_G11 VTT_1.2_G12 VTT_1.2_G20 VTT_1.2_J10 VTT_1.2_J12 VTT_1.2_J14 VTT_1.2_J16 VTT_1.2_J18
DLYRESET
WARMRST
L40
47uH 135MA
C217
R147
1 2
0-5%
ROOM=CMIC
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
A B
1
2
3
Page 13
B D
CA
VCORE
RB98
1 2
49.9-1%
CMIC_GTLVREF2
1
21
RB99
1 2
100-1%
CB202
1uF
CB201
10V-10%
21
0.1uF 16V
21
CB188
12
50V-20%
.01UF
0.1uF 16V
1 2
CB187
CB186
1 2
1000pF
50V-10%
50V-20%
.01UF
1 2
CB183
1 2
CB199
1000pF
50V-10%
VCORE
RB96
1 2
RB95
1 2
49.9-1%100-1%
CMIC_GTLVREF1
21
1uF
CB181
10V-10%
21
CB182
12
21
CB198
0.1uF 16V
0.1uF 16V
CMIC GTL REFERENCE VOLTAGE
ROOM=CMIC
+1.5V
21
RB93
100-1%
21
RB94
100-1%
1 2
CB166
1uF
10V-10%
21
CB164
2
.01UF
CB165
50V-20%
CMIC_IMBVREF
21
0.1uF 16V
12
+2.5V
RB86
1 2
RB85
1 2
100-1%
100-1%
21
CB133
1uF
10V-10%
CB129
1 2
.01UF
CB125
50V-20%
21
0.1uF 16V
ROOM=CMIC
CMIC_T_IMBVREF
21
21
CB128
CB126
0.1uF 16V
0.1uF 16V
12
+2.5V
4V-20%
820uF
+
SUB*_700DN
4.0V-20%
SUB*_700DN
C61
21
+2.5V
21
C204
0.1uF 16V
+1.5V
4.0V-20% 330uF
+
21
VCORE
330uF
C340
+
21
21
C232
CB136
1000pF
50V-10%
21
C202
C218
0.1uF 16V
C277
21
.1uF
CB161
SUB TO 330uF
SUB*_700DN
4V-20%
820uF
+
1 2
1000pF
50V-10%
21
0.1uF 16V
21
CB162
10V-10%
C304
21
21
C207
21
C203
.1uF
10V-10%
21
C269
1 2
CB130
1000pF
50V-10%
21
C237
0.1uF 16V
21
.1uF
CB160
10V-10%
21
.1uF
CB200
1000pF
50V-10%
C201
1000pF
50V-10%
C205
0.1uF 16V
21
C243
0.1uF 16V
C268
1 2
10V-10%
1 2
0.1uF 16V
21
0.1uF 16V
21
C236
1uF
10V-10%
1 2
1 2
C200
CB131
0.1uF 16V
21
.1uF
CB17521CB176
10V-10%
21
C249
CB163
0.1uF 16V
0.1uF 16V
21
21
1uF
C265
C254
10V-10%
1 2
CB132
0.1uF 16V
21
.1uF
CB147
10V-10%
21
CB185
0.1uF 16V
C264
1 2
0.1uF 16V
1 2
CB134
0.1uF 16V
21
CB156
0.1uF 16V
21
0.1uF 16V
21
C266
0.1uF 16V
0.1uF 16V
1 2
CB135
0.1uF 16V
21
CB153
0.1uF 16V
0.1uF 16V
CB217
1 2
0.1uF 16V
CB15821CB177
0.1uF 16V
21
CB149
0.1uF 16V
CB210
1 2
0.1uF 16V
21
.1uF
CB145
1 2
CB220
10V-10%
21
0.1uF 16V
1 2
C267
0.1uF 16V
.1uF
CB174
10V-10%
21
CB137
0.1uF 16V
1 2
CB218
0.1uF 16V
1 2
CB155
0.1uF 16V
CB219
0.1uF 16V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
C263
1 2
C351
0.1uF 16V
1
2
0.1uF 16V
CMIC IMB REFERENCE VOLTAGE
+2.5V
21
0.1uF 16V
21
C100
+2.5V
ROOM=DIMM_VREF
R52
100-1%
NP*
1 2
R77
1 2
0.1uF 16V
NP*
C96
100-1%
21
1uF
10V-10%
SSTLREF_D1
14,15
21
CB18421CB159
.1uF
10V-10%
.1uF
10V-10%
ROOM=CMIC
21
CB146
.1uF
10V-10%
21
CB151
VCORE
.1uF
10V-10%
21
CB154
.1uF
10V-10%
21
CB157
.1uF
10V-10%
R58
VTT_SSTL_1
16
VTT_SSTL_2
16
X01 -- CHANGED DIMM VREF TO TRACK DDR VTT
1 2 100-1%
R60
1 2 100-1%
C86
50V-20%
.01UF
1 2
.1uF
10V-10%
C333
CB319
3
DIMM DDR REFERENCE VOLTAGE
21
CB205
1 2
1000pF
50V-10%
21
CB216
.1uF
10V-10%
3
ROOM=CMIC
CMIC DECOUPLING CAPS
4
COMPUTER CORPORATION
AUSTIN,TEXAS
REV.
SHEET
13 OF 51
A00-00
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
EVERGLADES 13 6-9-2003_13:55
DC
4
Page 14
B D
+2.5V
21
C79
1 2
C305
+80%-20%
22uF 10V
22uF 10V
1
C80
1 2
C289
+80%-20%
22uF 10V
21
22uF 10V
C179
+80%-20%
1 2
0.1uF 16V
C221
C280
C273
C239
C122
C191
C296
C150
C256
.01UF
.01UF
.01UF
.01UF
.01UF
.01UF
.01UF
.01UF
1 2
1 2
50V-20%
50V-20%
1 2
1 2
50V-20%
50V-20%
1 2
1 2
50V-20%
50V-20%
1 2
1 2
50V-20%
1 2
50V-20%
.01UF
50V-20%
C118
1 2
+80%-20%
C131
.01UF
50V-20%
.01UF
1 2
C137
1 2
50V-20%
C147
.01UF
50V-20%
1 2
C173
.01UF
50V-20%
CA
+2.5V
C292
C187
.01UF
.01UF
1 2
1 2
50V-20%
1 2
50V-20%
C198
.01UF
50V-20%
.01UF
1 2
C228
1 2
50V-20%
C245
.01UF
50V-20%
.01UF
1 2
C258
1 2
50V-20%
C271
.01UF
50V-20%
.01UF
1 2
50V-20%
C276
C286
.01UF
.01UF
1 2
1 2
50V-20%
50V-20%
Put one 22 uF cap at each end of DIMM
Put one 22 uF cap at each end of DIMM
DIMM_1A
SUB*_726NT
X ADDR/CTRL
A DATA
CS0/2
D0 D1 D2 D3
DQS0
DM0_DQS9
D4 D5 D6 D7 D8
D9 D10 D11
DQS1
DM1_DQS10
D12 D13 D14 D15 D16 D17 D18 D19
DQS2
DM2_DQS11
D20 D21 D22 D23 D24 D25 D26 D27
DQS3
DM3_DQS12
D28 D29 D30 D31 D32 D33 D34 D35
DQS4
DM4_DQS13
D36 D37 D38 D39 D40 D41 D42 D43
DQS5
DM5_DQS14
D44 D45 D46 D47 D48 D49 D50 D51
DQS6
DM6_DQS15
D52 D53 D54 D55 D56 D57 D58 D59
DQS7
DM7_DQS16
D60 D61 D62 D63
ECC0 ECC1 ECC2 ECC3 DQS8
DM8_DQS17
ECC4 ECC5 ECC6 ECC7
11,14 11,14
CK_133M_DDR0_P CK_133M_DDR0_N
X_CKE
NC_FETEN_DDR0
SSTLREF_D1
NC_VDDID_DDR0
ASCLK_2P5V ASDATA_2P5V
PU_WP_DDR
NC_NC1_DDR0 NC_NC2_DDR0 DDR_RESET NC_NC4_DDR0 NC_NC5_DDR0 NC_CS3_DDR0
NC_CS2_DDR0 NC_CLK2_N_DDR0 NC_CLK2_P_DDR0 NC_CLK1_N_DDR0 NC_CLK1_P_DDR0 NC_BA2_DDR0 NC_A13_DDR0
+2.5V
+2.5V
1
C87
2
0.1uF 16V
X_MA0 X_MA1 X_MA2 X_MA3 X_MA4 X_MA5 X_MA6 X_MA7 X_MA8 X_MA9 X_MA10 X_MA11 X_MA12
X_MA13 X_MA14
MCS0 MCS2
X_MRAS X_MCAS X_MWE
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16
220
11,14,16 11,14,16 11,14,16
5 5
11,14,16
13,14,15
5,14,15,21 5,14,15,21
14,15
14,15,47
2
+2.5V
21
R259
21
220
R250
3
13,14,15
4 4
SSTLREF_D1
1
CB20
2
0.1uF 16V
48
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS
158
CS1
154
RAS
65
CAS
63
WE
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
102
NC1
101
NC2
10
RESET
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
76
CLK2_N_DU
75
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD1
148
VDD2
120
VDD3
108
VDD4
85
VDD5
70
VDD6
46
VDD7
38
VDD8
7
VDD10
136
VDDQ1
180
VDDQ2
156
VDDQ3
112
VDDQ4
164
VDDQ5
143
VDDQ6
128
VDDQ7
104
VDDQ8
96
VDDQ9
172
VDDQ10
77
VDDQ11
62
VDDQ12
54
VDDQ13
30
VDDQ14
22
VDDQ15
15
VDDQ16
2 4 6 8 5 97 94 95 98 99 12 13 19 20 14 107 105 106 109 110 23 24 28 31 25 119 114 117 121 123 33 35 39 40 36 129 126 127 131 133 53 55 57 60 56 149 146 147 150 151 61 64 68 69 67 159 153 155 161 162 72 73 79 80 78 169 165 166 170 171 83 84 87 88 86 177 174 175 178 179 44 45 49 51 47 140 134 135 142 144
A_SD0_0 A_SD0_1 A_SD0_2 A_SD0_3 A_DQS0_0 A_DQS0_1 A_SD0_4 A_SD0_5 A_SD0_6 A_SD0_7 A_SD1_0 A_SD1_1 A_SD1_2 A_SD1_3 A_DQS1_0 A_DQS1_1 A_SD1_4 A_SD1_5 A_SD1_6 A_SD1_7 A_SD2_0 A_SD2_1 A_SD2_2 A_SD2_3 A_DQS2_0 A_DQS2_1 A_SD2_4 A_SD2_5 A_SD2_6 A_SD2_7
A_SD3_0 A_SD3_1 A_SD3_2 A_SD3_3 A_DQS3_0 A_DQS3_1 A_SD3_4 A_SD3_5 A_SD3_6 A_SD3_7 A_SD4_0 A_SD4_1 A_SD4_2 A_SD4_3 A_DQS4_0 A_DQS4_1 A_SD4_4 A_SD4_5 A_SD4_6 A_SD4_7 A_SD5_0 A_SD5_1 A_SD5_2 A_SD5_3 A_DQS5_0 A_DQS5_1 A_SD5_4 A_SD5_5 A_SD5_6 A_SD5_7 A_SD6_0 A_SD6_1 A_SD6_2 A_SD6_3 A_DQS6_0 A_DQS6_1 A_SD6_4 A_SD6_5 A_SD6_6 A_SD6_7 A_SD7_0 A_SD7_1 A_SD7_2 A_SD7_3 A_DQS7_0
A_DQS7_1 A_SD7_4 A_SD7_5 A_SD7_6 A_SD7_7 A_SD8_0 A_SD8_1 A_SD8_2 A_SD8_3 A_DQS8_0 A_DQS8_1 A_SD8_4 A_SD8_5 A_SD8_6 A_SD8_7
11,15,16 11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16
11,15,16
11,15,16
11,15,16
11,15,16 11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16
11,15,16
11,15,16
11,15,16
11,15,16 11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16
11,15,16
11,15,16
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16
11,15,16
11,15,16
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16
11,15,16
11,15,16
11,15,16
11,15,16 11,15,16
11,15,16 11,15,16
11,15,16 11,15,16
11,15,16 11,15,16
11,15,16 11,15,16
11,15,16 11,15,16
11,15,16 11,15,16
11,15,16
11,15,16
11,15,16 11,15,16
+2.5V
R249
1 2
ROOM=DIMM_2A
R248
1 2
4.7K
220
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16
11,14,16 11,14,16 11,14,16
5 5
11,14,16
13,14,15
5,14,15,21 5,14,15,21
14,15
14,15,47
11,14 11,14
CK_133M_DDR1_P CK_133M_DDR1_N
X_CKE
NC_VDDID_DDR1
ASCLK_2P5V ASDATA_2P5V
PU_WP_DDR
NC_NC1_DDR1 NC_NC2_DDR1 DDR_RESET NC_NC4_DDR1 NC_NC5_DDR1 NC_CS3_DDR1
NC_CS2_DDR1 NC_CLK2_N_DDR1 NC_CLK2_P_DDR1 NC_CLK1_N_DDR1 NC_CLK1_P_DDR1 NC_BA2_DDR1 NC_A13_DDR1
+2.5V
+2.5V
X_MA0 X_MA1 X_MA2 X_MA3 X_MA4 X_MA5 X_MA6 X_MA7 X_MA8 X_MA9 X_MA10 X_MA11 X_MA12
X_MA13 X_MA14
MCS0 MCS2
X_MRAS X_MCAS X_MWE
NC_FETEN_DDR1
SSTLREF_D1
48
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS
158
CS1
154
RAS
65
CAS
63
WE
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
102
NC1
101
NC2
10
RESET
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
76
CLK2_N_DU
75
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD1
148
VDD2
120
VDD3
108
VDD4
85
VDD5
70
VDD6
46
VDD7
38
VDD8
7
VDD10
136
VDDQ1
180
VDDQ2
156
VDDQ3
112
VDDQ4
164
VDDQ5
143
VDDQ6
128
VDDQ7
104
VDDQ8
96
VDDQ9
172
VDDQ10
77
VDDQ11
62
VDDQ12
54
VDDQ13
30
VDDQ14
22
VDDQ15
15
VDDQ16
ROOM=DIMM_1A
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
A B
DIMM_1B
SUB*_726NT
X ADDR/CTRL
B DATA
CS0/2
D0 D1 D2 D3
DQS0
DM0_DQS9
D4 D5 D6 D7 D8
D9 D10 D11
DQS1
DM1_DQS10
D12 D13 D14 D15 D16 D17 D18 D19
DQS2
DM2_DQS11
D20 D21 D22 D23 D24 D25 D26 D27
DQS3
DM3_DQS12
D28 D29 D30 D31 D32 D33 D34 D35
DQS4
DM4_DQS13
D36 D37 D38 D39 D40 D41 D42 D43
DQS5
DM5_DQS14
D44 D45 D46 D47 D48 D49 D50 D51
DQS6
DM6_DQS15
D52 D53 D54 D55 D56 D57 D58 D59
DQS7
DM7_DQS16
D60 D61 D62 D63
ECC0 ECC1 ECC2 ECC3 DQS8
DM8_DQS17
ECC4 ECC5 ECC6 ECC7
2 4 6 8 5 97 94 95 98 99 12 13 19 20 14 107 105 106 109 110 23 24 28 31 25 119 114 117 121 123 33 35 39 40 36 129 126 127 131 133 53 55 57 60 56 149 146 147 150 151 61 64 68 69 67 159 153 155 161 162 72 73 79 80 78 169 165 166 170 171 83 84 87 88 86 177 174 175 178 179 44 45 49 51 47 140 134 135 142 144
B_SD0_0 B_SD0_1 B_SD0_2 B_SD0_3 B_DQS0_0 B_DQS0_1 B_SD0_4 B_SD0_5 B_SD0_6 B_SD0_7 B_SD1_0 B_SD1_1 B_SD1_2 B_SD1_3 B_DQS1_0 B_DQS1_1 B_SD1_4 B_SD1_5 B_SD1_6 B_SD1_7 B_SD2_0 B_SD2_1 B_SD2_2 B_SD2_3 B_DQS2_0 B_DQS2_1 B_SD2_4 B_SD2_5 B_SD2_6 B_SD2_7
B_SD3_0 B_SD3_1 B_SD3_2 B_SD3_3 B_DQS3_0 B_DQS3_1 B_SD3_4 B_SD3_5 B_SD3_6 B_SD3_7 B_SD4_0 B_SD4_1 B_SD4_2 B_SD4_3 B_DQS4_0 B_DQS4_1 B_SD4_4 B_SD4_5 B_SD4_6 B_SD4_7 B_SD5_0 B_SD5_1 B_SD5_2 B_SD5_3 B_DQS5_0 B_DQS5_1 B_SD5_4 B_SD5_5 B_SD5_6 B_SD5_7 B_SD6_0 B_SD6_1 B_SD6_2 B_SD6_3 B_DQS6_0 B_DQS6_1 B_SD6_4 B_SD6_5 B_SD6_6 B_SD6_7 B_SD7_0 B_SD7_1 B_SD7_2 B_SD7_3 B_DQS7_0
B_DQS7_1 B_SD7_4 B_SD7_5 B_SD7_6 B_SD7_7 B_SD8_0 B_SD8_1 B_SD8_2 B_SD8_3 B_DQS8_0 B_DQS8_1 B_SD8_4 B_SD8_5 B_SD8_6 B_SD8_7
11,15,16 11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16
11,15,16
11,15,16
11,15,16
11,15,16 11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16
11,15,16
11,15,16
11,15,16
11,15,16 11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16
11,15,16
11,15,16
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16
11,15,16
11,15,16
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16
11,15,16
11,15,16
11,15,16
11,15,16 11,15,16
11,15,16 11,15,16
11,15,16 11,15,16
11,15,16 11,15,16
11,15,16 11,15,16
11,15,16 11,15,16
11,15,16 11,15,16
11,15,16
11,15,16
11,15,16 11,15,16
TITLE
DWG NO.
DATE
DC
SSTLREF_D1
13,14,15
2
1
C97
0.1uF 16V
COMPUTER CORPORATION AUSTIN,TEXAS
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
X1004
6/6/2003
SHEET
14 OF 51
REV.
6-9-2003_13:5514EVERGLADES
1
C99
2
0.1uF 16V
A00-00
1
2
3
Page 15
B D
CA
+2.5V
+2.5V
1
1 2
C315
+80%-20%
22uF 10V
2
3
4 4
21
21
C24421C22721C19721C18621C17221C16021C14621C13621C28521C11721C27521C130
C78
+80%-20%
22uF 10V
.01UF
50V-20%
.01UF
50V-20%
.01UF
50V-20%
.01UF
50V-20%
.01UF
50V-20%
.01UF
50V-20%
.01UF
50V-20%
.01UF
50V-20%
.01UF
50V-20%
Put one 22 uF cap at each end of DIMM
DIMM_2A
SUB*_726NT
Y ADDR/CTRL
A DATA
CS1/3
R246
1 2
220
+2.5V
R247
1 2
4.7K
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16 11,15,16
11,15
11,15 11,15,16 11,15,16 11,15,16
5 5
11,15,16
13,14,15
5,14,15,21 5,14,15,21
14,15
14,15,47
Y_MA0 Y_MA1 Y_MA2 Y_MA3 Y_MA4 Y_MA5 Y_MA6 Y_MA7 Y_MA8 Y_MA9 Y_MA10 Y_MA11 Y_MA12
Y_MA13 Y_MA14
MCS1 MCS3
Y_MRAS Y_MCAS Y_MWE
CK_133M_DDR2_P CK_133M_DDR2_N
Y_CKE
NC_FETEN_DDR2
SSTLREF_D1
NC_VDDID_DDR2
ASCLK_2P5V ASDATA_2P5V
PU_WP_DDR
NC_NC1_DDR2 NC_NC2_DDR2 DDR_RESET NC_NC4_DDR2 NC_NC5_DDR2 NC_CS3_DDR2
NC_CS2_DDR2 NC_CLK2_N_DDR2 NC_CLK2_P_DDR2 NC_CLK1_N_DDR2 NC_CLK1_P_DDR2 NC_BA2_DDR2 NC_A13_DDR2
+2.5V
+2.5V
48
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS
158
CS1
154
RAS
65
CAS
63
WE
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
102
NC1
101
NC2
10
RESET
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
76
CLK2_N_DU
75
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD1
148
VDD2
120
VDD3
108
VDD4
85
VDD5
70
VDD6
46
VDD7
38
VDD8
7
VDD10
136
VDDQ1
180
VDDQ2
156
VDDQ3
112
VDDQ4
164
VDDQ5
143
VDDQ6
128
VDDQ7
104
VDDQ8
96
VDDQ9
172
VDDQ10
77
VDDQ11
62
VDDQ12
54
VDDQ13
30
VDDQ14
22
VDDQ15
15
VDDQ16
.01UF
50V-20%
.01UF
50V-20%
DM0_DQS9
DM1_DQS10
DM2_DQS11
DM3_DQS12
DM4_DQS13
DM5_DQS14
DM6_DQS15
DM7_DQS16
DM8_DQS17
C27021C257
.01UF
50V-20%
DQS0
D10 D11
DQS1
D12 D13 D14 D15 D16 D17 D18 D19
DQS2
D20 D21 D22 D23 D24 D25 D26 D27
DQS3
D28 D29 D30 D31 D32 D33 D34 D35
DQS4
D36 D37 D38 D39 D40 D41 D42 D43
DQS5
D44 D45 D46 D47 D48 D49 D50 D51
DQS6
D52 D53 D54 D55 D56 D57 D58 D59
DQS7
D60 D61 D62
D63 ECC0 ECC1 ECC2 ECC3 DQS8
ECC4 ECC5 ECC6 ECC7
21
.01UF
.01UF
50V-20%
D0 D1 D2 D3
D4 D5 D6 D7 D8 D9
50V-20%
2 4 6 8 5 97 94 95 98 99 12 13 19 20 14 107 105 106 109 110 23 24 28 31 25 119 114 117 121 123 33 35 39 40 36 129 126 127 131 133 53 55 57 60 56 149 146 147 150 151 61 64 68 69 67 159 153 155 161 162 72 73 79 80 78 169 165 166 170 171 83 84 87 88 86 177 174 175 178 179 44 45 49 51 47 140 134 135 142 144
A_SD0_0 A_SD0_1 A_SD0_2 A_SD0_3 A_DQS0_0 A_DQS0_1 A_SD0_4 A_SD0_5 A_SD0_6 A_SD0_7 A_SD1_0 A_SD1_1 A_SD1_2 A_SD1_3 A_DQS1_0 A_DQS1_1 A_SD1_4 A_SD1_5 A_SD1_6 A_SD1_7 A_SD2_0 A_SD2_1 A_SD2_2 A_SD2_3 A_DQS2_0 A_DQS2_1 A_SD2_4 A_SD2_5 A_SD2_6 A_SD2_7
A_SD3_0 A_SD3_1 A_SD3_2 A_SD3_3 A_DQS3_0 A_DQS3_1 A_SD3_4 A_SD3_5 A_SD3_6 A_SD3_7 A_SD4_0 A_SD4_1 A_SD4_2 A_SD4_3 A_DQS4_0 A_DQS4_1 A_SD4_4 A_SD4_5 A_SD4_6 A_SD4_7 A_SD5_0 A_SD5_1 A_SD5_2 A_SD5_3 A_DQS5_0 A_DQS5_1 A_SD5_4 A_SD5_5 A_SD5_6 A_SD5_7 A_SD6_0 A_SD6_1 A_SD6_2 A_SD6_3 A_DQS6_0 A_DQS6_1 A_SD6_4 A_SD6_5 A_SD6_6 A_SD6_7 A_SD7_0 A_SD7_1 A_SD7_2 A_SD7_3 A_DQS7_0
A_DQS7_1 A_SD7_4 A_SD7_5 A_SD7_6 A_SD7_7 A_SD8_0 A_SD8_1 A_SD8_2 A_SD8_3 A_DQS8_0 A_DQS8_1 A_SD8_4 A_SD8_5 A_SD8_6 A_SD8_7
13,14,15
11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16
11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16
11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16
11,14,16
11,14,16
SSTLREF_D1
11,14,16 11,14,16
11,14,16 11,14,16
11,14,16 11,14,16
11,14,16 11,14,16
11,14,16 11,14,16
11,14,16 11,14,16
11,14,16 11,14,16
11,14,16
11,14,16
11,14,16 11,14,16
C93
2
1
1
C88
2
0.1uF 16V
0.1uF 16V
ROOM=DIMM_2B
ROOM=DIMM_1B
A B
C77
1 2
22uF 10V
21
C309
+80%-20%
C98
C238
+80%-20%
22uF 10V
C162
C139
C171
C126
C255
C219
.01UF
.01UF
.01UF
.01UF
.01UF
1 2
1 2
1 2
1 2
1 2
50V-20%
50V-20%
50V-20%
50V-20%
50V-20%
C149
.01UF
.01UF
.01UF
1 2
50V-20%
1 2
50V-20%
1 2
1 2
50V-20%
C208
.01UF
50V-20%
.01UF
1 2
50V-20%
Put one 22 uF cap at each end of DIMM
DIMM_2B
SUB*_726NT
Y ADDR/CTRL
B DATA
CS1/3
11,15 11,15
CK_133M_DDR3_P CK_133M_DDR3_N
Y_CKE
NC_FETEN_DDR3
SSTLREF_D1
NC_VDDID_DDR3
ASCLK_2P5V ASDATA_2P5V
PU_WP_DDR
NC_NC1_DDR3 NC_NC2_DDR3 DDR_RESET NC_NC4_DDR3 NC_NC5_DDR3 NC_CS3_DDR3
NC_CS2_DDR3 NC_CLK2_N_DDR3 NC_CLK2_P_DDR3 NC_CLK1_N_DDR3 NC_CLK1_P_DDR3 NC_BA2_DDR3 NC_A13_DDR3
+2.5V
+2.5V
Y_MA0 Y_MA1 Y_MA2 Y_MA3 Y_MA4 Y_MA5 Y_MA6 Y_MA7 Y_MA8 Y_MA9 Y_MA10 Y_MA11 Y_MA12
Y_MA13 Y_MA14
MCS1 MCS3
Y_MRAS Y_MCAS Y_MWE
11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16 11,15,16
11,15,16 11,15,16
11,15,16 11,15,16 11,15,16
5 5
11,15,16
+2.5V
R245
1 2
4.7K
220
R253
1 2
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
13,14,15
5,14,15,21 5,14,15,21
14,15
14,15,47
48
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10
118
A11
115
A12
59
BA0
52
BA1
157
CS
158
CS1
154
RAS
65
CAS
63
WE
137
CLK0_P
138
CLK0_N
21
CLKE0
111
CLKE1
167
FETEN
1
VREF
184
VDDSPD
82
VDDID
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
90
WP
102
NC1
101
NC2
10
RESET
9
NC4
173
NC5
163
CS3_NU
71
CS2_NU
76
CLK2_N_DU
75
CLK2_P_DU
17
CLK1_N_DU
16
CLK1_P_DU
113
BA2_NU
103
A13_NU
168
VDD1
148
VDD2
120
VDD3
108
VDD4
85
VDD5
70
VDD6
46
VDD7
38
VDD8
7
VDD10
136
VDDQ1
180
VDDQ2
156
VDDQ3
112
VDDQ4
164
VDDQ5
143
VDDQ6
128
VDDQ7
104
VDDQ8
96
VDDQ9
172
VDDQ10
77
VDDQ11
62
VDDQ12
54
VDDQ13
30
VDDQ14
22
VDDQ15
15
VDDQ16
C178
C288
.01UF
1 2
50V-20%
DM0_DQS9
DM1_DQS10
DM2_DQS11
DM3_DQS12
DM4_DQS13
DM5_DQS14
DM6_DQS15
DM7_DQS16
DM8_DQS17
1 2
D0 D1 D2 D3
DQS0
D4 D5 D6 D7 D8
D9 D10 D11
DQS1
D12 D13 D14 D15 D16 D17 D18 D19
DQS2
D20 D21 D22 D23 D24 D25 D26 D27
DQS3
D28 D29 D30 D31 D32 D33 D34 D35
DQS4
D36 D37 D38 D39 D40 D41 D42 D43
DQS5
D44 D45 D46 D47 D48 D49 D50 D51
DQS6
D52 D53 D54 D55 D56 D57 D58 D59
DQS7
D60 D61 D62 D63
ECC0 ECC1 ECC2 ECC3 DQS8
ECC4 ECC5 ECC6 ECC7
.01UF
50V-20%
C190
2 4 6 8 5 97 94 95 98 99 12 13 19 20 14 107 105 106 109 110 23 24 28 31 25 119 114 117 121 123 33 35 39 40 36 129 126 127 131 133 53 55 57 60 56 149 146 147 150 151 61 64 68 69 67 159 153 155 161 162 72 73 79 80 78 169 165 166 170 171 83 84 87 88 86 177 174 175 178 179 44 45 49 51 47 140 134 135 142 144
C195
.01UF
.01UF
1 2
1 2
50V-20%
50V-20%
SSTLREF_D1
13,14,15
2
1
B_SD0_0 B_SD0_1 B_SD0_2 B_SD0_3 B_DQS0_0 B_DQS0_1 B_SD0_4 B_SD0_5 B_SD0_6 B_SD0_7 B_SD1_0 B_SD1_1 B_SD1_2 B_SD1_3 B_DQS1_0 B_DQS1_1 B_SD1_4 B_SD1_5 B_SD1_6 B_SD1_7 B_SD2_0 B_SD2_1 B_SD2_2 B_SD2_3 B_DQS2_0 B_DQS2_1 B_SD2_4 B_SD2_5 B_SD2_6 B_SD2_7 B_SD3_0 B_SD3_1 B_SD3_2 B_SD3_3 B_DQS3_0 B_DQS3_1 B_SD3_4 B_SD3_5 B_SD3_6 B_SD3_7 B_SD4_0 B_SD4_1 B_SD4_2 B_SD4_3 B_DQS4_0 B_DQS4_1 B_SD4_4 B_SD4_5 B_SD4_6 B_SD4_7 B_SD5_0 B_SD5_1 B_SD5_2 B_SD5_3 B_DQS5_0 B_DQS5_1 B_SD5_4 B_SD5_5 B_SD5_6 B_SD5_7 B_SD6_0 B_SD6_1 B_SD6_2 B_SD6_3 B_DQS6_0 B_DQS6_1 B_SD6_4 B_SD6_5 B_SD6_6 B_SD6_7 B_SD7_0 B_SD7_1 B_SD7_2 B_SD7_3 B_DQS7_0 B_DQS7_1 B_SD7_4 B_SD7_5 B_SD7_6 B_SD7_7 B_SD8_0 B_SD8_1 B_SD8_2 B_SD8_3 B_DQS8_0 B_DQS8_1 B_SD8_4 B_SD8_5 B_SD8_6 B_SD8_7
11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
11,14,16 11,14,16 11,14,16 11,14,16
11,14,16
11,14,16 11,14,16 11,14,16 11,14,16 11,14,16
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
EVERGLADES 15 6-9-2003_13:55
DC
AUSTIN,TEXAS
SHEET
1
C91
REV.
15 OF 51
C92
2
0.1uF 16V
0.1uF 16V
A00-00
1
2
3
Page 16
+2.5V
B D
+2.5V
CA
ROOM=DDRTERM1
0.1uF 16V
0.1uF 16V
22uF 10V
2 1
1 2
C65
C60
1
1 2 3 4 5 6 7 8
UTERM1
VDD_1 VDD_2
VTTFORCE_3 VSS_4 VSS_5
VTTFORCE_6 VDD_7 VSS_8
FAN1655MTF
R47
1.8K-1W-5%
SUB TO 2%
(5% P/N IS OBSOLETE)
NC_16
VRREFOUT
SHDN
VREFIN
VTTSENSE
NC_9
21
SUB_8M268
VDDQ
VSSQ
16 15 14 13 12 11 10 9
R18
1 2
0.1uF 16V 2 1
C34
8.2K-5%
0.1uF 16V
22uF 10V
2 1
C33
VTT_SSTL_1
4V-20%
820uF
1 2
1 2
C19
C47
+
13,16
22uF 10V
1 2
C327
2 1
CB269
1 2 3 4 5 6 7 8
UTERM2
VDD_1 VDD_2
VTTFORCE_3 VSS_4 VSS_5
VTTFORCE_6 VDD_7 VSS_8
FAN1655MTF
R274
1.8K-1W-5%
SUB TO 2%
(5% P/N IS OBSOLETE)
NC_16
VRREFOUT
SHDN
VREFIN
VTTSENSE
NC_9
21
SUB_8M268
VDDQ
VSSQ
16 15 14 13 12 11 10 9
DDR TERMINATOR +1.25V REGULATORS
X01 -- CHANGED 4 SIGNALS TO OTHER RAIL TO KEEP SOURCE SYNC GROUPS TOGETHER --SWH 10/14
VTT_SSTL_1
13,16
A_SD0_1
11,14,15
A_SD0_5
11,14,15
A_SD0_0
11,14,15
A_SD0_4
11,14,15
A_SD0_7
11,14,15
A_SD0_6
11,14,15
A_DQS0_0
11,14,15
A_DQS0_1
2
11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14
11,14
A_SD1_1 A_SD1_0 A_SD0_3 A_SD0_2
A_DQS1_1 A_DQS1_0 A_SD1_5 A_SD1_4
A_SD1_2 A_SD1_7 A_SD1_6 A_SD1_3
X_MA8
X_MA5
NC_RN6100_6
X_CKE
11,14
X_MA11
11,14
X_MA9
11,14
X_MA7
3
4 4
11,14
11,14
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14
11,14
11,14
11,14
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14
11,14
11,14
11,14
11,14,15 11,14,15 11,14,15 11,14,15
X_MA12
A_SD2_6 A_SD2_2 A_DQS2_1 A_DQS2_0
A_SD3_4 A_SD3_0 A_SD2_7 A_SD2_3
X_MA3
X_MA2
X_MA4
X_MA6
A_SD8_0 A_SD3_3 A_SD3_6 A_SD3_2
A_SD8_5 A_SD8_1 A_SD8_4 A_SD3_7
X_MA10
X_MA14
X_MA0
X_MA1
A_SD8_7 A_DQS8_0 A_SD8_6 A_DQS8_1
8
1
RN6
7
2
6
3
5
4
33
8
1
RN10
7
2
6
3
5
4
33
8
1
RN14
7
2
6
3
5
4
33
8
1
RN16
7
2
6
3
5
4
33
8
1
RN21
7
2
6
3
5
4
33
RN24
18
51 OHM-5%
RN24
27
51 OHM-5%
RN24
36
51 OHM-5%
RN24
45
51 OHM-5%
RN27
18
51 OHM-5%
RN27
27
51 OHM-5%
RN27
36
51 OHM-5%
RN27
45
51 OHM-5%
8
1
RN29
7
2
6
3
5
4
33 33
8
1
RN33
7
2
6
3
5
4
33
RN37
18
51 OHM-5%
RN37
27
51 OHM-5%
RN37
36
51 OHM-5%
RN37
45
51 OHM-5%
8
1
RN41
7
2
6
3
5
4
33
8
1
RN42
7
2
6
3
5
4
33
RN49
18
51 OHM-5%
RN49
27
51 OHM-5%
RN49
36
51 OHM-5%
RN49
45
51 OHM-5%
8
1
RN51
7
2
6
3
5
4
33
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
RNB2
33
RNB3
33
RNB5
33
RNB6
33
RNB8
33
RNB10
33
RNB12
33
RNB13
RNB15
33
RNB17
33
RNB19
33
RNB21
33
RNB23
33
RNB27
33
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
B_SD0_5 B_SD0_1 B_SD0_4 B_SD0_0
B_SD0_6 B_SD0_2 B_DQS0_1 B_DQS0_0
B_SD1_1 B_SD1_0 B_SD0_3 B_SD0_7
B_DQS1_1 B_SD1_5 B_DQS1_0 B_SD1_4
B_SD1_3 B_SD1_2 B_SD1_7 B_SD1_6
A_SD2_4 B_SD2_1 B_SD2_0 B_SD2_4
A_SD2_1 A_SD2_5 A_SD2_0 B_DQS2_0
B_SD2_6 B_SD2_2 B_DQS2_1 B_SD2_5
B_SD3_4 B_SD3_0 B_SD2_7 B_SD2_3
B_SD3_5 A_SD3_1 A_SD3_5 B_SD3_1
B_DQS3_1 B_DQS3_0 A_DQS3_0 A_DQS3_1
B_SD3_7 B_SD3_3 B_SD3_2 B_SD3_6
B_SD8_1 B_SD8_0 B_SD8_5 B_SD8_4
B_SD8_6 B_SD8_2 B_DQS8_1 B_DQS8_0
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
C10121C192
C166
C194
2 1
+80%-20%
.22uF 16V
C115
C123
2 1
+80%-20%
.22uF 16V
12
C138
C148
+80%-20%
.22uF 16V
CB60
CB49
2 1
+80%-20%
.22uF 16V
12
CB120
CB119
+80%-20%
.22uF 16V
12
CB5312CB37
+80%-20%
.22uF 16V
12
C18212C188
+80%-20%
.22uF 16V
1 2
22uF 10V
12
.22uF 16V
2 1
.22uF 16V
12
.22uF 16V
2 1
.22uF 16V
12
.22uF 16V
.22uF 16V
.22uF 16V
+80%-20%
+80%-20%
+80%-20%
+80%-20%
+80%-20%
+80%-20%
+80%-20%
+80%-20%
+80%-20%
22uF 10V
12
C163
CB124
2 1
+80%-20%
.22uF 16V
12
C132
C127
2 1
+80%-20%
.22uF 16V
C15412C158
2 1
+80%-20%
.22uF 16V
12
CB75
CB121
2 1
+80%-20%
.22uF 16V
CB10912CB102
2 1
+80%-20%
.22uF 16V
12
CB80
CB24
2 1
+80%-20%
.22uF 16V
12
12
C180
CB91
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
B_SD4_4 B_SD4_0 A_SD8_2 A_SD8_3
A_SD4_1 A_SD4_4 B_SD4_1 A_SD4_0
A_DQS4_1 A_SD4_2 A_DQS4_0 A_SD4_5
B_SD5_5 A_SD4_7 B_SD5_0 A_SD4_6
A_SD5_0 A_SD5_4 A_SD4_3 NC_RN6342.5
A_DQS5_1 A_DQS5_0 A_SD5_1 A_SD5_5
A_SD5_7 A_SD5_3 A_SD5_6 A_SD5_2
A_SD6_5 A_SD6_1 A_SD6_4 A_SD6_0
A_SD6_7 A_SD6_6 A_DQS6_0 A_DQS6_1
A_SD7_0 A_SD7_4 A_SD6_3 A_SD6_2
A_DQS7_1 A_DQS7_0 A_SD7_1 A_SD7_5
A_SD7_3 A_SD7_2 A_SD7_7 A_SD7_6
A B
13,16
VTT_SSTL_2
8
1
RN54
7
2
6
3
5
4
33
8
1
RN55
7
2
6
3
5
4
33
8
1
RN62
7
2
6
3
5
4
33
8
1
RN68
7
2
6
3
5
4
33
8 7 6 5
8 7 6 5
8 7 6 5
RNB35
33
RNB36
33
RNB38
33
RNB41
8
1
RN73
7
2
6
3
5
4
33
8
1
RN76
7
2
6
3
5
4
33
8
1
RN83
7
2
6
3
5
4
33
8
1
RN88
7
2
6
3
5
4
33
8
1
RN93
7
2
6
3
5
4
33
8
1
RN95
7
2
6
3
5
4
33
8
1
RN101
7
2
6
3
5
4
33
8
1
RN105
7
2
6
3
5
4
33
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
51 OHM-5%
RNB41
51 OHM-5%
RNB41
51 OHM-5%
RNB41
51 OHM-5%
8
RNB43
7 6 5
33
8
RNB45
7 6 5
33
8
RNB47
7 6 5
33
8
RNB49
7 6 5
33
8
RNB51
7 6 5
33
8
RNB53
7 6 5
33
8
RNB56
7 6 5
33
1 2 3 4
1 2 3 4
1 2 3 4
18
27
36
45
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
R264
1 2
8.2K-5%
0.1uF 16V 2 1
C319
NC_RN6273_1 NC_RN6273_2 B_SD8_7 B_SD8_3
B_DQS4_1 B_SD4_2 B_DQS4_0 B_SD4_5
B_SD5_4 B_SD4_3 B_SD4_7 B_SD4_6
X_MCAS
X_MWE
X_MRAS
X_MA13
B_DQS5_0 B_DQS5_1 B_SD5_1 NC_RN6289.4
B_SD5_7 B_SD5_3 B_SD5_6 B_SD5_2
B_SD6_5 B_SD6_1 B_SD6_4 B_SD6_0
B_DQS6_0 B_SD6_7 B_SD6_6 B_DQS6_1
B_SD7_5 B_SD7_4 B_SD6_3 B_SD6_2
B_SD7_6 B_DQS7_1 B_SD7_1 B_SD7_0
B_SD7_3 B_SD7_2 B_SD7_7 B_DQS7_0
ROOM=DDRTERM2
C322
4V-20%
820uF
+
VTT_SSTL_2
1 2
C344
R109
2 1
49.9-1% R105
2 1
49.9-1% R103
2 1
49.9-1% R130
2 1
49.9-1% R149
2 1
49.9-1% R140
2 1
49.9-1% R138
2 1
49.9-1% R110
49.9-1% R126
49.9-1% R127
49.9-1% R113
49.9-1% R177
49.9-1% R146
49.9-1% R150
49.9-1% R178
49.9-1% R200
49.9-1% R187
49.9-1% R180
49.9-1% R101
1 2
49.9-1%
0.1uF 16V
22uF 10V
2 1
C321
11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14
11,14
11,14
11,14
11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
11,14,15 11,14,15 11,14,15 11,14,15
1 2
13,16
21
1 2
C293
CB244
+80%-20%
22uF 10V
+80%-20%
22uF 10V
12
CB173
C274
2 1
12
CB231
CB180
2 1
12
C153
12
C250
12
C240
12
C262
+80%-20%
.22uF 16V
12
C284
+80%-20%
.22uF 16V
CB127
2 1
+80%-20%
.22uF 16V
12
C220
+80%-20%
.22uF 16V
C196
2 1
+80%-20%
.22uF 16V
CB24512CB204
2 1
+80%-20%
.22uF 16V
C25112C259
2 1
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
CB236
2 1
+80%-20%
.22uF 16V
CB148
2 1
+80%-20%
.22uF 16V
C233
2 1
+80%-20%
.22uF 16V
12
CB209
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
12
C222
+80%-20%
C278
2 1
12
CB227
C165
2 1
12
C185
CB152
2 1
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
+80%-20%
.22uF 16V
Y_MA9
Y_MA11
Y_MA12
Y_MA4
Y_MA1
Y_MA2
Y_MA3
Y_MA7
21
Y_MA6
21
Y_MA5
21
Y_MA8
21
Y_MA14
21
Y_MA10
21
Y_MA0
21
Y_MA13
21
Y_MCAS
21
Y_MWE
21
Y_MRAS
21
Y_CKE
11,15
11,15
11,15
11,15
11,15
11,15
11,15
11,15
11,15
11,15
11,15
11,15
11,15
11,15
11,15
11,15
11,15
11,15
11,15
12
C246
+80%-20%
.22uF 16V
12
C199
2 1
+80%-20%
.22uF 16V
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
EVERGLADES 16 6-9-2003_13:55
DC
CB215
2 1
+80%-20%
.22uF 16V
C209
C234
2 1
+80%-20%
.22uF 16V
.22uF 16V
COMPUTER CORPORATION AUSTIN,TEXAS
REV.
SHEET
16 OF 51
+80%-20%
A00-00
1
2
3
Page 17
B D
CA
1
USE SPARE GATE TO BUFFER IPMB SWITCH SIGNALS THROUGH OR GATE TO PREVENT SPIKES ON PWRGOOD SIGNAL-SC 2/3/03
22,39,51
21,35,39,42,47,51
2
VBAT
R448
1 2
R449
47K-5%
47K-5%
1 2
14
U60
8
10
9 74VHC02
ROOM=INTRUS
+3.3V_AUX
SYSTEM_PWRGOOD
14
U60
11
13
12
74VHC02
SUB RESISTOR TO 1k
14
U57
1
3
2 74VHC32
NC_U8_P10
NC_U8_P13
SUB*_22327
R556
4.7K
21
50V-5%
47pF
IPMB_CONNECT
SUB*_78020
C506
21
SUB CAP TO .01uf
37
ROOM=PWR_CONN
+3.3V_AUX
RB259
47K-5%
1 2
RB260
1 2
47K-5%
74VHC04
SUB*_1442V PKG_TYPE=TSSOP14
74VHC04
SUB*_1442V PKG_TYPE=TSSOP14
ROOM=FANLED
5146
9148
+3.3V_AUX
U40
U40
NC_U57057_P6
U40
131412
SUB*_1442V
74VHC04
PKG_TYPE=TSSOP14
NC_U57057_P8
U40
111410 74VHC04
SUB*_1442V PKG_TYPE=TSSOP14
1
NC_U57057_P12
NC_U57057_P10
2
SPARE GATES
3
4 4
COMPUTER CORPORATION AUSTIN,TEXAS
REV.
SHEET
17 OF 51
6-9-2003_13:5517EVERGLADES
A00-00
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
DC
3
Page 18
B D
+3.3V
ROOM=CSB
+3.3V
0.1uF 16V
0.1uF 16V
0.1uF 16V
CB441
CB481
1 2
1 2
1
+3.3V
1 2 3
F18 E19 D20 E18 G18 C20 E17 D18 C18 B19 A20 A19 B18 B17 C17 D16
C13 B13 A13 D12 C12 B12 B11 C11 A11 A10 B10 C10 D10
T4 V1 U2 T3 U1 T2 P4 T1 P3 R1 P2 P1 N3 N2 N1 M4 J2 J3 H1 H2 H3 G1 G2 G3 F2 G4 F3 E3 D1 C1 E4 D3
A9 C9 D9
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
DD_P0 DD_P1 DD_P2 DD_P3 DD_P4 DD_P5 DD_P6 DD_P7 DD_P8 DD_P9 DD_P10 DD_P11 DD_P12 DD_P13 DD_P14 DD_P15
DD_S0 DD_S1 DD_S2 DD_S3 DD_S4 DD_S5 DD_S6 DD_S7 DD_S8 DD_S9 DD_S10 DD_S11 DD_S12 DD_S13 DD_S14 DD_S15
PCI0_AD0
24,39
PCI0_AD1
24,39
PCI0_AD2
24,39
PCI0_AD3
24,39
2
3
24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39 24,39
RIDE_ESM_D0
20
RIDE_ESM_D1
20
RIDE_ESM_D2
20
RIDE_ESM_D3
20
RIDE_ESM_D4
20
RIDE_ESM_D5
20
RIDE_ESM_D6
20
RIDE_ESM_D7
20
RIDE_ESM_D8
20
RIDE_ESM_D9
20
RIDE_ESM_D10
20
RIDE_ESM_D11
20
RIDE_ESM_D12
20
RIDE_ESM_D13
20
RIDE_ESM_D14
20
RIDE_ESM_D15
20
RIDE_CD_D0
20
RIDE_CD_D1
20
RIDE_CD_D2
20
RIDE_CD_D3
20
RIDE_CD_D4
20
RIDE_CD_D5
20
RIDE_CD_D6
20
RIDE_CD_D7
20
RIDE_CD_D8
20
RIDE_CD_D9
20
RIDE_CD_D10
20
RIDE_CD_D11
20
RIDE_CD_D12
20
RIDE_CD_D13
20
RIDE_CD_D14
20
RIDE_CD_D15
20
PCI0_AD4 PCI0_AD5 PCI0_AD6 PCI0_AD7 PCI0_AD8 PCI0_AD9 PCI0_AD10 PCI0_AD11 PCI0_AD12 PCI0_AD13 PCI0_AD14 PCI0_AD15 PCI0_AD16 PCI0_AD17 PCI0_AD18 PCI0_AD19 PCI0_AD20 PCI0_AD21 PCI0_AD22 PCI0_AD23 PCI0_AD24 PCI0_AD25 PCI0_AD26 PCI0_AD27 PCI0_AD28 PCI0_AD29 PCI0_AD30 PCI0_AD31
7J188 IS CSB5 A2.1
4 4
THIS ABOVE SYMBOL IS REV 1.5 PINOUT PINOUT REV IS NOT THE SAME AS SILICON REV
REV 1.0 -- NEC UPD69725S1-011 REV 1.1 -- NEC UPD69725S1-012 REV 1.2 -- NEC UPD69725S1-013 REV 1.3 -- NEC UPD69725S1-014 REV 2.0 -- NEC UPD85625S1-011
+3.3V
CB484
1 2
RN145
8.2K
0.1uF 16V CB474
1 2
PCI0_REQ_CSB0
8
PCI0_REQ_CSB1
7
PCI0_REQ_CSB2
6
PCI0_REQ_CSB3
54
U48
P_GNT0/XARB_STRAP P_GNT1/XROM_STRAP
P_GNT2/IMB_STRAP
32 BIT PCI BUS
CB450
1 2
P_FRAME
P_DEVSEL
FLUSHREQ
PCILOCKL
P_IDECS00 P_IDECS01 P_IDE_IOR P_IDE_IOW
P_IDEDRQ
P_IORDY_IN
P_IDEDAK
CB449
1 2
18 18,24 18,39 18
P_CBE0 P_CBE1 P_CBE2 P_CBE3
P_REQ0 P_REQ1 P_REQ2
P_TRDY P_STOP
P_IRDY
P_PAR P_PERR P_SERR
PCIRST CPUGNT
CPUREQ
PCICLK
50V-20%
CB483
1 2
.01UF
R3
PCI0_CBE0
M2
PCI0_CBE1
J1
PCI0_CBE2
F1
PCI0_CBE3
W5
PCI0_REQ_CSB0
Y5
PCI0_REQ_CSB1
V6
PCI0_REQ_CSB2
V4
PCI0_GNT_CSB0
U5
PCI0_GNT_CSB1
Y3
PCI0_GNT_CSB2
L3
PCI0_TRDY
K3
PCI0_STOP
L4
PCI0_IRDY
M1
PCI0_FRAME
K1
PCI0_DEVSEL
J4
PCI0_PAR
L2
PCI0_PERR
L1
PCI0_SERR PCI0_RST_CSB5
Y6
CSB5_CPUGNT
U3 M3
CSB5_CPUREQ
V2
CSB_FLUSHREQ
PCI0_LOCK
C2
CK_33M_CSB5
V9
RIDE_ESM_CS0
H18
RIDE_ESM_CS1
F19
RIDE_ESM_IOR
E20
RIDE_ESM_IOW
G17
IDE_ESM_DREQ
A17
IDE_ESM_IORDY
A18
RIDE_ESM_DACK
D14
21
CB498
12 12 12 12
12 12 12
24,39 24,39 24,39 24,39
50V-20%
50V-20%
.01UF
.01UF
1 2
CB463
CSB_IMB_UP_D0 CSB_IMB_UP_D1 CSB_IMB_UP_D2 CSB_IMB_UP_D3
CSB_IMB_UP_CLK CSB_IMB_UP_CON CSB_IMB_UP_PAR
SP_RN2104_4
150-5%
RN12563RN12581RN125
54
18 18,24 18,39
18 18,19,24 18,39
19,24,39 19,24,39
19,24,39 19,24,39 19,24,39
24,39 18,19,39 18,19,39
47 18
18 18
19,39
5
20 20 20 20 20 20 20
21
150-5%
CB482
150-5%
72
81
150-5%
RN126
72
150-5%
RN126
63
150-5%
RN125
150-5%
SERIES TERM BECAUSE CPLD IS FAR AWAY
X_WR
47
1 2
NP
RB257
R403
0-5%
18,22
18,22
SIO_SCI_OUT
SIO_SCI_OUT
KB_GATE_A20
22
0.1uF 16V
0.1uF 16V
0.1uF 16V
P_IDE
RIDE_CD_CS0
S_IDEDRQ
S_IDEDAK
IDE_DA0 IDE_DA1 IDE_DA2
B8 C8 B14 A14 C14 A8 B15
G20 G19 F20
RIDE_CD_CS1 RIDE_CD_IOR RIDE_CD_IOW IDE_CD_DREQ IDE_CD_IORDY RIDE_CD_DACK
R_IDE_DA0 R_IDE_DA1 R_IDE_DA2
RN129
1 8
33-5%
RN129
3 6
33-5%
RB255 33-5%
RN129
21
20 20 20 20 20 20 20
33-5%
RB256 33-5%
RB254 33-5%
72
21
21
RN129
33-5%
IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_SDA0
IDE_SDA1
IDE_SDA2
NC_RN7076_5NC_RN7076_44 5
22,35
39
39
39
42
42
42
GPE_ESM_IRQ15
+2.5V
S_IDECS00 S_IDECS01 S_IDE_IOR S_IDE_IOW
S_IORDY_IN
S_IDE
SERVERWORKS CSB5 REV1.5
HETERO 1 OF 2
SUB*_7J188
A B
NC_RN2100_7 NC_RN2100_8
150-5%
RN126
RN127
2 7
56-5% RN127
3 6
56-5%
RN126
56-5% RN127
4 5
56-5%
RN128
1 8
56-5%
RN127
1 8
54
RB292
1 2
22-5% +3.3V
4.7K
R353
NP
21
21
0-5%
220
21
RB291
NP*
4.7K
R352
21
RB250
1 2
0-5%
20 20
R418
1 2
0-5%
NP
R402
1 2
2-1%
L51
47uH 135MA
R420
21
12
0-5%
RN128
2 7
56-5% RN128
3 6
56-5% RN128
4 5
56-5%
+3.3V
4.7K
21
10,11,22
RB249
1 2
NP
22uF 6.3V
1 2
10,18
RB248
12,18
220
C438
0.1uF 16V
R_CSB_IMB_UP_D0 R_CSB_IMB_UP_D1 R_CSB_IMB_UP_D2 R_CSB_IMB_UP_D3
R_CSB_IMB_UP_CLK R_CSB_IMB_UP_CON R_CSB_IMB_UP_PAR
VREF_CSB_IMB
18
A20M_3V
10
CK_48M_USB
4
20 20 20 20 20 20 20 20
CSB_USB_EN
18
CSB_XALAT_0
19
CSB_XALAT_1
19
CSB_XALAT_2
19
CSB_FERR_3V
10
IGNNE_3V
10
CSB_SMI_OUT
10
NMI_3V CSB_STPCLK_3V
10
X_RD
21
X_WR_R INTR_3V
10
CSB_MEMACK
18
CSB_SLP_3V
10
CSB_SLP_BUTTON
18
CSB_SLP_S1
18
CSB_SLP_S3
22
CSB_SLP_S5
22
USB_OVRCUR
20
P_INIT
CK_14M_CSB
4
MEMOFF_CSB USB_PWREN
18
PIRQ_LTCH
19
SIO_SERIRQ
22
SER_PIRQ0_15
19
SER_PIRQ16_31
18
IDE_ESM_IRQ IDE_CD_IRQ
PLLRST_CSB
47
AVDD_CSB_PLL
AVSS_CSB_PLL
2 1
CB459
+3.3V
R_USBP0­R_USBP0+ R_USBP1­R_USBP1+ R_USBP2­R_USBP2+ R_USBP3­R_USBP3+
J17
O_DATA0
K19
O_DATA1
K17
O_DATA2
K18
O_DATA3
J18
O_CLOCK
H19
O_CONTROL
H20
O_PARITY
J20
IMB_VREF
A15
A20M
W12
USBCLK
Y15
USBP0N
W14
USBP0P
W15
USBP1N
V14
USBP1P
Y14
USBP2N
V13
USBP2P
W13
USBP3N
Y13
USBP3P
W17
USB_IN_EN
U7
XALAT0
Y7
XALAT1
Y11
XALAT2
V7
FERR
Y9
IGNNE
V16
SMI
Y10
NMI
U11
STPCLK/PMBUS
V11
XRC
Y12
XWC
P20
INTR
C19
SIO_WAKEUP
W6
MEMACK
B1
SLPX
D2
SLPBTTNX
R19
SLP_S1
B16
SLP_S3
R18
SLP_S5
V18
OVRCUR
C15
INIT
V8
EXTEVENT
W8
OSC
Y17
KBD_A20
Y18
MEM_OFF/APICCLK
W18
PWREN
C16
PIRQ_LATCH
A6
SERIRQ
C7
PIRQ0
B6
PIRQ1
B4
P_IDEIRQ
A3
S_IDEIRQ
B20
PLLRST
W10
AVDD
V10
AGND
A1
VDDIO_A1
A5
VDDIO_A5
A12
VDDIO_A12
A16
VDDIO_A16
E2
VDDIO_E2
B9
VDDIO_B9
D19
VDDIO_D19
J19
VDDIO_J19
K2
VDDIO_K2
N19
VDDIO_N19
R2
VDDIO_R2
W7
VDDIO_W7
W11
VDDIO_W11
W16
VDDIO_W16
W19
VDDIO_W19
SERVERWORKS CSB5 REV 1.5
HETERO 2 OF 2
RNB64
3 6
RNB64
4 5
8.2K-5%
RNB64
1 8
8.2K-5%
2 7
8.2K-5%
RNB65
8.2K-5%
RNB64
SPARE GPIO PULL-UPS
U48
IMB BUS
POWER
I_DATA0 I_DATA1 I_DATA2 I_DATA3
I_CLOCK
I_CONTROL
I_PARITY
GEVENT0 GEVENT1 GEVENT2 GEVENT3 GEVENT4 GEVENT5 GEVENT6 GEVENT7 GEVENT8
GEVENT9 GEVENT10 GEVENT11 GEVENT12 GEVENT13 GEVENT14 GEVENT15 GEVENT16 GEVENT17 GEVENT18
GEVENT19/APICD0 GEVENT20/APICD1
GEVENT21
GEVENT22/ROMCS
GEVENT23
GEVENT_X1/PGNT5 GEVENT_X2/PREQ5
XAD0 XAD1 XAD2 XAD3 XAD4 XAD5 XAD6 XAD7
LAD0 LAD1 LAD2
LAD3 LDRQ0 LDRQ1
LFRAME
GPOC0 GPOC1 GPOC2
SPKR
NC_A4 NC_B5 NC_C5 NC_C6 NC_D7
VDD25_D6 VDD25_D11 VDD25_D15
VDD25_F4 VDD25_F17
VDD25_K4 VDD25_L17
VDD25_R4
VDD25_U6 VDD25_U10 VDD25_U15 VDD25_R17
VDD5_E1 VDD5_V5
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
RNB65
3 6
4 5
8.2K-5%
L18 M20 M19 M18
L19 K20 L20
V3 W1 W2 W3 W4 Y4 Y1 Y2 Y19 V17 U16 V15 T20 T19 T18 U18 Y16 V12 U12 V19 W20 U14 Y20 U19
PCI0_GNT_CSB3
Y8
PCI0_REQ_CSB3
U9
A7
CSB_XAD0
B7
CSB_XAD1
D5
CSB_XAD2
C4
CSB_XAD3
B3
CSB_XAD4
B2
CSB_XAD5
A2
CSB_XAD6
C3
CSB_XAD7
P17 P19 R20 P18 N20 M17 N18
U20 V20 T17
CSB_SPKR
W9
A4
NC_CSB_A4
B5
NC_CSB_B5
C5
NC_CSB_C5 NC_CSB_C6
C6 D7
PU_CSB_D7
D6 D11 D15 F4 F17 K4 L17 R4 U6 U10 U15 R17
E1 V5
CA
8.2K-5% SP_GPE3
SP_GPE8 NC_PU_ABC NC_PU_DEF SP_GPE18 SP_GPE19
+3.3V
1 2
RB261
4.7K
LAD0 LAD1 LAD2 LAD3 LDRQ0 LDRQ1 LFRAME
CSB_SCL CSB_SDA NC_CSB_GPOC2
VCC
18 18
18 18
CSB_IMB_DN_D0 CSB_IMB_DN_D1 CSB_IMB_DN_D2 CSB_IMB_DN_D3
CSB_IMB_DN_CLK CSB_IMB_DN_CON CSB_IMB_DN_PAR
GPE_ESM2SCI GPE_CMIC_FATAL GPE_CMIC_ALERT SP_GPE3 GPE_CIOB1_ALERT GPE_CIOB2_ALERT GPE_IERR0 GPE_IERR1 SP_GPE8 PCI0_PERR PCI0_SERR PD_GEVENT11 GPE_ESM2SMI GPE_MCERR GPE_SOFT_NMI_SMI_SCI1 GPE_NMI_BUTTON H0_CPU_TYPE H1_CPU_TYPE SP_GPE18 SP_GPE19 GPE_SOFT_NMI_SMI_SCI2 SIO_SMI_OUT CSB_ROMCS NMI_3V
18
19,21 19,21 19,21 19,21 19,21 19,21 19,21 19,21
19,22,35 19,22,35 19,22,35 19,22,35 19,22 19 19,22,35
21 21
19
12 12 12 12
12 12 12
18,35 12,35 12 18 12,18,27 12,18,28 10,35 10,35 18 18,19,39 18,19,39
18,35 10 18,22 47 7 7 18 18 18,22 22 47 10,18
+3.3V
RB315
21
4.7K
0.1uF 16V 50V-20%
50V-20%
.01UF
.01UF
1 2
1 2
CB464
1 2
CB444
+3.3V
NP
2.2K-5% 2.2K-5%
2.2K-5%
2.2K-5%
NP
1 2
RB349
RB348
21
2.2K-5%
1 2
RB346
RB326
21
2.2K-5%
1 2
RB312
PCI0_GNT_CSB0# 0=DISABLE INTERNAL ARBITER
PCI0_GNT_CSB1# 0=ENABLE X-BUS LOGIC
PCI0_GNT_CSB2# 0=DISABLE IMB LOGIC
21
NP
RB347
PCI0_GNT_CSB0 PCI0_GNT_CSB1 PCI0_GNT_CSB2
18 18,19,24 18,39
1=ENABLE INTERNAL ARBITER
1=DISABLE X-BUS LOGIC
1=ENABLE IMB LOGIC
STRAPPING OPTIONS
GEVENT11# PULLED LOW ENABLES INTERNAL PLL
RB274
1K-5%
1 2
+3.3V
RB303
21
4.7K
+2.5V
CB445
50V-20%
.01UF
1 2
CB460
50V-20%
.01UF
1 2
CB465
50V-20%
.01UF
1 2
CB466
50V-20%
.01UF
1 2
6.3V-10%
4.7uF
CB451
12
CB440
21
RB275
RB264
1 2
100-1%
100-1%
+3.3V
8.2K-5%
1 2
CB424
MEMOFF_CSB
12,18
+3.3V
RB263
1 2
RB314
1K-5% RB313
1 2
R408
1 2
18
USB_PWREN
CSB_USB_EN
21
CSB_SLP_BUTTON
CSB5_CPUGNT
CSB5_CPUREQ
CSB_FLUSHREQ
CSB_MEMACK
CSB_SLP_S1
RB334
21
+2.5V
RB251
2.7K-5%
1 2
1K-5% RB325
21
8.2K-5% RB341
8.2K-5%
21
8.2K-5%
R358
8.2K-5%
1 2
1K-5%
SER_PIRQ16_31
+3.3V
21
R431
R419
RNB65
RNB65
1 8
2.7K-5%
2 7
8.2K-5%
8.2K-5%
GPE_ESM2SCI GPE_ESM2SMI
GPE_CIOB1_ALERT GPE_CIOB2_ALERT
1 2
8.2K-5%
+3.3V
RB262
RB252
1 2
1 2
2.7K-5%
2.7K-5% GPE_SOFT_NMI_SMI_SCI1
GPE_SOFT_NMI_SMI_SCI2
18,22 18,22
GPIO PULL-UPS
1uF
10V-10%
CB425
2 1
21
CB426
0.1uF 16V
VREF_CSB_IMB
0.1uF 16V
18
ROOM=CSB
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
EVERGLADES 18 6-9-2003_13:55
DC
AUSTIN,TEXAS
SHEET
18 OF 51
RB285
10K-5%
18,35 18,35
12,18,27 12,18,28
REV.
+2.5V
21
18
18
18
18
18
18
18
18
A00-00
1
2
3
Page 19
B D
CA
2 4 6
NC_LPC_6 PCI0_GNT_CSB1
8 10
NC_LPC_10
12
LFRAME
14
LAD1 CK_33M_LPC
VCC
18,24
18,19,22,35 18,19,22,35 5
22,35,47 22,35,48
22,48
X01 -- CHANGED TO SURFACE MOUNT --SWH10/15
PWRBTN PS_ON GPI_NVRAM_CLR
STRAIGHT MALE
J_FVSX
1 2 3
4
5
6
HEADER 2X3
INTRUDED FLP_DSKCHG
35,39 22,42
1
+3.3V
24,35,47
18,19,22 18,19,22,35 18,19,22,35 18,19,22,35
PCI0_RST_ATI NC_LPC_5
LDRQ0 LAD0 LAD2 LAD3
1
P4
1 3 5 7
9 11 13
15 16
TSM 2X8 SMT HDR
ROOM=LPC
LPC DEBUG CONNECTOR HEADER FOR FVS
+3.3V
U47
VCCCLR
CLK 1D 1Q 2D 2Q 3D 3Q 4D 4Q 5D 5Q 6D 6Q 7D 7Q 8D 8Q
TSSOP
U43
VCCCLR
CLK 1D 1Q 2D 2Q 3D 3Q 4D 4Q 5D 5Q 6D 6Q 7D 7Q 8D 8Q
TSSOP
U53
VCCCLR
CLK 1D 1Q 2D 2Q 3D 3Q 4D 4Q 5D 5Q 6D 6Q 7D 7Q 8D 8Q
TSSOP
U69
3
74LCX00 SUB*_14PNP
U69
6
74LCX00 SUB*_14PNP
U69
8
74LCX00 SUB*_14PNP
U69
11
74LCX00 SUB*_14PNP
+3.3V
0.1uF 16V
201
0.1uF 16V
201
0.1uF 16V
201
NC_X_ADDR22 NC_X_ADDR23
CSB_SPK_1
CSB_SPK_2
INV_SPK_1
INV_SPK_2
C406
1 2
C407
1 2
C408
1 2
X_ADDR0 X_ADDR1 X_ADDR2 X_ADDR3 X_ADDR4 X_ADDR5 X_ADDR6 X_ADDR7
X_ADDR8 X_ADDR9 X_ADDR10 X_ADDR11 X_ADDR12 X_ADDR13 X_ADDR14 X_ADDR15
X_ADDR16 X_ADDR17 X_ADDR18 X_ADDR19 X_ADDR20 X_ADDR21
R525
33-5%
R524
33-5%
R535
33-5%
R536
33-5%
21 21 21 21 21 21 21 21
21 21 21 21 21 21 21 21
21 21 21 21 21 21
32-BIT PCI BUS PULL-UPS
21
21
C492
1 2
21
C496
1 2
21
0.1uF 16V 0.1uF 16V
1
8.2K
8.2K
RN144
RN134
876
5
567
8
2
3
+3.3V
18
18
18
CSB_XAD0 CSB_XAD1 CSB_XAD2 CSB_XAD3 CSB_XAD4 CSB_XAD5 CSB_XAD6 CSB_XAD7
R359
1 2
8.2K-5%
CSB_XALAT_0
CSB_XALAT_1
CSB_XALAT_2
18,21 18,21 18,21 18,21 18,21 18,21 18,21 18,21
11
3 2 4 5 7 6
8 9 13 12 14 15 17 16 18 19
74VHC273
11
3 2
4 5
7 6
8 9 13 12 14 15 17 16 18 19
74VHC273
11
3 2
4 5
7 6
8 9 13 12 14 15 17 16 18 19
74VHC273
ROOM=FLASH
123
4
432
X BUS ADDRESS LATCHES
+3.3V
14
1 2
74VHCT00
+3.3V
14
CSB_SPKR
18
GPO_SPKR_DIS
22
4
ROOM=SPKDRV
4 5
74VHCT00
+3.3V
14
9
10 74VHCT00
+3.3V
14
12 13
74VHCT00
ROOM=LPC
18,19,22,35
18,19,22
18,19,22,35
18,19,22,35
18,19,22,35
18
18,19,22,35
NC_RN7069_5
LAD3
LDRQ0
LFRAME
LAD0
LAD2
LDRQ1
LAD1
RNB60
4.7K-5%
RNB60
4.7K-5%
RNB61
2 7
4.7K-5%
RNB61
4.7K-5%
RNB60
4.7K-5%
45
NC_RN7069_4
LPC PULL-UPS
ROOM=PCI32_PU
VCC
RNB67
63
RNB67
4 5
RNB67
RNB67
2 7
RNB68
RNB68
2 7
RNB68
RNB68
4 5
PCI0_FRAME
PCI0_PERR
81
PCI0_SERR
PCI0_TRDY
81
PCI0_IRDY
PCI0_DEVSEL
63
PCI0_STOP
PCI0_LOCK
1 2
SMT
S1
+
-
2.7K-5%
2.7K-5%
2.7K-5%
2.7K-5%
2.7K-5%
2.7K-5%
2.7K-5%
2.7K-5%
SPEAKER
A B
36
RNB61
1 8
4.7K-5%
RNB61
3 6
4.7K-5%
45
RNB60
1 8
4.7K-5%
27
+3.3V
18,24,39
18,39
18,39
18,24,39
18,24,39
18,24,39
18,24,39
18,39
PIRQ_LTCH
18
+3.3V
5
2.7K
4
567
2.7K
432
8.2K-5%
21
876
567
8
2.7K
432
5
2.7K
4
RN7
123
+3.3V
8
RN23
1
RN17
PIRQ_15
39
PIRQ_14
39
PIRQ_13
39
PIRQ_12
39
PIRQ_11
33
PIRQ_10
33
PIRQ_9
33
PIRQ_8
33
CK_33M_PIRQ1
5
PIRQ_7
31
PIRQ_6
31
PIRQ_5
31
PIRQ_4
31
PIRQ_3
51
PIRQ_2
51
PIRQ_1
28
PIRQ_0
28
CK_33M_PIRQ0
5
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
1
876
RN8
123
ROOM=IRQ
+3.3V
C125
1 2
0.1uF 16V
R93
1K-5%
21
+3.3V
R91
16
VCC
1
SHFTLD
11
A
12
B
13
C
14
D
3
E
4
F
5
G
6
H
10
SER
15
CLKINHBT
2
CLK
8
GND
0.1uF 16V
16
VCC
1
SHFTLD
11
A
12
B
13
C
14
D
3
E
4
F
5
G
6
H
10
SER
15
CLKINHBT
2
CLK
8
GND
subbed to 74LV204
C140 1 2
subbed to 74LV204
U13
74HC165
SUB*_0J204
U15
74HC165
SUB*_0J204
QH QH
QH QH
9
SER_IRQ8_15
7
NC_165_7_2
9 7
NC_165_7_4
R94
1 2
0-5%
TITLE
DWG NO.
DATE
SER_PIRQ0_15
COMPUTER CORPORATION
AUSTIN,TEXAS
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
X1004
6/6/2003
SHEET
DC
18
REV.
19 OF 51
6-9-2003_13:5519EVERGLADES
2
3
4
A00-00
Page 20
B D
ROOM=SIDE_TERM
CA
R401
1 2
+3.3V
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5
10K-5%
R537
10K-5%
1 2
R528
1 2
33-5%
R398
1 2
33-5%
R530
1 2
33-5%
R529
1 2
33-5%
R532
1 2
33-5%
RN159
RN156
33
RN155
33
RN158
33
R534
1 2
82-5%
R533
1 2
82-5%
R531
1 2
82-5%
8 7 6
8 7 6
8 7 6
8 7 6
+3.3V
R539
1 2
R538
1 2
IDE_CD_IOR
IDE_CD_IOW
IDE_CD_CS0
IDE_CD_CS1
IDE_CD_DACK
IDE_CD_D12 IDE_CD_D13 IDE_CD_D14 IDE_CD_D15
IDE_CD_D10 IDE_CD_D9 IDE_CD_D11 IDE_CD_D8
IDE_CD_D7 IDE_CD_D6 IDE_CD_D5 IDE_CD_D4
IDE_CD_D3 IDE_CD_D2 IDE_CD_D1 IDE_CD_D0
RIDE_CD_IORDY
RIDE_CD_DREQ
5.6K 4.7K
RIDE_CD_IRQ
42
42
42
42
42
42 42 42 42
42 42 42 42
42 42 42 42
42 42 42 42
1
TO CONNECTOR
2
42
42
42
RB253
R372
1 2
+3.3V
1 2
33-5% RB286
1 2
33-5%
R356
1 2
33-5%
R354
1 2
33-5%
R407
1 2
33-5%
1
RN137
2 3 4 5
33 33
1
RN124
2 3 4 5
33
1
RN133
2 3 4 5
33
1
RN130
2 3 4 5
33
10K-5%
R390
1 2
82-5%
R391
1 2
82-5%
RB327
10K-5%
1 2
R413
1 2
82-5%
RIDE_ESM_IOR
ID_BUTTON_RAW
46
FROM CONTROL PANEL
+3.3V_AUX
1
ID
A B
1 2
3 4
GND_1 GND_2
PUSHBUTTON
SPST SWITCH
SUB*_5C785
8.2K-5% R1
21
R2
1K-5%
21
6.3V-10%
4.7uF
1 2
6.3V-10%
4.7uF
C28
+3.3V_AUX
U68
1142
VHC14
1 2
C27
$0.03 5/10/01
NP*
ID_BUTTON_DB
TO ESM3
35
ROOM=CYC_REAR
REAR ID BUTTON
U1
TO WITHSTAND SHORT CIRCUIT ON CONNECTOR
+3.3V_AUX
2
LED_ID_YELLOW
35,46
OR DRAC3 AC ADAPTER PLUGGED IN
BSV52
R43
1 2
8.2K-5% Q5
1
1 2
3
2
8.2K-5%
USING MORE RESISTORS
USE ADHESIVE ON ID_LED TO PREVENT BENDING OF PINS DURING BOARD INSTALLATION
+5V_AUX
R33
1
3906
Q4
BLUE_CATH_REAR
TO TIP
ID_LED
MB
2 1
Y
LED
BLUE/YELLOW
2
3
R20
1 2
68-5%
R32
1 2
68-5%
2N7002
L13
21
BLM11A601S
12
C29
0.1uF 16V
Q1
D
3
1
G
S
2
R3
1 2
0-5%
YEL_CATH_REAR
BLUE_CATH_REAR
BLUE: 23 mA @3.8V AMBER: 23 mA @2.1V
center pin is AMBER+
CATH1
1
CATH2
3
COMMON1 COMMON2
CATH3
4
CATH4
6
BZA462A
CYCLOPS
1 3 2
DC PWR JACK
BLM11A601S
12
C13
0.1uF 16V
2 5
L9
21
+3.3V_AUX
2
1
3906
3
Q3
R8
1 2 100-1%
54.9 OHM 1% 1206 1/8W SUB*_5358D
RB1
21
82-5%
SUB*_4M970
R7
21
82-5%
SUB*_4M970
SUB TO 82.5 OHM
D
3
S
2
R19
1 2
8.2K-5%
Q2
2N7002
1
G
LED_ID_BLUE
35,46
ROOM=CYC_REAR
18
RIDE_ESM_IOW
18
RIDE_ESM_CS0
18
RIDE_ESM_CS1
18
RIDE_ESM_DACK
18
RIDE_ESM_D12
18
RIDE_ESM_D13
18
RIDE_ESM_D14
18
RIDE_ESM_D15
18
RIDE_ESM_D10
18
RIDE_ESM_D9
18
RIDE_ESM_D11
18
RIDE_ESM_D8
18
RIDE_ESM_D7
18
RIDE_ESM_D6
18
RIDE_ESM_D5
18
RIDE_ESM_D4
18
TO CSB5
RIDE_ESM_D3
18
RIDE_ESM_D2
18
RIDE_ESM_D1
18
RIDE_ESM_D0
18
IDE_ESM_IORDY
18
IDE_ESM_DREQ
18
IDE_ESM_IRQ
18
PRIMARY IDE CHANNEL
Ultra DMA (ATA-100) Termination
REAR ID LED & REAR CYCLOPS CONNECTOR
TO ESM4
8 7 6
8 7 6
8 7 6
8 7 6
+3.3V
RB276
1 2
RB287
1 2
IDE_ESM_IOR
IDE_ESM_IOW
IDE_ESM_CS0
IDE_ESM_CS1
IDE_ESM_DACK
IDE_ESM_D12 IDE_ESM_D13 IDE_ESM_D14 IDE_ESM_D15
IDE_ESM_D10 IDE_ESM_D9 IDE_ESM_D11 IDE_ESM_D8
IDE_ESM_D7 IDE_ESM_D6 IDE_ESM_D5 IDE_ESM_D4
IDE_ESM_D3 IDE_ESM_D2 IDE_ESM_D1 IDE_ESM_D0
4.7K5.6K RIDE_ESM_IORDY
RIDE_ESM_DREQ
RIDE_ESM_IRQ
39
39
39
39
39
39 39 39 39
39 39 39 39
39 39 39 39
39 39 39 39
39
39
39
ROOM=PIDE_TERM
TO ESM4
Ultra DMA (ATA-100) Termination
RIDE_CD_IOR
18
RIDE_CD_IOW
18
RIDE_CD_CS0
18
RIDE_CD_CS1
18
RIDE_CD_DACK
18
RIDE_CD_D12
18
RIDE_CD_D13
18
RIDE_CD_D14
18
RIDE_CD_D15
18
RIDE_CD_D10
18
RIDE_CD_D9
18
RIDE_CD_D11
18
RIDE_CD_D8
18
RIDE_CD_D7
18
RIDE_CD_D6
18
RIDE_CD_D5
18
RIDE_CD_D4
18
TO CSB5
RIDE_CD_D3
18
RIDE_CD_D2
18
RIDE_CD_D1
18
RIDE_CD_D0
18
IDE_CD_IORDY
18
IDE_CD_DREQ
18
IDE_CD_IRQ
18
SECONDARY IDE CHANNEL
TO CD-ROM (ON BACKPLANE)
RN141
USBP2-
3
USB1
1 2 3 4
USB
39
4
CRUSBP0­CRUSBP0+
12
+
C55
150uF
NP*
VCC
21
FS6
1.5A
21
L14
FERRITE
21
C26
10V-20%
6V
1812-1.5A
USB_OVRCUR
10V-20%
100uF
+
0.1uF 16V
ROOM=REAR_USB
EXTRA FILTER COMPONENTS REMOVED
18
SUB*_99477
1 2
50V-5%
C56
21
47pF
C50
21
NP*
DEPOP CAPS--EDGE RATES WERE TOO SLOW --swh 11/7
SINCE THERE IS NO USB2 CONNECTOR
L22
200mA
50V-5%
47pF
NP*
L21
1 2
200mA
SUB*_99477
C49
21
99477 = 200mA Ferrite 120ohm@100MHz SM0603 30661 = 0 OHM SM0603
46
USBP2+
46
USBP3-
39
USBP3+
39
81
72
RNB63
RNB63
15K-5%
RNB63
15K-5%
4 5
ROOM=CSB
USBP0-
USBP0+
USBP1-
USBP1+
RNB62
RNB62
3 6
15K-5%
4 5
RNB62
15K-5%
15K-5%
81
RNB63
3 6
RNB62
15K-5%
15K-5%
72
RN141 3 6
33-5%
RN141 2 7
33-5%
RN138 1 8
RN138 3 6
15K-5%
33-5%
33-5%
USB FUSE, FILTERING, AND REAR CONNECTORS
A B
54
33-5%
RN141
81
33-5%
72
CN1
CN1
1 8
CN2
47pF
50V-10%
47pF
50V-10%
54
47pF
CN154CN1
3 6
50V-10%
47pF
50V-10%
Place caps and series resistors <1" from CSB
RN138
72
33-5%
RN138
54
33-5%
CN2
3 6
ROOM=CSB
47pF
50V-10%
81
CN2
CN2
47pF
50V-10%
R_USBP2-
R_USBP2+
R_USBP3-
R_USBP3+
47pF
50V-10%
2 7
R_USBP0-
R_USBP0+
R_USBP1-
R_USBP1+
47pF
50V-10%
18
18
18
18
18
18
18
18
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
AUSTIN,TEXAS
SHEET
DC
REV.
20 OF 51
6-9-2003_13:5520EVERGLADES
3
4
A00-00
Page 21
B D
CA
+3.3V
U46
X_ADDR0
19,21
X_ADDR1
19,21
X_ADDR2
19,21
X_ADDR3
19,21
X_ADDR4
19,21
X_ADDR5
RB301
1 2
8.2K-5%
19,21
X_ADDR6
19,21
X_ADDR7
19,21
X_ADDR8
19,21
X_ADDR9
19,21
X_ADDR10
19,21
X_ADDR11
19,21
X_ADDR12
19,21
X_ADDR13
19,21
X_ADDR14
19,21
X_ADDR15
19,21
X_ADDR16
19,21
X_ADDR17
19,21
X_ADDR18
19,21
X_ADDR19
19,21
FLSH_A20 FLSH_A21 FLASH_CS
1
+3.3V
RB300
1 2
NP*
8.2K-5%
NP*
19
19
X_ADDR20
X_ADDR21
RB299
1 2
0-5%
RB302
1 2
0-5%
25
A0
24
A1
23
A2
22
A3
21
A4
20
A5
19
A6
18
A7
8
A8
7
A9
6
A10
5
A11
4
A12
3
A13
2
A14
1
A15
48
A16
17
A17
16
A18
15
A19
10
A20
9
A21
27
GND_27
46
GND_46
28320
SUB*_9W652
BLANK IS 0U211 EVERGLADES PROGRAMMED PART IS 9W652 SOCKET IS 8M346 (DEPOP)
VCC_30
VCCQ
VPP
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
37 47 13
29
CSB_XAD0
31
CSB_XAD1
33
CSB_XAD2
35
CSB_XAD3
38
CSB_XAD4
40
CSB_XAD5
42
CSB_XAD6
44
CSB_XAD7
30
FLSH_DQ8
32
FLSH_DQ9
34
FLSH_DQ10
36
FLSH_DQ11
39
FLSH_DQ12
41
FLSH_DQ13
43
FLSH_DQ14
45
FLSH_DQ15
26
CE
28
X_RD
OE
11
X_WR_FLASH
WE
12
RP
14
WP
18,19,21 18,19,21 18,19,21 18,19,21 18,19,21 18,19,21 18,19,21 18,19,21
47 18,21 47
1
RN142
2 3 4 5
8.2K
1
RN143
2 3 4 5
8.2K
+3.3V +3.3V
8 7 6
8 7 6
NP*
RB298
1 2
12
CB455
1K-5%
.01UF
50V-20%
X03-- REMOVED HANGING SIGNALS FROM x8 FLASH THAT WERE LEFT OVER FROM X00 SCHEMATICS- SC 12/14
FLASH_RP
0-5%
RB324
1 2
21
NP
220
RB323
0.1uF 16V CB434
21
BTWP
0.1uF 16V CB473
1 2
47
0.1uF 16V
21
0.1uF 16V
CB448
1 2
CB462
0.1uF 16V
21
2
+3.3V
0.1uF 16V
CB43221CB431
VCC
J_PROM_ICE
2
R355
21
19,21 19,21 19,21 19,21 19,21 19,21 19,21 18,21 19,21
47
X_ADDR18 X_ADDR17 X_ADDR14 X_ADDR13 X_ADDR8 X_ADDR9 X_ADDR11 X_RD X_ADDR10 PROMICE_CS CSB_XAD7 CSB_XAD6 CSB_XAD5 CSB_XAD4 CSB_XAD3
10-5%
NP0
18,19,21 18,19,21 18,19,21 18,19,21 18,19,21
Stuff with Samtec TSM-117-04-T-DV (PN 0K482)
1
2
1
4
3
3
5
5
7
7
9
9
11
11
15
15
17
17
19 20
19 20
21
21
23
23
25
25
27
27
29
29
31
31
33 34
33 34
TSM 2X17
SMT HDR
SUB*_6J699 if needed
X_ADDR19
4
6
X_ADDR16
6
8
X_ADDR15
8
10
X_ADDR12
10
12
X_ADDR7
12
1413
X_ADDR6
1413
16
X_ADDR5
16
18
X_ADDR4
18
X_ADDR3
22
X_ADDR2
22
24
X_ADDR1
24
26
X_ADDR0
26
28
CSB_XAD0
28
30
CSB_XAD1
30
32
CSB_XAD2
32
NP0
19,21 19,21 19,21 19,21 19,21 19,21 19,21 19,21 19,21 19,21 19,21 19,21 18,19,21 18,19,21 18,19,21
ROOM=FLASH
1
2
FLASH BIOS
+3.3V
21
R338
8.2K-5%
NP0
21
PROMICE_SEL
PROM_ICE
47
ROOM=JUMPERS
PROM-ICE JUMPER
3
ROOM=CSB_I2C_MUX
SUB TO 4.7K-SC 12/17
VCC
0.1uF 16V CB454
VCC
1 2
R432
47K-5%
1 2
CSB_SCL
18,21
CSB_I2C_MUX
18,21
CSB_SDA
4 4
17,35,39,42,47,51
SUB*_19960
1M-5%
RB317
NP*
21
+3.3V
R409
47K-5%
1 2
SUB*_19960
GPO_I2C_MUX_SEL0
22
GPO_I2C_MUX_SEL1
22
SYSTEM_PWRGOOD
7
9
U52
YA
YB
5C3253 QSOP16
VCC IA0
IA1 IA2 IA3
IB0 IB1 IB2 IB3
16 6
5 4 3
10 11 12 13
14
S0
2
S1
1
EA
15
EB
I2C MUX FOR CSB5
SEE PAGE 37 FOR I2C MAP
X01 -- DISCONNECTED SEG0 FROM BIOS --SWH 10/1/2002
R414
1 2
RB318
220
NP*
21
ENV_SEG0_SCL
0-5%
NP*
R411
1 2
ENV_SEG0_SDA
0-5%+3.3V
RB319
1 2
8.2K-5%
+3.3V
NP*
RB295
1 2
8.2K-5%
ROMB_KEY_SPD_SCL ROMB_KEY_SPD_SDA
X01 -- CHANGED THIS CONNECTION FROM SEG5 (ROMB FRU) TO BUS WITH ROMB KEY & SPD EEPROMS --SWH 10/7
ENV_SEG3_SCL ENV_SEG4_SCL
ENV_SEG3_SDA ENV_SEG4_SDA
Q35
2N7002
1
G
D
3
S
2
7,37,46
7,37,46
51 51
21,37 21,27,28,37
21,37 21,27,28,37
VCC
R493
1 2
8.2K-5%
VOLTAGE LEVEL CONVERSION FOR DIMM SPDs (2.5V I2C)
21,37
21,37
ENV_SEG3_SCL
ENV_SEG3_SDA
+3.3V
Q14
2N7002
D 3
R258
1 2
0-5%
+3.3V
Q15
2N7002
D 3
R254
1 2
0-5%
ENV_SEG4_SCL
ENV_SEG4_SDA
AND CIOBs
+2.5V
ROOM=DIMM_I2C
21,27,28,37
21,27,28,37
LEVEL CONVERSION FOR CMIC & CIOB I2C BUS
G
R252
1
1 2
8.2K-5%8.2K-5%
+2.5V
R244
1 2
ASCLK_2P5V
ASDATA_2P5V
TO DIMMSTO ESM3/CSB5
5,14,15
5,14,15
21,27,28,37
21,27,28,37
S 2
NP
G
1
S 2
NP
DEBUG HEADERS TO READ CHIPSET REGISTERS
+2.5V
2N7002
G
1
Q23
D 3
18,21
18,21
ENV_SEG4_SCL
ENV_SEG4_SDA
S 2
2N7002
D 3
A B
ROOM=CHIPSET_I2C
8.2K-5%
8.2K-5%
1 2
RB332
RB294
21
JSEG4
1 2
KKEY
3 4 5
SUB=SUB*_W0644
ENV_SEG4_25V_SCL
ENV_SEG4_25V_SDA
TO CMIC-LETO ESM3
+3.3V
JCSB5
1 2
KKEY
3 4 5
SUB=SUB*_W0644
G
1
Q26
S 2
CSB_SCL
CSB_SDA
+3.3V
12
12
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
AUSTIN,TEXAS
SHEET
DC
21 OF 51
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
REV.
A00-00
6-9-2003_13:5621EVERGLADES
3
Page 22
B D
CA
RB401
1 2
8.2K-5% RB402
1 2
8.2K-5%
R441
1 2
8.2K-5%
R410
1 2
8.2K-5%
R416
R434
47K-5%
1 2
RB335
RB342
1 2
8.2K-5%
REV.
22 OF 51
1 2
1 2
+3.3V
47K-5%
2.7K-5%
A00-00
BOARD REVISION
REV1 REV0
X00 0 0 A00 0 0
1
BOARD REVISION BITS
+3.3V_AUX +3.3V
21
21
RB358
RB329
8.2K-5%
RB30721RB306
2.7K-5%
2.7K-5%
1 2
2.7K-5% SIO_SERIRQ
SIO_GPIO00 GPO_FLWR_EN
SIO_SLPBTN
2
BLOCK PME SIGNAL WHILE CHASSIS IS OPEN FOR DEVICES THAT CAN BE INSTALLED WHILE SYSTEM HAS AUX POWER TO KEEP SYSTEM FROM COMING ON DURING INSTALL
3
LOAD RESISTOR TO DETECT MISSING BATTERY
1 2
NP*
10M-5%
R464
R463
1 2
1 2
NP*
10M-5%
1K-5%
R465
Required by product safety
D14
1 3
3V COIN
SMT SKT
4 4
1N914
+ -
B1
21
SM Socket ADD*_75481_BATTERY
SUB*_1311P
P# 86810 TH Socket P# 1311P SM Socket P# 75481 BATTERY
R496
1 2
1K-5%
+3.3V_AUX
COIN BATTERY
1 2
CB528
+3.3V +3.3V
8.2K-5%
8.2K-5%
1 2
RB336
21
NP*
NP*
1 2
RB343
220
220
21
18,22 22 22,47
22
16V 10%
16V 10%
10uF
10uF
C461
21
D11
31
1N914
16V 10%
CB534
10uF
21
.01UF
50V-20%
PLACE CAPS CLOSE TO CSB
RB357
GPI_BRD_REV1 GPI_BRD_REV0
RB352
PCIX_PME_FROM_SLOT1
33
INTRUSION_VAUX
39
ISO_PME_BUS0
39
33
SIO_VBAT
C455
21
ESM_VBAT
VBAT
22 22
18 18
18
18
RB360
1 2
+3.3V_AUX
PCIX_PME_FROM_SLOT2
22
40
17,39,51
SIO_SCI_OUT SIO_SMI_OUT
CSB_SLP_S3
RB361
1 2
8.2K-5%
R439
1 2
8.2K-5%
+3.3V_AUX
RB390
+3.3V_AUX
8.2K-5%
14
U57
4 5
74VHC32
+3.3V_AUX
14
U57
9
10
74VHC32
+3.3V_AUX
14
12 13
74VHC32
6
8
U57
21
11
10K-5%
DEPOP RB370 TO ENABLE THE SIO INTERNAL 48MHz CLOCK --SC 1/13/03
+3.3V
RB373
10K-5%
1 2
PCIX_PME_FROM_SLOT1_BLOCKED CIOBE_PME
28
PCI0_PME
PCIX_PME_FROM_SLOT2_BLOCKED
CB495
RB382
1 2
0-5%
RB383
0-5%
33
+3.3V
+3.3V_AUX
1 2
RB371
NP
21
PCI_RISER_TYPE
ROOM=BAT
A B
.01UF
50V-20%
1 2
LB12
600mA
RB372
8.2K-5% NP
21
21
R480
21
CB511
CB485
+3.3V_AUX
SUB=NP*
8.2K-5%
+3.3V
R462
1 2
SUB TO 20M
1 2
510K-5%
10pF
50V-5%
1 2
19,35,48
RB370
1 2
19,35,47
10K-5%
RB389
20M-5%
32KHz
X2
6.3V-10%
4.7uF
1 2
CB467
.01UF
7,35,47 7,35,47
7,35,47 7,35,47
CB476
50V-20%
PS_ON NC_PPEN_INTPU
18,19,35 18,19,35 18,19,35 18,19,35
18,19
18,19,35
47
18,22
10K-5%
SIO_CKIN48_STRAP GPO_LSI1030_ENABLE
51
GPO_SERA_TO_SIO_NOT_EMP
23
GPO_ROMB_DISABLE
51
NC_SIO_GPO60 CK_48M_SIO
4
GPI_PROC0_HS_PRES GPI_PROC1_HS_PRES
PWRBTN GPE_SIO_47CSB_SLP_S5 GPE_SIO_46 GPI_RISER2_PRESENT
22,33
GPI_RISER1_PRESENT
22,33
LI_BAT_PRSNT
35,51
SIO_SLPBTN
22
GPI_FLAG
47
GPI_ESM4_PRESENT
35,39
SP_SIO_GPIO37
22
GPI_SYN_SEL100
4,7,12
GPI_FVS_TESTMODE
48
GPI_EN_PASSWD
48
GPI_NVRAM_CLR
19,48
GPI_BRD_REV1
22
GPI_BRD_REV0
22
GPE_SOFT_NMI_SMI_SCI2
18
GPE_SOFT_NMI_SMI_SCI1
18
H0_CPU_PRES H1_CPU_PRES GPO_I2C_MUX_SEL1
21,22
GPO_I2C_MUX_SEL0
21,22
SPROC_RST
39
SIO_GPIO20
22
GPO_PWR_BUTTON_DIS
47
GPE_ESM_IRQ15
18,35
GPO_FLWR_EN
22,47
SIO_GPIO14
22
GPI_ROMB_PRESENT
51
FP_OVRCUR
46
GPO_SPKR_DIS
19,22
SIO_GPIO00
22
KB_GATE_A20
18
CK_RTCX2 CK_RTCX1
21
14
21
10pF
CB523
50V-5%
.01UF
1 2
50V-20%
LAD0 LAD1 LAD2 LAD3 CK_33M_SIO
5
LDRQ0 LFRAME PCI0_RST_SIO
SIO_SERIRQ
NC_SIO_P47 NC_SIO_P46
1 2
CB510
.01UF
1 2
CB456
50V-20%
+3.3V_AUX
21
R479
10K-5%
SIO_VDD
0.1uF 16V
0.1uF 16V
.01UF
.01UF
1 2
CB478
50V-20%
50V-20%
39
ONCTL
121
P12/PPDIS
113
LAD0
112
LAD1
111
LAD2
110
LAD3
114
LCLK
118
LDRQ
117
LFRAME
120
LRESET
119
SERIRQ
47
NC_47
46
NC_46
55
GPO64/WDO/CKIN48
48
GPO63
34
GPO62
33
GPO61
32
GPO60
56
GPIO55/CLKIN
54
GPIO54/VDDFELL
45
GPIO53/LFCKOUT/MSEN0
38
GPIO52/SIOSCI
37
GPIO51/SIOSMI
36
GPIO50/PWBTIN
53
GPIOE47/SLPS5
52
GPIOE46/SLPS3
51
GPIOE45/LED2
50
GPIOE44/LED1
49
GPIOE43/PWBTOUT
35
GPIOE42/SLBTIN
21
GPIOE41
20
GPIOE40
31
GPIO37
30
GPIO36
29
GPIO35
28
GPIO34
27
GPIO33
26
GPIO32
25
GPIO31
24
GPIO30
23
GPIO27
22
GPIO26
19
GPIO25
18
GPIO24
17
GPIO23
16
GPIO22
15
GPIO21
14
GPIO20
8
GPIOE17
7
GPIOE16
6
GPIOE15
5
GPIOE14
4
GPIOE13
3
GPIOE12
2
GPIOE11
1
GPIOE10
13
GPIO07/HFCKOUT
10
GPIO06
9
GPIO05
124
GPIO00/CLKRUN
123
GA20
44
32KX2
42
32KX1_32KCLKIN
SUPER I/O PC87414 REV 0.13
0.1uF 16V CB47721CB50721CB502
21
SUB=SUB*_8K759
U55
16V 10%
CB499
10uF
1
2
VDD69 VDD92
VDD116
VBAT VSB40 VSB12
DSKCHG
INDEX
DR0
DR1/P16
MTR0
MTR1/P17
DIR
STEP WDATA WGATE
TRK0
RDATA HDSEL
DENSEL DRATE0
SOUT1
RTS1/TRIS
DTR1_BOUT1/BADDR
SIN1
CTS1
DSR1
DCD1
RI1
SOUT2
RTS2
DTR2_BOUT2
SIN2
CTS2
DSR2
DCD2
RI2
STB_WRITE
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 ACK
BUSY_WAIT
SLCT
AFD_DSTRB
ERR
INIT
SLIN_ASTRB
GPIO04/MDAT
GPIO03/MCLK GPIO02/KBDAT GPIO01/KBCLK
KBRST
VSS43 VSS11 VSS68 VSS93
VSS115
69 92 116 41 40 12
57 72 67 70 71 66 65 64 63 62 61 60
WP
59 58 74 73
98 97 96 100 99 95 94 101
106 105 108 104 107 103 102 109
91 89 87 85 83 82 81 80 79 78 77 76
PE
75 90 88 86 84
128 127 126 125 122
43 11 68 93 115
+3.3V_AUX
0.1uF 16V CB47521CB503
21
NC_FLP_DRATE0
SIO_SER_SOUTA
SIO_SER_SINA
SIO_SER_CTSA SIO_SER_DSRA SIO_SER_DCDA SIO_SER_RIA
HOST_SER_SOUTB HOST_SER_RTSB HOST_SER_DTRB HOST_SER_SINB HOST_SER_CTSB HOST_SER_DSRB
HOST_SER_RIB
NC_RPRN_STB NC_RPRN_PD0 NC_RPRN_PD1 NC_RPRN_PD2 NC_RPRN_PD3 NC_RPRN_PD4 NC_RPRN_PD5 NC_RPRN_PD6 NC_RPRN_PD7 NC_PRN_ACK NC_PRN_BUSY NC_PRN_PE NC_PRN_SLCT NC_RPRN_AFD NC_PRN_ERR NC_RPRN_INIT NC_RPRN_SLIN
MSE_DATA_SIO MSE_CLK_SIO KB_DATA_SIO KB_CLK_SIO P_INIT
0.1uF 16V 16V 10%
10uF
1
2
23
23
23 23 23 23
39 39 39 39 39 39
22
39
INTERNAL PULLUPS/PULLDOWNS
39 39 39 39 10,11,18
P#236CY National 87414 W/ DELL KEYBOARD CODE
NATIONAL PC87414-ICG/VLA NSC 00 A1 (REV A1) NATIONAL PC87414-ICG/VLA NSC00A2 (REV A2)
+3.3V_AUX
2N7002
G
1
Q16
D 3
+3.3V_AUX
2N7002
Q17
D 3
LEVEL CONVERSION (& OPTION TO DISCONNECT)
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
49
49
MII_MDIO
AC205_EECS
SIO_GPIO14
S 2
G
1
SIO_GPIO20
S 2
X01 -- ADDED CONNECTION FROM GPIOs TO AC205 CONFIG --SWH 10/4
22
22
0.1uF 16V
C467
+3.3V
NP*
21
NP
RB328
RB316
10K-5%
1 2
HOST_SER_DCDB
SIO_VBAT
C469
21
4.7K
RN157
123
22
22
VCC
678
RB400
1K-1%
1K
21
4 5
FLP_DSKCHG FLP_INDEX FLP_DR0 NC_FLP_DR1 FLP_MTR0 NC_FLP_MTR1 FLP_DIR FLP_STEP FLP_WDATA FLP_WGATE FLP_TRK0 FLP_WP FLP_RDATA FLP_HDSEL FLP_DENSEL
SIO_SER_RTSA
SIO_SER_DTRA
ROOM=SIO
19,22
19,42 42 42
42
42 42 42 42 42 42 42 42 42
23
23
21,22 21,22
Super I/O Controller
GPI_RISER2_PRESENT
22,33
GPI_RISER1_PRESENT
22,33
SP_SIO_GPIO37
GPO_SPKR_DIS
BASE ADDRESS (~SER_DSTRA/BADDR)
No pullup: 2Eh-2Fh 10k pullup: 4Eh-4Fh
TRI-STATE DEVICE (~SER_RTSA/TRIS)
No pullup: pins active 10k pullup: pins tristated
+3.3V
GPI_BACKPLANE_ID1
42
GPI_BACKPLANE_ID0
42
GPO_I2C_MUX_SEL1 GPO_I2C_MUX_SEL0
SIO
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
EVERGLADES 22 6-9-2003_13:56
DC
AUSTIN,TEXAS
SHEET
1
2
3
Page 23
B D
CA
VCC
GNDBEN
C2 C3 C4 C5 C6 C7
+5V_AUX
28
9 12 16 19 22 25
1415
SER_SOUTA SER_DTRA SER_RTSA SER_DCDA SER_SINA SER_DSRA SER_CTSA SER_RIA
23 23 23 23 23 23 23 23
U38
ESM4_SER_SOUTA
39
ESM4_SER_DTRA
39
ESM4_SER_RTSA
39
ESM4_SER_DCDA
39
ESM4_SER_SINA
39
ESM4_SER_DSRA
39
ESM4_SER_CTSA
39
ESM4_SER_RIA
1
GPO_SERA_TO_SIO_NOT_EMP
22
SERIAL PORT MUX (SIO OR ESM4 TO REAR CONNECTOR)
DEFAULTS TO ESM4 AFTER AC LOSS (GPO62 ON SIO WILL GO TRI-STATE)
+3.3V_AUX
8.2K-5%
1 2
R400
131412
39
22 22 22 22 22 22 22 22
U42
CONNECT_SERA_TO_SIO
VHC14
SIO_SER_SOUTA SIO_SER_DTRA SIO_SER_RTSA SIO_SER_DCDA SIO_SER_SINA SIO_SER_DSRA SIO_SER_CTSA SIO_SER_RIA
1
A0
4
A1
7
A2
10
A3
18
A4
21
A5
24
A6
27
A7
2 3
B0 C0
5 6
B1 C1
8
B2
11
B3
17
B4
20
B5
23
B6
26
B7
13
AEN
PI5C3390
2
+3.3V_AUX
R40
1 2
8.2K-5%
R41
1 2
0.1uF 16V 1 2
8.2K-5%
23 23 23
23
23 23 23 23
C54
10V-10%
1uF
C25
21
SER_SOUTA SER_DTRA SER_RTSA
SER_DCDA NC_U9_18 SER_SINA SER_DSRA SER_CTSA SER_RIA
28 24
1 2
14 13 12
19 18 17 16 15 20
23 22
C1+ C1­C2+ C2-
T1IN T2IN T3IN
R1OUT R2OUT R3OUT R4OUT R5OUT R2OUTB
FORCEON FORCEOFF
MAX3243
U2
T1OUT T2OUT T3OUT
INVALID
VCC
R1IN R2IN R3IN R4IN R5IN
GND
V+ V-
26 27 3
9 10 11
4 5 6 7 8
21
25
+3.3V_AUX
SOUTA DTRA RTSA
DCDA RIA SINA DSRA CTSA
NC_INVALID_A
ROOM=SERDRV
RS-232 LEVEL TRANSLATION
L8
DCDA
23
DSRA
23
SINA
23
RTSA
10V-10%
10V-10%
C35
1uF
C66
21
10V-10%
1uF
21
C58
1 2
23 23 23
23 23 23 23 23
1uF
23
SOUTA
23
CTSA
23
DTRA
23
RIA
23
ROOM=COMMPORT
1 2
200mA
L7
1 2
200mA
L6
1 2
200mA
L5
1 2
200mA
L4
1 2
200mA
L3
1 2
200mA
L2
1 2
200mA
L1
1 2
200mA
SUB*_99477
SUB*_99477
SUB*_99477
SUB*_99477
SUB*_99477
SUB*_99477
SUB*_99477
SUB*_99477
JACKSCREWS
ADD1=ADD*_01157_SERIAL2 ADD2=ADD*_01157_SERIAL3
SERIAL
1
1
6
6
2
2
7
7
3
3
8
8
4
4
9
9
5
5
10
NC1
11
NC2
12
G1
13
G2
14
G3
15
G4
9 PIN, DSUB
BLACK PLASTIC
BRACKET
ADD=ADD*_8X703_SERIAL1
1
SERIAL PORT CONNECTOR
2
VCC
L24
50V-20%
.01UF
21
1 2
FERRITE
1812-1.5A
CB2
KBVCC
50V-20%
.01UF
21
CB1
3
21
R37
R36
1 2
8.2K-5%
39
39
39
39
KB_CLK
KB_DATA
MSE_CLK
MSE_DATA
4
KEYBOARD/MOUSE FRONT/REAR MUX & REAR CONNECTORS
FS7
22uF 6.3V
1 2
C81
R26
1 2
8.2K-5% 21
R25
8.2K-5%
1.5A 6V
8.2K-5%
21
KYB_FVCC
L17
1 2
200mA
L15
1 2
200mA
L18
1 2
200mA
SUB*_99477
L16
1 2
200mA
SUB*_99477
21
C3821C42
330pF 50V
C37
1 2
330pF 50V
C41
1 2
330pF 50V
SUB*_99477
SUB TO 120 OHM 200mA 603 FERRITE
SUB*_99477
50V-20%
.01UF
1 2
KBCLK
KBDATA
MSECLK
MSEDAT
330pF 50V
50V-20%
C40
.01UF
NC_KEY6 NC_KEY2
NC_MOUSE6 NC_MOUSE2
1M-5%
C39
1 2
50V-20%
.01UF
R14
21
A B
R15
1 2
0-5%
KEYBOARD
5 8 2
1 6 3
MINI-DIN KMDR-6S-BS-3.20
6 POS. RT. RCPT.
MOUSE
5 8 2
1 6 3
MINI-DIN KMDR-6S-BS-3.20
6 POS. RT. RCPT.
C43
21
50V-20%
50V-20%
C52
.01UF
.01UF
1 2
1 2
MATING FACE
+5V
5
NC
8
NC
2
DAT
1
CLK
6
GND
3
SUB*_8T991
MATING FACE
+5V
5
NC
8
NC
2
DAT
1
CLK
6
GND
3
SUB*_8T991
ROOM=KEYMOUSE
DDC_VCC
C51
25
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
COMPUTER CORPORATION
TITLE
EVERGLADES MB
AUSTIN,TEXAS
SCHEM,PLNR,PE1750,533MSI
DWG NO.
DATE
X1004
6/6/2003
SHEET
DC
REV.
23 OF 51
6-9-2003_13:5623EVERGLADES
3
4
A00-00
Page 24
B D
CA
1
1
ROOM=VGA
VCC
RB364
+3.3V
RB417
BUS CLOCK SELECT (PCI33,5V)
12
R_VMA0
8.2K-5% RB415
2 1
8.2K-5% RB414
2 1
BUS TYPE (PCI33,5V)
R_VMA6
ENABLE INT PIN (DISABLED)
R_VMA8
8.2K-5%
24,25
24,25
24,25
1 2
47K-5%
47K-5%
1 2
47K-5%
RB395
47K-5%
47K-5%
PCI0_AD30
18,24,39
2
18,24,39
3
+3.3V
R507
1 2
10K-5%
19,35,47
18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39 18,39
18,39
18,19
PCI0_AD0 PCI0_AD1 PCI0_AD2 PCI0_AD3 PCI0_AD4 PCI0_AD5 PCI0_AD6 PCI0_AD7 PCI0_AD8 PCI0_AD9 PCI0_AD10 PCI0_AD11 PCI0_AD12 PCI0_AD13 PCI0_AD14 PCI0_AD15 PCI0_AD16 PCI0_AD17 PCI0_AD18 PCI0_AD19 PCI0_AD20 PCI0_AD21 PCI0_AD22 PCI0_AD23 PCI0_AD24 PCI0_AD25 PCI0_AD26 PCI0_AD27 PCI0_AD28 PCI0_AD29 PCI0_AD30 PCI0_AD31
CK_33M_VIDEO
5
PCI0_GNT_CSB1
PCI0_RST_ATI
PCI33_EN_XL
NC_AGP_ST0 NC_AGP_ST1 NC_AGP_ST2
V16 W16 V15 Y16 W15 Y15 V14 W14 Y14 V12 Y13 W12 Y12 V11 Y11 W11
U16
V8 W8 W7 Y7 V7 Y6 W5 Y5 W3 Y3 V3 Y2 W2 Y1 V2 W1
T1 T3 R2
V1
T2 U2
U_ATI
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
ST0 ST1 ST2
CPUCLK PCI33EN
GNT RESET
RAGE PRO XL
HETERO 1 OF 3
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6
SBA7/IDSEL
C/BE0 C/BE1 C/BE2 C/BE3
AD_ST0 AD_ST1
INTR IRDY
SB_ST
STOP TRDY
FRAME
DEVSEL
SUB*_839RD
PAR REQ
R456
R455
R482
21
21
21
N2
NC_AGP_SBA0
N3
NC_AGP_SBA1
P2
NC_AGP_SBA2
P3
NC_AGP_SBA3
P1
NC_AGP_SBA4
V5
NC_AGP_SBA5
W6
NC_AGP_SBA6
V6
VGA_IDSEL
V13 W10 Y8 W4
W13
NC_AGP_AD_ST0
Y4
NC_AGP_AD_ST1
U10 U1
U3
NC_INTA_VGA
Y9 R1
NC_AGP_SB_ST
V10 V9 W9 Y10
PU_ATI_AS
PU_ATI_DS
PU_ATI_I2CCK
PU_ATI_I2CDAT
PU_ATI_SRDY
PCI0_CBE0 PCI0_CBE1 PCI0_CBE2 PCI0_CBE3
PCI0_PAR PCI0_REQ_CSB1
PCI0_IRDY
PCI0_STOP PCI0_TRDY PCI0_FRAME PCI0_DEVSEL
24
24
24
24
24
R488
1 2
100-5%
18,39 18,39 18,39 18,39
18,39 18
18,19,39
18,19,39 18,19,39 18,19,39 18,19,39
8.2K-5%
1 2
R499
24,25
24,25
24,25
10V-10%
1uF
21
+2.5V
0-5%
0-5%
RB345
RB355
1 2
1 2
4
22uF 10V
1 2
C472
+2.5V_ATI
24
25 25 25 25 25
25
25 25 25
25 25 25 25
25
25 25 24
25 25 25
24 24 24 24
24
4
VCC
CB526
24
R_VMA0 R_VMA1 R_VMA2 R_VMA3 R_VMA4 R_VMA5 R_VMA6 R_VMA7 R_VMA8 R_VMA9 R_VMA10 R_VM_BA0
R_VDQM0 R_VDQM1 R_VDQM2 R_VDQM3
R_VCS0
R_VM_BA1 R_VMCKE R_CK_VM
R_VWE R_VCAS0 R_VRAS0
NC_ATI_ROMCS NC_ATI_DVS0
NC_ATI_DVS1 NC_ATI_DVS2 NC_ATI_DVS3 NC_ATI_DVS4 NC_ATI_DVS5 NC_ATI_DVS6 NC_ATI_DVS7
NC_ATI_DVSCLK NC_ATI_SAD0
NC_ATI_SAD1 NC_ATI_SAD2 NC_ATI_SAD3 NC_ATI_SAD4 NC_ATI_SAD5 NC_ATI_SAD6 NC_ATI_SAD7
PU_ATI_AS PU_ATI_DS PU_ATI_I2CCK PU_ATI_I2CDAT
NC_ATI_BYTCLK
PU_ATI_SRDY
CK_14M_XLSYN
TESTEN_PD
NC_AGP_TX0P NC_AGP_TX0M NC_AGP_TX1P NC_AGP_TX1M NC_AGP_TX2P NC_AGP_TX2M NC_AGP_TXCP NC_AGP_TXCM
R_CK_VM
NC_VRDQM4 NC_VRDQM5 NC_VRDQM6 NC_VRDQM7
NC_RVCS1
NC_AGP_XTALOUT
Y18 L18 Y19 Y20 W18 W19 W20 V18 V19 V20 U18 U19 U20
P19 P18 R20 R19 R18 T20 T19 T18
W17 Y17
P17 N18 N20
R17 L20 P20
D3 D1
C1 C2 B2 A2 C3 B3 A3
E1 G1
G2 G3 F2 F1 F3 E3 E2
J1 H2 J2 J3 H1 H3
A1
B1
U15
U8 F4
B6 A6 B5 A5 B4 A4 B7 A7
839RD IS B41 REV OF XL
RB412
1 2
33-5%
U_ATI
MA0 MD0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11
DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7
CS0 CS1
DSF CKE MCLK
WE CAS RAS ROMCS
DVS0 DVS1 DVS2 DVS3 DVS4 DVS5 DVS6 DVS7
DVSCLK SAD0
SAD1 SAD2 SAD3 SAD4 SAD5 SAD6 SAD7
AS DS I2CCK I2CDAT BYTCLK SRDY/IRQ
XTALIN
MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8
MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
XTALOUT
RSET
MONID0 MONID1 MONID2 MONID3
MONDET DFPCLK DFPDAT
25
HSYNC VSYNC
VREF
TESTEN AGPCLAMP GIOCLAMP
TXOP TXOM TX1P TX1M TX2P TX2M TXCP TXCM
RAGE PRO XL
HETERO 2 OF 3
SUB*_839RD
CK_VM
L19 K18 K19 K20 J18 J19 J20 H18 H19 H20 G17 G18 G19 G20 F17 F18 F19 F20 E17 E18 E19 E20 D17 D18 D19 D20 C18 C19 C20 B20 A20 B19 A19 B18 A18 C17 B17 A17 C16 B16 A16 C15 B15 A15 D14 C14 B14 A14 D13 C13 B13 A13 D12 C12 B12 A12 D11 C11 B11 A11 C10 B10 A10
L1
R
M1
G
N1
B
L2 M2
M3 K1
K2 K3 J4
E4 M18 V17
N17
VMD0 VMD1 VMD2 VMD3 VMD4 VMD5 VMD6 VMD7 VMD8 VMD9 VMD10 VMD11 VMD12 VMD13 VMD14 VMD15 VMD16 VMD17 VMD18 VMD19 VMD20 VMD21 VMD22 VMD23 VMD24 VMD25 VMD26 VMD27 VMD28 VMD29 VMD30 VMD31
NC_VMD32 NC_VMD33 NC_VMD34 NC_VMD35 NC_VMD36 NC_VMD37 NC_VMD38 NC_VMD39 NC_VMD40 NC_VMD41 NC_VMD42 NC_VMD43 NC_VMD44 NC_VMD45 NC_VMD46 NC_VMD47 NC_VMD48 NC_VMD49 NC_VMD50 NC_VMD51 NC_VMD52 NC_VMD53 NC_VMD54 NC_VMD55 NC_VMD56 NC_VMD57 NC_VMD58 NC_VMD59 NC_VMD60 NC_VMD61 NC_VMD62 NC_VMD63
RED_ATI GREEN_ATI BLUE_ATI
AGP_RSET HSYNC_ATI
VSYNC_ATI
NC_ATI_MONID0
DDC_SDA_ATI DDC_SCLK_ATI
NC_ATI_MONID3 NC_ATI_MONDET
NC_ATI_DFPCLK NC_ATI_DFPDAT
25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25
24
X01 -- SUB FERRITES TO 500mA PART --SWH1017
25 25 25
25 25
25 25,46
R453
1 2
365-1%
AVSS1
24
+3.3V
0.1uF 16V CB508
1 2
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
A B
+3.3V
+2.5V_ATI
PKG_TYPE=R0805
SUB*_5990P
24
PKG_TYPE=R0805
SUB*_5990P
24
PKG_TYPE=R0805
SUB*_5990P
PKG_TYPE=R0805
SUB*_5990P
24
22uF 10V
1 2
C465
LB13
BLM21A601S
AVSS2
LB11
1 2
BLM21A601S
AVSS1
L53
BLM21A601S
24
LB14
1 2
BLM21A601S
AVSS2
0.1uF 16V
0.1uF 16V CB518
1 2
0.1uF 16V
22uF 10V
1 2
C486
21
ATI_TXVDDR
22uF 10V
1 2
C471
ATI_AVDD
22uF 10V
1 2
C456
21
22uF 10V
1 2
AVSS2
ATI_LPVDD
22uF 10V
1 2
C476
0.1uF 16V
CB497
CB48021CB537
21
21
0.1uF 16V
CB540 1 2
CB519
21
21
CB515
C457
21
ATI_PVDD
0.1uF 16V C458
1 2
C459
0.1uF 16V0.1uF 16V0.1uF 16V CB530
21
PCI VIDEO
0.1uF 16V
0.1uF 16V
0.1uF 16V
0.1uF 16V
CB533
21
0.1uF 16V
0.1uF 16V CB531
CB54121CB539
21
21
CB525
21
+3.3V
NC_RAGEXL_NC1 NC_RAGEXL_NC2 NC_RAGEXL_NC3 NC_RAGEXL_NC4 NC_RAGEXL_NC5 NC_RAGEXL_NC6 NC_RAGEXL_NC7 NC_RAGEXL_NC8 NC_RAGEXL_NC9 NC_RAGEXL_NC10 NC_RAGEXL_NC11 NC_RAGEXL_NC12 NC_RAGEXL_NC13 NC_RAGEXL_NC14 NC_RAGEXL_NC15
0.1uF 16V CB544
1 2
T4
VPP1
U6
VPP2
U9
VPP3
U14
VPP4
D4
VDDR1
D7
VDDR2
D10
VDDR3
D16
VDDR4
G4
VDDR5
H17
VDDR6
K17
VDDR7
M17
VDDR8
D8
VDDC1
L17
VDDC2
P4
VDDC3
U11
VDDC4
C5
TXVDDR1
C7
TXVDDR2
N4
AVDD
L3
PVDD
B9
LPVDD
B8
NC1
C8
NC2
C9
NC3
D2
NC4
D5
NC5
D6
NC6
M19
NC7
M20
NC8
N19
NC9
R3
NC10
U4
NC11
U5
NC12
U13
NC13
U17
NC14
V4
NC15
0.1uF 16V
22uF 10V
1 2
C470
CB514
21
U_ATI
TXVSSR1 TXVSSR2 TXVSSR3
RAGE PRO XL
HETERO 3 OF 3 SUB*_839RD
R454
1 2
0-5%
R452
1 2
0-5%
TITLE
DWG NO.
DATE
EVERGLADES 24 6-9-2003_13:56
0.1uF 16V CB542
1 2
D9
VSS1
D15
VSS2
H4
VSS3
J9
VSS4
J10
VSS5
J11
VSS6
J12
VSS7
J17
VSS8
K9
VSS9
K10
VSS10
K11
VSS11
K12
VSS12
L9
VSS13
L10
VSS14
L11
VSS15
L12
VSS16
M9
VSS17
M10
VSS18
M11
VSS19
M12
VSS20
R4
VSS21
T17
VSS22
U7
VSS23
U12
VSS24
K4
AVSS1
L4
AVSS2
A8 C4 C6
M4
PVSS
A9
LPVSS
AVSS2
AVSS1
COMPUTER CORPORATION
AUSTIN,TEXAS
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
X1004
6/6/2003
SHEET
DC
REV.
24 OF 51
2
3
4
A00-00
Page 25
B D
CA
X01 -- ADDED DECOUP NEAR SERIES TERM BECAUSE THEY SWITCH REF PLANES --SWH10/17
+3.3V
+3.3V
+3.3V
+3.3V
0.1uF 16V
0.1uF 16V
0.1uF 16V
0.1uF 16V 1 2
1 2
1 2
C474
C473
1
RN153
R_VMA0
24
R_VMA3
24
R_VMA1
24
R_VMA2
24
R_VMA4
24
R_VMA5
24
R_VMA6
24
2
3
R_VMA7
24
R_VMA8
24
R_VMA9
24
R_VCS0
24
R_VM_BA0
24
R_VMA10
24
R_VDQM3
24
R_VDQM2
24
R_VWE
24
R_VM_BA1
24
R_VRAS0
24
R_VDQM0
24
R_VDQM1
24
R_VCAS0
24
R_VMCKE
24
+3.3V
3 6
22-5%
RN154
4 5
22-5%
RN153
2 7
22-5%
RN153
1 8
22-5%
RN154
3 6
22-5%
RN154
2 7
22-5%
RN154
1 8
22-5%
RN152
4 5
22-5%
RN152
3 6
22-5%
RN152
2 7
22-5% RB416
22-5%
RN151
4 5
22-5%
RN152
1 8
22-5%
RN150
2 7
22-5%
RN150
3 6
22-5%
RN150
1 8
22-5%
RB413
1 2
22-5%
RN151
3 6
22-5%
RN151
1 8
22-5%
RN150
4 5
22-5%
RN151
2 7
22-5%
RN153
22-5%
C490
21
54
1 2
C489
VMA0
VMA3
VMA1
VMA2
VMA4
VMA5
VMA6
VMA7
VMA8
VMA9
VID_CS0
VM_BA0
VMA10
VDQM3
VDQM2
VWE
VM_BA1
VRAS0
VDQM0
VDQM1
VCAS0
VMCKE
FRONT_VIDEO_EN
25,46
VCC
U_VIDMUX
16
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
VM_BA1
25
VM_BA0
25
25 25 25 25 25 25 25 25 25 25 25
VWE
25
VID_CS0
25
VRAS0
25
VCAS0
25
VDQM0
25
VDQM1
25
VDQM2
25
VDQM3
25
VMCKE
25
CK_VM
24
NC_14_2MX32 NC_21_2MX32 NC_30_2MX32 NC_57_2MX32 NC_69_2MX32 NC_70_2MX32 NC_73_2MX32
+3.3V
1 15 29 43
23 22
VMA0 VMA1 VMA2 VMA3 VMA4 VMA5 VMA6 VMA7 VMA8 VMA9 VMA10
BE USED ON NEW DESIGNS
REPLACED WITH PART #4T398
25 26 27 60 61 62 63 64 65 66 24
17 20
THIS PART IS NOT TO
19 18
16 71 28 59
67 68
14 21 30 57 69
DELL PART #53RYH
70 73
44 58 72 86
Use sub_18360 for 4M option
ROOM=VGA
U_VIDMEM
VDD1
VDDQ1
VDD2
VDDQ2
VDD3
VDDQ3
VDD4
VDDQ4 VDDQ5 VDDQ6
BA1
VDDQ7
BA0
VDDQ8
A0
DQ0
A1
DQ1
A2
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
A8
DQ8
A9
DQ9
A10
DQ10 DQ11 DQ12
WE
DQ13
CS
DQ14 DQ15
RAS
DQ16
CAS
DQ17 DQ18
DQM0
DQ19
DQM1
DQ20
DQM2
DQ21
DQM3
DQ22
CKE
DQ23
CLK
DQ24 DQ25
NC1
DQ26
NC2
DQ27
NC3
DQ28
NC4
DQ29
NC5
DQ30
NC6
DQ31
NC7
VSS1
VSSQ1
VSS2
VSSQ2
VSS3
VSSQ3
VSS4
VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8
2Mx32
125MHz
SUB*_4T398
DDC_SDA_ATI
24
RED_ATI
24
GREEN_ATI
24
BLUE_ATI
3 9 35 41 49 55 75 81
2 4 5 7 8 10 11 13 74 76 77 79 80 82 83 85 31 33 34 36 37 39 40 42 45 47 48 50 51 53 54 56
6 12 32 38 46 52 78 84
VMD0 VMD1 VMD2 VMD3 VMD4 VMD5 VMD6 VMD7 VMD8
VMD9 VMD10 VMD11 VMD12 VMD13 VMD14 VMD15 VMD16 VMD17 VMD18 VMD19 VMD20 VMD21 VMD22 VMD23 VMD24 VMD25 VMD26 VMD27 VMD28 VMD29 VMD30 VMD31
24
24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
1 2
75-1%
75-1%
R473
+3.3V
C442
1 2
RB380
12
0.1uF 16V
1 2
75-1%
LB10
1 2
200mA
R481
8
4
7
9
12
SUB*_6276C
C441
24
24
VCC
GND
DA
DB
DC
DD
PI5V330
SUB*_785FH
VCC
12
C44
0.1uF 16V
1 2
+80%-20%
22uF 10V
HSYNC_ATI
VSYNC_ATI
EN IN
S1A S2A S1B S2B S1C S2C S1D S2D
1 2
CB457
12
CB468
0.1uF 16V
15 1
2 3 5 6 11 10 14 13
0.1uF 16V
VCC_SYNC_FIL
1 2
CB469
0.1uF 16V
RB309
1 2
220
RED_BACK
GREEN_BACK
BLUE_BACK
U_SYNC 74VHC125
14
U_SYNC 74VHC125
14 213
U_SYNC 74VHC125
14
12
13
DDC_SDA_FRONT
RED_FRONT
GREEN_FRONT
BLUE_FRONT
40 OHM @ 100M, 0.5 AMP 0805 FERRITE
22pF 50V
22pF 50V
C2421C23
21
645
46
46
46
46
22pF 50V
C22
21
RB375
1 2
R5
1 2 100-5%
L10
1 2
200mA
L11
1 2
200mA
L12
1 2
200mA
33-5%
R427
1 2
R415
33-5%
21
220
RB353
11
1 2
33-5%
SUB*_6276C
SUB*_6276C
SUB*_6276C
22pF 50V
21
HSYNC_BACK
VSYNC_BACK
PLACE NEAR CONNECTOR
VCC
13
D1
R16
1 2
2.2K-5%
22pF 50V
22pF 50V
C16
C17
21
50V-5%
47pF
C45
21
330pF 50V
1 2
C46
1N914
FRONT_DDC_PU
DDC_SDA_BACK_FILT
RED_BACK_FILT
GREEN_BACK_FILT
BLUE_BACK_FILT
C15
21
L19
1 2
200mA
120 ohm
0603
SUB*_99477
L20
1 2
200mA
120 ohm
0603
SUB*_99477
HSYNC_FRONT
VESA standard monitor modes:
HSYNC
OFFONON ON OFF
50V-5%
47pF
C31
MODEVSYNC
ON
Normal Standby (screen blank)
OFF
Shut down (low power) Off
OFF
25
23
HSYNC_BACK_FILT
21
VSYNC_BACK_FILT
330pF 50V
1 2
C32
46
ROOMS COMPLETE
ROOM=VGACON
NC_VGA4
DDC_VCC
NC_VGA11
ADD=ADD*_01157_VIDEO1 ADD1=ADD*_01157_VIDEO2
ADD2=ADD*_6X926_VIDEO3
VGA
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
NC1
17
NC2
18
G1
19
G2
20
G3
21
G4
15 PIN, DSUB
LT. BLUE PLASTIC
(JACKSCREWS)
(GASKET)
1
2
3
22uF 10V
1 2
C487
CB516
1 2
1 2
CB494
50V-20%
.01UF
CB532
0.1uF 16V
0.1uF 16V
21
+3.3V
0.1uF 16V
4
VIDEO SDRAM DECOUPLING
0.1uF 16V 50V-20%
1 2
CB521
.01UF
1 2
CB520
CB538
1 2
A B
CB517
1 2
0.1uF 16V0.1uF 16V CB496
1 2
0.1uF 16V CB504
1 2
0.1uF 16V CB505
1 2
VCC
1 2
CB527
0.1uF 16V
U_SYNC 74VHC125
14
9108
FRONT_VIDEO_EN
25,46
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
24,46
RB374
1 2
33-5%
DDC_SCLK_ATI
FRONT_DDC_PU
25
VSYNC_FRONT
R6
21
100-5%
to Control Panel.
46
R17
1 2
2.2K-5% DDC_SCLK_BACK_FILT
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
DC
COMPUTER CORPORATION
AUSTIN,TEXAS
REV.
SHEET
25 OF 51
6-9-2003_13:5625EVERGLADES
4
A00-00
Page 26
B D
CA
ROOM=CIOB-X2
+3.3V
1
PCIX_SCSI_AD62
26,43,51
PCIX_SCSI_AD60
ROOM=CIOB-X2
1
2
PCIX_PRI_AD0
33
PCIX_PRI_AD1
33
PCIX_PRI_AD2
33
PCIX_PRI_AD3
33
PCIX_PRI_AD4
33
PCIX_PRI_AD5
33
PCIX_PRI_AD6
33
PCIX_PRI_AD7
33
PCIX_PRI_AD8
33
PCIX_PRI_AD9
33
PCIX_PRI_AD10
33
PCIX_PRI_AD11
33
PCIX_PRI_AD12
33
PCIX_PRI_AD13
33
PCIX_PRI_AD14
33
PCIX_PRI_AD15
33
PCIX_PRI_AD16
33
PCIX_PRI_AD17
33
PCIX_PRI_AD18
33
PCIX_PRI_AD19
33
PCIX_PRI_AD20
33
PCIX_PRI_AD21
33
PCIX_PRI_AD22
33
PCIX_PRI_AD23
33
PCIX_PRI_AD24
33
PCIX_PRI_AD25
33
PCIX_PRI_AD26
33
PCIX_PRI_AD27
33
PCIX_PRI_AD28
33
PCIX_PRI_AD29
33
PCIX_PRI_AD30
33
PCIX_PRI_AD31
33
PCIX_PRI_AD32
33
PCIX_PRI_AD33
33
PCIX_PRI_AD34
33
PCIX_PRI_AD35
33
PCIX_PRI_AD36
33
PCIX_PRI_AD37
33
PCIX_PRI_AD38
33
PCIX_PRI_AD39
33
PCIX_PRI_AD40
33
PCIX_PRI_AD41
33
PCIX_PRI_AD42
33
PCIX_PRI_AD43
33
PCIX_PRI_AD44
33
PCIX_PRI_AD45
33
PCIX_PRI_AD46
33
PCIX_PRI_AD47
33
PCIX_PRI_AD48
33
PCIX_PRI_AD49
33
PCIX_PRI_AD50
33
PCIX_PRI_AD51
33
PCIX_PRI_AD52
33
PCIX_PRI_AD53
33
PCIX_PRI_AD54
33
PCIX_PRI_AD55
33
PCIX_PRI_AD56
33
PCIX_PRI_AD57
33
PCIX_PRI_AD58
33
PCIX_PRI_AD59
33
PCIX_PRI_AD60
33
PCIX_PRI_AD61
33
PCIX_PRI_AD62
33
PCIX_PRI_AD63
33
3
N23 R25 N25 U22 M22 P24 K21 R22 P22 L22 N22 J22 M24 J25 M25 H22 E23 F24 D24 F25 C25 G21 B25 E22 A23 C24 A24 D23 B23 C22 A21 A22 T21 W21 T22 U25 P25 W22 R23 W23 U23 W25 T25
AA22
V22
AA23
V24
AA25
V25
AB20
Y22
AC24
Y24
AC25
Y25 AC21 AB23 AE24 AB24 AD22 AB25 AE23 AB21 AE22
SERVERWORKS CIOB-X2 VER. 1.0
1K037 IS CIOBX2 REV A1.1 P0778 IS CIOBX2 REV A1.5
P_AD0 P_AD1 P_AD2 P_AD3 P_AD4 P_AD5 P_AD6 P_AD7 P_AD8 P_AD9 P_AD10 P_AD11 P_AD12 P_AD13 P_AD14 P_AD15 P_AD16 P_AD17 P_AD18 P_AD19 P_AD20 P_AD21 P_AD22 P_AD23 P_AD24 P_AD25 P_AD26 P_AD27 P_AD28 P_AD29 P_AD30 P_AD31 P_AD32 P_AD33 P_AD34 P_AD35 P_AD36 P_AD37 P_AD38 P_AD39 P_AD40 P_AD41 P_AD42 P_AD43 P_AD44 P_AD45 P_AD46 P_AD47 P_AD48 P_AD49 P_AD50 P_AD51 P_AD52 P_AD53 P_AD54 P_AD55 P_AD56 P_AD57 P_AD58 P_AD59 P_AD60 P_AD61 P_AD62 P_AD63
HETERO 1 OF 3
U_CIOBX2
PRIMARY PCI-X BUS
P_PCICAP1 P_PCICAP2
P_CBE0 P_CBE1 P_CBE2 P_CBE3 P_CBE4 P_CBE5 P_CBE6 P_CBE7
P_REQ0 P_REQ1 P_REQ2 P_REQ3 P_REQ4 P_REQ5 P_REQ6
P_GNT0 P_GNT1 P_GNT2 P_GNT3 P_GNT4 P_GNT5 P_GNT6
P_TRDY P_STOP P_LOCK
P_IRDY
P_FRAME
P_DEVSEL
P_PAR P_PERR P_SERR
P_REQ64 P_ACK64 P_PAR64
P_SIL
P_SOD
P_SOR
P_M66EN
P_PCIRST
PCLKO PFBCLK
L25 L23 H24 D25 AE21 AD25 AD20 AD23
B20 A20 A19 C19 B22 A18 D20
D21 B18 A17 A16 A15 B14 A14
F22 G22 J23
H25 E25 K22
G23 K25 K24
N21 T24 AC22
C15 D19 D16
C17 C21 E19
D18
AA4 AD3
SUB*_P0778
PCIX_PRI_CBE0 PCIX_PRI_CBE1 PCIX_PRI_CBE2 PCIX_PRI_CBE3 PCIX_PRI_CBE4 PCIX_PRI_CBE5 PCIX_PRI_CBE6 PCIX_PRI_CBE7
PCIX_PRI_REQ0 PCIX_PRI_REQ1 PCIX_PRI_REQ2 PCIX_PRI_REQ3 PCIX_PRI_REQ4
R_CK_PCIX_P_GB0_133M
NC_PCIX_CLK_3
PCIX_PRI_GNT0 PCIX_PRI_GNT1
PCIX_PRI_GNT2 PCIX_PRI_GNT3
PCIX_PRI_GNT4 NC_PCIX_CLK_1 NC_PCIX_CLK_2
PCIX_PRI_TRDY
PCIX_PRI_STOP PCIX_PRI_LOCK
PCIX_PRI_IRDY PCIX_PRI_FRAME PCIX_PRI_DEVSEL
PCIX_PRI_PAR
PCIX_PRI_PERR
PCIX_PRI_SERR
PCIX_PRI_REQ64 PCIX_PRI_ACK64 PCIX_PRI_PAR64
NC_CIOB_C15 NC_CIOB_D19
CIOB_PRI_SOR
PCIX_PRI_M66EN PCIX_PRI_CAP1 PCIX_PRI_CAP2
PCIX_PRI_RST
R_CK_PCIX_PRI_133M
CK_PCIX_PRI_FB_133M
ADD=ADD*_3M858_U_CIOBX2
CIOBX2 heatsink (U_CIOBX2)
33 33 33 33 33 33 33 33
27,33 27 27 27 27
27,33 27
27 27 27
33 33 33
33 33 33
33 33 33
33 33 33
33 33 33
33
SUB IN P/N FOR HT SNK WITH EPOXY
26
+3.3V
RB124
1 2
R282
22-5%
4.7K
21
PCIX_SCSI_AD0
43,51
PCIX_SCSI_AD1
43,51
PCIX_SCSI_AD2
43,51
PCIX_SCSI_AD3
43,51
PCIX_SCSI_AD4
43,51
PCIX_SCSI_AD5
43,51
PCIX_SCSI_AD6
43,51
PCIX_SCSI_AD7
43,51
PCIX_SCSI_AD8
43,51
PCIX_SCSI_AD9
43,51
PCIX_SCSI_AD10
43,51
PCIX_SCSI_AD11
43,51
PCIX_SCSI_AD12
43,51
PCIX_SCSI_AD13
43,51
PCIX_SCSI_AD14
43,51
PCIX_SCSI_AD15
43,51
PCIX_SCSI_AD16
43,51
PCIX_SCSI_AD17
43,51
PCIX_SCSI_AD18
43,51
PCIX_SCSI_AD19
43,51
PCIX_SCSI_AD20
43,51
PCIX_SCSI_AD21
43,51
PCIX_SCSI_AD22
43,51
PCIX_SCSI_AD23
43,51
PCIX_SCSI_AD24
43,51
PCIX_SCSI_AD25
43,51
PCIX_SCSI_AD26
43,51
PCIX_SCSI_AD27
43,51
PCIX_SCSI_AD28
43,51
PCIX_SCSI_AD29
43,51
PCIX_SCSI_AD30
43,51
PCIX_SCSI_AD31
43,51
PCIX_SCSI_AD32
26,43,51
PCIX_SCSI_AD33
26,43,51
PCIX_SCSI_AD34
26,43,51
PCIX_SCSI_AD35
26,43,51
PCIX_SCSI_AD36
26,43,51
PCIX_SCSI_AD37
26,43,51
PCIX_SCSI_AD38
26,43,51
PCIX_SCSI_AD39
26,43,51
PCIX_SCSI_AD40
26,43,51
PCIX_SCSI_AD41
26,43,51
PCIX_SCSI_AD42
26,43,51
PCIX_SCSI_AD43
26,43,51
PCIX_SCSI_AD44
26,43,51
PCIX_SCSI_AD45
26,43,51
PCIX_SCSI_AD46
26,43,51
PCIX_SCSI_AD47
26,43,51
PCIX_SCSI_AD48
26,43,51
PCIX_SCSI_AD49
26,43,51
PCIX_SCSI_AD50
26,43,51
PCIX_SCSI_AD51
26,43,51
PCIX_SCSI_AD52
26,43,51
PCIX_SCSI_AD53
26,43,51
PCIX_SCSI_AD54
26,43,51
PCIX_SCSI_AD55
26,43,51
PCIX_SCSI_AD56
26,43,51
PCIX_SCSI_AD57
26,43,51
PCIX_SCSI_AD58
26,43,51
PCIX_SCSI_AD59
26,43,51
PCIX_SCSI_AD60
26,43,51
PCIX_SCSI_AD61
26,43,51
PCIX_SCSI_AD62
26,43,51
PCIX_SCSI_AD63
26,43,51
THERE IS A NEWER SYMBOL IN THE LIBRARY!
ROOM=CIOB-X2
U_CIOBX2
M2
S_AD0
G1
S_AD1
L1
S_AD2
G4
S_AD3
L4
S_AD4
E3
S_AD5
K1
S_AD6
E1
S_AD7
D2
S_AD8
K5
S_AD9
C1
S_AD10
H1
S_AD11
B1
S_AD12
H2
S_AD13
C2
S_AD14
G3
S_AD15
A4
S_AD16
B6
S_AD17
G5
S_AD18
A7
S_AD19
C5
S_AD20
D5
S_AD21
A6
S_AD22
B8
S_AD23
C7
S_AD24
D6
S_AD25
D7
S_AD26
A10
S_AD27
A8
S_AD28
E7
S_AD29
D8
S_AD30
B10
S_AD31
N5
S_AD32
J4
S_AD33
N4
S_AD34
J1
S_AD35
P4
S_AD36
J3
S_AD37
P2
S_AD38
K2
S_AD39
P1
S_AD40
L3
S_AD41
R3
S_AD42
M4
S_AD43
T2
S_AD44
N3
S_AD45
U4
S_AD46
N1
S_AD47
U1
S_AD48
R4
S_AD49
V2
S_AD50
R1
S_AD51
W3
S_AD52
T5
S_AD53
W1
S_AD54
T1
S_AD55
Y2
S_AD56
T4
S_AD57
AA1
S_AD58
U3
S_AD59
AB2
S_AD60
V1
S_AD61
AB1
S_AD62
V4
S_AD63
SERVERWORKS CIOB-X2 VER. 1.0
SECONDARY PCI-X BUS
S_PCICAP1 S_PCICAP2
HETERO 2 OF 3
S_CBE0 S_CBE1 S_CBE2 S_CBE3 S_CBE4 S_CBE5 S_CBE6 S_CBE7
S_REQ0 S_REQ1 S_REQ2 S_REQ3 S_REQ4 S_REQ5
S_GNT0 S_GNT1 S_GNT2 S_GNT3 S_GNT4 S_GNT5
S_TRDY S_STOP S_LOCK
S_IRDY
S_FRAME
S_DEVSEL
S_PAR S_PERR S_SERR
S_REQ64 S_ACK64 S_PAR64
S_SIL
S_SOD
S_SOR
S_M66EN
S_PCIRST
SCLKO SFBCLK
K4 A2 C4 A9 W4 AC1 Y1 AD1
D11 D9 C11 E10 A11 D10
D12 A12 C13 B12 A13 D13
F2 D1 E4
A5 F4 B4
F1 A3 B3
M1 H4 AC2
D15 B16 E13
D3 E16 D14
C9
AB3 AE2
PCIX_SCSI_CBE0 PCIX_SCSI_CBE1 PCIX_SCSI_CBE2 PCIX_SCSI_CBE3 PCIX_SCSI_CBE4 PCIX_SCSI_CBE5 PCIX_SCSI_CBE6 PCIX_SCSI_CBE7
PCIX_SCSI_REQ0 PCIX_SCSI_REQ1 PCIX_SCSI_REQ2 PCIX_SCSI_REQ3
PCIX_SCSI_GNT0 PCIX_SCSI_GNT1 PCIX_SCSI_GNT2 PCIX_SCSI_GNT3
PCIX_SCSI_TRDY
PCIX_SCSI_PAR PCIX_SCSI_PERR PCIX_SCSI_SERR
PCIX_SCSI_REQ64 PCIX_SCSI_ACK64 PCIX_SCSI_PAR64
NC_CIOB_D15 NC_CIOB_B16
CIOB_SCSI_SOR
PCIX_SCSI_M66EN PCIX_SCSI_CAP1 PCIX_SCSI_CAP2
R_CK_PCIX_S_RAID_100M
R_CK_PCIX_SCSI_IDSELBLOCK_100M
PCIX_SCSI_STOP
PCIX_SCSI_LOCK
PCIX_SCSI_IRDY PCIX_SCSI_FRAME
PCIX_SCSI_DEVSEL
PCIX_SCSI_RST
R_CK_PCIX_SCSI
CK_PCIX_SCSI_FB_100M
43,51 43,51 43,51 43,51 26,43,51 26,43,51 26,43,51 26,43,51
27,43 27,51 27 27
27,43 27,51 12 26,27
R_CK_PCIX_LSI_100M
NC_PCIX_CLK_4
26,43,51 26,43,51 26
26,43,51 26,43,51 26,43,51
43,51 26,43,51 26,43,51
26,43,51 26,43,51 26,43,51
26,51 26 26
43,51
R283
1 2
22-5%
+3.3V
21
RB125
26
26
26
4.7K
26,43,51
PCIX_SCSI_CBE6
26,43,51
PCIX_SCSI_CBE5
26,43,51
PCIX_SCSI_SERR
26,43,51
PCIX_SCSI_STOP
26,43,51
PCIX_SCSI_TRDY
26,43,51
PCIX_SCSI_PERR
26,43,51
PCIX_SCSI_LOCK
26
PCIX_SCSI_FRAME
26,43,51
PCIX_SCSI_DEVSEL
26,43,51
PCIX_SCSI_IRDY
26,43,51
PCIX_SCSI_AD43
26,43,51
PCIX_SCSI_AD41
26,43,51
PCIX_SCSI_AD34
26,43,51
PCIX_SCSI_AD32
26,43,51
PCIX_SCSI_AD35
26,43,51
PCIX_SCSI_AD39
26,43,51
PCIX_SCSI_AD33
26,43,51
PCIX_SCSI_AD37
26,43,51
PCIX_SCSI_AD49
26,43,51
PCIX_SCSI_AD42
26,43,51
PCIX_SCSI_AD40
26,43,51
PCIX_SCSI_AD53
26,43,51
PCIX_SCSI_AD47
26,43,51
PCIX_SCSI_AD45
26,43,51
PCIX_SCSI_AD36
26,43,51
PCIX_SCSI_AD38
26,43,51
PCIX_SCSI_AD51
26,43,51
PCIX_SCSI_AD46
26,43,51
PCIX_SCSI_AD44
26,43,51
PCIX_SCSI_AD57
26,43,51
PCIX_SCSI_AD55
26,43,51
PCIX_SCSI_AD48
26,43,51
PCIX_SCSI_AD50
26,43,51
PCIX_SCSI_AD61
26,43,51
PCIX_SCSI_AD59
26,43,51
PCIX_SCSI_AD52
26,43,51
PCIX_SCSI_AD54
26,43,51
PCIX_SCSI_CBE4
26,43,51
PCIX_SCSI_AD58
26,43,51
PCIX_SCSI_AD56
26,43,51
PCIX_SCSI_AD63
26,43,51
PCIX_SCSI_ACK64
26,43,51
PCIX_SCSI_PAR64
26,43,51
PCIX_SCSI_REQ64
26,43,51
PCIX_SCSI_CBE7
26,43,51
PCIX_SCSI_M66EN
26,51
SCSI PCIX Clock Speed
21
Set to 133MHz, PCI-X
26,27
26,51
26 26
PCIX_SCSI_CAP1 PCIX_SCSI_CAP2 PCIX_SCSI_GNT3 PCIX_SCSI_M66EN
RB120
5.1K
Primary PCI-X Clocks
R_CK_PCIX_P_GB0_133M
26
R257
22-5%
PCIX_PRI_CLK_133M
21
33
2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
RN123
5.1K 5%
RN115
5.1K 5%
RN114
5.1K 5%
RN117
5.1K 5%
RN116
5.1K 5%
RN119
5.1K 5%
RN118
5.1K 5%
RN121
5.1K 5%
RN120
5.1K 5%
RN122
5.1K 5%
RNB57
5.1K 5%
RNB58
5.1K 5%
RB122
1 2
5.1K
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
+3.3V+3.3V+3.3V
RB131
RB129
1
2
3
+3.3V
5.1K
RB132
1 2
1 2
NP*
12
5.1K 5.1K
1 2
CB288
0.1uF 16V
SCSI Bus PCI-X Clocks
R_CK_PCIX_S_RAID_100M
4 4
ROOM=CIOB-X2
A B
26
R_CK_PCIX_LSI_100M
26
R_CK_PCIX_SCSI_IDSELBLOCK_100M
26
R271
CK_PCIX_SCSI_RAID_100M
21
22-5%
R270
21
22-5%
R251
21
22-5%
CK_PCIX_SCSI_LSI_100M
CK_PCIX_SCSI_IDSELBLOCK_100M
51
43
51
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
DC
COMPUTER CORPORATION AUSTIN,TEXAS
REV.
SHEET
26 OF 51
6-9-2003_13:5626EVERGLADES
A00-00
Page 27
B D
CA
ROOM=CIOB-X2
+3.3V
A_IMB_DN_D0
12
A_IMB_DN_D1
2.2-5%
12 12
47uH 135MA
C350
21
21
C313
0.1uF 16V
12
A_IMB_DN_D2
12
A_IMB_DN_D3
12
A_IMB_DN_D4
12
A_IMB_DN_D5
12
A_IMB_DN_D6
12
A_IMB_DN_D7
12
A_IMB_DN_D8
12
A_IMB_DN_D9
12
A_IMB_DN_D10
12
A_IMB_DN_D11
12
A_IMB_DN_D12
12
A_IMB_DN_D13
12
A_IMB_DN_D14
12
A_IMB_DN_D15
12
A_IMB_DN_CLK_N A_IMB_DN_CLK_P
A_IMB_DN_CON
12
A_IMB_DN_PAR
12
21
1 2
CB287
CB286
0.1uF 16V
27 27 27
21
C312
0.1uF 16V
0.1uF 16V
IMB_COMP0 IMB_COMP1 IMB_COMP2
IMBVREF
1
+2.5V
R280
1 2 21
L47
22uF 6.3V
+1.5V
21
R263
100-1%
1 2
100-1%
21
CB265
1uF 6.3V
2
R262
3
+2.5V
AE19 AE18 AB17 AB19 AA19 AB18 AC19 AE17 AD18 AB15 AE13 AD14 AB16 AE15 AE14 AC15
AE16 AD16 AB14 AB6 AC17 AC7
AE4 AD5
AE3 AD4
AE12 AB13 AC13
AD12
+1.5V
AA7
AA9 AA11 AA13 AA15 AA17
AC6
AC8 AC10 AC12 AC14 AC16 AC18
K10
K11
K12
K13
K14
K15
K16
L10
L16
M10
M16
N10
N16
P10
P16
R10
R16
T10
T11
T12
T13
T14
T15
T16
SERVERWORKS CIOB-X2 VER. 1.0
U_CIOBX2
IMBD_R0 IMBD_R1 IMBD_R2 IMBD_R3 IMBD_R4 IMBD_R5 IMBD_R6 IMBD_R7 IMBD_R8 IMBD_R9 IMBD_R10 IMBD_R11 IMBD_R12 IMBD_R13 IMBD_R14 IMBD_R15
IMBCLK_R_N IMBCLK_R_P IMBCON_R IMBCON_T IMBPAR_R IMBPAR_T
AVDD1 AVDD2
AGND1 AGND2
IMBCOMP0 IMBCOMP1 IMBCOMP2
VREFIMB
VDD_1_5_1 VDD_1_5_2 VDD_1_5_3 VDD_1_5_4 VDD_1_5_5 VDD_1_5_6 VDD_1_5_7 VDD_1_5_8 VDD_1_5_9 VDD_1_5_10 VDD_1_5_11 VDD_1_5_12 VDD_1_5_13
VCC25_1 VCC25_2 VCC25_3 VCC25_4 VCC25_5 VCC25_6 VCC25_7 VCC25_8 VCC25_9 VCC25_10 VCC25_11 VCC25_12 VCC25_13 VCC25_14 VCC25_15 VCC25_16 VCC25_17 VCC25_18 VCC25_19 VCC25_20 VCC25_21 VCC25_22 VCC25_23 VCC25_24
HETERO 3 OF 3
IMBD_T0 IMBD_T1 IMBD_T2 IMBD_T3 IMBD_T4 IMBD_T5 IMBD_T6 IMBD_T7 IMBD_T8
IMBD_T9 IMBD_T10 IMBD_T11 IMBD_T12 IMBD_T13 IMBD_T14 IMBD_T15
IMB BUS
IMBCLK_T_N IMBCLK_T_P
PCIRST PLLRST
CLKIN ALERT
SDA SCK
RSVD_G25
RSVD_AE20
TESTMODE
VDD_3_3_1 VDD_3_3_2 VDD_3_3_3 VDD_3_3_4 VDD_3_3_5 VDD_3_3_6 VDD_3_3_7 VDD_3_3_8
VDD_3_3_9 VDD_3_3_10 VDD_3_3_11 VDD_3_3_12 VDD_3_3_13 VDD_3_3_14 VDD_3_3_15 VDD_3_3_16 VDD_3_3_17 VDD_3_3_18 VDD_3_3_19 VDD_3_3_20 VDD_3_3_21 VDD_3_3_22 VDD_3_3_23 VDD_3_3_24 VDD_3_3_25 VDD_3_3_26 VDD_3_3_27 VDD_3_3_28 VDD_3_3_29 VDD_3_3_30 VDD_3_3_31 VDD_3_3_32 VDD_3_3_33 VDD_3_3_34 VDD_3_3_35 VDD_3_3_36 VDD_3_3_37 VDD_3_3_38 VDD_3_3_39
POWER/GROUND
VDD_3_3_40 VDD_3_3_41 VDD_3_3_42 VDD_3_3_43 VDD_3_3_44 VDD_3_3_45 VDD_3_3_46 VDD_3_3_47 VDD_3_3_48 VDD_3_3_49 VDD_3_3_50 VDD_3_3_51 VDD_3_3_52
AB11 AB12 AC11 AB10 AE10 AE9 AD10 AE11 AC9 AD6 AE6 AB9 AE7 AB8 AB7 AA6
AD8 AE8
D17 AA3 AC4 AB5 W5
Y4 G25
AE20 AC5
B2 B24 C6 C8 C10 C12 C14 C16 C18 C20 D4 D22 E6 E9 E12 E15 E17 E20 F3 F5 F21 F23 H3 H23 J5 J21 K3 K23 M3 M5 M21 M23 P3 P23 R5 R21 T3 T23 U5 U21 V3 V23 Y3 Y5 Y21 Y23 AA20 AB4 AB22 AD2 AD21 AD24
A_IMB_UP_D0 A_IMB_UP_D1 A_IMB_UP_D2 A_IMB_UP_D3 A_IMB_UP_D4 A_IMB_UP_D5 A_IMB_UP_D6 A_IMB_UP_D7 A_IMB_UP_D8 A_IMB_UP_D9 A_IMB_UP_D10 A_IMB_UP_D11 A_IMB_UP_D12 A_IMB_UP_D13 A_IMB_UP_D14 A_IMB_UP_D15
A_IMB_UP_CLK_N A_IMB_UP_CLK_P A_IMB_UP_CON A_IMB_UP_PAR
PCI_RST_CIOB PLLRST_CIOB CK_33M_CIOB GPE_CIOB1_ALERT
NC_CIOB_G25 NC_CIOB_AE20
TESTMODE
+3.3V
47 47 5 12,18
27
1
12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12
12 12 12 12
+3.3V
R243
1 2 20K-1%
NP* R240
1 2 20K-1%
NP*
X01--CHANGED TO 3.3V BUS, ADDED ZERO OHMS AND PULL-UPS --SWH 10/1
R241
1 2
ENV_SEG4_SDA
0-5% R242
1 2
ENV_SEG4_SCL
0-5%
27
27
27
27
TESTMODE
IMB_COMP2
IMB_COMP0
IMB_COMP1
21,28,37
21,28,37
1 2
100-1%
1 2
100-1%
249 Ohm-1%
1K-5%
RB130
RB121
RB123
RB128
+2.5V
12
+1.5V
21
26,33
26,43
26,51
26 26 26
26 26
26
26
26
PCIX_PRI_REQ0 PCIX_PRI_REQ1 PCIX_PRI_REQ2 PCIX_PRI_REQ4
PCIX_PRI_GNT4 PCIX_PRI_REQ3 NC_PCIX_PRI_REQ5 NC_PCIX_PRI_REQ6
PCIX_SCSI_REQ2 NC_PCIX_SCSI_REQ4 PCIX_SCSI_GNT3 PCIX_SCSI_REQ0
NC_PCIX_SCSI_REQ5 PCIX_SCSI_REQ3 PCIX_SCSI_REQ1 NC_PCIX_SCSI_GNT4
Strapping Descriptions
Signal
PCIX_PRI_GNT0
PCIX_PRI_GNT1
PCIX_PRI_GNT2
PCIX_SCSI_GNT0
PCIX_SCSI_GNT3
TESTMODE
ALERT
see p. 12
GPE_CIOB1_ALERT
SDA
SCL
PCIX_SCSI_GNT2
CIOB-X2 APLL ENABLE/DISABLE :
0=APLL Configured in pass through mode 1=APLL is Enabled and configured to lock
I2C ADDRESS SELECTION
0=I2C ID set to C4h 1=I2C ID set to C8h
Primary Hot Plug Controller Enable 0=Disable hot-plug controller
1=Enable hot plug controller
Config-Map 0=Respond to all Type 0 access on IMB.
Bit[1:0] used in decode.
1=Will respond to all Type 0 access on IMB.
Bit[2:0] used in decode.
Secondary Hot Plug Controller Enable 0=Disable hot-plug controller
1=Enable hot plug controller APLL Test Mode
0=CIOB-X2 configured for Test Mode 1=CIOB-X2 configured for normal operation
IMB CRC Mode
0=IMB configured for parity mode 1=IMB configured for CRC mode
IMB Training Mode
0=Disable IMB cold training 1=Enable IMB cold training
IMB Deterministic Mode
0=Enable IMB deterministic mode 1=Disable IMB deterministic mode
IMB Deterministic Mode Clock
If TESTMODE=0
0=XOR Test mode 1=APLL Test mode
If TESTMODE=1
0=FIFO RD pntr lags FIFO WR pntr by 6 clocks 1=FIFO RD pntr lags FIFO WR pntr by 5 clocks
Description
Configuration
1=APLL is in normal mode
1=I2C Address=C8h
0=Primary hot plug controller
disabled
1=Bit[1:0] used in Type 0
access decode.
0=Secondary hot plug controller
disabled
1=CIOB-X2 configured for
normal operations
1=IMB configured for CRC mode
1=Enable IMB cold training
1=Disable IMB deterministic mode
TESTMODE=1
1=FIFO RD pntr lags FIFO
WR pntr by 5 clocks
8
RN111
2
7 6
3
5.1K
4
5
5%
1
8
RN110
7
2
6
3
5.1K
5
4
5%
1
8
RN113
2
7
3
6
5.1K
4
5
5%
8
1
RN112
7
2 3
6
5.1K
4
5
5%
PCIX_PRI_GNT0
26,33
PCIX_PRI_GNT1
26
PCIX_PRI_GNT2
26
PCIX_PRI_GNT3
26
PCIX_SCSI_GNT0
26,43
PCIX_SCSI_GNT1
26,51
Primary PCI Bus Speed and Mode
Signal
PCICAP1
see p. 33
PCICAP2
see p. 33
M66EN
P_GNT[3]
Description
Primary PCI Bus Mode Select 0=Primary PCI configured as PCI
1=Primary PCI configured as PCI-X Primary PCI Bus Mode Select
(when PCICAP1=1)
0 = 66MHz
1 = 100MHz or 133MHz
Primary PCI Bus Speed Select
0 = 133MHz 1 = 100MHz
SCSI PCI Bus Speed and Mode
Signal
PCICAP1
see p. 26
PCICAP2
see p. 26
M66EN
see p. 26
P_GNT[3]
see p. 26
Description
Primary PCI Bus Mode Select 0=Primary PCI configured as PCI
1=Primary PCI configured as PCI-X Primary PCI Bus Mode Select
(when PCICAP1=1)
0 = 66MHz
1 = 100MHz or 133MHz
Primary PCI Bus Speed Select
0 = 133MHz 1 = 100MHz
+3.3V
RB114
RB113
XXX
XXX
CIOBX2 Strapping
+3.3V
+3.3V
21
R255
5.1K
5.1K
5.1K
RB117
1 2
21
5.1K
RB119
NP*
1 2
NP*
21
R256
5.1K
5.1K
1 2
NP*
+3.3V
+3.3V
21
R261
5.1K
RB116
NP*
R260
5.1K
RB118
1 2
Config
PCI_X 133 MHz PCICAP1 = 1 PCICAP2 = 1 M66EN = X PCIX_GNT2 = 0
Config
PCI_X 133 MHz PCICAP1 = 1 PCICAP2 = 1 M66EN = X PCIX_GNT3 = 1
+3.3V
5.1K
RB126
5.1K 1 2
1 2
21
5.1K
1 2
NP*
RB127
NP*
5.1K
1
2
3
+1.5V
22uF 10V
22uF 10V
1 2
1 2
C310
C323
+2.5V
21
CB261
0.1uF 16V
1 2
CB256
21
C318
0.1uF 16V
1 2
C30621CB268
0.1uF 16V
0.1uF 16V
1 2
CB275
0.1uF 16V
0.1uF 16V
4 4
22uF 10V
22uF 10V
1 2
1 2
C349
C331
21
21
CB27721CB26721CB257
CB270
0.1uF 16V
0.1uF 16V
0.1uF 16V
CB266
0.1uF 16V
1 2
0.1uF 16V
21
CB260
1 2
CB258
0.1uF 16V
CB279
0.1uF 16V
A B
21
0.1uF 16V
+3.3V
22uF 10V
1 2
C339
22uF 10V
1 2
C290
22uF 10V
1 2
C342
21
CB262
1 2
CB259
0.1uF 16V
0.1uF 16V
21
CB246
1 2
CB27821CB264
0.1uF 16V
0.1uF 16V
1 2
CB276
0.1uF 16V
0.1uF 16V
21
C347
1 2
CB25421C295
0.1uF 16V
0.1uF 16V
21
.01UF
1 2
CB263
1 2
CB28021CB255
0.1uF 16V
0.1uF 16V
0.1uF 16V
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
1 2
C343
CB247
0.1uF 16V
0.1uF 16V
50V-20%
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
AUSTIN,TEXAS
SHEET
DC
REV.
27 OF 51
6-9-2003_13:5627EVERGLADES
A00-00
Page 28
B D
X01--BUFFERED CLOCK, ADDED PULL-UPS, FIXED CONNECTION --SWH 10/1/02
CA
CIOB-E: PCI-X/Gigabit
Q8
PCIX_SEC_GNT3_CIOBE
28
1
2
3
31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33 31,33
31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31
28
PCIX_SEC_AD0 PCIX_SEC_AD1 PCIX_SEC_AD2 PCIX_SEC_AD3 PCIX_SEC_AD4 PCIX_SEC_AD5 PCIX_SEC_AD6 PCIX_SEC_AD7 PCIX_SEC_AD8 PCIX_SEC_AD9 PCIX_SEC_AD10 PCIX_SEC_AD11 PCIX_SEC_AD12 PCIX_SEC_AD13 PCIX_SEC_AD14 PCIX_SEC_AD15 PCIX_SEC_AD16 PCIX_SEC_AD17 PCIX_SEC_AD18 PCIX_SEC_AD19 PCIX_SEC_AD20 PCIX_SEC_AD21 PCIX_SEC_AD22 PCIX_SEC_AD23 PCIX_SEC_AD24 PCIX_SEC_AD25 PCIX_SEC_AD26 PCIX_SEC_AD27 PCIX_SEC_AD28 PCIX_SEC_AD29 PCIX_SEC_AD30 PCIX_SEC_AD31 PCIX_SEC_AD32 PCIX_SEC_AD33 PCIX_SEC_AD34 PCIX_SEC_AD35 PCIX_SEC_AD36 PCIX_SEC_AD37 PCIX_SEC_AD38 PCIX_SEC_AD39 PCIX_SEC_AD40 PCIX_SEC_AD41 PCIX_SEC_AD42 PCIX_SEC_AD43 PCIX_SEC_AD44 PCIX_SEC_AD45 PCIX_SEC_AD46 PCIX_SEC_AD47 PCIX_SEC_AD48 PCIX_SEC_AD49 PCIX_SEC_AD50 PCIX_SEC_AD51 PCIX_SEC_AD52 PCIX_SEC_AD53 PCIX_SEC_AD54 PCIX_SEC_AD55 PCIX_SEC_AD56 PCIX_SEC_AD57 PCIX_SEC_AD58 PCIX_SEC_AD59 PCIX_SEC_AD60 PCIX_SEC_AD61 PCIX_SEC_AD62 PCIX_SEC_AD63
PCIX_SEC_GNT0_CIOBE
3 D
Q7
2
3 D
S
1
G
2N7002
K4
AD0
M1
AD1
P3
AD2
N1
AD3
H2
AD4
H1
AD5
G1
AD6
F2
AD7
K2
AD8
D1
AD9
J4
AD10
H4
AD11
E1
AD12
G3
AD13
E3
AD14
B2
AD15
D9
AD16
F3
AD17
D3
AD18
A4
AD19
D4
AD20
C8
AD21
B1
AD22
E4
AD23
C7
AD24
B4
AD25
D6
AD26
C5
AD27
A2
AD28
A5
AD29
D10
AD30
A8
AD31
AA3
AD32
AA1
AD33
Y3
AD34
AB2
AD35
AC1
AD36
Y4
AD37
W3
AD38
V4
AD39
U4
AD40
AB1
AD41
Y1
AD42
U3
AD43
T3
AD44
U1
AD45
T2
AD46
K1
AD47
R3
AD48
T1
AD49
R1
AD50
V1
AD51
R4
AD52
T4
AD53
L1
AD54
Y2
AD55
P4
AD56
P1
AD57
N4
AD58
W4
AD59
P2
AD60
M2
AD61
N3
AD62
J1
AD63
SERVERWORKS CIOB-E VER 1.1
F0642 is A1.2 rev
SUB IN P/N FOR HT SNK WITH EPOXY
PCIX_SEC_GNT3
2 S
+12V
1
G
2N7002
PCIX_SEC_GNT0
+12V
X01-- BLOCK GNTS WHEN SYSTEM OFF-­CIOBE A1.1 DRIVES THESE HIGH WHEN NO POWER
--STUART 10/4
U_CIOBE
PRIMARY PCI-X BUS
RESERVED1 RESERVED2 RESERVED3
P_M66EN
PCICAP1 PCICAP2
PCI_RST
PCIRST_N
PCI_CLK_PAD
P0_INTA
CIOBE_AVDD_1 CIOBE_DVDD_1 CIOBE_DVDD_2
CIOBE_AGND_1 CIOBE_DGND_1 CIOBE_DGND_2
VAUX_PRSNT
HETERO 1 OF 5
SUB*_F0642 ADD*_3M858_U_CIOBE
Heat Sink
CBE0 CBE1 CBE2 CBE3 CBE4 CBE5 CBE6 CBE7
REQ0 REQ1 REQ2 REQ3
GNT0 GNT1 GNT2 GNT3
PME
ALERT
TRDY STOP LOCK IRDY
FRAME
DEVSEL
PAR PERR SERR
REQ64 ACK64 PAR64
STRB_N STRB_P
12,29
29,31
D2
PCIX_SEC_CBE0
H3
PCIX_SEC_CBE1
B6
PCIX_SEC_CBE2
C3
PCIX_SEC_CBE3
V3
PCIX_SEC_CBE4
M3
PCIX_SEC_CBE5
L4
PCIX_SEC_CBE6
W1
PCIX_SEC_CBE7
A6
PCIX_SEC_REQ0
B12
PCIX_SEC_REQ1
C12
PCIX_SEC_REQ2
D12
PCIX_SEC_REQ3
PCIX_SEC_GNT0_CIOBE
B8 A10
PCIX_SEC_GNT1
D11
PCIX_SEC_GNT2 PCIX_SEC_GNT3_CIOBE
C11
C10
GPE_CIOB2_ALERT
T23
F1
PCIX_SEC_TRDY
K3
PCIX_SEC_STOP
A3
PCIX_SEC_LOCK
G4
PCIX_SEC_IRDY
C1
PCIX_SEC_FRAME
D7
PCIX_SEC_DEVSEL
C6
PCIX_SEC_PAR
F4
PCIX_SEC_PERR
E5
PCIX_SEC_SERR
L3
PCIX_SEC_REQ64
M4
PCIX_SEC_ACK64
V2
PCIX_SEC_PAR64
T26
NC_CIOBE_T26 R26 R25
NC_CIOBE_R25
PCIX_SEC_M66EN
J3
AE9
B_IMB_DN_CLK_N
AF8
B_IMB_DN_CLK_P
T25
PCIX_SEC_CAP1
T24
PCIX_SEC_CAP2
PCI_RST_CIOBE
A9 AA4
PCIX_SEC_RST
C9
CK_33M_CIOBE
D8
PIRQ_0
AD1
PHY_PLL_VDD3 AE1 AC3
AB3 AB4 AD2
B10
CIOBE_VAUX_PRES
28,29,30
CIOBE_SO
28
CIOBE_CS
28
CIOBE_SCLK
28
31 31 31 31 31,33
ADDED PU/PD TO FLOATING
31,33 31,33
SCI SIGNAL- SC 2/3/03
31,33
31,33 33
+3.3V_AUX
33 33
28 29 29,33 28
12,18
31,33 31,33 31,33 31,33 31,33 31,33
31 31,33 31,33
31,33 31,33 31,33
4.7K
2 1
RB72
12 12
1 2
CB72
33
.01uF 50V
33
47
31 5
19
28
+3.3V_AUX
RB54
21
10K-5%
1K
SUB*_79651
SUBBED TO 1K PER SNAC GROUP
(LEAKAGE CURRENT TOO HIGH ON THIS PIN)
--SWH 12/9
L29
CIOBE_1.2VAUX
21
MMZ2012S601A
FLASH: CIOBE_ SCK, CIOBE_ CS = HIGH
EEPROM: CIOBE_ SCK, CIOBE_ CS = LOW
NP*
SUB*_19964
R78
1 2
RB28
1 2
1K-5%
4.7K
21
RB29
R79
1 2
NP*
**Change symbol
1K-5%
NC_93C56_7
4.7K
SUB*_19964
3 1 2
7
DI CS SK NC
NP*
U14
93C56
CIOBE_3.3VAUX
NP*
R554
1 2
2.2K-5% CIOBE_SI
21
RB41
CIOBE_PME
8.2K-5%
22
SNAC RECOMMENDATION TO USE A WEAKER 4.7K PD-SC
R555
1 2
2.2K-5%
CIOB-E
SUB*_19960
28
25MHz-30ppm
+3.3V_AUX
33
21
C152
15pF 50V
XTAL NOTES
Do not place XTAL within 1.5" of magnetics, I/O Ports or Board edge
Place crystal components as close to CIOB-E as possible
R8881 will be no_pop, based on BC5704 testing
R_CRYS will change to 0 ohm, based on BC5704 testing
X01--CHANGED TO SEPARATE RESET --SWH 10/4
1=SERDES INTERFACE ENABLED (DEFAULT) 0=COPPER PHYSICAL LAYER ENABLED
X1
1 2
R104
1 2
28,29,30,32
330K
28
CIOBE_SO
2
1
C155
28,29,30,32
PHY_PLL_VDD1
21
1 2
CB52
1 2
C106
0.1uF 16V
0.1uF 16V
CB31
1uF 6.3V
CIOBE_3.3VAUX
8
VCC
4
CIOBE_SI
DO
5
GND
6
NC_93C56_6
ORG
28,29,30,32
28,29,30,32
29
NC_SMB_DATA_2_3 NC_SMB_CLK_1
NC_SMB_CLK_2_3
PLLRST install for V1.1
12,47
R_CRYS
1 2
0-5%
CIOBE_2.5VAUX
15pF 50V
CIOBE_3.3VAUX
28
ATTN: Need to substitute a DPN 5F989 EEPROM- which will work at 400 KHz and 3.3V
28,29,30,32 28,29,30,32
CIOBE_3.3VAUX
2
1
C124
28
0.1uF 16V2.2K-5%
CIOBE_CLK CIOBE_DATA
28
CIOBE_3.3VAUX
RB46
RB70
1 2
RB68
RB53
12
1 2
29
2.2K-5%
2.2K-5%
1 2
NP*
RB44
0-5%
1 2
NP*
RB52
0-5%
NC_CIOBE_TMS NC_CIOBE_TDI
NC_CIOBE_TCKPLLRST_CMIC
CIOBE_TDO CIOBE_SI
28
CIOBE_SCLK
28
CIOBE_CS
28
CIOBE_XTALI
CIOBE_XTALO
CIOBE_2.5VAUX_FIL
PHY_PLL_VDD1
28
SMB_DATA1
RB67
1 2
0-5%
L35
BLM11A601S
1 2
1 2
1K-5%
21
CB40
0.1uF 16V
PHY_PLL_VDD2
28
28,29,30,32
Needed for WOL Power-down mode
28,29,30
28,29,30,32
NP*
28,29,30,32
RB56
28,29,30,32
1 2
2.2K-5%2.2K-5%
CIOBE_2.5VAUX
CIOBE_2.5VAUX_DELAY
29
NC_CNTL_1.2V NC_CNTL_2.5V CIOBE_1.2VAUX CIOBE_2.5VAUX CIOBE_2.5VAUX CIOBE_3.3VAUX
CU_SERDES_SEL
RB66
1 2
CIOBE_SO
R547
R548
1 2
2.2K-5%
1 2
RB57
0-5%
1 2
RB69
0-5%
1 2
R97
1 2
2.2K-5%
J23 F26
P23 H26 K26 P26 J25 L25
K24
J26 L26 M23
C26 H23 D26 G23
U25 U26
V25
A24
B15 D15
A15 C15 E15 U22 U23 V22 V23
AA23 AB23 AC23 AD25
W23 Y23
K11 L23 R23
AB13
B26 D24 C25 E23 D25 F23
K25
No pop for CIOBE 1.0 Pop for CIOBE 1.1
1K-5%
R100
RB55
1 2
4.7K
1 2
0-5%
NP*
1 2
0-5%
R99
ADDED AT SW REQ
x03 swh 12/10
U_CIOBE
EE_CLK EE_DATA
SMB_DATA1 SMB_DATA2 SMB_DATA3 SMB_CLK1 SMB_CLK2 SMB_CLK3
TMS
TDI
PLLRST
TCK TDO
SI SCLK SO CS
XTALI XTALO
XTALVDD
BVDD
GPHY_PLLVDD_B15 GPHY_PLLVDD_D15
GPHY_PLLDGND_A15 GPHY_PLLDGND_C15 GPHY_PLLDGND_E15 SDES_PLLDGND_U22 SDES_PLLDGND_U23 SDES_PLLAVDD_V22 SDES_PLLAVDD_V23
SDES_VDD_AA23 SDES_VDD_AB23 SDES_VDD_AC23 SDES_VDD_AD25 SDES_VDD_W23 SDES_VDD_Y23
VDDP_K11 VDDP_L23 VDDP_R23 VDDP_AB13
REGPNP_CNTL_1P2V REGPNP_CNTL_2P5V REGPNP_SENSE_1P2V REGPNP_SENSE_2P5V REGPNP_SUPPLY_1P2V REGPNP_SUPPLY_2P5V
ID0
SERVERWORKS CIOB-E VER 1.1
HETERO 2 OF 5
.01uF 50V
C133
U16
8
VCC
6
SCL
5
SDA
A1
7
WPA0A2
GND
24C32
SUB*_Y0344
Pop for CIOBE ver 1.0 No-pop for CIOBE ver 1.1
CIOBE GIGABIT ETHERNET CONTROLLER
P0_TRAFFICLEDB
P0_SPD100LEDB
P0_SPD1000LEDB
P1_TRAFFICLEDB
P1_SPD100LEDB
P1_SPD1000LEDB
1 2
1 2 3
4
TDP1_0 TDN1_0 TDP1_1 TDN1_1 TDP1_2 TDN1_2 TDP1_3 TDN1_3
TDP2_0 TDN2_0 TDP2_1 TDN2_1 TDP2_2 TDN2_2 TDP2_3 TDN2_3
GPIO_0/SCK GPIO_1/SDA SMBUS_FSEL
MODE_0 MODE_1 MODE_2 MODE_3
TXDP_1 TXDN_1 TXDP_2 TXDN_2
RXDP_1 RXDN_1 RXDP_2 RXDN_2
P0_LINKLEDB
P1_LINKLEDB
P1_INTA
RDAC1
P1_SIGDET P2_SIGDET
PCLK_FB
PCLK_O_0 PCLK_O_1 PCLK_O_2 PCLK_O_3 PCLK_O_4
28,29,30,32
A23
CIOBE_MDI1_0+
B23
CIOBE_MDI1_0-
A22
CIOBE_MDI1_1+
B22
CIOBE_MDI1_1-
A21
CIOBE_MDI1_2+
B21
CIOBE_MDI1_2-
A20
CIOBE_MDI1_3+
B20
CIOBE_MDI1_3-
B16
CIOBE_MDI2_0+
A16
CIOBE_MDI2_0-
A17
CIOBE_MDI2_1+
B17
CIOBE_MDI2_1-
A18
CIOBE_MDI2_2+
B18
CIOBE_MDI2_2-
B19
CIOBE_MDI2_3+
A19
CIOBE_MDI2_3-
E25 H24 E26
SMBUS_FSEL
H25 K23 F24 F25
Y26
NC_CIOBE_Y26
Y25
NC_CIOBE_Y25
AB26
NC_CIOBE_AB26
AB25
NC_CIOBE_AB25
W26
NC_CIOBE_W26
W25
NC_CIOBE_W25
AA26
NC_CIOBE_AA26
AA25
NC_CIOBE_AA25
P24 N26 N25 M25
P25 N23 M24 M26
A7
B24
G26 G25
D13
A14
R_CK_PCIX_SLOT1_133M 21
C13
NC_PCLK_O_A13
A13 A12
NC_PCLK_O_A12
A11
NC_PCLK_O_A11
SUB*_F0642
CIOBE_2.5VAUX
NC_MODE_0 NC_MODE_1 NC_MODE_2 NC_MODE_3
29
CIOBE_ACT_LED_1
CIOBE_100_1000_LED_1
CIOBE_ACT_LED_2
CIOBE_100_1000_LED_2
CIOBE_RDAC
NC_P1_SIGDET NC_P2_SIGDET
CK_CIOBE_FB
R_CK_CIOBE_FB
**PLACE RESISTORS AS CLOSE AS POSSIBLE TO CIOB-E
21
21
R85
R86
RB34
21
49.9-1%
49.9-1%
21
RB35
49.9-1%
21
RB36
49.9-1%
1 2 20K-1%
RB49
1 2
0-5% RB50
1 2
RB45
NP*
0-5%
21
R22
R24
1 2
8.2K-5%
PIRQ_1
RB38
1 2
1.24K-1%
RB24
21
22-5%
21
21
21
21
R84
R83
49.9-1%
1 2 20K-1%
SUB*_19964 SUB TO 22 OHM
R87
49.9-1%
21
RB33
+3.3V
49.9-1%
21
RB32
49.9-1%
R88
RB37
49.9-1%
21
49.9-1%
RB40
NP* CIOBE_SCL_BUFFERED
ENV_SEG4_SDA
49.9-1%
21
RB31
49.9-1%
+3.3V_AUX
U30
12
21,27,37
CIOBE_3.3VAUX
21
R9
R23
1 2
8.2K-5%
8.2K-5%
8.2K-5%
32,47
32,47
32,47
32,47
19
KEEP RDAC AS SHORT AS POSSIBLE
LENGTH OF PCLK NEEDS TO BE MATCHED
RB51
22-5%
21
21
R90
R89
49.9-1%
49.9-1%
21
RB30
49.9-1%
49.9-1%
ALSO CHANGED TO 3.3V I2C BUS
+3.3V_AUX
14
13
14
U30 10
VHC14VHC14
28,29,30,32
ENV_SEG4_SCL
11
Need to be Mux'ed and routed to front panel
PCIX_SEC_CLK_133M
1
32 32 32 32 32 32 32 32
32 32 32 32 32 32 32 32
2
21,27,37
3
33
4 4
A B
28,29,30
28,29,30
CIOBE_1.2VAUX
CIOBE_1.2VAUX
L36
21
MMZ2012S601A
L38
21
MMZ2012S601A
21
C164
21
CB103
CB104
1uF 6.3V
C168
1uF 6.3V
1 2
0.1uF 16V
1 2
0.1uF 16V
1 2
CB110
1 2
CB108
PHY_PLL_VDD2
0.1uF 16V
PHY_PLL_VDD3
0.1uF 16V
28
28
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
DWG NO.
DATE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
X1004
6/6/2003
COMPUTER CORPORATION AUSTIN,TEXAS
REV.
SHEET
28 OF 51
A00-00
DC
Page 29
B D
X03--DEPOPPED R70 & R66, POPPED R71 & R67 FOR A1.2 CIOB-E
CA
6-9-2003_13:56
CIOB-E: IMB/Strapping
B_IMB_DN_D0
12
B_IMB_DN_D1
12
B_IMB_DN_D2
12
B_IMB_DN_D3
1 2
0.1uF 16V
C110
0.1uF 16V
12 12 12 12 12 12 12 12 12 12 12 12 12
12 12
29 29 29
1 2
CB116
0.1uF 16V
CIOBE_2.5VAUX_FIL
21
CB28
1 2
.01uF 50V
B_IMB_DN_D4 B_IMB_DN_D5 B_IMB_DN_D6 B_IMB_DN_D7 B_IMB_DN_D8 B_IMB_DN_D9 B_IMB_DN_D10 B_IMB_DN_D11 B_IMB_DN_D12 B_IMB_DN_D13 B_IMB_DN_D14 B_IMB_DN_D15
B_IMB_DN_PAR B_IMB_DN_CON
1
28,29,30,32
2
+1.5V
R118
100-1%100-1%
1 2
J1
C108
21
R117
1 2
1
750-1%
1 2
CB30
1uF 6.3V
R116
1 2
1 2
CB29
0.1uF 16V
CB118
MMZ2012S601A
0.1uF 16V
SUB=NP0
Each AVDD and AGND pin should have its own trace and HF cap.
CIOBE_2.5VAUX
21
L30
CB117
1uF 6.3V
21
1 2
CB27
IMBCOMP_PU IMBCOMP_PD RXCOMP
C109
1 2
2.2uF
1000pF
50V-10%
+3.3V
6.3V
CIOB-E Version 0.8 Strapping
AD10 AE11 AF12 AC11 AB12 AB10 AD12 AF10
AC9 AC5 AE5 AC7 AF4 AD8 AF6 AE7
AB8 AD6
AF2 AC20 AD21
AB6
D16
D18
D20
D22
B11
AC2
AA5
W5 W2 U5 R5 R2 N5 L5 L2 J5 G5 G2 E9 E7 D5 C2 B7 B3
28
U_CIOBE
IMBD_R0 IMBD_R1 IMBD_R2 IMBD_R3 IMBD_R4 IMBD_R5 IMBD_R6 IMBD_R7 IMBD_R8 IMBD_R9 IMBD_R10 IMBD_R11 IMBD_R12 IMBD_R13 IMBD_R14 IMBD_R15
IMBPAR_R IMBCON_R IMBVREF IMBCOMP_PU IMBCOMP_PD IMB_RCOMP
AVDD_D16 AVDD_D18 AVDD_D20 AVDD_D22
PCIVDDIO_W5 PCIVDDIO_W2 PCIVDDIO_U5 PCIVDDIO_R5 PCIVDDIO_R2 PCIVDDIO_N5 PCIVDDIO_L5 PCIVDDIO_L2 PCIVDDIO_J5 PCIVDDIO_G5 PCIVDDIO_G2 PCIVDDIO_E9 PCIVDDIO_E7 PCIVDDIO_D5 PCIVDDIO_C2 PCIVDDIO_B7 PCIVDDIO_B3 PCIVDDIO_B1 PCIVDDIO_AC2 PCIVDDIO_AA5
SERVERWORKS CIOB-E VER 1.1
HETERO 3 OF 5
IMBCLK_T_P IMBCLK_T_N
VDDCORE_U17 VDDCORE_U16 VDDCORE_U15 VDDCORE_U14 VDDCORE_U13 VDDCORE_U12 VDDCORE_U11 VDDCORE_U10 VDDCORE_T17 VDDCORE_T10 VDDCORE_R17 VDDCORE_R10 VDDCORE_P17 VDDCORE_P10 VDDCORE_N17 VDDCORE_N10 VDDCORE_M17 VDDCORE_M10
CIOBE CORE POWER IMB BUS
VDDCORE_L17 VDDCORE_L10 VDDCORE_K17 VDDCORE_K16 VDDCORE_K15 VDDCORE_K14 VDDCORE_K13 VDDCORE_K12 VDDCORE_K10
IMBD_T0 IMBD_T1 IMBD_T2 IMBD_T3 IMBD_T4 IMBD_T5 IMBD_T6 IMBD_T7 IMBD_T8
IMBD_T9 IMBD_T10 IMBD_T11 IMBD_T12 IMBD_T13 IMBD_T14 IMBD_T15
IMBPAR_T IMBCON_T
AVDDL_D17 AVDDL_D19 AVDDL_D21 AVDDL_D23
SUB*_F0642
AF23 AE22 AB19 AE20 AC18 AF19 AD19 AF21 AF17 AD15 AF15 AE16 AB17 AE14 AC14 AB15
AF14 AC16
AE18 AD17
D17 D19 D21 D23
U17 U16 U15 U14 U13 U12 U11 U10 T17 T10 R17 R10 P17 P10 N17 N10 M17 M10 L17 L10 K17 K16 K15 K14 K13 K12 K10
B_IMB_UP_D0 B_IMB_UP_D1 B_IMB_UP_D2 B_IMB_UP_D3 B_IMB_UP_D4 B_IMB_UP_D5 B_IMB_UP_D6 B_IMB_UP_D7 B_IMB_UP_D8 B_IMB_UP_D9 B_IMB_UP_D10 B_IMB_UP_D11 B_IMB_UP_D12 B_IMB_UP_D13 B_IMB_UP_D14 B_IMB_UP_D15
B_IMB_UP_PAR B_IMB_UP_CON
B_IMB_UP_CLK_P
B_IMB_UP_CLK_N
1 2
CB26
Remain powered in power down mode
12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12
12 12
12 12
1 2
CB25
.01uF 50V
0.1uF 16V
CIOBE_1.2VAUX
ROOM = CIOB-E
28
L31
21
CIOBE_1.2VAUX
29
29
29
C112
21
1000pF
50V-10%
C111
1 2
MMZ2012S601A
6.3V
2.2uF
28,29,30
SMB_DATA1
RXCOMP
IMBCOMP_PD
IMBCOMP_PU
SMBUS_FSEL
28
28,29,30
R119
1 2 100-1%
R121
249 Ohm-1%
R120
1 2
249 Ohm-1%
CIOBE_3.3VAUX
RB71
1 2
8.25K-1%
Choose I2C=CA
+1.5V
21
CIOBE_3.3VAUX
NP*
R96
1 2
2.2K-5%
CHANGED PULL TO 3.3 AUX--SC 12/18
R92
1K-5%
1 2
28,29,30,32
PCIX_SEC_GNT0
28,31
PCIX_SEC_GNT1
28
PCIX_SEC_GNT2
28,33
PCIX_SEC_GNT3
28,29,30,32
12,28
Strapping Descriptions
Signal
PCIX_GNT0
PCIX_GNT1
PCIX_GNT2
PCIX_GNT3
CIOB_ALERT
CIOB_SDA
CIOB_SCL
GPIO[2]/ SMBUS_FSEL
SMB_Data1
ID0
CIOB_E_PLL Bypass Enable :
0 = PLL Configured in bypass mode
(PLL_BYP pin of CIOB_E_PLL is high)
1 = PLL is in normal mode
This pin should be pulled down to GND
Primary PCI Bus Speed. 0 = Primary PCI Bus speed is set to 133MHz
1 = Primary PCI Bus speed is set to 100MHz
IMB Deterministic Mode Clock Setting 0 = IMB Receiver buffer FIFO Read pointer
lags Write pointer by 6 clocks
1 = IMB Receiver buffer FIFO Read pointer
lags Write pointer by 5 clocks
IMB CRC Mode
0 = IMB is configured for parity mode 1 = IMB is configured for CRC mode IMB Training Mode
0 = Disable IMB cold training 1 = Enable IMB cold training
IMB Deterministic Mode
0 = Enable IMB deterministic mode 1 = Disable IMB deterministic mode
SM Bus Function Select
1 = Selects the SM Bus ports from function
2 of the intergrated gigabit devices
0 = Selects the SM Bus ports from function
1 of the intergrated gigabit devices
CIOB ID :
CIOB ID is used only for I2C Address selection does not effect any operation.
0 = Copper PHY Enabled (Default) 1 = SERDES Enabled
+3.3V
R67
1 2
2.2K-5%
R65
R68
1K-5%
1K-5%
1 2
NP*
1 2
Description
NP*
+3.3V
R74
1 2
R72
1 2
+3.3V
R71
2.2K-5%
R69
1K-5%
1 2
1 2
R66
2.2K-5%
1K-5%
NP*
R73
1 2
1 2
2.2K-5%
NP*
NP*
--SWH 12/9
0 = Primary PCI Bus speed is
1 = IMB Receiver buffer FIFO
1 = IMB is configured for
1 = Enable IMB cold training
0 = Enable IMB deterministic
1 = Selects the SM Bus ports from
0 = Copper PHY Enabled (Default)
CIOBE_3.3VAUX
R70
NP*
1 2
2.2K-5%
2.2K-5%
Configuration
1 = PLL is in normal mode
0 = must be pilled to LOW
set to 133MHz
Read pointer lags write
pointer by 5 clocks
CRC mode
mode
function 2 of gigabit devices
28,29,30,32
1
2
Secondary PCI Bus Speed and Mode
3
28,29,30,32
28,29,30
4 4
CIOBE_3.3VAUX
CIOBE_1.2VAUX
SUB=NP*
R573
470
Q48 3904 21
SUB=NP*
NP*
NP*
R572
R571
NP*
R570
1 2
2.2-5% R569
1 2
NP*
CIOBE_2.5VAUX_DELAY
Need to verify want 4.7K instead of 2.2K
28,29
R574
1 2
C512
1 2
4.7K
SUB=NP*
2.2uF
SUB=NP*
6.3V
C509
2 1
4.7uF 16V-10%
1
EN
2 7
IN GND_7
3
OUT
4
ADJ
SUB=NP*
R562
1 2
SUB=NP*
2.2-5% 2.2-5% R563
1 2
SUB=NP*
2.2-5% 2.2-5%
R558
SUB=NP*
10K-1% 10.2K-1%
R557: 10.2K = 2.5V, 11.8K = 2.7V
R557
1 2
21
SUB=NP*
21
R567
1K-5%
1 2
SUB=NP*
SUB=NP*
Q46
2N7002
1
G
3
1
2
SUB=NP*
2N7002
D
3
S
2
Q47
R568
1K-5%
SUB=NP*
D
3
1
G
S
2
Q49
FT0201NLT1
1
SUB=NP*
1 2
2.2-5%
3
1 2
2.2-5% 2.2-5%
2
SUB RESISTORS TO 4.7-OHM TO DECREASE CROW BAR CURRENT- SC 2/25/03
CIOB-E Voltage Decoupling
12
C507
0.1uF 16V
U74
GND_8
GND_6 GND_5
MIC39102BM
R564
1 2
SUB=NP*
R565
1 2
SUB=NP*
MOVED CB76 AND CB97 TO CIOB_2.5VAUX_DELAY- SC 2/12/03
28,29,30,32
8
6 5
R560
SUB TO .1-ohm
1.8K-1W-5% 2 1
12
R566
SUB=NP*
330-5%
CIOBE_2.5VAUX
NP*
C511
1 2
C90
C107
1 2
22uF 6.3V
CB97
22uF 6.3V
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
CB92
1 2
1 2
22uF 6.3V
MIN_LINE_WIDTH=10 CIOBE_2.5VAUX_DELAY
21
21
1uF
10V-10%
CB76
1uF
22uF 6.3V
10V-10%
21
CB93
1uF
28,29
10V-10%
28,29,30,32
Signal
PCICAP1
see p. 33
PCICAP2
see p. 33
M66EN
GNT[2]
see p. 33
CIOBE_2.5VAUX
2.5VAux to 2.5V Aux Delay Bypass option
A B
Description
Primary PCI Bus Mode Select 0=Primary PCI configured as PCI
1=Primary PCI configured as PCI-X Primary PCI Bus Mode Select
(when PCICAP1=1)
0 = 66MHz 1 = 100MHz or 133MHz
XXX
Primary PCI Bus Speed Select
0 = 133MHz 1 = 100MHz
R559
CIOBE_2.5VAUX_DELAY
0 OHM
21
28,29
Config
PCI_X 133 MHz PCICAP1 = 1 PCICAP2 = 1 M66EN = X PCIX_GNT2 = 0
TITLE
EVERGLADES MB
DWG NO.
DATE
DC
COMPUTER CORPORATION AUSTIN,TEXAS
SCHEM,PLNR,PE1750,533MSI
REV.
X1004
6/6/2003
SHEET
29 OF 51
A00-00
3
Page 30
B D
CA
CIOB-E: Power and Ground
CIOB-E 3.3VAUX Generation
1
+12V
R111
1 2
Q11
D
3
2N7002
CTRL_33V_NOT_33VAUX
30,47
1
G
S
2
2N7002
2.2K-5%
+12V
RB7321R106
Q9
D
1
G
S
1 2
2.2K-5%
3
td_on = 20ns td_off = 20ns
2
2.2K-5%
CIOBE_G1_EN
30
+3.3V_AUX
21
R546
22K-5%
R112
1 2
+3.3V
NP*
8.2K-5%
Q10
1
S1
2
N
G1
3
S2
4 5
P
G2 DRN4
SI4501DY
DUAL N & P CHANNEL FETS 12V ON GATE1 ENABLES +3.3V TO DRN PINS 0V ON GATE 2 ENABLES +3.3V_AUX TO DRN PINS
DRN1 DRN2 DRN3
8 7 6
12
C157
+80%-20%
22uF 10V
CIOBE_3.3VAUX
28,29,30,32
+1.5V
AB11
IMBVDDIO_AB11
AB16
IMBVDDIO_AB16
AB20
IMBVDDIO_AB20
AC6
IMBVDDIO_AC6
AC10
IMBVDDIO_AC10
AC13
IMBVDDIO_AC13
AC17
IMBVDDIO_AC17
AC21
IMBVDDIO_AC21
AD5
IMBVDDIO_AD5
AD9
IMBVDDIO_AD9
AD14
IMBVDDIO_AD14
AD18
IMBVDDIO_AD18
AD22
IMBVDDIO_AD22
AE4
IMBVDDIO_AE4
AE8
IMBVDDIO_AE8
AE13
IMBVDDIO_AE13
AE15
IMBVDDIO_AE15
AE19
IMBVDDIO_AE19
AE23
IMBVDDIO_AE23
AF3
IMBVDDIO_AF3
AF7
IMBVDDIO_AF7
AF11
IMBVDDIO_AF11
AF16
IMBVDDIO_AF16
AF20
IMBVDDIO_AF20
AF24
IMBVDDIO_AF24
SERVERWORKS CIOB-E VER 1.1
ROOM = CIOB-E
ADDED PULL-DOWN AND DEPOPPED PULL-UPS
TO KEEP P-CHANNEL FETS ON DURING 3.3V_AUX RAMP-UP
(BEFORE CPLD IS ALIVE TO DRIVE THIS LOW)
CIOB-E 2.5VAUX Generation
NP*
8.2K-5%
+2.5V
Q6
1
S1
2
N
G1
3
S2
4 5
P
G2 DRN4
SI4501DY
DUAL N & P CHANNEL FETS 12V ON GATE1 ENABLES +2.5V TO DRN PINS 0V ON GATE 2 ENABLES DVCC_AC205 TO DRN PINS
DRN1 DRN2 DRN3
8 7 6
2
CIOBE_G1_EN
30
CTRL_33V_NOT_33VAUX
30,47
DVCC_AC205
49
2.5VAUX Voltage
R76
1 2
CB21
12
22uF 10V
+80%-20%
--SWH 11/11/02 x02
CIOBE_2.5VAUX
28,29,32
3
CIOB-E Voltage Decoupling
28,29,30,32
CIOBE_3.3VAUX
C143
1 2
C129
1 2
22uF 6.3V
22uF 6.3V
C70
1 2
1 2
CB82
22uF 6.3V
1 2
CB73
0.1uF 16V
1 2
CB69
0.1uF 16V
1 2
CB65
.01uF 50V
1 2
CB59
.01uF 50V
1 2
CB83
.01uF 50V
.01uF 50V
C174
1 2
C177
1 2
CB112
22uF 6.3V
22uF 6.3V
1 2
22uF 6.3V
CB113
ADDED DIODE TO MINIMIZE 3.3V_AUX CURRENT IMMEDIATELY AFTER SWITCHOVER TO AUX POWER, BUT BEFORE CIOB-E HAS
GONE INTO LOW-POWER MODE AND BEFORE 3.3V REGULATOR
REMOVED DIODE D19 AND .05-OHM RESISTOR R158--SC 12/18
CIOBE_G1_EN
30
CTRL_33V_NOT_33VAUX
30,47
CIOBE_3.3_2.5_REG
30
CB138
X01 -- ADDED ~2ms DELAY TO TURN ON FOR NEW CIOB-E SPEC --SWH 10/1/02
+1.5V
21
21
1uF
C175
10V-10%
21
1uF
C170 10V-10%
12
1uF
CB106 10V-10%
CB111
0.1uF 16V
IS DISABLED
--SWH 11/11/02 X02
RSC_IN1
1 2
RSC_IN2
1 2
2
RSC_EN1
10uF
16V 10%
2 1
0.1uF 16V
12
CB96
22K-5%
RSC_EN2
1 2
0.1uF 16V
1
CIOB-E 1.2VAUX Generation
+3.3V_AUX +2.5V
RB90
NP*
1 2
8.2K-5%
12
12
C499
C500
+80%-20%
22uF 10V
+80%-20%
22uF 10V
.22uF 16V
+80%-20%
12
0.1uF 16V
1 2
1 2
CB105
.22uF 16V
+80%-20%
C212
.01uF 50V
C213
1 2
SC1566 (2M687): 1 -- INPUT 2 -- ENABLE 3 -- GND 4 -- ADJ 5 -- OUT
1 2
1 2
CB100
CB107
.01uF 50V
0-5%
0-5%
0-5%
CB114
2 1
21
NP*
CB94
0.1uF 16V
1
S1
2
N
G1
3
S2
4 5
P
G2 DRN4
SI4501DY
DUAL N & P CHANNEL FETS 12V ON GATE1 ENABLES +2.5V TO DRN PINS 0V ON GATE 2 ENABLES +3.3V_AUX TO DRN PINS
VR6 Supports SC1566 and MIC29302BU
1
EN
2
IN
3
GND MIC29302
Heatsink: 7152P
SUB*_2M687
1 2
C176
.01uF 50V
Q13
8
DRN1
7
DRN2
6
DRN3
CB123
VR6
6
TAB
5
ADJ
4
OUT
MIC29302BU (37CPE): 1 -- ENABLE 2 -- INPUT 3 -- GND 4 -- OUT 5 -- ADJ
1 2
C169
.01uF 50V
.01uF 50V
CIOBE_3.3_2.5_REG
12
+80%-20%
22uF 10V
BOM CHANGE FROM .1% TO 1%- SC
12
R136
RB84
1 2
PLL 1.2V Filtering
28,29,30
CIOB-E Power and Ground Pins
U_CIOBE
PCIPLL_DGND_1_B14IMBVDDIO_AB7 PCIPLL_DGND_1_D14
PCIPLL_DVDD_1_C14 PCIPLL_DVDD_1_E14
HETERO 5 OF 5
SUB*_F0642
SUB*_W0419
825-1%
12
0-5%
RADJ_1
NP*
100K-1%
CIOBE_1.2VAUX
VDDIO_B25 VDDIO_E11 VDDIO_E13 VDDIO_F22 VDDIO_H22 VDDIO_J24 VDDIO_K22 VDDIO_M22 VDDIO_P22 VDDIO_T22
1 2 RMIC_1
RMIC_2
NC_AB21 NC_AC22
NC_AD3
NC_AD23
NC_AE3 NC_AE24 NC_AF25
30
0-5%
1 2
RSC_1
0-5%
RSC_2
0-5%
0-5%
21
NP*
21
NP*
B14AB7 D14
C14 E14
B25 E11 E13 F22 H22 J24 K22 M22 P22 T22
AB21 AC22 AD4 AD23 AE3 AE24 AF25
MMZ2012S601A
CIOBE_1.2V_PLL_1 CIOBE_1.2V_PLL_2
CIOBE_3.3VAUX
Output, needed for WOL, remain
powered during down mode
NC_CIOBE_AB21 NC_CIOBE_AC22
NC_CIOBE_AD3
NC_CIOBE_AD23
NC_CIOBE_AE3 NC_CIOBE_AE24 NC_CIOBE_AF25
CIOBE_1.2VAUX
0.1uF 16V
+80%-20%
CB122
21
L34
21
1 2
CB47
0.1uF 16V
22uF 10V
C183
21
CB41
6.3V
1 2
2.2uF
30 30
28,29,30
1 2
CB57
28,29,30,32
0.1uF 16V
CIOBE_1.2V_PLL_1
1 2
C121
.01uF 50V
E24
GND_E24
E6
GND_E6
E8
GND_E8
F5
GND_F5
G22
GND_G22
G24
GND_G24
H5
GND_H5
J2
GND_J2
J22
GND_J22
K5
GND_K5
L11
GND_L11
L12
GND_L12
L13
GND_L13
L14
GND_L14
L15
GND_L15
L16
GND_L16
L22
GND_L22
L24
GND_L24
M11
GND_M11
M12
GND_M12
M13
GND_M13
M14
GND_M14
M15
GND_M15
M16
GND_M16
M5
GND_M5
N11
GND_N11
N12
GND_N12
N13
GND_N13
N14
GND_N14
N15
GND_N15
N16
GND_N16
N2
GND_N2
N22
GND_N22
N24
GND_N24
P11
GND_P11
P12
GND_P12
P13
GND_P13
P14
GND_P14
P15
GND_P15
P16
GND_P16
P5
GND_P5
R11
GND_R11
R12
GND_R12
R13
GND_R13
R14
GND_R14
R15
GND_R15
R16
GND_R16
R22
GND_R22
R24
GND_R24
T11
GND_T11
T12
GND_T12
T13
GND_T13
T14
GND_T14
T15
GND_T15
T16
GND_T16
T5
GND_T5
U2
GND_U2
U24
GND_U24
V24
GND_V24
V26
GND_V26
V5
GND_V5
W22
GND_W22
W24
GND_W24
Y22
GND_Y22
Y24
GND_Y24
Y5
GND_Y5
SERVERWORKS CIOB-E VER 1.1
SUB*_F0642
VR6 Resistor Placement
When Installed
SC1566
MIC29302
IN
RSC_1 RSC_2 R9508, AS SHOWN R9612, AS SHOWN
RADJ_2 RSC_IN1 (0 ohm) RSC_IN2 (0 OHM) RSC_EN1 (22K OHM)
RMIC_1 RMIC_2 R9612: 4.99K, 1%
RADJ_1 RSC_EN1 (0 OHM)
RSC_EN2 (0 OHM) RSC_IN1 (22K OHM)
30
U_CIOBE
GND_AA22 GND_AA24 GND_AB14 GND_AB18 GND_AB22 GND_AB24
GND_AC12 GND_AC15 GND_AC19 GND_AC24 GND_AC25 GND_AC26
GND_AD11 GND_AD13 GND_AD16 GND_AD20 GND_AD24 GND_AD26
GND_AE10 GND_AE12 GND_AE17
GND_AE21 GND_AE25 GND_AE26
GND_AF13
GROUND
GND_AF18 GND_AF22 GND_AF26
HETERO 4 OF 5
GND_A1 GND_A25 GND_A26 GND_AA2
GND_AB5 GND_AB9
GND_AC4 GND_AC8
GND_AD3 GND_AD7
GND_AE2
GND_AE6 GND_AF1
GND_AF5 GND_AF9 GND_B13
GND_B5
GND_B9 GND_C16 GND_C17 GND_C18 GND_C19 GND_C20 GND_C21 GND_C22 GND_C23 GND_C24
GND_C4 GND_E10 GND_E12 GND_E16 GND_E17 GND_E18 GND_E19
GND_E2 GND_E20 GND_E21 GND_E22
A1 A25 A26 AA2 AA22 AA24 AB14 AB18 AB22 AB24 AB5 AB9 AC12 AC15 AC19 AC24 AC25 AC26 AC4 AC8 AD11 AD13 AD16 AD20 AD24 AD26 AD3 AD7 AE10 AE12 AE17 AE2 AE21 AE25 AE26 AE6 AF1 AF13 AF18 AF22 AF26 AF5 AF9 B13 B5 B9 C16 C17 C18 C19 C20 C21 C22 C23 C24 C4 E10 E12 E16 E17 E18 E19 E2 E20 E21 E22
NOT IN
RADJ_1 RMIC_1
RMIC_2
RSC_EN2
R9508
RSC_1 RSC_2
RSC_IN2
1
2
3
L33
21
MMZ2012S601A
C120
1 2
CB42
1 2
0.1uF 16V
6.3V
2.2uF
CB68
1 2
1 2
CB48
0.1uF 16V
.01uF 50V
CIOBE_1.2V_PLL_2
TITLE
DWG NO.
DATE
30
COMPUTER CORPORATION AUSTIN,TEXAS
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
X1004
6/6/2003
DC
SHEET
30 OF 51
REV.
A00-00
1 2
0.1uF 16V
1 2
CB101
+3.3V
1 2
CB70
.01uF 50V
0.1uF 16V
CB79
1 2
.01uF 50V
C141
1 2
21
1uF
C142
.01uF 50V
21
CB71
10V-10%
21
1uF
1uF
C159
10V-10%
10V-10%
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
4 4
CIOBE_1.2VAUX
28,29,30
4.0V-20% 330uF
C94
+
NP*
330uF SHORT OSCON IS 700DN
21
21
C184
10uF
16V 10%
C189
1 2
.01uF 50V
CB90
1 2
.01uF 50V
CB66
1 2
1 2
CB67
.01uF 50V
1 2
CB78
.01uF 50V
1 2
CB98
0.1uF 16V
1 2
CB95
0.1uF 16V
1 2
CB77
0.1uF 16V
1 2
C105
0.1uF 16V
CB99
0.1uF 16V
1 2
0.1uF 16V
C151
12
22uF 10V
12
C161
+80%-20%
1 2
CB46
+80%-20%
22uF 10V
1 2
CB84
0.1uF 16V
CB74
0.1uF 16V
A B
Page 31
SECONDARY PCI-X BUS TERMINATORS
B D
CA
1
RN56
RN19
1 8
PIRQ_5-T
33
PIRQ_7-T
33
PCIX_SEC_AD27-T
33
PCIX_SEC_AD25-T
33
NC_RN7142_1
PCIX_SEC_REQ0-T
33
PCIX_SEC_AD31-T
33
PCIX_SEC_AD29-T
33
PCIX_SEC_CBE3-T
2
3
33
PCIX_SEC_AD23-T
33
PCIX_SEC_AD21-T
33
PCIX_SEC_AD19-T
33
PCIX_SEC_CBE2-T
33
PCIX_SEC_AD17-T
33
PCIX_SEC_IRDY-T
33
PCIX_SEC_DEVSEL-T
33
PCIX_SEC_LOCK-T
33
PCIX_SEC_PERR-T
33
PCIX_SEC_SERR-T
33
PCIX_SEC_CBE1-T
33
PCIX_SEC_AD14-T
33
PCIX_SEC_AD12-T
33
PCIX_SEC_AD10-T
33
PCIX_SEC_AD8-T
33
10-5%
RN19
2 7
10-5%
RN19
3 6
10-5%
RN19
4 5
10-5%
RN22
1 8
10-5%
RN22
2 7
10-5%
RN22
3 6
10-5%
RN22
4 5
10-5%
RN31
1 8
10-5%
RN31
2 7
10-5%
RN31
3 6
10-5%
RN31
4 5
10-5%
RN34
1 8
10-5%
RN34
2 7
10-5%
RN34
3 6
10-5%
RN34
4 5
10-5%
RN44
1 8
10-5%
RN44
2 7
10-5%
RN44
3 6
10-5%
RN44
4 5
10-5%
RN50
1 8
10-5%
RN50
2 7
10-5%
RN50
3 6
10-5%
RN50
4 5
10-5%
PIRQ_5
PIRQ_7
PCIX_SEC_AD27
PCIX_SEC_AD25
NC_RN7142_8
PCIX_SEC_REQ0
PCIX_SEC_AD31
PCIX_SEC_AD29
PCIX_SEC_CBE3
PCIX_SEC_AD23
PCIX_SEC_AD21
PCIX_SEC_AD19
PCIX_SEC_CBE2
PCIX_SEC_AD17
PCIX_SEC_IRDY
PCIX_SEC_DEVSEL
PCIX_SEC_LOCK
PCIX_SEC_PERR
PCIX_SEC_SERR
PCIX_SEC_CBE1
PCIX_SEC_AD14
PCIX_SEC_AD12
PCIX_SEC_AD10
PCIX_SEC_AD8
19
19
28
28
28,33
28
28
28
28
28
28
28
28
28,33
28,33
28,33
28,33
28,33
28
28
28
28
28
PCIX_SEC_AD7-T
33
PCIX_SEC_AD5-T
33
PCIX_SEC_AD3-T
33
PCIX_SEC_AD1-T
33
PCIX_SEC_ACK64-T
33
PCIX_SEC_CBE6-T
33
PCIX_SEC_AD63-T
33
PCIX_SEC_CBE4-T
33
PCIX_SEC_AD61-T
33
PCIX_SEC_AD59-T
33
PCIX_SEC_AD57-T
33
PCIX_SEC_AD55-T
33
PCIX_SEC_AD53-T
33
PCIX_SEC_AD51-T
33
PCIX_SEC_AD49-T
33
PCIX_SEC_AD47-T
33
PCIX_SEC_AD45-T
33
PCIX_SEC_AD43-T
33
PCIX_SEC_AD41-T
33
PCIX_SEC_AD39-T
33
PCIX_SEC_AD37-T
33
PCIX_SEC_AD35-T
33
PCIX_SEC_AD33-T
33
PCIX_SEC_AD32-T
33
1 8
10-5%
RN56
2 7
10-5%
RN56
3 6
10-5%
RN56
4 5
10-5%
RN65
1 8
10-5%
RN65
2 7
10-5%
RN65
3 6
10-5%
RN65
4 5
10-5%
RN77
1 8
10-5%
RN77
2 7
10-5%
RN77
3 6
10-5%
RN77
4 5
10-5%
RN86
1 8
10-5%
RN86
2 7
10-5%
RN86
3 6
10-5%
RN86
4 5
10-5%
RN97
1 8
10-5%
RN97
2 7
10-5%
RN97
3 6
10-5%
RN97
4 5
10-5%
RN103
1 8
10-5% RN103
2 7
10-5% RN103
3 6
10-5% RN103
4 5
10-5%
PCIX_SEC_AD7
PCIX_SEC_AD5
PCIX_SEC_AD3
PCIX_SEC_AD1
PCIX_SEC_ACK64
PCIX_SEC_CBE6
PCIX_SEC_AD63
PCIX_SEC_CBE4
PCIX_SEC_AD61
PCIX_SEC_AD59
PCIX_SEC_AD57
PCIX_SEC_AD55
PCIX_SEC_AD53
PCIX_SEC_AD51
PCIX_SEC_AD49
PCIX_SEC_AD47
PCIX_SEC_AD45
PCIX_SEC_AD43
PCIX_SEC_AD41
PCIX_SEC_AD39
PCIX_SEC_AD37
PCIX_SEC_AD35
PCIX_SEC_AD33
PCIX_SEC_AD32
28
28
28
28
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
PIRQ_4-T
33
PIRQ_6-T
33
PCIX_SEC_RST-T
33
PCIX_SEC_GNT0-T
33
PCIX_SEC_AD28-T
33
PCIX_SEC_AD30-T
33
PCIX_SEC_AD26-T
33
PCIX_SEC_AD24-T
33
PCIX_SEC_AD22-T
33
PCIX_SEC_AD20-T
33
PCIX_SEC_AD18-T
33
PCIX_SEC_AD16-T
33
PCIX_SEC_FRAME-T
33
PCIX_SEC_TRDY-T
33
PCIX_SEC_STOP-T
33
PCIX_SEC_PAR-T
33
PCIX_SEC_AD15-T
33
PCIX_SEC_AD13-T
33
PCIX_SEC_AD11-T
33
PCIX_SEC_AD9-T
33
PCIX_SEC_CBE0-T
33
PCIX_SEC_AD6-T
33
PCIX_SEC_AD4-T
33
RN15
1 8
10-5%
RN15
2 7
10-5%
RN15
3 6
10-5%
RN15
4 5
10-5%
RN25
1 8
10-5%
RN25
2 7
10-5%
RN25
3 6
10-5%
RN25
4 5
10-5%
RN28
1 8
10-5%
RN28
2 7
10-5%
RN28
3 6
10-5%
RN28
4 5
10-5%
RN39
1 8
10-5%
RN39
2 7
10-5%
RN39
3 6
10-5%
RN39
4 5
10-5%
RN47
1 8
10-5%
RN47
2 7
10-5%
RN47
3 6
10-5%
RN47
4 5
10-5%
RN52
1 8
10-5%
RN52
2 7
10-5%
RN52
3 6
10-5%
RN52
4 5
10-5%
PIRQ_4
PIRQ_6
PCIX_SEC_RST
PCIX_SEC_GNT0
NC_RN7149_8NC_RN7149_1
PCIX_SEC_AD28
PCIX_SEC_AD30
PCIX_SEC_AD26
PCIX_SEC_AD24
PCIX_SEC_AD22
PCIX_SEC_AD20
PCIX_SEC_AD18
PCIX_SEC_AD16
PCIX_SEC_FRAME
PCIX_SEC_TRDY
PCIX_SEC_STOP
PCIX_SEC_PAR
PCIX_SEC_AD15
PCIX_SEC_AD13
PCIX_SEC_AD11
PCIX_SEC_AD9
PCIX_SEC_CBE0
PCIX_SEC_AD6
PCIX_SEC_AD4
19
19
28
28,29
28
28
28
28
28
28
28
28
28,33
28,33
28,33
28
28
28
28
28
28
28
28
PCIX_SEC_AD2-T
33
PCIX_SEC_AD0-T
33
PCIX_SEC_REQ64-T
33
PCIX_SEC_CBE7-T
33
PCIX_SEC_CBE5-T
33
PCIX_SEC_PAR64-T
33
PCIX_SEC_AD62-T
33
PCIX_SEC_AD60-T
33
PCIX_SEC_AD58-T
33
PCIX_SEC_AD56-T
33
PCIX_SEC_AD54-T
33
PCIX_SEC_AD52-T
33
PCIX_SEC_AD50-T
33
PCIX_SEC_AD48-T
33
PCIX_SEC_AD46-T
33
PCIX_SEC_AD44-T
33
PCIX_SEC_AD42-T
33
PCIX_SEC_AD40-T
33
PCIX_SEC_AD38-T
33
PCIX_SEC_AD36-T
33
PCIX_SEC_AD34-T
33
NC_RN7147_2-T
RN59
1 8
10-5%
RN59
2 7
10-5%
RN59
3 6
10-5%
RN59
4 5
10-5%
RN72
1 8
10-5%
RN72
2 7
10-5%
RN72
3 6
10-5%
RN72
4 5
10-5%
RN80
1 8
10-5%
RN80
2 7
10-5%
RN80
3 6
10-5%
RN80
4 5
10-5%
RN91
1 8
10-5%
RN91
2 7
10-5%
RN91
3 6
10-5%
RN91
4 5
10-5%
RN99
1 8
10-5%
RN99
2 7
10-5%
RN99
3 6
10-5%
RN99
4 5
10-5%
RN106
1 8
10-5% RN106
2 7
10-5% RN106
3 6
10-5% RN106
4 5
10-5%
PCIX_SEC_AD2
PCIX_SEC_AD0
PCIX_SEC_REQ64
PCIX_SEC_CBE7
PCIX_SEC_CBE5
PCIX_SEC_PAR64
PCIX_SEC_AD62
PCIX_SEC_AD60
PCIX_SEC_AD58
PCIX_SEC_AD56
PCIX_SEC_AD54
PCIX_SEC_AD52
PCIX_SEC_AD50
PCIX_SEC_AD48
PCIX_SEC_AD46
PCIX_SEC_AD44
PCIX_SEC_AD42
PCIX_SEC_AD40
PCIX_SEC_AD38
PCIX_SEC_AD36
PCIX_SEC_AD34
NC_RN7147_1NC_RN7147_1-T
NC_RN7147_2
NC_RN7147_3NC_RN7147_3-T
28
28
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
28,33
1
2
3
4 4
COMPUTER CORPORATION AUSTIN,TEXAS
REV.
SHEET
31 OF 51
A00-00
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
DC
Page 32
B D
CA
GIGABIT LOM Connectors
1
2
Gigabit LOM #2
ROOM = GB_CONN2
CIOBE_100_1000_LED_2
28,47
CIOBE_ACT_LED_2
28,47
28,29,30,32
No digital signals should be routed within
CIOBE_2.5VAUX
300 mil (7.5mm) of differential pairs
CIOBE_MDI1_0+
28
CIOBE_MDI1_0-
28
CIOBE_MDI1_1+
28
CIOBE_MDI1_1-
28
CIOBE_MDI1_2+
28
CIOBE_MDI1_2-
28
CIOBE_MDI1_3+
28
CIOBE_MDI1_3-
28
1 2
BLM21P600SG
Gigabit LOM #1
ROOM = GB_CONN1
L25
CT1_2.5V_FIL
CB11
1 2
.01uF 50V
CB12 1 2
.01uF 50V
CB9
1 2
.01uF 50V
CB10
1 2
.01uF 50V
Place these capacitors close to the
center tap pins of the mag/conn
1
2
3
4
5
6
7
8
9
10
11
U5
1:1
T1
1:1
T2
1:1
T3
1:1
T4
1000BASE-T MAGNETICS
T5
T6
T7
T8
28,29,30,32
24
23
22
21
20
19
18
17
16
15
14
1312
21
RB2
28,47 28,47
75-1%
CIOBE_100_1000_LED_1 CIOBE_ACT_LED_1
CIOBE_3.3VAUX
21
RB3
RB4
75-1%
75-1%
1 2
RB5
1 2
75-1%
R12
330-5%
330-5%
R13
12
12
GB1_TP0+ GB1_TP0­GB1_TP1+ GB1_TP2+ GB1_TP2­GB1_TP1­GB1_TP3+ GB1_TP3-
WILL NOT MODEM WITHOUT
ETHERNET_1
YEL
L4 L5
GRN
L2 L3
1 2 3 4 5 6 7 8
9
SHIELD
MTG HOLES
RJ45 RCPT
WITH 2 LEDS
SUB=SUB*_5U429
ORG
L1
PRELIMINARY PART
10 11 12
ENG MGR APPROVAL
5U429 IS NON IEEE COMPLIANT PART D2069 IS IEEE COMPLIANT PART
1
2
L28
28,29,30,32
No digital signals should be routed within
300 mil (7.5mm) of differential pairs
CIOBE_MDI2_0+
3
28
CIOBE_MDI2_0-
28
CIOBE_MDI2_1+
28
CIOBE_MDI2_1-
28
CIOBE_MDI2_2+
28
CIOBE_MDI2_2-
28
CIOBE_MDI2_3+
28
CIOBE_MDI2_3-
28
1 2
BLM21P600SG
4 4
CT2_2.5V_FILCIOBE_2.5VAUX
CB13
1 2
.01uF 50V
CB7
1 2
.01uF 50V
CB14 1 2
.01uF 50V
CB8
1 2
.01uF 50V
Place these capacitors close to the
center tap pins of the mag/conn
1
2
3
4
5
6
7
8
9
10
11
U4
1:1
T1
1:1
T2
1:1
T3
1:1
T4
1000BASE-T MAGNETICS
T5
T6
T7
T8
28,29,30,32
24
23
22
21
20
19
18
17
16
15
14
1312
21
RB6
75-1%
RB8
75-1%
1 2
CIOBE_3.3VAUX
21
RB9
RB7
75-1%
1 2
75-1%
R10
330-5%
330-5%
R11
12
12
GB2_TP0+ GB2_TP0­GB2_TP1+ GB2_TP2+ GB2_TP2­GB2_TP1­GB2_TP3+ GB2_TP3-
WILL NOT MODEM WITHOUT
ETHERNET_2
YEL
L4 L5
GRN
L2 L3
ORG
L1
PRELIMINARY PART
1 2 3 4 5 6 7 8
9
10
SHIELD
11
MTG HOLES
12
ENG MGR APPROVAL
RJ45 RCPT
WITH 2 LEDS
SUB=SUB*_5U429
5U429 IS NON IEEE COMPLIANT PART D2069 IS IEEE COMPLIANT PART
GB1_MAG_CONN
(GND_CHASSIS)
21
C69
1000pF
2000V-10%
SUB=SUB*_8Y565
CHANGED FROM 4M675 TO 8Y565 FOR IEEE (2.5KV INSTEAD OF 2KV)
--SWH 12/9/2002
3
GB1_MAG_CONN
21
C68
1000pF
(GND_CHASSIS)
SUB=SUB*_8Y565
2000V-10%
A B
CHANGED FROM 4M675 TO 8Y565 FOR IEEE (2.5KV INSTEAD OF 2KV)
--SWH 12/9/2002
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
AUSTIN,TEXAS
SHEET
DC
REV.
32 OF 51
A00-00
Page 33
PCI Bus Connectors
+3.3V
VCC
1
PIRQ_9
19
PIRQ_11
19
PCIX_PRI_CLK_133M
26
PCIX_PRI_REQ0
26,27
PCIX_PRI_AD31
26
PCIX_PRI_AD29
26
PCIX_PRI_AD27
26
PCIX_PRI_AD25
26
PCIX_PRI_CBE3
26
PCIX_PRI_AD23
26
PCIX_PRI_AD21
26
PCIX_PRI_AD19
26
PCIX_PRI_AD17
26
PCIX_PRI_CBE2
26
PCIX_PRI_IRDY
26,33
PCIX_PRI_DEVSEL
26,33
PCIXCAP_PRI
33
PCIX_PRI_LOCK
26,33
PCIX_PRI_PERR
26,33
PCIX_PRI_SERR
26,33
PCIX_PRI_CBE1
26
PCIX_PRI_AD14
2
3
26
PCIX_PRI_AD12
26
PCIX_PRI_AD10
26
PCIX_PRI_M66EN
26,33
PCIX_PRI_AD8
26
PCIX_PRI_AD7
26
PCIX_PRI_AD5
26
PCIX_PRI_AD3
26
PCIX_PRI_AD1
26
PCIX_PRI_ACK64
26,33
PCIX_PRI_CBE6
26,33
PCIX_PRI_CBE4
26,33
PCIX_PRI_AD63
26,33
PCIX_PRI_AD61
26,33
PCIX_PRI_AD59
26,33
PCIX_PRI_AD57
26,33
PCIX_PRI_AD55
26,33
PCIX_PRI_AD53
26,33
PCIX_PRI_AD51
26,33
PCIX_PRI_AD49
26,33
PCIX_PRI_AD47
26,33
PCIX_PRI_AD45
26,33
PCIX_PRI_AD43
26,33
PCIX_PRI_AD41
26,33
PCIX_PRI_AD39
26,33
PCIX_PRI_AD37
26,33
PCIX_PRI_AD35
26,33
PCIX_PRI_AD33
26,33
GPI_RISER1_PRESENT
22
-12V B1
B2 B3 B4 B5 B6 B7 B8 B9
B10 B11 A11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42
B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 A60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80
160MCA PCI SKT
LOW PROFILE
PCI1
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10
A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42
A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59
A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80
SUB*_4U019
Primary PCIX
+3.3V_AUX
+3.3V
VCC
+12V
PIRQ_8 PIRQ_10
PCIX_PRI_RST
PCIX_PRI_GNT0
PCIX_PME_FROM_SLOT1
PCIX_PRI_AD30
PCIX_PRI_AD28 PCIX_PRI_AD26
PCIX_PRI_AD24
PCIX_PRI_IDSEL
PCIX_PRI_AD22
26
26,33
PCIX_PRI_AD20
PCIX_PRI_AD18 PCIX_PRI_AD16
PCIX_PRI_FRAME
PCIX_PRI_TRDY
PCIX_PRI_STOP
PCIX_PRI_PAR
PCIX_PRI_AD15
PCIX_PRI_AD13 PCIX_PRI_AD11
PCIX_PRI_AD9
PCIX_PRI_CBE0
PCIX_PRI_AD6
PCIX_PRI_AD4 PCIX_PRI_AD2
PCIX_PRI_AD0
PCIX_PRI_REQ64
PCIX_PRI_CBE7 PCIX_PRI_CBE5
PCIX_PRI_PAR64
PCIX_PRI_AD62
PCIX_PRI_AD60 PCIX_PRI_AD58
PCIX_PRI_AD56 PCIX_PRI_AD54
PCIX_PRI_AD52 PCIX_PRI_AD50
PCIX_PRI_AD48 PCIX_PRI_AD46
PCIX_PRI_AD44 PCIX_PRI_AD42
PCIX_PRI_AD40 PCIX_PRI_AD38
PCIX_PRI_AD36 PCIX_PRI_AD34
PCIX_PRI_AD32
PCI_RISER_TYPE
HIGH Logic Level indicates that a 5V riser is present LOW Logic level indicates that a 3.3V riser is present
R107
1 2
2K-5%
19 19
26
26,27
22 26
26 26
PCIX_PRI_AD22
SUB*_29MTJ
26
26 26
26,33
26,33
26,33
26 26
26
26
26
26
26
26
26 26
26,33
26,33 26,33
26,33 26,33
26,33 26,33
26,33 26,33
26,33 26,33
26,33 26,33
26,33 26,33
26,33 26,33
26,33 26,33
26,33 22
SUB TO 475 OHM
26,33
B D
CA
Secondary PCIX
+3.3V_AUX
A1 A2
A3 A4 A5 A6 A7 A8 A9 A10 A11B11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42
A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60B60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80
+12V
VCC
+3.3V
PCIX_SEC_AD24-T
PCIX_SEC_AD22-T
PIRQ_4-T PIRQ_6-T
PCIX_SEC_RST-T PCIX_SEC_GNT0-T
PCIX_PME_FROM_SLOT2
PCIX_SEC_AD30-T
PCIX_SEC_AD28-T PCIX_SEC_AD26-T
PCIX_SEC_IDSEL
PCIX_SEC_AD20-T
PCIX_SEC_AD18-T PCIX_SEC_AD16-T
PCIX_SEC_FRAME-T
PCIX_SEC_TRDY-T
PCIX_SEC_STOP-T
PCIX_SEC_PAR-T PCIX_SEC_AD15-T
PCIX_SEC_AD13-T
PCIX_SEC_AD11-T
PCIX_SEC_AD9-T PCIX_SEC_CBE0-T PCIX_SEC_AD6-T
PCIX_SEC_AD4-T PCIX_SEC_AD2-T
PCIX_SEC_AD0-T PCIX_SEC_REQ64-T
PCIX_SEC_CBE7-T PCIX_SEC_CBE5-T
PCIX_SEC_PAR64-T
PCIX_SEC_AD62-T
PCIX_SEC_AD60-T PCIX_SEC_AD58-T
PCIX_SEC_AD56-T PCIX_SEC_AD54-T
PCIX_SEC_AD52-T PCIX_SEC_AD50-T
PCIX_SEC_AD48-T PCIX_SEC_AD46-T
PCIX_SEC_AD44-T
PCIX_SEC_AD42-T
PCIX_SEC_AD40-T PCIX_SEC_AD38-T
PCIX_SEC_AD36-T PCIX_SEC_AD34-T
PCIX_SEC_AD32-T
31 31
31 31
22
31
31 31
R108
31
31
2K-5%
31,33
31 31
31
31
31
31 31
31
31
31
31
31
31
31 31
31
31 31
31 31
31 31
31 31
31 31
31 31
31 31
31 31
31
31
31
21
PCIX_SEC_AD20-T
SUB*_29MTJ
SUB TO 475 OHM
ROOM=PCIX_P_PU
26,33 26,33 26,33 26,33
26,33 26,33 26,33 26,33
26,33 26,33 26,33 26,33
26,33 26,33 26,33 26,33
26,33 26,33 26,33 26,33
26,33 26,33 26,33 26,33
26,33 26,33 26,33 26,33
26,33 26,33 26,33 26,33
26,33 26,33 26,33 26,33
26,33 26,33 26,33 26,33
26,33 26,33 26,33 26,33
26,33 26,33 26,33 26,33
PCIX_PRI_M66EN PCIX_PRI_PAR64 PCIX_PRI_CBE7 PCIX_PRI_AD40
PCIX_PRI_FRAME PCIX_PRI_SERR PCIX_PRI_LOCK PCIX_PRI_STOP
PCIX_PRI_AD38 PCIX_PRI_AD36 PCIX_PRI_IRDY PCIX_PRI_PERR
PCIX_PRI_AD55 PCIX_PRI_AD46
PCIX_PRI_TRDY PCIX_PRI_DEVSEL
PCIX_PRI_AD35 PCIX_PRI_AD32 PCIX_PRI_AD39 PCIX_PRI_AD33
PCIX_PRI_REQ64 PCIX_PRI_AD61 PCIX_PRI_CBE4 PCIX_PRI_AD37
PCIX_PRI_AD49 PCIX_PRI_AD53 PCIX_PRI_AD58 PCIX_PRI_AD59
PCIX_PRI_AD43 PCIX_PRI_AD50 PCIX_PRI_AD48 PCIX_PRI_AD41
PCIX_PRI_AD34 PCIX_PRI_AD44 PCIX_PRI_AD62 PCIX_PRI_AD56
PCIX_PRI_CBE5 PCIX_PRI_CBE6 PCIX_PRI_AD63
PCIX_PRI_AD51
PCIX_PRI_AD57 PCIX_PRI_AD54 PCIX_PRI_AD60 PCIX_PRI_AD47
PCIX_PRI_AD52 PCIX_PRI_AD45 PCIX_PRI_ACK64 PCIX_PRI_AD42
1
RN64
2 3
5.1K
4
5%
1
RN38
2 3
5.1K
4
5%
1
RN43
2 3
5.1K
4
5%
1
RN84
2
3
5.1K
4
5%
1
RN102
2 3
5.1K
4
5%
1
RN58
2 3
5.1K
4
5%
1
RN79
2 3
5.1K
4
5%
1
RN96
2 3
5.1K
4
5%
1
RN89
2 3
5.1K
4
5%
1
RN69
2 3
5.1K
4
5%
1
RN74
2 3
5.1K
4
5%
1
RN94
2 3
5.1K
4
5%
+3.3V
VCC
-12V PCI2
B1 B2 B3 B4
PIRQ_5-T
31
PIRQ_7-T
31
+3.3V
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
PCIX_SEC_CLK_133M
28
PCIX_SEC_REQ0-T
31
PCIX_SEC_AD31-T
31
PCIX_SEC_AD29-T
31
PCIX_SEC_AD27-T
31
PCIX_SEC_AD25-T
31
PCIX_SEC_CBE3-T
31
PCIX_SEC_AD23-T
31
PCIX_SEC_AD21-T
31
PCIX_SEC_AD19-T
31
PCIX_SEC_AD17-T
31
PCIX_SEC_CBE2-T
31
PCIX_SEC_IRDY-T
31
PCIX_SEC_DEVSEL-T
31
PCIXCAP_SEC
33
PCIX_SEC_LOCK-T
31
PCIX_SEC_PERR-T
31
PCIX_SEC_SERR-T
31
PCIX_SEC_CBE1-T
31
PCIX_SEC_AD14-T
31
PCIX_SEC_AD12-T
31
PCIX_SEC_AD10-T
31
PCIX_SEC_M66EN
28,33
PCIX_SEC_AD8-T
31
PCIX_SEC_AD7-T
31
PCIX_SEC_AD5-T
31
PCIX_SEC_AD3-T
31
PCIX_SEC_AD1-T
31
PCIX_SEC_ACK64-T
31
PCIX_SEC_CBE6-T
31
PCIX_SEC_CBE4-T
31
PCIX_SEC_AD63-T
31
PCIX_SEC_AD61-T
31
PCIX_SEC_AD59-T
31
PCIX_SEC_AD57-T
31
PCIX_SEC_AD55-T
31
PCIX_SEC_AD53-T
31
PCIX_SEC_AD51-T
31
PCIX_SEC_AD49-T
31
PCIX_SEC_AD47-T
31
PCIX_SEC_AD45-T
31
PCIX_SEC_AD43-T
31
PCIX_SEC_AD41-T
31
PCIX_SEC_AD39-T
31
PCIX_SEC_AD37-T
31
PCIX_SEC_AD35-T
31
PCIX_SEC_AD33-T
31
GPI_RISER2_PRESENT
22
B5 B6 B7 B8 B9
B10
B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42
B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59
B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80
160MCA PCI SKT
LOW PROFILE
SUB*_4U019
ROOM=PCIX_S_PU
31,33
28,31 28,31 28,31 28,31
28,31 28,31 28,31 28,31
28,33 28,31 28,31 28,31
28,31 28,31 28,31 28,31
28,31 28,31 28,31 28,31
28,31 28,31 28,31 28,31
28,31 28,31 28,31 28,31
28,31 28,31 28,31 28,31
28,31 28,31 28,31 28,31
28,31 28,31 28,31 28,31
28,31 28,31 28,31 28,31
28,31 28,31 28,31 28,31
28,31
28 28 28
PCIX_SEC_AD40 PCIX_SEC_AD38 PCIX_SEC_AD36 PCIX_SEC_AD37
PCIX_SEC_FRAME PCIX_SEC_SERR PCIX_SEC_LOCK PCIX_SEC_STOP
PCIX_SEC_M66EN PCIX_SEC_IRDY
PCIX_SEC_DEVSEL
PCIX_SEC_TRDY PCIX_SEC_PERR
PCIX_SEC_REQ64 PCIX_SEC_CBE7 PCIX_SEC_ACK64
PCIX_SEC_AD35 PCIX_SEC_AD33 PCIX_SEC_AD32 PCIX_SEC_AD34
PCIX_SEC_AD43 PCIX_SEC_AD41 PCIX_SEC_AD39 PCIX_SEC_AD42
PCIX_SEC_AD59 PCIX_SEC_AD57 PCIX_SEC_AD55 PCIX_SEC_AD58
PCIX_SEC_AD56 PCIX_SEC_AD54 PCIX_SEC_AD52 PCIX_SEC_AD53
PCIX_SEC_AD51 PCIX_SEC_AD49 PCIX_SEC_AD47 PCIX_SEC_AD50
PCIX_SEC_CBE6 PCIX_SEC_AD63 PCIX_SEC_CBE4 PCIX_SEC_CBE5
PCIX_SEC_PAR64 PCIX_SEC_AD62 PCIX_SEC_AD60 PCIX_SEC_AD61
PCIX_SEC_AD48 PCIX_SEC_AD46 PCIX_SEC_AD44 PCIX_SEC_AD45
PCIX_SEC_REQ0 PCIX_SEC_REQ1 PCIX_SEC_REQ2 PCIX_SEC_REQ3
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3 4
1 2 3
4
1 2 3 4
RN108
5.1K 5%
RN45
5.1K 5%
RN35
5.1K 5%
RN60
5.1K 5%
RN107
5.1K 5%
RN109
5.1K 5%
RN75
5.1K 5%
RN81
5.1K 5%
RN85
5.1K 5%
RN63
5.1K 5%
RN70
5.1K 5%
RN90
5.1K 5%
RN12
2.7K
1
+3.3V
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
8 7 6 5
2
3
ROOM=PCIX_PRI
ROOM=PCIX_SEC
Secondary PCIX Clock Speed
Primary PCIX Clock Speed
3
12
U31 LM339
13
VCC
U31
3
LM339
9
+
V+ V-
8
­12
R238
5.1K
PCIXCAP_PRI
33
1 2
4 4
RB107
1 2
21
R234
2K-5%
10K-5%
RB111
1 2
21
R239
10K-5%
2K-5%
VCC
11
+
V+ V-
10
-
14
+3.3V+3.3V
R23021R226
5.1K
1 2
5.1K
PCIX_PRI_CAP1
PCIX_PRI_CAP2
R233
5.1K
PCIXCAP_SEC
26
26
33
1 2
RB109
1 2
21
R237
2K-5%
10K-5%
RB108
1 2
21
R232
10K-5%
2K-5%
VCC
7
+
V+ V-
6
-
VCC
U31
3
LM339
5
+
V+ V-
4
­12
U31
3
LM339
1
12
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
A B
+3.3V+3.3V
21
R229
R225
5.1K
5.1K
1 2
2
PCIX_SEC_CAP1
PCIX_SEC_CAP2
28,29
28
PCIX_SEC_GNT2
28
+3.3V
RB19
1 2
21
RB20
1 = 100MHz
5.1K
NP*
0 = 133MHz
5.1K
COMPUTER CORPORATION
TITLE
EVERGLADES MB
AUSTIN,TEXAS
SCHEM,PLNR,PE1750,533MSI
DWG NO.
DATE
X1004
6/6/2003
SHEET
REV.
33 OF 51
A00-00
DC
Page 34
B D
CA
1
1
ROOM=INVERTER
VCC
+80%-20%
22uF 10V
NP*
SUB*_7E541
CB33
21
0.1uF 16V CB32
2
1 2
16V-20%
100uF
+
21
SUB*_7E541
16V-20%
100uF
C103
+
21
C104
0.1uF 16V 1 2
CB17
U10
6
V+1
7
V+2
2 5
FB SHDN
MAX765CSA
OUT GND REF
LX
D2
D10MQ040
56uH 0.75A
L23
21
1 2
0.1uF 16V CB15
1 2
PLACE NEAR DIODE
21
C102
+
100uF
16V-20%
C84
1 2
SUB*_7E541
4.7uF 16V-10%
8 1
43
SUB*_8970T
-12V
2
INVERTER TO GENERATE -12V
3
4
COMPUTER CORPORATION
AUSTIN,TEXAS
REV.
SHEET
A00-00
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
DATE
X1004
6/6/2003 34 OF 51
DC
3
4
Page 35
B D
+3.3V_AUX +3.3V_AUX
1 2
1K-5%
R497
BMC_RESET
D
3
Q36
2N7002
3.3VAUX_PWRGOOD
1
37
1
G
S
2
BMP RESET GENERATION
35,36
35,36
35
BMC_A16
ICE_DBG
1= EXT FLASH MODE
ICE_DBG
1 2
R333
8.2K-5%
21
+3.3V_AUX
PULL-DOWNS ON A1-A6 FOR UNDOCUMENTED TEST MODE STRAPPINGS IN ZIRCON. THEY ARE NECESSARY BECAUSE
8.2K-5%
THE XILINX CPLD HAS INTERNAL WEAK PULL-UPS.
RB340
21
35,36 35,36 35,36 35,36 35,36 35,36
BMC_A5 BMC_A6 BMC_A1 BMC_A2 BMC_A3 BMC_A4
432
4.7K
567
1
RNB66
8
4.7K
1 2
RB363
4.7K
1 2
RB354
+3.3V_AUX
L54
FERRITE
1206
BMP STRAPPINGS
4.7K-5%
4.7K-5%
1 8
RN131
4.7K-5%
4 5
RN131
TRST
35
TDI
35
TMS
35
TCLK
35
TDO
35
2
In
In Out
35,36
3
CK_ESMCPLD_100HZ
47
+3.3V_AUX
R326
AC_DC
48
1 2
35,36
35,36 35,36
8.2K-5%
35,36
Out
35,36
9,47
35,36
10,18 48,51
4
1 2
2 7
RN131
0-5%
R346
4.7K-5%
3 6
RN131
0-5%
R332
21
J5 1 3 5 7
JTAG PORT
ESM_SYSID0
35
ROMB_BAT_STAT1
51
AMUX_SEL1
40
ROMB_BAT_STAT2
51
STAT2
51
BMC_A3 FAN_AMB_LED_2
38
I2C_MUX_SEL1
37
BMC_CLKOUT
35
FAN_AMB_LED_5
38
ESM_SYSID2
35
FAN_GRN_LED_2
38
BMC_WR H1_TT_LATCHED
47
FAN_GRN_LED_5
38
BMC_A6 BMC_D1
AMUX_SEL0
40
BMC_RD H0_PROCHOT_3V
10
PS2_PRESENT
48
STAT1
51
BMC_RAW_FLCS
35
FAN_AMB_LED_6
38
BMC_RESET FAN_AMB_LED_7
38
VCORE_PWRGOOD_2 FAN_GRN_LED_3
38
BMC_A5 FAN_GRN_LED_6
38
PS1_PRESENT
48
I2C_MUX_SEL2
37
GPE_IERR0 AC2_OK
NC_ESMCPLD_NC1 NC_ESMCPLD_NC2 NC_ESMCPLD_NC3 NC_ESMCPLD_NC4 NC_ESMCPLD_NC5 NC_ESMCPLD_NC6 NC_ESMCPLD_NC7 NC_ESMCPLD_NC8 NC_ESMCPLD_NC9
RB376
1 2
0-5%
A B
2 4 6 8 109 1211 1413
BMC_RESET
5
VCCINT1
57
VCCINT2
98
VCCINT3
16
IO1/FB1
13
IO2/FB1
18
IO3/FB1
20
IO4/FB1
14
IO5/FB1
15
IO6/FB1
25
IO7/FB1
17
IO8/FB1
22
IO9/GCK1
28
IO10/FB1
23
IO11/GCK2
33
IO12/FB1
36
IO13/FB1
27
IO14/GCK3
29
IO15/FB1
39
IO16/FB1
30
IO17/FB1
40
IO18/FB1
87
IO1/FB2
94
IO2/FB2
91
IO3/FB2
93
IO4/FB2
95
IO5/FB2
96
IO6/FB2
3
IO7/GTS1
97
IO8/FB2
99
IO9/GSR
1
IO10/FB2
4
IO11/GTS2
6
IO12/FB2
8
IO13/FB2
9
IO14/FB2
11
IO15/FB2
10
IO16/FB2
12
IO17/FB2
92
IO18/FB2
2
NC1
7
NC2
19
NC3
24
NC4
34
NC5
43
NC6
46
NC7
73
NC8
80
NC9
35,36
U63
XC9572XL-TQ
VCCIO1 VCCIO2 VCCIO3 VCCIO4
IO1/FB3 IO2/FB3 IO3/FB3 IO4/FB3 IO5/FB3 IO6/FB3 IO7/FB3 IO8/FB3
IO9/FB3 IO10/FB3 IO11/FB3 IO12/FB3 IO13/FB3 IO14/FB3 IO15/FB3 IO16/FB3 IO17/FB3 IO18/FB3
IO1/FB4
IO2/FB4
IO3/FB4
IO4/FB4
IO5/FB4
IO6/FB4
IO7/FB4
IO8/FB4
IO9/FB4 IO10/FB4 IO11/FB4 IO12/FB4 IO13/FB4 IO14/FB4 IO15/FB4 IO16/FB4 IO17/FB4 IO18/FB4
TCK TDI TDO TMS
26 38 51 88
41 32 49 50 35 53 54 37 42 60 52 61 63 55 56 64 58 59
65 67 71 72 68 76 77 70 66 81 74 82 85 78 89 86 90 79
48 45 83 47
BMC_RAW_FLCS
35
BMC_RAW_SRCS
35
FAN_AMB_LED_1 FAN_GRN_LED_7 FAN_AMB_LED_4 ESM_SYSID1 FAN_GRN_LED_1 H1_PROCHOT_3V FAN_GRN_LED_4 LI_BAT_PRSNT OVERTEMP_1 H0_TT_LATCHED I2C_MUX_SEL0 SYSTEM_PWRGOOD LED_ID_BLUE BMC_A4 LED_ID_YELLOW FAN_MUX_SEL_1
BMC_SRCS BMC_FLCS
GPE_IERR1 BMC_D0 OVERTEMP_2 PS_PWRGOOD_2 BMC_EXGPCS BMC_D2 PS_PWRGOOD_1 ICE_DBG BMC_D3 PS_ON BMC_RAW_SRCS AC1_OK FAN_MUX_SEL_0 BMC_A2
PCI0_RST_ATI VCORE_PWRGOOD_1 FAN_AMB_LED_3 BMC_A1
XCPLD_TCK XCPLD_TDI XCPLD_TDO XCPLD_TMS
EVERGLADES PROGRAMMED PART #1X465
SUB*_1X465
ESM3 SUPPORT CPLD
R423
0-5%
NP*
RB339
1 2
0-5%
NP*
10V-10%
10V-10%
CB487
1 2
1uF
1uF
38 38 38 35 38 10 38 22,51 48 47 37 17,21,35,39,42,47,51 20,46 35,36 20,46 38 35,36 35,36
10,18 35,36 48 47,48 35 35,36 47,48 35 35,36 19,22,48 35 48,51 38 35,36 19,24,35,47 9,47 38 35,36
21
BMC_FLCS
BMC_SRCS
SP_WAS_EMP_EN
35
+3.3V_AUX
10V-10%
CB512
1uF
21
35,36
35,36
35
35
35
+3.3V_AUX
8.2K-5%
1 2
R375
ROOM=ESM3 (WHOLE PAGE)
CB500
21
Adding FAN7 LED
Adding PROCHOT; also on pin 93.
+3.3V_AUX
8.2K-5%
1 2
R487
J_CPLD
8.2K-5%
1 2
R485
+3.3V_AUX
8.2K-5%
1 2
R486
8.2K-5%
1 2
R484
ESM_SYSID0 ESM_SYSID1
ESM_SYSID2
1 2 3 4 5 6
+3.3V_AUX
8.2K-5%
1 2
Everglades System ID = 0x5h
8.2K-5%
8.2K-5% 2.7K-5%
1 2
1 2
RB392
RB377
RB393
NP*
2.7K-5%
2.7K-5%
1 2
RB394
NP*
21
ESM DEBUG HDR
BMC_UART_DOUT
35
BMC_UART_DIN
35
RB385
RB386
21
NP*
P3
1 2 3
42
42
ESM_ALERT
BP_FAULT
SUB=NP0
POCKET SHR
RB296
H0_CPU_PRES
7,22,47
H1_CPU_PRES
7,22,47
ADDED 0 OHMS TO DISCONNECT ON X01--
ESM3 DOESN'T USE THESE, AND THE BMC WAS DRIVING THESE LOW --SWH 10/1/02
1 2
0-5%
NP*
RB321
1 2
0-5%
NP*
+3.3V_AUX
21
R37721R376
35,37,39 35,37,39
IPMB_SDA IPMB_SCL
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
17,21,35,39,42,47,51
+3.3V_AUX
8.2K-5% 8.2K-5%
+3.3V_AUX
SECOND UART NOT IN ZIRCON PART
10K-5%
10K-5%
22uF 10V
1 2
21
1 2
RB282
RB283
21
CA
1 2
C460
R474
0-5%
35,37,39 35,37,39
7,22,47
7,22,47
19,22,47
22uF 10V
10V-10%
CB447
1 2
0.1uF 16V
21
A2D_2_5_REF
40
A2D_2_5
40
A2D_BAT
40
A2D_MUX4
40
A2D_5
40
A2D_12
40
A2D_ROMB_BAT
40
A2D_MUX0
40
FAN1_RPM
38
FAN2_RPM
38
FAN3_RPM
38
FAN4_RPM
38
SYSTEM_PWRGOOD NC_SLEEP GPE_CMIC_FATAL
12,18
INTRUDED
19,39
NC_CPNL_DATA NC_CPNL_CLK
NC_BMC_36 NC_BMC_37 NC_BMC_38 NC_BMC_39
NC_BMC_42 NC_BMC_43 NC_BMC_44 NC_BMC_45
GPE_ESM_IRQ15
18,22
GPE_ESM2SMI
18
GPE_ESM2SCI
18
IPMB_SDA IPMB_SCL ENV_SDA
37
ENV_SCL
37
PU_ESM_GPIO16
FANFAST_1
38
FANFAST_2
38
BMC_FLASH_WP
36
SP_WAS_EMP_EN
35
ID_BUTTON_DB
20
VID_CLK
47
NC_BMC_78 NC_BMC_79
35 35
NC_BMC_GPIO26 H0_CPU_PRES_BMC GPI_PROC1_HS_PRES H1_CPU_PRES_BMC
GPI_ESM4_PRESENT
22,39
GPI_PROC0_HS_PRES
PWRBTN NC_BMC_GPIO43
VID_LATCH
47
VID_DATA
47
NC_BMC_152 NC_BMC_153
10V-10%
CB471
CB439
1 2
1uF
1uF
21
NET_PHYSICAL_TYPE=PWR
22uF 10V
+80%-20%
22uF 10V
1 2
1 2
C466
C464
BMC_UART_DOUT BMC_UART_DIN
CHANGE THIS SERIES RESISTOR IF OSCILLATOR IS FAR FROM BMC
0.1uF 16V CB479
1 2
BMC_A2D_3.3VFP
CB43821CB493
1 2
8.2K-5% R437
21
40
1
E/D
U56
17.734480MHz
4
10MHz
VCC
3
OUT
GND
SUB*_44FWD
2
10Mhz, 100PPM, 3.3V
0.1uF 16V
0.1uF 16V
CB501
156
ADCVDD
157
ADCGND
158
A2D12
159
A2D11
160
A2D10
1
A2D9
2
A2D8
3
A2D7
4
A2D6
5
A2D5
6
A2D4
7
A2D3
8
A2D2
9
A2D1
10
A2D0
26
TACH_IN0/GPIO0
27
TACH_IN1/GPIO1
28
TACH_IN2/GPIO2
29
TACH_IN3/GPIO3
30
TACH_IN4/GPIO4
31
TACH_IN5/GPIO5
32
TACH_IN6/GPIO6
33
TACH_IN7/GPIO7
34
PSP_RD/GPIO36
35
PSP_WR/GPIO37
36
PSP_D4/GPIO38
37
PSP_D5/GPIO39
38
PSP_D6/GPIO40
39
PSP_D7/GPIO41
42
TACH_IN8/GPIO8
43
TACH_IN9/GPIO9
44
TACH_IN10/GPIO10
45
TACH_IN11/GPIO11
47
BT_IRQ/GPIO32
48
KCS1_IRQ/GPIO33
49
KCS2_IRQ/GPIO34
50
KCS3_IRQ/GPIO35
63
I2C_SDA0
64
I2C_SCL0
65
I2C_SDA1/GPIO12
66
I2C_SCL1/GPIO13
67
I2C_SDA2/GPIO14
68
I2C_SCL2/GPIO15
69
GPIO16
70
GPIO17
72
PWM0/GPIO48
73
PWM1/GPIO49
74
PWM2/GPIO50
75
PWM3/GPIO51
76
PWM4/GPIO52
77
PWM5/GPIO53
78
PWM6/GPIO54
79
PWM7/GPIO55
82
GPIO56
83
GPIO57
84
GPIO58
85
GPIO59
86
UART0_DOUT
87
UART0_DIN
88
UART0_CTS/GPIO26
89
UART0_DCD/GPIO27
90
UART0_RI/GPIO28
91
UART0_RTS/GPIO29
93
UART1_DOUT/GPIO30
94
UART1_DIN/GPIO31
148
GPIO42
149
GPIO43
150
GPIO44
151
GPIO45
152
GPIO46
153
GPIO47
U_BMP
NOT PWM ON LH1 NOT PWM ON LH1 NOT PWM ON LH1 NOT PWM ON LH1
PLLBYPASS PLLFILTER
TDO/TESTOUT
LAD0/PSP_D0 LAD1/PSP_D1 LAD2/PSP_D2 LAD3/PSP_D3
ADR1/RST_TMODE
ADR7/ARMTEST ADR8/NANDTEST ADR9/BISTMODE ADR10/ADCTEST
ADR11/FWTEST ADR12/PLLTEST
ADR13/POWERDOWN
ADR14/TRISTATE ADR15/PSP_MODE
ADR16/FLASH_BOOT
ADR17/GPIO18
ADR18/GPIO19
ADR19/GPIO20
RDY/GPIO21 CS0/GPIO22 CS1/GPIO23 CS2/GPIO24 CS3/GPIO25
ZIRCON LH1
SUB*_9C014
633MY IS ZIRCON LH1 9C014 IS ZIRCON LITE
VDD_9 VDD_8 VDD_7 VDD_6 VDD_5 VDD_4 VDD_3 VDD_2 VDD_1
CELLVDD CELLGND
REFCLK
PLLVDD PLLGND SUBGND
RESET
TDI
TMS TRST TCLK
LFRAME LRESET
LCLK
BHE
BLE READ
WRITE FLASH_CS SCANTEST CLOCKOUT
D10 D11 D12 D13 D14 D15
ADR2 ADR3 ADR4 ADR5 ADR6
R424
1 2
0-5%
40 46 51 58 71 92 113 132 154
11 12
13
18 15 17 16 14
19
20 21 22 23 24
53 54 55 56 59 60 61
95 96 97 98 99 100 101
103
D0
104
D1
105
D2
106
D3
107
D4
108
D5
109
D6
110
D7
111
D8
112
D9
114 115 116 117 118 119
122 123 124 125 126 127 128 129 130 131 133 134 135 136 137 138
139 140 141
142 144 145 146 147
RB320
1 2
1.5K-5%
NET_PHYSICAL_TYPE=PWR
BMC_RESET
TDO TDI TMS TRST TCLK
LAD0 LAD1 LAD2 LAD3
LFRAME PCI0_RST_ATI CLK_PCI32_ZIRCON
BMC_BHE
BMC_BLE
BMC_RD
BMC_WR
BMC_RAW_FLCS
NC_ZIR_100
BMC_CLKOUT
BMC_D0
BMC_D1
BMC_D2
BMC_D3
BMC_D4
BMC_D5
BMC_D6
BMC_D7
BMC_D8
BMC_D9
BMC_D10
BMC_D11
BMC_D12
BMC_D13
BMC_D14
BMC_D15
BMC_A1
BMC_A2
BMC_A3
BMC_A4
BMC_A5
BMC_A6
BMC_A7
BMC_A8
BMC_A9
BMC_A10
BMC_A11
BMC_A12
BMC_A13
BMC_A14
BMC_A15
BMC_A16
BMC_A17
BMC_A18
BMC_A19
NC_BMC_GPIO21
BMC_RAW_SRCS
BMC_EXGPCS
NC_BMC_146
NC_BMC_147
TITLE
EVERGLADES MB
DWG NO.
DATE
35,36
35 35 35 35 35
18,19,22 18,19,22 18,19,22 18,19,22 18,19,22 19,24,35,47 5
36 36 35,36 35,36 35
35
35,36 35,36 35,36 35,36 36 36 36 36 36 36 36 36 36 36 36 36
35,36 35,36 35,36 35,36 35,36 35,36 36 36 36 36 36 36 36 36 36 35,36
36 36 36
COMPUTER CORPORATION
AUSTIN,TEXAS
SCHEM,PLNR,PE1750,533MSI
X1004
6/6/2003
SHEET
DC
FERRITE
1206
L52
21
22uF 10V
CB458
1 2
+3.3V_AUX
RB337
1 2
35 OF 51
6-9-2003_13:5635EVERGLADES
0.1uF 16V 50V-10%
1000pF
C443
21
2
Connected PCI_RST_ATI
RB338
1 2
8.2K-5%
8.2K-5%
35 35
REV.
A00-00
1
1
CB472
2
3
4
Page 36
B D
CA
SRAM Chip Select and Vcc Generation
U_ESMFW
BMC_A1
35,36
BMC_A2
35,36
BMC_A3
35,36
BMC_A4
35,36
RB403
RB404
1 2
1 2
0-5%
BMC_SRCS
1
35
+3.3V_AUX
0-5%
SRAM_CS
NET_PHYSICAL_TYPE=PWR
36
SRAM_VCC
22uF 10V
CB536
1 2
36
35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36
35 35 35
BMC_A5 BMC_A6 BMC_A7
BMC_A8
BMC_A9 BMC_A10 BMC_A11 BMC_A12 BMC_A13 BMC_A14 BMC_A15 BMC_A16
BMC_A17
BMC_A18 BMC_A19
25
A0
24
A1
23
A2
22
A3
21
A4
20
A5
19
A6
18
A7
8
A8
7
A9
6
A10
5
A11
4
A12
3
A13
2
A14
1
A15
48
A16
17
A17
16
A18
15
A19
10
A20
9
A21
ROOM=SRAM
27
0-5%
R422
1 2
Blank 2Mx16 p/n = 8F073
Everglades Prog p/n = 0X418 Dagger Prog p/n = 5M787 (256Kx16))
Jaguar Prog p/n = 008WG
Blank 512kx16 p/n = 5E001
2
Blank 256kx16 p/n = 34WGU
46
GND_27 GND_46
28320
37
VCC_30
47
VCCQ
13
VPP
29
DQ0
31
DQ1
33
DQ2
35
DQ3
38
DQ4
40
DQ5
42
DQ6
44
DQ7
30
DQ8
32
DQ9
34
DQ10
36
DQ11
39
DQ12
41
DQ13
43
DQ14
45
DQ15
26
CE
28
OE
11
WE
12
RP
14
WP
SUB*_7X647 SOCKET IS 8M346 (DEPOP)
ESM3 FLASH
+3.3V_AUX
BMC_D0 BMC_D1 BMC_D2 BMC_D3 BMC_D4 BMC_D5 BMC_D6 BMC_D7 BMC_D8 BMC_D9 BMC_D10 BMC_D11 BMC_D12 BMC_D13 BMC_D14 BMC_D15
0.1uF 16V C463
1 2
35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36
+3.3V_AUX
35,36 35,36 35,36
8.2K-5%
35,36 35,36 35,36 35,36 35,36
R490
12
BMC_FLCS BMC_RD BMC_WR
BMC_RESET BMC_FLASH_WP
R421
1 2
8.2K-5%
ROOM=SRAM
10V-10%
1 2
1uF
C462
35 35,36 35,36
35 35
35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36
36 35
35 35,36 35,36
ROOM=SRAM
BMC_A12 BMC_A13 BMC_A14 BMC_A15 BMC_A16 BMC_A8 BMC_A6 BMC_A7 BMC_A1 BMC_A11 BMC_A10 BMC_A9 BMC_A2 BMC_A3 BMC_A4 BMC_A5
SRAM_CS BMC_BLE BMC_BHE BMC_RD BMC_WR
44 43 42 27 26 25 24 21 20 19 18
39 40 41 17
p/n 17MEY
SIGNAL=BMC_A17;22 SIGNAL=~BMC_RAW_FLCS;23
ESM3 SRAM
U67
5
A0
4
A1
3
A2
2
A3
1
A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
6
CS BLE BHE OE WE
SRAM,64kx16
VDD1 VDD2
VSS1 VSS2
I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8
I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15
36
33 11
12 34
7 8 9 10 13 14 15 16 29 30 31 32 35 36 37 38
SRAM_VCC
BMC_D0 BMC_D2 BMC_D5 BMC_D3 BMC_D1 BMC_D7 BMC_D4 BMC_D6 BMC_D15 BMC_D14 BMC_D13 BMC_D12 BMC_D11 BMC_D10 BMC_D9 BMC_D8
0.1uF 16V
35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36 35,36
1 2
CB529
10V-10%
1 2
1uF
CB535
22uF 6.3V
CB524
21
1
2
3
4
COMPUTER CORPORATION
AUSTIN,TEXAS
REV.
SHEET
36 OF 51
A00-00
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
EVERGLADES 36 6-9-2003_13:56
DC
3
4
Page 37
B D
ISOLATE BACKPLANE WHEN PSUPPLY IS OFF
CA
PLANAR TEMPERATURE
U12
7,21,37,46
7,21,37,46
ENV_SEG0_SDA
1 2
ENV_SEG0_SCL
NC_BTI
1
R61
5.1K
1
SDA
2
SCL
3
OS
4
GND
LM75
SUB*_0C085
subbed to 3.3v flavor
VCC
A0
A1
A2
+3.3V
8
7
6
5
0.1uF 16V 1 2
ROOM=ESM3
PLACE ON BACK HALF OF PLANAR
ESM ERROR LOG
+3.3V_AUX
CB513
220
2 1
R489
U66
1
A0
VCC
2
GND2
A1
3 6
A2 SCL
4
SDA
GND1
24C02
SUB*_2M021
BLANK IS 5E703 PROGRAMMED ESM3 FRU/SEL PART IS 2M021
8 7
5
ROOM=ESM3
ENV_SEG1_SCL ENV_SEG1_SDA
X01 -- DELETED I2C TEST HEADER TO MAKE ROOM FOR CAPS --SWH 10/15
37 37
USED SPARE OR GATE TO BUFFER PGOOD SIGNAL-SC 2/3/03
35,39
35,39
IPMB_SDA
IPMB_SCL
D 3
Q40
2N7002
G
1
D 3
S 2
Q39
2N7002
1
IPMB_CONNECT
BP_IPMB_SDA
G
BP_IPMB_SCL
S 2
17
42
42
1
ON TOP OF BOARD TO GET HEATED AIR TEMP
+5V_AUX Charge Pump
I2C DEVICES BY SEGMENT
DEVICESSEGMENT 000 001 010 011 100 101 110 111
2
I2C SEGMENTS/ADDRESSES BY DEVICE
TEMP SENSORS, CONTROL PANEL PLANAR FRU / ESM ERROR LOG POWER SUPPLIES, PSDB EXPANDER DIMMS CHIPSET (HESL & CIOB) ROMB CARD (UNUSED) (UNUSED)
DEVICES
DIMMs 1-4 DDR Clock Driver POWER SUPPLY #1 010 / 1010.000 POWER SUPPLY #2 PSDB EXPANDER (AC_OK, ETC.) BACKPLANE ROMB CARD DRAC3, ERA/O ESM3 ERROR LOG
SENSORS
BACKPLANE TEMP AMBIENT TEMP
CPU#2 TEMP
011 / 1010.000x through 1010.011x 011 / 1101.001x
010 / 1010.001 010 / 0101.111x IPMB 101 / 1010.101 IPMB 001 / 1010.000x
000 / 1001.000xPLANAR TEMP THROUGH BACKPLANE (IPMB) 000 / 1001.001x 000 / 0011.000xCPU#1 TEMP 000 / 0011.001x
OTHERS
CSB5
CIOB-X2 CIOB-E
3
35 35 35
35
I2C_MUX_SEL0 I2C_MUX_SEL1 I2C_MUX_SEL2
ENV_SCL
100 / 1100.0010 -> 1111 100 / 1100.000CMIC-LE 100 / 1100.100 100 / 1100.1010
+5V_AUX
16
VCC
5
Y
+5V_AUX
16
VCC
4
35
ENV_SDA
5
Y
CSB5 HAS ACCESS TO THIS BUS
SEGMENT/ADDRESS
<- changed according to Power Supply standards
<- corrected from Dagger
<- on Control Panel
R476
1 2
8.2K-5%
R483
1 2
8.2K-5% +3.3V
R491
1 2
NP*
+3.3V
R457
1 2
1 2
NP*
1 2
RB379
0-5%
5.1K
RB378
0-5%
+3.3V_AUX
5.1K
RB362
1 2
U61
QS3251
U62
QS3251
R475
2 1
220
7
E
11
S0
10
S1
9
S2
4
I0
3
I1
2
I2
1
I3
15
I4
14
I5
13
I6
12
I7
7
E
11
S0
10
S1
9
S2
4
I0
3
I1
2
I2
1
I3
15
I4
14
I5
13
I6
12
I7
X01 -- disconnected seg3 from ESM3 (this is a BIOS segment) --swh 10/1/2002 X01 -- disconnected seg4 from ESM3 (this is a BIOS segment) --swh 10/10/2002
A B
R438
1 2
5.1K
RB344
1 2
0-5%
5.1K
R458
1 2
0-5%
OK OK OK
OK
OK
RN146
123
876
RN148
NP*
0XX
1XX
+3.3V
678
8.2K
4 5
NP*
+3.3V
54
8.2K
321
ESM3 I2C MUX
PLANAR FRUTEMP
SENSORS
CNTL PANEL
HESL/CIOB
876
54
RN147
321
678
RN149
123
4 5
SEL
ROMB
8.2K
ENV_SEG0_SCL ENV_SEG1_SCL ENV_SEG2_SCL ENV_SEG3_SCL ENV_SEG4_SCL ENV_SEG5_SCL NC_ENV_SEG6_SCL ENV_SEG7_SCL
8.2K
ENV_SEG0_SDA ENV_SEG1_SDA ENV_SEG2_SDA ENV_SEG3_SDA ENV_SEG4_SDA ENV_SEG5_SDA NC_ENV_SEG6_SDA ENV_SEG7_SDA
+3.3V_AUX
+3.3V_AUX
+3.3V
RB388
1 2
+3.3V
RB387
1 2
R495
5.1K 1 2
+3.3V_AUX
5.1K
37,39,47,48,51
+3.3V_AUX
X11X10X00 X01
PS's
DIMMs
U68
.01uF 50V
C488
21
1uF
C62
1 2
+3.3V_AUX
14
12
13
VHC14
R512
1 2
3.01K-1%
+3.3V_AUX
10V-10%
1 2
1uF
10V-10%
C485
VOLTAGE DOUBLER FOR 9V AUX POWER
ROOM=ESM_I2C_MUX
5.1K
7,21,37,46 37 48 21 21,27,28 51
X01 -- ADDED EXTRA PULL-UP--SEG0 WAS TOO SLOW --SWH 10/4 X01 -- CHANGED SEG5 TO AUX POWER (ROMB FRU) --SWH 10/7
R447
5.1K
1 2
7,21,37,46 37 48 21 21,27,28 51
3.3VAUX_PWRGOOD
SUB*_7691E
SUB*_7691E
NP*
VFPCP_OSC_5V
21
C74
.47uF
16V-10%
ADDED CURRENT LIMIT RES. --SWH 9/27 CHANGED RES. TO 100-OHM --SC 12/15
1 2
1M-5%
C484
1 2
R551
Q38
3.3VAUX_PWRGOOD
2N7002
R54
21
118K
RB10
21
118K
R511
1 2
47-5%
+5V_AUX
ROOM=5V_PUMP
U6
3
IN
1
SKIP
2
SHDN
4
GND
MAX682ESA SUB*_4M200
C481
2 1
0.1uF 16V
31
1 2
1K-5%
R510
D16
BAR43
PGND
D15
BAR43
CXP CXN OUT
31
35,37
7 6 8 5
0.1uF 16V
ROOM=VFPCP
X03-- CHANGED TO 3.3VAUX AND ADDED .1UF CAP TO SLOW DOWN ~3.3AUX FALL TIME--SC 12/15
SUBBED TO SCHOTTKY DIODE TO INCREASE ~3.3VAUX_PWRGOOD VOLTAGE--SC 1/8
37,39,47,48,51
3.3VAUX_PWRGOOD
+3.3V_AUX
0.1uF 16V C505
1 2
Q41
2N7002
1
G
SUB*_22990
1N914
D20
31
2.2K-5% RB411
21
D
3
S
2
3.3VAUX_PWRGOOD
3.3VAUX_PWRGOOD INVERTER
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
CB6
1
G
+5V_AUX
1 2
2.2uF 16V
VFPCP
100-5%
1 2
R498
D
3
S
2
39,40
35,37
VCC
RB204
1 2
0.1uF 16V
200-5%
U34
6
ADD1
10
ADD0
3
DXP
4
DXN
12
SMBDATA
14
SMBCLK
15
STBY
220
ADDRESS 30H
VCC
ALERT
GND7 GND8
MAX1617
SUB=SUB*_H2065
000 / 0011.000x
RB202
1 2
200-5%
CB368
1 2
2
VCC
11
7 8
0.1uF 16V 1 2
7,21,37,46 7,21,37,46
ROOM=PROC_TEMP
VCC
RB199
H0_THERM_D+
7
H0_THERM_D-
7
ENV_SEG0_SDA ENV_SEG0_SCL
Note Regarding the temp sensor subs: H2065 = Sole sourced analog device temp sensor, removing Max1617 for now to play it safe
50V-10%
2200pf
0.1uF 16V
SUB=NP*
1 2
1 2
NP*
CB376
CB546
1 2
8.2K-5%
RB214
1 2
VCC VCC
NP*
RB212
7,21,37,46
7,21,37,46
H1_THERM_D+
7
H1_THERM_D-
7
ENV_SEG0_SDA ENV_SEG0_SCL
50V-10%
2200pf
NP*
0.1uF 16V
SUB=NP*
1 2
1 2
CB374
CB548
RB201
1 2
1 2
8.2K-5%
220
RB211
1 2
U35
8.2K-5% 6
ADD1
10
ADD0
3
DXP
4
12 14 15
DXN
SMBDATA SMBCLK STBY
MAX1617
SUB=SUB*_H2065
ALERT
GND7 GND8
ADDRESS 32H
VCC
000 / 0011.001x
LOCAL TEMP CAN BE READ FROM THESE SENSORS
PLACE THESE TOWARD FRONT OF CHASSIS FROM PROCESSORS ON TOP OF BOARD TO GET AMBIENT TEMP
FOR NOISE REDUCTION, PLACE ALL DECOUPLING ON TOP OF
BOARD NEAR THERMAL SENSOR
PROCESSOR TEMP PROBES
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
DC
AUSTIN,TEXAS
SHEET
NC_PT1_ALRT
CB364
2
11
7 8
NC_PT2_ALRT
REV.
37 OF 51
6-9-2003_13:5637EVERGLADES
2
3
4
A00-00
Page 38
B D
FAN6 to CTRL PNL. FAN7 near PS. Add back in FAN5
VCC
D8
MBRS340T3
1K-5%
0-5%
1K-5%
0-5%
R428
560
VCC
R527
560
DPAK
3
S
G
1
1 2
21
50V-20%
.01UF
.01UF
1 2
50V-20%
C444
D18
MBRS340T3
DPAK
3
S
G
1
21
50V-20%
.01UF
1 2
50V-20%
C493
+12V
+3.3V
R417
8.2K-5%
Q25
2N7002
1
G
8.2K-5%
Q43
2N7002
1
G
1 2
R549
1 2
D
S
+12V
R521
1 2
R550
1 2
D
S
3
2
3
2
R406
1 2
FANFAST_1
35
+3.3V
R526
1 2
FANFAST_2
35
X01 ADDED RC TO SLOW FET TURNING ON AND OFF --SWH 10/1/2002
+12V
12
NP*
0-5%
RB279
D
C503
x03 -- added just in case
12
D
C504
1 2 .01UF
1 2
4
20P03
Q24
NP*
swh 12/10
4
20P03
Q45
NP*
x03 -- added just in case
swh 12/10
VCC_FANPOWER_CPUZONE
1 2
CB442
+12V
RB418
1 2
1 2
CB545
R540
1 2
0.1uF 16V
R542
1 2
C501
X03--ADDED CAP WITH SERIES RESISTOR TO KEEP FANS FROM TAKING MUCH (IF ANY) 5V
--STUART 12/9/2002
NP*
0-5%0.1uF 16V
R541
1 2
.604-1%
R543
1 2
.604-1%
12
+
270uF
16V-20%
38
SUB*_782NY
SUB*_782NY
.604-1%
.604-1%
SUB*_782NY
SUB*_782NY
R545
1 2
R544
1 2
.604-1% .604-1%
12
+
C502
270uF
16V-20%
SUB ALL TO 1 OHM
SUB*_782NY
SUB*_782NY
SUB TO 100UF 16V OSCON
SUB*_0U207
FAN SPEED CONTROL
Subbed to LCX TSSOP flavor!!!
Must be able to sink 24mA
FAN_GRN_LED_1
35
FAN_AMB_LED_1
35
FAN_GRN_LED_2
35
FAN_AMB_LED_2
35
FAN_GRN_LED_3
35
FAN_AMB_LED_3
35
FAN_GRN_LED_4
35
FAN_AMB_LED_4
35
FAN_GRN_LED_5
35
FAN_AMB_LED_5
35
FAN_GRN_LED_6
35
FAN_AMB_LED_6
35
FAN_GRN_LED_7
35
FAN_AMB_LED_7
35
SUB*_1442V PKG_TYPE=TSSOP14
SUB*_1442V PKG_TYPE=TSSOP14
SUB*_1442V PKG_TYPE=TSSOP14
SUB*_1442V PKG_TYPE=TSSOP14
SUB*_1442V PKG_TYPE=TSSOP14
SUB*_1442V PKG_TYPE=TSSOP14
SUB*_1442V PKG_TYPE=TSSOP14
+3.3V_AUX
U44
1142
74VHC04
U44
5146
74VHC04
U44
111410
74VHC04
U36
1142
74VHC04
U36
5146
74VHC04
U36
74VHC04
U40
3144
74VHC04
U44
3144
74VHC04
SUB*_1442V PKG_TYPE=TSSOP14
U44
9148
74VHC04
SUB*_1442V PKG_TYPE=TSSOP14
U44
131412
74VHC04
SUB*_1442V PKG_TYPE=TSSOP14
U36
3144
74VHC04
SUB*_1442V PKG_TYPE=TSSOP14
U36
9148
74VHC04
SUB*_1442V PKG_TYPE=TSSOP14111410
U36
131412
74VHC04
SUB*_1442V PKG_TYPE=TSSOP14
U40
1142
74VHC04
SUB*_1442V PKG_TYPE=TSSOP14
ROOM=FANLED
RB277
1 2 130-1%
R389
130-1%
R329
130-1%
R327
130-1%
RB278
1 2
130-1%
R392
130-1%
R399
130-1%
RB281
130-1%
R394
1 2 130-1%
R395
130-1%
RB240
130-1%
R331
130-1%
R378
1 2
130-1%
R360
130-1%
FAN LED DRIVERS
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
VCC
12
R388
R384
R382
R370
2 1
2 1
2 1
8.2K-5%
8.2K-5%
8.2K-5%
8.2K-5%
RN139
R368
2 1
R367
2 1
R364
2 1
8.2K-5%
R349
2 1
8.2K-5%
1 8
1.5K-5% RN139
2 7
1.5K-5% RN139
3 6
1.5K-5% RN139
4 5
1.5K-5%
8.2K-5%
RN135
1 8
1.5K-5% RN135
2 7
1.5K-5% RN135
3 6
1.5K-5% RN135
4 5
1.5K-5%
8.2K-5%
RN132
3 6
1.5K-5% RN132
2 7
1.5K-5% RN132
4 5
1.5K-5% RN132
1 8
1.5K-5%
50V-20%
.01UF
50V-20%
.01UF
50V-20%
.01UF
1 2
1 2
1 2
C433
C429
C400
50V-20%
.01UF
1 2
50V-20%
.01UF
1 2
50V-20%
.01UF
1 2
FAN_RPM_RAW_1A
1
2
38
FAN_RPM_RAW_1B
38
FAN_RPM_RAW_2A
38
FAN_RPM_RAW_2B
38
FAN_RPM_RAW_3A
38
FAN_RPM_RAW_3B
38
FAN_RPM_RAW_4A
38
FAN_RPM_RAW_4B
38
FAN_RPM_RAW_5A
38
FAN_RPM_RAW_5B
38
FAN_RPM_RAW_6A
46
FAN_RPM_RAW_6B
46
VCC
VCC
12
R381
12
R380
R369
2 1
8.2K-5%
8.2K-5%
R363
2 1
8.2K-5%
8.2K-5%
1
3
4
6
50V-20%
.01UF
C430
50V-20%
.01UF
C423
50V-20%
.01UF
CB417
U70
CATH1
CATH2
COMMON1 COMMON2
CATH3
CATH4
BZA462A
1 2
C424
1 2
C417
1 2
CB412
ADD DIODES IN CASE FAN CONNECTS TO +12 BUT NOT GND
--SWH 11/11/02 X02
2 5
50V-20%
.01UF
1 2
50V-20%
.01UF
1 2
50V-20%
.01UF
1 2
FAN_RPM_FILT_1A
FAN_RPM_FILT_1B
FAN_RPM_FILT_2A
FAN_RPM_FILT_2B
CATH1
1
C425
CATH2
3
CATH3
4
CATH4
6
BZA462A
FAN_RPM_FILT_3A
FAN_RPM_FILT_3B
FAN_RPM_FILT_4A
FAN_RPM_FILT_4B
CATH1
1
C411
CATH2
3
CATH3
4
CATH4
6
BZA462A
FAN_RPM_FILT_5A
FAN_RPM_FILT_5B
FAN_RPM_FILT_6A
FAN_RPM_FILT_6B
CB414
U71
COMMON1 COMMON2
U72
COMMON1 COMMON2
38
38
38
38
2 5
38
38
38
38
2 5
38
38
38
38
FAN 7 FILTER added
+5V_AUX
3
4
FAN_RPM_FILT_1A
38
FAN_RPM_FILT_3A
38
FAN_RPM_FILT_5A
38
FAN_RPM_FILT_7A
38
FAN_RPM_FILT_1B
38
FAN_RPM_FILT_3B
38
FAN_RPM_FILT_5B
38
FAN_RPM_FILT_7B
38
FAN_RPM_FILT_2A
38
FAN_RPM_FILT_4A
38
FAN_RPM_FILT_6A
38
FAN_RPM_FILT_2B
38
FAN_RPM_FILT_4B
38
FAN_RPM_FILT_6B
38
FAN_MUX_SEL_0
35
FAN_MUX_SEL_1
35
ADDED PD --SWH 9/27
RB331
1 2
1K-5%
RB308
1 2
RB330
1 2
1K-5%
1K-5%
U50
16
VCC
6
IA0
YA
5
IA1
4
IA2
3
IA3
10
IB0
YB
11
IB1
12
IB2
13
IB3
14
S0
2
S1
1
EA
15
EB
5C3253 QSOP16
U54
16
VCC
6
IA0
YA
5
IA1
4
IA2
3
IA3
10
IB0
YB
11
IB1
12
IB2
13
IB3
14
S0
2
S1
1
EA
15
EB
5C3253 QSOP16
FAN1_RPM
7
FAN2_RPM
9
35
35
ROOM=FANMUX
FAN RPM FILTER & MUX
7
FAN3_RPM
9
FAN4_RPM
35
35
A B
CA
VCC_FANPOWER_PSZONE
SUB ALL TO 1 OHM
FAN_GRN_LED_DRV_1
FAN_AMB_LED_DRV_1
21
FAN_GRN_LED_DRV_2
21
FAN_AMB_LED_DRV_2
21
FAN_GRN_LED_DRV_3
FAN_AMB_LED_DRV_3
21
FAN_GRN_LED_DRV_4
21
21
FAN_AMB_LED_DRV_4
FAN_GRN_LED_DRV_5
FAN_AMB_LED_DRV_5
21
21
FAN_GRN_LED_DRV_6
21
FAN_AMB_LED_DRV_6
FAN_GRN_LED_DRV_7
21
FAN_AMB_LED_DRV_7
38,46
FAN1
1 2
1X6 2.5mm CONN
1X6 2.5mm CONN
1X6 2.5mm CONN
1X6 2.5mm CONN
1X6 2.5mm CONN
1X6 2.5mm CONN
VCC
R42
RN1
3 6
NC_RN7056_6
1.5K-5% RN1
4 5
NC_RN7056_5
1.5K-5%
3 4 5 6
SUB*_3W439
FAN2
1 2 3 4 5 6
SUB*_3W439
FAN3
1 2 3 4 5 6
SUB*_3W439
FAN4
1 2 3 4 5 6
SUB*_3W439
FAN5
1 2 3 4 5 6
SUB*_3W439
FAN7
1 2 3 4 5 6
SUB*_3W439
R30
2 1
2 1
8.2K-5%
8.2K-5%
RN1
1 8
1.5K-5% RN1
2 7
1.5K-5%
FAN_RPM_RAW_1A
38
FAN_RPM_RAW_1B
38
VCC_FANPOWER_CPUZONE
38
FAN_RPM_RAW_2A
38
FAN_RPM_RAW_2B
38
FAN_RPM_RAW_3A
38
FAN_RPM_RAW_3B
38
FAN_RPM_RAW_4A
38
FAN_RPM_RAW_4B
38
FAN_RPM_RAW_5A
38
FAN_RPM_RAW_5B
38
FAN_RPM_RAW_7A
38
38
38
38
38
38
38
38
38
38
46
46
38
38
38
FAN_RPM_RAW_7B
38
VCC_FANPOWER_PSZONE
38,46
NC_RN7056_3
NC_RN7056_4
FAN CONNECTORS & LEDs
FAN_RPM_RAW_7A
38
FAN_RPM_RAW_7B
38
FAN_AMB_LED_DRV_1
38
FAN_GRN_LED_DRV_1
38
FAN_AMB_LED_DRV_2
38
FAN_GRN_LED_DRV_2
38
FAN_AMB_LED_DRV_3
38
FAN_GRN_LED_DRV_3
38
FAN_AMB_LED_DRV_4
38
FAN_GRN_LED_DRV_4
38
FAN_AMB_LED_DRV_5
38
FAN_GRN_LED_DRV_5
38
FAN_AMB_LED_DRV_7
38
FAN_GRN_LED_DRV_7
38
50V-20%
50V-20%
.01UF
1 2
C67
TITLE
CATH1
1
CATH2
3
CATH3
4
CATH4
6
FAN 7 FILTER
FAN_RPM_FILT_7A
FAN_RPM_FILT_7B
.01UF
1 2
C48
EVERGLADES MB
U73
COMMON1 COMMON2
BZA462A
FAN1_LED
1 2
BICOLOR
FAN2_LED
1 2
BICOLOR
FAN3_LED
1 2
BICOLOR
FAN4_LED
1 2
BICOLOR
FAN5_LED
1 2
BICOLOR
FAN7_LED
1 2
BICOLOR
2 5
+3.3V_AUX
Y
43
SG
+3.3V_AUX
Y
43
SG
+3.3V_AUX
Y
43
SG
+3.3V_AUX
Y
43
SG
+3.3V_AUX
Y
43
SG
+3.3V_AUX
Y
43
SG
38
38
COMPUTER CORPORATION
AUSTIN,TEXAS
1
2
3
4
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
EVERGLADES 38 6-9-2003_13:56
DC
SHEET
REV.
A00-00
38 OF 51
Page 39
TXO+_ESM4
49
49.9-1%
+3.3V_AUX
1
0.1uF 16V C483
1 2
49.9-1%
TXO-_ESM4
49
PLACE NEAR ESM4 CONNECTOR!
2
3
AGILENT PIN:
~ESM4_DCD0 ~ESM4_DSR0
ESM4_SIN0 ~ESM4_RTS0 ESM4_SOUT0 ~ESM4_CTS0 ~ESM4_DTR0
~ESM4_RI0
THIS PORT IS NOT SWAPPED (NULL MODEM STYLE) BECAUSE IT IS GOING TO THE EXTERNAL CONN
4
+3.3V_AUX
+2.5V
RB258
1 2
8.2K-5%
R508
21
R505
21
18,24
18,24 18,24 18,24
18,24 18,24 18,24
18,24 18,19
18,19,24
18,19,24
18,24 18,24
18,24 18,24 18,24
18,24 18,24 18,24
18,24 18,24 18,19
35,37
42,47
22,39 22,39 22,39 22,39
VCC
NC_MII_TXD3 NC_MII_TXD1
NC_MII_TX_EN NC_MII_TX_ER
NC_MII_RX_CLK NC_MII_RXD0
NC_MII_RXD2 NC_MII_COL
TXO+_ESM4 TXO-_ESM4
PIRQ_12
19
PIRQ_14
19
CK_33M_ESM4
5
PCI0_REQ_CSB2
18
PCI0_GNT_CSB2
18
PCI0_AD2
PCI0_AD4 PCI0_AD6 PCI0_CBE0
PCI0_AD9 PCI0_AD11 PCI0_AD13
PCI0_AD15 PCI0_SERR PCI0_TRDY
PCI0_STOP PCI0_PAR PCI0_CBE2
PCI0_AD17 PCI0_AD19 PCI0_AD21
PCI0_AD23 PCI0_AD24 PCI0_AD26
PCI0_AD28 PCI0_AD30 PCI0_LOCK
ESM4_IDSEL
IPMB_SCL ESM4_GPIODEF_SCL
39
IDE_RESET IDE_PDA2
18
IDE_PDA0
18
IDE_ESM_D7
20
IDE_ESM_D6
20
IDE_ESM_D5
20
IDE_ESM_D4
20
IDE_ESM_CS0
20
IDE_ESM_D3
20
IDE_ESM_D2
20
IDE_ESM_D1
20
IDE_ESM_D0
20
RIDE_ESM_IRQ
20
RIDE_ESM_DREQ
20
ESM4_SER_DCDA
23
ESM4_SER_DSRA
23
ESM4_SER_SINA
23
ESM4_SER_RTSA
23
ESM4_SER_SOUTA
23
ESM4_SER_CTSA
23
ESM4_SER_DTRA
23
ESM4_SER_RIA
23
KB_CLK_SIO KB_DATA_SIO MSE_CLK_SIO MSE_DATA_SIO
RB381
1 2
100-5%
VCC
NC_IDE_PDDASP NC_IDE_PDPDIAG
+3.3V_AUX
+3.3V +3.3V
NC_AC205_ACTLED
NC_SPARE1_SCL NC_SPARE2_SCL
~MII_ENABLE NC_ESM4_GPIO0 AC205_RST
49
AC205_LINK_STATUS
49
GPIO3 NC_ESM4_GPIO4 NC_ESM4_GPIO5 NC_ESM4_GPIO6 NC_GPI_ESM_VIRTUAL_MODE_1
NC_ESM4_3RDSER_RD NC_ESM4_3RDSER_RTS NC_ESM4_232_485_RTS SPROC_RST
22
ESM4_GPIO_PHY_PRES
A B
A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60
A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94 A95 A96 A97 A98
A99 A100 A101 A102 A103 A104 A105 A106 A107 A108 A109 A110 A111 A112 A113 A114 A115 A116 A117 A118 A119 A120
A1
A1
A2
A2
A3
A3
A4
A4
A5
A5
A6
A6
A7
A7
A8
A8
A9
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60
CONN2X120
A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94 A95 A96 A97 A98 A99 A100 A101 A102 A103 A104 A105 A106 A107 A108 A109 A110 A111 A112 A113 A114 A115 A116 A117 A118 A119 A120
CONN2X120
ESM4
PLUG ESM4
PLUG
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60
B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94 B95 B96 B97 B98
B99 B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118 B119 B120
VCC
B1
B1
B2
B2
B3
B3
B4
B4
B5
B5
B6
B6
B7
B7
B8
B8
B9
B9
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60
NC_MII_TXD2 NC_MII_TXD0
NC_MII_TX_CLK NC_MII_RX_ER
NC_MII_RX_DV NC_MII_RXD1
NC_MII_RXD3 NC_MII_CRS
RXI+_ESM4 RXI-_ESM4
PIRQ_13 PIRQ_15 PCI0_RST_ESM4
ISO_PME_BUS0
PCI0_AD0 PCI0_AD1 PCI0_AD3
PCI0_AD5 PCI0_AD7 PCI0_AD8
PCI0_AD10 PCI0_AD12 PCI0_AD14
PCI0_CBE1 PCI0_PERR PCI0_IRDY
PCI0_DEVSEL PCI0_FRAME PCI0_AD16
PCI0_AD18 PCI0_AD20 PCI0_AD22
PCI0_CBE3 PCI0_AD25 PCI0_AD27
PCI0_AD29 PCI0_AD31
(PCI0_M66EN)
IPMB_SDA ESM4_GPIODEF_SDA
IDE_ESM_IOW IDE_ESM_IOR IDE_PDA1
+3.3V_AUX
B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94 B95 B96 B97 B98 B99 B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118 B119 B120
IDE_ESM_D8 IDE_ESM_D9 IDE_ESM_D10 IDE_ESM_D11
IDE_ESM_CS1 IDE_ESM_D12 IDE_ESM_D13 IDE_ESM_D14 IDE_ESM_D15
RIDE_ESM_IORDY
IDE_ESM_DACK
HOST_SER_DTRB
HOST_SER_SOUTB HOST_SER_CTSB HOST_SER_SINB
HOST_SER_RTSB HOST_SER_DSRB HOST_SER_RIB
KB_CLK KB_DATA MSE_CLK MSE_DATA
USBP3­USBP3+
SEL_ESM4_KB_DISCON NC_SEL_REAL_CSEL# NC_SEL_IDE_TO_REAL NC_SEL_IDE_TO_ESM4 XGPIO13 XGPIO14 XGPIO15
NC_ESM4_3RDSER_TD NC_ESM4_3RDSER_CTS
3.3VAUX_PWRGOOD SYSTEM_PWRGOOD
~SP_IRQ
19 19 47
22
18,24 18,24 18,24
18,24 18,24 18,24
18,24 18,24 18,24
18,24 18,19 18,19,24
18,19,24 18,19,24 18,24
18,24 18,24 18,24
18,24 18,24 18,24
18,24 18,24 20
35,37 39
20 20 18
20 20 20 20
20 20 20 20 20
20 20
AGILENT PIN:
~ESM4_DCD1
22
~ESM4_DSR1 ESM4_SIN1
22
~ESM4_RTS1
22 22
ESM4_SOUT1
22
~ESM4_CTS1 ~ESM4_DTR1
22
~ESM4_RI1
22
23,39 23,39 23,39 23,39
20 20
+3.3V_AUX
8.2K-5%
1 2
39
37,47,48,51 17,21,35,42,47,51
ADD1=ADD*_5W007_ESM4 ADD2=ADD*_5W007_ESM4
B D
RXI+_ESM4
49.9-1% 49.9-1% R509
21
R506
21
RXI-_ESM4
PLACE NEAR ESM4 CONNECTOR!
49
49
ESM4 CONNECTOR
ROOM=ESM4
THIS PORT *IS* SWAPPED (NULL MODEM STYLE) BECAUSE IT IS GOING TO THE SIO SWAPPING:
SIN/SOUT CTS/RTS DTR/DSR
CONNECTING DCD OF EACH DEVICE TO ITS DSR PIN
PULLING UP RI
+3.3V_AUX
8.2K-5%
1 2
R405
RB266
NC_AC205_LINKLED
NC_SPARE1_SDA NC_SPARE2_SDA
GPI_ESM4_PRESENT NC_GPI_ESM_VIRTUAL_MODE_0
VIRTUAL MODE GPIs ARE NOT USED
+2.5V
22,35
ESM4 STANDOFFS ESM4 STANDOFFS
CA
ROOM=INTRUS
0.1uF 16V
14
U60
1
VFPCP
2N7002
G
1
D
S
3
2
19,35
2 4 6 8
OPEN
4SWITCH
SUB*_5G144
VBAT
VFPCP
INTRUDED
INTRUSION_CONN INTRUSION_VAUX
17,22,51
37,39,40
INTRUSION
1 3 5 7
ADD=ADD*_1K116_LEVER
2N7002
G
1
Q28
D
S
3
2
270K
1 2
R459
1 2
1K-5%
RB391
R433
1 2
1K-5%
14
5 6
74VHC02
50V-10%
1000pF
1
U60
4
C450
2 3
74VHC02
Q27
2
todo consider depopping cap
ESM4 GPIO DEFINITION EEPROM
ROOM=ESM4
0.1uF 16V CB446
1 2
22,39 22,39 22,39 22,39
220
MSE_DATA_SIO MSE_CLK_SIO KB_DATA_SIO KB_CLK_SIO
2 1
RB356
1 2 3 6 4
+3.3V_AUX
U58
24C02
VCC
GND2
SDA
8 7
5
A0 A1 A2 SCL
GND1
SUB*_1X252
Blank part is 5E703.
ADDED PULL-UPS SWH 9/27/02
VCC
876
54
8.2K
RN140
321
+3.3V_AUX
X01 -- ADDED PULL-UPS --SWH 10/1/02
21
21
R450
R451
10K-5%
10K-5%
ESM4_GPIODEF_SCL ESM4_GPIODEF_SDA
39 39
Everglades Prog p/n = 1X252
FROM ESM4
SEL_ESM4_KB_DISCON
39
KB/MSE DISCONNECT FOR ESM4 VIRTUAL KB/MSE
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
C452
1 2
37,39,40
22
+3.3V
R385
1 2
8.2K-5% 5
12 15
3 4 6 7
11 10 14 13
U45
VCC1OE 2OE 3OE 4OE
1A 1Y 2A 2Y 3A 3Y 4A 4Y
QS3126
1
2
3
ROOM=ESM4
VCC
162
MSE_DATA MSE_CLK KB_DATA KB_CLK
TITLE
DWG NO.
DATE
EVERGLADES 39 6-9-2003_13:56
23,39 23,39 23,39 23,39
COMPUTER CORPORATION
AUSTIN,TEXAS
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
X1004
6/6/2003
SHEET
REV.
39 OF 51
DC
4
A00-00
Page 40
B D
CA
Factor Nominal V
1/5
2.400 1/2 3/4 1/1
0.1uF 16V
0.1uF 16V
CB437
21
2.500
2.475
0.1uF 16V
CB489
1 2
Q22
Q21
2N7002
2N7002
G
1
G
1
RN136
1.5K-5%
S 2
+12V
VCC
+3.3V
S 2
+2.5V
+1.8V
+3.3V_AUX
+1.5V
VCORE
1 3 BAR43
VCORE
R383
1K-1%
D7
21
RN136
1 8
1.5K-5%
R444
3.01K-1% R386
1 2
3.01K-1% R445
1 2
1K-1%
R362
1K-1%
R442
1 2
10K-1%
RN136
3 6
1.5K-5%
RN136
1.5K-5%
R348
R379
1K-1%
21
3.01K-1%
21
3.01K-1%
54
21
3.01K-1%1K-1%
21
NC_RN39_2 NC_RN39_72 7
1
37,39,40
51
37,39,40
22
VFPCP
LI_BAT_PACK+
VFPCP
ESM_VBAT
D 3
D 3
2
R443
R393
1 2
1K-1%
R446
1K-1%
R366
1 2
R361
1 2
BMC_A2D_3.3VFP
35
21
21
0.1uF 16V
0.1uF 16V
CB422
21
CB490
1 2
0.1uF 16V
CB418
21
38.6mV
23.0mV
0.1uF 16V
1 2
C454
0.1uF 16V
CB430
1 2
1 2
C42721C413
43.9mV
17.6mV
8.8mV
0.1uF 16V
0.1uF 16V
Total ErrR Err A2D Err
82.5mV
40.6mV
24.1mV11.7mV12.4mV
8.8mV
0.1uF 16V 0.1uF 16V
CB420
1 2
CB428
1 2
1 2
C414
10uF 6.3V
A2D_VCORE
A2D_ROMB_BAT
A2D_12
A2D_5
A2D_3_3
A2D_BAT
A2D_2_5
A2D_1_8
A2D_3VAUX
A2D_1_5
1
40
35
EVERGLADES MONITORED VOLTAGES
35
35
40
35
35
40
SWITCHING REGULATORS
POWER SUPPLY
BATTERIES
12V
3.3V_AUX CPU CORE
5V
3.3V
2.5V
1.8V
1.5V
1.25V (VTT)
Using linear regulator. Not being monitored by ESM3.
COIN BATTERY
2
ROMB BATTERY
MISC
40
40
2.5V_REF
R374
10M-5%
1 2
R373
10M-5%
1 2
3
ROOM=VMONITOR
0.1uF 16V
0.1uF 16V
0.1uF 16V
0.1uF 16V
0.1uF 16V
0.1uF 16V
CB421
CB488
CB436
21
C412
CB491
1 2
1 2
21
21
ADD 20M PULL-DOWN ON VBAT TO DETECT MISSING BATTERY
4
A B
0.1uF 16V
CB492
1 2
0.1uF 16V
1 2
C421
0.1uF 16V
0.1uF 16V CB419
CB423
CB433
1 2
21
+3.3V_AUX
TL431ACD
1 2
220
7
RB273
21
1
1 2
C422
D9 8
236
0.1uF 16V CB435
21
NP*
Need >1mA
3.3V-2.5V= 0.8V
0.8V / 1mA <= 800ohm
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
A2D_2_5_REF
00
0
VCORE 1.5V
1
ROMB BATTERY
2
12V
3
5V
4
3.3V
5
COIN BATTERY
6
2.5V
7
35
2.5V Reference
AMUX_SEL0
35
AMUX_SEL1
35
A2D_VCORE
40
A2D_1_5
40
A2D_3_3
40
A2D_3VAUX
40
A2D_1_8
40
RB247
1 2
1K-5%
01 10 11
(unused)
3.3V_AUX
U41
10
A
9
B
12
X0
14
X1
15
X2
11
X3
1
Y0
5
Y1
2
Y2
4
Y3
6
INH
14052BD
VDD
X
Y
VEE
VSS
+3.3V_AUX
16
13
3
7
8
(unused)
CB429
21
1uF
10V-10%
A2D_MUX0
A2D_MUX4
3
1.8V
35
35
4
COMPUTER CORPORATION
TITLE
EVERGLADES MB
AUSTIN,TEXAS
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
EVERGLADES 40 6-9-2003_13:56
DC
SHEET
REV.
A00-00
40 OF 51
Page 41
B D
X01 -- CHANGED TRIM TO 14.05K (NET) FOR FINAL REGULATOR SPEC --SWH 10/9
CA
Input 12V
Output
MAX PWR
1
47 47
SUB TO 1K TO MAKE
SURE REG IS OFF
IF CPLD IS BLANK
1.8V /6A (Approx 2 A required)
Dest
LSI1030 SCSI
+12V
R35
DC2DC_1.8V_PWRGOOD DC2DC_1.8V_EN
R44
+12V
16V-20%
1 2
270uF
+
C5
+12V
R21
1 2
8.2K-5%
NP*
R34
1 2
2.7K-5%
SUB*_79651
SUB TO 1.96K
Set Point is 1.8V
C30
2 1
4.7uF 16V-10%
1 2
8.2K-5%
1 2
2.7K-5%
SUB*_1R110
0.1uF 16V
0.1uF 16V 2 1C32 1
C20
ROOM=REG_1.8
+1.8V
+12V
VERTICAL MODULE
R48
1K-1%
1 2
21
C63
CB5
CB16
1 2
0.1uF 16V
.47uF
16V-10%
2 1
U_18V
1
VCC
2
TRIM
3
VSS
4
PWRGD
5
OUTEN
6
12V_IN
15W-6A DC-DC
SUB*_2R515
C76
C75
2 1
4.7uF
4.7uF 16V-10%
16V-10%
2 1
C4
4.7uF 16V-10%
+1.8V
2 1
4.7uF 16V-10%
4V-20%
820uF
+
1 2
C36
Input 12V
Output
MAX PWR
Dest
DC2DC_3.3V_EN
47
3.3V_PWRGOOD
47
SUB TO 1K TO MAKE
SURE REG IS OFF
IF CPLD IS BLANK
16V-20%
1 2
270uF
+
3.3V / 10A (Approx 2A required)
PCI slots, chipset, misc logic
R49
1 2
8.2K-5%
NP*
R51
1 2
2.7K-5%
SUB*_79651
Set Point is 3.3V
C83
2 1
+12V
R53
1 2
R56
1 2
0.1uF 16V
4.7uF 16V-10%
8.2K-5%2.7K-5%
0.1uF 16V
2 1C62 1
R4
1 2
C21
+12V
562-1%
+12V
+12V
C59
ROOM=REG_3.3V
C10
1 2
+3.3V
21
R55
21
C9
0.1uF 16V
182K-1%
SUB*_2727P
C12
.47uF
16V-10%
U_3V
1
VCC_1
2
VCC_2
3
VCC_3
4
TRIM
5
OUTEN
6
PWRGD
7
VSS_7
8
VSS_8
9
PWRGD_SET
10
12VIN_10
11
12VIN_11
40W-15A DC-DC
SIP11
SUB*_1M903
SUB TO 1.82K
C11
2 1
2 1
4.7uF
4.7uF 16V-10%
C7
2 1
16V-10%
C8
4.7uF 16V-10%
+3.3V
2 1
4.7uF 16V-10%
2
3.3V REGULATOR MODULE (40W SIP)1.8V REGULATOR MODULE (15W SIP)
16V 10%
4V-20%
820uF
+
+3.3V
10uF
1 2
C325
21
C18
Input
Output
MAX PWR
Dest
+2.5V
C324
1 2
22uF 10V
R272
1 2
1.3K-1%
SUB*_85444
R278
1 2
1.3K-1%
SUB*_6E064
DC2DC_1.5V_EN
47
+2.5V
1.5V / 2.7A
IMB2 buffers in CMIC-LE, CIOB-X2, and CIOB-E
+80%-20%
SUB TO 20K 1%
SUB TO 47.5K 1%
R273
220
+1.5V
21
U_15V
1
VIN
2
GND1
3
VBIAS
4
VOUT
5
TRIM
6
OUTEN
SWITCHING REGULATOR
HORIZONTAL MODULE
X01 -- CHANGED PIN 3 TO NC FOR FINAL REG SPEC --SWH 10/9/02
1.5K-5%
1 2
R279
OUTEN
SUB*_2U647
+1.5V
C326
1 2
+80%-20%
22uF 10V
ROOM=REG_1.5V
1.5V REGULATOR (LOW VOLTAGE SWITCHING MODULE)
1
2
3
DC2DC_2.5V_PWRGOOD
47
DC2DC_2.5V_EN
47
PULL-DOWN TO MAKE
SURE REG IS OFF
IF CPLD IS BLANK
+12V
4
2 1
+
270uF
16V-20%
4V-20%
C348
820uF
+
+2.5V
1 2
C330
RB27
4V-20%
820uF
+
REPLACED WITH NEW SYMBOL FOR GRND POST DFM ISSUE ON BOXSTER
+12V
U_25V
1
+RS
K
3
-RS
4
PWRGD
5
RSVD_1
PWRGD_SET
6
RSVD_2
7
VSS_0
8
VSS_1
9
OUTEN
10
-SENCE
11
+SENSE
12
12V_IN_0
13
12V_IN_1
14
12V_IN_2
15
VOUT_0
16
VOUT_1
17
VSS_2
18
VOUT_2
19
VSS_3
20
VOUT_3
21
VSS_4
22
VOUT_4
23
VSS_5
24
VOUT_5
MH1
GND_MH1
MH2
GND_MH2
DC/DC CONVERTER
MOD. 073_20821_03
1 2
R303
1 2
R284
1 2
1 2
C394
1K-1%
8.2K-5%2.7K-5%
R302
1 2
SENSE_25V
0-5%
R298
1 2
47K-5%
SUB*_6E064
SUB TO 47.5K 1%
NP*
R304
21
10K-1%
NC_DC25_6
+12V
+2.5V
ROOM=DC_2P5V
2.5V REGULATOR MODULE (100W SIP)
A B
16V-20%
1 2
270uF
+
Input 12V
Output
MAX PWR
+12V
C468
5V /20A (Approx 8A required)
Dest
PCI slots, hard drives
DC2DC_5V_PWRGOOD
47
DC2DC_5V_EN
47
PULL-DOWN TO MAKE
SURE REG IS OFF
IF CPLD IS BLANK
0.1uF 16V
C448
2 1
0.1uF 16V
4.7uF 16V-10%
2 1
C449
CB486
2 1
+12V
RB237
1 2
RB238
1 2
8.2K-5%2.7K-5%
NP*
SUB*_79651
1 2
C396
+12V
RB236
1 2
RB235
1 2
2.7K-5% 8.2K-5%
C415
0.1uF 16V
RB239
1 2
21
47K-5%
.47uF
16V-10%
NC_DC5_6
SENSE_5V
VCC
0-5%
R553
1 2
SUB*_30661
SUB TO 47.5K 1%
C395
C410
2 1
2 1
4.7uF 16V-10%
ROOM=REG_5V
R552
1 2
0-5%
C409
4.7uF 16V-10%
+12V
2 1
4.7uF 16V-10%
U_5V
1
+RS
K
3
-RS
4
PWRGD
PWRGD_SET
5
RSVD_1
6
RSVD_2
7
VSS_0
8
VSS_1
9
OUTEN
10
-SENCE
11
+SENSE
12
12V_IN_0
13
12V_IN_1
14
12V_IN_2
15
VOUT_0
16
VOUT_1
17
VSS_2
18
VOUT_2
19
VSS_3
20
VOUT_3
21
VSS_4
22
VOUT_4
23
VSS_5
24
VOUT_5
MH1
GND_MH1
MH2
GND_MH2
DC/DC CONVERTER
MOD. 073_20821_03
VCC
6.3V-20%
C428
2 1
4.7uF 16V-10%
5V REGULATOR MODULE (100W SIP)
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
680uF
+
40W/15W SIP
Programming Output
Resistor (Ohms)
23.7k 1.250
VCC
SUB*_86VYR
16V-20%
1 2
270uF
+
C475
X01 --ADDED 270 TO ELIMINATE 680 BELOW --swh 10/15 X03 --SUB TO 680uF CAP PER PS TEAM SPEC-- SC 12/18
1 2
C402
X01 --SUB TO 270uF 16V TO ELIMINATE PART NUMBER --swh 10/15 X03--PUT IT BACK TO 680uF, POWER SUPPLY TEAM DIDN'T LIKE 2x270uF
(Volts)
301 422 562 649
5.089
3.974
3.3
3.004
2.761750
909
1100
2.488
2.264
1470 1.997
1.8931690
1960
1.798
1.7052320 3010 1.589 3920
1.499 26.1K 5900 1.399
1.29911.8k
1.200OPEN
PWRGDSET Res. Max Current
0
40W
4.22K
0
8
3.0
10 4.5
12
6.0
100W
21.5K 1.78K
47.5K
40W 15W
6.0
6.0
6.0
6.0
11.8K
169K OPEN
15 15 15 15 15 15 15 15
6.0
6.0
6.0
6.0
6.0
6.0
6.0
100W SIP
Programming
Resistor (Ohms)
0 5 10K OPEN 2.5
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
6/6/2003
DC
AUSTIN,TEXAS
SHEET
Output Voltage
(Volts)
3.3
REV.
A00-00
41 OF 51
6-9-2003_13:5641EVERGLADES
3
4
Page 42
B D
CA
GUIDE PINS
BACKPLANE CONNECTOR
NC_BIGBP_A2 NC_BIGBP_B2
FLP_HDSEL
19,22
43,45
43,45 43,45
43,45
43,45
43,45
43,45
43,45 43,45
43,45
43,45
43,45
43,45
43,45 43,45
43,45
43,45
43,45
43,45
43,45 43,45
43,45
43,45
43,45
43,45
43,45 43,45
43,45
43,45
43,45
43,45
43,45 43,45
43,45
22
22
22
18 22
18 22
18
22
22
20 22
20 22
20 22
20 22 22 20
1030A_SD11+ 1030A_SD9+
1030A_SD11-
1030A_SD9-
1030A_SSEL+
1030A_SSEL-
1030A_SMSG+
1030A_SREQ+ 1030A_SMSG-
1030A_SREQ-
1030A_SRST+
1030A_SRST-
1030A_SD5+
1030A_SD7+ 1030A_SD5-
1030A_SD7-
1030A_SBSY+
1030A_SBSY-
1030A_SD4+
1030A_SD6+ 1030A_SD4-
1030A_SD6-
1030A_SD3+
1030A_SD3-
1030A_SD13+
1030A_SD2+ 1030A_SD13-
1030A_SD2-
1030A_SDP1+
1030A_SDP1-
1030A_SD14+
1030A_SD12+ 1030A_SD14-
1030A_SD12-
NC_BIGBP_C3
FLP_WP
FLP_DENSEL
IDE_SDA2 FLP_TRK0
IDE_SDA1 FLP_WDATA
IDE_SDA0 FLP_DSKCHG FLP_RDATA
FLP_DIR
IDE_CD_CS1 FLP_INDEX
IDE_CD_CS0 FLP_WGATE
RIDE_CD_IRQ FLP_STEP
IDE_CD_DACK FLP_MTR0 FLP_DR0 RIDE_CD_DREQ
2G227 IS PRESS-FIT
SUB*_2G227
SUB*_8M499
1
2
3
4
BACKPLANE_1
1
A1
25
B1
49
C1
2
A2
26
B2
50
C2
3
A3
27
B3
51
C3
4
A4
28
B4
52
C4
5
A5
29
B5
53
C5
6
A6
30
B6
54
C6
7
A7
B7
31 55
C7
8
A8
32
B8
56
C8
9
A9
33
B9
57
C9
10
A10
34
B10
58
C10
11
A11
35
B11
59
C11
12
A12
36
B12
60
C12
13
A13
37
B13
61
C13
14
A14
38
B14
62
C14
15
A15
39
B15
63
C15
16
A16
40
B16
64
C16
17
A17
41
B17
65
C17
18
A18
42
B18
66
C18
19
A19
43
B19
67
C19
20
A20
44
B20
68
C20
21
A21
45
B21
69
C21
22
A22
46
B22
70
C22
23
A23
47
B23
71
C23
24
A24
48
B24
72
C24
RIGHT ANGLE PLUG
HDM BACKPLANE
CONN ASSY
CONN ASSY HDM BACKPLANE VERTICAL JACK
D12
48
E12
60
F12
72
D11
47
E11
59
F11
71
D10
46
E10
58
F10
70
D9
45
E9
57
F9
69
D8
44
E8
56
F8
68
D7
43
E7
55
F7
67
D6
42
E6
54
F6
66
D5
41
E5
53
F5
65
D4
40
E4
52
F4
64
D3
39
E3
51
F3
63
D2
38
E2
50
F2
62
D1
37
E1
49
F1
61
BACKPLANE_2
WALL
A B
+12V+12V
VCC
121
F1
97
E1
73
D1
122
F2
98
E2
74
D2
123
F3
99
E3
75
D3
124
F4
100
E4
76
D4
125
F5
101
E5
77
D5
126
F6
102
E6
78
D6
127
F7
103
E7
79
D7
128
F8
104
E8
80
D8
129
F9
105
E9
81
D9
130
F10
106
E10
82
D10
131
F11
107
E11
83
D11
132
F12
108
E12
84
D12
133
F13
109
E13
85
D13
134
F14
110
E14
86
D14
135
F15
111
E15
87
D15
136
F16
112
E16
88
D16
137
F17
113
E17
89
D17
138
F18
114
E18
90
D18
139
F19
115
E19
91
D19
140
F20
116
E20
92
D20
141
F21
117
E21
93
D21
142
F22
118
E22
94
D22
143
F23
119
E23
95
D23
144
F24
120
E24
96
D24
VCC
ROOM=BP_CONN
NC_BIGBP_F3 NC_BIGBP_E3 NC_BIGBP_D3 IDE_CD_IOW
IDE_RESET
IDE_CD_IOR
IDE_CD_D8
IDE_CD_D7 IDE_CD_D9
IDE_CD_D6 IDE_CD_D10
IDE_CD_D5 IDE_CD_D11
IDE_CD_D4 IDE_CD_D12
IDE_CD_D3 IDE_CD_D13
IDE_CD_D2 IDE_CD_D14
IDE_CD_D1 IDE_CD_D15 RIDE_CD_IORDY IDE_CD_D0
SYSTEM_PWRGOOD 1030A_SIO+
BP_IPMB_SCL 1030A_SIO-
GPE_BP_ALERT ESM_ALERT
1030A_SD10+ BP_IPMB_SDA
1030A_SD10-
1030A_SCD+
1030A_SCD-
1030A_SD8+
1030A_SD8-
1030A_SATN+
1030A_SATN-
20
39,47
20
20
20 20
20 20
20 20
20 20
20 20
20 20
20 20 20 20
17,21,35,39,47,51 43,45
37 43,45
43,45 37
43,45
43,45
43,45
43,45
43,45
43,45
43,45
D10
BAR43
13
1
2
35
3
+3.3V
C12
36
B12
24
A12
12
C11
35
B11
23
A11
11
C10
34
B10
22
A10
10
C9
33
B9
21
A9
9
C8
32
B8
20
A8
8
C7
31
B7
19
A7
7
C6
30
B6
18
A6
6
C5
29
B5
17
A5
5
C4
28
B4
16
A4
4
C3
27
B3
15
A3
3
C2
26
B2
14
A2
2
C1
25
B1
13
A1
1
1030A_SACK+
BP_FAULT 1030A_SACK-
BP_HD_ACTIVE
1030A_SDP0+ GPI_BACKPLANE_ID0
1030A_SDP0­GPI_BACKPLANE_ID1 1030A_SD1+
1030A_SD1-
1030A_SD15+
1030A_SD15-
1030A_SD0+
1030A_SD0-
NC_BP_SMALL_E11
1030A_DIFFSENSE
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
43,45
35 43,45
46
43,45 22
43,45 22 43,45
43,45
43,45
43,45
43,45
43,45
43,45
TITLE
DWG NO.
DATE
COMPUTER CORPORATION
AUSTIN,TEXAS
DAGGER MB
SCHEM,PLNR,PE1750,533MSI
X1004
6/6/2003
SHEET
DC
REV.
42 OF 51
6-9-2003_13:5642EVERGLADES
4
A00-00
Page 43
B D
SCSI Controller: PCI-X/Differential Pairs
CA
1
ROOM=LSI_1030
U_SCSI
CK_PCIX_SCSI_LSI_100M
26
PCIX_SCSI_RST
26,51
NC_PCIX_SCSI_M66EN
12
1K-5%
RB110
2
3
26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51
26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51 26,51
PCIX_SCSI_CBE7 PCIX_SCSI_CBE6 PCIX_SCSI_CBE5 PCIX_SCSI_CBE4 PCIX_SCSI_CBE3 PCIX_SCSI_CBE2 PCIX_SCSI_CBE1 PCIX_SCSI_CBE0
PCIX_SCSI_AD63 PCIX_SCSI_AD62 PCIX_SCSI_AD61 PCIX_SCSI_AD60 PCIX_SCSI_AD59 PCIX_SCSI_AD58 PCIX_SCSI_AD57 PCIX_SCSI_AD56 PCIX_SCSI_AD55 PCIX_SCSI_AD54 PCIX_SCSI_AD53 PCIX_SCSI_AD52 PCIX_SCSI_AD51 PCIX_SCSI_AD50 PCIX_SCSI_AD49 PCIX_SCSI_AD48 PCIX_SCSI_AD47 PCIX_SCSI_AD46 PCIX_SCSI_AD45 PCIX_SCSI_AD44 PCIX_SCSI_AD43 PCIX_SCSI_AD42 PCIX_SCSI_AD41 PCIX_SCSI_AD40 PCIX_SCSI_AD39 PCIX_SCSI_AD38 PCIX_SCSI_AD37 PCIX_SCSI_AD36 PCIX_SCSI_AD35 PCIX_SCSI_AD34 PCIX_SCSI_AD33 PCIX_SCSI_AD32 PCIX_SCSI_AD31 PCIX_SCSI_AD30 PCIX_SCSI_AD29 PCIX_SCSI_AD28 PCIX_SCSI_AD27 PCIX_SCSI_AD26 PCIX_SCSI_AD25 PCIX_SCSI_AD24 PCIX_SCSI_AD23 PCIX_SCSI_AD22 PCIX_SCSI_AD21 PCIX_SCSI_AD20 PCIX_SCSI_AD19 PCIX_SCSI_AD18 PCIX_SCSI_AD17 PCIX_SCSI_AD16 PCIX_SCSI_AD15 PCIX_SCSI_AD14 PCIX_SCSI_AD13 PCIX_SCSI_AD12 PCIX_SCSI_AD11 PCIX_SCSI_AD10 PCIX_SCSI_AD9 PCIX_SCSI_AD8 PCIX_SCSI_AD7 PCIX_SCSI_AD6 PCIX_SCSI_AD5 PCIX_SCSI_AD4 PCIX_SCSI_AD3 PCIX_SCSI_AD2 PCIX_SCSI_AD1 PCIX_SCSI_AD0
AC22
CLK
AB10
RST
AC5
M66EN
AA23
CBE7
AC25
CBE6
Y23
CBE5
AD26
CBE4
AB13
CBE3
AB14
CBE2
AE18
CBE1
AE21
CBE0
W22
AD63
AB25
AD62
AC26
AD61
AA25
AD60
W23
AD59
Y25
AD58
Y26
AD57
V22
AD56
U22
AD55
V24
AD54
V23
AD53
U24
AD52
V25
AD51
W26
AD50
U23
AD49
U25
AD48
T22
AD47
T23
AD46
T25
AD45
R25
AD44
R22
AD43
P22
AD42
P23
AD41
R23
AD40
P24
AD39
P25
AD38
T26
AD37
R26
AD36
M26
AD35
L26
AD34
N25
AD33
N24
AD32
AE9
AD31
AF8
AD30
AE10
AD29
AB11
AD28
AC11
AD27
AE11
AD26
AE12
AD25
AB12
AD24
AC12
AD23
AD13
AD22
AE13
AD21
AF11
AD20
AF16
AD19
AE14
AD18
AC15
AD17
AC14
AD16
AD17
AD15
AE19
AD14
AC18
AD13
AB17
AD12
AB18
AD11
AF20
AD10
AE20
AD9
AC19
AD8
AF23
AD7
AE22
AD6
AB19
AD5
AD21
AD4
AF24
AD3
AC20
AD2
AE23
AD1
AC21
AD0
LSI LOGIC ULTRA320 SCSI
LSI53C1030 REV 0.1 02/05/01
SUB*_8J374
ADD*_3M858_U_SCSI
SERIAL_DATA
HETERO 1 OF 4
PAR
PAR64
ACK64 REQ64 FRAME
TRDY IRDY STOP
DEVSEL
IDSEL
REQ GNT
PERR SERR
INTA INTB
ALT_INTA ALT_INTB
PVT1 PVT2
GPIO_7 GPIO_6 GPIO_5 GPIO_4 GPIO_3 GPIO_2 GPIO_1 GPIO_0
A_LED B_LED
HB_LED
BWE1 BWE0
FLSHALE1 FLSHALE0
MOE
FLSHCE
MPAR1 MPAR0
MCLK
ADSC
ADV
MAD15 MAD14 MAD13 MAD12 MAD11 MAD10
MAD9 MAD8 MAD7 MAD6 MAD5 MAD4 MAD3 MAD2 MAD1 MAD0
RAMCE
SERIAL_CLK
NC_1 NC_2 NC_3
AF19 AA24
AB20 AD22 AB15 AE16 AE15 AB16 AC16 AC13
AD10 AE8
AE17 AC17
AC8 AE7
AF7 AB9
AE5 AF4
K25 L23 L25 M25 H25 K24 AE25 AC23
J23 K23 C25
E24 H23
J24 K22
G26 G25
C22 B24
E20
D21 B23
D22 E21 B25 D23 E22 C24 F22 E23 D26 E25 H22 F24 G23 D25 F23 G22
D20 H26
J25 A24
N23 AC9
NC_1030_GPIO7 NC_1030_GPIO6 NC_1030_GPIO5 NC_1030_GPIO4 NC_1030_GPIO3 NC_1030_GPIO2 NC_1030_GPIO1 NC_1030_GPIO0
PCIX_SCSI_PAR
PCIX_SCSI_PAR64
PCIX_SCSI_ACK64 PCIX_SCSI_REQ64 PCIX_SCSI_FRAME
PCIX_SCSI_TRDY PCIX_SCSI_IRDY PCIX_SCSI_STOP
PCIX_SCSI_DEVSEL
PCIX_LSI_IDSEL
PCIX_SCSI_REQ0
PCIX_SCSI_GNT0
PCIX_SCSI_PERR PCIX_SCSI_SERR
1030_INTA 1030_INTB
NC_1030_AF7
NC_1030_AB9 1030_PVT1 1030_PVT2
NC_1030_CH_A_LED NC_1030_CH_B_LED
NC_1030_HB_LED
NC_1030_E24 NC_1030_H23
NC_1030_MAS1 NC_1030_MAS0
NC_1030_MOE NC_1030_G25
1030_MPAR1 1030_MPAR0
NC_1030_E20
NC_1030_D21 NC_1030_B23
1030_MAD15 1030_MAD14 1030_MAD13 1030_MAD12 1030_MAD11 1030_MAD10
1030_MAD9 1030_MAD8 1030_MAD7 1030_MAD6 1030_MAD5 1030_MAD4 1030_MAD3 1030_MAD2 1030_MAD1 1030_MAD0
NC_1030_RAMCE
1030_SDATA 1030_SCLK
NC_1030_A24 NC_1030_N23 NC_1030_AC9
43 43
43 43 43 43 43 43 43 43 43 43 43 43 43 43 43 43
44 44
TEST PAD
51 51
21
RB115
+3.3V
26,51 26,51
26,51 26,51 26,51 26,51 26,51 26,51 26,51
51
26,27 26,27
26,51 26,51
49.9-1%
21
R165
CONNECTED IDSEL, INTA, AND INTB TO ROMB
--STUART 5/31/02 5:30pm
21
RB100
R182
22K-5%
220K
1030A_DIFFSENSE
42,45
4.7K
21
C241
1 2
0.1uF 16V RB106
10K-1%
21
42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45
42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45
42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45 42,45
1030A_SD15+ 1030A_SD14+ 1030A_SD13+ 1030A_SD12+ 1030A_SD11+ 1030A_SD10+ 1030A_SD9+ 1030A_SD8+ 1030A_SD7+ 1030A_SD6+ 1030A_SD5+ 1030A_SD4+ 1030A_SD3+ 1030A_SD2+ 1030A_SD1+ 1030A_SD0+
1030A_SD15­1030A_SD14­1030A_SD13­1030A_SD12­1030A_SD11­1030A_SD10­1030A_SD9­1030A_SD8­1030A_SD7­1030A_SD6­1030A_SD5­1030A_SD4­1030A_SD3­1030A_SD2­1030A_SD1­1030A_SD0-
1030A_SCD+ 1030A_SCD­1030A_SIO+ 1030A_SIO­1030A_SMSG+ 1030A_SMSG­1030A_SREQ+ 1030A_SREQ­1030A_SACK+ 1030A_SACK­1030A_SBSY+ 1030A_SBSY­1030A_SATN+ 1030A_SATN­1030A_SRST+ 1030A_SRST­1030A_SSEL+ 1030A_SSEL­1030A_SDP0+ 1030A_SDP0­1030A_SDP1+ 1030A_SDP1-
+3.3V
NC_1030_AA4 NC_1030_Y5 NC_1030_AB3 NC_1030_AD2 NC_1030_AB4 NC_1030_AA5 NC_1030_AC6 NC_1030_AE4 NC_1030_AF3 NC_1030_AD6
NC_1030_AC2 NC_1030_AA22
NC_1030_AC4
W5
A_SD15+
Y2
A_SD14+
AA3
A_SD13+
AC1
A_SD12+
D1
A_SD11+
G1
A_SD10+
H4
A_SD9+
H2
A_SD8+
P3
A_SD7+
R5
A_SD6+
R2
A_SD5+
T4
A_SD4+
U4
A_SD3+
U3
A_SD2+
V5
A_SD1+
V3
A_SD0+
Y1
A_SD15-
AA2
A_SD14-
AB2
A_SD13-
AD1
A_SD12-
F2
A_SD11-
G2
A_SD10-
J4
A_SD9-
H1
A_SD8-
R4
A_SD7-
T5
A_SD6-
T2
A_SD5-
U2
A_SD4-
U5
A_SD3-
V2
A_SD2-
V4
A_SD1-
W4
A_SD0-
T1
A_VDDBIAS
E2
A_DIFFSENS
R1
A_RBIAS
K4
A_SCD+
K3
A_SCD-
J5
A_SIO+
K5
A_SIO-
L1
A_SMSG+
L2
A_SMSG-
J3
A_SREQ+
J2
A_SREQ-
L5
A_SACK+
M5
A_SACK-
N4
A_SBSY+
N3
A_SBSY-
N5
A_SATN+
M4
A_SATN-
M2
A_SRST+
M1
A_SRST-
K2
A_SSEL+
L4
A_SSEL-
P5
A_SPD0+
P4
A_SPDO-
W1
A_SPD1+
W2
A_SPD1-
AF12
PCI5VBIAS8
AE6
PCI5VBIAS7
AD18
PCI5VBIAS6
AD9
PCI5VBIAS5
AC10
PCI5VBIAS4
AB22
PCI5VBIAS3
Y22
PCI5VBIAS2
W25
PCI5VBIAS1
M23
PCI5VBIAS0
AA4
TCK_ICE
Y5
TMS_ICE
AB3
TDI_ICE
AD2
TDO_ICE
AB4
TRST_ICE
AA5
RTCK_ICE
AC6
TCK_CHIP
AE4
TMS_CHIP
AF3
TDI_CHIP
AD6
TDO_CHIP
AC2 Y4
CLKMODE_1 IDDTN
AA22
CLKMODE_0
AC4
SCSI_FSN
LSI53C1030 REV 0.1 02/05/01
U_SCSI
B_VDDBIAS
B_DIFFSENS
TRACEPKT_7 TRACEPKT_6 TRACEPKT_5 TRACEPKT_4 TRACEPKT_3 TRACEPKT_2 TRACEPKT_1 TRACEPKT_0
PIPESTAT2 PIPESTAT1 PIPESTAT0
TRACECLK
TRACESYNC
TESTHCLK TESTACLK
TESTCLKEN
SCANMODE
LSI LOGIC ULTRA320 SCSI
HETERO 2 OF 4
SUB*_8J374
B_SD15+ B_SD14+ B_SD13+ B_SD12+ B_SD11+ B_SD10+
B_SD9+ B_SD8+ B_SD7+ B_SD6+ B_SD5+ B_SD4+ B_SD3+ B_SD2+ B_SD1+ B_SD0+
B_SD15­B_SD14­B_SD13­B_SD12­B_SD11­B_SD10-
B_SD9­B_SD8­B_SD7­B_SD6­B_SD5­B_SD4­B_SD3­B_SD2­B_SD1­B_SD0-
B_RBIAS
B_SCD+ B_SCD­B_SIO+
B_SIO­B_SMSG+ B_SMSG­B_SREQ+ B_SREQ­B_SACK+ B_SACK­B_SBSY+ B_SBSY­B_SATN+ B_SATN­B_SRST+ B_SRST­B_SSEL+ B_SSEL­B_SDP0+ B_SDP0­B_SDP1+ B_SDP1-
SCLK
SCANEN
TST_RST
B7 B6 B5 A4 A23 B20 A20 B19 E12 B12 D11 C10 E11 E10 B9 A8
D8 E8 C6 A3 B21 D19 E18 A19 E13 A12 B11 B10 D10 C9 D9 B8
B13 B22 A11
D17 E16 D18 E17 D16 B16 C18 B18 E14 D14 B15 A15 D13 B14 A16 E15 C17 B17 C13 D12 E9 A7
F4 G5 E3 C2 E4 F5 B2 D4
C3 E6 D5
F3 B3
E5 AE2 AB6 D7 E7 N22
C5
TN
AD5
1030B_SD15+ 1030B_SD14+ 1030B_SD13+ 1030B_SD12+ 1030B_SD11+ 1030B_SD10+
1030B_SD9+ 1030B_SD8+ 1030B_SD7+ 1030B_SD6+ 1030B_SD5+ 1030B_SD4+ 1030B_SD3+ 1030B_SD2+ 1030B_SD1+ 1030B_SD0+
1030B_SD15­1030B_SD14­1030B_SD13­1030B_SD12­1030B_SD11­1030B_SD10-
1030B_SD9­1030B_SD8­1030B_SD7­1030B_SD6­1030B_SD5­1030B_SD4­1030B_SD3­1030B_SD2­1030B_SD1­1030B_SD0-
1030B_SCD+ 1030B_SCD­1030B_SIO+
1030B_SIO­1030B_SMSG+ 1030B_SMSG­1030B_SREQ+ 1030B_SREQ­1030B_SACK+ 1030B_SACK­1030B_SBSY+ 1030B_SBSY­1030B_SATN+ 1030B_SATN­1030B_SRST+ 1030B_SRST­1030B_SSEL+ 1030B_SSEL­1030B_SDP0+ 1030B_SDP0­1030B_SDP1+ 1030B_SDP1-
NC_1030_F4
NC_1030_G5
NC_1030_E3
NC_1030_C2
NC_1030_E4
NC_1030_F5
NC_1030_B2
NC_1030_D4
NC_1030_C3
NC_1030_E6
NC_1030_D5
CLK_1030_80MHZ
NC_1030_B3
NC_1030_E5 NC_1030_AE2 NC_1030_AB6
NC_1030_TESTCLKEN
NC_1030_SCANMODE
NC_1030_N22
NC_1030_Y4
NC_1030_C5
LSI_TST_RST
4.7K
RB112
1 2
45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45
45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45
45
RB101
45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45 45
44
21
10K-1%
C225
R161
22K-5%
1 2
0.1uF 16V
21
1030B_DIFFSENSE
21
RB91
220K
CHANGE ROM STRAPPING PER SCSI TEAM- SC
Do not change strapping
Do not change strapping
Do not change strapping
SEEPROM DISABLE
45
NVSRAM ENABLED
LSI Strapping
1030_MPAR0
43
1030_MAD15
43
32bit Enable
ID CNTRL 0
ID CNTRL 1
IOP DISABLE
ROM SIZE
ROM SIZE
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
1030_MAD14
43
1030_MAD13
43
1030_MAD10
43
1030_MAD11
43
1030_MAD7
43
1030_MAD6
43
1030_MAD3
43
1030_MAD2
43
1030_MAD1
43
43
43
43
1030_MPAR1
43
1030_MAD12
43
1030_MAD9
43
1030_MAD8
43
1030_MAD5
1030_MAD4
1030_MAD0
R166
1 2
4.7K R163
4.7K R159
1 2
4.7K R168
4.7K R167
1 2
4.7K R160
4.7K R189
1 2
4.7K R201
4.7K R219
1 2
4.7K
R190
4.7K R215
1 2
4.7K R223
4.7K
R206
1 2
4.7K R220
4.7K
R162
1 2
4.7K
R164
4.7K
R216
4.7K
R202
1 2
4.7K
+3.3V
NP*
21
NP*
NP*
21
NP*
NP*
21
NP*
NP*
21
NP*
21
NP*
21
NP*
NP*
21
NP*
NP*
21
NP*
21
NP*
NP*
+3.3V
1
2
3
SUB IN P/N FOR HT SNK WITH EPOXY
~LSI_TST_RST TO CPLD JUST IN CASE
4 4
COMPUTER CORPORATION AUSTIN,TEXAS
REV.
SHEET
43 OF 516/6/2003
A00-00
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
DC
Page 44
SCSI Controller: Power/Misc
B D
CA
1
2
LB2
2
FERRITE
1206
L42
2
FERRITE
1206
1
1
H5
VSSA_H5 VSSA_AD24
T24
VSS_IO_T24
A5
VSS_IO_A5
A9
VSS_IO_A9
A13
VSS_IO_A13
A17
VSS_IO_A17
A21
VSS_IO_A21
A25
VSS_IO_A25
B1
VSS_IO_B1
B26
VSS_IO_B26
C4
VSS_IO_C4
C8
VSS_IO_C8
C12
VSS_IO_C12
C16
VSS_IO_C16
C20
VSS_IO_C20
D24
VSS_IO_D24
E1
VSS_IO_E1
F26
VSS_IO_F26
G3
VSS_IO_G3
H24
VSS_IO_H24
J1
VSS_IO_J1
K26
VSS_IO_K26
L3
VSS_IO_L3
L11
VSS_IO_L11
L12
VSS_IO_L12
L13
VSS_IO_L13
L14
VSS_IO_L14
L15
VSS_IO_L15
L16
VSS_IO_L16
M11
VSS_IO_M11
M12
VSS_IO_M12
M13
VSS_IO_M13
M14
VSS_IO_M14
M15
VSS_IO_M15
M16
VSS_IO_M16
M24
VSS_IO_M24
N1
VSS_IO_N1
N11
VSS_IO_N11
N12
VSS_IO_N12
N13
VSS_IO_N13
N14
VSS_IO_N14
N15
VSS_IO_N15
N16
VSS_IO_N16
LSI53C1030 REV 0.1 02/05/01
U_SCSI
VSSC_B4 VSSC_C14 VSSC_C21 VSSC_C26 VSSC_F25
VSSC_G4 VSSC_L22
VSSC_P2 VSSC_AB5 VSSC_AB7 VSSC_AB8
VSSC_AB23 VSSC_AB24 VSSC_AD14
VSS_IO_P11 VSS_IO_P12 VSS_IO_P13 VSS_IO_P14 VSS_IO_P15 VSS_IO_P16 VSS_IO_P26
VSS_IO_R3 VSS_IO_R11 VSS_IO_R12 VSS_IO_R13 VSS_IO_R14 VSS_IO_R15 VSS_IO_R16 VSS_IO_T11 VSS_IO_T12 VSS_IO_T13 VSS_IO_T14 VSS_IO_T15 VSS_IO_T16
VSS_IO_U1 VSS_IO_V26
VSS_IO_W3 VSS_IO_Y24 VSS_IO_AA1
VSS_IO_AB26
VSS_IO_AC3 VSS_IO_AD7
VSS_IO_AD11 VSS_IO_AD15 VSS_IO_AD19 VSS_IO_AD23
VSS_IO_AE1 VSS_IO_AF2 VSS_IO_AF6
VSS_IO_AF10 VSS_IO_AF14 VSS_IO_AF18 VSS_IO_AF22
LSI LOGIC ULTRA320 SCSI
VSS_IO_AF26
HETERO 4 OF 4
B4 C14 C21 C26 F25 G4 L22 P2 AB5 AB7 AB8 AB23 AB24 AD14
P11 P12 P13 P14 P15 P16 P26 R3 R11 R12 R13 R14 R15 R16 T11 T12 T13 T14 T15 T16 U1 V26 W3 Y24 AA1 AB26 AC3 AD7 AD11 AD15 AD19 AD23 AE1 AF2 AF6 AF10 AF14 AF18 AF22 AF26
+1.8V
LB1
1
2
FERRITE
1206
2
FERRITE
1206
LB3
1
C1
VDDA_C1
AB21
VDDA_AB21
A1
VDD_IO_A1
A2
VDD_IO_A2
A6
VDD_IO_A6
A10
VDD_IO_A10
A14
VDD_IO_A14
A18
VDD_IO_A18
A22
VDD_IO_A22
A26
VDD_IO_A26
C7
VDD_IO_C7
C11
VDD_IO_C11
C15
VDD_IO_C15
C19
VDD_IO_C19
C23
VDD_IO_C23
D3
VDD_IO_D3
E26
VDD_IO_E26
F1
VDD_IO_F1
G24
VDD_IO_G24
H3
VDD_IO_H3
J26
VDD_IO_J26
K1
VDD_IO_K1
L24
VDD_IO_L24
M3
VDD_IO_M3
N26
VDD_IO_N26
LSI LOGIC ULTRA320 SCSI
LSI53C1030 REV 0.1 02/05/01
ROOM=LSI_1030
U_SCSIAD24
HETERO 3 OF 4
VDDC_D2
VDDC_D6 VDDC_D15 VDDC_E19 VDDC_J22 VDDC_M22
VDDC_N2 VDDC_AC7 VDDC_AD3
VDDC_AD25
VDDC_AE3
VDDC_AE24 VDDC_AF15
VDD_IO_P1
VDD_IO_R24
VDD_IO_T3
VDD_IO_U26
VDD_IO_V1
VDD_IO_W24
VDD_IO_Y3
VDD_IO_AA26
VDD_IO_AB1
VDD_IO_AC24
VDD_IO_AD4
VDD_IO_AD8 VDD_IO_AD12 VDD_IO_AD16 VDD_IO_AD20 VDD_IO_AE26
VDD_IO_AF1
VDD_IO_AF5
VDD_IO_AF9 VDD_IO_AF13 VDD_IO_AF17 VDD_IO_AF21 VDD_IO_AF25
+1.8V
80 MHz Oscillator
D2 D6 D15 E19 J22 M22 N2 AC7 AD3 AD25 AE3 AE24 AF15
P1 R24 T3 U26 V1 W24 Y3 AA26 AB1 AC24 AD4 AD8 AD12 AD16 AD20 AE26 AF1 AF5 AF9 AF13 AF17 AF21 AF25
+3.3V+3.3V
+3.3V
CB115
922RV IS 5% 16V P/N
1030_SCLK
43
1030_SDATA
43
L37
BLM11A60
1 2
.01uF 50V
+3.3V +3.3V
21
R191
4.7K
12
21
C167
C181
.01uF 50V
+3.3V
R203
8
4.7K
1 2
PART NOT TO BE USED
6
ON NEW DESIGNS,
5
PLEASE CONTACT
7
COMPONENT ENGINEER.
SUB*_5K236
1 2
.01uF 50V
SUB*_1H298
1 2
C261
0.1uF 16V
U25
VCC SCL
SDA WP
AT24C16N
R115
GND
1 2
A0 A1 A2
3V_40M
8.2K-5%
1
1 2 3
4
E/D
VCC GND
U19
80.0000MHz
4
3
OUT
2
R204
220
80MHZ_OSC_1030
21
Serial EEPROM
8R236 is same prgmmed p/n as Discovery ASKED MIKE/WADE FOR OUR OWN PGMMED P/N 4/2
R134
33-5%
21
CLK_1030_80MHZ
43
1
2
HIGH Freq bypass for 1.8V under chip
+1.8V
3
1 2
CB228
CB206
.01uF 50V
1 2
0.1uF 16V
21
CB197
1000pF
CB239
50V-10%
21
.01uF 50V
C302
21
1000pF
50V-10%
21
CB207
+3.3V
CB194
+3.3V
C287
.01uF 50V
21
.01uF 50V
21
1 2
CB212
1000pF
50V-10%
1 2
CB19621CB203
.01uF 50V
CB243
.01uF 50V
.01uF 50V
21
21
1000pF
CB211
50V-10%
1 2
CB22521CB240
.01uF 50V
21
C300
.01uF 50V
CB252
.01uF 50V
CB222
1000pF
50V-10%
1 2
.01uF 50V
1 2
.01uF 50V
21
CB248
21
C299
1000pF
50V-10%
1 2
CB251
0.1uF 16V
0.1uF 16V
21
CB223
21
CB234
C303
.01uF 50V
1 2
CB23721CB221
0.1uF 16V
0.1uF 16V
21
1000pF
50V-10%
0.1uF 16V
4 4
21
CB242
1 2
CB249
0.1uF 16V
21
CB250
0.1uF 16V
1 2
CB224
0.1uF 16V
21
CB213
0.1uF 16V
0.1uF 16V
1 2
CB235
21
CB238
0.1uF 16V
1 2
CB232
0.1uF 16V
0.1uF 16V
A B
1 2
CB195
21
CB214
0.1uF 16V
1 2
CB233
0.1uF 16V
0.1uF 16V
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
X1004
DATE
AUSTIN,TEXAS
SHEET
DC
REV.
A00-00
44 OF 516/6/2003
3
Page 45
SCSI Termination/External Connector
B D
CA
ROOM=SCSI_TERMA
REG
GND
VCC
24
13
11
10
REG_1030A1
1
16V-10%
12
16V-10%
4.7uF
CB230
1
2
DIFF_B_1030A
4.7uF
CB229
1
2
CB226
C260
1 2
.01uF 50V
1 2
.01uF 50V
51K-5%
16V-10%
4.7uF
1030A_DIFFSENSE
R188
21
1
CB208
2
42,43
43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45
1030B_SD11+ 1030B_SD11­1030B_SD9+ 1030B_SD9­1030B_SIO+ 1030B_SIO­1030B_SCD+ 1030B_SCD­1030B_SMSG+ 1030B_SMSG­1030B_SSEL+ 1030B_SSEL­1030B_SREQ+ 1030B_SREQ­1030B_SD8+ 1030B_SD8­1030B_SD10+ 1030B_SD10-
1
PLACE CLOSE TO TERM PKGS
42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43
1030A_SSEL+ 1030A_SSEL­1030A_SMSG+ 1030A_SMSG­1030A_SREQ+ 1030A_SREQ­1030A_SD8+ 1030A_SD8­1030A_SD11+ 1030A_SD11­1030A_SD9+ 1030A_SD9­1030A_SD10+ 1030A_SD10­1030A_SIO+ 1030A_SIO­1030A_SCD+ 1030A_SCD-
SUB=SUB*_D1913
2
L1+
3
L1-
4
L2+
5
L2-
6
L3+
7
L3-
8
L4+
9
L4-
14
L5+
15
L5-
16
L6+
17
L6-
18
L7+
19
L7-
20
L8+
21
L8-
22
L9+
23
L9-
ROOM=SCSI_TERMA
UCC5640PW
U26
TRMPWR
DISCNCT
DIFFSENSE
DIFF_B
ROOM=SCSI_TERMB
1030B_TRMPWR
45
PLACE CLOSE TO TERM PKGS
U23
2
L1+
3
L1-
4
L2+
5
L2-
6
L3+
7
L3-
8
L4+
9
L4-
14
L5+
15
L5-
16
L6+
17
L6-
18
L7+
19
L7-
20
L8+
21
L8-
22
L9+
23
L9-
ROOM=SCSI_TERMB
UCC5640PW
SUB=SUB*_D1913
TRMPWR
DISCNCT
DIFFSENSE
DIFF_B
REG
GND
24
13
11
10
DIFF_B_1030B
REG_1030B1
1
16V-10%
12
16V-10%
4.7uF 1
2
4.7uF 1
2
C211
CB139
CB140
C229
1 2
.01uF 50V
1 2
.01uF 50V
51K-5%
16V-10%
4.7uF
1
2
1030B_DIFFSENSE
R144
21
C210
1
43,45
VCC
1030B_TRMPWR
2
L1+
3
L1-
4
L2+
5
L2-
6
L3+
7
L3-
8
L4+
9
L4-
14
L5+
15
L5-
16
L6+
17
L6-
18
L7+
19
L7-
20
L8+
21
L8-
22
L9+
23
L9-
ROOM=SCSI_TERMB
UCC5640PW
SUB=SUB*_D1913
45
2
L1+
3
L1-
4
L2+
5
L2-
6
L3+
7
L3-
8
L4+
9
L4-
14
L5+
15
L5-
16
L6+
17
L6-
18
L7+
19
L7-
20
L8+
21
L8-
22
L9+
23
L9-
ROOM=SCSI_TERMB
UCC5640PW
SUB=SUB*_D1913
45
U21
TRMPWR
DISCNCT
DIFFSENSE
DIFF_B
REG
GND
1030B_TRMPWR
U22
TRMPWR
DISCNCT
DIFFSENSE
DIFF_B
REG
GND
24
13
11
10
REG_1030B2
1
12
24
13
11
10
REG_1030B3
1
12
16V-10%
4.7uF 1
2
NC3_DIFFSENSE
16V-10%
4.7uF
CB143
1
2
16V-10%
4.7uF 1
C215
2
NC4_DIFFSENSE
16V-10%
4.7uF
CB141
1
2
CB142
C214
CB144
1 2
1 2
1 2
C223
.01uF 50V
.01uF 50V
21
C224
.01uF 50V
.01uF 50V
FUSED 5V FOR EXTERNAL SCSI
VCC
43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45
43,45
43,45
43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45
45
FS11
21
1.5A 6V
1030B_SD12+ 1030B_SD13+ 1030B_SD14+ 1030B_SD15+ 1030B_SDP1+ 1030B_SD0+ 1030B_SD1+ 1030B_SD2+ 1030B_SD3+ 1030B_SD4+ 1030B_SD5+ 1030B_SD6+ 1030B_SD7+ 1030B_SDP0+
1030B_DIFFSENSE
1030B_TRMPWR
NC_SCSI2_19
1030B_SATN+
1030B_SBSY+ 1030B_SACK+ 1030B_SRST+ 1030B_SMSG+ 1030B_SSEL+ 1030B_SCD+ 1030B_SREQ+ 1030B_SIO+ 1030B_SD8+ 1030B_SD9+ 1030B_SD10+ 1030B_SD11+
R141
1K-5%
MBRS330T3
21
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
HD SCSI
SCSI
RCPT
1030B_TRMPWR
12
D6
35
1030B_SD12-
36
1030B_SD13-
37
1030B_SD14-
38
1030B_SD15-
39
1030B_SDP1-
40
1030B_SD0-
41
1030B_SD1-
42
1030B_SD2-
43
1030B_SD3-
44
1030B_SD4-
45
1030B_SD5-
46
1030B_SD6-
47
1030B_SD7-
48
1030B_SDP0­49 50 51
1030B_TRMPWR 52 53
NC_SCSI2_53 54 55
1030B_SATN­56 57
1030B_SBSY­58
1030B_SACK­59
1030B_SRST­60
1030B_SMSG­61
1030B_SSEL­62
1030B_SCD­63
1030B_SREQ­64
1030B_SIO­65
1030B_SD8­66
1030B_SD9­67
1030B_SD10­68
1030B_SD11-
SUB*_03YDY
45
43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45
45
43,45
43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45
2
16V-10%
4.7uF 1
PLACE CLOSE TO TERM PKGS
42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43
1030A_SD12+ 1030A_SD12­1030A_SD14+ 1030A_SD14­1030A_SD0+ 1030A_SD0­1030A_SD13+ 1030A_SD13­1030A_SD3+ 1030A_SD3­1030A_SD2+ 1030A_SD2­1030A_SD1+ 1030A_SD1­1030A_SD15+ 1030A_SD15­1030A_SDP1+ 1030A_SDP1-
SUB=SUB*_D1913
2
L1+
3
L1-
4
L2+
5
L2-
6
L3+
7
L3-
8
L4+
9
L4-
14
L5+
15
L5-
16
L6+
17
L6-
18
L7+
19
L7-
20
L8+
21
L8-
22
L9+
23
L9-
ROOM=SCSI_TERMA
U32
TRMPWR
DISCNCT
DIFFSENSE
DIFF_B
UCC5640PW
REG
GND
24
13
11
10
1
12
3
PLACE CLOSE TO TERM PKGS
42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43 42,43
1030A_SD6+ 1030A_SD6­1030A_SD5+ 1030A_SD5­1030A_SD4+ 1030A_SD4­1030A_SD7+ 1030A_SD7­1030A_SRST+ 1030A_SRST­1030A_SATN+ 1030A_SATN­1030A_SBSY+ 1030A_SBSY­1030A_SACK+ 1030A_SACK­1030A_SDP0+ 1030A_SDP0-
SUB=SUB*_D1913
2
L1+
3
L1-
4
L2+
5
L2-
6
L3+
7
L3-
8
L4+
9
L4-
14
L5+
15
L5-
16
L6+
17
L6-
18
L7+
19
L7-
20
L8+
21
L8-
22
L9+
23
L9-
ROOM=SCSI_TERMA
UCC5640PW
U29
TRMPWR
DISCNCT
DIFFSENSE
DIFF_B
REG
GND
24
13
11
10
REG_1030A3
1
12
2
NC1_DIFFSENSE
REG_1030A2
16V-10%
4.7uF 1
2
VCC
16V-10%
4.7uF
1
2
NC2_DIFFSENSE
16V-10%
4.7uF
1
C283
2
C298
C282
CB241
C297
CB253
1 2
1 2
1 2
C294
.01uF 50V
.01uF 50V
1 2
C281
.01uF 50V
.01uF 50V
43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45
43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45 43,45
PLACE CLOSE TO TERM PKGS
1030B_SD3+ 1030B_SD3­1030B_SD1+ 1030B_SD1­1030B_SDP1+ 1030B_SDP1­1030B_SD14+ 1030B_SD14­1030B_SD12+ 1030B_SD12­1030B_SD13+ 1030B_SD13­1030B_SD15+ 1030B_SD15­1030B_SD0+ 1030B_SD0­1030B_SD2+ 1030B_SD2-
PLACE CLOSE TO TERM PKGS
1030B_SRST+ 1030B_SRST­1030B_SACK+ 1030B_SACK­1030B_SDP0+ 1030B_SDP0­1030B_SD6+ 1030B_SD6­1030B_SD4+ 1030B_SD4­1030B_SD5+ 1030B_SD5­1030B_SD7+ 1030B_SD7­1030B_SATN+ 1030B_SATN­1030B_SBSY+ 1030B_SBSY-
2
3
PKG_TYPE = TSSOP24
PLACE NEXT TO 1030
PKG_TYPE = TSSOP24
4 4
COMPUTER CORPORATION
TITLE
AUSTIN,TEXAS
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
X1004
SHEET
DC
45 OF 516/6/2003
REV.
A00-00
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
DWG NO.
DATE
Page 46
B D
CA
50 OHM TRACES (GTL, MEMORY)
Z_TOP_50_END
GND_LEFTTAB
46
1
2
Z_TOP_50
NP*
ZSE2PINI1R
COUPON TEST
Z_IN1_50
3
RY
ZSE3PINS2R
NP*
COUPON TEST
Z_IN2_50
3
RY
ZSE3PINS2R
NP*
COUPON TEST
Z_IN3_50
3
RY
ZSE3PINS2R
NP*
COUPON TEST
Z_IN4_50
3
RY
ZSE3PINS2R
NP*
COUPON TEST
Z_BOT_50
NP*
ZSE2PINI1R
COUPON TEST
21
+RX
21
+RX
21
+RX
21
+RX
21
+RX
21
+RX
IMP_TOP_50
IMP_IN1_50
IMP_IN2_50
IMP_IN3_50
IMP_IN4_50
IMP_BOT_50
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_IN1_50_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_IN2_50_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_IN3_50_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_IN4_50_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_BOT_50_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
GND_LEFTTAB
46
100 OHM DIFF TRACES (CLOCKS, ETHERNET)
Z_TOP_D100
GND_RIGHTTAB
46
120 OHM DIFF TRACES (SCSI)
Z_IN1_D120
GND_RIGHTTAB
46
3
1
RX
3
RY
NP*
ZDI4PINS2R
COUPON TEST
Z_IN4_D120
1
RX
3
RY
NP*
ZDI4PINS2R
COUPON TEST
2
IMP_Z120D_SCSI_IN1+
+
4
IMP_Z120D_SCSI_IN1-
-
IMP_Z120D_SCSI_IN4+
2
+
IMP_Z120D_SCSI_IN4-
4
-
1
1
Z_IN1_D120_END
2
2
3
3
4
IMPEDENCE DIFFERENTIAL
IMPEDENCE DIFFERENTIAL
4
TEST POINT
1
1
Z_IN4_D120_END
2
2
3
3
4
4
TEST POINT
1
RX
3
RY
NP*
ZDI4PINS2R
COUPON TEST
Z_IN1_D100
1
RX
3
RY
NP*
ZDI4PINS2R
COUPON TEST
Z_IN2_D100
1
RX
3
RY
NP*
ZDI4PINS2R
COUPON TEST
45 OHM TRACES (IMB)
Z_TOP_45
NP*
ZSE2PINI1R
COUPON TEST
Z_IN1_45
3
RY
NP*
ZSE3PINS2R
COUPON TEST
Z_IN2_45
3
RY
NP*
ZSE3PINS2R
COUPON TEST
Z_IN3_45
3
RY
NP*
ZSE3PINS2R
COUPON TEST
Z_IN4_45
3
RY
NP*
ZSE3PINS2R
COUPON TEST
Z_BOT_45
NP*
ZSE2PINI1R
COUPON TEST
2
+
4
-
2
+
4
-
2
+
4
-
21
+RX
21
+RX
21
+RX
21
+RX
21
+RX
21
+RX
IMP_Z100D_TOP+ IMP_Z100D_TOP-
IMP_Z100D_IN1+ IMP_Z100D_IN1-
IMP_Z100D_IN2+ IMP_Z100D_IN2-
IMP_TOP_45
IMP_IN1_45
IMP_IN2_45
IMP_IN3_45
IMP_IN4_45
IMP_BOT_45
IMPEDENCE DIFFERENTIAL
IMPEDENCE DIFFERENTIAL
IMPEDENCE DIFFERENTIAL
Z_TOP_45_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_IN1_45_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_IN2_45_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_IN3_45_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_IN4_45_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_BOT_45_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
1
1
Z_TOP_D100_END
2
2
3
3
4
4
TEST POINT
1
1
Z_IN1_D100_END
2
2
3
3
4
4
TEST POINT
1
1
Z_IN2_D100_END
2
2
3
3
4
4
TEST POINT
7,21,37
7,21,37
22
ENV_SEG0_SDA
ENV_SEG0_SCL
POP IF USING NEW CONTROL PANEL WITH CYCLOPS LIGHT PIPE AND AMBIENT TEMP SENSOR
FP_OVRCUR
VCC
6V
FS9
1.5A
1 2
BLUE_FRONT
25
GREEN_FRONT
25
R513
1 2
8.2K-5%
1 2
1 2
CIOBE_LINK_ACT_LED1
47
CIOBE_LINK_ACT_LED2
47
USBP2-
20
DDC_SDA_FRONT
25
CYCLOPS_FAIL
46
ID_BUTTON_RAW
20
NC_PANEL_35 FRONT_VIDEO_EN
25
46
R515
0-5% R519
0-5%
CP_SDA
CP_SCL
ROOM=CP_CONN
LED_ID_BLUE
20,35
LED_ID_YELLOW
20,35
CP_SDA
42
FRONT PANEL CONNECTOR
+5V_AUX
+3.3V
BP_HD_ACTIVE
FROM BACKPLANE
46
46
Q42
2N7002
Q44
2N7002
+3.3V
VCC
R520
1 2
8.2K-5%
FRONT_PANEL
2
1
4
3 5
6 8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
3837 40
39
4241 4443
45
46
47
48
49
50
SOCKET
SUB*_5G652
R518
1 2
140-1%
CONTROL PANEL:
ID BUTTON CONNECTED TO +3.3V_AUX POWER BUTTON CONNECTED TO +3.3V_AUX
R514
1 2 120-5%
D
3
1
G
S
2
D
3
1
G
S
2
SUB*_9655T
SUB TO 75 OHM
R522
1 2 120-5%
SUB*_87911
SUB TO 56.2 OHM
R517
1 2 120-5%
SUB*_30327
SUB TO 200 OHM
R516
1 2 120-5%
SUB*_5305R
SUB TO 147 OHM
+3.3V_AUX
SW_ON CP_SYSTEM_GOOD_LED RED_FRONT HSYNC_FRONT
VSYNC_FRONT USBP2+ DDC_SCLK_ATI
VCC_FANPOWER_PSZONE FAN_GRN_LED_DRV_6 FAN_AMB_LED_DRV_6
CP_SYSTEM_FAIL_LED CYCLOPS_GOOD
FAN_RPM_RAW_6A FAN_RPM_RAW_6B CP_SCL NC_WAS_MSE_FRONT_CLK
CP_SYSTEM_GOOD_LED
CYCLOPS_GOOD
ADJUST THESE FOR BRIGHTNESS OF BEZEL-ON LEDS
CP_SYSTEM_FAIL_LED
CYCLOPS_FAIL
47 46 25 25
25 20 24,25
38 38 38
46 46
38 38 46
46
46
46
46
1
2
3
Z5
21
NC_REG_Z27_P2NC_REG_Z27_P1
NP*
NC_REG_Z28_P1
NP*
NC_REG_Z29_P1
NP*
NP*
4
NC_REG_Z31_P1
NP*
NEGCOMMON
REG08 A NGO COUPON TEST
Z4
NEGCOMMON
REG08 A NGO COUPON TEST
Z3
NEGCOMMON
REG08 A NGO COUPON TEST
Z2
NEGCOMMON
REG08 A NGO COUPON TEST
Z1
NEGCOMMON
REG08 A NGO COUPON TEST
21
NC_REG_Z28_P2
21
NC_REG_Z29_P2
21
NC_REG_Z30_P2NC_REG_Z30_P1
21
NC_REG_Z31_P2
REGISTRATION COUPONS
Z_IN3_D100
1
RX
3
RY
NP*
ZDI4PINS2R
COUPON TEST
Z_IN4_D100
1
RX
3
RY
NP*
ZDI4PINS2R
COUPON TEST
Z_BOT_D100
1
RX
3
RY
NP*
ZDI4PINS2R
COUPON TEST
4
2 4
2 4
IMP_Z100D_IN3+2 IMP_Z100D_IN3-
IMP_Z100D_IN4+ IMP_Z10D_IN4-
IMP_Z100D_BOT+ IMP_Z100D_BOT-
+
-
+
-
+
-
SO WE CAN USE SMALL VIAS
TRACE IMPEDANCE TEST COUPONS
A B
1
1
Z_IN3_D100_END
2
2
3
3
4
IMPEDENCE DIFFERENTIAL
4
TEST POINT
1
1
Z_IN4_D100_END
2
2
3
3
4
IMPEDENCE DIFFERENTIAL
IMPEDENCE DIFFERENTIAL
4
TEST POINT
1
1
Z_BOT_D100_END
2
2
3
3
4
4
TEST POINT
60 OHM TRACES (MISC)
Z_TOP_60_END
GND_LEFTTAB
46
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
Z_TOP_60
NP*
ZSE2PINI1R
COUPON TEST
Z_IN1_60
3
RY
NP*
ZSE3PINS2R
COUPON TEST
Z_IN2_60
3
RY
NP*
ZSE3PINS2R
COUPON TEST
21
+RX
21
+RX
21
+RX
IMP_TOP_60
IMP_IN1_60
IMP_IN2_60
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_IN1_60_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_IN2_60_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
GND_LEFTTAB
46
Z_IN3_60
3
RY
NP*
ZSE3PINS2R
COUPON TEST
Z_IN4_60
3
RY
NP*
ZSE3PINS2R
COUPON TEST
Z_BOT_60
NP*
ZSE2PINI1R
COUPON TEST
Z_IN3_60_END
1
1
21
+RX
21
+RX
21
+RX
IMP_IN3_60
IMP_IN4_60
IMP_BOT_60
TITLE
DWG NO.
DATE
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_IN4_60_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
Z_BOT_60_END
1
1
2
2
3
NP*
3
IMPEDENCE SINGLE END
TEST POINT
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
X1004
COMPUTER CORPORATION
AUSTIN,TEXAS
REV.
SHEET
46 OF 516/6/2003
4
A00-00
DC
Page 47
X01 -- CHANGED TO 3 RESISTORS TO FIX DERATING --SWH10/16
POWERGOOD CPLD
5
VCCINT1
57
VCCINT2
98
VCCINT3
1
14,15,47
37,39,48,51
2
VCORE_PWRGOOD_2
9,35
GPI_FLAG
22
GPO_FLWR_EN
22
LED_THERMTRIP
47
DC2DC_2.5V_PWRGOOD
41
PS_PWRGOOD_2
35,48
CMIC_SRESET
12,47
LED_MISMATCH
47
CK_CPLD_4KHZ
47
RESET_SW
47
VID_CLK
35
VRM_VID0
9
VCORE_EN_2
9,47
H0_THERMTRIP_3V
10
H0_VID1
7,9
VRM_VID2
9
PROMICE_SEL
21
DDR_RESET
CIOBE_LINK_ACT_LED1_CPLD
47
GPI_PROC0_HS_PRES
7,22,35
H0_VID4
7,9
GPI_PROC1_HS_PRES
7,22,35
CIOBE_LINK_ACT_LED2_CPLD
47
DC2DC_5V_PWRGOOD
41
H1_CPU_PRES
7,22,35
VRM_VID1
9
3.3VAUX_PWRGOOD H0_VID0
7,9
CSB_ROMCS
18
VCORE_EN_1
9,47
RPLLRST
47
H1_VID0
7,9
CIOBE_ACT_LED_2
28,32
SYNTH_EN
4,47
H1_VID4
7,9
CIOBE_ACT_LED_1
28,32
NC_CPLD_NC1 NC_CPLD_NC2 NC_CPLD_NC3 NC_CPLD_NC4 NC_CPLD_NC5 NC_CPLD_NC6 NC_CPLD_NC7 NC_CPLD_NC8 NC_CPLD_NC9
16
IO1/FB1
13
IO2/FB1
18
IO3/FB1
20
IO4/FB1
14
IO5/FB1
15
IO6/FB1
25
IO7/FB1
17
IO8/FB1
22
IO9/GCK1
28
IO10/FB1
23
IO11/GCK2
33
IO12/FB1
36
IO13/FB1
27
IO14/GCK3
29
IO15/FB1
39
IO16/FB1
30
IO17/FB1
40
IO18/FB1
87
IO1/FB2
94
IO2/FB2
91
IO3/FB2
93
IO4/FB2
95
IO5/FB2
96
IO6/FB2
3
IO7/GTS1
97
IO8/FB2
99
IO9/GSR
1
IO10/FB2
4
IO11/GTS2
6
IO12/FB2
8
IO13/FB2
9
IO14/FB2
11
IO15/FB2
10
IO16/FB2
12
IO17/FB2
92
IO18/FB2
2
NC1
7
NC2
19
NC3
24
NC4
34
NC5
43
NC6
46
NC7
73
NC8
80
NC9
U8
XC9572XL-TQ
SUB*_0X460
IO10/FB3 IO11/FB3 IO12/FB3 IO13/FB3 IO14/FB3 IO15/FB3 IO16/FB3 IO17/FB3 IO18/FB3
IO10/FB4 IO11/FB4 IO12/FB4 IO13/FB4 IO14/FB4 IO15/FB4 IO16/FB4 IO17/FB4 IO18/FB4
ROOM=CLK100HZ
+3.3V_AUX
T = C * (Ra + 2 * Rb) * ln 2 WHERE Rb IS BETWEEN PINS 6 & 7 AND Ra IS FROM PIN 7 TO VCC Ra = 2Rb GIVES 40% DC 88.5Hz 33.2K0.1uF
U11
3
OUT
3
R_CK_100HZ
4
RESET
1 5
GND CONT
TLC555D
SUB*_18885
RB23
1 2
47-5%
RB25
1 2
47-5%
VDDTRIG DISCH THRES
82 7 6
0.1uF 16V
1 2
RB21
1 2
RB22
0.1uF 16V33.2K-1% 64.9K-1% CB34
CB35
21
21
CK_PGCPLD_100HZ
CK_ESMCPLD_100HZ
26
VCCIO1
38
VCCIO2
51
VCCIO3
88
VCCIO4
41
IO1/FB3
32
IO2/FB3
49
IO3/FB3
50
IO4/FB3
35
IO5/FB3
53
IO6/FB3
54
IO7/FB3
37
IO8/FB3
42
IO9/FB3
60 52 61 63 55 56 64 58 59
65
IO1/FB4
67
IO2/FB4
71
IO3/FB4
72
IO4/FB4
68
IO5/FB4
76
IO6/FB4
77
IO7/FB4
70
IO8/FB4
66
IO9/FB4
81 74 82 85 78 89 86 90 79
48
TCK
45
TDI
83
TDO
47
TMS
1% 1% 10% Rb Ra C
f(nom) f(max)
64.9K
64.251 0.09
60.4K
64.9K23.7K0.1uF94.0Hz
64.251
47
35
CPLD 88.5Hz CLOCK (max 99.3Hz)
+3.3V_AUX
T = C * (Ra + 2 * Rb) * ln 2 WHERE Rb IS BETWEEN PINS 6 & 7 AND Ra IS FROM PIN 7 TO VCC
U9
3
OUT
4
4
RESET
1 5
GND CONT
TLC555D
SUB*_18885
CK_CPLD_4KHZ
4000Hz CLOCK
VDDTRIG DISCH THRES
82 7 6
0.1uF 16V
47
1K-1%
1.3K-1%
0.1uF 16V
CB2221CB18
21
1 2
1 2
RB14
RB16
CPLD 4000Hz CLOCK
A B
+3.3V
+3.3V_AUX
10V-10%
10V-10%
1 2
1uF
DC2DC_1.5V_EN H1_THERMTRIP_3V ITP_DBR DC2DC_1.8V_EN H0_VID2 DC2DC_2.5V_EN
3.3V_PWRGOOD VRM_VID3 CK_PGCPLD_100HZ VRM_VID4 H1_VID2 H_PWRGOOD H1_VID3 SYSTEM_PWRGOOD X_WR CTRL_33V_NOT_33VAUX VID_LATCH VID_DATA
H1_TT_LATCHED H1_VID1 VCORE_PWRGOOD_1 H0_TT_LATCHED NC_PGCPLD_68 FLASH_CS CIOBE_100_1000_LED_2 PROMICE_CS PS_PWRGOOD_1 X_WR_FLASH_R DC2DC_3.3V_EN H0_VID3 DC2DC_5V_EN H0_CPU_PRES FLASH_RP DC2DC_1.8V_PWRGOOD CIOBE_100_1000_LED_1 NC_PGCPLD_79
PG_CPLD_TCK PG_CPLD_TDI PG_CPLD_TDO PG_CPLD_TMS
GREEN = OPEN DRAIN YELLOW = OPEN DRAIN WHITE = INPUT CYAN = TOTEM POLE
PROGRAMMED PART NUMBER FOR EVERGLADES IS 0X460
32.868
45.3K60.4K86.9Hz
45.3K0.1uF86.9Hz
0.1uF
0.0923.463
4
12
99.3Hz
105.5Hz
CK_14M_RNDM
CMIC_PCIRST
8.2K-5%
10V-10%
CB36
1uF
CB3
1uF
21
21
41 10 10 41 7,9 41 41 9 47 9 7,9 6,7,47 7,9 17,21,35,39,42,47,51 18 30 35 35
35 7,9 9,35 35
21 28,32 21 35,48
41 7,9 41 7,22,35 21 41 28,32
SERIES TERM BECAUSE FLASH IS FAR AWAY
+3.3V
U64
74LCX74
VCC
2 5
D Q
3
NP*
U59
1142
VHC14
RB369
21
CB19
14
CLK
+3.3V
8.2K-5%
CLR
1
SET
1 2
4
Q
+3.3V
8.2K-5%
R467
6
PCI RESET BUFFERING
PCI SPEC REQUIRES PCI RESET EDGES TO BE MONOTONIC PCI RESET IS ASYNCHRONOUS
B D
+3.3V
+3.3V
8.2K-5%
8.2K-5%
1 2
R31
R64
1 2
22-5%
NC_PCIRSTCIOBEX NC_PCIRSTCIOBE
3144
5146
9148
111410
131412
1 2
1 2
6,7,47
8
RN2
1
U59
VHC14
U59
VHC14
U59
VHC14
U59
VHC14
U59
VHC14
330-5%
RB17
R308
47
X_WR_FLASH
+3.3V_AUX
567
2.7K
432
74LCX74
X01 -- RANDOM SYNC FOR CIOBE A1.1 BUG --STUART 10/4/2002
X03--DEPOPPED RANDOMIZER, USING NEW CIOBE 1.2
PCI0_RST_0
PCI0_RST_1
PCI0_RST_2 PCI_RST_CIOB
PCI0_RST_3
PCI0_RST_4
+2.5V
+3.3V+2.5V
1 2
1 2
1K-5%
RB18
RB26
+2.5V
1K-5%
RPLLRST
J_PGCPLD
1 2 3 4 5 6
+3.3V
U64
14
VCC
SET
12 9
D Q
11
CLK
CLR
13
NP*
1 2
330-5%
RB11
SYNTH_EN VCORE_EN_1 VCORE_EN_2 DDR_RESET SYSTEM_PWRGOOD CMIC_SRESET
H_PWRGOOD
PULL-UP ON PAGE 6
1 2
RB13
21
10
PCI_RST_CIOBE_RPCI_RST_CIOBE_X
8
Q
RB368
1 2
22-5% RB367
1 2
22-5% RB365
1 2
22-5% RB366
1 2
22-5% RB350
1 2
0-5%
SUB*_19964
SUBBED TO 22 OHMS
RB351
1 2
0-5%
R469
1 2
22-5%
RB12
1 2
22-5%
R50
1 2
22-5%
R351
1 2
22-5%
X01--RANDOMIZING PCIRST TO CIOBE FOR A1.1 PCIRST SETUP/HOLD TIME ISSUE
--STUART 10/4/2002
PCI0_RST_SIO
PCI0_RST_ESM4 TO ESM4
PCI0_RST_CSB5 TO CSB5
PCI0_RST_ATI TO ATI
TO CIOB-X2
IDE_RESET TO IDE CD-ROM & ESM4
PCI_RST_CIOBE TO CIOB-E
CA
SW_RST
4,47 9,47 9,47 14,15,47 17,21,35,39,42,47,51 12,47
PLLRST_CMIC
PLLRST_CIOB
PLLRST_CSB
12,28
27
18
1 2
PUSH BUTTON
46
+3.3V_AUX
1 2
PUSH BUTTON
22
1 2
PUSH BUTTON
3 4
SW_ON FROM FRONT PANEL
SW_PWR
3 4
GPO_PWR_BUTTON_DIS
SW_NMI
3 4
2.7K-5% RB408
21
RB407
1K-5%
21
POWER, RESET, AND NMI BUTTONS
THERMTRIP
R478
1 2
220
D
3
1
G
S
2
R461
1 2
D
3
1
G
S
2
MISMATCH
220
ROOM=BUTTONS
R468
1 2
22-5%
PCI_RST_CIOBE
NP*
22
39
18
19,24,35
27
39,42
28,47
28,47
LED_THERMTRIP
47
LED_MISMATCH
47
Q34
2N7002
Q29
2N7002
FAILURE LEDs
ROOM=PWRGOOD_CPLD
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
6.3V-10%
6.3V-10%
4.7uF
1 2
C478
+3.3V
RB410
1 2
13
YELLOW
SUB*_5E052
13
YELLOW
SUB*_5E052
4.7uF
1 2
8.2K-5%
+3.3V
+3.3V
C479
+3.3V_AUX
D
3
S
2
1 2
10V-10%
1 2
1uF
Q37
C477
NP*
+3.3V_AUX
5146
C480
+3.3V_AUX
9148
U68
VHC14
U68
VHC14
GPE_NMI_BUTTON
D17
BAR43
+3.3V_AUX
13
18
RB384
1 2
8.2K-5% RB406
21
1K-5%
RB409
1 2
1K-5%
21
RB405
1K-5%
2N7002
R504
21
1
G
6.3V-10%
4.7uF
ROOM=BUTTONS
+12V
R440
1 2
220
RB359
1 2 330-5%
SUB*_05173
SUB TO 220 OHM
+3.3V_AUX
R466
1 2
220
RB396
1 2
220
ROOM=BUTTONS
POWER STATUS LEDs
R460
21
CIOBE_LINK_ACT_LED1
75
D
3
1
S
2
R477
21
CIOBE_LINK_ACT_LED2
75
D
3
1
S
2
CIOBE_LINK_ACT_LED1_CPLD
47
CIOBE_LINK_ACT_LED2_CPLD
47
Q30
2N7002
G
Q31
2N7002
G
FRONT PANEL NIC LED DRIVE
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
DATE
X1004
6/6/2003
DC
RESET_SW
8.2K-5%
1 3
D_3VAUX
1 3
COMPUTER CORPORATION
AUSTIN,TEXAS
SHEET
PWRBTN
D_12V
GREEN
GREEN
REV.
47 OF 51
6-9-2003_13:5647EVERGLADES
47
19,22,35
1
2
3
46
46
4
A00-00
Page 48
B D
JUMPERS
+3.3V
R501
21
8.2K-5% R502
1 2
1
8.2K-5% R500
1 2
8.2K-5%
RSVD_FVS
SUB=SUB*_21597
SUB=SUB*_81526
21
NVRAM_CLR
21
GPI_EN_PASSWD
GPI_NVRAM_CLR
GPI_FVS_TESTMODE
PASSWD
SUB=SUB*_81526
21
22
19,22
22
SUB*_4F520
+3.3V_AUX
U39 809S
3
(2.93V)
VCC
RESET
GND
1
2
R350
1 2
1K-5%
100K-1%
1 2
R365
SUB*_85444 SUB TO 20K
(100K TOO BIG--LEAKAGE CURRENTS RAISED THIS NODE TOO HIGH)
ROOM=3VFPPG
3.3VAUX_PWRGOOD
37,39,47,51
4F520 is 3.08V part
19,22,35
ROOM=PWR_CONN
+3.3V_AUX
+12V
BUFFERED PS_ON ON X01 PWB --SWH 10/1/02
(NO AC ON ONE SUPPLY WOULD PULL SIGNAL DOWN)
+3.3V_AUX
U68
3144
VHC14
3.3v AUXGOOD GENERATION
81526 = CON,JMPR,1X2,F,.1,G,W/SHRTHNDL
21597 = CON,HDR,2X3,.1X.32,S,T,U,TH
ADDED SERIES Rs FOR ESD PROT --SWH 9/27/02
RB270
21
48
PS_PG_1_RAW_RPS_PWRGOOD_1_RAW
470
+3.3V_AUX
+3.3V_AUX
2
PS_PWRGOOD_2_RAW
48
+3.3V_AUX
RB269
470
21
PS_PG_2_RAW_R
PS_PWRGOOD CONDITIONING
+3.3V_AUX
1142
VHC14
3144
VHC14
U42
U42
PS_PWRGOOD_1
PS_PWRGOOD_2
U42
5146
VHC14
+3.3V_AUX
U42
9148
VHC14
PS_PWRGOOD_1
PS_PWRGOOD_2
35,47
35,47
PS_PWR
1 2 3 4 5 6
K7
8 9
10
HEADER
1X10
SUB*_4U289
PS_PWRGOOD_2_RAW
48
PS_SCL
48
PS_SDA
48
OVERTEMP_2
35
PS_ON_BUFPS_ON
R339
1 2
+3.3V_AUX
35,51
0-5%
CA
+3.3V_AUX
111410
VHC14
+3.3V_AUX
111410
VHC14
12
R334
8.2K-5%
AC_DC
35 12V_SENSE-
NC_PIN16 AC1_OK PS_PWRGOOD_1_RAW
48
U68
U42
PS_ON_2R
PS_ON_2
PS_SIG
2 1 4 6
8 10 12 14 16
20
NO MOUNTING HOLES!
ONE LOCATOR PEG
21
R340
20K-5%
R523
1 2
47-5%
RB268
1 2
47-5%
3 5 7 9 11
12V_SENSE+
13 15 1718 19
PS_ON_1PS_ON_1R
+12V
R335
1 2
+3.3V_AUX
0-5%
NC_PIN11
R328
20K-5%
R325
1 2
21
R341
1 2
8.2K-5%
PS2_PRESENT AC2_OK
OVERTEMP_1
PS1_PRESENT
12
R342
8.2K-5%
8.2K-5%
35 35,51
35
35
+3.3V_AUX
4.7K
RB243
21
47pF
CB410
+3.3V_AUX
RB234
1 2
21
47pF
50V-5%
1 2
PS_SDA
50V-5%
1K-5%
SUB*_19960
ENV_SEG2_SDA
37
LB9
1 2
200mA
21
47pF
CB416
50V-5%
X01 -- CHANGED SCL PULL-UP TO 4.7K--1K TOO STRONG
ENV_SEG2_SCL
37
LB8
1 2
200mA
21
CB409
47pF
50V-5%
CB411
PS_SCL
1
48
48
2
RB271
12
C416
0.1uF 16V
RB272
1 2
100K-1%
1 2
100K-1%
POWER SUPPLY CONNECTOR
p/n 7952R: Ribbon cable conn w/ lock eject
HARDWARE
VCC
CLIP1
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
ADD1=ADD*_0342R
CLIP2
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
ADD1=ADD*_0342R
CLIP3
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
ADD1=ADD*_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
2 1
0.1uF 16V
C334
2 1
+2.5V
C308
2 1
0.1uF 16V
CB43
2 1
0.1uF 16V
0.1uF 16V
VCC
C341
C401
C420
2 1
3
2 1
0.1uF 16V
0.1uF 16V
2 1
CB543
C301
2 1
0.1uF 16V
2 1
CB506
0.1uF 16V
0.1uF 16V
2 1
0.1uF 16V
C482
2 1
0.1uF 16V
2 1
CB452
C451
2 1
0.1uF 16V
C206
2 1
0.1uF 16V
C389
2 1
0.1uF 16V
0.1uF 16V
2 1
CB443
2 1
CB522
0.1uF 16V
C128
0.1uF 16V
C311
2 1
0.1uF 16V
2 1
0.1uF 16V
C399
2 1
C446
2 1
0.1uF 16V
C447
0.1uF 16V
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
+3.3V
C291
2 1
C119
2 1
C252
2 1
0.1uF 16V
C495
2 1
0.1uF 16V
C497
2 1
0.1uF 16V
C445
2 1
0.1uF 16V
0.1uF 16V
C53
2 1
0.1uF 16V
2 1
CB290
C89
2 1
0.1uF 16V
C419
2 1
0.1uF 16V
C494
2 1
0.1uF 16V
C435
2 1
0.1uF 16V
C434
2 1
0.1uF 16V
C403
2 1
0.1uF 16V
+12V
C453
2 1
0.1uF 16V
2 1
CB384
0.1uF 16V
C2
2 1
0.1uF 16V
C436
2 1
0.1uF 16V
2 1C12 1
0.1uF 16V
0.1uF 16V
C14
0.1uF 16V
2 1
CB403
C116
2 1
0.1uF 16V
C193
2 1
0.1uF 16V
C73
2 1
0.1uF 16V
C498
2 1
0.1uF 16V
C72
2 1
0.1uF 16V
2 1
CB296
0.1uF 16V
C156
2 1
0.1uF 16V
C226
2 1
0.1uF 16V
C314
2 1
0.1uF 16V
C134
2 1
0.1uF 16V
C352
2 1
0.1uF 16V
0.1uF 16V
0.1uF 16V
C491
2 1
C372
2 1
C329
2 1
0.1uF 16V
0.1uF 16V
C437
2 1
0.1uF 16V
0.1uF 16V
C253
2 1
C431
2 1
0.1uF 16V
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
0.1uF 16V
VCORE
4
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
21
C320
0.1uF 16V
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
CLIP4
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
ADD1=ADD*_0342R
CLIP5
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
ADD1=ADD*_0342R
CLIP6
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
ADD1=ADD*_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
GROUND CLIPS
CLIP7
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
ADD1=ADD*_0342R
CLIP8
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
ADD1=ADD*_0342R
CLIP10
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
ADD1=ADD*_0342R
ADD9=ADD*_0585R_RIVET4 ADD8=ADD*_0585R_RIVET3 ADD7=ADD*_0585R_RIVET2 ADD6=ADD*_0585R_RIVET1
CLIP11
P1 P2 V1 V2 V3 V4 V5 V6 V7 V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
NEED TO SUB IN EXTRA P/N ENGINEE_0342R
16 GND VIAS
ADD1=ADD*_0342R
CLIP12
P1
P2
V1
V2
V3
V4
V5
V6
V7
V8
V9 V10 V11 V12 V13 V14 V15 V16
SMT GND CLIP
86 SLOT
16 GND VIAS
ADD1=ADD*_0342R
ADD5=ADD*_42753_REV ADD4=ADD*_42610_BARCODE ADD3=ADD*_0U527_PWB
ADD=ADD1_Y1004_ASSYDRW ADD2=ADD1_X1004_SCHEM ADD3=ADD2_T1905_ASSYDRW
ADD4=ADD2_W1266_SCHEM
A B
PLANAR INSULATOR
RIVETS FOR PLANAR INSULATOR
CS1
NC
CPTV SCREW
PCB STYLE
SUB*_N0684
THUMBSCREW
ADD1=ADD*_4W309_INSLTR ADD2=ADD*_5Y088_STIFF1 ADD3=ADD*_5Y088_STIFF2
UPDATED PWB, SCH, ASSY DWG PN'S TO REFLECT 533MHz BOARDS -SC 5-20-03
Changed PWB back to old one for RTS (0U527) - SMR 6/6/03
BOM OPTIONS FOR 533MHZ PLANAR: BUILD 1 = MSI BUILD 2 = CELESTICA COMBINE WITH BUILD 0 FOR PRODUCTION BUILDS
COMPUTER CORPORATION
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
DATE
EVERGLADES 48 6-9-2003_13:56
X1004
6/6/2003
DC
AUSTIN,TEXAS
REV.
SHEET
48 OF 51
A00-00
3
4
Page 49
B D
CA
1
X01 -- SUB TO LOWER RESISTANCE PART (5990P)--HAD TOO MUCH V DROP --SWH 10/9 X01 -- SUB TO 0 OHM PER SNAC RECOMMENDATION --SWH 10/14 X01 -- CHANGED TO RESISTOR BECAUSE PADS WERE TOO LARGE --SWH10/14
R102
21
10V-20%
100uF
+
C71
+3.3V_AUX
22uF 10V
1 2
AVCC_AC205
49
RXI-_ESM4
39 39
RXI+_ESM4
0.1uF 16V
2
0.1uF 16V
TXO+_ESM4
39
+3.3V_AUX
39
L27
1 2
600mA
TXO-_ESM4
0.1uF 16V
0.1uF 16V
30,49
22,49
3
R59
10K-1%
1 2
OS1
4
VCC
OUTE/D
GND
2
25MHZ
SUB*_89YJU
31
CB86
1 2
CB87
1 2
CB89
1 2
CB88
1 2
DVCC_AC205
21
C95
0.1uF 16V
R_CK_AC205
39
49.9-1%
AC205_RST
0.1uF 16V
49.9-1% RB63
RB62
21
21
49.9-1%
49.9-1%
RB65
21
21
RB47
1.5K-5%
1 2
R62
21
33-5%
SUB TO 1K
SUB*_22327
1 2
SUB*_19960
SUB TO 4.7K
C135
1 2
0.1uF 16V
RB64
RB42
1 2
RB43
220
RB48
47K-5%
CB64
1 2
R82
1.5K-5%
1 2
CK_AC205
21
21
CB55
R98
1.5K-5%
0.1uF 16V
NP*
21
10K-1%
VR5
4 2
TAB GND
CB4
SC1566IM-2.5V
DPN: 620YR
49 49
22,49
49 49 49
49
AVCC_AC205
49
DVCC_AC205
30,49
VOVIN
31
NC_U6017_42 NC_U6017_43 NC_U6017_44 NC_U6017_45 AC205_LINKLED AC205_ACTLED
AC205_RBP MII_MDIO
AC205_EECS
AC205_EEDO AC205_EESK AC205_EEDI NC_U6017_94 LED_DRIVE NC_U6017_92
21
22uF 10V
1 2
CB23
75
RXIP_4
74
RXIP_3
63
RXIP_2
62
RXIP_1
51
RXIP_0
76
RXIN_4
73
RXIN_3
64
RXIN_2
61
RXIN_1
52
RXIN_0
42
LED_LN5
43
LED_LN4
44
LED_LN3
45
LED_LN2
46
LED_LN1
47
LED_LN0
85
RBP
100
MDIO
99
MDC/PROM_CS
97
LED_D7/PROM_IN
96
LED_D6/PROM_CLK
95
LED_D5/PROM_OUT
94
LED_D4/MODE2
93
LED_D3/CHIP0
92
LED_D2/CHIP1
91
LED_D1/MODE1
90
LED_D0/MODE0
40
CLK
39
RESET
49
AVCC_49
50
AVCC_50
81
AVCC_81
82
AVCC_82
83
AVCC_83
12
DVCC_12
19
DVCC_19
31
DVCC_31
38
DVCC_38
88
DVCC_88
98
DVCC_98
86
CAVDD_86
0 OHM
CB45
MIIB__TXD0/SNI_TXD
MIIB_TXCLK/SNITXCLK
MIIB_TXEN/SNI_TXEN
MIIB_RXD3/MIIB_SPDSEL
MIIB_RXD0/SNI_RXD
MIIB_RXCLK/SNI_RXCLK
AC205 0-5%
SUB*_0J603
22uF 10V
1 2
C145
21
CB62
21
0.1uF 16V
CB54
1 2
0.1uF 16V
21
CB56
21
CB44
0.1uF 16V
ROOM=ESM_NIC
U17
MIIB__TXD3 MIIB__TXD2 MIIB__TXD1
MIIB_RXD2/MODE3 MIIB_RXD1/TP125
MIIB_RXDV
MIIB_CRS/SNI_CRS
MIIB_RXER
MIIB_COL/SNI_COL
GAGND_48 GAGND_84
TXOP_4 TXOP_3 TXOP_2 TXOP_1 TXOP_0
TXON_4 TXON_3 TXON_2 TXON_1 TXON_0
AGND_53 AGND_56 AGND_57 AGND_60 AGND_65 AGND_68 AGND_69 AGND_72 AGND_77 AGND_80
DGND_4 DGND_18 DGND_24 DGND_37 DGND_41 DGND_89
GND_87
78 71 66 59 54
79 70 67 58 55
36 35 34 33 25 32 30 29 28 27 23 20 21 26 22
53 56 57 60 65 68 69 72 77 80
4 18 24 37 41 89
48 84
87
21
21
CB85
CB61
CB63
0.1uF 16V
0.1uF 16V
0.1uF 16V
21
21
CB58
CB50
0.1uF 16V
NC_U6017_78 NC_U6017_71 NC_U6017_66
NC_U6017_79 NC_U6017_70 NC_U6017_67
NC_AC205_MII_TXD3 NC_AC205_MII_TXD2 NC_AC205_MII_TXD1 NC_AC205_MII_TXD0 NC_AC205_MII_TX_CLK NC_AC205_MII_TX_EN PD_AC205_MII_RXD3 NC_AC205_MII_RXD2 PD_AC205_MII_RXD1 NC_AC205_MII_RXD0 NC_AC205_MII_RX_CLK NC_AC205_MII_RX_DV NC_AC205_MII_CRS NC_AC205_MII_RX_ER NC_AC205_MII_COL
0.1uF 16V
0.1uF 16V
CB51
21
0.1uF 16V
21
CB39
0.1uF 16V
AVCC_AC205
DVCC_AC205
21
21
CB38
0.1uF 16V
0.1uF 16V
AVCC_AC205
49
R80
R81
1.5K-5%
1 2
1 2
NP for 1.25 XFMRNP for 100M
49
30,49
49.9-1%
49.9-1% RB61
21
1.5K-5%
49.9-1%
RB59
21
49.9-1% RB60
21
RB58
21
0.1uF 16V
ROOM=AC205
MDIO Interface Header
P1
MII_MDIO
22,49
AC205_EECS
22,49
Required to facilitate IEEE testing
0.1uF 16V CB81
1 2
RX-_AC
49
RX+_AC
49
C144
1 2
TX+_AC
49
TX-_AC
49
RX+_AC
49
RX-_AC
49
TX-_AC
49
TX+_AC
49
AVCC_AC205
49
C114
1 2
SUB*_99477
0.1uF 16V
1 2 3
SUB=SUB*_T0541
LED_DRIVE
49
L32
1 2
200mA
SMT
C113
VENDORS FOR PN 8K781 DO NOT ALL
MATCH UP; SUB IN T0541- SC 3/10/03
ADDED FIX FROM YELLOWSTONE
--S HAYES 28 JUNE 2002
DVCC_AC205
30,49
49
SUB TO 0.047uF
49
D3
1N914
R63
1 2
8.2K-5%
AC205_LINKLED
SUB*_0M885
AC205_ACTLED
13
50V-20%
.01UF
21
1.5K-5%
2 7
C85
AC205 LED CONTROL CIRCUIT
L26
RECEIVE
1
RD+
17
18
2
RD-
3
CT3
19
TRANSMIT
TD- TX-
14
CT14
16
TD+
10_100
MAGNETICS MODULE
PULSE/VALOR COMBO
SUB*_65892
1 2
1 2
C64
0.1uF 16V
.01UF
50V-20%
1.5K-5%
RN4
4 5
RN4
RX+
CT5
RX-
CMT
TX+
1.5K-5%
1 8
RN4
74VHC74
7 22
5 20
6 21
1115
12
10
DVCC_AC205
30,49
RB39
1.5K-5%
1 2 NC_U6018_6 AC205_EEDI
49
AC205_EECS
22,49
AC205_EESK
49
9K753 WAS OLD EEPROM IMAGE
6 3 1 2
U3
VCC
ORG DI
DO
CS
GND
SK
93C46
SUB*_2W515
+3.3V_AUX
8 4
AC205_EEDO
5
49
AC205 EEPROM
1.5K-5%
3 6
RN4
C82
1 2
U7
14
4
V
PRE
2
Q
D
3
Q
CLK
CLR
SUB*_12JPJ
1
SUB TO LCX
AC205_LINKLED
49
AC205_ACTLED
49
ACT_LED_DRV
49
LED_DRIVE
49
21
21
R46
R45
75-1%
75-1%
ESMNIC_PLANE
2000V-10%
SUB=SUB*_8Y565
CHANGED FROM 4M675 TO 8Y565 FOR IEEE (2.5KV INSTEAD OF 2KV)
--SWH 12/9/2002
0.1uF 16V
5
6
NC_AC205LCX74P6
AC205_RJ1 AC205_RJ2 AC205_RJ3 AC205_RJ6
21
R38
R29
75-1%
C57
21
1000pF
AC205_LINK_STATUS
U7
14
10
74VHC74
R39
1 2
100-1%
R27
1 2
100-1%
WILL NOT MODEM WITHOUT
21
75-1%
V
PRE
12
11
SUB TO 22-OHM PER SNAC-- SC 12/17
SUB*_19964
SUB*_19964
L4 L5
L2 L3
L1
PRELIMINARY PART
1 2 3 4 5 6 7 8
9 10 11 12
ENG MGR APPROVAL
9
NC_AC205LCX74P9
Q
D
8
ACT_LED_DRV
Q
CLK
CLR
SUB*_12JPJ
13
SUB TO LCX
EMP_NIC
YEL
GRN
ORG
SHIELD
MTG HOLES
RJ45 RCPT
WITH 2 LEDS
SUB=SUB*_5U429
5U429 IS NON IEEE COMPLIANT PART D2069 IS IEEE COMPLIANT PART
R28
ESMNIC_CH_GND
1 2
39
49
1
2
3
AC205 (ESM4 NIC 10/100 REPEATER)
4
COMPUTER CORPORATION
AUSTIN,TEXAS
REV.
SHEET
49 OF 51
A B
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
DATE
X1004
6/6/2003
EVERGLADES 49 6-9-2003_13:56
DC
4
A00-00
Page 50
RESET BLOCK DIAGRAM
+5V SIP
B D
CA
1
2
GREY BOX 1
3
GREY BOX 2
+12V
+3.3V_FP
PWRGOOD
AC_OK
+12V
+3.3V_FP
PWRGOOD
AC_OK
+12V
+1.25V SIP
PWRGOOD
ENABLE
+1.8V SIP
PWRGOODENABLE
+3.3V SIP
PWRGOODENABLE
+2.5V SIP
PWRGOODENABLE
PWRGOODENABLE
INIT RESET PWRGOOD
PROC 2
INIT RESET PWRGOOD
THERMTRIP
PROC 1
VID
PRES
THERMTRIP
VID
PRES
POWERGOOD
CPLD
VID1 P1_PRES THERMTRIP1
VID2 P2_PRES THERMTRIP2
DC_OK POK_PS1
POK_PS2
VCORE_PWRGOOD1 VCORE_PWRGOOD2
RESET_SW
H_PWRGOOD
SYNTH_EN
RPLLRST
CMIC_SRESET
SYS_PWRGOOD
DDR_RESET
VRM_EN
CORE VRM 1
ENABLEPWRGOOD
CORE VRM 2
ENABLE
PWRGOOD
CMIC-LE
DLYRESET
WARMRST
PLLRST SRESET
DIMMs
RESET
P_INIT CPURST
PCIRST
BACKPLANE
RESET
CIOBX2
S_PCIRST
P_PCIRST
PCIRST PLLRST
CIOB-E
P_PCIRST
PCIRST PLLRST
1
ROMB
RESET
LSI SCSI
RESET
2
PCI SLOT
RESET
PCI SLOT
RESET
CSB5
3
INIT
PLLRST PCIRST
SIO
KB_RST
PCIRST
ATI VIDEO
PCIRST
IDE
VOLTAGE MONITOR
4
INPUT
PWRGOOD RESET
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
A B
ESM3
PCIRST
ESM4
PCIRST
COMPUTER CORPORATION
TITLE
AUSTIN,TEXAS
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
DATE
X1004
6/6/2003
DC
SHEET
REV.
50 OF 51
6-9-2003_13:5650EVERGLADES
4
A00-00
Page 51
CBA D
SUB FUSE TO 1.5A--THE 1.1 IS ONLY 0.95A @ 40C
17,22,39,51
17,21,35,39,42,47
1
26
2
26,43,51
26,27,51
VCC
26,43,51
22,35,51
+2.5V
3
AC1_OK
35,48
AC2_OK
35,48
NOT USING AC_OK BECAUSE THIS CAN GO LOW DURING NORMAL OPERATION IF THERE IS A GLITCH ON THE AC OR SOMETHING
4
BAR43
NP*
BAR43
NP*
THIS IS PART 9U854
RAID_GND
3
CONN, 2MM
VCC RCPT
NP*
VBAT SYSTEM_PWRGOOD
PCIX_SCSI_AD35
26,43
PCIX_SCSI_AD32
26,43
PCIX_SCSI_AD39
26,43
PCIX_SCSI_AD36
26,43
PCIX_SCSI_AD42
26,43
PCIX_SCSI_AD43
26,43
PCIX_SCSI_AD46
26,43
PCIX_SCSI_AD47
26,43
PCIX_SCSI_AD50
26,43
PCIX_SCSI_AD51
26,43
PCIX_SCSI_AD52
26,43
PCIX_SCSI_AD57
26,43
PCIX_SCSI_AD54
26,43
PCIX_SCSI_AD61
26,43
PCIX_SCSI_AD58
26,43
PCIX_SCSI_CBE4
26,43
PCIX_SCSI_CBE6
26,43
PCIX_SCSI_CBE5
26,43
PCIX_SCSI_AD1
26,43
PCIX_SCSI_REQ64
26,43
PCIX_SCSI_AD5
26,43
PCIX_SCSI_AD0
26,43
PCIX_SCSI_M66EN
26
CK_PCIX_SCSI_RAID_100M
PCIX_SCSI_AD2
26,43
PCIX_SCSI_AD10
26,43
PCIX_SCSI_CBE0
26,43
PCIX_SCSI_AD14
26,43
PCIX_SCSI_AD13
26,43
PCIX_SCSI_AD15
26,43
PCIX_SCSI_AD16
26,43
PCIX_SCSI_PAR
26,43
PCIX_SCSI_PERR
26,43
PCIX_SCSI_AD26
26,43
PCIX_SCSI_AD22
26,43
PCIX_SCSI_AD30
26,43
PCIX_SCSI_AD18
26,43
PCIX_SCSI_AD27
26,43
1030_INTA
43,51
PCIX_SCSI_AD21
PCIX_SCSI_GNT1 1030_INTB
43,51
PCIX_SCSI_CBE2
26,43
PCIX_SCSI_AD19 PCIX_SCSI_AD25
26,43
PCIX_SCSI_AD31
26,43
LI_BAT_PRSNT
GPO_ROMB_DISABLE
22,51
ENV_SEG5_SDA
37
ROMB_AC_OK
51
ENV_SEG5_SCL
37
GPI_ROMB_PRESENT
22
D4
D5
1 24
+3.3V
R75
1 2
31
ROMB_AC_OK
31
ROMB GND CONNECTOR
+3.3V+3.3V
RAID
A1 A2 A3 A4 A5 A6 A7 A8
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 B80
CONN2X80
B TO B RECEPTACLE
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79
8.2K-5%
ROMB CONNECTOR
DO NOT ADD THIS TO ANY FUTURE
51
SCHEMATIC-- SC 12/18/02
CIRCUIT IS CONFLICTING WITH COIN CELL OPERATION-SC 12/13
LI_BAT_PACK+
40,51
ROMB BATTERY TO CIRCUIT TO ALLOW MAINTAIN VBAT IF COIN BATTERY IS DEAD (SO ROMB WON'T LOSE DATA IF COIN IS DEAD)
VERDE_PRSNT_1
3.3VAUX_PWRGOOD
PCIX_SCSI_AD33 PCIX_SCSI_AD34 PCIX_SCSI_AD37
PCIX_SCSI_AD38 PCIX_SCSI_AD41 PCIX_SCSI_AD40
PCIX_SCSI_AD45 PCIX_SCSI_AD44 PCIX_SCSI_AD49
PCIX_SCSI_AD48 PCIX_SCSI_AD53 PCIX_SCSI_AD55
PCIX_SCSI_AD56 PCIX_SCSI_AD59 PCIX_SCSI_AD60
PCIX_SCSI_AD63 PCIX_SCSI_AD62 PCIX_SCSI_ACK64
PCIX_SCSI_PAR64 PCIX_SCSI_AD3 PCIX_SCSI_CBE7
PCIX_SCSI_AD7 PCIX_SCSI_AD8 NC_ROMB_B34
PCIX_SCSI_AD4 PCIX_SCSI_AD6 PCIX_SCSI_AD12
PCIX_SCSI_AD9 PCIX_SCSI_AD11 PCIX_SCSI_CBE1
PCIX_SCSI_TRDY PCIX_SCSI_SERR PCIX_SCSI_FRAME
PCIX_SCSI_AD20 PCIX_SCSI_RST VERDE_IDSEL
PCIX_SCSI_AD28 PIRQ_2 PCIX_SCSI_AD24
PCIX_SCSI_REQ1 PCIX_SCSI_STOP PCIX_SCSI_CBE3
PCIX_SCSI_DEVSEL PCIX_SCSI_IRDY PCIX_SCSI_AD17
PCIX_SCSI_AD23 PCIX_SCSI_AD29 PIRQ_3
ROMB_KEY_SPD_SCL
ROMB_IDSEL_BLOCK LI_BAT_PACK+
STAT1 STAT2 ROMB_KEY_SPD_SDA
D12
1 3
1N914
R492
1 2
15K
NP*
NP*
37,39,47,48
26,43 26,43 26,43
26,43 26,43 26,43
26,43 26,43 26,43
26,43 26,43 26,43
26,43 26,43 26,43
26,43 26,43 26,43
26,43 26,43 26,43
26,43 26,43
26,43 26,43 26,43
26,43 26,43 26,43
26,43 26,43 26,43
26,43 26,43
26,43 19,51 26,43
26,27 26,43 26,43
26,43 26,43 26,43
26,43 26,43 19,51
21
+2.5V
51 40,51
35 35 21
31
D13
R145
1 2
0-5%
R277
1 2
1K-5%
SUB*_85228
VCC
+3.3V_AUX
VBAT
3.3V
DZ84C3V3
NP*
PCIX_SCSI_AD19
SUB TO 750 OHM TO DECREASE RISE/FALL TIMES AND INCREASE MARGINS- SC 3/10/03
26,43,51
26,27,51
+3.3V
8.2K-5%
1 2
R218
17,22,39,51
22,51
74LCX74
GPO_ROMB_DISABLE
35,51
ROMB_IDSEL_BLOCK
51
FROM ROMB (GPIO5 OF VERDE)
CK_PCIX_SCSI_IDSELBLOCK_100M
26
8.2K-5%
+3.3V
1 2
R222
U27
14
10
VCC
SET
12 9
D Q
11
CLK
CLR
NC_U44_9
8
GPO_ROMB_DISABLE_N
Q
INVERT GPO_ROMB_DISABLE
13
ROMB_BAT_STAT1
35,51
ROMB_BAT_STAT2
+3.3V
U27
14
74LCX74
VCC
2 5
D Q
3
CLK
CLR
CHARGER STATUS
FAST / PRECHARGE
FAULT CONDITION
CHARGED > 90%
BATTERY NOT THERE
VCC
+5V TO CHG CKT
0.1ohm 1% 2510 resister- Sense resistor
21
SUB_8M268
R412
R396
1 2
1.8K-1W-5%
NC_U26_1
NC_U26_2
0-5%
1
NC_1
2
IN_0
3
IN_1
4
VCC
5
ISNS
6
NC_2
7
APG
8
EN
9
VSEL
10
GND/HEATSINK
NET_PHYSICAL_TYPE=PWR
2
1
10uF
C440
16V 10%
0-5%
R397
RB310
1 2
NP*
CB461
.01UF
1 2
50V-20%
NET_PHYSICAL_TYPE=PWR
0-5%
1 2
NET_PHYSICAL_TYPE=PWR
+3.3V
1
3906
Q32
+3.3V
2
3
RB397
1 2
220
2
3
R503
1 2
220
RED / GRN LEDS
R
4 3
G
2 1
DS1
SUB*_89EJN
Yellow / Green Bi Color
pins 1 and 2 => Green
RB398
1 2
8.2K-5%
RB399
1 2
8.2K-5%
3906
Q33
1
Heat Sink under the Chip
Chip Pin Numbering, looking from TOP
ROMB BATTERY AND CHARGER
GPO_ROMB_DISABLE
R217
1 2
47K-5%
22,51
GPO_LSI1030_ENABLE
22
FROM BIOS GPIOs
4
SET
NC_U44_5PCIX_SCSI_GNT1
6
Q
1
DELAY VERDE GNT BY ONE CLOCK TO AVOID RACE CONDITION WITH GNT GOING AWAY ON SAME CLOCK THAT FRAME IS ASSERTED
R221
1 2
0-5%
ROMB_IDSEL_BLOCK_DELAYED PIRQ_2
19,51
PIRQ_3
19,51
PCIX_SCSI_AD21
26,43,51
ROOM=LSI_1030
SCSI PIRQ & IDSEL BLOCKING
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.
RED LED GREEN LED
1Hz CYCLING
STAT 2STAT 1
ONOFF
VCC
ON
ON OFF
OFF OFF
U49
NC_4 OUT_0 OUT_1
VSENSE
AGND STAT2 STAT1
TMR_SEL
SUB_8G494
NC_3
20 19 18 17 16 15 14 13 12
CR
11
NC_U26_4
LI_BAT+
VSENSE
NET_PHYSICAL_TYPE=PWR
ROMB_BAT_STAT2 ROMB_BAT_STAT1
NC_U26_11
35,51 35,51
RB280
RB311
1 2
100-1%
BQ24002
C432
1 2
.01uF 50V
CB453
USE NPO only!
Need to have a Flat C % Change for wide temp range = NPO
CAN'T GET NPO OR COG ... USING X7R ... STUART 7/16/02
solder mask info
1
10 11
5
2OE
12
3OE
15
4OE
3 4
1A 1Y
6 7
2A 2Y
11 10
3A 3Y
14 13
4A 4Y
QS3126
U28
20
Open Silk-Screen for Contact
Heat Sink on Board. Attached to the symbol
VCC
162
VCC1OE
1030_INTA 1030_INTB
R224
21
PCIX_LSI_IDSEL
220
2.2K-5%
1 2
R228
TO LSI1030 SCSI
21
10N1198
Low here means 6 hour charge. High --> 4.5 hrs Floating --> 3 Hours
470K
2
21
R387
1
470K
C404
NP*
NP*
NET_PHYSICAL_TYPE=PWR
2
1
10uF
CB470
16V 10%
NP*
NET_PHYSICAL_TYPE=PWR
10uF
16V 10%
21
C439
10pF
1 2
1 2
1 2
.22uF 16V
RB288
R404
20K-1%
1 2
1 2
93.1K-1%
Per TI recomendation 20K, 1/10W, 1%, 0805
CHANGED TO 0603 S HAYES 06/14/02
NP*
Need 25V, 16V should be ok.
43,51 43,51
43
As close to the battery connector as possible.
1.1A
2 1
FS10
50V-5%
R330
0-5% R337
0-5%
Per TI recomendation for the 25c 10K thermister Read below.
LI_BAT_PACK+
NET_PHYSICAL_TYPE=PWR
SUB*_6393R
Try to replace with 8M378. Issue, change the pad to 0805, from 1206
10pF, 10%, 50V, NPO
LI_BAT_PACK-
NET_PHYSICAL_TYPE=PWR
LI_BAT_THERM
Make it as short a length as possible to Battery connector
40,51
Maybe A01 rev
51
51
BATTERY CONNECTOR
+3.3V
2
R95
1
RAID_BAT
POCKET SHR
TITLE
EVERGLADES MB
SCHEM,PLNR,PE1750,533MSI
DWG NO.
DATE
EVERGLADES 51 6-9-2003_13:56
DA B C
8.2K-5%
LI_BAT_PRSNT
1
LI_BAT_PACK+
2 3
LI_BAT_THERM
4
LI_BAT_PACK-
ROOM=CHARGER
COMPUTER CORPORATION AUSTIN,TEXAS
X1004
6/6/2003
SHEET
REV.
51 OF 51
22,35,51 40,51 51 51
A00-00
1
2
3
4
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