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Lenovo Mississippi_uATX Schematic
Rev:0.4
SHEET# DESCRIPTION SHEET# DESCRIPTION
A A
PAGE1
PAGE2
PAGE3
PAGE4
PAGE5
B B
PAGE6
PAGE7
PAGE8
PAGE9
PAGE10
PAGE11
PAGE12
C C
PAGE13
PAGE14
PAGE15
PAGE16
PAGE17
PAGE18
D D
PAGE19
PAGE20
PAGE21
PAGE22
INDEX
BLOCK DIAGRAM
XDP DEBUG PORT
HASWELL SOCKET(MISC)
HASWELL SOCKET(PEGDMIFDI)
HASWELL SOCKET(MEMORY)
HASWELL SOCKET(POWER)
HASWELL SOCKET(GND)
HASWELL SOCKET(DECOUPLING)
DDR3 UDIMM CHANNEL A
DDR3 UDIMM CHANNEL B
DECOUPLING
PCH (FDI_DMI_PCIE_USB)
PCH (CLOCK GEN)
PCH (SATA_QST)
PCH (LPC_HDA_SPI_SMB)
PCH (SPI_BOARD ID_iBUTTON)
PCH (DISPLAY)
PCH (POWER)
PCH (GND)
PCH (DECOUPLING)
PCI EXPRESS X16 SLOT
PAGE23 PCI EXPRESS X1& X16 (X4) SLOT
PAGE24 INTERNAL HDMI PORTD
PAGE25 REAR DP PORTC
E E
PAGE26 VGA_DP PORTB
PAGE27 F_USB3.0
PAGE28
PAGE29
PAGE30
PAGE31
F F
PAGE32
PAGE33
BLANK
F_USB2.0
REAR USB2.0 PORT_USB POWER ON
REAR USB3.0 PORT
SATA CONN
BLANK
CM
1
2
3
4
PAGE34
PAGE35
PAGE36
PAGE37
PAGE38
PAGE39
PAGE40
PAGE41
PAGE42
PAGE43
PAGE44
PAGE45
PAGE46
PAGE47
PAGE48
PAGE49
PAGE50
PAGE51
PAGE52
PAGE53
PAGE55
PAGE56
PAGE58
PAGE59
PAGE60
PAGE61
PAGE62
PAGE63
5
AUDIO CODEC ALC662VD
AUDIO JACK
LAN
TPM_ASSET ID
RSMRST LOGIC
SIO IT8733
LPT_THERMAL SENSOR
FAN CONNECTOR
COM_KBMS
PCIe TO PCI BRIDGE
PCI SLOT
ATX POWER_FPANEL CONN
VRD12 CONTROL
VRD12 OUTPUT DRIVE
SM VR
3.3VAUX VR&VCC1.5V_PCH
1.05V_PCH&ME VR
5V DUAL VR
VCC3 & VCC5
FLEXIBLE IO ASSIGN
HOLE_HEATSINK PAGE54
RESET MAP
SMBUS MAP
DSW SEQUENCE PAGE57
POWER SEQUENCE
POWER DISTRIBUTION
CLOCK DISTRIBUTION
GPIO TABLE
H/W STRAP
PCB STACK
Description Reference
TITLE:
TITLE:
TITLE:
0.1UF_0402 CB
Document N umber :
Document N umber :
0.01UF_0402 CP
1UF_0603
6
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
Mississippi_uATX
Mississippi_uATX
Mississippi_uATX
INDEX
INDEX
INDEX
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
A3
A3
A3
7
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
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1 63
1 63
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of
of
1
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3
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5
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7
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Block Diagram - Mississippi_uATX
A A
VRD 12.5
4 Phase
PCI-e x16 (X16)
PCI Express 3.0
x16
Haswell Processor
Voltage: 12V, 3.3V, 3.3VAUX
Clock: 100MHz
B B
REAR DP CONN
DDIB
CPU core: 0.5V~2.3V
Intel
DDR3 1066/1333/1600
DDR3 1066/1333/1600
DDR3 1066/1333/1600
DDR3 1066/1333/1600
CHA DIMM0
CHA DIMM1
CHB DIMM0
CHB DIMM1
REAR DP CONN
INTERNAL HDMI CONN
C C
PCI-e x16 Slot*1
Voltage: 12V, 3.3V, 3.3VAUX
Clock: 100MHz
PCI-e x1 Slot*1
D D
Voltage: 12V, 3.3V, 3.3VAUX
Clock: 100MHz
DDIC
DDID
PCI Express 2.0
PCI Express 2.0
CLINK
x4
x1
FDI X2 DMI X4(Gen 2)
Lynxpoint
PCH
(4.1W)
Voltage: 1.5V,1.05V,3.3VSB,
3.3V
DISPLAY I/O
SATA3
USB2.0
USB3.0/2.0
USB2.0
Clock: 32.768K/14/33/48/96/100MHz
PCIE to PCI
Bridge
x1
PCI-32/33 Slot*1
PCI 2.3
IT8893E
Voltage: 3.3V,5V,12V,
-12 V,3.3VAUX
E E
Clock: 33MHz
PCI Express 2.0
HDA
LPC
USB3.0/2.0
SPI
TPM
Voltage:3.3VAUX
Voltage: 0.75V, 1.5V
VGA CONN
SATA3 Box*4
eSATA Box*1
Front USB Header*2Ports
Front USB Header*2Ports
Rear USB CONN*2Ports
Rear USB CONN*4Ports
SPI Flash ROM(8MB+4MB)
Clock: 33MHz
Audio Codec
GLAN CONN *1
F F
Voltage:3.3VAUX, 1.2VAUX,
1.8VAUX
Intel CLARKVILLE
Clock: 25MHz/100MHz
1
2
3
ALC662VD
Voltage:3.3V,5V
Clock: 24MHz
4
Voltage:3.3V,
3.3VAUX
Clock: 48/33MHz
SIO
IT8733
PS/2 KB/MS HDR
COM CONN*1(Rear)
COM Header*1
Thermal monitor x2
FAN Header*4
SPI(1MB)*1
LPT Header*1
5
6
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
Mississippi_uATX
BLOCK DIAGR AM
BLOCK DIAGR AM
BLOCK DIAGR AM
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
7
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
2 63
2 63
2 63
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of
of
1
CPU DEBUG CONN
A A
V_CPU_V CCIO_RIGHT 3,4,46,7
B B
TPEV_PC UDEBUG[0..15] 4
H_PW RGD 16,4,46
C C
2
PLACE NEAR CPU
H_TCK TERMINATIOM PLACE NEAR CPU WITHIN 1.1 INCH
0402
0402
R332
R332
X_1K
X_1K
H_TDI
H_TMS
H_TCK
H_TRST_ N
XDP_PW RGD
R52 X_51R
R52 X_51R
R58 X_51R
R58 X_51R
R59 51R
R59 51R
R60 51R
R60 51R
R61 1K
R61 1K
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
3
VCC1.05V _PCH VCC3
0402
R56
R56
51R
51R
R68
R68
X_825R_ 1%
X_825R_ 1%
0402
0402
0402
4
CB48 CB48
DBRESET _N 16,4,45
CK_100M _CPU_XDP_DN 14
CK_100M _CPU_XDP_DP 14
PLTRST_ CPU_N 15,4
SMB_CLK 10,11,17,3 7
SMB_DAT A 10,11,17,3 7
SW_ ON_N 16,23,39,4 2,45
H_TDO 4
H_TDI 4
H_TMS 4
H_TCK 4
H_TRST_ N 4
0402
0402
R70
R70
X_249R_ 1%
X_249R_ 1%
H_TDO
0402
0402
R78
R78
X_249R_ 1%
X_249R_ 1%
R55 1K
R55 1K
R54 1K
R54 1K
0402
0402
0402
0402
PRIVACY_MSR_ EN_N 4
H_CPURS T_XDP_R_N
DBRESET _N
XDP_PW RGD
SMB_CLK
SMB_DAT A
XDP_SW _ON_N
5
XDP_PW R_DEBUG
J1
J1
48
HOOK7/DBR-
42
ITPCLK-/HOOK5
40
ITPCLK/HOOK4
39
HOOK0
46
HOOK6/RESET-
53
SCL
51
SDA
41
HOOK1
52
TDO
56
TDI
58
TMS
57
TCK0
54
TRSTn
1
GND1
2
GND2
7
GND3
8
GND4
13
GND5
14
GND6
19
GND7
20
GND8
25
GND9
26
GND10
31
GND11
32
GND12
37
GND13
38
GND14
49
GND15
50
GND16
59
GND17
60
GND18
HAVENDA LE_XDP_CONN
HAVENDA LE_XDP_CONN
OBSFN_A0
OBSFN_A1
OBSDATA_A0
OBSDATA_A1
OBSDATA_A2
OBSDATA_A3
OBSFN_B0
OBSFN_D0
OBSFN_B1
OBSFN_D1
OBSDATA_B0
OBSDATA_B1
OBSDATA_B2
OBSDATA_B3
HOOK2
HOOK3
TCK1
OBSFN_C0
OBSFN_C1
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
VCC_OBS_AB
VCC_OBS_CD
6
R82 0R
R82 0R
0402
0402
3
5
9
TPEV_PC UDEBUG0
11
TPEV_PC UDEBUG1
15
TPEV_PC UDEBUG2
17
TPEV_PC UDEBUG3
21
22
23
24
27
TPEV_PC UDEBUG4
29
TPEV_PC UDEBUG5
33
TPEV_PC UDEBUG6
35
TPEV_PC UDEBUG7
45
XDP_PW R_DEBUG
47
CPU_HOO K3
55
4
6
10
TPEV_PC UDEBUG8
12
TPEV_PC UDEBUG9
16
TPEV_PC UDEBUG10
18
TPEV_PC UDEBUG11
28
TPEV_PC UDEBUG12
30
TPEV_PC UDEBUG13
34
TPEV_PC UDEBUG14
36
TPEV_PC UDEBUG15
43
44
7
PWR_ DEBUG 4
R81 X_0R
R81 X_0R
0402
0402
R91 0R
R91 0R
0402
0402
CB50 CB50
V_CPU_V CCIO_RIGHT 3,4,46,7
H_PREQ_ N 4
H_PRDY_N 4
CPU_BPM _0 4
HSW_ PCUSTB_1_DP 4
CPU_BPM _1 4
HSW_ PCUSTB_1_DN 4
XDP_PW R_DEBUG 4
VRMPW RGD 16,4,46
PCH_SYSPW ROK 16,39
HSW_ PCUSTB_0_DP 4
HSW_ PCUSTB_0_DN 4
8
PLACE NEAR XDP
D D
E E
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
F F
1
2
3
4
5
6
Mississippi_uATX
XDP DEBU G PORT
XDP DEBU G PORT
XDP DEBU G PORT
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
7
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
3 63
3 63
3 63
of
of
of
1
SB3V_DS W
0402
0402
R336
R336
X_1K
X_1K
A A
B B
U93_1
CB46
CB46
X_0.1UF_ 0402
X_0.1UF_ 0402
U93A
U93A
1
Q130
Q130
SB3V_DS W
5 2
Y A
Y A
C
C
B
B
1
Q130_B
E
E
2 3
C664
C664
X_3904_SOT23
X_3904_SOT23
X_1UF_6.3V_X5R
X_1UF_6.3V_X5R
VCC
VCC
6
U93_6
X_SN74L VC2G14DCKR
X_SN74L VC2G14DCKR
GND
GND
SVID
R1279
V_CPU_V CCIO_RIGHT 3,4,46,7
C C
H_VIDSCK
H_VIDSOUT
H_VIDALER T_N
V_CPU_V CCIO_RIGHT 3,4,46,7
VCC1.05V _PCH
D D
E E
PRIVACY_MSR_ EN_N 3
F F
PCH_GP8 16
1
HSW_ STRAP_13
R761 10K
R761 10K
C656 100PF_5 0V_NPO C656 100PF_5 0V_NPO
C663 X_10PF_ 50V_NPO C663 X_10PF_ 50V_NPO
C666 100PF_5 0V_NPO C666 100PF_5 0V_NPO
R1279
R95
R95
R1280
R1280
R325
R325
R596 0R
R596 0R
R598 0R
R598 0R
R690 0R
R690 0R
R1287
R1287
0402
0402
R752 X_1K
R752 X_1K
R753 X_1K
R753 X_1K
R754 X_1K
R754 X_1K
R435 X_1K
R435 X_1K
R743 X_1K
R743 X_1K
R559 X_1K
R559 X_1K
R744 X_1K
R744 X_1K
R739 X_1K
R739 X_1K
R745 X_1K
R745 X_1K
R740 X_1K
R740 X_1K
R746 X_1K
R746 X_1K
R741 X_1K
R741 X_1K
R747 X_1K
R747 X_1K
R742 X_1K
R742 X_1K
R748 X_1K
R748 X_1K
R749 X_1K
R749 X_1K
R343 1K
R343 1K
VCC3
SB3V
0402
0402
R984
R984
X_1K
X_1K
2
R282 X_10K
R282 X_10K
0402
0402
R285
R285
X_5K1
X_5K1
0402
0402
R65
R65
X_178R_ 1%
X_178R_ 1%
0402
0402
0402
0402
R66
R66
X_84R5_ 1%
X_84R5_ 1%
X_90R9_ 1%
X_90R9_ 1%
0402
0402
110R_1%
110R_1%
0402
0402
75R_1%
75R_1%
0402
0402
X_100R
X_100R
0402
0402
PLACE NEAR CPU
0402
0402
0402
0402
0402
0402
51R
0402
0402
1K
1K
0402
0402
CPU_DRA M_PWR_OK
TPEV_PC UDEBUG0
TPEV_PC UDEBUG1
TPEV_PC UDEBUG2
TPEV_PC UDEBUG3
TPEV_PC UDEBUG4
TPEV_PC UDEBUG5
TPEV_PC UDEBUG6
TPEV_PC UDEBUG7
TPEV_PC UDEBUG8
TPEV_PC UDEBUG9
TPEV_PC UDEBUG10
TPEV_PC UDEBUG11
TPEV_PC UDEBUG12
TPEV_PC UDEBUG13
TPEV_PC UDEBUG14
TPEV_PC UDEBUG15
TPEV_PC UDEBUG3
51R
H_THERM TRIP_N
PLTRST_ CPU_N
R1283
R1283
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
to fix VCC3 lea kage
0402
0402
R961
R961
X_1K
X_1K
R966
R966
X_10K
X_10K
Q246_2
0402
0402
2
PLTRST_ N 18,22,36,3 9,54
PLTRST_ CPU_U93_N
C16
C16
X_10PF_ 50V_NPO
X_10PF_ 50V_NPO
CLOSE TO U93
H_VIDSCK
H_VIDSOUT
H_VIDALER T_N
H_VIDALER T_N_R
H_VIDSCK_ VR 46
H_VIDSOUT _VR 46
H_VIDALER T_VR_N 46
H_PROCH OT_N
C682 0.022UF_ 16V_X7R C682 0.022UF_ 16V_X7R
H_PW RGD
H_PW RGD
SB3V
0402
0402
R962
R962
X_10K
X_10K
Q246_6
C
C
B
B
2
E
E
Q246A
Q246A
1 6
X_MBT3904DW1T1G
X_MBT3904DW1T1G
3
DIMM_CA_C PU_VREF_A DIMM_CA_C PU_VREF_A_R
PLTRST_ CPU_N
X_0R
X_0R
R79
R79
0402
0402
CLOSE TO CPU
DBRESET _N 16,3,45
TPEV_PC UDEBUG[0..15] 3
HSW_ STRAP_13
C
C
B
B
5
E
E
4 3
Q246B
Q246B
X_MBT3904DW1T1G
X_MBT3904DW1T1G
3
C658
C658
0.022UF_ 16V_X7R
0.022UF_ 16V_X7R
DIMM_CA_C PU_VREF_A_RC
0402
0402
R1289
R1289
24R9_1%
24R9_1%
CK_PE_1 00M_DMI_DN 14
CK_PE_1 00M_DMI_DP 14
H_DRAMP WRGD 16
H_PW RGD 16,3,46
PLTRST_ CPU_N 15,3
H_PROCH OT_N 46
PCH_THE RMTRIP_N 15
R969 X_1K
R969 X_1K
R970 X_1K
R970 X_1K
R978 X_1K
R978 X_1K
R980 X_1K
R980 X_1K
CLOSE TO CPU
HSW_ PCUSTB_0_DP 3
HSW_ PCUSTB_0_DN 3
HSW_ PCUSTB_1_DP 3
HSW_ PCUSTB_1_DN 3
R308 0R
R308 0R
0402
0402
XDP_PW R_DEBUG 3
4
2R_1%
2R_1%
R411
R411
0402
0402
H_VIDALER T_N H_VIDALER T_N_R
H_PM_SYNC _0 15
H_PECI 15,39
H_SKTOC C_N 16,45
0402
0402
0402
0402
0402
0402
0402
0402
H_TRST_ N 3
H_PRDY_N 3
H_PREQ_ N 3
VRMPW RGD 16,3,46
4
H_TCK 3
H_TDI 3
H_TDO 3
H_TMS 3
R1278 44R2_1 %
R1278 44R2_1 %
R69
R69
T60T60
R1284
R1284
R80
R80
T51T51
T50T50
0402
0402
R309
R309
49R9_1%
49R9_1%
VCC3
VCORE
R955 X_10K
R955 X_10K
R951 X_10K
R951 X_10K
H_PECI
TP_CPU_ M36
DIMM_CA_C PU_VREF_A
0402
0402
R982
R982
X_10K
X_10K
R370
R370
R371
R371
H_VIDSCK
H_VIDSOUT
0402
0402
CPU_DRA M_PWR_OK
0R
0R
0402
0402
H_PW RGD
PLTRST_ CPU_N
H_PROCH OT_CPU_N
56R
56R
0402
0402
H_THERM TRIP_N
0R
0R
0402
0402
TPEV_PC UDEBUG0
TPEV_PC UDEBUG1
TPEV_PC UDEBUG2
TPEV_PC UDEBUG3
TPEV_PC UDEBUG4
TPEV_PC UDEBUG5
TPEV_PC UDEBUG6
TPEV_PC UDEBUG7
TPEV_PC UDEBUG8
TPEV_PC UDEBUG9
TPEV_PC UDEBUG10
TPEV_PC UDEBUG11
TPEV_PC UDEBUG12
TPEV_PC UDEBUG13
TPEV_PC UDEBUG14
TPEV_PC UDEBUG15
HSW_ PCUSTB_0_DP
HSW_ PCUSTB_0_DN
HSW_ PCUSTB_1_DP
HSW_ PCUSTB_1_DN
XDP_DBR ESET_N
TESTLOW _2
TP_PROC ESSOR_K8
TP_PROC ESSOR_J10
R981
R981
X_10K
X_10K
0402
0402
0402
0402
0402
0402
Q236_2
0402
0402
R953
R953
X_10K
X_10K
5
0R
0R
0402
0402
0R
0R
0402
0402
DIMM_CA_V REF_A 10
DIMM_CA_V REF_B 11
6
7
8
CPU MISC
J3E
J3E
V4
BCLKN
V5
BCLKP
C38
VIDSCLK
C37
VIDSOUT
B37
VIDALERT-
AK21
SM_DRAMPWROK
AB35
PWRGOOD
M39
RESET-
P36
PM_SYNC
N37
PECI
M36
CATERR-
K38
PROCHOT-
F37
THERMTRIP-
D38
SKTOCC-
AB38
SM_VREF
AA37
CFG0
Y38
CFG1
AA36
CFG2
W38
CFG3
V39
CFG4
U39
CFG5
U40
CFG6
V38
CFG7
T40
CFG8
Y35
CFG9
AA34
CFG10
V37
CFG11
Y34
CFG12
U38
CFG13
W34
CFG14
V35
CFG15
Y36
CFG17
Y37
CFG16
V36
CFG19
W36
CFG18
D39
TCK
F38
TDI
F39
TDO
E39
TMS
E37
TRST-
L39
PRDY-
L37
PREQ-
G40
DBR-
N5
TESTLO
K8
RSVD_K8
J10
RSVD_J10
HASW ELL
HASW ELL
VCC3
Q236_6
Q236A
Q236A
C
C
B
B
2
E
E
1 6
C510
C510
X_0.1UF_16V_Y5V
X_0.1UF_16V_Y5V
5
0402
0402
R952
R952
X_10K
X_10K
5of10
5of10
PWR_DEBUG
RSVD_TP_1
RSVD_TP_J8
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
RSVD_AB36
RSVD_TP_AW2
RSVD_TP_AV1
VCOMP_OUT
RSVD_AB33
VCC_SENSE
VSS_SENSE
DPLL_REF_CLKN
DPLL_REF_CLKP
CFG_RCOMP
VCC1.05V _PCH
R243
R243
150R_1%
150R_1%
C
C
B
B
5
E
E
4 3
Q236B
Q236B
X_MBT3904DW1T1G
X_MBT3904DW1T1G
X_MBT3904DW1T1G
X_MBT3904DW1T1G
6
BPM0ÂBPM1ÂBPM2ÂBPM3ÂBPM4ÂBPM5ÂBPM6ÂBPM7-
RSVD_T35
RSVD_M38
TESTLOW
RSVD_K9
RSVD_H15
RSVD_J9
RSVD_H14
VCC_1
RSVD_AV2
RSVD_J16
RSVD_H16
VSS_1
RSVD_V7
RSVD_AB6
RSVD_AC8
RSVD_U8
VSS_2
RSVD_Y8
RSVD_M10
RSVD_L10
RSVD_M11
RSVD_L12
RSVD_W8
RSVD_R33
RSVD_P33
VSS_3
VSS_4
VSS_5
VSS_6
RSVD_N35
0402
0402
PWR_ DEBUG
0402
0402
R301
R301
X_10K
X_10K
G39
J39
G38
H37
H38
J38
K39
K37
T35
M38
P6
K9
H15
J9
H14
M8
AV2
J16
H16
N40
N39
V7
AB6
K13
J8
R1
P1
R2
AB36
AW2
AV1
AC8
P4
U8
AB33
T8
Y8
M10
L10
M11
L12
W8
R33
P33
E40
N33
J11
M9
J7
F40
N35
W6
W5
H40
TPEV_CF G_RCOMP
CPU_BPM _0
CPU_BPM _1
TP_PROC ESSOR_G38
TP_PROC ESSOR_H37
TP_PROC ESSOR_H38
TP_PROC ESSOR_J38
TP_PROC ESSOR_K39
TP_PROC ESSOR_K37
TP_PROC ESSOR_T35
TP_PROC ESSOR_M38
TESTLOW _1
TP_PROC ESSOR_H15
TP_PROC ESSOR_J9
TP_PROC ESSOR_H14
TP_PROC ESSOR_AV2
TP_PROC ESSOR_J16
TP_PROC ESSOR_H16
PWR_ DEBUG
TP_PROC ESSOR_V7
TP_PROC ESSOR_AB6
TP_PROC ESSOR_K13
TP_PROC ESSOR_J8
DDR_RCO MP_0
DDR_RCO MP_1
DDR_RCO MP_2
TP_PROC ESSOR_AB36
TP_PROC ESSOR_AW2
TP_PROC ESSOR_AV1
TP_PROC ESSOR_AC8
TP_PROC ESSOR_U8
TP_PROC ESSOR_AB33
TP_PROC ESSOR_T8
TP_PROC ESSOR_Y8
TP_PROC ESSOR_M10
TP_PROC ESSOR_L10
TP_PROC ESSOR_M11
TP_PROC ESSOR_L12
TP_PROC ESSOR_W8
TP_PROC ESSOR_R33
TP_PROC ESSOR_P33
0402
0402
R94
R94
X_49R9_ 1%
X_49R9_ 1%
TP_PROC ESSOR_N35
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
Mississippi_uATX
HASW ELL SOCKET
HASW ELL SOCKET
HASW ELL SOCKET
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
CPU_BPM _0 3
CPU_BPM _1 3
T64T64
T63T63
T66T66
T65T65
T67T67
T68T68
T31T31
R303
R303
T32T32
49R9_1%
49R9_1%
0402
0402
VCCST 7
T55T55
VCORE
T57T57
T58T58
T59T59
T61T61
T62T62
PWR_ DEBUG 3
T52T52
T49T49
T54T54
T53T53
T42T42
T43T43
T44T44
T45T45
V_VCCIOA_ LOAD 5
T47T47
T48T48
T46T46
T34T34
T35T35
T36T36
T37T37
T38T38
T39T39
T40T40
T41T41
VCC_SEN SE 46
VSS_SEN SE 46
T56T56
CK_DPNS _DN 1 4
CK_DPNS _DP 14
0402
0402
R93
R93
49R9_1%
49R9_1%
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
Monday, December 0 3, 2012
Monday, December 0 3, 2012
Monday, December 0 3, 2012
7
0402
0402
0402
R291
R291
8
REV:
REV:
REV:
75R_1%
75R_1%
0402
100R_1%
100R_1%
R223
R223
V0.4
V0.4
V0.4
4 63
4 63
4 63
of
of
of
0402
0402
100R_1%
100R_1%
R292
R292
1
A A
2
3
4
5
6
7
8
CPU PEG / DMI / GEN
CPU FDI_LINK
J3C
J3C
DP11
DP12
DP13
DP21
PEG_RCO MP
E15
F15
D14
E14
E13
F13
D12
E12
E11
F11
F10
G10
E9
F9
F8
G8
D3
D4
E4
E5
F5
F6
G4
G5
H5
H6
J4
J5
K5
K6
L4
L5
U3
T3
U1
V1
W2
V2
Y3
W3
D1
C2
B3
A4
P3
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15
DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3
RSVD_TP_D1
RSVD_TP_C2
RSVD_TP_B3
RSVD_TP_A4
PEG_RCOMP
HASW ELL
HASW ELL
EXP_A_R X_0_DP 22
EXP_A_R X_0_DN 22
EXP_A_R X_1_DP 22
EXP_A_R X_1_DN 22
B B
C C
D D
V_VCCIOA_ LOAD 4,5
EXP_A_R X_2_DP 22
EXP_A_R X_2_DN 22
EXP_A_R X_3_DP 22
EXP_A_R X_3_DN 22
EXP_A_R X_4_DP 22
EXP_A_R X_4_DN 22
EXP_A_R X_5_DP 22
EXP_A_R X_5_DN 22
EXP_A_R X_6_DP 22
EXP_A_R X_6_DN 22
EXP_A_R X_7_DP 22
EXP_A_R X_7_DN 22
EXP_A_R X_8_DP 22
EXP_A_R X_8_DN 22
EXP_A_R X_9_DP 22
EXP_A_R X_9_DN 22
EXP_A_R X_10_DP 22
EXP_A_R X_10_DN 22
EXP_A_R X_11_DP 22
EXP_A_R X_11_DN 22
EXP_A_R X_12_DP 22
EXP_A_R X_12_DN 22
EXP_A_R X_13_DP 22
EXP_A_R X_13_DN 22
EXP_A_R X_14_DP 22
EXP_A_R X_14_DN 22
EXP_A_R X_15_DP 22
EXP_A_R X_15_DN 22
DMI_IT_MR_0_ DP 13
DMI_IT_MR_0_ DN 13
DMI_IT_MR_1_ DP 13
DMI_IT_MR_1_ DN 13
DMI_IT_MR_2_ DP 13
DMI_IT_MR_2_ DN 13
DMI_IT_MR_3_ DP 13
DMI_IT_MR_3_ DN 13
DP11 DP11
DP12 DP12
DP13 DP13
DP21 DP21
R1281 24R9_1 %
R1281 24R9_1 %
0402
0402
3of10
3of10
PEG DMI
PEG DMI
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
A12
B12
B11
C11
C10
D10
B9
C9
C8
D8
B7
C7
A6
B6
B5
C5
E1
E2
F2
F3
G1
G2
H2
H3
J1
J2
K2
K3
M2
M3
L1
L2
AA4
AA5
AB3
AB4
AC5
AC4
AC1
AC2
EXP_A_T X_0_DP 22
EXP_A_T X_0_DN 22
EXP_A_T X_1_DP 22
EXP_A_T X_1_DN 22
EXP_A_T X_2_DP 22
EXP_A_T X_2_DN 22
EXP_A_T X_3_DP 22
EXP_A_T X_3_DN 22
EXP_A_T X_4_DP 22
EXP_A_T X_4_DN 22
EXP_A_T X_5_DP 22
EXP_A_T X_5_DN 22
EXP_A_T X_6_DP 22
EXP_A_T X_6_DN 22
EXP_A_T X_7_DP 22
EXP_A_T X_7_DN 22
EXP_A_T X_8_DP 22
EXP_A_T X_8_DN 22
EXP_A_T X_9_DP 22
EXP_A_T X_9_DN 22
EXP_A_T X_10_DP 22
EXP_A_T X_10_DN 22
EXP_A_T X_11_DP 22
EXP_A_T X_11_DN 22
EXP_A_T X_12_DP 22
EXP_A_T X_12_DN 22
EXP_A_T X_13_DP 22
EXP_A_T X_13_DN 22
EXP_A_T X_14_DP 22
EXP_A_T X_14_DN 22
EXP_A_T X_15_DP 22
EXP_A_T X_15_DN 22
DMI_MT_IR_0_ DP 13
DMI_MT_IR_0_ DN 13
DMI_MT_IR_1_ DP 13
DMI_MT_IR_1_ DN 13
DMI_MT_IR_2_ DP 13
DMI_MT_IR_2_ DN 13
DMI_MT_IR_3_ DP 13
DMI_MT_IR_3_ DN 13
FDI_CSYNC 13
FDI_INT 13
0402
0402
DP_RCOM P
DP32
DP30
DP31
R1282 24R9_1 %
V_VCCIOA_ LOAD 4,5
R1282 24R9_1 %
CK_DP_1 35M_DN 14
CK_DP_1 35M_DP 14
FDI_TX_0_ DN 13
FDI_TX_0_ DP 13
FDI_TX_1_ DN 13
FDI_TX_1_ DP 13
DP32 DP32
DP30 DP30
DP31 DP31
J3D
J3D
D16
FDI_CSYNC
D18
DISP_INT
R4
DP_RCOMP
U5
SSC_DPLL_REF_CLKN
U6
SSC_DPLL_REF_CLKP
E16
EDP_DISP_UTIL
K11
RSVD_TP_K11
J12
RSVD_TP_J12
B14
FDI_TX0N0
A14
FDI_TX0P0
C13
FDI_TX0N1
B13
FDI_TX0P1
HASW ELL
HASW ELL
4of10
4of10
DDIB_TXP0
DDIB_TXN0
DDIB_TXP1
DDIB_TXN1
DDIB_TXP2
DDIB_TXN2
DDIB_TXP3
DDIB_TXN3
DDIC_TXP0
DDIC_TXN0
DDIC_TXP1
DDIC_TXN1
DDIC_TXP2
DDIC_TXN2
DDIC_TXP3
DDIC_TXN3
DDID_TXP0
DDID_TXN0
DDID_TXP1
DDID_TXN1
DDID_TXP2
DDID_TXN2
DDID_TXP3
DDID_TXN3
E17
F17
F18
G18
G19
H19
F20
G20
D19
E19
C20
D20
D21
E21
C22
D22
B15
C15
A16
B16
B17
C17
A18
B18
DP PORT
HDMI PORT
DDPB_TX _0_DP 26
DDPB_TX _0_DN 26
DDPB_TX _1_DP 26
DDPB_TX _1_DN 26
DDPB_TX _2_DP 26
DDPB_TX _2_DN 26
DDPB_TX _3_DP 26
DDPB_TX _3_DN 26
DDPC_TX _0_DP 25
DDPC_TX _0_DN 25
DDPC_TX _1_DP 25
DDPC_TX _1_DN 25
DDPC_TX _2_DP 25
DDPC_TX _2_DN 25
DDPC_TX _3_DP 25
DDPC_TX _3_DN 25
DDPD_TX _0_DP 24
DDPD_TX _0_DN 24
DDPD_TX _1_DP 24
DDPD_TX _1_DN 24
DDPD_TX _2_DP 24
DDPD_TX _2_DN 24
DDPD_TX _3_DP 24
DDPD_TX _3_DN 24
E E
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
F F
1
2
3
4
5
6
Mississippi_uATX
HASW ELL SOCKET
HASW ELL SOCKET
HASW ELL SOCKET
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
7
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
5 63
5 63
5 63
of
of
of
1
M_MAA_A [0..15] 10
A A
M_ODT_A [0..3] 10
M_DATA_ A_CB[0..7] 10
B B
M_SBS_A [0..2] 10
M_SCKE_ A[0..3] 10
M_SCS_A _N[0..3] 10
C C
CLK_M_D DR0_A_DP 10
CLK_M_D DR0_A_DN 10
CLK_M_D DR1_A_DP 10
CLK_M_D DR1_A_DN 10
CLK_M_D DR2_A_DP 10
CLK_M_D DR2_A_DN 10
CLK_M_D DR3_A_DP 10
CLK_M_D DR3_A_DN 10
D D
M_RAS_A _N 10
M_WE _A_N 10
M_CAS_A _N 10
DDR3_DR AMRST_N 10,11
E E
C19
C19
X_10PF_ 50V_NPO
X_10PF_ 50V_NPO
M_MAA_A 0
M_MAA_A 1
M_MAA_A 2
M_MAA_A 3
M_MAA_A 4
M_MAA_A 5
M_MAA_A 6
M_MAA_A 7
M_MAA_A 8
M_MAA_A 9
M_MAA_A 10
M_MAA_A 11
M_MAA_A 12
M_MAA_A 13
M_MAA_A 14
M_MAA_A 15
M_ODT_A 0
M_ODT_A 1
M_ODT_A 2
M_ODT_A 3
M_DATA_ A_CB0
M_DATA_ A_CB1
M_DATA_ A_CB2
M_DATA_ A_CB3
M_DATA_ A_CB4
M_DATA_ A_CB5
M_DATA_ A_CB6
M_DATA_ A_CB7
M_SBS_A 0
M_SBS_A 1
M_SBS_A 2
M_SCKE_ A0
M_SCKE_ A1
M_SCKE_ A2
M_SCKE_ A3
M_SCS_A _N0
M_SCS_A _N1
M_SCS_A _N2
M_SCS_A _N3
DP42 DP42
DP40 DP40
DP41 DP41
R77
R77
DP42
DP40
DP41
0R
0R
0402
0402
DDR3_DR AMRST_R_N
AU13
AV16
AU16
AW17
AU17
AW18
AV17
AT18
AU18
AT19
AW11
AV19
AU19
AY10
AT20
AU21
AW10
AY8
AW9
AU8
AW33
AV33
AU31
AV31
AT33
AU33
AT31
AW31
AV12
AY11
AT21
AV22
AT23
AU22
AU23
AU14
AV9
AU10
AW8
AY15
AY16
AW15
AV15
AV14
AW14
AW13
AY13
AW12
AU12
AU11
AV20
AW27
AU9
AK22
2
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
SA_ODT0
SA_ODT1
SA_ODT2
SA_ODT3
SA_ECC_CB0
SA_ECC_CB1
SA_ECC_CB2
SA_ECC_CB3
SA_ECC_CB4
SA_ECC_CB5
SA_ECC_CB6
SA_ECC_CB7
SA_BS0
SA_BS1
SA_BS2
SA_CKE0
SA_CKE1
SA_CKE2
SA_CKE3
SA_CS0ÂSA_CS1ÂSA_CS2ÂSA_CS3-
SA_CK0
SA_CKN0
SA_CK1
SA_CKN1
SA_CK2
SA_CKN2
SA_CK3
SA_CKN3
RSVD_AW12
SA_RAS-
SA_WE-
RSVD_AV20
RSVD_AW27
SA_CAS-
SM_DRAMRST-
1of10
1of10
DDR_A
DDR_A
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS8
SA_DQSN0
SA_DQSN1
SA_DQSN2
SA_DQSN3
SA_DQSN4
SA_DQSN5
SA_DQSN6
SA_DQSN7
SA_DQSN8
HASW ELL
HASW ELL
AD38
AD39
AF38
AF39
AD37
AD40
AF37
AF40
AH40
AH39
AK38
AK39
AH37
AH38
AK37
AK40
AM40
AM39
AP38
AP39
AM37
AM38
AP37
AP40
AV37
AW37
AU35
AV35
AT37
AU37
AT35
AW35
AY6
AU6
AV4
AU4
AW6
AV6
AW4
AY4
AR1
AR4
AN3
AN4
AR2
AR3
AN2
AN1
AL1
AL4
AJ3
AJ4
AL2
AL3
AJ2
AJ1
AG1
AG4
AE3
AE4
AG2
AG3
AE2
AE1
AE39
AJ39
AN39
AV36
AV5
AP3
AK3
AF3
AV32
AE38
AJ38
AN38
AU36
AW5
AP2
AK2
AF2
AU32
3
M_D_A0
M_D_A1
M_D_A2
M_D_A3
M_D_A4
M_D_A5
M_D_A6
M_D_A7
M_D_A9
M_D_A13
M_D_A10
M_D_A11
M_D_A12
M_D_A8
M_D_A14
M_D_A15
M_D_A17
M_D_A21
M_D_A18
M_D_A19
M_D_A20
M_D_A16
M_D_A22
M_D_A23
M_D_A25
M_D_A29
M_D_A26
M_D_A27
M_D_A28
M_D_A24
M_D_A30
M_D_A31
M_D_A33
M_D_A37
M_D_A34
M_D_A35
M_D_A36
M_D_A32
M_D_A38
M_D_A39
M_D_A41
M_D_A45
M_D_A42
M_D_A43
M_D_A44
M_D_A40
M_D_A46
M_D_A47
M_D_A49
M_D_A53
M_D_A50
M_D_A51
M_D_A52
M_D_A48
M_D_A54
M_D_A55
M_D_A57
M_D_A61
M_D_A58
M_D_A59
M_D_A60
M_D_A56
M_D_A62
M_D_A63
M_DQS_A _DP0
M_DQS_A _DP1
M_DQS_A _DP2
M_DQS_A _DP3
M_DQS_A _DP4
M_DQS_A _DP5
M_DQS_A _DP6
M_DQS_A _DP7
M_DQS_A _DP8
M_DQS_A _DN0
M_DQS_A _DN1
M_DQS_A _DN2
M_DQS_A _DN3
M_DQS_A _DN4
M_DQS_A _DN5
M_DQS_A _DN6
M_DQS_A _DN7
M_DQS_A _DN8
J3A
J3A
4
M_D_A[0..6 3] 10
DQ REMAPPING IM PLEMENTED
TO IMPROVE BREA KOUT AND
MINIMIZE CH-2-C H COUPLING
M_DQS_A _DP[0..8] 10
M_DQS_A _DN[0..8] 10
M_DQS_B _DP[0..8] 11
M_DQS_B _DN[0..8] 11
5
6
7
8
CPU MEMORY
M_D_B[0..6 3] 11
M_D_B0
M_D_B1
M_D_B2
M_D_B3
M_D_B4
M_D_B5
M_D_B6
M_D_B7
M_D_B8
M_D_B9
M_D_B10
M_D_B11
M_D_B12
M_D_B13
M_D_B14
M_D_B15
M_D_B17
M_D_B21
M_D_B19
M_D_B23
M_D_B20
M_D_B16
M_D_B18
M_D_B22
M_D_B25
M_D_B28
M_D_B27
M_D_B30
M_D_B24
M_D_B29
M_D_B26
M_D_B31
M_D_B32
M_D_B33
M_D_B34
M_D_B35
M_D_B36
M_D_B37
M_D_B38
M_D_B39
M_D_B45
M_D_B41
M_D_B47
M_D_B43
M_D_B44
M_D_B40
M_D_B46
M_D_B42
M_D_B52
M_D_B53
M_D_B50
M_D_B55
M_D_B48
M_D_B49
M_D_B54
M_D_B51
M_D_B61
M_D_B60
M_D_B59
M_D_B63
M_D_B56
M_D_B57
M_D_B58
M_D_B62
M_DQS_B _DP0
M_DQS_B _DP1
M_DQS_B _DP2
M_DQS_B _DP3
M_DQS_B _DP4
M_DQS_B _DP5
M_DQS_B _DP6
M_DQS_B _DP7
M_DQS_B _DP8
M_DQS_B _DN0
M_DQS_B _DN1
M_DQS_B _DN2
M_DQS_B _DN3
M_DQS_B _DN4
M_DQS_B _DN5
M_DQS_B _DN6
M_DQS_B _DN7
M_DQS_B _DN8
AE34
AE35
AG35
AH35
AD34
AD35
AG34
AH34
AL34
AL35
AK31
AL31
AK34
AK35
AK32
AL32
AN34
AP34
AN31
AP31
AN35
AP35
AN32
AP32
AM29
AM28
AR29
AR28
AL29
AL28
AP29
AP28
AR12
AP12
AL13
AL12
AR13
AP13
AM13
AM12
AR9
AP9
AR6
AP6
AR10
AP10
AR7
AP7
AM9
AM10
AL10
AM6
AM7
AH6
AH7
AE6
AE7
AF6
AF7
AF35
AL33
AP33
AN28
AN12
AP8
AG7
AN25
AF34
AK33
AN33
AN29
AN13
AR8
AM8
AG6
AN26
AL9
AL6
AL7
AJ6
AJ7
AL8
J3B
J3B
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_DQSP0
SB_DQSP1
SB_DQSP2
SB_DQSP3
SB_DQSP4
SB_DQSP5
SB_DQSP6
SB_DQSP7
SB_DQSP8
SB_DQSN0
SB_DQSN1
SB_DQSN2
SB_DQSN3
SB_DQSN4
SB_DQSN5
SB_DQSN6
SB_DQSN7
SB_DQSN8
HASW ELL
HASW ELL
2of10
2of10
DDR_B
DDR_B
SB_ECC_CB0
SB_ECC_CB1
SB_ECC_CB2
SB_ECC_CB3
SB_ECC_CB4
SB_ECC_CB5
SB_ECC_CB6
SB_ECC_CB7
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
SB_ODT0
SB_ODT1
SB_ODT2
SB_ODT3
SB_BS0
SB_BS1
SB_BS2
SB_CKE0
SB_CKE1
SB_CKE2
SB_CKE3
SB_CS0ÂSB_CS1ÂSB_CS2ÂSB_CS3-
SB_CK0
SB_CKN0
SB_CK1
SB_CKN1
SB_CK2
SB_CKN2
SB_CK3
SB_CKN3
SB_CAS-
RSVD_AL20
SB_RAS-
SB_WE-
AL19
AK23
AM22
AM23
AP23
AL23
AY24
AV25
AU26
AW25
AP18
AY25
AV26
AR15
AV27
AY28
AM17
AL16
AM16
AK15
AM26
AM25
AP25
AP26
AL26
AL25
AR26
AR25
AK17
AL18
AW28
AW29
AY29
AU28
AU29
AP17
AN15
AN17
AL15
AM20
AM21
AP22
AP21
AN20
AN21
AP19
AP20
AP16
AL20
AM18
AK16
AB39
AB40
M_MAA_B 0
M_MAA_B 1
M_MAA_B 2
M_MAA_B 3
M_MAA_B 4
M_MAA_B 5
M_MAA_B 6
M_MAA_B 7
M_MAA_B 8
M_MAA_B 9
M_MAA_B 10
M_MAA_B 11
M_MAA_B 12
M_MAA_B 13
M_MAA_B 14
M_MAA_B 15
M_ODT_B 0
M_ODT_B 1
M_ODT_B 2
M_ODT_B 3
M_DATA_ B_CB0
M_DATA_ B_CB1
M_DATA_ B_CB2
M_DATA_ B_CB3
M_DATA_ B_CB4
M_DATA_ B_CB5
M_DATA_ B_CB6
M_DATA_ B_CB7
M_SBS_B 0
M_SBS_B 1
M_SBS_B 2
M_SCKE_ B0
M_SCKE_ B1
M_SCKE_ B2
M_SCKE_ B3
M_SCS_B _N0
M_SCS_B _N1
M_SCS_B _N2
M_SCS_B _N3
DP33
DP33 DP33
M_MAA_B [0..15] 11
M_ODT_B [0..3] 11
M_DATA_ B_CB[0..7] 11
M_SBS_B [0..2] 11
M_SCKE_ B[0..3] 11
M_SCS_B _N[0..3] 11
CLK_M_D DR0_B_DP 11
CLK_M_D DR0_B_DN 11
CLK_M_D DR1_B_DP 11
CLK_M_D DR1_B_DN 11
CLK_M_D DR2_B_DP 11
CLK_M_D DR2_B_DN 11
CLK_M_D DR3_B_DP 11
CLK_M_D DR3_B_DN 11
M_CAS_B _N 11
M_RAS_B _N 11
M_WE _B_N 11
DIMM_DQ_C PU_VREF_A 10
DIMM_DQ_C PU_VREF_B 11
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
F F
1
2
3
4
5
6
Mississippi_uATX
HASW ELL SOCKET
HASW ELL SOCKET
HASW ELL SOCKET
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
7
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
6 63
6 63
6 63
of
of
of
1
A A
B B
C C
D D
E E
V_CPU_V CCIO_RIGHT 3,4,46
V_CPU_V CCIO2PCH 19,21
2
VCC1.05V _PCH
R728 X_0R
R728 X_0R
VCCST 4
0402
0402
C21
C21
C223
C223
0.1UF_16V_X7R
0.1UF_16V_X7R
VCC1.05V _PCH
CB279
CB279
R710 0R
R710 0R
0805
0805
4.7UF_6.3V_X5R
4.7UF_6.3V_X5R
0402
0402
3
X7R
X7R
0402
0402
R727 X_0R
R727 X_0R
R13420RR1342
0R
VCORE
R703
R703
0R
0R
VCCIO_OUT
0402
0402
VCORE
VCCIO2PCH
4
CPU POWER
J3F
J3F
6of10
VCC_2
VCCIO_OUT
VCCIO2PCH
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
HASW ELL
HASW ELL
6of10
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
VCC_111
VCC_112
VCC_113
VCC_114
VCC_115
VCC_116
VCC_117
VCC_118
VCC_119
VCC_120
VCC_121
VCC_122
VCC_123
VCC_124
VCC_125
VCC_126
VCC_127
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
L40
AB8
L31
L18
L17
A24
A25
A26
A27
A28
A29
A30
G33
B25
B27
B29
B31
B33
G31
B35
C24
C25
C26
C27
C28
C29
C30
C32
C34
C35
D25
D27
D29
D31
E33
D33
E31
D35
E24
E25
E26
E27
E28
E29
E30
E32
E34
F23
F25
F27
F29
F31
E35
F33
F35
G22
G23
G24
G25
G26
G27
G28
G29
G30
G32
G34
G35
H23
H25
H27
H29
H31
L34
P8
J33
J31
C31
C33
L16
L15
J35
H33
H35
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30
J32
J34
K19
K21
K23
K25
K27
K29
K31
M13
K33
K35
L19
L20
L21
L22
L23
L24
L25
L26
L27
L28
L29
L30
L32
L33
M17
M15
M19
M21
M23
M25
M27
M29
M33
AJ12
AJ13
AJ15
AJ17
AJ20
AJ21
AJ24
AJ25
AJ28
AJ29
AJ9
AT17
AT22
AU15
AU20
AU24
AV10
AV11
AV13
AV18
AV23
AV8
AW16
AY12
AY14
AY9
5
VCORE
NOTE:
VCCIO_OUT(Typ. 1V):Processor p ower reference for I/O
VCCIO2PCH:Proce ssor power refe rence to PCH
VCC1.5V_ DDR3
6
7
8
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
F F
1
2
3
4
5
6
Mississippi_uATX
HASW ELL SOCKET
HASW ELL SOCKET
HASW ELL SOCKET
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
7
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
7 63
7 63
7 63
of
of
of
1
2
3
4
5
6
7
8
CPU GND
J3G
A13
A15
A17
A23
A11
AA3
AA33
AA35
AA38
AA6
AA7
AA8
AB34
AB37
AB5
AB7
AC3
AC33
AC34
AC35
AC36
AC37
AC38
AC39
AC40
AC6
AC7
AD1
AD2
AD3
AD33
AD36
AD4
AD5
AD6
AD7
AD8
AE33
AE36
AE37
AE40
AE5
AE8
AF1
AF33
AF36
AF4
AF5
AF8
AG33
AG36
AG37
AG38
AG39
AG40
AG5
AG8
AH1
AH2
AH3
AH33
AH36
AH4
AH5
AH8
AJ11
AJ14
AJ16
AJ18
AJ19
AJ22
AJ23
AJ26
AJ27
AJ30
AJ31
AJ32
AJ33
A5
A7
J3G
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
HASW ELL
HASW ELL
7of10
7of10
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
AJ34
AJ35
AJ36
AJ37
AJ40
AJ5
AJ8
AK1
AK10
AK11
AK12
AK13
AK14
AK18
AK19
AK24
AK25
AK26
AK27
AK28
AK29
AK30
AK36
AK4
AK5
AK6
AK7
AK8
AK9
AL11
AL14
AL17
AL21
AL22
AL24
AL27
AL30
AL36
AL37
AL38
AL39
AL40
AL5
AM1
AM11
AM14
AM15
AM19
AM2
AM24
AM27
AM3
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AM4
AM5
AN10
AN11
AN14
AN16
AN18
AN19
AN22
AN23
AN24
AN27
AN30
AN36
AN37
AN40
AN5
AN6
AN7
AN8
AN9
AP1
J3J
J3J
10of10
10of10
RSVD_TP_K12
AY18
DP3
DP3DP3
DP4
DP4DP4
DP5
DP5DP5
DP6
DP6DP6
DP7
DP7DP7
DP8
DP8DP8
DP9
DP9DP9
DP10
DP10 DP10
R1344
R1344
6K04_1%
PWRG D_3V 15,16,39,4 5
6K04_1%
0402
0402
VCCST_P WRGD
0402
0402
R1343
R1343
2K67_1%
2K67_1%
DP14 DP14
DP15 DP15
DP17 DP17
DP18 DP18
DP19 DP19
DP20 DP20
DP26 DP26
DP27 DP27
DP14
DP15
DP17
DP18
DP19
DP20
DP26
DP27
AW24
AW23
AV29
AV24
AU39
AU27
AU1
AT40
AK20
T34
R34
H12
Y7
J40
J17
J15
RSVD_AY18
RSVD_AW24
RSVD_AW23
RSVD_AV29
RSVD_AV24
RSVD_AU39
RSVD_AU27
RSVD_AU1
RSVD_AT40
RSVD_AK20
RSVD_Y7
RSVD_T34
RSVD_R34
RSVD_J40
RSVD_J17
RSVD_J15
RSVD_H12
RSVD_TP_J13
RSVD_TP_P37
RSVD_TP_N38
RSVD_TP_R36
RSVD_TP_C39
RSVD_TP_N36
HASW ELL
HASW ELL
VSS_467
VSS_468
VSS_469
VSS_470
VSS_471
VSS_472
VSS_473
VSS_474
VSS_475
VSS_476
VSS_477
VSS_478
K12
J13
P37
N38
R36
C39
U35
P40
R38
T37
V34
R39
T38
U36
P39
T36
R37
J14
N36
DP36
DP56
DP34
DP35
DP37
DP38
DP39
DP36 DP36
DP56 DP56
DP34 DP34
DP35 DP35
DP37 DP37
DP38 DP38
DP39 DP39
J3I
J3H
J3H
8of10
A A
B B
C C
D D
E E
AP11
AP14
AP15
AP24
AP27
AP30
AP36
AP4
AP5
AR11
AR14
AR16
AR17
AR18
AR19
AR20
AR21
AR22
AR23
AR24
AR27
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AR37
AR38
AR39
AR40
AR5
AT1
AT10
AT11
AT12
AT13
AT14
AT15
AT16
AT2
AT24
AT25
AT26
AT27
AT28
AT29
AT3
AT30
AT32
AT34
AT36
AT38
AT39
AT4
AT5
AT6
AT7
AT8
AT9
AU2
AU25
AU3
AU30
AU34
AU38
AU5
AU7
AV21
AV28
AV3
AV30
AV34
AV38
AV7
AW26
AW3
AW30
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
HASW ELL
HASW ELL
8of10
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
AW32
AW34
AW36
AW7
AY17
AY23
AY26
AY27
AY30
AY5
AY7
B24
B26
B28
B30
B34
B36
B4
B8
C4
C6
C12
C14
C16
C18
C19
C21
C23
C36
B10
B23
C3
D9
D11
D13
D15
D17
D2
D23
D24
D26
D28
D30
D34
D36
D37
D5
D6
D7
E7
E8
E10
E18
E3
E20
E22
E23
E36
E38
B32
E6
F1
F32
F12
F14
F16
F19
F21
F22
F24
F26
F28
F30
F34
F36
F4
D32
F7
G9
G11
G12
G13
G14
G16
H11
G17
G21
H13
H22
H32
G36
G37
G15
H10
H17
H18
H20
H21
H24
H26
H28
H30
H34
H36
H39
K10
K14
K18
K20
K22
K24
K26
K28
K30
K34
K36
K40
K17
M12
M14
M18
M16
M20
M22
M24
M26
M28
M30
M32
M34
M37
J19
J20
J18
J36
J37
L11
L13
L14
L35
L38
G3
G6
G7
H1
H4
H7
H8
H9
J3
J6
K1
K4
K7
L7
L8
L9
L3
L6
M1
J3I
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
VSS_361
VSS_362
VSS_363
VSS_364
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369
VSS_370
VSS_371
VSS_372
VSS_373
VSS_374
VSS_375
VSS_376
VSS_377
VSS_378
VSS_379
VSS_380
VSS_381
VSS_382
VSS_383
VSS_384
VSS_385
VSS_386
VSS_387
VSS_388
VSS_389
VSS_390
VSS_391
VSS_392
VSS_393
VSS_394
VSS_395
VSS_396
VSS_397
VSS_398
VSS_399
VSS_400
VSS_401
VSS_402
VSS_403
VSS_404
VSS_405
VSS_406
HASW ELL
HASW ELL
9of10
9of10
VSS_407
VSS_408
VSS_409
VSS_410
VSS_411
VSS_412
VSS_413
VSS_414
VSS_415
VSS_416
VSS_417
VSS_418
VSS_419
VSS_420
VSS_421
VSS_422
VSS_423
VSS_424
VSS_425
VSS_426
VSS_427
VSS_428
VSS_429
VSS_430
VSS_431
VSS_432
VSS_433
VSS_434
VSS_435
VSS_436
VSS_437
VSS_438
VSS_439
VSS_440
VSS_441
VSS_442
VSS_443
VSS_444
VSS_445
VSS_446
VSS_447
VSS_448
VSS_449
VSS_450
VSS_451
VSS_452
VSS_453
VSS_454
VSS_455
VSS_456
VSS_457
VSS_458
VSS_459
VSS_460
VSS_461
VSS_462
VSS_463
VSS_464
VSS_465
VSS_466
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
M4
M40
M5
M6
M7
K15
K16
N1
N2
N3
N7
N34
N4
N6
K32
P2
P34
P38
P5
P7
N8
R3
L36
R35
R40
R5
R6
R7
T1
T2
T33
M35
T39
T4
T5
T6
T7
R8
U2
U33
U34
U37
U4
U7
P35
V3
V33
V40
V6
V8
W1
W33
W35
W37
W4
W7
Y33
Y4
Y5
Y6
AU40
AV39
AW38
AY3
B38
B39
C40
D40
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
F F
1
2
3
4
5
6
Mississippi_uATX
HASW ELL SOCKET
HASW ELL SOCKET
HASW ELL SOCKET
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
7
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
8 63
8 63
8 63
of
of
of
1
A A
2
3
4
5
6
7
8
CPU DECOUPLING
B B
VCORE
C47
C47
0805
0805
0805
0805
0805
0805
0805
0805
0805
0805
C49
C49
C48
C48
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
0805
C50
C50
C51
C51
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
0805
0805
0805
0805
0805
0805
0805
0805
0805
0805
0805
0805
C53
C53
C54
C54
C55
C55
C56
C52
C52
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
C56
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
0805
0805
0805
C62
C57
C57
C58
C58
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
C62
C60
C60
22UF_6.3V_X5R
22UF_6.3V_X5R
0805
0805
0805
0805
C232
C232
C414
C414
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
0805
0805
0805
0805
0805
22UF_6.3V_X5R
22UF_6.3V_X5R
0805
C419
C419
C420
C420
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
Inside processor socket cavity
C C
VCC1.5V_ DDR3
0805
0805
C45
C45
0805
0805
0805
0805
0805
0805
C46
C46
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
0805
0805
0805
0805
0805
C61
C61
C63
C63
C64
C64
C87
22UF_6.3V_X5R
22UF_6.3V_X5R
C87
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
0805
0805
0805
0805
C88
C88
22UF_6.3V_X5R
22UF_6.3V_X5R
0805
C174
C174
C179
C179
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
Place to CPU cavity
VCORE
0805
0805
0805
0805
0805
0805
0805
C415
C415
C417
C416
C416
22UF_6.3V_X5R
22UF_6.3V_X5R
North of processor - as close
to RM keep-out as possible
D D
E E
C417
22UF_6.3V_X5R
22UF_6.3V_X5R
0805
C418
C418
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
F F
1
2
3
4
5
6
Mississippi_uATX
SANDYBRIDGE S OCKET (Decouping)
SANDYBRIDGE S OCKET (Decouping)
SANDYBRIDGE S OCKET (Decouping)
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
Date: PAGE:
Date: PAGE:
Date: PAGE:
A3
A3
A3
7
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
9 63
9 63
9 63
of
of
of
1
M_ODT_A [0..3]
M_DQS_A _DN[0..8] 10,6
M_DQS_A _DP[0..8] 10,6
M_DATA_ A_CB[0..7] 10,6
A A
M_ODT_A 0
M_ODT_A 1
M_DATA_A_CB0
M_DATA_A_CB1
68
53
167
195
79
J4
J4
NC-PAR_IN
NC-ERR_OUT
B B
GND1
GND2
239
235
CB039CB140CB245CB346CB4
ODT177ODT0
RSVD
NC_TEST4
GND3
GND4
GND5
GND6
GND7
GND8
232
229
226
223
220
217
214
SM BUS address : A0h
DDR3 CHANNEL A DIMM 0
M_ODT_A [0..3] 10,6
M_DATA_A_CB2
M_DATA_A_CB3
DDR3_24 0P_DIMM0_AT50_ PAD40_H28
GND9
GND10
211
208
M_DQS_A_DP0
M_DATA_A_CB4
M_DATA_A_CB5
M_DATA_A_CB6
M_DATA_A_CB7
158
159
164
165
7
CB5
CB6
CB7
DQS0
GND11
GND12
GND13
GND14
GND15
GND16
GND17
205
202
199
166
163
160
DIMM1
M_ODT_A [0..3]
M_DQS_A _DN[0..8] 10,6
C C
M_ODT_A 2
M_ODT_A 3
D D
M_DQS_A _DP[0..8] 10,6
M_DATA_ A_CB[0..7] 10,6
M_DATA_A_CB0
M_DATA_A_CB1
68
53
167
195
79
J5
J5
NC-PAR_IN
NC-ERR_OUT
CB039CB140CB245CB346CB4
ODT177ODT0
RSVD
NC_TEST4
M_ODT_A [0..3] 10,6
M_DATA_A_CB2
M_DATA_A_CB3
M_DATA_A_CB4
M_DATA_A_CB5
M_DATA_A_CB6
M_DATA_A_CB7
M_DQS_A_DP0
158
159
164
165
7
CB5
CB6
CB7
DQS0
DDR3_24 0P_DIMM1_AT50_ PAD40_H28
2
3
4
5
6
7
8
DDR3 MEMORY CHANNEL A
M_D_A[0..6 3] 10,6
M_D_A0
M_D_A1
M_D_A2
M_D_A3
M_D_A4
M_D_A5
M_D_A6
M_D_A7
M_D_A8
M_D_A9
M_D_A10
M_D_A11
M_D_A12
M_D_A13
M_D_A14
M_D_A15
M_D_A16
M_D_A17
M_D_A18
M_D_A19
M_D_A20
M_D_A21
M_D_A22
M_D_A23
M_D_A24
M_D_A25
M_D_A26
M_D_A27
M_D_A28
M_D_A29
M_D_A30
M_D_A31
M_D_A32
M_D_A33
M_D_A34
M_D_A35
M_D_A36
M_D_A37
M_D_A38
M_D_A39
M_D_A40
M_D_A41
M_D_A42
M_D_A43
M_D_A44
M_D_A45
M_D_A46
M_D_A47
M_D_A48
M_D_A49
M_D_A50
M_D_A51
M_D_A52
M_D_A53
M_D_A54
M_D_A55
M_D_A56
M_D_A57
M_D_A58
M_D_A59
M_D_A60
M_D_A61
M_D_A62
M_DQS_A_DP1
M_DQS_A_DN0
6
16
DQS0-
GND18
GND19
157
154
151
M_DQS_A_DP1
M_DQS_A_DN0
6
16
DQS0-
M_DQS_A_DP3
M_DQS_A_DP2
M_DQS_A_DN1
15
25
DQS1
DQS1-
GND20
GND21
GND22
148
145
142
M_DQS_A_DP2
M_DQS_A_DN1
15
25
DQS1
DQS1-
M_DQS_A_DP4
M_DQS_A_DP5
M_DQS_A_DP6
M_DQS_A_DN2
M_DQS_A_DN3
M_DQS_A_DN4
24
34
33
85
84
94
DQS2
DQS3
DQS4
DQS2-
DQS3-
DQS4-
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
SA2
139
136
133
130
127
124
121
119
116
M_DQS_A_DP3
M_DQS_A_DP4
M_DQS_A_DN2
24
34
DQS2
DQS2-
M_DQS_A_DP5
M_DQS_A_DN3
M_DQS_A_DN4
33
85
84
94
DQS3
DQS4
DQS3-
DQS4-
M_DQS_A_DN5
93
DQS5
DQS5-
GREENDDR3_24 0P_DIMM0_AT50_ PAD40_H28
GREEN
GND32
GND33
113
M_DQS_A_DN5
93
DQS5
DQS5-
BLUEDDR3_24 0P_DIMM1_AT50_ PAD40_H28
BLUE
M_DQS_A_DP7
M_DQS_A_DN6
M_DQS_A_DN7
M_DQS_A_DP8
M_DQS_A_DN8
103
102
112
111
43
42
125
126
134
135
143
144
DQS6
DQS7
DQS8
DQS6-
DQS7-
DQS8-
NC_DQS9-
DM0_DQS9
NC_DQS10-
DM1_DQS10
DM2_DQS11
GND34
GND35
GND36
GND37
GND3898GND3995GND4092GND4189GND4286GND4383GND4480GND4547GND4644GND4741GND4838GND4935GND5032GND5129GND5226GND5323GND5420GND5517GND5614GND5711GND588GND595GND602FREE1
110
107
104
101
M_DQS_A_DP6
M_DQS_A_DP7
M_DQS_A_DN6
M_DQS_A_DN7
M_DQS_A_DP8
M_DQS_A_DN8
103
102
112
111
43
42
125
126
134
135
143
144
DQS6
DQS7
DQS8
DQS6-
DQS7-
DQS8-
NC_DQS9-
DM0_DQS9
NC_DQS10-
DM1_DQS10
DM2_DQS11
152
153
203
204
212
213
221
222
230
231
161
162
NC_DQS11-
NC_DQS12-
NC_DQS13-
NC_DQS14-
NC_DQS15-
NC_DQS16-
DM3_DQS12
DM4_DQS13
DM5_DQS14
DM6_DQS15
FREE249FREE348NC
198
VTT_MEM
152
153
203
204
212
213
221
222
NC_DQS11-
NC_DQS12-
NC_DQS13-
NC_DQS14-
DM3_DQS12
DM4_DQS13
NC_DQS15-
DM5_DQS14
DM6_DQS15
NC_DQS17-
DM7_DQS16
DM8_DQS17
VTT1
VTT2
VDD1
187
240
120
197
230
231
161
162
NC_DQS16-
NC_DQS17-
DM7_DQS16
DM8_DQS17
DQ03DQ14DQ29DQ310DQ4
VDD2
VDD3
VDD4
VDD5
VDD6
194
191
189
186
183
VCC1.5V_ DDR3
M_D_A0
M_D_A1
M_D_A2
DQ03DQ14DQ29DQ310DQ4
122
123
128
129
13
DQ5
DQ6
DQ7
DQ812DQ9
VDD7
VDD8
VDD9
VDD10
VDD11
VDD1278VDD1375VDD1472VDD1569VDD1666VDD1765VDD1862VDD1960VDD2057VDD2154VDD2251VDDSPD
182
179
176
173
170
SMB_CLK 10,11 ,17,3,37
SMB_DAT A 10,11,17,3 ,37
M_D_A[0..6 3] 10,6
M_D_A3
M_D_A4
M_D_A5
M_D_A6
M_D_A7
M_D_A8
M_D_A9
M_D_A10
122
123
128
129
13
DQ5
DQ6
DQ7
DQ812DQ9
131
132
137
138
DQ1018DQ1119DQ12
DQ13
DQ14
VCC3
DIMM_CA_V REF_A
DIMM_DQ_V REF_A
M_D_A11
M_D_A12
M_D_A13
M_D_A14
M_D_A15
131
132
137
138
DQ1018DQ1119DQ12
DQ13
DQ14
DQ15
DQ1621DQ1722DQ1827DQ1928DQ20
M_D_A16
M_D_A17
DQ15
DQ1621DQ1722DQ1827DQ1928DQ20
140
141
146
147
149
150
155
156
200
201
206
207
209
210
215
216
100
105
106
218
219
224
225
108
DQ21
DQ22
DQ23
DQ2430DQ2531DQ2636DQ2737DQ28
DQ29
DQ30
DQ31
DQ3281DQ3382DQ3487DQ3588DQ36
DQ37
DQ38
DQ39
DQ4090DQ4191DQ4296DQ4397DQ44
DQ45
DQ46
DQ47
DQ4899DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
SCL
SDA
SA1
SA0
BA252BA071CKE1
CKE050S1-76S0-
CK1_NU-64CK1_NU63CK0-
CK0
A261A3
A459A558A6
A756A8
A10_AP70A1155A12
VREFCA67VREFDQ
1
118
236
M_D_A18
M_D_A19
M_D_A20
M_D_A21
M_D_A22
M_D_A23
140
141
146
147
DQ21
DQ22
DQ23
238
237
117
M_D_A24
M_D_A25
M_D_A26
DQ2430DQ2531DQ2636DQ2737DQ28
BA1
169
M_D_A30
155
M_SBS_A0
M_D_A31
156
DQ30
M_SCKE_A1
M_D_A32
M_D_A33
DQ31
DQ3281DQ3382DQ3487DQ3588DQ36
193
M_SCKE_A0
M_SCS_A_N0
M_SCS_A_N1
M_D_A34
M_D_A35
M_D_A36
M_D_A37
200
201
190
M_SBS_A2
M_SBS_A1
M_D_A27
M_D_A28
M_D_A29
149
150
DQ29
A0
185
184A1181
180
188
M_D_A38
M_D_A39
M_D_A40
M_D_A41
M_D_A42
M_D_A43
206
207
DQ37
DQ38
DQ39
DQ4090DQ4191DQ4296DQ4397DQ44
178
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A0
M_D_A44
209
M_MAA_A7
M_D_A45
M_D_A46
M_D_A47
M_D_A48
M_D_A49
M_D_A50
210
215
216
100
105
DQ45
DQ46
DQ47
DQ4899DQ49
DQ50
A13
177A9175
174
196
M_MAA_A8
M_MAA_A9
M_MAA_A10
M_MAA_A12
M_MAA_A11
M_MAA_A13
M_D_A51
M_D_A52
M_D_A53
M_D_A54
M_D_A55
M_D_A56
106
218
219
224
225
108
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
M_D_A63
109
114
115
227
228
233
234
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
A14
A15
RESET-
CAS-74RAS-
WE-
73
172
171
168
192
M_MAA_A14
M_MAA_A15
M_D_A57
M_D_A58
M_D_A59
M_D_A60
M_D_A61
109
114
115
227
228
DQ57
DQ58
DQ59
DQ60
M_WE _A_N 10,6
M_RAS_A _N 10 ,6
M_CAS_A _N 10 ,6
DDR3_DR AMRST_N 10,11 ,6
M_MAA_A [0..15] 10,6
CLK_M_D DR0_A_DP 6
CLK_M_D DR0_A_DN 6
CLK_M_D DR1_A_DP 6
CLK_M_D DR1_A_DN 6
M_SCS_A _N[0..3] 10,6
M_SCKE_ A[0..3] 10 ,6
M_SBS_A [0..2] 10,6
M_D_A62
M_D_A63
233
234
DQ61
DQ62
DQ63
SCL
SDA
SA1
SA0
BA252BA071CKE1
CKE050S1-76S0-
CK1_NU-64CK1_NU63CK0-
CK0
A261A3
A459A558A6
A756A8
A10_AP70A1155A12
A13
A14
A15
RESET-
CAS-74RAS-
WE-
174
196
M_MAA_A13
M_MAA_A12
Date: PAGE:
Date: PAGE:
Date: PAGE:
73
172
171
168
192
M_MAA_A14
M_MAA_A15
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
M_WE _A_N 10,6
M_RAS_A _N 10 ,6
M_CAS_A _N 10 ,6
DDR3_DR AMRST_N 10,11 ,6
M_MAA_A [0..15] 10,6
CLK_M_D DR2_A_DP 6
CLK_M_D DR2_A_DN 6
CLK_M_D DR3_A_DP 6
CLK_M_D DR3_A_DN 6
M_SCS_A _N[0..3] 10,6
M_SCKE_ A[0..3] 10 ,6
M_SBS_A [0..2] 10,6
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
10 63
10 63
10 63
of
of
of
185
184A1181
A0
188
M_MAA_A1
M_MAA_A0
180
178
M_MAA_A2
M_MAA_A6
M_MAA_A5
M_MAA_A4
M_MAA_A3
TITLE:
TITLE:
TITLE:
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
177A9175
M_MAA_A7
M_MAA_A11
M_MAA_A10
M_MAA_A9
M_MAA_A8
Mississippi_uATX
Mississippi_uATX
Mississippi_uATX
DDR3 UDIMM CHANNEL A
DDR3 UDIMM CHANNEL A
DDR3 UDIMM CHANNEL A
A3
A3
A3
7
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
SA2
GND32
GND33
GND34
GND35
GND36
GND37
GND3898GND3995GND4092GND4189GND4286GND4383GND4480GND4547GND4644GND4741GND4838GND4935GND5032GND5129GND5226GND5323GND5420GND5517GND5614GND5711GND588GND595GND602FREE1
239
235
232
229
226
223
220
217
214
211
208
205
202
199
166
163
160
157
154
151
148
145
142
139
136
133
130
127
124
121
119
116
113
110
107
104
101
SM BUS address : A2h
E E
CB10 CB10
F F
DDR3 CHANNEL A DIMM 1
VCC1.5V_ DDR3
R89
R89
1K_1%
1K_1% CB9CB9
DIMM_CA_V REF_A_R
R103 0R R10 3 0R
R99
R99
1K_1%
1K_1%
1
DIMM_CA_V REF_A
X7R
X7R
CB12
CB12
DIMM_DQ_C PU_VREF_A
DIMM_CA_V REF_A 1 0,4
2
C659
C659
0.022UF_ 16V_X7R
0.022UF_ 16V_X7R
DIMM_DQ_C PU_VREF_A_RC
0402
0402
R1290
R1290
24R9_1%
24R9_1%
3
VCC1.5V_ DDR3
FREE249FREE348NC
VTT1
VTT2
VDD1
VDD2
VDD3
VDD4
198
187
240
120
197
194
191
189
186
VTT_MEM VCC3
R88
R88
1K_1%
1K_1%
DIMM_DQ_V REF_A_R
X7R
X7R
CB25
R96
R96
1K_1%
1K_1%
CB25
VCC1.5V_ DDR3
DIMM_CA_V REF_A 10,4
DIMM_DQ_V REF_A
R125 0R R12 5 0R
4
VDD5
VDD6
VDD7
VDD8
183
182
179
176
SMB_CLK 10,11 ,17,3,37
SMB_DAT A 10,11,17,3 ,37
VDD9
VDD10
VDD11
VDD1278VDD1375VDD1472VDD1569VDD1666VDD1765VDD1862VDD1960VDD2057VDD2154VDD2251VDDSPD
173
170
DIMM_CA_V REF_A
DIMM_DQ_V REF_A
PLACE NEAR DIMM AREA
R126 2R_1%
R126 2R_1%
0402
0402
DIMM_DQ_V REF_A
X7R
X7R
CB11
CB11
5
VREFCA67VREFDQ
1
118
236
DIMM_DQ_C PU_VREF_A 6
X7R
X7R
CB24
CB24
C701
C701
X_100PF _50V_NPO
X_100PF _50V_NPO
BA1
238
237
117
CB13 CB13
169
190
M_SCKE_A3
M_SBS_A2
M_SBS_A1
M_SBS_A0
DDR3_DR AMRST_N 10,11 ,6
193
M_SCKE_A2
M_SCS_A_N3
M_SCS_A_N2
6
1
M_ODT_B [0..3]
M_DQS_B _DN[0..8] 11,6
M_DQS_B _DP[0..8] 11,6
M_DATA_ B_CB[0..7] 11,6
A A
M_ODT_B 0
M_ODT_B 1
M_DATA_B_CB0
M_DATA_B_CB1
68
53
167
195
79
J6
J6
NC-PAR_IN
B B
GND1
239
235
CB039CB140CB245CB346CB4
ODT177ODT0
RSVD
NC_TEST4
NC-ERR_OUT
GND2
GND3
GND4
GND5
GND6
GND7
GND8
232
229
226
223
220
217
214
SM BUS address : A4h
DDR3 CHANNEL B DIMM 0
M_ODT_B [0..3] 11,6
M_DQS_B_DP0
M_DATA_B_CB2
M_DATA_B_CB3
M_DATA_B_CB4
158
DDR3_24 0P_DIMM2_AT50_ PAD40_H28
DDR3_24 0P_DIMM2_AT50_ PAD40_H28
GND9
GND10
GND11
211
208
205
M_DQS_B_DN0
M_DATA_B_CB5
M_DATA_B_CB6
M_DATA_B_CB7
159
164
165
7
6
CB5
CB6
CB7
DQS0
DQS0-
GND12
GND13
GND14
GND15
GND16
GND17
GND18
202
199
166
163
160
157
DIMM3
M_ODT_B [0..3]
C C
M_ODT_B 2
M_ODT_B 3
D D
M_DQS_B _DN[0..8] 11,6
M_DQS_B _DP[0..8] 11,6
M_DATA_ B_CB[0..7] 11,6
M_DATA_B_CB0
M_DATA_B_CB1
68
53
167
195
79
J7
J7
NC-PAR_IN
CB039CB140CB245CB346CB4
ODT177ODT0
RSVD
NC_TEST4
NC-ERR_OUT
M_ODT_B [0..3] 11,6
M_DQS_B_DP0
M_DQS_B_DN0
M_DATA_B_CB5
M_DATA_B_CB2
M_DATA_B_CB6
M_DATA_B_CB3
M_DATA_B_CB7
M_DATA_B_CB4
158
159
164
165
7
6
CB5
CB6
CB7
DQS0
DQS0-
DDR3_24 0P_DIMM3_AT50_ PAD40_H28
2
M_DQS_B_DP1
16
GND19
154
151
M_DQS_B_DP1
16
M_DQS_B_DP3
M_DQS_B_DP2
M_DQS_B_DN1
15
25
DQS1
DQS1-
GND20
GND21
GND22
148
145
142
M_DQS_B_DP2
M_DQS_B_DN1
15
25
DQS1
DQS1-
M_DQS_B_DP4
M_DQS_B_DP5
M_DQS_B_DP6
M_DQS_B_DN2
M_DQS_B_DN3
M_DQS_B_DN4
24
34
33
85
84
94
DQS2
DQS3
DQS4
DQS2-
DQS3-
DQS4-
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
SA2
139
136
133
130
127
124
121
119
116
M_DQS_B_DP3
M_DQS_B_DP4
M_DQS_B_DN2
24
DQS2
DQS2-
M_DQS_B_DP5
M_DQS_B_DN3
M_DQS_B_DN4
34
33
85
84
94
DQS3
DQS4
DQS3-
DQS4-
M_DQS_B_DN5
93
DQS5
DQS5-
GREEN
GREEN
GND32
GND33
113
110
M_DQS_B_DN5
93
DQS5
DQS5-
BLUEDDR3_24 0P_DIMM3_AT50_ PAD40_H28
BLUE
M_DQS_B_DP7
M_DQS_B_DN6
M_DQS_B_DN7
103
102
112
111
DQS6
DQS7
DQS6-
GND34
GND35
GND36
GND37
GND3898GND3995GND4092GND4189GND4286GND4383GND4480GND4547GND4644GND4741GND4838GND4935GND5032GND5129GND5226GND5323GND5420GND5517GND5614GND5711GND588GND595GND602FREE1
107
104
101
M_DQS_B_DP6
M_DQS_B_DP7
M_DQS_B_DN6
M_DQS_B_DN7
103
102
112
111
DQS6
DQS7
DQS6-
3
M_DQS_B_DP8
M_DQS_B_DN8
43
42
125
126
134
135
143
144
152
153
203
204
212
DQS8
DQS7-
DQS8-
NC_DQS9-
DM0_DQS9
NC_DQS10-
NC_DQS11-
NC_DQS12-
DM1_DQS10
DM2_DQS11
M_DQS_B_DP8
M_DQS_B_DN8
43
42
125
126
134
135
143
144
DQS8
DQS7-
DQS8-
NC_DQS9-
DM0_DQS9
NC_DQS10-
NC_DQS11-
DM1_DQS10
DM2_DQS11
NC_DQS13-
DM3_DQS12
DM4_DQS13
DM5_DQS14
152
153
203
204
212
NC_DQS12-
NC_DQS13-
DM3_DQS12
DM4_DQS13
DM5_DQS14
213
213
NC_DQS14-
198
NC_DQS14-
221
222
NC_DQS15-
DM6_DQS15
FREE249FREE348NC
187
VTT_MEM
221
222
NC_DQS15-
DM6_DQS15
4
M_D_B[0..6 3] 11,6
M_D_B0
M_D_B1
M_D_B2
M_D_B3
M_D_B4
M_D_B5
M_D_B6
M_D_B7
M_D_B8
230
231
161
162
NC_DQS16-
NC_DQS17-
DM7_DQS16
DM8_DQS17
VTT1
VTT2
VDD1
240
120
197
230
231
161
162
NC_DQS16-
NC_DQS17-
DM7_DQS16
DM8_DQS17
DQ03DQ14DQ29DQ310DQ4
VDD2
VDD3
VDD4
VDD5
VDD6
194
191
189
186
183
VCC1.5V_ DDR3
M_D_B0
M_D_B1
M_D_B2
DQ03DQ14DQ29DQ310DQ4
122
123
128
129
DQ5
DQ6
DQ7
VDD7
VDD8
VDD9
VDD10
VDD11
182
179
176
173
170
SMB_CLK 10,11 ,17,3,37
SMB_DAT A 10,11,17,3 ,37
M_D_B[0..6 3] 11,6
M_D_B3
M_D_B4
M_D_B5
M_D_B6
M_D_B7
M_D_B8
122
123
128
129
DQ5
DQ6
DQ7
5
M_D_B9
M_D_B10
M_D_B11
M_D_B12
M_D_B13
M_D_B14
M_D_B15
M_D_B16
M_D_B17
M_D_B18
13
131
132
137
138
DQ812DQ9
DQ1018DQ1119DQ12
DQ13
DQ14
DQ15
DQ1621DQ1722DQ1827DQ1928DQ20
VDD1278VDD1375VDD1472VDD1569VDD1666VDD1765VDD1862VDD1960VDD2057VDD2154VDD2251VDDSPD
VCC3
DIMM_CA_V REF_B
DIMM_DQ_V REF_B
M_D_B9
M_D_B10
M_D_B11
M_D_B12
M_D_B13
M_D_B14
M_D_B15
M_D_B16
M_D_B17
M_D_B18
13
131
132
137
138
DQ812DQ9
DQ1018DQ1119DQ12
DQ13
DQ14
DQ15
DQ1621DQ1722DQ1827DQ1928DQ20
6
7
8
DDR3 MEMORY CHANNEL B
M_D_B19
M_D_B20
M_D_B21
M_D_B22
M_D_B23
M_D_B24
M_D_B25
M_D_B26
M_D_B27
M_D_B28
M_D_B29
M_D_B30
M_D_B31
M_D_B32
M_D_B33
M_D_B34
M_D_B35
M_D_B36
M_D_B37
M_D_B38
M_D_B39
M_D_B40
M_D_B41
M_D_B42
M_D_B43
M_D_B44
M_D_B45
M_D_B46
M_D_B47
M_D_B48
M_D_B49
M_D_B50
M_D_B51
M_D_B52
M_D_B53
M_D_B54
M_D_B55
M_D_B56
M_D_B57
M_D_B58
M_D_B59
M_D_B60
M_D_B61
M_D_B62
M_D_B63
140
141
146
147
149
150
155
156
200
201
206
207
209
210
215
216
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234
DQ21
DQ22
DQ23
DQ2430DQ2531DQ2636DQ2737DQ28
DQ29
DQ30
DQ31
DQ3281DQ3382DQ3487DQ3588DQ36
DQ37
DQ38
DQ39
DQ4090DQ4191DQ4296DQ4397DQ44
DQ45
DQ46
DQ47
DQ4899DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
SCL
SDA
SA1
SA0
BA252BA071CKE1
CKE050S1-76S0-
CK1_NU-64CK1_NU63CK0-
CK0
A261A3
A459A558A6
A756A8
A10_AP70A1155A12
A13
A14
A15
VREFCA67VREFDQ
1
118
236
M_D_B19
M_D_B20
M_D_B21
M_D_B22
M_D_B23
140
141
146
147
DQ21
DQ22
DQ23
238
237
117
M_D_B24
M_D_B25
M_D_B26
DQ2430DQ2531DQ2636DQ2737DQ28
BA1
169
M_SBS_B0
M_D_B31
156
DQ30
M_SCKE_B1
M_SCKE_B0
M_D_B32
M_D_B33
DQ31
DQ3281DQ3382DQ3487DQ3588DQ36
193
M_SCS_B_N0
M_SCS_B_N1
M_D_B34
M_D_B35
M_D_B36
M_D_B37
200
201
DQ37
190
M_SBS_B2
M_SBS_B1
M_D_B27
M_D_B28
M_D_B29
M_D_B30
149
150
155
DQ29
A0
185
184A1181
180
178
188
M_MAA_B1
M_MAA_B0
M_D_B38
M_D_B39
M_D_B40
M_D_B41
M_D_B42
M_D_B43
M_D_B44
206
207
209
DQ38
DQ39
DQ4090DQ4191DQ4296DQ4397DQ44
177A9175
M_MAA_B2
M_MAA_B3
M_MAA_B4
M_MAA_B5
M_MAA_B6
M_MAA_B7
M_MAA_B8
M_MAA_B9
M_MAA_B10
M_MAA_B11
M_D_B45
M_D_B46
M_D_B47
M_D_B48
M_D_B49
M_D_B50
M_D_B51
M_D_B52
M_D_B53
M_D_B54
210
215
216
100
105
106
218
219
224
DQ45
DQ46
DQ47
DQ4899DQ49
DQ50
DQ51
DQ52
DQ53
RESET-
CAS-74RAS-
WE-
174
196
172
M_MAA_B12
M_MAA_B13
M_D_B55
M_D_B56
M_D_B57
225
108
109
DQ54
DQ55
DQ56
73
171
168
192
M_MAA_B14
M_MAA_B15
M_D_B58
M_D_B59
M_D_B60
M_D_B61
114
115
227
228
DQ57
DQ58
DQ59
DQ60
M_WE _B_N 11,6
M_RAS_B _N 11 ,6
M_CAS_B _N 11 ,6
DDR3_DR AMRST_N 10,11 ,6
M_MAA_B [0..15] 11,6
CLK_M_D DR0_B_DP 6
CLK_M_D DR0_B_DN 6
CLK_M_D DR1_B_DP 6
CLK_M_D DR1_B_DN 6
M_SCS_B _N[0..3] 11,6
M_SCKE_ B[0..3] 11 ,6
M_SBS_B [0..2] 11,6
M_D_B62
M_D_B63
233
234
DQ61
DQ62
DQ63
SCL
SDA
SA1
SA0
BA252BA071CKE1
CKE050S1-76S0-
CK1_NU-64CK1_NU63CK0-
CK0
A261A3
A459A558A6
A756A8
A10_AP70A1155A12
A13
A14
A15
RESET-
CAS-74RAS-
WE-
174
196
172
M_MAA_B13
M_MAA_B12
Date: PAGE:
Date: PAGE:
Date: PAGE:
7
73
171
168
192
M_MAA_B14
M_MAA_B15
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
M_WE _B_N 11,6
M_RAS_B _N 11 ,6
M_CAS_B _N 11 ,6
DDR3_DR AMRST_N 10,11 ,6
M_MAA_B [0..15] 11,6
CLK_M_D DR2_B_DP 6
CLK_M_D DR2_B_DN 6
CLK_M_D DR3_B_DP 6
CLK_M_D DR3_B_DN 6
M_SCS_B _N[0..3] 11,6
M_SCKE_ B[0..3] 11 ,6
M_SBS_B [0..2] 11,6
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
11 63
11 63
11 63
of
of
of
185
184A1181
A0
188
M_MAA_B0
180
M_MAA_B2
M_MAA_B1
M_MAA_B3
178
177A9175
M_MAA_B7
M_MAA_B6
M_MAA_B5
M_MAA_B4
M_MAA_B9
M_MAA_B8
TITLE:
TITLE:
TITLE:
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
M_MAA_B11
M_MAA_B10
Mississippi_uATX
Mississippi_uATX
Mississippi_uATX
DDR3 UDIMM CHANNEL B
DDR3 UDIMM CHANNEL B
DDR3 UDIMM CHANNEL B
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
SA2
GND32
GND33
GND34
GND35
GND36
GND37
GND3898GND3995GND4092GND4189GND4286GND4383GND4480GND4547GND4644GND4741GND4838GND4935GND5032GND5129GND5226GND5323GND5420GND5517GND5614GND5711GND588GND595GND602FREE1
239
235
232
229
226
223
220
217
214
211
208
205
202
199
166
163
160
157
154
151
148
145
142
139
136
133
130
127
124
121
119
116
113
110
107
104
101
SM BUS address : A6h
DDR3 CHANNEL B DIMM 1
E E
CB15 CB15
F F
DIMM4
VCC1.5V_ DDR3
R101
R101
1K_1%
1K_1%
R121 0R R12 1 0R
R105
R105
1K_1%
1K_1%
1
DIMM_CA_V REF_B_R
DIMM_DQ_C PU_VREF_B
C661
C661
0.022UF_ 16V_X7R
0.022UF_ 16V_X7R
DIMM_DQ_C PU_VREF_B_RC
0402
0402
R1291
R1291
24R9_1%
24R9_1%
DIMM_CA_V REF_B 1 1,4
DIMM_CA_V REF_B DIMM_DQ_V REF_B_R
X7R
X7R
CB17
CB17
0.1UF_0402_X7R
0.1UF_0402_X7R
2
3
VCC1.5V_ DDR3
CB14 CB14
198
R100
R100
1K_1%
1K_1%
R104
R104
1K_1%
1K_1%
FREE249FREE348NC
187
VTT1
VTT2
240
120
X7R
X7R
CB26
CB26
4
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
197
194
191
189
186
183
182
VCC1.5V_ DDR3 VTT_MEM
DIMM_CA_V REF_B 11,4
DIMM_DQ_V REF_B
SMB_CLK 10,11 ,17,3,37
SMB_DAT A 10,11,17,3 ,37
PLACE NEAR DIMM AREA
R381 0R R38 1 0R
0.1UF_0402_X7R
0.1UF_0402_X7R
VDD7
VDD8
VDD9
VDD10
VDD11
179
176
173
170
0.1UF_0402_X7R
0.1UF_0402_X7R
VDD1278VDD1375VDD1472VDD1569VDD1666VDD1765VDD1862VDD1960VDD2057VDD2154VDD2251VDDSPD
VCC3
DIMM_CA_V REF_B
DIMM_DQ_V REF_B
R385 2R_1%
R385 2R_1%
X7R
X7R
0402
0402
DIMM_DQ_V REF_B
X7R
X7R
CB23
CB23
CB16
CB16
5
VREFCA67VREFDQ
1
118
238
237
236
0.1UF_0402_X7R
0.1UF_0402_X7R
117
CB18 CB18
DIMM_DQ_C PU_VREF_B 6
C697
C697
0.1UF_16 V_X7R
0.1UF_16 V_X7R
BA1
169
190
M_SBS_B2
M_SBS_B1
DDR3_DR AMRST_N 10,11 ,6
193
M_SCKE_B3
M_SCKE_B2
M_SCS_B_N3
M_SBS_B0
M_SCS_B_N2
6
1
A A
2
3
4
5
6
7
8
DDR3 DIMM DECOUPLING
VCC1.5V_ DDR3
VTT_MEM
C347 1UF_6.3V_X5R C347 1UF_6.3V_X5R
C344 1UF_6.3V_X5R C344 1UF_6.3V_X5R
C345 1UF_6.3V_X5R C345 1UF_6.3V_X5R
B B
X7R
X7R
X7R
X7R
0805
0805
0805
0805
C17
C17
C18
C18
4.7UF_16V_X5R
4.7UF_16V_X5R
4.7UF_16V_X5R
CB20
CB20
CB19
CB19
4.7UF_16V_X5R
C348 1UF_6.3V_X5R C348 1UF_6.3V_X5R
C346 1UF_6.3V_X5R C346 1UF_6.3V_X5R
VCC1.5V_ DDR3
X7R
X7R
X7R
X7R
X7R
X7R
CB90
CB90
CB163
CB163
CB172
CB172
X7R
X7R
CB173
CB173
Channel A VTT Decoupling Caps
C C
VTT_MEM
X7R
X7R
CB21
CB21
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
CB22
CB22
0805
0805
0805
0805
C32
C32
C31
C31
4.7UF_16V_X5R
4.7UF_16V_X5R
4.7UF_16V_X5R
4.7UF_16V_X5R
CB232
CB232
X7R
CB235
CB235
CB236
CB236
CB237
CB237
CB238
CB238
X7R
X7R
X7R
X7R
X7R
CB233
CB233
CB234
CB234
CB239
CB239
CB240
CB240
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
CB246
CB246
CB247
CB247
CB248
CB248
CB249
CB249
VCC1.5V_ DDR3
VCC1.5V_ DDR3
X7R
X7R
X7R
X7R
X7R
X7R
CB200
CB200
CB199
CB199
CB201
CB201
X7R
X7R
X7R
X7R
X7R
X7R
X7R
CB202
CB202
CB210
CB210
CB211
CB211
X7R
X7R
X7R
X7R
X7R
CB214
CB214
CB212
CB212
CB213
CB213
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
CB241
CB241
CB242
CB242
CB244
CB244
CB245
CB245
Channel B VTT Decoupling Caps
Stitching caps for DDR3 CHB CTRL and CMD
D D
VCC1.5V_ DDR3
VCC1.5V_ DDR3
VCC1.5V_ DDR3
+ OS-CON_D6.3P2.5H8
CE27
CE27
+ AL_CAP_105DC_D5P2H11
CE26
+ AL_CAP_105DC_D5P2H11
CE26
CE23
CE35
CE35
+ AL_CAP_105DC_D5P2H11
CE31
+ AL_CAP_105DC_D5P2H11
CE31
+ D5P2.0
+ D5P2.0
E E
+ D5P2.0
220UF_6.3V
220UF_6.3V
X_220UF_6.3V
X_220UF_6.3V
+ D5P2.0
X_220UF_6.3V
X_220UF_6.3V
CE23
+ D5P2.0
+ D5P2.0
220UF_6.3V
220UF_6.3V
X_220UF_6.3V
X_220UF_6.3V
Place between CHA and CHB
F F
1
2
3
+ OS-CON_D6.3P2.5H8
+ OS-CON_D6.3P2.5H8
+ OS-CON_D6.3P2.5H8
+ OS-CON_D6.3P2.5H8
CE57
CE57
X_820UF_2.5V
X_820UF_2.5V
+ OS-CON_D6.3P2.5H8
CE58
CE58
X_820UF_2.5V
X_820UF_2.5V
X_820UF_2.5V
X_820UF_2.5V
Place top side of CHA
4
0805
0805
0805
0805
0805
0805
0805
0805
CE59
CE59
C67
C67
C74
C74
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
5
C76
C76
C66
C66
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
22UF_6.3V_X5R
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
Mississippi_uATX
DECOUPL ING
DECOUPL ING
DECOUPL ING
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
6
A3
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
7
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
12 63
12 63
12 63
of
of
of
1
A A
2
3
4
5
6
7
8
PCH DMI/PCIE/USB
PCH FDI/USB3.0
U2F
U2B
U2B
R128 10K
R128 10K
R26
R26
R71
R71
R72
R72
R73
R73
L24
DMI_RXN0
K24
DMI_RXP0
C20
DMI_TXN0
B20
DMI_TXP0
G24
DMI_RXN1
H24
DMI_RXP1
D21
DMI_TXN1
B21
DMI_TXP1
F26
DMI_RXN2
G26
DMI_RXP2
B22
DMI_TXN2
C22
DMI_TXP2
K26
DMI_RXN3
L26
DMI_RXP3
A24
DMI_TXN3
B24
DMI_TXP3
B19
DMI_RCOMP
C13
PCIE_RCOMP
G22
CLKIN_DMI_N
F22
CLKIN_DMI_P
L14
PERN1_USB3RN3
K14
PERP1_USB3RP3
B12
PETN1_USB3TN3
B11
PETP1_USB3TP3
F14
PERN2_USB3RN4
G14
PERP2_USB3RP4
D11
PETN2_USB3TN4
C11
PETP2_USB3TP4
F11
PERN3
H11
PERP3
B9
PETN3
A9
PETP3
J11
PERN4
L11
PERP4
B8
PETN4
C8
PETP4
G9
PERN5
F9
PERP5
B7
PETN5
A7
PETP5
F7
PERN6
H7
PERP6
E1
PETN6
D2
PETP6
K6
PERN7
K8
PERP7
G3
PETN7
G5
PETP7
J2
PERN8
J3
PERP8
H2
PETN8
H1
PETP8
LYNX_POINT
LYNX_POINT
0402
0402
0402
0402
0402
0402
0402
0402
DMI_MT_IR_0_ DN 5
DMI_MT_IR_0_ DP 5
VCC1.5V_ PCH
X4 SLOT
DMI_IT_MR_0_ DN 5
DMI_IT_MR_0_ DP 5
DMI_MT_IR_1_ DN 5
DMI_MT_IR_1_ DP 5
DMI_IT_MR_1_ DN 5
DMI_IT_MR_1_ DP 5
DMI_MT_IR_2_ DN 5
DMI_MT_IR_2_ DP 5
DMI_IT_MR_2_ DN 5
DMI_IT_MR_2_ DP 5
DMI_MT_IR_3_ DN 5
DMI_MT_IR_3_ DP 5
DMI_IT_MR_3_ DN 5
DMI_IT_MR_3_ DP 5
0402
0402
R122 7K5_1%
R122 7K5_1%
CB78
CB78
CB79
CB79
CB82
CB82
CB81
CB81
DMI_COMP
0402
0402
100M_DM I_PCH_DN
100M_DM I_PCH_DP
CB323
CB323
X7R
X7R
CB324
CB324
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
WLA N_DISABLE_N
100M_DM I_PCH_DP
100M_DM I_PCH_DN
CK_96M_ DREF_DP
CK_96M_ DREF_DN
PCIE_RCOM P
USB3_TX N5_L
USB3_TX P5_L
USB3_RX N6
USB3_RX P6
USB3_TX N6
USB3_TX P6
GLAN_TX N_C
GLAN_TX P_C
PCI_BRIDGE_T XN_C
PCI_BRIDGE_T XP_C
2
R110 7K5_1%
R110 7K5_1%
USB3_RX N5 31
USB3_RX P5 31
USB3_TX N5 31
USB3_TX P5 31
GLAN_RX N 36
GLAN_RX P 36
GLAN_TX N 36
GLAN_TX P 36
PCI_BRIDGE_R XN 43
PCI_BRIDGE_R XP 43
PCI_BRIDGE_T XN 43
PCI_BRIDGE_T XP 43
HSI5_DN 23
HSI5_DP 23
HSO5_DN 2 3
HSO5_DP 23
HSI6_DN 23
HSI6_DP 23
HSO6_DN 2 3
HSO6_DP 23
HSI7_DN 23
HSI7_DP 23
HSO7_DN 2 3
HSO7_DP 23
HSI8_DN 23
HSI8_DP 23
HSO8_DN 2 3
HSO8_DP 23
1
B B
C C
D D
E E
F F
0402
0402
10K
10K
10K
10K
10K
10K
10K
10K
SB3V
2of10
2of10
OC0-_GPIO59
OC1-_GPIO40
OC2-_GPIO41
OC3-_GPIO42
OC4-_GPIO43
OC5-_GPIO9
OC6-_GPIO10
OC7-_GPIO14
USBRBIAS-
CLKIN_DOT96_N
CLKIN_DOT96_P
3
USB2N0
USB2P0
USB2N1
USB2P1
USB2N2
USB2P2
USB2N3
USB2P3
USB2N4
USB2P4
USB2N5
USB2P5
USB2N6
USB2P6
USB2N7
USB2P7
USB2N8
USB2P8
USB2N9
USB2P9
USB2N10
USB2P10
USB2N11
USB2P11
USB2N12
USB2P12
USB2N13
USB2P13
USBRBIAS
AV10
AU10
AV11
AW11
AN14
AP14
AJ16
AK16
AU15
AV15
AU12
AT12
AV14
AW14
AU17
AT17
AW16
AV16
AN16
AP16
AJ18
AK18
AP18
AN18
AW18
AV18
AP20
AN20
AE40
AF37
AD39
AD40
AF39
AC41
AF40
AG40
AV20
AU20
AP11
AM11
USB3_RX N6
USB3_RX P6
USB3_TX N6
USB3_TX P6
TP_PCH_ AV14
TP_PCH_ AW14
TP_PCH_ AU17
TP_PCH_ AT17
TP_PCH_ AW18
TP_PCH_ AV18
TP_PCH_ AP20
TP_PCH_ AN20
WLA N_DISABLE_N
USBRBIAS_ PCH
USBRBIAS_ PCH
CK_96M_ DREF_DN
CK_96M_ DREF_DP
USB_POR T0_DN 31
USB_POR T0_DP 31
USB_POR T1_DN 31
USB_POR T1_DP 31
USB_POR T2_DN 31
USB_POR T2_DP 31
USB_POR T3_DN 31
USB_POR T3_DP 31
USB_POR T4_DN 30
USB_POR T4_DP 30
USB_POR T5_DN 30
USB_POR T5_DP 30
DP95 DP95
DP85 DP85
DP93 DP93
DP84 DP84
USB_POR T8_DN 29
USB_POR T8_DP 29
USB_POR T9_DN 29
USB_POR T9_DP 29
USB_POR T10_DN 27
USB_POR T10_DP 27
USB_POR T11_DN 27
USB_POR T11_DP 27
DP72 DP72
DP73 DP73
DP74 DP74
DP75 DP75
R112 22R6_1 %
R112 22R6_1 %
0402
0402
VCC1.5V_ PCH
USB_OC_ PORT01_N 31
USB_OC_ PORT23_N 31
USB_OC_ PORT4_N 3 0
USB_OC_ PORT5_N 3 0
WLA N_DISABLE_N 23
USB_OC_ PORT89_N 29
USB_OC_ PORT1011_N 27
FDI_TX_0_ DN 5
FDI_TX_0_ DP 5
FDI_TX_1_ DN 5
FDI_TX_1_ DP 5
FDI_CSYNC 5
FDI_INT 5
R118 7K5_1%
R118 7K5_1%
ADD5
ADD5
MINI_JUMPER1 X2_P2.54_H13.5 3_Y
MINI_JUMPER1 X2_P2.54_H13.5 3_Y
0402
0402
FDI_RCOMP
USB_DISAB LE_N
PIN 1-2 :DEFAUL T
0R
0R
R186
R186
0402
0402
0R
0R
R188
R188
0402
0402
X_0R
X_0R
R187
R187
0402
0402
X_0R
X_0R
R189
R189
0402
0402
R253
R253
R255
R255
R268
R268
R269
R269
USB3_TX 6N_R
0R
0R
0402
0402
USB3_TX 6P_R
0R
0R
0402
0402
USB3_TX N6_X1
X_0R
X_0R
0402
0402
USB3_TX P6_X1
X_0R
X_0R
0402
0402
CB325
CB325
CB326
CB326
CB253
CB253
CB254
CB254
X7R
X7R
X7R
X7R
X7R
X7R
X_0.1UF_ 16V_X7R
X_0.1UF_ 16V_X7R
X7R
X7R
X_0.1UF_ 16V_X7R
X_0.1UF_ 16V_X7R
Close Header or Connector
BOM NOTE: FOR T el Aviv(B85),Ch angbanpo FO(B8 5),NECPC(B85)
POP R187 R189 R 268 R269 CB253 CB254
NOPOP R186 R188 R253 R255
4
5
PIN 1-2 :DEFAUL T
PIN 2-3 :DISABL E ALL USB PORTS
USB3_RX 6N_R 31
USB3_RX 6P_R 31
PCIEX1_HS I_DN 15,2 3
PCIEX1_HS I_DP 15,23
USB3_TX 6N_C 31
USB3_TX 6P_C 31
PCIEX1_HS O_DN_C 23
PCIEX1_HS O_DP_C 2 3
SB3V
6
0402
0402
N1
N2
P2
P3
L2
L3
K2
R138
R138
10K
10K
USB_DIS
6of10
6of10
FDI_RXN0
FDI_RXP0
FDI_RXN1
FDI_RXP1
FDI_CSYNC
FDI_INT
FDI_RCOMP
JP107
JP107
1
BOM NOTE: FOR T el Aviv(B85),Ch angbanpo FO(B8 5),NECPC(B85)
2
POP R129
3
HEADER_ 1X3_2.54MM
HEADER_ 1X3_2.54MM
U2F
F20
USB3RN1
G20
USB3RP1
B18
USB3TN1
C18
USB3TP1
G18
USB3RN2
H18
USB3RP2
B15
USB3TN2
B16
USB3TP2
K20
USB3RN5
L20
USB3RP5
D15
USB3TN5
C15
USB3TP5
L18
USB3RN6
K18
USB3RP6
B14
USB3TN6
A14
USB3TP6
TACH6_GPIO70
TACH7_GPIO71
LYNX_POINT
LYNX_POINT
GPIO70 CAN BE U SE AS
PCIE PORT2 (HIG H)/USB3.0 PORT4 (LOW) MUX SEL ECT IN LPT
AK28
AT34
PCH_GPIO7 0_PU
GPIO71 CAN BE U SE AS
PCIE PORT1 (HIG H)/SATA PORT3 ( LOW) MUX SELEC T IN LPT
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
Mississippi_uATX
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Document N umber :
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A3
A3
A3
Close Header or Connector
USB3_TX N1_L USB3_ TXN1_L
USB3_TX P1_L USB 3_TXP1_L
USB3_TX N2_L USB3_ TXN2_L
USB3_TX P2_L
USB3_TX N3_L USB3_ TXN3_L
USB3_TX P3_L USB 3_TXP3_L
USB3_TX N4_L USB3_ TXN4_L
USB3_TX P4_L USB 3_TXP4_L
PCH_GPIO7 0_PU
PCH_GPIO7 1_PU
PCH_GPIO7 1_PU
Date: PAGE:
Date: PAGE:
Date: PAGE:
7
CB301
CB301
CB302
CB302
CB303
CB303
CB304
CB304
CB305
CB305
CB306
CB306
CB308
CB308
CB307
CB307
VCC3
R129 10K
R129 10K
0402
0402
R130 X_10K
R130 X_10K
0402
0402
R150 10K
R150 10K
R181 X_10K
R181 X_10K
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Monday, December 0 3, 2012
Monday, December 0 3, 2012
Monday, December 0 3, 2012
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
0402
0402
0402
0402
USB3_RX N1 31
USB3_RX P1 31
USB3_TX N1 31
USB3_TX P1 31
USB3_RX N2 31
USB3_RX P2 31
USB3_TX N2 31
USB3_TX P2 31
USB3_RX N3 27
USB3_RX P3 27
USB3_TX N3 27
USB3_TX P3 27
USB3_RX N4 27
USB3_RX P4 27
USB3_TX N4 27
USB3_TX P4 27
VCC3
REV:
REV:
REV:
V0.4
V0.4
V0.4
13 63
13 63
13 63
of
of
of
8
1
PCH CLOCK
A A
B B
C C
CLK_48M _SIO 39
CK_PCH_ 33M_FB 18
2
CLK_33M _SIO 39
CLK_33M _TPM 37
CLK_33M _LEO 37
R114 1M R114 1M
XTAL_DIP_3P
XTAL_DIP_3P
25MHZ
25MHZ
30PPM 18PF
X2
X2
1
2
R666 22R
R666 22R
R977 39R
R977 39R
VCC1.5V_ PCH
27PF_50 V_NPO
27PF_50 V_NPO
C77
C77
GND
GND
3
3
DP82 DP82
DP83 DP83
R972 22R
R972 22R
0402
0402
R663 43R
R663 43R
0402
0402
R667 36R
R667 36R
0402
0402
0402
0402
T438 T438
0402
0402
R113 7K5_1%
R113 7K5_1%
0402
0402
TP_PCH_ AV5
TP_PCH_ AV7
CLK_33M _FB_R
CLK_33M _SIO_R
CLK_33M _TPM_R
TP_PCH_ AV8
T437 T437
CLK_33M _LEO_R
CLK_48M _SIO_R
XCLK_RB IAS
CK_14M_ PCH
PCH_XTA L25_IN
PCH_XTA L25_OUT
TP_CK_G PIO66
4
U2G
U2G
AV5
CLKOUT_33MHZ0
AV7
CLKOUT_33MHZ1
AU2
CLKOUT_33MHZ2
AN9
CLKOUT_33MHZ3
AU5
CLKOUT_33MHZ4
AV8
CLKOUTFLEX0_GPIO64
AT9
CLKOUTFLEX1_GPIO65
AV9
CLKOUTFLEX2_GPIO66
AU8
CLKOUTFLEX3_GPIO67
R11
DIFFCLK_BIASREF
AR7
REFCLK14IN
N7
XTAL25_IN
N6
XTAL25_OUT
LYNX_POINT
LYNX_POINT
7of10
7of10
5
CLKIN_GND_N
CLKIN_GND_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKOUT_DPNS_N
CLKOUT_DPNS_P
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
CLKOUT_PCIE_N6
CLKOUT_PCIE_P6
CLKOUT_PCIE_N7
CLKOUT_PCIE_P7
G16
F16
R2
T2
T3
T5
W2
U2
U6
U7
AA3
AA2
AE6
AE7
AE10
AE11
AC6
AC7
AC11
AC10
W11
W10
Y4
Y2
W7
W6
AA7
AA6
R6
R7
TP_PCH_ AE6
TP_PCH_ AE7
TP_PCH_ Y4
TP_PCH_ Y2
TP_PCH_ W7
TP_PCH_ W6
TP_PCH_ AA7
TP_PCH_ AA6
TP_PCH_ N7
TP_PCH_ P7
6
100M_CP HY_PCH_IN_DN
100M_CP HY_PCH_IN_DP
7
CK_PE_1 00M_DMI_DN 4
CK_PE_1 00M_DMI_DP 4
CK_DP_1 35M_DN 5
CK_DP_1 35M_DP 5
CK_DPNS _DN 4
CK_DPNS _DP 4
CK_100M _CPU_XDP_DN 3
CK_100M _CPU_XDP_DP 3
CK_PE_1 00M_16PORT_D N 22
DP80 DP80
DP81 DP81
DP87 DP87
DP86 DP86
DP88 DP88
DP89 DP89
DP99 DP99
DP100 DP100
DP90 DP90
DP91 DP91
Every differential clock via must have
at least one GND stitching via with a
maximum spacing of 30 mils.
CK_PE_1 00M_16PORT_D P 22
100-MHz PCIe 3. 0 compliant
100-MHz PCIe 2. 0 compliant
CK_PE_1 00M_4PORT_DN 23
CK_PE_1 00M_4PORT_DP 2 3
CK_PE_1 00M_1PORT_DN 23
CK_PE_1 00M_1PORT_DP 2 3
CK_GLAN _DN 36
CK_GLAN _DP 36
CK_PCI_BR IDGE_DN 43
CK_PCI_BR IDGE_DP 4 3
8
C78 27PF_50 V_NPO C7 8 27PF_5 0V_NPO
D D
E E
C341 X_10PF_50V_NPO C341 X_10PF_50V_NPO
C473 10PF_50V_NPO C473 10PF_50V_NPO
C342 X_10PF_50V_NPO C342 X_10PF_50V_NPO
C343 10PF_50V_NPO C343 10PF_50V_NPO
CLK_48M _SIO
CLK_33M _TPM
CLK_33M _SIO
CK_PCH_ 33M_FB
CLK_33M _LEO
X_10PF_50V_NPO
X_10PF_50V_NPO
C442
C442
+12V
CB157 CB157
VCC3
CB92 CB92
CB93 CB93
CK_14M_ PCH
100M_CP HY_PCH_IN_DP
100M_CP HY_PCH_IN_DN
R76
R76
R967 10K
R967 10K
R968 10K
R968 10K
10K
10K
0402
0402
0402
0402
0402
0402
FOR EMI
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
F F
1
2
3
4
5
6
Mississippi_uATX
Lynxpoint
Lynxpoint
Lynxpoint
Document N umber :
Document N umber :
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A3
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A3
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
7
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
14 63
14 63
14 63
of
of
of
1
R131 0R
R131 0R
R132 X_0R
A A
B B
C C
PWRG D_3V 16,39,45,8
CLINK_CLK _WLAN 23
CLINK_DAT A_WLAN 23
CLINK_RST _WLAN_N 23
VCC3
R74 10K
R74 10K
0402
0402
R75 10K
R75 10K
0402
0402
R133
R133
R134
R134
R135
R135
BRD_ID3 17
BRD_ID1 17
BRD_ID0 17
HDMI_DET_ N 24
LC_SENS E 34
THRM_ID2 40
R140 10K
R140 10K
R141 10K
R141 10K
R142 10K
R142 10K
R159 10K
R159 10K
CK_SATA _PCH_DP
CK_SATA _PCH_DN
R132 X_0R
NON-AMT
OVERLAP PADS
0402
0402
0402
0402
0402
0402
C86
C86
T427 T427
T429 T429
T428 T428
T430 T430
T431 T431
0402
0402
0402
0402
0402
0402
0402
0402
AMT
0402
0402
0402
0402
CLINK_CLK _LAN
0R
0R
CLINK_DAT A_LAN
0R
0R
CLINK_RST _LAN_N
0R
0R
PCH_MEP WROK_R
X_10PF_ 50V_NPO
X_10PF_ 50V_NPO
TP_PCH_ AL31
TP_PCH_ AM31
TP_PCH_ AP31
TP_PCH_ AV30
HDMI_DET_ N
LC_SENS E
THRM_ID2
SST_CTL
PCH_SCL OCK
PCH_SLO AD
PCH_SDA TAOUT0
PCH_SDA TAOUT1
2
PCH_MEP WROK_R
3
PCH_MEP WROK_R 16 PCH_MEP WROK 50
4
5
6
7
8
PCH SATA / QST
U2C
U2C
U36
CL_CLK
U35
CL_DATA
U34
CL_RST-
AA32
APWROK
AL31
PWM0
AM31
PWM1
AP31
PWM2
AV30
PWM3
AP28
TACH0_GPIO17
AT31
TACH1_GPIO1
AM28
TACH2_GPIO6
AV34
TACH3_GPIO7
AT30
TACH4_GPIO68
AV35
TACH5_GPIO69
AJ31
SST
L38
SCLOCK_GPIO22
H41
SLOAD_GPIO38
R31
SDATAOUT0_GPIO39
L40
SDATAOUT1_GPIO48
3of10
3of10
SATA_RXN4_PERN1
SATA_RXP4_PERP1
SATA_TXN4_PETN1
SATA_TXP4_PETP1
SATA_RXN5_PERN2
SATA_RXP5_PERP2
SATA_TXN5_PETN2
SATA_TXP5_PETP2
SATA0GP_GPIO21
SATA1GP_GPIO19
SATA2GP_GPIO36
SATA3GP_GPIO37
SATA4GP_GPIO16
SATA5GP_GPIO49
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1
SATA_RXN2
SATA_RXP2
SATA_TXN2
SATA_TXP2
SATA_RXN3
SATA_RXP3
SATA_TXN3
SATA_TXP3
CLKIN_SATA_N
CLKIN_SATA_P
SATA_RCOMP
EDP_BKLTCTL
EDP_BKLTEN
EDP_VDDEN
SATALED-
B28
SATAHDR _RX0_DN
A28
SATAHDR _RX0_DP
F31
SATAHDR _TX0_DN
H31
SATAHDR _TX0_DP
D30
SATAHDR _RX1_DN
C30
SATAHDR _RX1_DP
B34
SATAHDR _TX1_DN
C34
SATAHDR _TX1_DP
A31
SATAHDR _RX2_DN
B31
SATAHDR _RX2_DP
B35
SATAHDR _TX2_DN
D35
SATAHDR _TX2_DP
B32
SATAHDR _RX3_DN
C32
SATAHDR _RX3_DP
G33
SATAHDR _TX3_DN
F33
SATAHDR _TX3_DP
A26
SATAHDR _RX4_DN
B26
SATAHDR _RX4_DP
L28
SATAHDR _TX4_DN
K28
SATAHDR _TX4_DP
C27
PCIEX1_HS I_R_DN
B27
PCIEX1_HS I_R_DP
G28
F28
H35
CK_SATA _PCH_DN
H36
CK_SATA _PCH_DP
J39
PCH_SAT A_LED_N
D33
M37
THRM_ID1
J40
H40
CLEAR_C MOS_N
N41
PCH_GPIO3 7_STRAP
M39
SATA4GP
N40
SATA5GP
AP2
AT2
AP1
SATA3RC OMP_PCH
TP_PCH_ AP2
TP_PCH_ AT2
TP_PCH_ AP1
SATAHDR _RX0_DN 3 2
SATAHDR _RX0_DP 32
SATAHDR _TX0_DN 32
SATAHDR _TX0_DP 32
SATAHDR _RX1_DN 3 2
SATAHDR _RX1_DP 32
SATAHDR _TX1_DN 32
SATAHDR _TX1_DP 32
SATAHDR _RX2_DN 3 2
SATAHDR _RX2_DP 32
SATAHDR _TX2_DN 32
SATAHDR _TX2_DP 32
SATAHDR _RX3_DN 3 2
SATAHDR _RX3_DP 32
SATAHDR _TX3_DN 32
SATAHDR _TX3_DP 32
SATAHDR _RX4_DN 3 2
SATAHDR _RX4_DP 32
SATAHDR _TX4_DN 32
SATAHDR _TX4_DP 32
PCH_SAT A_LED_N 4 5
R144
R144
THRM_ID1 40
PCH_GPIO1 9 18
CLEAR_C MOS_N 16
DP77 DP77
C683
C683
DP78 DP78
0.022UF_ 16V_X7R
0.022UF_ 16V_X7R
DP79 DP79
0402
0402
7K5_1%
7K5_1%
BOM NOTE: FOR T el Aviv(B85),Ch angbanpo FO(B8 5),NECPC(B85)
NOPOP R218 R221
0R
0R
0402
0402
0R
0R
0402
0402
SGPIO For Thunderbolt(C226)
BOM NOTE: For T hunderbolt(C226 )
PCH_SLO AD
PCH_SCL OCK
PCH_SDA TAOUT0
PCH_SDA TAOUT1
PCIEX1_HS I_DN 13,2 3
PCIEX1_HS I_DP 13,23
PCIEX1_HS O_DN 23
PCIEX1_HS O_DP 23
0R
0402
0402
0402
0402
0402
0402
0402
0402
0R
0R
0R
0R
0R
X_0R
X_0R
R763
R763
R730
R730
R665
R665
R156
R156
VCC1.5V_ PCH
R221
R221
R218
R218
PCIEX1
PCH_SLO AD_R
PCH_SCL OCK_R
PCH_SDA TAOUT0_R
PCH_SDA TAOUT1_R
C254
C254
X_47PF_ 50V_NPO
X_47PF_ 50V_NPO
JP110
JP110
1
2
3
4
SGPIO_HD_ 4P_721-81-04TW 00
SGPIO_HD_ 4P_721-81-04TW 00
N30
TP14
K36
VCC3
VCC3
G39
C40
G40
F40
F41
KBRST_P CH_N
SER_IRQ
PCH_THE RMTRIP_N_R
H_PECI_PC H
PLTRST_ PROC_N
RCIN-
SERIRQ
THRMTRIP-
PECI
PMSYNCH
PLTRST_PROC-
D D
PCH_GPIO1 9
PCH_GPIO3 7_STRAP
E E
F F
TLS CONFIDENTIA LITY
DISABLE
LOW:DISABLE
HIGH: ENABLE
1
R151
R151
R232
R232
R239
R239
R238
R238
0402
0402
0402
0402
10K
10K
X_10K
X_10K
0402
0402
0402
0402
1K
1K
X_10K
X_10K
VCC3
VCC3
2
LYNX_POINT
LYNX_POINT
SATA5GP
GPIO49 CAN BE U SE AS
SATA PORT5 (HIG H)/PCIE PORT2 ( LOW) MUX SELEC T IN LPT
BOM NOTE: FOR T el Aviv(B85),Ch angbanpo FO(B8 5),NECPC(B85)
POP R154
SATA4GP
GPIO16 CAN BE U SE AS
SATA PORT5 (HIG H) /PCIE PORT2 (LOW) MUX SELE CT IN LPT
R154
R154
R229
R229
R920
R920
R211
R211
3
0402
0402
0402
0402
0402
0402
0402
0402
10K
10K
X_10K
X_10K
10K
10K
X_10K
X_10K
4
R882 0R
R882 0R
0402
0402
R191
R191
0402
0402
R148
R148
0402
0402
R84
R84
C240
C240
X_47PF_ 50V_NPO
X_47PF_ 50V_NPO
HDMI_DET_ N
PCH_SAT A_LED_N
THRM_ID1
THRM_ID2
CLEAR_C MOS_N
0R
0R
0402
0402
0R
0R
X_0R
X_0R
R195
R195
R207
R207
R149
R149
R854
R854
R152
R152
R155
R155
A20GATE 39
KBRST_N 39
SER_IRQ 37,39
PCH_THE RMTRIP_N 4
H_PECI 39,4
H_PM_SYNC _0 4
PLTRST_ CPU_N 3,4
10K
10K
0402
0402
10K
10K
0402
0402
10K
10K
0402
0402
10K
10K
0402
0402
10K
10K
0402
0402
X_10K
X_10K
0402
0402
5
VCC3
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
Mississippi_uATX
Lynxpoint
Lynxpoint
Lynxpoint
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
6
A3
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
Monday, December 0 3, 2012
Monday, December 0 3, 2012
Monday, December 0 3, 2012
7
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
15 63
15 63
15 63
of
of
of
1
2ND_COM _N 42
L_AD[0..3] 37,39
VCC3
PCH_SPI_M OSI 1 7
PCH_SPI_M ISO 17
PCH_SPI_C S0_N 17
PCH_SPI_C LK 17
PCH_SPI_C S1_N 17
PCH_SPI_IO2 17
PCH_SPI_IO3 17
R220
R220
R233
R233
L_DRQ0_ N 39
L_FRAME _N 3 7,39
AC_BITCLK 34
AC_RST_ N 34,54
AC_SDIN2 34
AC_SDOU T 34
AC_SYNC 3 4
R171 20K_1%
R171 20K_1%
C93
C93
1UF_10V _X5R
1UF_10V _X5R
R174 20K_1%
R174 20K_1%
0402
0402
0402
0402
A A
B B
VBAT
VBAT
C C
L_AD0
L_AD1
L_AD2
L_AD3
T424 T424
T425 T425
T426 T426
0402
0402
0603
0603
0402
0402
C95 1UF_10V _X5R
C95 1UF_10V _X5R
0603
0603
PWRG D_3V 15,39,4 5,8
RSMRST_ PCH_N 38
PCH_DPW ROK 16,38
PCH_GPIO3 3
X_1K
X_1K
10K
10K
SIO_PME_N 39
WLA N_DETECT_N 23
SMLINK0_C LK 36
SMLINK0_D ATA 36
LAN_SEL 23
SMLINK1_C LK 39
SMLINK1_D ATA 39
R162 33R
R162 33R
R163 33R
R163 33R
TP_PCH_ BD22
TP_PCH_ BF22
TP_PCH_ BJ22
R165 33R
R165 33R
R166 33R
R166 33R
STRAPS
VCC3
0402
0402
390K
390K
390K
390K
X_1K
X_1K
0402
0402
SPKR
DSWO DVREN
PCH_INTVR MEN
PCH_GP8 4
IGC_EN_N
R340 X_1K
R340 X_1K
0402
D D
VBAT
VBAT
E E
0402
STUFF TO ENABLE NO-BOOT OPTION
AT POWER-UP
R404
R404
PU: enables the internal
Deep Sleep 1.05 V regulators.
R225
R225
0402
0402
R226
R226
0402
0402
PU: INTEGRATED 1.05V SUS VRM ENABLE
PD:DISABLE DISABLE SUS VRM
R197 0R
R197 0R
R230 1K
R230 1K
0402
0402
INTEGRATED CLOCK CHIP ENABLE
Low:Integrated clocking is enabled.
High:Buffer through mode is enabled.
PLACE <2 INCH FROM PCH
10K
10K
X_10K
X_10K
PCH_SUS CLK
LAN_OE
X_1K5
R676
R676
OD PLL VR ENABLE DISABLED WHEN SAMPLED LOW
SB3V
F F
X_1K5
0402
0402
R235
R235
0402
0402
R237
R237
0402
0402
DFX TEST MODE RING OSCILLATOR
BYPASS MODE ENABLED WHEN SAMPLED LOW
1
2
2ND_COM _N
L_DRQ0_ N
HDA_BCL K
0402
0402
HDA_RST _N
0402
0402
HDA_SDO
0402
0402
HDA_SYNC
0402
0402
TP_SPI_CS 2_N
T420 T420
RTX1
RTX2
RTCRST_ N
SRTCRST _N
INTRUDER_ HDR_N
PWRG D_3V
RSMRST_ PCH_N
PCH_INTVR MEN
DSWO DVREN
SIO_PME_N
SMB_CLK _STBY_R
SMB_DAT A_STBY_R
WLA N_DETECT_N
SMLINK0_C LK
SMLINK0_D ATA
LAN_SEL
SMLINK1_C LK
SMLINK1_D ATA
ME disable header
SB3V
HIGH:Disable ME in Manufacturi ng Mode
XTAL_32 .768K_DIP_SMD_C O_LAY_H
XTAL_32 .768K_DIP_SMD_C O_LAY_H
JP39
JP39
U-BRASS_ WIRE_P5.08MM
U-BRASS_ WIRE_P5.08MM
1 2
2
AK26
AN24
AP26
AJ24
AN26
AK22
AP24
AV23
AU24
AT26
AV22
AT22
AW23
AU22
AV24
AN40
AN39
AR38
AR39
AR41
AT40
AM40
AV36
AV38
AM41
AG31
AG36
AG32
AG35
AE32
AE35
AJ39
AK36
AK33
AC_SDOU T
R196
R196
U2D
U2D
LDRQ1-_GPIO23
LAD0
LAD1
LAD2
LAD3
LDRQ0ÂLFRAME-
HDA_BCLK
HDA_RSTÂHDA_SDI0
HDA_SDI1
HDA_SDI2
HDA_SDI3
HDA_SDO
HDA_SYNC
P40
SPI_MOSI
R36
SPI_MISO
R38
SPI_CS0-
U39
SPI_CLK
R35
SPI_CS1-
R40
SPI_CS2-
U40
SPI_IO2
U37
SPI_IO3
RTCX1
RTCX2
RTCRSTÂSRTCRSTÂINTRUDERÂPWROK
RSMRSTÂINTVRMEN
DPWROK
DSWVRMEN
SMBALERT-_GPIO11
SMBCLK
SMBDATA
SML0ALERT-_GPIO60
SML0CLK
SML0DATA
SML1ALERT-_PCHHOT-_GPIO74
SML1CLK_GPIO58
SML1DATA_GPIO75
LYNX_POINT
LYNX_POINT
SB3V
E
E
2 3
R240
R240
1K
1K
1K
1K
0402
0402
NC1
NC1
NC2
NC2
GND
GND
H1_GND
H1_GND
H2_GND
H2_GND
12PF_50 V_NPO
12PF_50 V_NPO
1
B
B
C
C
AC_SDOU T_PU
0402
0402
5PPM 12.5PF
X3
X3
2
1
9
C98
C98
Q252
Q252
3906_SO T23
3906_SO T23
7
8 6
3
4
5
3
4of10
4of10
BMBUSY-_GPIO0
DOCKEN-_GPIO33
LAN_PHY_PWR_CTRL_GPIO12
HDA_DOCK_RST-_GPIO13
SLP_WLAN-_GPIO29
PCIECLKRQ0-_GPIO73
PCIECLKRQ1-_GPIO18
PCIECLKRQ2-_GPIO20_SMI-
PCIECLKRQ3-_GPIO25
PCIECLKRQ4-_GPIO26
PCIECLKRQ5-_GPIO44
PCIECLKRQ6-_GPIO45
PCIECLKRQ7-_GPIO46
SYS_PWROK
SLP_S5-_GPIO63
SUS_STAT-_GPIO61
SUSCLK_GPIO62
SUSWARN-_SUSPWRNACK_GPIO30
DRAMPWROK
ACPRESENT_GPIO31
SYS_RESET-
PROCPWRGD
R696
R696
1K
1K
ME_CNTL _R
ME_DISABL E
3
0402
0402
ME_CNTL 39
JP15
JP15
1
2
HEADER_ 1X2_2.54MM
HEADER_ 1X2_2.54MM
RTX1 RTX2
R227 10M
R227 10M
0402
0402
12PF_50 V_NPO
12PF_50 V_NPO
GPIO32
GPIO34
GPIO8
GPIO15
GPIO24
GPIO28
GPIO57
WAKEÂSLP_A-
SLP_LAN-
TP21
SLP_S3ÂSLP_S4-
GPIO72
SUSACK-
GPIO27
SLP_SUSÂPWRBTN-
SPKR
TP20
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
C99
C99
4
PCH LPC/ HDA/ SPI/SMB
G38
SIO_SCI_N
N32
PCH_GPO 32
AV26
PCH_GPIO3 3
N34
AC40
IGC_EN_N
AL40
AN22
GPIO_PCIE_RE SET GPIO_PCIE_RE SET
AC32
IBUTTON_G PIO15
AE34
H_SKTOC C_R_N
V41
PW_ LED_N
AL39
PCH_GPIO2 9_PU
W34
PCH_GP7 3_PD
P39
PCH_GP1 8_PD
P37
BT_DISABL E_N
AA39
PCH_GP2 5_PD
W35
PCH_GP2 6_PD
AA36
LAN_OE
W32
LPT_PINHE ADER_N
AA40
TPM_DISAB LE_N
AC36
PCH_GP5 7_LEO
W31
PCH_SYSPW ROK
AE36
RI-
AK34
WAKE _N
AN37
SLP_M_N _BC41
AU36
AC35
TP_PCH_ AC35
AK40
SLP_S3_ N_AK40
AT35
SLP_S4_ N_R
AA35
TP_PCH_ AA35
AD37
L_LPCPD _N
W36
PCH_SUS CLK
AJ40
PCH_GPIO7 2_PU
AJ37
SUS_PW R_ACK
AG41
SUS_W ARNB
AE38
H_DRAMP WRGD
AU34
LANW AKE_N
AM36
SUS_LED _N
AK38
AK41
SW_ ON_N
N36
DBRESET _N
R32
D40
W37
TP_PCH_ JTAG_TRST
Y40
TP_JTAG _TCK
W39
TP_JTAG _TDI
Y38
TP_JTAG _TDO
W40
TP_JTAG _TMS
SB3V
R49
R49
R683
R683
R682
R682
R755
R755
R483
R483
R681
R681
R751
R751
SB3V_DS W
VBAT
2
D2
3
BAT54CD2BAT54C
1
R228 1K
R228 1K
CM19 CM19
4
SIO_SCI_N 39
PCH_GPO 32 37
BRD_ID2 17
LAN_DISAB LE_N 3 6
GPIO_PCIE_RE SET 2 2
IBUTTON_G PIO15 17
R146 0R
R146 0R
R615 0R
R615 0R
R242 0R
R242 0R
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
ADD1
ADD1
BATTERY_C R2032
BATTERY_C R2032
For U6
0402
0402
BT_DISABL E_N 23
LAN_OE 23
LPT_PINHE ADER_N 40
TPM_DISAB LE_N 37
PCH_GP5 7_LEO 37
0402
0402
SLP_LAN _N 49
T423 T423
0402
0402
T432 T432
L_LPCPD _N 37
SUS_PW R_ACK 51
SUS_W ARNB 51
LANW AKE_N 36
SUS_LED _N 45
SLP_SUS B 51
SW_ ON_N 16,23,3,39,4 2,45
DBRESET _N 3,4,45
SPKR 34
H_PW RGD 3,4,46
T439 T439
T440 T440
T441 T441
R108
R108
T442 T442
20K
20K
T443 T443
R109
R109
10K
10K
200R_1%
200R_1%
100R_1%
100R_1%
200R_1%
200R_1%
100R_1%
100R_1%
200R_1%
200R_1%
100R_1%
100R_1%
51R
51R
+
+
CR2032
CR2032
BATTERY_R B ATTERY
0402
0402
BATTERY_B B80
BATTERY_B B80
SB3V
TP_JTAG _TCK
U6
U6
5
H_DRAMP WRGD
H_SKTOC C_N 4,45
PW_ LED_N 45
NOPOP FOR FAST BOOT
R172 0R
R172 0R
0402
WOR_ N 42
WAKE _N 22,2 3,43
SLP_M_N 49,50
SLP_S3_ N 19,23,3 0,39,42,45,46,48,4 9,50,51
0402
0402
TP_PCH_ JTAG_TRST
0402
0402
C73
C73
X_1UF_6.3V_X5R
X_1UF_6.3V_X5R
TP_JTAG _TDO
TP_JTAG _TDI
TP_JTAG _TMS
0402
SW_ ON_N 16,23,3,39 ,42,45
PCH_DPW ROK 16,38
PCH_MEP WROK_R 15
SLP_S4_ N_R
SLP_S3_ N
SMB_CLK _STBY_R
SMB_DAT A_STBY_R
ADD3
ADD3
MINI_JUMPER1 X2_P2.54_H13.5 3_Y
MINI_JUMPER1 X2_P2.54_H13.5 3_Y
R283
R283
100PF_5 0V_NPO
100PF_5 0V_NPO
For JP10-1,2
CLEAR_C MOS_N 15
1-2 : DEFAULT
2-3 : CLEAR CMO S
RTCRST_ N
RTCRST_ N_N
0402
+
+
5
0402
R231
R231
X_4K7
X_4K7
6
VCC1.5V_ DDR3
1K8_1%
0402
0402
0402
0402
1K8_1%
3K3_1%
3K3_1%
R178
R178
R182
R182
PLACE CLOSE TO CPU WITHIN 3"
POP FOR FAST BO OT
R416 X_0R
R416 X_0R
0402
0402
C294
C294
R201
R201
0402
0402
R203
R203
0402
0402
STUFF R405 FOR NON SUPPORT HANDSHAKE MECHANISM.
0402
0402
VRMPW RGD 3,4,46
PCH_SYSPW ROK 3,39
PCH_SYSPW ROK
RSMRST_ PCH_N
H_DRAMP WRGD
AC_BITCLK
PWRG D_3V
Close to PCH
C92 0.01UF_16V_X7R C92 0.01UF_16V_X7R
0R
0R
C284
C284
100PF_5 0V_NPO
100PF_5 0V_NPO
0R
0R
0R
0R
R405 X_0R
R405 X_0R
R407 X_1K
R407 X_1K
0402
0402
PWRG D_3V
C412 X_22PF_50V_NPO C412 X_22PF_50V_NPO
C373 X_22PF_50V_NPO C373 X_22PF_50V_NPO
C274 X_22PF_50V_NPO C274 X_22PF_50V_NPO
C411 X_22PF_50V_NPO C411 X_22PF_50V_NPO
SLP_S4_ N 17,30,3 9,45,48,51
SMB_CLK _STBY 17,22,23,44
SMB_DAT A_STBY 17,22,23,44
C96 X_ 330PF_50V_X7 R C96 X _330PF_50V_X 7R
C97 X_ 330PF_50V_X7 R C97 X _330PF_50V_X 7R
0402
0402
CLEAR CMOS BATTERY RTC SOURCE
JP10
JP10
1
NC
CLEAR_C MOS_N
JP11
JP11
1
2
X_HEADE R_1X2_2.54MM
X_HEADE R_1X2_2.54MM
6
2
CLEAR
3
GND
CLEAR_C MOS_3X1
CLEAR_C MOS_3X1
7
TPM_DISAB LE_N
IBUTTON_G PIO15
LAN_SEL
PCH_GP5 7_LEO
LPT_PINHE ADER_N
0402
0402
C94 0.01UF_25V_X7R
C94 0.01UF_25V_X7R
WLA N_DETECT_N
SMB_CLK _STBY
SMB_DAT A_STBY
SIO_PME_N
SMLINK1_C LK
SMLINK1_D ATA
SLP_LAN _N
SMLINK0_C LK
SMLINK0_D ATA
PW_ LED_N
H_SKTOC C_R_N
SIO_SCI_N
PCH_SYSPW ROK
DBRESET _N
BT_DISABL E_N
2ND_COM _N
PCH_GPO 32
0603
0603
SW_ ON_N
LANW AKE_N
PCH_GPIO7 2_PU
WAKE _N
PCH_GPIO2 9_PU
SUS_LED _N
SUS_W ARNB
PCH_GP1 8_PD
PCH_GP2 6_PD
PCH_GP7 3_PD
SPKR
PCH_GP2 5_PD
TPM_DISAB LE_N
SIO_SCI_N
TPM_DISAB LE_N
R280
R280
R439
R439
R276
R276
R202
R202
R917
R917
R848
R848
R587
R587
R396
R396
R729 10K
R729 10K
R392
R392
R342
R342
R209
R209
R678
R678
R204
R204
R394
R394
H_DRAMP WRGD 4
C413 100PF_50V_NPO C413 100PF_50V_NPO
C657 X_10PF_50V_NPO C657 X_10PF_50V_NPO
R656 10K
R656 10K
DEFAULT USE PCH TO CONTROL SB PWR
SUS_PW R_ACK SUS_W ARNB
JTAG CLK FILTER IS BYPASSED WH EN SAMPLED LOW
VBAT
TITLE:
TITLE:
TITLE:
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
CASE INTRUDER HEADER
INTRUDER_ HDR_N
R222 1M
R222 1M
2 pin header re serve only
Mississippi_uATX
Mississippi_uATX
Mississippi_uATX
Lynxpoint
Lynxpoint
Lynxpoint
Date: PAGE:
Date: PAGE:
Date: PAGE:
7
INTRUDER_ HDR_N
0402
0402
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
JP21
JP21
1
2
X_HEADE R_1X2_2.54MM
X_HEADE R_1X2_2.54MM
8
10K
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
499R_1%
499R_1%
0402
0402
499R_1%
499R_1%
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
SB3V_DS W
3K
3K
4K7
4K7
1K
1K
1K
1K
10K
10K
10K
10K
X_10K
X_10K
10K
10K
0402
0402
0402
0402
10K
10K
0402
0402
X_10K
X_10K
0402
0402
10K
10K
0402
0402
X_10K
X_10K
0402
0402
X_10K
X_10K
0402
0402
X_100R
X_100R
JP9
JP9
1
2
BOX_2X1 _TAMPER
BOX_2X1 _TAMPER
REV:
REV:
REV:
16 63
16 63
16 63
8
10K
2K2
2K2
10K
10K
10K
10K
10K
10K
10K
10K
X_10K
X_10K
2K7
2K7
2K7
2K7
10K
10K
10K
10K
10K
10K
X_10K
X_10K
1K
1K
10K
10K
X_10K
X_10K
2K2
2K2
10K
10K
X_10K
X_10K
10K
10K
X_10K
X_10K
R288
R288
R224
R224
R260
R260
R193
R193
R192
R192
R206
R206
R200
R200
R208
R208
R210
R210
R213
R213
R219
R219
R274
R274
R674
R674
R393
R393
R395
R395
R217
R217
R402 X_1K
R402 X_1K
R341 X_10K
R341 X_10K
R199
R199
R216
R216
R205
R205
R214
R214
R236
R236
R215
R215
R300
R300
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
of
of
of
V0.4
V0.4
V0.4
SB3V
VCC3
VCC3
1
2
3
4
5
6
7
8
PCH_SPI_M OSI 1 6
PCH_SPI_M ISO 16
PCH_SPI_C S0_N 16
A A
B B
PCH_SPI_C S1_N 16
PCH_SPI_C LK 16
PCH_SPI_IO2 16
PCH_SPI_IO3 16
PCH_SPI_M ISO
PCH_SPI_M OSI PCH_SPI_M OSI_R1
PCH_SPI_C S0_R_N
PCH_SPI_IO2
PCH_SPI_IO3
PCH_SPI_M OSI
PCH_SPI_M ISO
PCH_SPI_C S0_N
PCH_SPI_C S1_N
PCH_SPI_C LK
PCH_SPI_IO2
PCH_SPI_IO3
R675 33R
R675 33R
0402
0402
R167
R167
0402
0402
R168
R168
0402
0402
R170
R170
0402
0402
R169
R169
0402
0402
R175
R175
0402
0402
VCC3.3V_ CL
R160
R160
1K
1K
PCH_SPI_IO2
PCH_SPI_IO3
0402
0402
33R
33R
47R_1%
47R_1%
47R_1%
47R_1%
33R
33R
33R
33R
0402
0402
R161
R161
1K
1K
PCH_SPI_M ISO_R1
PCH_SPI_C LK_R1 PCH_SPI_C LK
PCH_SPI_C S0_R1_N
PCH_SPI_IO2_ R1
PCH_SPI_IO3_ R1
0402
0402
R164
R164
X_1K
X_1K
CLOSE TO U5
C C
PCH_SPI_M ISO
PCH_SPI_M OSI PCH_SPI_M OSI_R2
PCH_SPI_C S1_R_N
PCH_SPI_IO2
PCH_SPI_IO3
D D
PCH_SPI_C LK_R1
PCH_SPI_C S0_R1_N
PCH_SPI_IO2_ R1
PCH_SPI_IO3_ R1
J16
J16
5
DIO
6
CLK
1
CS-
3
WP-
7
HOLD-
R680 33R
R680 33R
R173
R173
R176
R176
R184
R184
R179
R179
R183
R183
VCC3.3V_ CL
8
VCC
DO
GND
4
SPI_FLASH _SOCKET_ACAS PI004K01
SPI_FLASH _SOCKET_ACAS PI004K01
0402
0402
33R
33R
0402
0402
47R_1%
47R_1%
0402
0402
47R_1%
47R_1%
0402
0402
33R
33R
0402
0402
33R
33R
0402
0402
2
PCH_SPI_M ISO_R1
PCH_SPI_M ISO_R2
PCH_SPI_C LK_R2 PCH_SPI_C LK
PCH_SPI_C S1_R2_N
PCH_SPI_IO2_ R2
PCH_SPI_IO3_ R2
PCH_SPI_M OSI_R2
PCH_SPI_C LK_R2
PCH_SPI_C S1_R2_N
PCH_SPI_IO2_ R2
PCH_SPI_IO3_ R2
0402
0402
R177
R177
X_1K
X_1K
U4
U4
5
6
1
3
7
U5
U5
5
6
1
3
7
J19
J19
5
6
1
3
7
VCC3.3V_ CL
CB80 CB80
8
DI_IO0
VCC
CLK
CS-
DO_IO1
WP-_IO2
HOLD-_IO3
GND
W25 Q64CVSSIG
W25 Q64CVSSIG
4
ME FW+SBIOS
VCC3.3V_ CL
CB83 CB83
8
DI_IO0
VCC
CLK
CS-
DO_IO1
WP-_IO2
HOLD-_IO3
GND
W25 Q32BVSSIG-T
W25 Q32BVSSIG-T
4
SBIOS
VCC3.3V_ CL
8
DIO
CLK
VCC
CSÂWPÂHOLD-
2
DO
GND
4
SPI_FLASH _SOCKET_ACAS PI004K01
SPI_FLASH _SOCKET_ACAS PI004K01
0603
0603
C392
C392
2.2UF_6.3V_X5R
2.2UF_6.3V_X5R
2
8MB
0603
0603
C401
C401
2.2UF_6.3V_X5R
2.2UF_6.3V_X5R
2
4MB
PCH_SPI_M ISO_R2
iBUTTON For Thunderbolt(C226)
J27
IBUTTON_G PIO15 16
VCC3
(5582.00 -8364)
(555.00 -7272)
PWRG D_PS 39,45,51
CB263 CB263
CB270 CB270
R180
R180
VCC5
PWRG D_PS
IBUTTON_G PIO15_R
0R
0R
0402
0402
Q121A
Q121A
R1076 33K
R1076 33K
0402
0402
C103
C103
X_1UF_6 .3V_X5R
X_1UF_6 .3V_X5R
J27
1
2
HD_1X2_ 2.54MM_ASP-138 676-01
HD_1X2_ 2.54MM_ASP-138 676-01
R1075
R1075
10K
10K
Q121B
Q121B
MBT3904 DW1T1G
MBT3904 DW1T1G
MBT3904 DW1T1G
MBT3904 DW1T1G
+12V
SB5V
0402
0402
R1081
R1081
0402
0402
47K
47K
Q121_3
C
C
B
B
5
Q121_6
E
E
4 3
C
C
B
B
2
E
E
1 6
SLP_S4_ N 16,3 0,39,45,48,51
SMB_CLK
SMB_DAT A
1
G
G
2 3
S
S
R1079 X_0R
R1079 X_0R
1
G
G
2 3
S
S
R1080 X_0R
R1080 X_0R
Q80
Q80
SMB_CLK
SMB_DAT A Q121_1
0402
0402
0402
0402
D
D
2N7002
2N7002
D
D
2N7002
2N7002
Q79
Q79
BOARD ID : 0 0 0 1
BRD_ID3 15
BRD_ID2 16
BRD_ID1 15
BRD_ID0 15
BRD_ID3
BRD_ID2
BRD_ID1 PCH_SPI_M OSI_R1
BRD_ID0
SMB_DAT A_STBY
SMB_CLK _STBY
R185
R185
R431
R431
R432
R432
JP111_S 4
0R
0R
0402
0402
BOX_HD_ 1X4_1.25MM_HS 8104E_SMD
BOX_HD_ 1X4_1.25MM_HS 8104E_SMD
VCC3
8K2
8K2
0402
0402
8K2
8K2
0402
0402
SMB_CLK 10,11 ,3,37
SMB_CLK _STBY 16,22,23,44
SMB_DAT A 10,11,3,37
SMB_DAT A_STBY 16,22,23,44
R198
R198
0402
0402
R153
R153
0402
0402
R679
R679
0402
0402
R143 10K
R143 10K
0402
0402
R295
R295
0402
0402
R296
R296
0402
0402
R297
R297
0402
0402
R302
R302
0402
0402
X_10K
X_10K
X_10K
X_10K
X_10K
X_10K
10K
10K
10K
10K
X_10K
X_10K
10K
10K
JP111
JP111
1
2
3
4
H1
H2
VCC3
E E
R262
ADD2
R259
PCH_SPI_C S0_N PCH_SPI_C S0_R_N
PCH_SPI_C S0_R_N
PCH_SPI_C S0_N
PCH_SPI_M ISO
PCH_SPI_IO2
F F
R259
JP7
JP7
1
CS-_ROM
CS-_PCH3VCC
DO5HOLDÂWP-7CLK
9
GND
SPI_DEBUG _HD_2X5_1.27M M_N2_SMD
SPI_DEBUG _HD_2X5_1.27M M_N2_SMD
0402
0402
DI
X_0R
X_0R
4
6
PCH_SPI_IO3
8
PCH_SPI_C LK
10
PCH_SPI_M OSI
VCC3.3V_ CL
ADD2
MINI_JUMPER1 X2_P1.27_H5.5_ BLACK
MINI_JUMPER1 X2_P1.27_H5.5_ BLACK
R262
PCH_SPI_C S1_R_N
PCH_SPI_C S1_N
For JP7 PIN1-3
1
2
3
4
PCH_SPI_C S1_R_N PCH_SPI_C S1_N
X_0R
X_0R
0402
0402
JP12
JP12
1
2
HEADER_ 1X2_2.54MM
HEADER_ 1X2_2.54MM
ADD4
ADD4
MINI_JUMPER1 X2_P2.54_H13.5 3_Y
MINI_JUMPER1 X2_P2.54_H13.5 3_Y
For JP12-1,2
5
6
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
Mississippi_uATX
Lynxpoint
Lynxpoint
Lynxpoint
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
7
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
17 63
17 63
17 63
of
of
of
1
2
3
4
5
6
7
8
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
VCC3
VCC3
0402
0402
0402
0402
0402
0402
0402
0402
P_INTA_N
P_INTB_N
P_INTC_N
P_INTD_N
R271 8K2
R271 8K2
R277 8K2
A A
B B
R277 8K2
R279 8K2
R279 8K2
R289 8K2
R289 8K2
SB3V
R254 X_10K
R254 X_10K
CK_PCH_ 33M_FB 14
R252 8K2_1%
R252 8K2_1%
0402
0402
VCC3
R609
R609
R287
R287
R270
R270
R286
R286
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
T384 T384
T386 T386
T394 T394
T393 T393
8K2
8K2
8K2
8K2
8K2
8K2
8K2
8K2
PCH_PME _N
TP_PCH_ A2
TP_PCH_ A3
TP_PCH_ B2
TP_PCH_ B1
P_INTA_N
P_INTB_N
P_INTC_N
P_INTD_N
PCH_GPIO2 _PU
PCH_GPIO3 _PU
PCH_GPIO4 _PU
PCH_GPIO5 _PU
ID_IREF
U2A
U2A
AA31
PME-
AM22
CLKIN_33MHZLOOPBACK
A2
TP1
A3
TP2
B2
TP4
B1
TP3
C3
TD_IREF
AU29
PIRQA-
AU27
PIRQB-
AW28
PIRQC-
AV27
PIRQD-
AR30
PIRQE-_GPIO2
AV29
PIRQF-_GPIO3
AV28
PIRQG-_GPIO4
AT27
PIRQH-_GPIO5
LYNX_POINT
LYNX_POINT
1of10
1of10
GPIO35_NMI-
PLTRST-
GPIO50
GPIO51
GPIO52
GPIO53
GPIO54
GPIO55
AA37
M40
F_USB1_ PRES_N
AH26
PCH_GP5 0_DISTCM
AU31
PCH_GPIO5 1
AJ26
F_USB2_ PRES_N
AV31
PCH_GPIO5 3
AW33
PS2_PINHE ADER_N
R30
PLTRST_ N 22,36,39 ,4,54
F_USB1_ PRES_N 27
PCH_GP5 0_DISTCM 37
F_USB2_ PRES_N 29
PS2_PINHE ADER_N 42
PCH_GPIO1 9 15
PCH_GP5 0_DISTCM
F_USB1_ PRES_N
F_USB2_ PRES_N
PS2_PINHE ADER_N
PCH_GPIO5 3
DMI AC COUPLING
FULL VOLTAGE MODE WHEN SAMPLED LOW
PCH_GPIO5 5 PCH_GPIO5 5
A16 SWAP OVERRIDE OVERRIDE IF SAMPLED LOW
PCH_GPIO5 1
R256 8K2
R256 8K2
R265 10K
R265 10K
R266 10K
R266 10K
R267 10K
R267 10K
R264 X_1K
R264 X_1K
R263 X_1K
R263 X_1K
R258 X_1K
R258 X_1K
R257 X_1K
R257 X_1K
BOOT SELECT STRAPS
BOOT DEVICE GPIO19 GPIO51
LPC 0 0
*
SPI 1 1
C C
PCH DISPLAY
U2E
U2E
DDPB_DP _HPD 2 6
DDPC_DP _HPD 25
DDPD_DP _HPD 24
DDPB_AU X_DN 2 6
DDPB_AU X_DP 26
DDPC_AU X_DN 25
DDPC_AU X_DP 2 5
DDPD_AU X_DN 24
D D
DDPD_AU X_DP 2 4
AH5
AK6
AK8
AG7
AG6
AG11
AG10
AJ2
AJ4
DDPB_HPD
DDPC_HPD
DDPD_HPD
DDPB_AUXN
DDPB_AUXP
DDPC_AUXN
DDPC_AUXP
DDPD_AUXN
DDPD_AUXP
LYNX_POINT
LYNX_POINT
5of10
5of10
VGA_HSYNC
VGA_VSYNC
VGA_RED
VGA_GREEN
VGA_BLUE
VGA_IRTN
VGA_DDC_DATA
VGA_DDC_CLK
DAC_IREF
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPD_CTRLCLK
DDPD_CTRLDATA
AH3
AH2
AC2
AE2
AC3
AG4
AL3
AL2
AF5
AN3
AM2
AM1
AJ5
AN4
AN2
VGA_HSYNC
VGA_VSYNC
VGA_DDC _DATA_3V
VGA_DDC _CLK_3V
VGA_DAC REFSET
PLACE SERIES RESISTORS CLOSE TO PCH, <750
MILS TO PCH BALLS
R245 33R
R245 33R
R244 33R
R244 33R
VGA_RED 26
VGA_GRE EN 26
VGA_BLU E 26
VGA_DDC _DATA_3V 26
VGA_DDC _CLK_3V 26
DDPC_CT RLCLK 25
DDPC_CT RLDATA 25
DDPB_CT RLCLK 26
DDPB_CT RLDATA 26
DDPD_CT RLCLK 24
DDPD_CT RLDATA 24
0402
0402
0402
0402
X_18PF_ 50V_NPO
X_18PF_ 50V_NPO
VGA_RED
VGA_GRE EN
VGA_BLU E
C100
C100
R246 150R_1%
R246 150R_1%
R247 150R_1%
R247 150R_1%
R248 150R_1%
R248 150R_1%
VGA_HSYNC_ 3V 26
VGA_VSYNC_ 3V 2 6
C101
C101
X_18PF_ 50V_NPO
X_18PF_ 50V_NPO
0402
0402
0402
0402
0402
0402
PLACE VGA RGB RESISTORS CLOSE TO PCH, <250
MILS TO PCH BALLS
PLACE DACREF RESISTOR CLOSE TO PCH, <500
VGA_DAC REFSET
E E
VGA_DDC _DATA_3V
VGA_DDC _CLK_3V
F F
1
2
3
4
5
6
R249 649R_1 %
R249 649R_1 %
R261 2K2_1%
R261 2K2_1%
R293 2K2_1%
R293 2K2_1%
0402
0402
0402
0402
0402
0402
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
Mississippi_uATX
Lynxpoint
Lynxpoint
Lynxpoint
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
7
Date: PAGE:
Date: PAGE:
Date: PAGE:
MILS TO PCH BALL
VCC3
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
18 63
18 63
18 63
of
of
of
1
VCC1.05V _PCH
AA19
A A
AA20
AB16
AB17
AB19
AB20
AD16
V17
V19
V20
V22
V23
V25
W17
W19
W23
W25
AC12
B B
C C
D D
E E
V_1P05_ XCK_DCB_FB_R
VCC1.05V _PCH
PLACE CLOSE AJ24, AN22
VCC1.05V _ME
AB1
U12
V14
W14
AB2
AA16
W16
V16
P14
P16
P17
P22
P23
P25
P26
P28
AF19
AF20
AF22
AF23
AP22
M14
AA23
AA25
AA26
AB22
AB23
AB25
AB26
AD17
AD19
AD20
AD22
AD23
W26
AD25
AF25
T16
T19
T20
U2H
U2H
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCCIO_1
VCC_18
VCCCLK_1
VCCCLK_2
VCCCLK_3
VCCCLK_4
VCCCLK_5
VCCCLK_6
VCCCLK_7
VCCCLK_8
VCCIO_2
VCCIO_3
VCCIO_4
VCCIO_5
VCCIO_6
VCCIO_7
VCCIO_8
VCCIO_9
VCCIO_10
VCCIO_11
VCCIO_12
VCCIO_13
VCCIO_14
VCCIO_15
VCCUSBPLL
VCCIO_16
VCCASW_1
VCCASW_2
VCCASW_3
VCCASW_4
VCCASW_5
VCCASW_6
VCCASW_7
VCCASW_8
VCCASW_9
VCCASW_10
VCCASW_11
VCCASW_12
VCCASW_13
VCCASW_14
VCCASW_15
LYNX_POINT
LYNX_POINT
2
8of10
8of10
VCCADAC1_5
VCCADACBG3_3
VCCCLK3_3_1
VCCCLK3_3_2
VCCCLK3_3_3
VCCCLK3_3_4
VCCCLK3_3_5
VCCCLK3_3_6
VCCCLK3_3_7
VCCCLK3_3_8
VCCCLK3_3_9
VCCCLK3_3_10
VCCCLK3_3_11
VCCCLK3_3_12
VCCCLK3_3_13
VCCSUSHDA
VCCSUS3_3_3
VCCSUS3_3_4
VCCSUS3_3_5
VCCSUS3_3_6
VCCSUS3_3_7
VCCSUS3_3_8
VCCSUS3_3_9
VCCSUS3_3_10
VCCSUS3_3_11
VCCDSW3_3_1
VCCDSW3_3_2
VCCDSW3_3_3
DCPSUSBYP_1
DCPSUSBYP_2
DMI_IREF
FDI_IREF
ICLK_IREF
PCIE_IREF
SATA_IREF
VCCVRM_1
VCCVRM_2
VCCVRM_3
VCCVRM_4
VCCVRM_5
VCCVRM_6
VCCVRM_7
VCCVRM_8
VCCVRM_9
VCCVRM_10
VCCVRM_11
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
VCC3_3_7
VCCSPI
VCCRTC_2
V_PROC_IO
DCPSUS2
DCPRTC
DCPSST
DCPSUS1
DCPSUS3
3
VCC1.5V_ PCH
A19
N11
N10
B13
A33
B37
A38
K1
B39
A39
A40
T14
C2
C1
B4
A4
AF2
AE1
B6
AW21
AM7
AM9
AP5
AP7
AR4
AT5
AV4
AW4
AW9
AG12
AK11
AV3
AW3
U30
W30
AF26
AG1
R41
AW26
AM33
AN33
AH18
AH20
AH22
AJ20
AK20
P20
AP35
AV39
AW38
AW39
AP33
C39
AU40
V_1P05_ DSW_INT_R V_1P05_ DSW_INT
AU41
AJ22
TP_PCH_ AJ22
AW35
AH28
AE30
P19
CB192
CB192
X_0.1UF_ 16V_X7R
X_0.1UF_ 16V_X7R
VCCA_DA C
CB108
CB108
Power
V_1P5_R TC_INT
V_1P5_S TBY_INT
TP_PCH_ AE30
TP_PCH_ P19
X7R
X7R
VCC1.5V_ PCH
CB215
CB215
VCC3
VCC3
VCC3.3V_ CL
SB3V
X7R
X7R
CB103
CB103
SB3V_DS W
X7R
X7R
V_CPU_V CCIO2PCH 21,7
VCC1.5V_ PCH
X7R
X7R
C89
C89
X7R
X7R
CB107
CB107
VBAT
CB94
CB94
R581 5R1_1%
R581 5R1_1%
T399 T399
CB175
CB175
CB187
CB187
T398 T398
T397 T397
VCC3.3V_ CL
0402
0402
V_3P3_B G
X7R
X7R
CB40
CB40
1UF_6.3V_X5R
1UF_6.3V_X5R
C106
C106
1UF_6.3V_X5R
1UF_6.3V_X5R
PLACE CLOSE AP33
X7R
X7R
X7R
X7R
X7R
X7R
4
PCH POWER
Power
VCC3
X7R
X7R
0603
0603
C68
C68
4.7UF_10V_X5R
4.7UF_10V_X5R
CB194
CB194
C122 1UF_6.3V_ X5R C12 2 1UF_6.3V _X5R
5
SLP_S3_ N 16,23,30,3 9,42,45,46,48,49,50 ,51
0402
0402
R932
R932
1K
1K
U83_EN
0603
0603
C131
C131
X_0.1UF_16V_X7R
X_0.1UF_16V_X7R
VCC1.5V_ PCH
VCC3 VCC3
0603
0603
C123
C123
1UF_10V_X5R
1UF_10V_X5R
L3
L3
FB_0603
FB_0603
X_FB_60 0R_100MHZ_20 0MA
X_FB_60 0R_100MHZ_20 0MA
VCC1.5V_ PCH
X_MBT39 04DW1T1G
X_MBT39 04DW1T1G
R910 X_1K
R910 X_1K
0402
0402
R919 X_2K
R919 X_2K
0402
0402
R918 X_10K
R918 X_10K
0402
0402
Q247B
Q247B
X_MBT39 04DW1T1G
X_MBT39 04DW1T1G
VCC1.05V _PCH
L60
L60
10UH_10 0MA
10UH_10 0MA
U83
U83
1
2
3
NCP603S NADJT1G
NCP603S NADJT1G
/NCT3703U-A
Q247A
Q247A
Q247_2
Q247_5
6
VIN
GND
ENABLE
VOUT
ADJ_NC
5
4
U83_ADJ
0402
0402
R602
R602
20K_1%
20K_1%
0402
0402
R604
R604
100K_1%
100K_1%
7
FB_0603
FB_0603
0603
0603
C124
C124
4.7UF_10V_X5R
4.7UF_10V_X5R
0.1A
R494 0R
R494 0R
CP26 CP26
C102
C102
1UF_6.3V_X5R
1UF_6.3V_X5R
SB3V
0402
0402
R921
R921
X_4K7
X_4K7
R922 X_10K
R922 X_10K
C
C
B
B
2
E
E
1 6
Q247_3
C
C
B
B
5
E
E
4 3
R924 X_10K
R924 X_10K
VCCA_DA C VCCA_DA C_R
0402
0402
<100 mils from PCH
+12V
0402
0402
R923
R923
X_22K
X_22K
Q69_3
C
C
B
B
1
Q69_1 Q24 7_6
0402
0402
0402
0402
Q69
Q69
Q52_1
E
E
2 3
X_3904_SOT23
X_3904_SOT23
0805
0805
D
D
G
G
1
S
S
2 3
VCCA_DA C 54
VCC3
G
G
1
R1345
R1345
X_0R
X_0R
Q52
Q52
X_2N700 2
X_2N700 2
FOR SEQUENCING REQUIREMENT
V_1P05_ XCK_DCB_R V_1P05_ XCK_DCB_FB_R
L_0805
L_0805
R272 0R
R272 0R
0402
0402
C762 1UF_6.3V_ X5R C76 2 1UF_6.3V _X5R
C761 10UF _16V_X5R
C761 10UF _16V_X5R
0603
0603
L4
L4
D
D
Q54
Q54
X_2N700 2
X_2N700 2
S
S
2 3
8
VCCA_DA C_R U83_VOU T
0R
0R
R13460RR1346
0R
Power
V_3P3_B G
0402
0402
R925
R925
X_10K
X_10K
TITLE:
TITLE:
TITLE:
Mississippi_uATX
Mississippi_uATX
F F
1
2
3
4
5
6
Mississippi_uATX
Lynxpoint
Lynxpoint
Lynxpoint
Document N umber :
Document N umber :
Document N umber :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
<Doc>
<Doc>
<Doc>
Kerry Huang
Kerry Huang
Kerry Huang
Date: PAGE:
Date: PAGE:
Date: PAGE:
Friday, November 30, 2012
Friday, November 30, 2012
Friday, November 30, 2012
7
8
REV:
REV:
REV:
V0.4
V0.4
V0.4
19 63
19 63
19 63
of
of
of