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MS-7596
Schematics rev.0A
39 pgs1.27 Mb0
User Manual
181 pgs11.89 Mb0
USER MANUAL
108 pgs7.37 Mb0
User Manual
190 pgs12.59 Mb0

MSI MS-7596 Schematics rev.0A

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MSI
D D
MS-7596 Ver:0A
CPU:
AMD M2 Athlon 64/Athlon 64 FX AM3
System Chipset:
AMD/ATI RS780 Colay RS880 AMD/ATI SB710
On Board Chipset:
FINTEK Super I/O -- F71889 LAN -- RTL8111DL HD Codec -- ALC888S-V2 1394 -- VT6315N
C C
BIOS -- SPI ROM 8M
Main Memory:
DDR III X 4 (Max 8GB)
Expansion Slots:
PCI-E X 16 *1 PCI-E X 1 *1
PCI 2.2 Slot X 2
Clock Generator:
Controller--ICS9LPRS477CKL
B B
PWM:
ISL6323+UPI6262
Title Page
Cover Sheet 1
GPIO Configuration Clock Distribution 4 Power Deliver Chart ISL6323 3+1 Phase Clock-Gen ICS9LPRS477 AMD AM3 941 FIRST LOGICAL DDR DIMM SECOND LOGICAL DDR DIMM RS780/RS880 SB710
13,14, 15,16,17
18,19, 20,21,22 PCI EXPRESS X16 & X 1 SLOT PCI Slot 1,2 USB connectors VGA CONN HDMI / DVI CONNECTOR LAN - Realtek 8111DL Azalia Codec-ALC888S LPC-F71889 / FDD / COM IDE Conn / FAN 1394 VT6315N ACPI by UPI ATX/Front Panel/KB/EMI VCC_DDR & VCC1_1 NB ATX/Front Panel/KB/EMI BOM - Option Parts POWER OK MAP RESET MAP History
2Block Diagram 3
5 6 7
8, 9,10
11 12
23 24 25 26 27 28 29 30 31 32 33 33
34 35
36 37 38
39
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Cover Sheet
Cover Sheet
Cover Sheet
Document Number
Document Number
Document Number
5
4
3
2
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
MS-7596
MS-7596
MS-7596
Last Revision Date:
Last Revision Date:
Last Revision Date: Sheet
Sheet
Sheet
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Wednesday, January 14, 2009
139
139
139
Rev
Rev
Rev
0A
0A
0A
5
www.schematic-x.blogspot.com
4
3
2
1
Project RS-780/880 BLOCK DIAGRAM
UNBUFFERED
D D
AMD CPU
AM3 SOCKET
16x16 2.6GHZ(HT3)HyperTransport LINK
OUT
IN
DVI CON HDMI CON
D-SUB
PCIE GFX x16
C C
USB-4USB-5
LANLAN 1394
USB-10
USB-11
REAR
REAR
LANHDMI
B B
CPU CORE POWER
ACPI CONTROLLER
uPI
A A
NB CORE POWER ISL6323CR
CPU VLDT Power
RS780 CORE POWER PCIE & SB POWER DUAL POWER
DDRIII DRAM POWER
Realtek 8111DL
PCI SLOT 1
4X1 PCIE INTERFACE
USB-1USB-2USB-3
USB-7USB-8USB-9 Front FrontFrontFront
PCI SLOT 2
ATX CON
5
4
TMDS
RGB
PCIE x16
PCIE x1 SLOT
USB-0 FrontFrontREARREARREARREAR
USB-6
PCI BUS
RS780/RS880
HyperTransport LINK0 CPU I/F 1 16X PCIE VIDEO I/F 1 4X PCIE I/F WITH SB 2 1X PCIE I/F
USB 2.0
FLOPPY
ATI SB710
USB2.0 (12) SATA2 (4 PORTS)
HD AUDIO 1.0 ACPI 1.1 SPI I/F PCI/PCI BRIDGE
KBD MOUSE
Fintek 71889
SERIAL PORT
A-LINK
4X PCIE
3
PLT PORT
64bit
64bit
SERIAL ATA 2.0
SERIAL ATA 2.0
SPI Bus
LPC BUS
TPM Pin Header
DDRIII DIMM1
UNBUFFERED DDRIII DIMM2
DDRIII FIRST LOGICAL DIMM DDRIII SECOND LOGICAL DIMM
AZALIA CODEC
SATA#0 SATA#1 SATA#2 SATA#3
SPI ROM 8M
2
UNBUFFERED DDRIII DIMM3
UNBUFFERED DDRIII DIMM4
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
SATA#2 SATA#3
BLOCK Diagram
BLOCK Diagram
BLOCK Diagram
MS-7596
MS-7596
MS-7596
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Sheet
Sheet
Sheet
239
239
239
1
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
SB700/750 GPIO Config
GPIO Name Type Function description Pin Page PCICLK5/GPIO41
INTE#/GPIO33 PCI_INTA# INTF#/GPIO33 INTG#/GPIO33 INTH#/GPIO33
D D
LDRQ1#/GNT5#/GPIO68 BMREQ#/REQ5#/GPIO68 RI#/EXTEVNT0# SLP_S2/GPM9#
KBRST#/GEVENT1# LPC_PME#/GEVENT3# LPC_SMI#/EXTEVNT1# S3_STATE/GEVENT5# SYS_RESET#/GPM7# WAKE#/GEVENT8# BLINK/GPM6# Unused
SATA_ISO#/GPIO10 SB_GPIO10
SMARTVOLT/SATA_IS2/GPIO4 SB_GPIO4
CLK_REQ1#/SATA_IS4#/GPIO3 SB_GPIO39 CLK_REQ2#/SATA_IS5#/GPIO40
SPKR/GPIO2
SDA0/GPOC1# SDATA
C C
SCL1/GPOC2# SCLK1 SDA1/GPOC3# SDATA1 DDC1_SCL/GPIO9 DDC1_SDA/GPIO8 SPI_WP# LLB3/GPIO66 LC_SENSE
SHUTDOWN#/GPIO5 SB_GPIO5 DDR3_RST#/GEVENT7# SB_OC6#/IR_TX1/GEVENT6# USB_OC5#IR_TX0/GPM5# USB_OC4#IO_RX0/GPM4# OC4#
USB_OC2#/GPM2# USB_OC1#/GPM1# USB_OC0#/GPM0# AZ_SDIN0/GPIO42 AZ_SDIN1/GPIO43 AZ_SDIN2/GPIO44 AZ_SDIN3/GPIO46
3.3V PCI_CLK5 PREQ#3REQ3#/GPIO70 PREQ#4REQ4#/GPIO71 UnusedGNT3#/GPIO72
PCI_INTB# PCI_INTC# PCI_INTD# Unused PREQ#5
RI# Unused A20GATEGA20IN/GEVENT0#
KBRST# LPC_PME# LPC_SMI3 Unused FP_RST#
WAKE#
SMBALERT#MBALERT#THRMTRIP#/GEVENT2#
SB_GPIO6CLK_REQ3#/SATA_IS1#/GPIO6
SB_GPIO0CLK_REQ0#SATA_IS3#/GPIO0
SB_GPIO40
SPKR
SCLKSCL0/GPOC0#
Unused
Unused OC6# OC5#
OC3#USB_OC3#/IR_RX1/GPM3# OC2# OC1# OC0# SDATA_IN_R Unused Unused Unused
AE18 AD18 AA19
T3 AE6 AB6 AC6
AD3 AC4 AE2 AE3 AB8 AD7 E2 H7 Y15 W15 K4 K24 F1 J2 H6 F2 J6
W18 V17 W20 W21 AA18 W18 K1 K2 AA20 Y18 C1 Y19 G5 B9 B8 A8 A9 E5 F8 E4 J7 J8 L8 M3
4
SB700/750 GPIO Config
GPIO Name Type Function description Pin Page 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 21 21 21 21 21 21 21 21 21 21 21 21 21
AZ_DOCK_RST#/GPM8#
PS2_DAT/EC_GPIO0
PS2_CLK/EC_GPIO1
SPI_CS2#/EC_GPIO2
IDE_RST#/F_RST#/EC_GPO3 F25
PS2KB_DAT/EC_GPIO4
PS2KB_CLK/EC_GPIO5
PS2M_DAT/EC_GPIO6
PS2M_CLK/EC_GPIO7
USBCLK/14M_25M_48M_OSC
KSO_16/EC_GPIO8
KSO_17/EC_GPIO9
EC_PWM0/EC_GPIO10
SCL2/EC_GPIO11
SDA2/EC_GPIO12
SCL3_LV/EC_GPIO13
SDA3_LV/EC_GPIO14
EC_PWM1/EC_GPIO15
EC_PWM2/EC_GPIO16
EC_PWM3/EC_GPIO17
KSI_0/EC_GPIO18
KSI_1/EC_GPIO19
KSI_2/EC_GPIO20
KSI_3/EC_GPIO21
KSI_4/EC_GPIO22
KSI_5/EC_GPIO23
KSI_6/EC_GPIO24
KSI_7/EC_GPIO25
KSO_0/EC_GPIO26
KSO_1/EC_GPIO27
KSO_2/EC_GPIO28
KSO_3/EC_GPIO29
KSO_4/EC_GPIO30
KSO_5/EC_GPIO31
KSO_6/EC_GPIO32
KSO_7/EC_GPIO33
KSO_8/EC_GPIO34
KSO_9/EC_GPIO35
KSO_10/EC_GPIO36
KSO_11/EC_GPIO37
KSO_12/EC_GPIO38
KSO_13/EC_GPIO39
KSO_14/EC_GPIO40
KSO_15/EC_GPIO41
SATA_ACT#/GPIO67
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
3.3V L5
3
Unused 20 Unused Unused Unused Unused Unused Unused Unused Unused USB_48M_CLK Unused Unused Unused Unused Unused Unused Unused Unused SB_GP16 Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused SATA_LED# Unused Unused Unused Unused
H19 H20 H21
D22 E24 E25 D23 C8 A18 B18 F21 D21 F19 E20 E21 E19 D19 E18 G20 G21 D25 D24 C25 C24 B25 C23 B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18 W11 AD24 AD23 AE22 AC22
21 21 21 21 21UnusedGNT4#/GPIO73 AE5 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21
2
SB700/750 GPIO Config
GPIO Name Type Function description Pin Page IDE_D4/GPIO19 AD21 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23 IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30 SPI_DI/GPIO12 SPI_DO/GPIO11 SPI_CLK/GPIO47 SPI_HOLD#/GPIO31 SPI_CS#/GPIO32 LAN_RST#/GPIO14 ROM_RST#/GPIO14 FANOUT0/GPIO3 FANOUT1/GPIO48 FANOUT2/GPIO49 FANIN0/GPIO50 FANIN1/GPIO51 FANIN2/GPIO52 TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63 TEMPIN3/TALERT#/GPIO64 VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60
3.3V
Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused SPI_DATAIN SPI_DATAOUT SPI_CLK SPI_HOLD_L SPI_CS# CPU_PRESENT# Unused Unused COM_GPIO Unused Unused Unused Unused Unused Unused Unused TALERT3 Unused Unused Unused Unused Unused Unused Unused Unused
AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23 G6 D2 D1 F4 F3 U15
1
J1 M8 M5 M7 P5 P8 E8 B6 A6 A5 B5 A4 B4 C4 D4 D5 D6 A7 B7
F71882 GPIO Config
GPIO Name Type Function description Pin Page VIDO5/GP27 AD21
B B
VIDO4/GP26 VIDO1/GP21/VGP0 PME#/GP54 KRST#/GP62 GA20/JP7 KDAT/GP61 KCLK/GP60 MDAT/GP57 MCLK/GP56 SUSC#/GP53 PSON#/GP42 PANSWH#/GP43 PWRON#/GP44 PCIRST3#/GP11 PCIRST2#/GP12 FAN_CTL3/GP36 FAN_TAC3/GP36 FAN_CTL2/GP51 FAN_TAC2/GP52 FAN_CTL1 FAN_TAC1 VID2/GP32 VID3/GP33
A A
VID3/GP33 VID4/GP34 VID5/GP35
3.3V
Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused SPI_DATAIN SPI_DATAOUT SPI_CLK SPI_HOLD_L SPI_CS# CPU_PRESENT# Unused Unused COM_GPIO Unused Unused Unused Unused Unused Unused
AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23 G6 D2 D1 F4 F3 U15
20
J1 M8 M5 M7 P5 P8 E8 B6 A6
PCI Config.
DEVICE MCP1 INT Pin REQ#/GNT#
PCI Slot 1
PCI Slot 2
PCI_INTE# PCI_INTF# PCI_INTG# PCI_INTH# PCI_INTF# PCI_INTG# PCI_INTH# PCI_INTE#
PREQ#0 PGNT#0
PREQ#1 PGNT#1
IDSEL
AD21
AD22
CLOCK
PCICLK0
PCICLK1
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
GPIO Configuration
GPIO Configuration
GPIO Configuration
MS-7596
MS-7596
MS-7596
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
0A
0A
0A
of
of
of
339
339
339
5
4
3
2
1
D D
DIMM1 DIMM2
3 PAIR MEM CLK
3 PAIR MEM CLK
3 PAIR MEM CLK
3 PAIR MEM CLK
AM2/AM2g2 CPU AM2 SOCKET
C C
B B
1 PAIR CPU CLK
200MHZ
EXTERNAL CLK GEN.
HT REFCLK
100MHz DIFF RS780
NB-OSCIN
14.318MHZ
NB ALINK PCIE CLK
100MHZ
SB ALINK PCIE CLK
100MHZ
NB GFX PCIE CLK
100MHZ
NB GPP PCIE CLK
100MHZ
PCIE GFX CLK
100MHZ
PCIE GPP CLK
100MHZ
PCIE GPP CLK
100MHZ
USB CLK
48MHZ
SIO CLK
48MHZ
AMD/ATI NB RS780
(RX780)
PCIE GFX SLOT 1 - 16 LANES
PCIE GPP SLOT 1 - 1 LANE
PCIE GBE
25MHZ OSC INPUT
25MHz LAN
25MHz SATA
CPU_HT_CLK
NB_HT_CLK
25M_48M_66M_OSC
AMD/ATI SB
SB700
NB_DISP_CLK
GPP_CLK3
PCIE_RCLK/ NB_LNK_CLK
SLT_GFX_CLK
GPP_CLK0
GPP_CLK1
GPP_CLK2
USB_CLK
PCI CLK0
33MHZ
PCI CLK1
33MHZ
PCI CLK2
33MHZ
PCI CLK3
33MHZ
PCI CLK4
33MHZ
PCI CLK5
33MHZ
LPC_CLK0
33MHZ
LPC CLK1
33MHZ
SB_BITCLK
48MHZ
32.768KHz
PCI SLOT 0 33MHz
PCI SLOT 1 33MHz
TPM 33MHz
PCI SLOT 3 33MHz
SUPER IO F71882 33MHz
HD AUDIO ALC 888GR
25MHz
14.31818MHz
DIMM3 DIMM4
A A
5
External clock mode
Internal clock mode
4
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan http://www.msi.com.tw
http://www.msi.com.tw
3
2
http://www.msi.com.tw
Clock Distribution
Clock Distribution
Clock Distribution
MS-7596
MS-7596
MS-7596
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
0A
0A
0A
439
439
439
of
of
of
5
Power Deliver Chart
4
3
2
1
2.5V Shunt Regulator
VRM SW REGUALTOR
D D
ATX P/S WITH 1A STBY CURRENT
5V
5VSB
+/-5%
+/-5%
3.3V +/-5%
12V +/-5%
-12V +/-5%
CPU PW 12V +/-5%
5VDIMM Linear REGULATOR
1.8V VDD SW REGULATOR
1.8V VCC Linear REGULATOR
VDDA25 (S0, S1)
VCCP (S0, S1) / VCC_NB (S0, S1)
0.9V VTT_DDR REGULATOR
1.1V VCC Linear REGULATOR
1.2V VCC Linear REGULATOR
VCC_DDR (S0, S1, S3) VTT_DDR (S0, S1, S3)
DDRII DIMMX4
VDD MEM
12A
VTT_DDR
2A
NB_VCC1P1 (S0, S1)
VCC_1V2 (S0, S1)
+1.8V_S0 (S0, S1)
C C
AMD AM2r2 CPU
VDDA 2.5V 0.2A VDDCORE
0.8-1.55V
DDR2 MEM I/F VDD MEM 1.8V VTT MEM 0.9V
VLDT 1.2V
NB RS780
VDDHT/RX 1.1V VDDHTTX 1.2V VDDPCIE 1.1V NB CORE VDDC
1.1V VDDA18PCIE 1.8V
PLLs 1.8V VDD18/VDD18_MEM
1.8V VDD_MEM 1.8V/1.5V
AVDD 3.3V
110A
10A 2A
0.5A
1.2A
0.5A
0.9A
0.1A
0.01A
0.5A
0.135A
2A 7A
SB700
VCC3_SB Linear REGULATOR
VCC3_SB (S0, S1, S3, S5)
1.2V_SB Linear REGULATOR
+1.2VSB (S0, S1) VCC3_SB (S0, S1, S3, S5)
VCC3 (S0, S1)
+5VA Linear
B B
5VDUAL Linear REGULATOR
REGULATOR
+5VA (S0, S1)
VCC3_SB (S0, S1, S3, S5)
X4 PCI-E
ATA I/O
ATA PLL
PCI-E PVDD
SB CORE
CLOCK
1.2V S5 PW
3.3V S5 PW
USB CORE I/O
3.3V I/O
+3.3VDUAL (S3)
+3.3V (S0, S1)
+5V (S0, S1)
AUDIO CODEC
3.3V CORE
5V ANALOG
SUPER I/O
0.8A
0.5A
0.01A 80mA
0.6A
0.22A
0.01A
0.2A
0.45A
0.1A
0.1A
0.01A
0.01A
0.1A
3.0A
0.5A
0.1A
4
X16 PCIE per
3.3V 12V
3.3VDual
3.0A
5.5A
0.1A
USB X6 FR
VDD 5VDual
3.0A
USB X6 RL 2XPS/2
VDD
5VDual
5VDual
0.5A
3.0A
3
ENTHENET
3.3V (S3)
3.3V (S0, S1)
0.1A
0.5A
IEEE-1394 x1
3.3V (S0, S1)
0.1A
12V (S0, S1) 1.1A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan http://www.msi.com.tw
http://www.msi.com.tw
2
http://www.msi.com.tw
Power Deliver Chart
Power Deliver Chart
Power Deliver Chart
MS-7596
MS-7596
MS-7596
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
0A
0A
0A
of
of
of
539
539
539
0.375A
5.0A
7.6A
0.5A
0.1A
X1 PCIE per
3.3V 12V
3.3Vaux
PCI Slot (per slot)
A A
5
5V
3.3V 12V
3.3VDual
-12V
5
VCC5_SB
R13
R13
10KR0402
10KR0402
PWR_GOOD33
PWROK_PWM8
VCCP_NB
R66
R66
100R0402
100R0402
R56
R56
100R0402
100R0402
6262_VCCP
C0.1u16Y0402C8C0.1u16Y0402
R24
R24
100R0402
100R0402
3
4
C34
C34
JPWR2
JPWR2
PWRCONN4P_CREAM-RH-1
PWRCONN4P_CREAM-RH-1
CHOKE2
CHOKE2
1 2
C43
C43
CH-1.1u27A2.5m-RH
CH-1.1u27A2.5m-RH
X_C0.01u25X0402
X_C0.01u25X0402
CD270u16SO-RH
CD270u16SO-RH
VCC_DDR
R35 X_300R0402R35 X_300R0402
3VDUAL
R48
R48 X_4.7KR0402
X_4.7KR0402
CE
Q8
Q8
B
R38 300R0402R38 300R0402
X_N-MMBT3904_NL_SOT23
X_N-MMBT3904_NL_SOT23
5
VCORE_EN#
VID58 VID48 VID38 VID28
VID18
VID08
X_470R1%0402
X_470R1%0402
UPI6262_NB
C40
C40 X_C0.1u16Y0402
X_C0.1u16Y0402
VCCP
R22
R22
X_100R0402
X_100R0402
C8
X_C0.1u16Y0402
X_C0.1u16Y0402
5
GND GND
GND GND
12V
12V
12V
12V
+
+
12
EC11
EC11
CD270u16SO-RH
CD270u16SO-RH
DS
G
X_N-2N7002_SOT23
X_N-2N7002_SOT23
NB_GND8
100R0402
100R0402
R21
R21
VCCP
COREFB+
+12VIN
VCORE_EN#33
R60 0R0402R60 0R0402
R61 0R0402R61 0R0402
R33 49.9R1%0402R33 49.9R1%0402
R23
R23 0R0402
0R0402
+12VIN
X_C0.01u25X0402
X_C0.01u25X0402
R37
R37
X_4.7KR0402
X_4.7KR0402
D D
NB_VSEN8
C C
COREFB+8
COREFB-8
B B
A A
CPU_CORE_TYPE8
R26 1KR1%0402R26 1KR1%0402
R20
R20 10KR0402
10KR0402
VCC5
R80
R80 10KR0402
10KR0402
R73
R73
R65
R65 360R1%0402
360R1%0402
R1
C3 X_C1000p50X0402C3 X_C1000p50X0402
X_470R1%0402R1X_470R1%0402
R2
R2
C17
C17
VCC_VRM
1
2
+
+
12
EC6
EC6
CD270u16SO-RH
CD270u16SO-RH
R42
R42 X_27R0402
X_27R0402
Q9
Q9
Q3
Q3
+12VIN
B
C59
C59
X_C680p50X0402-RH
X_C680p50X0402-RH
ISEN_NB_A
R64
R64 X_0R0402
X_0R0402
X_C0.1u16Y0402
X_C0.1u16Y0402
560R1%0402-RH
560R1%0402-RH
C20
C20 X_C0.1u16Y0402
X_C0.1u16Y0402
+
+
12
EC20
EC20
CD270u16SO-RH
CD270u16SO-RH
VID1
R34
R34 X_27R0402
X_27R0402
DS
VCORE_EN#
G
X_N-2N7002_SOT23
X_N-2N7002_SOT23
R25
R25
10.7KR1%0402
10.7KR1%0402
CE
Q4
Q4
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
R82 1.2KR1%0402R82 1.2KR1%0402
C56 C10p50N0402-RHC56 C10p50N0402-RH
C53
C53
X_C0.1u16Y0402
X_C0.1u16Y0402
R63 0R0402R63 0R0402
R54 49.9R1%0402R54 49.9R1%0402
C35
C35
R16 2.37KR1%0402R16 2.37KR1%0402
R19
R19
1.1KR1%0402
1.1KR1%0402
R15
R15
4.99KR1%0402
4.99KR1%0402
R31 56KR1%0402R31 56KR1%0402 C202 X_C0.1u16Y0402C202 X_C0.1u16Y0402
R32 69.8KR1%0402-RHR32 69.8KR1%0402-RH
VCC_VRM
R17
R17
X_10KR0402
X_10KR0402
+
+
12
EC7
EC7
CD270u16SO-RH
CD270u16SO-RH
LOW FOR SVID
6262_VCCNB UPI6262_NB
6262_VCCNB
C15 C0.01u25X0402C15 C0.01u25X0402
C1
C100p50N0402C1C100p50N0402
C16 C0.01u25X0402C16 C0.01u25X0402
R41
R41
X_10KR1%0402
X_10KR1%0402
91KR1%0402
91KR1%0402
+
+
12
C80
C80
EC14
EC14
C0.1u16Y0402
C0.1u16Y0402
R52
R52
R71 X_0R0402R71 X_0R0402
4
ISL6323CR CKT for Hybride
VCC5_SB
VCC5
R353
R353
X_2.2R1%0805
X_2.2R1%0805
C14
C14
C0.1u16Y0402
C0.1u16Y0402
7X7 QFN
U3 ISL6323ACRZ-TU3 ISL6323ACRZ-T
24
EN
37
VDDPWRGD
34
PWROK
9
VID5
8
VID4
7
VID3/SVC
6
VID2/SVD
5
VID1/SEL
4
VID0/VFIXEN
C55
C55 C0.01u25X0402
C0.01u25X0402
48
COMP_NB
1
FB_NB
2
VSEN_NB
3
RGND_NB
18
COMP
17
FB
15
RCOMP
13
VSEN
12
RGND
C19
C19 C0.1u16Y0402
C0.1u16Y0402
19
APA
16
RESET
14
OFS
11
FS
GND
input CAP
VCC5
49
BOTTOM PAD CONNECT TO GND Through 8 VIAs
VIN
R70 2.2R/0603R70 2.2R/0603
C0.1u16Y0402
C0.1u16Y0402
SDA07,11,12,20,23,28,33
6262_VCCNB_R
R40
R40
0R0402
0R0402
R44
R44
10
C50
C50
2.2R1%0805
2.2R1%0805
VCC
VCC_VRM
PVCC1_2
UGATE1 PHASE1 LGATE1
UGATE2 PHASE2 LGATE2
PVCC_NB
BOOT_NB
UGATE_NB PHASE_NB LGATE_NB
ISEN_NB
PHASE_NB_A
U4
U4
3 4
8
R68
R68 X_1KR0402
X_1KR0402
BOOT1
ISEN1+ ISEN1-
BOOT2
ISEN2+ ISEN2-
PWM3
ISEN3+ ISEN3-
PWM4
ISEN4+ ISEN4-
GND SDA
OUT1
C29
C29 C4.7u10Y0805
C4.7u10Y0805
29 31 32
33 30
20 21
27 26
25 28
22 23
35 44
43
36 46
45
42
40 39
38 41
47
1
OUT2
VCC
OUT3
SCL
BUS_SEL
2
R69
R69 10KR0402
10KR0402
+12VIN
R51
R51
2.2R1%0805
2.2R1%0805
R58 2.2R1%0805R58 2.2R1%0805
U_G1 PHASE1 L_G1
ISEN1+ ISEN1­IPHASE1
R45 2.2R1%0805R45 2.2R1%0805
U_G2 PHASE2 L_G2
ISEN2+ ISEN2­IPHASE2
PWM3 ISEN3+
ISEN3­IPHASE3
PWM4
ISEN4­IPHASE4
R91 2.2R1%0805R91 2.2R1%0805 C60 C1u25X0805-RHC60 C1u25X0805-RH
R84 2.2R1%0805R84 2.2R1%0805
UGATE_NB PHASE_NB LGATE_NB
R85
R85
6.8KR1%0402-RH
6.8KR1%0402-RH
6262_VCCP_R
7
6 5
UP6262M8_SOT23-8-RH
UP6262M8_SOT23-8-RH
C32
C32 C1u25X0805-RH
C1u25X0805-RH
C44 C0.1u25XC44 C0.1u25X
R30 255R1%0402-RHR30 255R1%0402-RH
R29
R29
8.2KR1%0402-RH
8.2KR1%0402-RH
C24 C0.1u25XC24 C0.1u25X
R28 1.37KR1%0402-RHR28 1.37KR1%0402-RH
R27
R27
8.2KR1%0402-RH
8.2KR1%0402-RH
R78 200R1%0402-RHR78 200R1%0402-RH
R77
R77
8.2KR1%0402-RH
8.2KR1%0402-RH
R72 X_0R0805R72 X_0R0805
R624 200R1%0402-RHR624 200R1%0402-RH
R81
R81
8.2KR1%0402-RH
8.2KR1%0402-RH
C64 C0.1u25XC64 C0.1u25X
R79 X_6.2KR1%0402R79 X_6.2KR1%0402
C68 C0.1u16X0402C68 C0.1u16X0402
R18 0R0402R18 0R0402
SCL0 7,11,12,20,23,28,33
VCC5
VCC5
BUS_SEL=100%VCC
I2C address:0X60
R643=10K;R644=OPEN
4
3
ISEN1
C6
C0.1u16X0402C6C0.1u16X0402
ISEN2
C4
C0.1u16X0402C4C0.1u16X0402
ISEN3
C62
C62
C0.1u16X0402
C0.1u16X0402
C66
C66
C0.1u16X0402
C0.1u16X0402
+12VIN
ISEN_NB_A
ISEN4-
3
C7 C0.1u16Y0402C7C0.1u16Y0402
C5
C0.1u16Y0402C5C0.1u16Y0402
C63
C63 C0.1u16Y0402
C0.1u16Y0402
ISEN4ISEN4+
C65
C65
C0.1u16X0402
C0.1u16X0402
R633 X_0R0805R633 X_0R0805
6262_VCCP
C67
C67 C0.1u16Y0402
C0.1u16Y0402
C269 C1u16X5C269 C1u16X5
VCC5
+12VIN
R240
R240
2.2R1%0805
2.2R1%0805
PWM3
+12VIN
R622
R622
2.2R1%0805
2.2R1%0805
C299 C1u16X5C299 C1u16X5
PWM4
UGATE_NB
PHASE_NB
LGATE_NB
U_G1
PHASE1
L_G1
U_G2
PHASE2
L_G2
U16
U16
6
VCC
UGATE
7
BOOT
PVCC
PHASE
4
GND
3
PWM
LGATE
ISL6612ACBZT_SOIC8-RH
ISL6612ACBZT_SOIC8-RH
U39
U39
6
VCC
7
PVCC
4
GND
3
PWM
ISL6612ACBZT_SOIC8-RH
ISL6612ACBZT_SOIC8-RH
R93 1R0805R93 1R0805
R10 0R0805R10 0R0805
75N02Q775N02
UGATE
BOOT
PHASE
LGATE
10KR0402
10KR0402
2
VIN
C197
C197
C193
C193
C10u16Y1206
C10u16Y1206
C1u16X5
4809
4809
DS
Q31
Q31
DS
Q29
Q29
VIN
4809
4809
DS
Q28
Q28
DS
Q19
Q19
4809
4809
G
R229
R229
G
75N02
75N02
4809
4809
R621
R621
10KR0402
10KR0402
75N02
75N02
C75
C75
C10u16Y1206
C10u16Y1206
PHASE_NB_A ISEN_NB_A
DS
G
DS
G
DS
G
DS
G
VIN
DS
4809
4809
Q42
Q42
DS
Q40
Q40
VIN
DS
G
Q49
Q49
DS
Q51
Q51
G
C1u16X5
Q39
Q39
CHOKE5 CH-0.5u40A-RH-1CHOKE5 CH-0.5u40A-RH-1
Q30
Q30
R180
R180
2.2R1%0805
2.2R1%0805
75N02
75N02
C150
C150
C1000p50X0402
C1000p50X0402
IPHASE1 ISEN1
C139
C139
C120
C120
C10u16Y1206
C10u16Y1206
C1u16X5
C1u16X5
Q24
Q24
CHOKE3 CH-0.5U40A-RH-1CHOKE3 CH-0.5U40A-RH-1
R137
R137
Q20
Q20
2.2R1%0805
2.2R1%0805
75N02
75N02
C91
C91
C1000p50X0402
C1000p50X0402
IPHASE2 ISEN2
C228
C228 C1u16X5
C1u16X5
DS
Q44
Q44
G
DS
R216
R216
Q41
Q41
G
2.2R1%0805
2.2R1%0805
75N02
75N02
C214
C214 C1000p50X0402
C1000p50X0402
C230
C230 C1u16X5
C1u16X5
4809
4809
DS
Q56
Q56
G
DS
R607
R607
Q57
Q57
G
2.2R1%0805
2.2R1%0805
75N02
75N02
C225
C225 C1000p50X0402
C1000p50X0402
CHOKE1 CH-0.5U40A-RH-1CHOKE1 CH-0.5U40A-RH-1
1 2
CP35CP35
1 2
CP40CP40
1 2
CP38CP38
C272
C272
C10u16Y1206
C10u16Y1206
CHOKE7 CH-0.5U40A-RH-1CHOKE7 CH-0.5U40A-RH-1
1 2
CP43CP43
IPHASE3 ISEN3
C273
C273
C10u16Y1206
C10u16Y1206
CHOKE11 CH-0.5U40A-RH-1CHOKE11 CH-0.5U40A-RH-1
1 2
CP56CP56
IPHASE4 ISEN4
VCCP_NB
CP36CP36
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
4809
4809
R199 1R0805R199 1R0805
R163 1R0805R163 1R0805
U_G3
1 2
R232
R232
2.2R1%0805
2.2R1%0805
8
PHASE3
L_G3
5
1 2
R609
R609
2.2R1%0805
2.2R1%0805
8
5
VIN
DS
G
R87
R87
DS
G
R176 0R0805R176 0R0805
R113 0R0805R113 0R0805
R234 1R0805R234 1R0805
C255 C0.1u25XC255 C0.1u25X
R214 0R0805R214 0R0805
U_G4
R608 1R0805R608 1R0805
PHASE4
L_G4
Q12
Q12
4809
4809
Q7
G
75N02
75N02
R193
R193
10KR0402
10KR0402
75N02
75N02
4809
4809
R157
R157
10KR0402
10KR0402
75N02
75N02
C257 C0.1u25XC257 C0.1u25X
R623 0R0805R623 0R0805
C73
C73 C1u16X5
C1u16X5
DS
Q10
Q10
C30
C30
C1000p50X0402
C1000p50X0402
2
G
G
G
G
10KR0402
10KR0402
R50
R50
2.2R1%0805
2.2R1%0805
1
VCCP
CP41CP41
output CAP
VCCP
CP39CP39
NB-output CAP
VCCP
CP44CP44
VCCP
CP55CP55
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Intersil 6323CR 3 Phase
Intersil 6323CR 3 Phase
Intersil 6323CR 3 Phase
MS-7596
MS-7596
MS-7596
1
VCCP
EC8
EC8
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC9
EC9
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC17
EC17
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC16
EC16
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC15
EC15
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC24
EC24
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC18
EC18
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC26
EC26
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
VCCP_NB
EC4
EC4
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC5
EC5
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, February 11, 2009
Wednesday, February 11, 2009
Wednesday, February 11, 2009
Sheet
Sheet
Sheet
Rev
Rev
Rev
0A
0A
0A
of
of
of
639
639
639
5
VCC3
L19
L19
D D
CLK_VDD
C C
CLK_VDD
FP_RST#20,33,35
SCL06,11,12,20,23,28,33
SDA06,11,12,20,23,28,33
CLK_VDD
RS740 RX780
NB_OSC_14M15
OSC_14M_NB
3.3V 33R serial
1.8V 82.5R/130R
1.1V 158R/90.9R
R249
R249
90.9R1%0402
90.9R1%0402
0 1
PIN40,41 SRC6T/C and SATAT_LPRS select
0 1
atched input to select pin functionality
0
B B
RS780 (Single-ended)
REF0/SEL_HTT66
A A
REF/SEL_SATA
REF2
1
CLK_VDD
30L3A-15_0805-RH
30L3A-15_0805-RH
C362
C362
10u/10v/Y5/8
10u/10v/Y5/8
VCC3
L22
L22
30L3A-15_0805-RH
30L3A-15_0805-RH
VCC3
L18
L18 30L3A-15_0805-RH
30L3A-15_0805-RH
C310 C22p50N0402C310 C22p50N0402
C317 C22p50N0402C317 C22p50N0402
R253 158R/4/1%_BR253 158R/4/1%_B
C308
C308 X_10p/50v/N/4
X_10p/50v/N/4
HTT CLOCK
100.00 DIFFERENTIAL
66.66 SINGLE END
100MHz differential spreading SRC clock 100MHz non-spreading differential SATA clock
ATIG/SRC PCIE Gen2 Mode with limited overclocking ability ATIG/SRC PCIE Gen1 Mode with higher overclocking ability
5
22uF/6.3V/X5R
22uF/6.3V/X5R
1u/6.3v/Y5/4
1u/6.3v/Y5/4
1 2
R259 X_4.7K/4R259 X_4.7K/4 R252 0R/4R252 0R/4
SCL0
R274 X_R/2R274 X_R/2
SDA0
R276 X_R/2R276 X_R/2
R260 1K/4R260 1K/4
R256
R256
X_10K/4
X_10K/4
C494
C494
CLK_VDDA
10u/10v/Y5/8
10u/10v/Y5/8
VDD48
C320
C320
14.318MHZ16P_D-RH
14.318MHZ16P_D-RH
Y1
Y1
R263
R263 10MR1%0402
10MR1%0402
CLK_VDD
R254
R254
X_8.2K/4
X_8.2K/4
R250
R250
8.2K/4
8.2K/4
C316
C316
0.1u/16v/X5/4
0.1u/16v/X5/4
C335
C335
R255
R255 X_8.2K/4
X_8.2K/4
SEL_OC_MODE
R251
R251
8.2K/4
8.2K/4
SEL_HTT66 SEL_SATA
4
C359
C341
C341
0.1u/16v/X5/4
0.1u/16v/X5/4
C334
C334
0.1u/16v/X5/4
0.1u/16v/X5/4
TXC1 TXC2
RST#_CLK SCL0_C
SDA0_C PD#
C353
C353
0.1u/16v/X5/4
0.1u/16v/X5/4
U19A
U19A
44
VDDA
43
GNDA
60
VDDREF
61
GNDREF
39
VDDSATA
42
GNDSATA
64
VDD48
3
GND48
48
VDDCPU
47
GNDCPU
56
VDDHTT
53
GNDHTT
34
VDDATIG
11
VDDSRC1
16
VDDSRC2
25
VDDSB_SRC
28
GNDATIG
33
GNDATIG
10
GNDSRC
17
GNDSRC
24
GNDSB_SRC
62
X1
63
X2
52
RESTORE#
4
SMBCLK
5
SMBDAT
51
PD#
59
REF0/SEL_HTT66
58
REF1/SEL_SATA
57
REF2
RTM880N-793-VB-GR_QFN64-RH
RTM880N-793-VB-GR_QFN64-RH
R513 33R0402R513 33R0402
C359
0.1u/16v/X5/4
0.1u/16v/X5/4
DOC_1/SRC5T_LPRS
DOC_0/SRC5C_LPRS
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
SB_OSC_14M
R557
R557 X_75R/4
X_75R/4
CPUKG0T_LPRS CPUKG0C_LPRS CPUKG1T_LPRS CPUKG1C_LPRS
ATIG0T_LPRS
ATIG0C_LPRS
ATIG1T_LPRS
ATIG1C_LPRS
ATIG2T_LPRS
ATIG2C_LPRS
ATIG3T_LPRS
ATIG3C_LPRS
SB_SRC0T_LPRS SB_SRC0C_LPRS SB_SRC1T_LPRS SB_SRC1C_LPRS
SRC0T_LPRS SRC0C_LPRS SRC1T_LPRS SRC1C_LPRS SRC2T_LPRS SRC2C_LPRS SRC3T_LPRS SRC3C_LPRS SRC4T_LPRS SRC4C_LPRS
HTT0T/66M_LPRS
HTT0C/66M_LPRS
48MHz_0 48MHz_1
SB7XXA13 SB7XXA14
C361
C361
0.1u/16v/X5/4
0.1u/16v/X5/4
SB_OSC_14M 18
EXT CLK FREQUENCY SELECT TABLE(MHZ)
FS2
0 0 0 0 0 1
0 1 0 0 1 1 1 0 0 1 0 1 1 1 1
4
CPUFS1
Hi-Z X
180.00
220.00
100.00
133.33
200.00
SRCCLK
HTTFS0 PCI
[2:1]
Hi-Z Hi-Z100.00 Reserved
100.00
100.00
100.00
36.56 73.12
100.00
66.66 33.33
100.00
66.66 33.33
100.00
66.66 33.33 Normal HAMMER operation
CPU_CLK_R
50
CPU_CLK#_R
49 46 45
NBGFX_SRCCLK_R
38
NBGFX_SRCCLK#_R
37
GFX_CLKP_R
36
GFX_CLKN_R
35 32 31 30 29
NBLINKCLK_R
27
NBLINKCLK#_R
26
SBSRCCLK_R
23
SBSRCCLK#_R
22 21
20
GPPCLK0_R
19
GPPCLK0#_R
18
1394CLK2_R
15
1394CLK2#_R
14
LANCLK1_R
13
LANCLK1#_R
12 9 8
DOC1#
7
DOC0#
6 41 40
HTREFCLK_R
55
HTREFCLK#_R
54
SIO_CLK_R
2
USBCLK_EXT_R
1
SB_OSC_14M
1.2V 110R
3.3V 33R
X/6X/3
30.0060.00
3
C338
C338
0.1u/16v/X5/4
0.1u/16v/X5/4
Reserved for EMI 0906
R261 X_R/2R261 X_R/2 R262 X_R/2R262 X_R/2
R277 X_R/2R277 X_R/2 R279 X_R/2R279 X_R/2 R284
R284 R287
R287
R302 X_R/2R302 X_R/2 R301 X_R/2R301 X_R/2 R299 X_R/2R299 X_R/2 R298 X_R/2R298 X_R/2
R297 X_R/2R297 X_R/2 R296 X_R/2R296 X_R/2 R294 X_R/2R294 X_R/2 R290 X_R/2R290 X_R/2 R285 X_R/2R285 X_R/2 R282 X_R/2R282 X_R/2
R257 X_R/2R257 X_R/2 R258 X_R/2R258 X_R/2
R272 33R0402R272 33R0402 R270 33R0402R270 33R0402
USB
COMMENT
48.00
48.00
Reserved
48.00
Reserved
48.00
Reserved
48.00
Reserved
48.00
Reserved
48.00
3
C321
C321
0.1u/16v/X5/4
0.1u/16v/X5/4
X_R/2
X_R/2 X_R/2
X_R/2
C336
C336
22p/50v/N/4
22p/50v/N/4
EMI EMI
C315
C315
0.1u/16v/X5/4
0.1u/16v/X5/4
CPU_CLK 8 CPU_CLK# 8
NBGFX_SRCCLK 15 NBGFX_SRCCLK# 15 GFX_CLKP 23 GFX_CLKN 23
NBLINKCLK 15 NBLINKCLK# 15 SBSRCCLK 18 SBSRCCLK# 18
GPPCLK0 23 GPPCLK0# 23 1394CLK2 32 1394CLK2# 32 LANCLK1 28 LANCLK1# 28
HTREFCLK 15 HTREFCLK# 15
SIO_CLK 30 USBCLK_EXT 20
C340
C340
C22p50N0402
C22p50N0402
2
VCC3 VCC3
R602
R602 10K/4
10K/4
OCSWITCH1
OCSWITCH1
ON
2
R764
R764
0R0402
0R0402
ON
1
1A
3
1B
OFF OFF
OFF OFF
SW-DIPP2-RH
SW-DIPP2-RH
DOC0# DOC1#
R601
R601 10K/4
10K/4
ON
ON
2
2A
4
2B
R765
R765
0R0402
0R0402
Title
Title
Title
Clock-Gen ICS9LPRS477
Clock-Gen ICS9LPRS477
Clock-Gen ICS9LPRS477
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
1
CLK_VDD
R267
R267
DOC
10K/4
10K/4
USBCLK_EXT_R
R269
R269
SRC5T
X_10K/4
X_10K/4
65
U19B
U19B
THERMPAD
ICS9LPRS477CKLFT_MLF64-RH_1
ICS9LPRS477CKLFT_MLF64-RH_1
I11-RS4771C-I02
DOC1# 30DOC0#30
MS-7596
MS-7596
MS-7596
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, February 11, 2009
Wednesday, February 11, 2009
Wednesday, February 11, 2009
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
0A
0A
0A
of
of
of
739
739
739
5
4
3
2
1
VID56 VID46 VID36 VID26
VID16
VID06
CPU_CORE_TYPE
CPU1D
CPU1D
C10
VDDA_1
D10
VDDA_2
A8
CLKIN_H
B8
CLKIN_L
C9
PWROK
D8
LDTSTOP_L
C7
RESET_L
AL3
CPU_PRESENT_L
AL6
SIC
AK6
SID
AK4
SA0
AL4
ALERT_L
AL10
TDI
AJ10
TRST_L
AH10
TCK
AL9
TMS
A5
DBREQ_L
G2
VDD_FB_H
G1
VDD_FB_L
F3
M_VDDIO_PWRGD
E12
VDDR_SENSE
F12
M_VREF
AH11
M_ZN
AJ11
M_ZP
A10
TEST25_H
B10
TEST25_L
F10
TEST19
E9
TEST18
AJ7
TEST13
F6
TEST9
D6
TEST17
E7
TEST16
F8
TEST15
C5
TEST14
AH9
TEST12
E5
TEST7
AJ5
TEST6
AH7
TEST3
AJ6
TEST2
C18
RSVD1
C20
RSVD2
F2
RSVD3
G24
RSVD4
G25
RSVD5
INT. MISC.
INT. MISC.
H25
RSVD6
L25
RSVD7
L26
RSVD8
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
R634 X_1K/4/5%R634 X_1K/4/5%
R230 10K/4R230 10K/4
R144 510R/0402R144 510R/0402 R146 510R/0402R146 510R/0402
CPU_HOT
MISC.
MISC.
VCC_DDR
CPU_HOT 18 CPU_CORE_TYPE 6
CORE_TYPE
VID5
VID4 SVC/VID3 SVD/VID2
PVIEN/VID1
VID0
THERMDC THERMDA
THERMTRIP_L
PROCHOT_L
TDO
DBRDY
VDDIO_FB_H
VDDIO_FB_L VDDNB_FB_H VDDNB_FB_L
PSI_L
HTREF1 HTREF0
TEST29_H
TEST29_L
TEST24 TEST23 TEST22 TEST21 TEST20
TEST28_H
TEST28_L
TEST27 TEST26 TEST10
TEST8
RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16
2
G5 D2
D1 C1 E3 E2 E1
AG9 AG8 AK7 AL7
AK10
B6 AK11
AL11 G4 G3
F1 V8
V7
C11 D11
AK8 AH8 AJ9 AL8 AJ8
J10 H9 AK9 AK5 G7 D4
L30 L31 AD25 AE24 AE25 AJ18 AJ20 AK3
CPU_DBREQ_L
CPU_CORE_TYPE
VID5 VID4 VID3 VID2 VID1 VID0
CPU_THRIP_L# CPU_HOT
CPU_TDO
CPU_DBRDY
CPU_PSI_L
HTREF1 HTREF0
R149 80.6R/6/1%R149 80.6R/6/1%
CPU_TEST22
CPU_TEST21
R358 300R/4R358 300R/4 R224 300R/4R224 300R/4
C113
C113 X_C0.1u25Y
X_C0.1u25Y
VCC_DDR
R368
R368
1K/4/5%
1K/4/5%
THERMDC_CPU 30 THERMDA_CPU 30
NB_VSEN 6 NB_GND 6
TP8TP8
VCC_DDR
Title
Title
Title
Document Number
Document Number
Document Number
VCC_DDR
R139
R139
R140
R140
1K/4/5%
1K/4/5%
1K/4/5%
1K/4/5%
place near the PWM IC
VCC_DDR
TP15TP15
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
VCC_DDR
VCC_DDR
R233
R233 300R/4
300R/4
C238
C238
1000p/50v/X7/4
1000p/50v/X7/4
TP10TP10
TP13TP13
VCC_DDR
R231
R231
R227
R227
300R/4
300R/4
300R0402
300R0402
VCC_DDR
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
AM3 HT I/F,CTRL&DEBUG
AM3 HT I/F,CTRL&DEBUG
AM3 HT I/F,CTRL&DEBUG
MS-7596
MS-7596
MS-7596
R235
R235
R220
R220
4.7K/4
4.7K/4
300R/4
300R/4
B
Q43
Q43 2N3904_SOT23
2N3904_SOT23
CE
VCC_DDR
R237
R237
4.7K/4
4.7K/4
B
Q45
Q45 2N3904_SOT23
2N3904_SOT23
CE
R225 44.2R/6/1%R225 44.2R/6/1% R226 44.2R/6/1%R226 44.2R/6/1%
C239
C239
1000p/50v/X7/4
1000p/50v/X7/4
R143
R143 15R/6/1%
15R/6/1%
CPU_M_VREF
C114
C114
R142
R142 15R/6/1%
15R/6/1%
0.1u/25v/Y5/4
0.1u/25v/Y5/4
R606 300R/4R606 300R/4 R605 300R/4R605 300R/4
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Sheet
Sheet
Sheet
839
839
839
1
CPU_THRIP# 20
TALERT# 19,30
VCCA_1V2
C1000p50X0402
C1000p50X0402
LDT_STOP# LDT_PWRGD
Rev
Rev
Rev
of
of
of
TP1TP1
C111
C111
0A
0A
0A
5566778
IMC_TCK IMC_TMS IMC_TDI IMC_TRST_L
5
2
Q120
Q120
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
4
6
1
3
IMC_TCK IMC_TMS
5
2
Q121
Q121
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
4
6
1
3
HT_CADIN_H[15..0] HT_CADIN_L[15..0] HT_CADOUT_H[15..0] HT_CADOUT_L[15..0]
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1 L0_CTLOUT_L1 L0_CTLOUT_H0 L0_CTLOUT_L0
L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10
L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8
L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4
HT LINK
HT LINK
L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0
8
R625 10K/4R625 10K/4 R626 10K/4R626 10K/4 R627 10K/4R627 10K/4 R628 10K/4R628 10K/4
AD5 AD4 AD1 AC1
Y6 W6 W2 W3
Y5 Y4 AB6 AA6 AB5 AB4 AD6 AC6 AF6 AE6 AF5 AF4 AH6 AG6 AH5 AH4
Y1 W1 AA2 AA3 AB1 AA1 AC2 AC3 AE2 AE3 AF1 AE1 AG2 AG3 AH1 AG1
+1.8V_S0
HT_CLKOUT_H1 13 HT_CLKOUT_L1 13 HT_CLKOUT_H0 13 HT_CLKOUT_L0 13
HT_CTLOUT_H1 13 HT_CTLOUT_L1 13 HT_CTLOUT_H0 13 HT_CTLOUT_L0 13
HT_CADOUT_H15 HT_CADOUT_L15 HT_CADOUT_H14 HT_CADOUT_L14 HT_CADOUT_H13 HT_CADOUT_L13 HT_CADOUT_H12 HT_CADOUT_L12 HT_CADOUT_H11 HT_CADOUT_L11 HT_CADOUT_H10 HT_CADOUT_L10 HT_CADOUT_H9 HT_CADOUT_L9 HT_CADOUT_H8 HT_CADOUT_L8
HT_CADOUT_H7 HT_CADOUT_L7 HT_CADOUT_H6 HT_CADOUT_L6 HT_CADOUT_H5 HT_CADOUT_L5 HT_CADOUT_H4 HT_CADOUT_L4 HT_CADOUT_H3 HT_CADOUT_L3 HT_CADOUT_H2 HT_CADOUT_L2 HT_CADOUT_H1 HT_CADOUT_L1 HT_CADOUT_H0 HT_CADOUT_L0
IMC_CPU_DBREQ_L20
IMC_LDT_RST#20
L2
80/2A/B8L280/2A/B8
LDT_PWRGD
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
4
THERM_SIC
VDDA25VDDA_25
THERM_SID
CPU_CLK7
CPU_CLK#7
VCC_DDR
VCC_DDR VCC3
R131
R131
4.7K/4
4.7K/4
B
Q22
Q22 2N3904_SOT23
2N3904_SOT23
CE
Q122
Q122
4
CPU_TDO
IMC_CPU_DBREQ_L
Q123
Q123
4
IMC_LDT_RST#
C107
C107
3900p/50vX7/6
3900p/50vX7/6
C106
C106
3900p/50vX7/6
3900p/50vX7/6
R219 300R/4R219 300R/4 R228 300R/4R228 300R/4
VCC_DDR
IMC_DBREQ_L IMC_TDO
5
2
6
1
3
IMC_DBRDY IMC_RST#
5
2
6
1
3
R684 0R0402R684 0R0402 R685 0R0402R685 0R0402
R152
R152
169R/6/1%
169R/6/1%
LDT_PWRGD18
VCC_DDR
R221
R221
39.2R/6/1%
39.2R/6/1%
R222
R222
39.2R/6/1%
39.2R/6/1%
R67
R67 10K/4
10K/4
IMC_RST# IMC_DBRDY
IMC_CPU_TDI
CPU_DBREQ_L
LDT_RST#
C94
C94
4.7u/16v/Y5/1206
4.7u/16v/Y5/1206
CPUCLKIN
CPUCLKIN#
LDT_STOP#15,18
LDT_RST#15,18
C112
C112
X_1000p/50v/X7/6
X_1000p/50v/X7/6
THERM_SIC THERM_SID
R218 0R0402R218 0R0402 R223 X_1KR0402R223 X_1KR0402
COREFB+6 COREFB-6
TP43TP43
CPU_STRAP_HI_E11 CPU_STRAP_LO_F11
TP3TP3 TP7TP7 TP9TP9 TP4TP4 TP12TP12
PWROK_PWM 6
RN13
RN13
8P4R-10KR0402
8P4R-10KR0402
1 3 5 7
VCC_DDR
IMC_CPU_TDI 20
VCC_DDR
THERM_SIC_R 30 THERM_SID_R 30
C96
C96
0.22u/16v/X7/6
0.22u/16v/X7/6
LDT_PWRGD LDT_STOP#
LDT_RST#
TP16TP16
CPU_TDI CPU_TRST_L CPU_TCK CPU_TMS
COREFB+ COREFB-
M_VDDIO_PWRGD VDDR_SENSE
TP6TP6
CPU_TEST25_H
CPU_TEST25_L
R151 300R/4R151 300R/4 R150 300R/4R150 300R/4
+1.8V_S0
2 4 6 8
R603
R603 300R/4
300R/4
R604
R604 300R/4
300R/4
IMC_CPU_DBRDYCPU_DBRDY
3
VDDA25
C100
C100
3300p/50v/X7/4
3300p/50v/X7/4
CPU_PRESENT_L
CPU_SA0 ALERT_L
CPU_DBREQ_L
CPU_M_VREF
M_VDDIO_PWRGD CPU_PRESENT_L CPU_TEST25_H
CPU_TEST25_L
IMC_CPU_DBRDY 20
HT_CADIN_H[15..0]13
HT_CADIN_L[15..0]13 HT_CADOUT_H[15..0]13 HT_CADOUT_L[15..0]13
D D
HT_CLKIN_H113
HT_CLKIN_L113
HT_CLKIN_H013
HT_CLKIN_L013
HT_CTLIN_H113
HT_CTLIN_L113
HT_CTLIN_H013
HT_CTLIN_L013
HT_CADIN_H15 HT_CADIN_L15 HT_CADIN_H14 HT_CADIN_L14 HT_CADIN_H13 HT_CADIN_L13 HT_CADIN_H12 HT_CADIN_L12 HT_CADIN_H11 HT_CADIN_L11 HT_CADIN_H10 HT_CADIN_L10 HT_CADIN_H9 HT_CADIN_L9 HT_CADIN_H8 HT_CADIN_L8
HT_CADIN_H7 HT_CADIN_L7 HT_CADIN_H6
C C
HT_CADIN_L6 HT_CADIN_H5 HT_CADIN_L5 HT_CADIN_H4 HT_CADIN_L4 HT_CADIN_H3 HT_CADIN_L3 HT_CADIN_H2 HT_CADIN_L2 HT_CADIN_H1 HT_CADIN_L1 HT_CADIN_H0 HT_CADIN_L0
B B
IMC_CPU_TDO20
IMC_CPU_TRST_L20
VCC_DDR
CPU_TDI
A A
CPU_TRST_L CPU_TCK CPU_TMS
IMC_CPU_TCK20
IMC_CPU_TMS20
CPU1A
CPU1A
N6
L0_CLKIN_H1
P6
L0_CLKIN_L1
N3
L0_CLKIN_H0
N2
L0_CLKIN_L0
V4
L0_CTLIN_H1
V5
L0_CTLIN_L1
U1
L0_CTLIN_H0
V1
L0_CTLIN_L0
U6
L0_CADIN_H15
V6
L0_CADIN_L15
T4
L0_CADIN_H14
T5
L0_CADIN_L14
R6
L0_CADIN_H13
T6
L0_CADIN_L13
P4
L0_CADIN_H12
P5
L0_CADIN_L12
M4
L0_CADIN_H11
M5
L0_CADIN_L11
L6
L0_CADIN_H10
M6
L0_CADIN_L10
K4
L0_CADIN_H9
K5
L0_CADIN_L9
J6
L0_CADIN_H8
K6
L0_CADIN_L8
U3
L0_CADIN_H7
U2
L0_CADIN_L7
R1
L0_CADIN_H6
T1
L0_CADIN_L6
R3
L0_CADIN_H5
R2
L0_CADIN_L5
N1
L0_CADIN_H4
P1
L0_CADIN_L4
L1
L0_CADIN_H3
M1
L0_CADIN_L3
L3
L0_CADIN_H2
L2
L0_CADIN_L2
J1
L0_CADIN_H1
K1
L0_CADIN_L1
J3
L0_CADIN_H0
J2
L0_CADIN_L0
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
IMC_CPU_TDO CPU_TDI
IMC_CPU_TRST_L CPU_TRST_L
R631 X_1K/4/5%R631 X_1K/4/5%
R632 X_1K/4/5%R632 X_1K/4/5%
R629 X_1K/4/5%R629 X_1K/4/5%
R630 X_1K/4/5%R630 X_1K/4/5%
IMC_CPU_TCK CPU_TCK
IMC_CPU_TMS CPU_TMS
5
5
D D
MEM_MA1_CLK_H112 MEM_MA1_CLK_L112 MEM_MA0_CLK_H011 MEM_MA0_CLK_L011 MEM_MA1_CLK_H012 MEM_MA1_CLK_L012 MEM_MA0_CLK_H111 MEM_MA0_CLK_L111
MEM_MA0_CS_L111 MEM_MA0_CS_L011
MEM_MA0_ODT111 MEM_MA0_ODT011
C C
B B
A A
MEM_MA1_CS_L112 MEM_MA1_CS_L012
MEM_MA1_ODT112 MEM_MA1_ODT012
MEM_MA_RESET#11,12 MEM_MA_CAS_L11,12
MEM_MA_WE_L11,12 MEM_MA_RAS_L11,12
MEM_MA_BANK211,12 MEM_MA_BANK111,12 MEM_MA_BANK011,12
MEM_MA_CKE111,12 MEM_MA_CKE011,12
5
MEM_MA_DQS_L[7..0]11,12 MEM_MA_DQS_H[7..0]11,12
MEM_MA_DM[7..0]11,12 MEM_MA_ADD[15..0]11,12 MEM_MA_DATA[63..0]11,12 MEM_MB_DATA[63..0]11,12
CPU1B
CPU1B
AG21
MA_CLK_H7
AG20
MA_CLK_L7
AE20
MA_CLK_H6
AE19
AC25 AA24
AE28 AC28
AD27 AA25
AE27 AC27
AB25 AB27 AA26
AA27
AC26
AD15 AE15 AG18 AG19 AG24 AG25 AG27 AG28
AF15 AF19 AJ25 AH29
U27 U26
V27 W27 W26 W25
U24
V24
G19
H19
G20
G21
E20
N25
Y27
L27
M25
M27
N24
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27 W24
D29
C29
C25
D25
E19
F19
F15
G15
B29
E24
E18
H15
MA_CLK_L6 MA_CLK_H5 MA_CLK_L5 MA_CLK_H4 MA_CLK_L4 MA_CLK_H3 MA_CLK_L3 MA_CLK_H2 MA_CLK_L2 MA_CLK_H1 MA_CLK_L1 MA_CLK_H0 MA_CLK_L0
MA0_CS_L1 MA0_CS_L0
MA0_ODT1 MA0_ODT0
MA1_CS_L1 MA1_CS_L0
MA1_ODT1 MA1_ODT0
MA_RESET_L MA_CAS_L
MA_WE_L MA_RAS_L
MA_BANK2 MA_BANK1 MA_BANK0
MA_CKE1 MA_CKE0
MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0
MA_DQS_H7 MA_DQS_L7 MA_DQS_H6 MA_DQS_L6 MA_DQS_H5 MA_DQS_L5 MA_DQS_H4 MA_DQS_L4 MA_DQS_H3 MA_DQS_L3 MA_DQS_H2 MA_DQS_L2 MA_DQS_H1 MA_DQS_L1 MA_DQS_H0 MA_DQS_L0
MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
MEM_MA1_CLK_H1 MEM_MA1_CLK_L1 MEM_MA0_CLK_H0 MEM_MA0_CLK_L0 MEM_MA1_CLK_H0 MEM_MA1_CLK_L0 MEM_MA0_CLK_H1 MEM_MA0_CLK_L1
MEM_MA0_CS_L1 MEM_MA0_CS_L0
MEM_MA0_ODT1 MEM_MA0_ODT0
MEM_MA1_CS_L1 MEM_MA1_CS_L0
MEM_MA1_ODT1 MEM_MA1_ODT0
MEM_MA_RESET# MEM_MA_CAS_L
MEM_MA_WE_L MEM_MA_RAS_L
MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0
MEM_MA_CKE1 MEM_MA_CKE0
MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0
MEM_MA_DQS_H7 MEM_MA_DQS_L7 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H0 MEM_MA_DQS_L0
MEM_MA_DM7 MEM_MA_DM6 MEM_MA_DM5 MEM_MA_DM4 MEM_MA_DM3 MEM_MA_DM2 MEM_MA_DM1 MEM_MA_DM0
4
MEM_MA_DQS_L[7..0] MEM_MA_DQS_H[7..0] MEM_MA_DM[7..0] MEM_MA_ADD[15..0] MEM_MA_DATA[63..0] MEM_MB_DATA[63..0]
MEM_MA_DATA63
AE14
MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12
MEM CHA
MEM CHA
MA_DATA11 MA_DATA10
MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0
MA_DQS_H8
MA_DQS_L8
MA_DM8
MA_CHECK7 MA_CHECK6 MA_CHECK5 MA_CHECK4 MA_CHECK3 MA_CHECK2 MA_CHECK1 MA_CHECK0
MA_EVENT_L
4
AG14 AG16 AD17 AD13 AE13 AG15 AE16 AG17 AE18 AD21 AG22 AE17 AF17 AF21 AE21 AF23 AE23 AJ26 AG26 AE22 AG23 AH25 AF25 AJ28 AJ29 AF29 AE26 AJ27 AH27 AG29 AF27 E29 E28 D27 C27 G26 F27 C28 E27 F25 E25 E23 D23 E26 C26 G23 F23 E22 E21 F17 G17 G22 F21 G18 E17 G16 E15 G13 H13 H17 E16 E14 G14
J28 J27
J25 K25
J26 G28 G27 L24 K27 H29 H27
W30
MEM_MA_DATA62 MEM_MA_DATA61 MEM_MA_DATA60 MEM_MA_DATA59 MEM_MA_DATA58 MEM_MA_DATA57 MEM_MA_DATA56 MEM_MA_DATA55 MEM_MA_DATA54 MEM_MA_DATA53 MEM_MA_DATA52 MEM_MA_DATA51 MEM_MA_DATA50 MEM_MA_DATA49 MEM_MA_DATA48 MEM_MA_DATA47 MEM_MA_DATA46 MEM_MA_DATA45 MEM_MA_DATA44 MEM_MA_DATA43 MEM_MA_DATA42 MEM_MA_DATA41 MEM_MA_DATA40 MEM_MA_DATA39 MEM_MA_DATA38 MEM_MA_DATA37 MEM_MA_DATA36 MEM_MA_DATA35 MEM_MA_DATA34 MEM_MA_DATA33 MEM_MA_DATA32 MEM_MA_DATA31 MEM_MA_DATA30 MEM_MA_DATA29 MEM_MA_DATA28 MEM_MA_DATA27 MEM_MA_DATA26 MEM_MA_DATA25 MEM_MA_DATA24 MEM_MA_DATA23 MEM_MA_DATA22 MEM_MA_DATA21 MEM_MA_DATA20
MEM_MA_DATA19 MEM_MA_DATA18 MEM_MA_DATA17 MEM_MA_DATA16 MEM_MA_DATA15 MEM_MA_DATA14 MEM_MA_DATA13 MEM_MA_DATA12 MEM_MA_DATA11 MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
VCC_DDR VCC_DDR
R373
R373 1K/4/5%
MEM_MA_EVENT_L
1K/4/5%
3
MEM_MB1_CLK_H112 MEM_MB1_CLK_L112 MEM_MB0_CLK_H011 MEM_MB0_CLK_L011 MEM_MB1_CLK_H012 MEM_MB1_CLK_L012 MEM_MB0_CLK_H111 MEM_MB0_CLK_L111
MEM_MB0_CS_L111 MEM_MB0_CS_L011
MEM_MB0_ODT111 MEM_MB0_ODT011
MEM_MB1_CS_L112 MEM_MB1_CS_L012
MEM_MB1_ODT112 MEM_MB1_ODT012
MEM_MB_RESET#11,12 MEM_MB_CAS_L11,12
MEM_MB_WE_L11,12 MEM_MB_RAS_L11,12
MEM_MB_BANK211,12 MEM_MB_BANK111,12 MEM_MB_BANK011,12
MEM_MB_CKE111,12 MEM_MB_CKE011,12
MEM_MA_EVENT_L 11,12
3
MEM_MB1_CLK_H1 MEM_MB1_CLK_L1 MEM_MB0_CLK_H0 MEM_MB0_CLK_L0 MEM_MB1_CLK_H0 MEM_MB1_CLK_L0 MEM_MB0_CLK_H1 MEM_MB0_CLK_L1
MEM_MB0_CS_L1 MEM_MB0_CS_L0
MEM_MB0_ODT1 MEM_MB0_ODT0
MEM_MB1_CS_L1 MEM_MB1_CS_L0
MEM_MB1_ODT1 MEM_MB1_ODT0
MEM_MB_RESET# MEM_MB_CAS_L
MEM_MB_WE_L MEM_MB_RAS_L
MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0
MEM_MB_CKE1 MEM_MB_CKE0
MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0
MEM_MB_DQS_H7 MEM_MB_DQS_L7 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H0 MEM_MB_DQS_L0
MEM_MB_DM7 MEM_MB_DM6 MEM_MB_DM5 MEM_MB_DM4 MEM_MB_DM3 MEM_MB_DM2 MEM_MB_DM1 MEM_MB_DM0
2
AL19 AL18
AC31 AF31
AD29 AE29
AB31 AG31
AD31
AC29 AC30 AB29
AA31 AA28
AE31
AA29
AA30 AK13 AK17 AK23
AL23 AL28 AL29
AH17 AK29
AJ19 AK19
U31 U30 W29 W28
Y31 Y30 V31
W31
A18
A19 C19 D19
AE30
B19
N31
M31 M29
N28 N29
N30
P29
P31 R29 R28 R31 R30
T31
T29 U29 U28
AJ13 AJ17
D31 C31 C24 C23 D17 C17 C14 C13
AJ14 AJ23
C30
A23
B17
B13
MEM_MB_DQS_L[7..0] MEM_MB_DQS_H[7..0] MEM_MB_DM[7..0] MEM_MB_ADD[15..0]
CPU1C
CPU1C
MB_CLK_H7 MB_CLK_L7 MB_CLK_H6 MB_CLK_L6 MB_CLK_H5 MB_CLK_L5 MB_CLK_H4 MB_CLK_L4 MB_CLK_H3 MB_CLK_L3 MB_CLK_H2 MB_CLK_L2 MB_CLK_H1 MB_CLK_L1 MB_CLK_H0 MB_CLK_L0
MB0_CS_L1 MB0_CS_L0
MB0_ODT1 MB0_ODT0
MB1_CS_L1 MB1_CS_L0
MB1_ODT1 MB1_ODT0
MB_RESET_L MB_CAS_L
MB_WE_L MB_RAS_L
MB_BANK2 MB_BANK1 MB_BANK0
MB_CKE1 MB_CKE0
MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10 MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0
MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0
MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
2
MEM_MB_DQS_L[7..0]11,12 MEM_MB_DQS_H[7..0]11,12
MEM_MB_DM[7..0]11,12
MEM_MB_ADD[15..0]11,12
MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11
MEM CHB
MEM CHB
MB_DATA10
MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0
MB_DQS_H8
MB_DQS_L8
MB_DM8
MB_CHECK7 MB_CHECK6 MB_CHECK5 MB_CHECK4 MB_CHECK3 MB_CHECK2 MB_CHECK1 MB_CHECK0
MB_EVENT_L
AH13 AL13 AL15 AJ15 AF13 AG13 AL14 AK15 AL16 AL17 AK21 AL21 AH15 AJ16 AH19 AL20 AJ22 AL22 AL24 AK25 AJ21 AH21 AH23 AJ24 AL27 AK27 AH31 AG30 AL25 AL26 AJ30 AJ31 E31 E30 B27 A27 F29 F31 A29 A28 A25 A24 C22 D21 A26 B25 B23 A22 B21 A20 C16 D15 C21 A21 A17 A16 B15 A14 E13 F13 C15 A15 A13 D13
J31 J30
J29 K29
K31 G30 G29 L29 L28 H31 G31
V29
MEM_MB_EVENT_L
Title
Title
Title
Document Number
Document Number
Document Number
MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48 MEM_MB_DATA47 MEM_MB_DATA46 MEM_MB_DATA45 MEM_MB_DATA44 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA31 MEM_MB_DATA30 MEM_MB_DATA29 MEM_MB_DATA28 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MB_DATA25 MEM_MB_DATA24 MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA21 MEM_MB_DATA20
MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
R378
R378 1K/4/5%
1K/4/5%
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
AM3 DDR MEMORY I/F
AM3 DDR MEMORY I/F
AM3 DDR MEMORY I/F
MS-7596
MS-7596
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MS-7596
1
MEM_MB_EVENT_L 11,12
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Sheet
Sheet
Sheet
939
939
939
1
Rev
Rev
Rev
0A
0A
0A
of
of
of
B3 C2 C4 D3 D5 E4 E6 F5 F7 G6 G8
H7 H11 H23
J8 J12 J14 J16 J18 J20 J22 J24
K7
K9 K11 K13 K15 K17 K19 K21 K23
L4
L5
L8 L10 L12 L14 L16 L18 L20 L22
M2
M3
M7
M9 M11 M13 M15 M17 M19 M21 M23
N8 N10 N12 N14 N16 N18 N20 N22
P7
P9 P11 P13 P15 P17 P19 P21 P23
R4
R5
R8 R10 R12 R14 R16 R18 R20 R22
T2
T3
T7
T9 T11 T13
CPU1E
CPU1E
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49 VDD_50 VDD_51 VDD_52 VDD_53 VDD_54 VDD_55 VDD_56 VDD_57 VDD_58 VDD_59 VDD_60 VDD_61 VDD_62 VDD_63 VDD_64 VDD_65 VDD_66 VDD_67 VDD_68 VDD_69 VDD_70 VDD_71 VDD_72 VDD_73 VDD_74 VDD_75 VDD_76 VDD_77 VDD_78 VDD_79 VDD_80 VDD_81 VDD_82 VDD_83 VDD_84 VDD_85
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
VCC_DDR
C124 C10u6.3X50805C124 C10u6.3X50805
VCC_DDR
C198 22u/6.3v/X5/1206C198 22u/6.3v/X5/1206
C194 22u/6.3v/X5/1206C194 22u/6.3v/X5/1206
C205 22u/6.3v/X5/1206C205 22u/6.3v/X5/1206
C199 X_22u/6.3v/X5/1206C199 X_22u/6.3v/X5/1206
5
A3
VSS_1
A7
VSS_2
A9
VSS_3
A11
VSS_4
B4
VSS_5
B9
VSS_6
B11
VSS_7
B14
VSS_8
B16
VSS_9
B18
VSS_10
B20
VSS_11
B22
VSS_12
B24
VSS_13
B26
VSS_14
B28
VSS_15
B30
VSS_16
C3
VSS_17
D14
VSS_18
D16
VSS_19
D18
VSS_20
D20
VSS_21
D22
VSS_22
D24
VSS_23
D26
VSS_24
D28
VSS_25
D30
VSS_26
E11
VSS_27
F4
VSS_28
F14
VSS_29
F16
VSS_30
F18
VSS_31
F20
VSS_32
F22
VSS_33
F24
VSS_34
F26
VSS_35
F28
VSS_36
F30
VSS_37
G9
VSS_38
G11
VSS_39
H8
VSS_40
H10
VSS_41
H12
VSS_42
H14
VSS_43
H16
VSS_44
H18
VSS_45
H24
VSS_46
H26
VSS_47
H28
VSS_48
H30
VSS_49
J4
VSS_50
J5
VSS_51
POWER/GND1
POWER/GND1
J7
VSS_52
J9
VSS_53
J11
VSS_54
J13
VSS_55
J15
VSS_56
J17
VSS_57
J19
VSS_58
J21
VSS_59
J23
VSS_60
K2
VSS_61
K3
VSS_62
K8
VSS_63
K10
VSS_64
K12
VSS_65
K14
VSS_66
K16
VSS_67
K18
VSS_68
K20
VSS_69
K22
VSS_70
K24
VSS_71
K26
VSS_72
K28
VSS_73
K30
VSS_74
L7
VSS_75
L9
VSS_76
L11
VSS_77
L13
VSS_78
L15
VSS_79
L17
VSS_80
L19
VSS_81
L21
VSS_82
L23
VSS_83
M8
VSS_84
M10
VSS_85
5
VCC_DDR
VCC_DDR
C208 0.22u/16v/X7/6C208 0.22u/16v/X7/6
C207 0.22u/16v/X7/6C207 0.22u/16v/X7/6
C296 4.7u/10v/Y5/8C296 4.7u/10v/Y5/8
C295 4.7u/10v/Y5/8C295 4.7u/10v/Y5/8
C291 X_4.7u/10v/Y5/8C291 X_4.7u/10v/Y5/8
VCC_DDR CAP
VCC_DDR
C693 X_180p/50v/N/4_BC693 X_180p/50v/N/4_B
C692 180p/50v/N/4_BC692 180p/50v/N/4_B
VCC_DDR
C211 680pF/50V/NPOC211 680pF/50V/NPO
C210 680pF/50V/NPOC210 680pF/50V/NPO C126 22u/6.3v/X5/1206C126 22u/6.3v/X5/1206
VCCP VCCP
D D
C C
B B
A A
T15 T17 T19 T21 T23
U8 U10 U12 U14 U16 U18 U20 U22
V9 V11 V13 V15 V17 V19 V21 V23
W4 W5
W8 W10 W12 W14 W16 W18 W20 W22
Y2 Y3 Y7
Y9 Y11 Y13 Y15 Y17 Y19 Y21 Y23 AA8
AA10 AA12 AA14 AA16 AA18 AA20 AA22
AB7 AB9
AB11 AB13 AB15 AB17 AB19 AB21 AB23
AC4 AC5 AC8
AC10 AC12 AC14 AC16 AC18 AC20 AC22
AD2 AD3 AD7 AD9
AD11 AD23 AE10 AE12
AF7 AF9
AF11
AG4 AG5 AG7 AH2 AH3
4
CPU1F
CPU1F
VDD_86 VDD_87 VDD_88 VDD_89 VDD_90 VDD_91 VDD_92 VDD_93 VDD_94 VDD_95 VDD_96 VDD_97 VDD_98 VDD_99 VDD_100 VDD_101 VDD_102 VDD_103 VDD_104 VDD_105 VDD_106 VDD_107 VDD_108 VDD_109 VDD_110 VDD_111 VDD_112 VDD_113 VDD_114 VDD_115 VDD_116 VDD_117 VDD_118 VDD_119 VDD_120 VDD_121 VDD_122 VDD_123 VDD_124 VDD_125 VDD_126 VDD_127 VDD_128 VDD_129 VDD_130 VDD_131 VDD_132 VDD_133 VDD_134 VDD_135 VDD_136 VDD_137 VDD_138 VDD_139 VDD_140 VDD_141 VDD_142 VDD_143 VDD_144 VDD_145 VDD_146 VDD_147 VDD_148 VDD_149 VDD_150 VDD_151 VDD_152 VDD_153 VDD_154 VDD_155 VDD_156 VDD_157 VDD_158 VDD_159 VDD_160 VDD_161 VDD_162 VDD_163 VDD_164 VDD_165 VDD_166 VDD_167 VDD_168 VDD_169 VDD_170
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
4
M12
VSS_86
M14
VSS_87
M16
VSS_88
M18
VSS_89
M20
VSS_90
M22
VSS_91
N4
VSS_92
N5
VSS_93
N7
VSS_94
N9
VSS_95
N11
VSS_96
N13
VSS_97
N15
VSS_98
N17
VSS_99
N19
VSS_100
N21
VSS_101
N23
VSS_102
P2
VSS_103
P3
VSS_104
P8
VSS_105
P10
VSS_106
P12
VSS_107
P14
VSS_108
P16
VSS_109
P18
VSS_110
P20
VSS_111
P22
VSS_112
R7
VSS_113
R9
VSS_114
R11
VSS_115
R13
VSS_116
R15
VSS_117
R17
VSS_118
R19
VSS_119
R21
VSS_120
R23
VSS_121
T8
VSS_122
T10
VSS_123
T12
VSS_124
T14
VSS_125
T16
VSS_126
T18
VSS_127
T20
VSS_128
T22
VSS_129
U4
VSS_130
U5
VSS_131
U7
VSS_132
U9
VSS_133
U11
VSS_134
U13
VSS_135
POWER/GND2
POWER/GND2
U15
VSS_136
U17
VSS_137
U19
VSS_138
U21
VSS_139
U23
VSS_140
V2
VSS_141
V3
VSS_142
V10
VSS_143
V12
VSS_144
V14
VSS_145
V16
VSS_146
V18
VSS_147
V20
VSS_148
V22
VSS_149
W7
VSS_150
W9
VSS_151
W11
VSS_152
W13
VSS_153
W15
VSS_154
W17
VSS_155
W19
VSS_156
W21
VSS_157
W23
VSS_158
Y8
VSS_159
Y10
VSS_160
Y12
VSS_161
Y14
VSS_162
Y16
VSS_163
Y18
VSS_164
Y20
VSS_165
Y22
VSS_166
AA4
VSS_167
AA5
VSS_168
AA7
VSS_169
AA9
VSS_170
VCCP
C179 X_22u/6.3v/X5/1206C179 X_22u/6.3v/X5/1206
C178 22u/6.3v/X5/1206C178 22u/6.3v/X5/1206
C177 X_22u/6.3v/X5/1206C177 X_22u/6.3v/X5/1206
C176 X_22u/6.3v/X5/1206C176 X_22u/6.3v/X5/1206
C174 22u/6.3v/X5/1206C174 22u/6.3v/X5/1206
C159 X_22u/6.3v/X5/1206C159 X_22u/6.3v/X5/1206
C156 22u/6.3v/X5/1206C156 22u/6.3v/X5/1206
C155 22u/6.3v/X5/1206C155 22u/6.3v/X5/1206
C154 22u/6.3v/X5/1206C154 22u/6.3v/X5/1206
C151 22u/6.3v/X5/1206C151 22u/6.3v/X5/1206
VCCP_NB
3
CPU1G
CPU1G
A4
VDDNB_1
A6
VDDNB_2
B5
VDDNB_3
B7
VDDNB_4
C6
VDDNB_5
C8
VDDNB_6
D7
VDDNB_7
D9
VDDNB_8
E8
VDDNB_9
E10
VDDNB_10
F9
VDDNB_11
F11
VDDNB_12
G10
VDDNB_13
G12
VDDNB_14
B2
NP/RSVD
H20
NP/VSS1
AE7
NP/VSS2
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
VCCP CAP VCCP_NB CAP
VCCP
C116 X_C10u6.3X50805C116 X_C10u6.3X50805
C108 X_C10u6.3X50805C108 X_C10u6.3X50805
C105 C10u6.3X50805C105 C10u6.3X50805
C110 C10u6.3X50805C110 C10u6.3X50805
C115 X_C10u6.3X50805C115 X_C10u6.3X50805
C117 X_C10u6.3X50805C117 X_C10u6.3X50805
C121 X_C10u6.3X50805C121 X_C10u6.3X50805
3
VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202
POWER/GND3
POWER/GND3
VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214
VCCP
VCCP
VCCP
VCCP
AA11 AA13 AA15 AA17 AA19 AA21 AA23 AB2 AB3 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC7 AC9 AC11 AC13 AC15 AC17 AC19 AC21 AC23 AD8 AD10 AD12 AD14 AD16 AD20 AD22 AD24 AE4 AE5 AE11 AF2 AF3 AF8 AF10 AF12 AF14 AF16
C690 180p/50v/N/4_BC690 180p/50v/N/4_B
C184 0.01u/50v/X7/6_BC184 0.01u/50v/X7/6_B
C183 0.01u/50v/X7/6_BC183 0.01u/50v/X7/6_B
C181 0.22u/16v/X7/6C181 0.22u/16v/X7/6
C180 0.22u/16v/X7/6C180 0.22u/16v/X7/6
C287 4.7u/10v/Y5/8C287 4.7u/10v/Y5/8
C281 X_4.7u/10v/Y5/8C281 X_4.7u/10v/Y5/8
C276 4.7u/10v/Y5/8C276 4.7u/10v/Y5/8
near VDDR 4pin
CPU_VDDR
C173 0.01u/50v/X7/6_BC173 0.01u/50v/X7/6_B
C169 X_0.01u/50v/X7/6_BC169 X_0.01u/50v/X7/6_B
C172 0.22u/16v/X7/6C172 0.22u/16v/X7/6
C270 4.7u/10v/Y5/8C270 4.7u/10v/Y5/8
C268 4.7u/10v/Y5/8C268 4.7u/10v/Y5/8
C266 4.7u/10v/Y5/8C266 4.7u/10v/Y5/8
C274 4.7u/10v/Y5/8C274 4.7u/10v/Y5/8
VCCA_1V2
CPU_VDDR
VCC_DDR
VCCA_1V2
C298 4.7u/10v/Y5/8C298 4.7u/10v/Y5/8
C297 4.7u/10v/Y5/8C297 4.7u/10v/Y5/8
VCCA_1V2
C212 C10u6.3X50805C212 C10u6.3X50805
C213 C10u6.3X50805C213 C10u6.3X50805
VCCP_NB
C188 0.22u/16v/X7/6C188 0.22u/16v/X7/6
C187 0.22u/16v/X7/6C187 0.22u/16v/X7/6
VCCP_NB
C290 4.7u/10v/Y5/8C290 4.7u/10v/Y5/8
VCCP_NB
C122 C10u6.3X50805C122 C10u6.3X50805
C123 X_C10u6.3X50805C123 X_C10u6.3X50805
VCCP_NB
C186 22u/6.3v/X5/1206C186 22u/6.3v/X5/1206C294 4.7u/10v/Y5/8C294 4.7u/10v/Y5/8
C185 X_22u/6.3v/X5/1206C185 X_22u/6.3v/X5/1206
2
AB24 AB26 AB28 AB30 AC24 AD26 AD28 AD30 AF30
2
CPU1H
CPU1H
AJ1
VLDT_A_1
AJ2
VLDT_A_2
AJ3
VLDT_A_3
AJ4
VLDT_A_4
A12
VDDR_1
B12
VDDR_2
C12
VDDR_3
D12
VDDR_4
M24
VDDIO_1
M26
VDDIO_2
M28
VDDIO_3
M30
VDDIO_4
P24
VDDIO_5
P26
VDDIO_6
P28
VDDIO_7
P30
VDDIO_8
T24
VDDIO_9
T26
VDDIO_10
T28
VDDIO_11
T30
VDDIO_12
V25
VDDIO_13
V26
VDDIO_14
V28
VDDIO_15
V30
VDDIO_16
Y24
VDDIO_17
Y26
VDDIO_18
Y28
VDDIO_19
Y29
VDDIO_20 VDDIO_21 VDDIO_22 VDDIO_23 VDDIO_24 VDDIO_25 VDDIO_26 VDDIO_27 VDDIO_28 VDDIO_29
ZIF-SOCKET941-RH
ZIF-SOCKET941-RH
VCCA_1V2 CAP
VCCA_1V2
VCCP_NB
VCCP_NB
VLDT_B_1 VLDT_B_2 VLDT_B_3 VLDT_B_4
VDDR_5 VDDR_6 VDDR_7 VDDR_8 VDDR_9
VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230
POWER/GND4
POWER/GND4
VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242
C695 180p/50v/N/4_BC695 180p/50v/N/4_B
C694 180p/50v/N/4_BC694 180p/50v/N/4_B
C691 180p/50v/N/4_BC691 180p/50v/N/4_B
C192 0.01u/50v/X7/6_BC192 0.01u/50v/X7/6_B
C190 0.01u/50v/X7/6_BC190 0.01u/50v/X7/6_B
C189 X_0.01u/50v/X7/6_BC189 X_0.01u/50v/X7/6_B
Layout: Place as close as possible to CPU socket.
H1 H2 H5 H6
CPU_VDDR
AG12 AH12 AJ12 AK12 AL12
AF18 AF20 AF22 AF24 AF26 AF28 AG10 AG11 AH14 AH16 AH18 AH20 AH22 AH24 AH26 AH28 AH30 AK2 AK14 AK16 AK18 AK20 AK22 AK24 AK26 AK28 AK30 AL5
VLDT_RUN_B
near VDDR 5pin
CPU_VDDR
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
K9 M2 PWR & GND
K9 M2 PWR & GND
K9 M2 PWR & GND
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
C215
C215
C10u6.3X50805
C10u6.3X50805
C167 0.01u/50v/X7/6_BC167 0.01u/50v/X7/6_B
C166 X_0.22u/16v/X7/6C166 X_0.22u/16v/X7/6
C165 0.22u/16v/X7/6C165 0.22u/16v/X7/6
C164 X_0.22u/16v/X7/6C164 X_0.22u/16v/X7/6
C163 0.22u/16v/X7/6C163 0.22u/16v/X7/6
C264 X_4.7u/10v/Y5/8C264 X_4.7u/10v/Y5/8
C260 4.7u/10v/Y5/8C260 4.7u/10v/Y5/8
C258 4.7u/10v/Y5/8C258 4.7u/10v/Y5/8
C256 4.7u/10v/Y5/8C256 4.7u/10v/Y5/8
C161 C10u6.3X50805C161 C10u6.3X50805
C125 X_22u/6.3v/X5/1206C125 X_22u/6.3v/X5/1206
MS-7596
MS-7596
MS-7596
Last Revision Date:
Last Revision Date:
Last Revision Date: Sheet
Sheet
Sheet
1
Friday, January 23, 2009
Friday, January 23, 2009
Friday, January 23, 2009
of
of
of
10 39
10 39
10 39
Rev
Rev
Rev
0A
0A
0A
5
MEM_MA_DQS_H[7..0]9,12 MEM_MA_DQS_L[7..0]9,12
MEM_MA_DM[7..0]9,12 MEM_MA_ADD[15..0]9,12 MEM_MA_DATA[63..0]9,12
D D
MEM_MA_DATA0 MEM_MA_ADD0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26
C C
MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60
B B
MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63
A A
MEM_MA_DQS_H[7..0] MEM_MA_DQS_L[7..0] MEM_MA_DM[7..0] MEM_MA_ADD[15..0] MEM_MA_DATA[63..0]
54
DIMM1
DIMM1
3
DQ0
VDD51VDD
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
107
110
113
116
119
121
124
127
130
133
136
139
170
173
176
179
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
142
145
148
151
VCC3
VTT_DDRVCC_DDR
182
183
186
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
154
157
160
53
189
191
194
197
236
68
120
240
VTT
VTT
VDD
VDD
VDD
VDD
VDDSPD
NC/PAR_IN
NC/ERR_OUT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
163
VSS
166
199
202
205
208
211
214
217
220
223
226
ADDRESS A0
SMBus Addressing
5
C303
C303
C0.1u16Y0402
C0.1u16Y0402
79
167
RSVD
NC/TEST4
VSS
VSS
229
232
48
FREE1
FREE249FREE3
DM0/DQS9
NC/DQS9#
DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17#
CK1#(NU)
VSS
VSS
235
239
187
A10/AP
RESET#
CK1(NU)
VREFDQ
VREFCA
MEC1
MEC1
MEM_MA_EVENT_L
198
188
A0
181
A1
FREE4
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70 55
A11
174
A12
196
A13
172
A14
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
7
DQS0
6
DQS0#
16
DQS1
15
DQS1#
25
DQS2
24
DQS2#
34
DQS3
33
DQS3#
85
DQS4
84
DQS4#
94
DQS5
93
DQS5#
103
DQS6
102
DQS6#
112
DQS7
111
DQS7#
43
DQS8
42
DQS8#
125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162
195
ODT0
77
ODT1
50
CKE0
169
CKE1
193
CS0#
76
CS1#
71
BA0
190
BA1
52
BA2
73
WE#
192
RAS#
74
CAS#
168 184
CK0
185
CK0#
63 64
1 67 118
SCL
238
SDA
237
SA1
117
SA0
MEC2
MEC3
DDRIII-240P_BLUE-RH
DDRIII-240P_BLUE-RH
MEC2
MEC3
4
MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7
MEM_MA0_ODT0 MEM_MA0_ODT1 MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA0_CS_L0 MEM_MA0_CS_L1 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2
MEM_MA_WE_L MEM_MA_RAS_L MEM_MA_CAS_L MEM_MA_RESET#
MEM_MA0_CLK_H0 MEM_MA0_CLK_L0 MEM_MA0_CLK_H1 MEM_MA0_CLK_L1
SCL0 SDA0
4
MEM_MA_EVENT_L 9,12
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
VDDR_VREF_DQ VDDR_VREF_CA
VTT_DDR
MEM_MA0_ODT0 9 MEM_MA0_ODT1 9 MEM_MA_CKE0 9,12 MEM_MA_CKE1 9,12 MEM_MA0_CS_L0 9 MEM_MA0_CS_L1 9 MEM_MA_BANK0 9,12 MEM_MA_BANK1 9,12 MEM_MA_BANK2 9,12
MEM_MA_WE_L 9,12 MEM_MA_RAS_L 9,12 MEM_MA_CAS_L 9,12 MEM_MA_RESET# 9,12
MEM_MA0_CLK_H0 9 MEM_MA0_CLK_L0 9 MEM_MA0_CLK_H1 9 MEM_MA0_CLK_L1 9
SCL0 6,7,12,20,23,28,33 SDA0 6,7,12,20,23,28,33
C687
C687
C1u16Y
C1u16Y
3
MEM_MB_DQS_H[7..0]9,12 MEM_MB_DQS_L[7..0]9,12
MEM_MB_DM[7..0]9,12
MEM_MB_ADD[15..0]9,12
MEM_MB_DATA[63..0]9,12
VCC_DDR
C688
C688
C1u16Y
C1u16Y
SCL0
VCC_DDR
R75
R75 15R1%
15R1%
R74
R74 15R1%
15R1%
VCC_DDR
R104
R104 15R1%
15R1%
R379
R379 15R1%
15R1%
VCC3
Y
D21
D21 X_1PS226_SOT23
X_1PS226_SOT23
Z
X
VCC3
Y
D20
D20 X_1PS226_SOT23
C57
C57
C0.1u16Y0402
C0.1u16Y0402
Z
C45
C45
X_0.1u/25v/Y5/4
X_0.1u/25v/Y5/4
VDDR_VREF_DQ
C246
C246
0.1u/25v/Y5/4
0.1u/25v/Y5/4
C802
C802
X_0.1u/25v/Y5/4
X_0.1u/25v/Y5/4
VDDR_VREF_CA
C247
C247
0.1u/25v/Y5/4
0.1u/25v/Y5/4
X
VDDR_VREF_DQ
VDDR_VREF_CA
VDDR_VREF_CAVDDR_VREF_DQ
C241
C241
C0.1u16Y0402
C0.1u16Y0402
X_1PS226_SOT23
C54
C54 1nf/25v/X7R/4
1nf/25v/X7R/4
C250
C250 1nf/25v/X7R/4
1nf/25v/X7R/4
SDA0
MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63
DIMM2
DIMM2
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
107
ADDRESS A2
3
MEM_MB_DQS_H[7..0] MEM_MB_DQS_L[7..0] MEM_MB_DM[7..0] MEM_MB_ADD[15..0] MEM_MB_DATA[63..0]
54
VDD51VDD
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
VSS
110
113
116
119
2
VCC3
C637
C637
C0.1u16Y0402
C0.1u16Y0402
VTT_DDR
170
173
176
179
182
183
186
189
191
194
197
236
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
121
124
127
130
133
136
139
142
145
2
VSS
148
151
154
157
160
163
166
199
202
205
208
211
MEM_MB_EVENT_L
48
187
198
120
240
53
79
167
68
VTT
VTT
NC/TEST4
NC/PAR_IN
NC/ERR_OUT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
214
217
220
223
226
229
232
RSVD
VSS
235
FREE1
FREE249FREE3
A10/AP
DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7# DQS8#
DM0/DQS9
NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17#
RESET#
CK1(NU)
CK1#(NU)
VREFDQ VREFCA
VSS
VSS
MEC1
239
MEC1
188
A0
181
A1
FREE4
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70 55
A11
174
A12
196
A13
172
A14
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
7
DQS0
6 16
DQS1
15 25
DQS2
24 34
DQS3
33 85
DQS4
84 94
DQS5
93 103
DQS6
102 112
DQS7
111 43
DQS8
42 125
126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162
195
ODT0
77
ODT1
50
CKE0
169
CKE1
193
CS0#
76
CS1#
71
BA0
190
BA1
52
BA2
73
WE#
192
RAS#
74
CAS#
168 184
CK0
185
CK0#
63 64
1 67 118
SCL
238
SDA
237
SA1
117
SA0
MEC2
MEC3
DDRIII-240P_BLUE-RH
DDRIII-240P_BLUE-RH
MEC2
MEC3
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H7 MEM_MB_DQS_L7
MEM_MB0_ODT0 MEM_MB0_ODT1 MEM_MB_CKE0 MEM_MB_CKE1 MEM_MB0_CS_L0 MEM_MB0_CS_L1 MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2
MEM_MB_WE_L MEM_MB_RAS_L MEM_MB_CAS_L MEM_MB_RESET#
MEM_MB0_CLK_H0 MEM_MB0_CLK_L0 MEM_MB0_CLK_H1 MEM_MB0_CLK_L1
MEM_MB_EVENT_L 9,12
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
MEM_MB0_ODT0 9 MEM_MB0_ODT1 9 MEM_MB_CKE0 9,12 MEM_MB_CKE1 9,12 MEM_MB0_CS_L0 9 MEM_MB0_CS_L1 9 MEM_MB_BANK0 9,12 MEM_MB_BANK1 9,12 MEM_MB_BANK2 9,12
MEM_MB_WE_L 9,12 MEM_MB_RAS_L 9,12 MEM_MB_CAS_L 9,12 MEM_MB_RESET# 9,12
MEM_MB0_CLK_H0 9 MEM_MB0_CLK_L0 9 MEM_MB0_CLK_H1 9 MEM_MB0_CLK_L1 9
VDDR_VREF_DQ VDDR_VREF_CA SCL0
SCL0 6,7,12,20,23,28,33
SDA0
SDA0 6,7,12,20,23,28,33
VCC3
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
1
MS-7596
MS-7596
MS-7596
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Sheet
Sheet
Sheet
11 39
11 39
11 39
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
MEM_MA_DQS_H[7..0]9,11 MEM_MA_DQS_L[7..0]9,11
MEM_MA_DM[7..0]9,11 MEM_MA_ADD[15..0]9,11
MEM_MA_DATA[63..0]9,11
D D
MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23
C C
MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57
B B
MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63
A A
MEM_MA_DQS_H[7..0] MEM_MA_DQS_L[7..0] MEM_MA_DM[7..0] MEM_MA_ADD[15..0] MEM_MA_DATA[63..0]
VCC_DDR
DIMM3
DIMM3
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
VSS
107
110
5
54
VDD51VDD
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
VSS
VSS
113
116
119
121
124
127
VSS
VSS
130
133
VSS
VSS
VSS
136
139
170
173
176
179
182
VDD
VDD
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
142
145
148
151
154
VCC3
VTT_DDR
120
183
186
189
191
194
197
236
VTT
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
157
160
163
166
199
202
205
208
211
214
4
C168
C168
C0.1u16Y0402
C0.1u16Y0402
MEM_MA_EVENT_L
48
187
198
240
53
167
79
68
VTT
RSVD
FREE1
FREE249FREE3
NC/TEST4
NC/PAR_IN
NC/ERR_OUT
A10/AP
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
DM0/DQS9 NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0 ODT1 CKE0 CKE1
RAS# CAS#
RESET#
CK1(NU)
CK1#(NU) VREFDQ
VREFCA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MEC1
217
220
223
226
229
232
235
239
MEC1
MEC2
188
A0
181
FREE4
A1
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70 55
A11
174
A12
196
A13
172
A14
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
7 6 16 15 25 24 34 33 85 84 94 93 103 102 112 111 43 42
125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162
195 77 50 169 193
CS0#
76
CS1#
71
BA0
190
BA1
52
BA2
73
WE#
192 74 168
184
CK0
185
CK0#
63 64
1 67 118
SCL
238
SDA
237
SA1
117
SA0
MEC2
MEC3
ZIF-DDRIII240P-RH
ZIF-DDRIII240P-RH
MEC3
4
MEM_MA_EVENT_L 9,11
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
MEM_MA1_ODT0 MEM_MA1_ODT1 MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA1_CS_L0 MEM_MA1_CS_L1 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2
MEM_MA_WE_L MEM_MA_RAS_L MEM_MA_CAS_L MEM_MA_RESET#
MEM_MA1_CLK_H0 MEM_MA1_CLK_L0 MEM_MA1_CLK_H1 MEM_MA1_CLK_L1
MEM_MA1_ODT0 9 MEM_MA1_ODT1 9 MEM_MA_CKE0 9,11 MEM_MA_CKE1 9,11 MEM_MA1_CS_L0 9 MEM_MA1_CS_L1 9 MEM_MA_BANK0 9,11 MEM_MA_BANK1 9,11 MEM_MA_BANK2 9,11
MEM_MA_WE_L 9,11 MEM_MA_RAS_L 9,11 MEM_MA_CAS_L 9,11 MEM_MA_RESET# 9,11
MEM_MA1_CLK_H0 9 MEM_MA1_CLK_L0 9 MEM_MA1_CLK_H1 9 MEM_MA1_CLK_L1 9
VDDR_VREF_DQ VDDR_VREF_CA
SCL0
SCL0 6,7,11,20,23,28,33
SDA0
SDA0 6,7,11,20,23,28,33
VCC3 VCC3
C52
C52
X_C0.1u16Y0402
X_C0.1u16Y0402
VDDR_VREF_CAVDDR_VREF_DQ
MEM_MB_DQS_L[7..0]9,11 MEM_MB_DQS_H[7..0]9,11
MEM_MB_DM[7..0]9,11
MEM_MB_ADD[15..0]9,11
MEM_MB_DATA[63..0]9,11
C49
C49
X_C0.1u16Y0402
X_C0.1u16Y0402
3
MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63
3
MEM_MB_DQS_L[7..0] MEM_MB_DQS_H[7..0] MEM_MB_DM[7..0] MEM_MB_ADD[15..0] MEM_MB_DATA[63..0]
2
VCC3
VCC_DDR
54
DIMM4
DIMM4
3
DQ0
VDD51VDD
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
VSS
VSS
107
110
113
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
116
119
121
124
127
130
VSS
VSS
133
136
170
173
176
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
139
142
145
148
179
182
183
186
189
191
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
151
154
157
160
163
166
ADDRESS A6ADDRESS A4
C657
C657
VTT_DDR
C0.1u16Y0402
C0.1u16Y0402
MEM_MB_EVENT_L
48
187
120
194
197
236
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
199
202
205
208
211
214
2
198
240
53
167
79
68
VTT
VTT
RSVD
FREE1
FREE249FREE3
FREE4
NC/TEST4
NC/PAR_IN
NC/ERR_OUT
A10/AP
A11 A12 A13 A14 A15
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
DM0/DQS9
NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17#
ODT0 ODT1 CKE0 CKE1
CS0# CS1#
BA0 BA1 BA2
WE# RAS# CAS#
RESET#
CK0
CK0#
CK1(NU)
CK1#(NU)
VREFDQ VREFCA
SCL SDA SA1
VSS
SA0
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MEC1
MEC2
217
220
223
226
229
232
235
239
MEC1
MEC2
MEC3
188
A0
181
A1
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70 55 174 196 172 171
39 40 45 46 158 159 164 165
7 6 16 15 25 24 34 33 85 84 94 93 103 102 112 111 43 42
125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162
195 77 50 169 193 76 71 190 52
73 192 74 168
184 185 63 64
1 67 118 238 237 117
MEC3
ZIF-DDRIII240P-RH
ZIF-DDRIII240P-RH
MEM_MB_EVENT_L 9,11
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H7 MEM_MB_DQS_L7
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
MEM_MB1_ODT0 MEM_MB1_ODT1 MEM_MB_CKE0 MEM_MB_CKE1 MEM_MB1_CS_L0 MEM_MB1_CS_L1 MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2
MEM_MB_WE_L MEM_MB_RAS_L MEM_MB_CAS_L MEM_MB_RESET#
MEM_MB1_CLK_H0 MEM_MB1_CLK_L0 MEM_MB1_CLK_H1 MEM_MB1_CLK_L1
VDDR_VREF_DQ VDDR_VREF_CA
SCL0 SDA0
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
MEM_MB1_ODT0 9 MEM_MB1_ODT1 9 MEM_MB_CKE0 9,11 MEM_MB_CKE1 9,11 MEM_MB1_CS_L0 9 MEM_MB1_CS_L1 9 MEM_MB_BANK0 9,11 MEM_MB_BANK1 9,11 MEM_MB_BANK2 9,11
MEM_MB_WE_L 9,11 MEM_MB_RAS_L 9,11 MEM_MB_CAS_L 9,11 MEM_MB_RESET# 9,11
MEM_MB1_CLK_H0 9 MEM_MB1_CLK_L0 9 MEM_MB1_CLK_H1 9 MEM_MB1_CLK_L1 9
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
MS-7596
MS-7596
MS-7596
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Wednesday, January 14, 2009
Sheet
Sheet
Sheet
12 39
12 39
12 39
1
Rev
Rev
Rev
0A
0A
0A
of
of
of
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