MSI MS-7392 Schematic
1
Block Diagram/Clock Map/Power Map
Intel LGA775 CPU
Intel Bearlake- MCH -P31/G31
1Cover Sheet
2-4
5-7
8-11
MS-7392
CPU:
Intel Core2 Duo, Wolfdale, Kentsfield and
Version： 1.2
Yorkfield processors in LGA775 Package.
Intel ICH7 - PCI & DMI & CPU & IRQ
Intel ICH7 - LPC & ATA & USB & GPIO 13
Intel ICH7 - POWER
Clock - ICS9LPRS906CGLF
LPC I/O - F81182
HD- ALC888
LAN REALTEK RTL8111C
DDR II System Memory 1 & 2
DDR II System Memory 3 & 4
DDR II VTT Decoupling
PCI EXPRESS X16 Slot
A A
PCI Slot 1 & 2 & 3 & PCI Express X1Slot
ATA33/66/100 IDE & SATA Connectors
USB Connectors
ATX Connetcor & Front Panel & FAN
VGA Connectors
12
14
15
16
17
18
19
20
21
22
23-24
25
26
27
28
System Chipset:
Intel - MCH (North Bridge) P31/G31
Intel ICH7 (South Bridge)
On Board Chipset:
BIOS -- SPI EEPROM
HD Codec -- ALC888
LPC Super I/O -- F81182
LAN-- REALTEK RTL8111C
CLOCK -- ICS9LPRS906CGLF
Main Memory:
DDR II * 4 (Max 4GB)
Expansion Slots:
PCI2.3 SLOT * 3
PCI EXPRESS X1 SLOT
PCI EXPRESS X16 SLOT
INTELSIL PWM:
Controller: INTELSIL - ISL6322CR
ACPI CONTROLLER UPI
VRM 11.0 - INTELSIL - ISL6322CR
SYSTEM POWER
AutoBOM parts
29
30
31
32
MSI
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
COVER SHEET
COVER SHEET
COVER SHEET
MS-7392
MS-7392
MS-7392
135Tuesday, May 06, 2008
135Tuesday, May 06, 2008
135Tuesday, May 06, 2008
of
of
of
1.2
1.2
1.2
Controller:
ISL6322CR
1
Block Diagram
Intel LGA775 Processor
FSB
PCI EXPRESS
X16
Connector
PCI EXPRESS X16
DDR2 667/800
DDRII
4 DDR II
DIMM
Modules
Bearlake
GMCH P31
DMI
UltraDMA
33/66/100
IDE Primary
A A
SATA 0~3
SATA
ICH7
USB
USB Port 0~7
ALC888
HD Codec
HD Audio Link
PCI
PCI
PCI EXPRESS X1
LPC Bus
LPC SIO
REALTEK
RTL8111C
SPI
SPI
Fintek
F71882
PCI Slot 1
PCI Slot 2
PCI Slot 3
PCI EXPRESS X1
EEPROM
FWH
Keyboard
Mouse
1
Floopy Parallel Serial
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
MS-7392
MS-7392
MS-7392
235Tuesday, May 06, 2008
235Tuesday, May 06, 2008
235Tuesday, May 06, 2008
of
of
of
1.2
1.2
1.2
5
4
3
2
1
HCLK
LGA775
CLOCK MAP
D D
P31
MCHCLK
MCH
ICS
9LPRS514EGLF
ICHCLK
Clock
Generator
SATACLK
USB48MHz
ICH7
ICH14.318MHz
C C
SIO48MHz
Winbon
LPC IO
AC_CLK
14.318MHz
B B
PCI_LAN
33MHz
ALC888
REALTEK
8111C
CHANNEL A
CHANNEL A #
CHANNEL B
CHANNEL B#
ICS
9LPRS514EGLF
Clock
Generator
PCI_E1_100MHz
PCI_E2_100MHz
PCI_E1
PCI-Express X 16
PCI_E2
PCI-Express X 1
PCI_E3PCI_E3_100MHz
PCI-Express X 1
PCI1
A A
5
PCICLK[0..2]
33MHz
4
PCI2
PCI3
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
CLOCK MAP
CLOCK MAP
CLOCK MAP
MS-7392
MS-7392
MS-7392
1
335Tuesday, May 06, 2008
335Tuesday, May 06, 2008
335Tuesday, May 06, 2008
of
of
of
1.2
1.2
1.2
5
POWER MAP
4
3
2
1
D D
ATX POWER
+12V +5V +3.3V +5VSB
25A 15A25.5A
2A
19A
937.5mA
6.5A
5A
12.1A
125A 5.3A
PCI_E1(X16)
PCI_E2*2(X1)
PCI1
PCI2
PCI3
LGA775VRM 11.
C C
UPI
Controller
5VDIMM VCC_DDR
UPI
8.58A
VR
15.3+1.31+6.2 = 22.81
B B
V_1P5_CORE
71882FG
4+9.4+1.2 = 14.6A14.6*1.8/5/0.8 = 6.57A
1.2A
15.3A
VTT_DDR
P31
4A
MCH
13.8A + 1.5A
= 15.3A
9.4A
DDR2 X 4
1.2A
1.71mA
0.9A
6.2A
1.31A
V_1P05_CORE
VR
1.31A
0.7A
ICH7
14mA
VR
V_FSB_VTT
6.2A
VLAN25
REALTEK
VCC3_SB
1.5A
VLAN12
RTL8111C
A A
5VDUAL
5
4.345A
MSI
4.345A
USB+PS2
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
POWER MAP
POWER MAP
POWER MAP
MS-7392
MS-7392
MS-7392
1
1.2
1.2
435Tuesday, May 06, 2008
435Tuesday, May 06, 2008
435Tuesday, May 06, 2008
1.2
of
of
of
8
7
6
5
4
3
2
1
CPU SIGNAL BLOCK
VID[0..7]30
CPU_GTLREF0
H_A#[3..35]
H_D#[0..63]
H_DBI#[0..3]
H_REQ#[0..4]
VID[0..7]
H_RS#[0..2]
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
CPU_GTLREF1
H_IERR#
H_FERR#
H_STPCLK#
H_INIT#
H_DBSY#
H_DRDY#
H_TRDY#
H_ADS#
H_LOCK#
H_BNR#
H_HIT#
H_HITM#
H_BPRI#
H_DEFER#
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
CPU_TMPA
VTIN_GND
TRMTRIP#
H_PROCHOT#
H_IGNNE#
ICH_H_SMI#
H_A20M#
H_TESTHI13
H_TEST
CPU_BOOTSLT
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
H_PWRGD
H_CPURST#
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
CPU1A
CPU1A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
D53#
D52#
C14
H_D#52
D51#
A14
C15
H_D#51
H_D#50
D50#
D49#
D17
H_D#49
H_A#35
H_A#34
AJ6
AJ5
A35#
D48#
D20
G22
H_D#48
H_D#47
H_A#33
AH5
A34#
A33#
D47#
D46#
D22
H_D#46
H_A#31
H_A#32
AH4
AG5
A32#
D45#
E22
G21
H_D#45
H_D#44
H_A#30
AG4
A31#
A30#
D44#
D43#
F21
H_D#43
H_A#28
H_A#29
AG6
AF4
A29#
D42#
F20
E21
H_D#42
H_D#41
H_A#27
AF5
A28#
A27#
D41#
D40#
E19
H_D#40
H_A#26
H_A#25
AB4
AC5
A26#
D39#
F18
E18
H_D#39
H_D#38
H_A#24
AB5
A25#
A24#
D38#
D37#
F17
H_D#37
H_A#23
H_A#22
AA5
AD6
A23#
D36#
G17
G18
H_D#35
H_D#36
H_A#21
AA4
A22#
A21#
D35#
D34#
E16
H_D#34
H_A#19
H_A#18
H_A#20
A20#Y4A19#Y6A18#W6A17#
D33#
D32#
D31#
E15
G16
G15
H_D#31
H_D#32
H_D#33
H_A#17
H_A#15
H_A#16
H_A#14
H_A#13
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D30#
D29#
D28#
D27#
D26#
F15
F14
E13
G14
G13
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_A#11
H_A#12
D25#
F12
D13
H_D#24
H_D#25
H_A#10
U6
D24#
F11
H_D#23
H_A#8
H_A#7
H_A#6
H_A#5
H_A#9
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
E10
D10
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_A#4
H_A#3
L5
H_D#16
H_D#17
AC2
D11
C12
H_D#14
H_D#15
DBR#
D14#
D13#
B12
H_D#13
AJ3
AN4
AN3
AN6
AN5
ITP_CLK1
VSS_SENSE
VCC_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D12#D8D11#
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B10
A11
A10
C11
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
AK3
ITP_CLK0
H_D#5
H_D#6
AM7
AM5
AL4
AK4
AL6
AM3
AL5
AM2
VID6#
VID5#
VID4#
VID3#
VID2#
VID1#
VID0#
VID_SELECT
GTLREF0
RSVD#AM7
GTLREF1
GTLREF_SEL
GTLREF2
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD#G6
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1
B4
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_A#[3..35]8
D D
C C
VTT_OUT_LEFT
B B
A A
H_D#[0..63]8
H_DBI#[0..3]8
H_REQ#[0..4]8
H_RS#[0..2]8
H_IERR#6
H_FERR#6,12
H_STPCLK#12
H_INIT#12
H_DBSY#8
H_DRDY#8
H_TRDY#8
H_ADS#8
H_LOCK#8
H_BNR#8
H_HIT#8
H_HITM#8
H_BPRI#8
H_DEFER#8
CPU_TMPA16
VTIN_GND16
TRMTRIP#6,12
H_PROCHOT#6
H_IGNNE#12
ICH_H_SMI#12
H_A20M#12
R97 51R0402R97 51R0402
CPU_BSEL015,16
CPU_BSEL115
CPU_BSEL215
H_PWRGD6,12
H_CPURST#6,8
AN7
H1
H2
H29
E24
AG3
AF2
AG2
AD2
AJ1
AJ2
G5
J6
K6
M6
J5
K4
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
PECI
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI_M
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
CPUCLK#
CPUCLK
H_RS#2
H_RS#1
H_RS#0
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
H_ADSTB#1
H_ADSTB#0
H_DSTBP#3
H_DSTBP#2
H_DSTBP#1
H_DSTBP#0
H_DSTBN#3
H_DSTBN#2
H_DSTBN#1
H_DSTBN#0
H_NMI
H_INTR
VCC_VRM_SENSE
VSS_VRM_SENSE
VID_SELECT
CPU_GTLREF0
CPU_GTLREF1
RN6
RN6
8P4R-51R0402
8P4R-51R0402
1
3
5
7
R85 51R0402R85 51R0402
R149 51R0402R149 51R0402
R71 51R0402R71 51R0402
R150 51R0402R150 51R0402
R77 X_130R0402R77 X_130R0402
R99 X_51R0402R99 X_51R0402
CPUCLK# 15
CPUCLK 15
TP3TP3
TP2TP2
R74 X_49.9R1%0402R74 X_49.9R1%0402
R102 X_49.9R1%0402R102 X_49.9R1%0402
R96 49.9R1%0402R96 49.9R1%0402R59 X_51R0402R59 X_51R0402
R105 49.9R1%0402R105 49.9R1%0402
R94 49.9R1%0402R94 49.9R1%0402
R155 49.9R1%0402R155 49.9R1%0402
TP5TP5
TP7TP7
TP6TP6
TP4TP4
H_ADSTB#1 8
H_ADSTB#0 8
H_DSTBP#3 8
H_DSTBP#2 8
H_DSTBP#1 8
H_DSTBP#0 8
H_DSTBN#3 8
H_DSTBN#2 8
H_DSTBN#1 8
H_DSTBN#0 8
H_NMI 12
H_INTR 12
TP8TP8
TP10TP10
VCC_VRM_SENSE 30
VSS_VRM_SENSE 30
VID_SELECT 30
CPU_GTLREF0 6
CPU_GTLREF1 6
PECI 16
2
4
6
8
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT
H_BR#0 6,8
VTT_OUT_LEFT
C54
C54
C0.1U16Y0402
C0.1U16Y0402
VTT_OUT_RIGHT
RN3
RN3
8P4R-680R
8P4R-680R
1
3
5
7
1
3
5
7
RN2
RN2
8P4R-680R
8P4R-680R
VID_SELECT
R104 X_51R0402R104 X_51R0402
R51 X_51R0402R51 X_51R0402
R69 X_0R0402R69 X_0R0402
R57 0R0402R57 0R0402
R48 X_0R0402R48 X_0R0402
R103 0R0402R103 0R0402
R80 0R0402R80 0R0402
H_TMS
H_TDI
H_BPM#2
H_TCK
8P4R-51R0402
8P4R-51R0402
H_TDO
H_BPM#4
H_BPM#3
H_TRST#
8P4R-51R0402
8P4R-51R0402
H_BPM#5
2
H_BPM#1
4
H_BPM#0
6
8
8P4R-51R0402
8P4R-51R0402
2
4
6
8
2
4
6
8
V_FSB_VTT
For HKB
kentsfield(Quad core)
TP_CPU_G1
H_TEST
H_TESTHI8H_BPM#3
H_TESTHI9
H_TEST
TP_CPU_G1
TP_CPU_U1
VTT_OUT_RIGHT
RN7
RN7
1
2
3
4
5
6
7
8
VTT_OUT_RIGHT
RN5
RN5
1
2
3
4
5
6
7
8
VTT_OUT_RIGHT
RN4
RN4
1
3
5
7
VTT_OUT_LEFT
H_BPM#2
H_BPM#1
H_BPM#0
H_TESTHI_M
VID1
VID0
VID5
VID6
VID7
VID3
VID4
VID2
PLACE BPM/TCK/TDI/TMS TERMINATION NEAR CPU
PLACE TDO TERMINATION NEAR CONNECTOR
C31
C31
C0.1U16Y0402
C0.1U16Y0402
R49
R49
680R0402
680R0402
R53
R53
X_62R0402
X_62R0402
C29
C29
C0.1U16Y0402
C0.1U16Y0402
C35
C35
C0.1U16Y0402
C0.1U16Y0402
TP_CPU_G1 7
TP_CPU_U1 7
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Signals
2
MS-7392
MS-7392
MS-7392
1.2
1.2
1.2
of
535Tuesday, May 06, 2008
of
535Tuesday, May 06, 2008
of
535Tuesday, May 06, 2008
1
8
VCCP
AF22
AF21
CPU1B
AF19
AF18
AF15
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AE9
AD8
AC8
AB8
AA8
VCCP
CPU1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
D D
VCCP
C C
7
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
W29
W28
W27
W26
W25
W24
W23
U26
U27
U28
U29
U30
VCC
VCC
AH19
VCC
VCC
U25
AH21
VCC
VCC
U24
AH22
VCC
U23
AH25
VCC
VCCT8VCC
AH26
VCC
VCC
T30
AH27
VCC
VCC
T29
6
AH28
VCC
VCC
T28
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
T23
VCC
AJ12
VCC
AJ14
VCC
AJ15
VCC
VCCN8VCCP8VCCR8VCC
AJ18
N30
VCC
VCC
AJ19
N29
VCC
VCC
AJ21
N28
VCC
VCC
AJ22
N27
VCC
VCC
AJ25
N26
VCC
VCC
AJ26
VCC
VCC
N25
5
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
K23
K24
K25
K26
K27
K28
K29
N23
N24
M27
M28
M29
M30
K30
M23
M24
M25
M26
AL26
J30
VCC
VCC
AL29
J29
VCC
VCC
AL30
J28
VCC
VCC
4
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
AN9
AN8
AN30
3
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD#F29
VCC
VCC
VCC
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1
AN25
AN26
AN29
H_VCCA
A23
H_VSSA
B23
H_VCCPLL
D23
H_VCCA
C23
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
VTT_SEL
F27
F29
2
VCCA ------ 120mA
VCCIOPLL -- 100mA
V_FSB_VTT
VTT_OUT_RIGHT VTT_OUT_LEFT
VTT_SEL 29
V_FSB_VTT
C146
C146
C10U10Y0805
C10U10Y0805
C130
C130
X_C10U10Y0805
X_C10U10Y0805
C136
C136
X_C22U6.3X1206
X_C22U6.3X1206
CAPS FOR FSB GENERIC
1
GTLREF VOLTAGE SHOULD BE0.635*VTT
57.6ohm and 100ohm divider
B B
VTT_OUT_RIGHT
VTT_OUT_RIGHT
VTT_OUT_RIGHT
VTT_OUT_RIGHT
R81 115R1%0402-RHR81 115R1%0402-RH R93 10R0402R93 10R0402
R70
R70
200R1%0402
200R1%0402
R83 115R1%0402-RHR83 115R1%0402-RH
R84
R84
200R1%0402
200R1%0402
C55
C55
C1U16Y
C1U16Y
R91 10R0402R91 10R0402
C56
C56
C1U16Y
C1U16Y
C62
C62
X_C220P16X0402
X_C220P16X0402
C58
C58
X_C220P16X0402
X_C220P16X0402
CPU_GTLREF0 5
CPU_GTLREF1 5
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS
V_FSB_VTT
V_1P5_CORE
CP2CP2
CP1CP1
L4
L4
X_10U100m_0805
X_10U100m_0805
21
C125
C125
C1U16Y
C1U16Y
C119
C119
X_C10U10Y0805
X_C10U10Y0805
C121
C121
X_C10U10Y0805
X_C10U10Y0805
C115
C115
X_C0.1U16Y0402
X_C0.1U16Y0402
H_VCCPLL
C117
C117
C10U10Y0805
C10U10Y0805
H_VCCA
H_VSSA
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT
A A
VTT_OUT_LEFT
VTT_OUT_RIGHT
VTT_OUT_LEFT
R75 130R1%0402R75 130R1%0402
R87 62R0402R87 62R0402
R62 62R0402R62 62R0402 R55
R95 X_100R/2R95 X_100R/2
R100 62R0402R100 62R0402
H_PROCHOT#
H_IERR#
H_CPURST#
H_PWRGD
H_BR#0
H_PROCHOT# 5
H_IERR# 5
H_CPURST# 5,8
H_PWRGD 5,12
H_BR#0 5,8
PLACE AT ICH END OF ROUTE
V_FSB_VTT
8
V_FSB_VTT TRMTRIP#
7
R313 62R0402R313 62R0402
R312 62R0402R312 62R0402
H_FERR#
TRMTRIP# 5,12
H_FERR# 5,12
6
5
4
VCC5_SB VTT_OUT_LEFT
R13
R13
1KR0402
1KR0402
VID_GD#29,30
R64 10KR0402R64 10KR0402
VTT_PWG SPEC :
High > 0.9V
R55
1.25V VTT_PWRGOOD
680R0402
680R0402
VTT_PWG
Q8
Q8
C
C
B
B
E
E
2N3904S
2N3904S
3
Low < 0.3V
Trise < 150ns
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
2
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
MS-7392
MS-7392
MS-7392
635Tuesday, May 06, 2008
635Tuesday, May 06, 2008
635Tuesday, May 06, 2008
1
of
of
of
1.2
1.2
1.2
8
7
6
5
4
3
2
1
2005 Performance
D D
FMB platform 1
MSID1 0 0 0
2005 Mainstream/Value
FMB platform 2
2006 65W FMB
platform 3
MSID0 0 NC NC
VTT_OUT_RIGHT
C C
B B
TP_CPU_A24
R146
R146
X_0R0402
X_0R0402
VTT_OUT_RIGHT
R90
R90
X_49.9R1%0402
X_49.9R1%0402
CPU1C
CPU1C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
AA23
VSS
AA24
VSS
AA25
VSS
AA26
VSS
AA27
VSS
AA28
VSS
AA29
VSS
AA3
VSS
AA30
VSS
AA6
VSS
AA7
VSS
AB1
VSS
AB23
VSS
AB24
VSS
AB25
VSS
AB26
VSS
AB27
VSS
AB28
VSS
AB29
VSS
AB30
VSS
AB7
VSS
AC3
VSS
AC6
VSS
AC7
VSS
AD4
VSS
AD7
VSS
AE10
VSS
AE13
VSS
AE16
VSS
AE17
VSS
AE2
VSS
AE20
VSS
AE24
VSS
AE25
VSS
AE26
VSS
AE27
VSS
AE28
VSS
VSS
AE29
H_COMP6
AE3
COMP6Y3COMP7
VSS
AE5
AE30
R86
R86
X_49.9R1%0402
X_49.9R1%0402
TP12TP12
H_COMP7
E23
D1
AE4
D14
RSVD#D1
RSVD#D14
RSVD#AE4
VSS
VSS
VSS
VSS
AE7
AF10
AF13
AF16
R101
R101
51R0402
51R0402
RSVD#E5E5RSVD#E6E6RSVD#E7
RSVD#E23
VSS
VSS
VSS
AF17
AF20
AF23
TP11TP11
E7
VSS
AF24
TP9TP9
IMPSEL
F23
F6
RSVD#F23
VSS
VSS
AF25
AF26
R157
R157
24.9R1%0402
24.9R1%0402
H_COMP8
B13
IMPSEL#
RSVD#B13
VSS
VSS
VSS
AF27
AF28
VSS
AF29
R92
R92
51R0402
51R0402
J3
N4
RSVD#J3
RSVD#N4
VSS
VSS
AF3
AF30
P5
RSVD#P5
VSS
VSS
AF6
AF7
MSID1
MSID[1]V1MSID[0]
VSS
AG10
MSID0
W1
VSS
AG13
R89
R89
51R0402
51R0402
AC4
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
RSVD#AC4
VSS
VSS
VSS
VSS
AG16
AG17
AG20
AG23
VSS
AG24
AG7
VSS
AH1
VSS
VSS
AH10
VSS
AH13
VSS
AH16
V30
VSS
AH17
VSSV3VSS
VSS
AH20
V29
VSS
AH23
V28
VSS
VSS
AH24
V27
AH3
VSS
VSS
V26
VSS
VSS
AH6
V25
V24
V23
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
AH7
AJ10
AJ13
AJ16
TP_CPU_U1
VSS
VSS
VSS
AJ17
AJ20
AJ23
AJ24
VSS
VSS
AJ27
AJ28
VSS
R30
VSS
AJ29
TP_CPU_U1 5
R29
R28
R27
R26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AJ30
AK10
R25
AK13
VSS
VSS
R24
VSS
VSS
AK16
R23
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
AK2
AK17
VSS
AK20
VSS
AK23
P30
VSS
AK24
P29
AK27
VSS
VSS
P28
VSS
VSS
AK28
P27
VSS
VSS
AK29
P26
VSS
VSS
AK30
P25
P24
P23
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
AK5
AK7
AL10
AL13
AL16
VSS
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
AL27
VSS
L30
AL28
VSS
AL3
L29
VSSL3VSS
VSS
VSS
AL7
TP_MPG_NOBOOT_N
L28
AM1
VSS
VSS
L27
VSS
VSS
AM10
L26
VSS
VSS
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23
VSS
VSS
AM20
VSSK7VSS
VSS
AM23
K5
VSS
AM24
K2
VSS
AM27
VSS
AM28
AM4
VSS
AN1
VSS
VSS
AN10
VSS
AN13
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
AN16
AN17
VSS
H28
AN2
VSS
VSS
H27
VSS
VSS
AN20
H26
VSS
VSS
AN23
H25
VSS
VSS
AN24
H24
VSS
VSS
AN27
H23
VSS
VSS
AN28
H17
H18
H19
H20
H21
H22
VSS
VSS
VSS
VSS
VSS
VSS
VSSB1VSS
B11
B14
H14
VSS
H13
VSS
H12
VSS
H11
VSS
H10
VSS
G1
VSS
F7
VSS
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E29
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C7
VSS
C4
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
B8
VSS
B5
VSS
B24
VSS
B20
VSS
B17
VSS
VSS
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_BLACK_TH-1
TP_CPU_G1
TP_CPU_E29
TP_CPU_G1 5
R156 X_0R0402R156 X_0R0402
TP1TP1
A A
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
8
7
6
5
4
3
Date: Sheet
2
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
MS-7392
MS-7392
MS-7392
1.2
1.2
1.2
of
735Tuesday, May 06, 2008
of
735Tuesday, May 06, 2008
of
735Tuesday, May 06, 2008
1
8
D D
C C
B B
A A
8
H_A#[3..35]5
H_REQ#[0..4]5
H_RS#[0..2]5
H_D#[0..63]5
H_DBI#[0..3]5
ICH_SYNC#13
V_FSB_VTT
HXSWING S/B 1/4*VTT +/- 2%
R173
R173
301R1%0402
301R1%0402
R174
R174
100R/2
100R/2
H_A#[3..35]
H_REQ#[0..4]
H_RS#[0..2]
H_D#[0..63]
H_DBI#[0..3]
R310 0R0402R310 0R0402
R178
R178
49.9R1%0402
49.9R1%0402
C156
C156
C0.01U/25X/2
C0.01U/25X/2
7
7
H_ADSTB#05
H_ADSTB#15
H_ADS#5
H_TRDY#5
H_DRDY#5
H_DEFER#5
H_HITM#5
H_HIT#5
H_LOCK#5
H_BR#05,6
H_BNR#5
H_BPRI#5
ICH_SYNC#_R
16.5R/1%/2
16.5R/1%/2
C235
X_C22P50N0402
C235
X_C22P50N0402
HXSWING
CK_H_MCH#15
CHIP_PWGD10,13,29
H_CPURST#5,6
H_DBSY#5
CK_H_MCH15
R187
R187
PLTRST#10,12,16
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
PLTRST#
HXRCOMP
HXSCOMP
HXSCOMPB
HXSWING
MCH_GTLREF
V_FSB_VTT
V_FSB_VTT
U10A
U10A
J42
HA3#
L39
HA4#
J40
HA5#
L37
HA6#
L36
HA7#
K42
HA8#
N32
HA9#
N34
HA10#
M38
HA11#
N37
HA12#
M36
HA13#
R34
HA14#
N35
HA15#
N38
HA16#
U37
HA17#
N39
HA18#
R37
HA19#
P42
HA20#
R39
HA21#
V36
HA22#
R38
HA23#
U36
HA24#
U33
HA25#
R35
HA26#
V33
HA27#
V35
HA28#
Y34
HA29#
V42
HA30#
V38
HA31#
Y36
HA32#
Y38
HA33#
Y39
HA34#
AA37
HA35#
M34
HADSTB0#
U34
HADSTB1#
F40
HREQ0#
L35
HREQ1#
L38
HREQ2#
G43
HREQ3#
J37
HREQ4#
W40
HADS#
Y40
HTRDY#
W41
HDRDY#
T43
HDEFER#
Y43
HHITM#
U42
HHIT#
V41
HLOCK#
AA42
HBREQ0#
W42
HBNR#
G39
HBPRI#
U40
HDBSY#
U41
HRS0#
AA41
HRS1#
U39
HRS2#
R32
HCLKP
U32
HCLKN
AM17
PWROK
C31
HCPURST#
AM18
RSTIN#
J13
ICH_SYNC#
D23
HRCOMP
C25
HSCOMP
D25
HSCOMP#
B25
HSWING
D24
HDVREF
B24
HACCVREF
V_1P25_CORE
R171
R171
49.9R1%0402
49.9R1%0402
R177
R177
49.9R1%0402
49.9R1%0402
6
P29
P27
P26
P24
P23
N29
N26
N24
N23
M29
M24
M23
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AJ9
AJ8
AJ7
AJ6
AJ5
AJ4
AJ3
HXSCOMP
C154
C154
X_C2.7P/25N/2
X_C2.7P/25N/2
HXSCOMPB
C161
C161
X_C2.7P/25N/2
X_C2.7P/25N/2
AJ2
AJ12
AJ11
AJ10
6
VTT
VCC
L24
AH4
L23
VTT
VCC
AH2
K24
K23
VTT
VTT
VCC
VCC
AH1
AG13
V_FSB_VTT
5
J24
J23
H24
H23
G26
G24
G23
F26
F24
F23
E29
E27
E26
E23
D29
D28
D27
C30
C29
C27
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AG9
AG8
AG7
AG6
AG5
AG4
AG3
AG2
AF13
AF12
AF11
AD24
AD22
AD20
AC25
AC23
AG12
AG11
AG10
AC21
GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.804V
R186
R186
100R/2
100R/2
5
R182
R182
51R0402
51R0402
R184
R184
200R1%0402
200R1%0402
VTT
VCC
B30
VTT
VCC
AC19
B29
VTT
VCC
AC13
B28
AC6
B27
VTT
VCC
AB24
4
A30
A28
R27
VTT
VTT
VTT
VCC
VCC
VCC
AB22
AB20
AA25
C167
C167
C0.1U/16Y/2
C0.1U/16Y/2
4
VTT
VCC
R26
AA23
VTT
VCC
R24
VTT
VCC
AA21
R23
VTT
VCC
AA19
VCC
AA13
AG19
AG18
AG17
AG15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y24
Y22
Y20
AA3
MCH_GTLREF
C166
C166
X_C220P16X0402
X_C220P16X0402
AG14
VCC
VCC
Y13
AF26
VCC
VCCY6VCC
AF25
V13
VCC
AF24
V12
VCC
VCC
AF22
V10
VCC
VCC
AF20
AF18
VCC
VCCV9VCC
U13
AF17
AF15
VCC
VCC
VCC
U10
C147
C147
C0.1U/16Y/2
C0.1U/16Y/2
3
AF14
AE27
AE26
VCC
VCC
VCC
VCC
VCCU9VCCU6VCCU3VCC
N12
3
AE25
VCC
VCC
N11
V_FSB_VTT
AE23
AE21
AE19
AE17
AD27
AD26
AD18
AD17
AD15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN9VCCN8VCCN6VCCN3VCCL6VCCJ6VCCJ3VCCJ2VCCG2VCC
C150
C150
C0.1U/16Y/2
C0.1U/16Y/2
AD14
VCC
F11
AC27
AC26
AC17
AC15
VCC
VCC
VCC
VCCF9VCCD4VCC
C13
C148
C148
C0.1U/16Y/2
C0.1U/16Y/2
2
V_1P25_COREV_FSB_VTT
AC14
AB27
AB26
AB18
AB17
AA27
AA26
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
HDINV0#
HDINV1#
HDINV2#
HDINV3#
HDSTBP0#
HDSTBN0#
HDSTBP1#
HDSTBN1#
HDSTBP2#
HDSTBN2#
HDSTBP3#
VCCC9VCC
P20
HDSTBN3#
VCC
VCC
VCC
VCC
INTEL-NR88BOBVBVA[G31]-A1-RH
Y11
AG25
INTEL-NR88BOBVBVA[G31]-A1-RH
AG21
AG20
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
2
H_D#0
R40
HD0#
H_D#1
P41
HD1#
H_D#2
R41
HD2#
H_D#3
N40
HD3#
H_D#4
R42
HD4#
H_D#5
M39
HD5#
H_D#6
N41
HD6#
H_D#7
N42
HD7#
H_D#8
L41
HD8#
H_D#9
J39
HD9#
H_D#10
L42
H_D#11
J41
H_D#12
K41
H_D#13
G40
H_D#14
F41
H_D#15
F42
H_D#16
C42
H_D#17
D41
H_D#18
F38
H_D#19
G37
H_D#20
E42
H_D#21
E39
H_D#22
E37
H_D#23
C39
H_D#24
B39
H_D#25
G33
H_D#26
A37
H_D#27
F33
H_D#28
E35
H_D#29
K32
H_D#30
H32
H_D#31
B34
H_D#32
J31
H_D#33
F32
H_D#34
M31
H_D#35
E31
H_D#36
K31
H_D#37
G31
H_D#38
K29
H_D#39
F31
H_D#40
J29
H_D#41
F29
H_D#42
L27
H_D#43
K27
H_D#44
H26
H_D#45
L26
H_D#46
J26
H_D#47
M26
H_D#48
C33
H_D#49
C35
H_D#50
E41
H_D#51
B41
H_D#52
D42
H_D#53
C40
H_D#54
D35
H_D#55
B40
H_D#56
C38
H_D#57
D37
H_D#58
B33
H_D#59
D33
H_D#60
C34
H_D#61
B35
H_D#62
A32
H_D#63
D32
H_DBI#0
M40
H_DBI#1
J33
H_DBI#2
G29
H_DBI#3
E33
L40
M43
G35
H33
G27
H27
B38
D38
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
H_DSTBP#0 5
H_DSTBN#0 5
H_DSTBP#1 5
H_DSTBN#1 5
H_DSTBP#2 5
H_DSTBN#2 5
H_DSTBP#3 5
H_DSTBN#3 5
MS-7392
MS-7392
MS-7392
1
1.2
1.2
1.2
of
835Monday, May 12, 2008
of
835Monday, May 12, 2008
of
835Monday, May 12, 2008
1
8
7
6
5
4
3
2
1
DATA_B[0..63]20
DATA_A[0..63]19
D D
C C
B B
A A
MAA_A[0..14]19,21
VCC_DDR
8
DATA_B[0..63]
DATA_A[0..63]
MAA_A[0..14]
SCS_A#019,21
SCS_A#119,21
RAS_A#19,21
CAS_A#19,21
WE_A#19,21
ODT_A019,21
ODT_A119,21
SBS_A019,21
SBS_A119,21
SBS_A219,21
DQS_A019
DQS_A#019
DQS_A119
DQS_A#119
DQS_A219
DQS_A#219
DQS_A319
DQS_A#319
DQS_A419
DQS_A#419
DQS_A519
DQS_A#519
DQS_A619
DQS_A#619
DQS_A719
DQS_A#719
P_DDR0_A19
N_DDR0_A19
P_DDR1_A19
N_DDR1_A19
P_DDR2_A19
N_DDR2_A19
R214 20R1%0402R214 20R1%0402
R213 20R1%0402R213 20R1%0402
R162 20R1%0402R162 20R1%0402
R160 20R1%0402R160 20R1%0402
C155
C155
C0.1U16Y0402
C0.1U16Y0402
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
7
DQM_B[0..7]20
DQM_A[0..7]19
MAA_B[0..14]20,21
AW35
BA35
BA34
BB38
BB33
AY35
BB34
BA31
BB25
BA26
BA25
AY25
BA23
AY24
AY23
BB23
BA22
AY33
BB22
AW21
AY38
BA21
AY37
BA38
BB35
BA39
BA33
AW32
BB21
AU4
AR3
BB3
BA4
BB9
BA9
AT20
AU18
AR41
AR40
AL41
AL40
AG42
AG41
AC42
AC41
AU31
AR31
AP27
AN27
AV33
AW33
AP29
AP31
AM26
AM27
AT33
AU33
AN2
AN3
BB40
BA40
DQM_B[0..7]
DQM_A[0..7]
MAA_B[0..14]
DATA_B1
DATA_B0
DATA_B3
DATA_B2
DATA_B4
AN7
AN8
AW5
SDQ_B0
SDQ_A0
AR5
AR4
DATA_A0
DATA_A1
AW7
SDQ_B1
SDQ_B2
SDQ_A1
SDQ_A2
AV3
AV2
DATA_A3
DATA_A2
SDQ_B3
SDQ_A3
DATA_A4
U10B
U10B
SCS_A0#
SCS_A1#
Reserved18
Reserved24
SRAS_A#
SCAS_A#
SWE_A#
SMA_A0
SMA_A1
SMA_A2
SMA_A3
SMA_A4
SMA_A5
SMA_A6
SMA_A7
SMA_A8
SMA_A9
SMA_A10
SMA_A11
SMA_A12
SMA_A13
SMA_A14
SODT_A0
SODT_A1
Reserved23
Reserved19
SBS_A0
SBS_A1
SBS_A2
SDQS_A0
SDQS_A0#
SDQS_A1
SDQS_A1#
SDQS_A2
SDQS_A2#
SDQS_A3
SDQS_A3#
SDQS_A4
SDQS_A4#
SDQS_A5
SDQS_A5#
SDQS_A6
SDQS_A6#
SDQS_A7
SDQS_A7#
SCLK_A0
SCLK_A0#
SCLK_A1
SCLK_A1#
SCLK_A2
SCLK_A2#
Reserved3
Reserved4
Reserved1
Reserved2
Reserved5
Reserved6
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
INTEL-NR88BOBVBVA[G31]-A1-RH
INTEL-NR88BOBVBVA[G31]-A1-RH
DATA_B5
AN5
AN6
SDQ_B4
SDQ_B5
SDQ_A4
SDQ_A5
AP3
AP2
DATA_A5
DATA_B7
DATA_B6
AN9
AU7
SDQ_B6
SDQ_A6
AV4
AU1
DATA_A6
DATA_A7
6
DATA_B9
DATA_B8
AT11
AU11
SDQ_B7
SDQ_B8
SDQ_A7
SDQ_A8
AY2
AY3
DATA_A8
DATA_A9
DATA_B10
DATA_B11
AP13
AR13
SDQ_B9
SDQ_B10
SDQ_A9
SDQ_A10
BB5
AY6
DATA_A11
DATA_A10
DATA_B13
DATA_B12
AR11
AU9
SDQ_B11
SDQ_B12
SDQ_B13
SDQ_A11
SDQ_A12
SDQ_A13
AW2
AW3
DATA_A12
DATA_A13
DATA_B15
DATA_B14
AV12
AU12
SDQ_B14
SDQ_B15
SDQ_A14
SDQ_A15
BA5
BB4
DATA_A14
DATA_A15
DATA_B16
DATA_B17
AU15
AV13
SDQ_B16
SDQ_B17
SDQ_A16
SDQ_A17
AY7
BC7
DATA_A16
DATA_A17
DATA_B18
DATA_B19
AU17
AT17
SDQ_B18
SDQ_B19
SDQ_A18
SDQ_A19
AY11
AW11
DATA_A19
DATA_A18
DATA_B21
DATA_B20
AU13
AM13
SDQ_B20
SDQ_B21
SDQ_A20
SDQ_A21
BB6
BA6
DATA_A21
DATA_A20
DATA_B23
DATA_B22
AV15
AW17
SDQ_B22
SDQ_B23
SDQ_A22
SDQ_A23
BA10
BB10
DATA_A22
DATA_A23
DATA_B25
DATA_B24
AV24
AT23
SDQ_B24
SDQ_B25
SDQ_A24
SDQ_A25
AT18
AR18
DATA_A25
DATA_A24
DATA_B27
DATA_B26
AT26
AP26
SDQ_B26
SDQ_B27
SDQ_A26
SDQ_A27
AT21
AU21
DATA_A27
DATA_A26
DATA_B29
DATA_B28
AU23
AW23
SDQ_B28
SDQ_B29
SDQ_A28
SDQ_A29
AP17
AN17
DATA_A28
DATA_A29
5
DATA_B30
DATA_B31
AR24
AN26
SDQ_B30
SDQ_B31
SDQ_A30
SDQ_A31
AP20
AV20
DATA_A31
DATA_A30
DATA_B32
DATA_B33
AW37
AV38
SDQ_B32
SDQ_B33
SDQ_A32
SDQ_A33
AV42
AU40
DATA_A32
DATA_A33
DATA_B34
DATA_B35
AN36
AN37
SDQ_B34
SDQ_B35
SDQ_A34
SDQ_A35
AP42
AN39
DATA_A34
DATA_A35
DATA_B37
DATA_B36
AU35
AR35
SDQ_B36
SDQ_B37
SDQ_A36
SDQ_A37
AV40
AV41
DATA_A36
DATA_A37
DATA_B38
DATA_B39
AN35
AR37
SDQ_B38
SDQ_A38
AP41
AR42
DATA_A38
DATA_A39
DATA_B40
DATA_B41
DATA_B42
AM35
AM38
SDQ_B39
SDQ_B40
SDQ_B41
SDQ_A39
SDQ_A40
SDQ_A41
AN41
AM39
DATA_A40
DATA_A42
DATA_A41
DATA_B43
DATA_B44
AJ34
AL38
SDQ_B42
SDQ_B43
SDQ_A42
SDQ_A43
AK42
AK41
DATA_A44
DATA_A43
DATA_B46
DATA_B45
AR39
AM34
SDQ_B44
SDQ_B45
SDQ_A44
SDQ_A45
AN40
AN42
DATA_A45
DATA_A46
DATA_B47
DATA_B48
AL37
AL32
SDQ_B46
SDQ_B47
SDQ_A46
SDQ_A47
AL42
AL39
DATA_A48
DATA_A47
DATA_B50
DATA_B49
AG38
AJ38
SDQ_B48
SDQ_B49
SDQ_A48
SDQ_A49
AJ40
AH43
DATA_A50
DATA_A49
DATA_B52
DATA_B55
DATA_B51
DATA_B54
DATA_B53
DATA_B57
DATA_B56
AF35
AF33
AJ37
AJ35
AG33
AF34
AD36
AC33
SDQ_B50
SDQ_B51
SDQ_B52
SDQ_B53
SDQ_B54
SDQ_B55
SDQ_B56
SDQ_A50
SDQ_A51
SDQ_A52
SDQ_A53
SDQ_A54
SDQ_A55
SDQ_A56
AJ42
AJ41
AF39
AF41
AF42
AE40
AD40
AD43
DATA_A52
DATA_A56
DATA_A53
DATA_A51
DATA_A54
DATA_A55
DATA_A57
PLACE 0.1UF CAP CLOSE TO MCH
4
DATA_B60
DATA_B59
DATA_B58
AA34
AA36
SDQ_B57
SDQ_B58
SDQ_B59
SDQ_A57
SDQ_A58
SDQ_A59
AB41
AA40
DATA_A59
DATA_A58
DATA_A60
DATA_B62
DATA_B61
AD34
AF38
SDQ_B60
SDQ_B61
SDQ_A60
SDQ_A61
AE42
AE41
DATA_A62
DATA_A61
DATA_B63
AC34
AA33
SDQ_B62
SDQ_B63
SDQ_A62
SDQ_A63
AB42
AC39
DATA_A63
AY12
AW12
SCKE_B0
SCKE_B1
SCKE_A0
SCKE_A1
AY20
BC20
SCKE_A1
SCKE_A0
SCKE_B0
SCKE_B1
DQM_B0
BB11
BA11
Reserved20
Reserved16
Reserved13
Reserved17
AY21
BA19
DQM_A0
DQM_B1
AR7
AW9
SDM_B0
SDM_B1
SDM_A0
SDM_A1
BA2
AR2
DQM_A1
DQM_B2
AW13
AY9
DQM_A2
DQM_B3
DQM_B4
DQM_B6
DQM_B5
DQM_B7
AP23
AU37
AM37
AG39
AD38
SDM_B2
SDM_B3
SDM_B4
SDM_B5
SDM_B6
SDM_A2
SDM_A3
SDM_A4
SDM_A5
SDM_A6
AN18
AU43
AC40
AG40
AM43
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
SCKE_A1 19,21
SCKE_A0 19,21
3
SDM_B7
SMRCOMPVOL
SMRCOMPVOH
SDM_A7
SCKE_B0 20,21
SCKE_B1 20,21
SCS_B0#
SCS_B1#
Reserved14
Reserved15
SRAS_B#
SCAS_B#
SWE_B#
SMA_B0
SMA_B1
SMA_B2
SMA_B3
SMA_B4
SMA_B5
SMA_B6
SMA_B7
SMA_B8
SMA_B9
SMA_B10
SMA_B11
SMA_B12
SMA_B13
SMA_B14
SODT_B0
SODT_B1
Reserved21
Reserved22
SBS_B0
SBS_B1
SBS_B2
SDQS_B0
SDQS_B0#
SDQS_B1
SDQS_B1#
SDQS_B2
SDQS_B2#
SDQS_B3
SDQS_B3#
SDQS_B4
SDQS_B4#
SDQS_B5
SDQS_B5#
SDQS_B6
SDQS_B6#
SDQS_B7
SDQS_B7#
SCLK_B0
SCLK_B0#
SCLK_B1
SCLK_B1#
SCLK_B2
SCLK_B2#
Reserved7
Reserved8
Reserved9
Reserved10
Reserved11
Reserved12
SVREF
BB27
BB30
AY27
AY31
AW26
AW29
BA27
MAA_B0
BB17
MAA_B1
AY17
MAA_B2
BA17
MAA_B3
BC16
MAA_B4
AW15
MAA_B5
BA15
MAA_B6
BB15
MAA_B7
BA14
MAA_B8
AY15
MAA_B9
BB14
MAA_B10
AW18
MAA_B11
BB13
MAA_B12
BA13
MAA_B13
AY29
MAA_B14
AY13
BA29
BA30
BB29
BB31
AY19
BA18
BC12
DQS_B0
AV6
DQS_B#0
AU5
DQS_B1
AR12
DQS_B#1
AP12
DQS_B2
AP15
DQS_B#2
AR15
DQS_B3
AT24
DQS_B#3
AU26
DQS_B4
AW39
DQS_B#4
AU39
DQS_B5
AL35
DQS_B#5
AL34
DQS_B6
AG35
DQS_B#6
AG36
DQS_B7
AC36
DQS_B#7
AC37
P_DDR0_B
AV31
N_DDR0_B
AW31
P_DDR1_B
AU27
N_DDR1_B
AT27
P_DDR2_B
AV32
N_DDR2_B
AT32
AU29
AR29
AV29
AW27
AN33
AP32
MCH_VREF_A
AM6
DDR_RCOMPVOL
AM8
DDR_RCOMPVOH
AM10
DDR_RCOMPVOH = 0.8 * VCC_DDR
DDR_RCOMPVOL = 0.2 * VCC_DDR
SCS_B#0 20,21
SCS_B#1 20,21
RAS_B# 20,21
CAS_B# 20,21
WE_B# 20,21
ODT_B0 20,21
ODT_B1 20,21
SBS_B0 20,21
SBS_B1 20,21
SBS_B2 20,21
DQS_B0 20
DQS_B#0 20
DQS_B1 20
DQS_B#1 20
DQS_B2 20
DQS_B#2 20
DQS_B3 20
DQS_B#3 20
DQS_B4 20
DQS_B#4 20
DQS_B5 20
DQS_B#5 20
DQS_B6 20
DQS_B#6 20
DQS_B7 20
DQS_B#7 20
P_DDR0_B 20
N_DDR0_B 20
P_DDR1_B 20
N_DDR1_B 20
P_DDR2_B 20
N_DDR2_B 20
C0.1U16Y0402
C229
C229
C0.1U16Y0402
C0.1U16Y0402
MS-7392
MS-7392
MS-7392
C0.1U16Y0402
VCC_DDR
C211 C0.01U25X0402C211 C0.01U25X0402
R219 1KR1%0402R219 1KR1%0402
R221
R221
3.01KR1%0402
3.01KR1%0402
R224 1KR1%0402R224 1KR1%0402
C228
C228
C0.01U25X0402
C0.01U25X0402
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
2
C244
C244
R227
R227
1KR1%0402
1KR1%0402
R232
1KR1%0402
R232
1KR1%0402
of
935Monday, May 12, 2008
of
935Monday, May 12, 2008
of
935Monday, May 12, 2008
1
VCC_DDR
X_C0.1U16Y0402
X_C0.1U16Y0402
C233
C233
1.2
1.2
1.2
8
7
6
5
4
3
2
1
V_1P25_CORE
Close to MCH A.S.A.P
R209 5.1KR0402R209 5.1KR0402
R217 5.1KR0402R217 5.1KR0402
R218 5.1KR0402R218 5.1KR0402
D D
C C
EXP_SLR: PCI Express
Static Lane Reversal
0: BTX 1: ATX
B B
VCC1_5REF
R210 5.1KR0402R210 5.1KR0402
DMI_MCH_IT_MR_0_DP12
DMI_MCH_IT_MR_0_DN12
DMI_MCH_IT_MR_1_DP12
DMI_MCH_IT_MR_1_DN12
DMI_MCH_IT_MR_2_DP12
DMI_MCH_IT_MR_2_DN12
DMI_MCH_IT_MR_3_DP12
DMI_MCH_IT_MR_3_DN12
V_1P25_CORE
EXP_PRSNT_N22
V_1P25_CORE
Stuff 0-ohm for P31
R190 X_0R0402R190 X_0R0402
R188 X_0R0402R188 X_0R0402
X_C0.1U16Y0402
X_C0.1U16Y0402
C178
C178
Stuff 0-ohm for P31
V_1P25_CORE
I = 225mA
V_1P25_CORE
A A
I = 90.6mA
V_1P25_CORE
8
DMI_MCH_IT_MR_0_DP
DMI_MCH_IT_MR_1_DP
DMI_MCH_IT_MR_2_DP
DMI_MCH_IT_MR_3_DP
CK_PE_100M_MCH15
CK_PE_100M_MCH#15
SDVO_CTRL_DATA22
SDVO_CTRL_CLK22
H_BSL015,16
H_BSL115,16
H_BSL215,16
R193 1KR0402R193 1KR0402
R191 0R0402R191 0R0402
R482 X_0R0402R482 X_0R0402
CP33CP33
R201
R201
0R0402
0R0402
R189
0R0402
R189
0R0402
VCCA_DAC
R200
R200
X_0R0402
X_0R0402
C183
X_C4.7U10Y0805
C183
X_C4.7U10Y0805
R192
0R0402
R192
0R0402
L8 X_0.1U50mL8 X_0.1U50m
21
CP4CP4
C169
C169
X_C0.22U16X
X_C0.22U16X
L11 X_0.1U50mL11 X_0.1U50m
21
CP7CP7
C184
C184
C10U10Y0805
C10U10Y0805
EXP_A_RXP_022
EXP_A_RXN_022
EXP_A_RXP_122
EXP_A_RXN_122
EXP_A_RXP_222
EXP_A_RXN_222
EXP_A_RXP_322
EXP_A_RXN_322
EXP_A_RXP_422
EXP_A_RXN_422
EXP_A_RXP_522
EXP_A_RXN_522
EXP_A_RXP_622
EXP_A_RXN_622
EXP_A_RXP_722
EXP_A_RXN_722
EXP_A_RXP_822
EXP_A_RXN_822
EXP_A_RXP_922
EXP_A_RXN_922
EXP_A_RXP_1022
EXP_A_RXN_1022
EXP_A_RXP_1122
EXP_A_RXN_1122
EXP_A_RXP_1222
EXP_A_RXN_1222
EXP_A_RXP_1322
EXP_A_RXN_1322
EXP_A_RXP_1422
EXP_A_RXN_1422
EXP_A_RXP_1522
EXP_A_RXN_1522
DMI_MCH_IT_MR_0_DP
DMI_MCH_IT_MR_0_DN
DMI_MCH_IT_MR_1_DP
DMI_MCH_IT_MR_1_DN
DMI_MCH_IT_MR_2_DP
DMI_MCH_IT_MR_2_DN
DMI_MCH_IT_MR_3_DP
DMI_MCH_IT_MR_3_DN
SDVO_CTRL_DATA
SDVO_CTRL_CLK
H_BSL0
H_BSL1
H_BSL2
EXP_SLR
EXP_EN
VCC_CL_PLL
VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
VCCA_EXP
VCCD_CRT
VCCDQ_CRT
VCC3
L16 X_80L4_30_1206L16 X_80L4_30_1206
CP10CP10
VCCA_MPLL
C170
C170
C10U10Y0805
C10U10Y0805
VCCA_DPLLB
C176
C176
C0.1U16Y0402
C0.1U16Y0402
7
V_1P25_CORE
AL26
C10U10Y0805
C10U10Y0805
VCC_EXP
AD11
C207
C207
AL24
VCC2
VCC2
VCC_EXP
VCC_EXP
AD9
AD10
C203
C0.1U16Y0402
C203
C0.1U16Y0402
6
U10C
U10C
F15
EXP_RXP0
G15
EXP_RXN0
K15
EXP_RXP1
J15
EXP_RXN1
F12
EXP_RXP2
E12
EXP_RXN2
J12
EXP_RXP3
H12
EXP_RXN3
J11
EXP_RXP4
H11
EXP_RXN4
F7
EXP_RXP5
E7
EXP_RXN5
E5
EXP_RXP6
F6
EXP_RXN6
C2
EXP_RXP7
D2
EXP_RXN7
G6
EXP_RXP8
G5
EXP_RXN8
L9
EXP_RXP9
L8
EXP_RXN9
M8
EXP_RXP10
M9
EXP_RXN10
M4
EXP_RXP11
L4
EXP_RXN11
M5
EXP_RXP12
M6
EXP_RXN12
R9
EXP_RXP13
R10
EXP_RXN13
T4
EXP_RXP14
R4
EXP_RXN14
R6
EXP_RXP15
R7
EXP_RXN15
W2
DMI_RXP0
V1
DMI_RXN0
Y8
DMI_RXP1
Y9
DMI_RXN1
AA7
DMI_RXP2
AA6
DMI_RXN2
AB3
DMI_RXP3
AA4
DMI_RXN3
B12
GCLKP
B13
GCLKN
G17
SDVO_CTRLDATA
E17
SDVO_CTRLCLK
G20
BSEL0
J20
BSEL1
J18
BSEL2
G18
RESERVED53
E18
EXP_SLR
J17
EXP_EN
Y32
VCC2
C23
VCCA_HPLL
A24
VCCA_MPLL
A22
VCCA_DPLLA
C22
VCCA_DPLLB
B15
VCCA_EXPPLL
C17
VCCA_DAC
B16
VCCA_DAC
A16
VCCA_EXP
C21
VCCD_CRT
B21
VCCDQ_CRT
D16
VSS
B17
VCC3_3
INTEL-NR88BOBVBVA[G31]-A1-RH
INTEL-NR88BOBVBVA[G31]-A1-RH
V_1P25_EXP
C164
C0.1U16Y0402
C164
C0.1U16Y0402
AL23
AL21
AL20
AL18
AL17
AL15
AK30
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
AD8
AD7
AD6
AD5
AD4
AD2
AD1
I = 90.6mA
V_1P25_CORE
I = 67.9mA
V_1P25_CORE
AK29
AK27
AJ31
AG31
AF31
AD32
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
AE4
AE3
AE2
AC4
AC3
AC2
VCC_DDR
L10 X_0.1U50mL10 X_0.1U50m
CP6CP6
C182
C182
C10U10Y0805
C10U10Y0805
L9 X_0.1U50mL9 X_0.1U50m
CP5CP5
C177
C177
C10U10Y0805
C10U10Y0805
AC32
VCC2
AA32
AJ30
VCC2
VCCSM
BC39
BC34
AJ29
VCC2
VCC2
VCCSM
VCCSM
BC30
21
21
AJ27
AG30
VCC2
VCCSM
BC26
BC22
AG29
AG27
AG26
VCC2
VCC2
VCC2
VCCSM
VCCSM
VCCSM
BB39
BC18
BC14
VCCA_DPLLA
C175
C175
C0.1U16Y0402
C0.1U16Y0402
VCCA_HPLL
C174
C174
C0.1U16Y0402
C0.1U16Y0402
5
AF30
VCC2
VCC2
VCCSM
VCCSM
BB37
AF29
AF27
VCC2
VCCSM
BB32
BB28
AD30
VCC2
VCC2
VCCSM
VCCSM
BB26
AD29
VCC2
VCCSM
BB24
AC30
AC29
AL12
AL11
AL10
AL9
VCC2
VCC2
VCC2
VCC2
VCC2
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
BB20
BB18
BB16
BB12
AY32
AW24
I = 71.6mA
V_1P25_CORE
I = 0.36mA
VCC3
AL8
AL7
AL6
AL5
AL4
AL3
AL2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCCSM
VCCSM
VCCSM
VCCSM
VCC_SMCLK
VCC_SMCLK
AV26
AV18
BB41
BA42
AW20
C135 C1U16YC135 C1U16Y
L14 X_0.1U50mL14 X_0.1U50m
CP8CP8
C195
C195
C10U10Y0805
C10U10Y0805
L15 X_0.1U50mL15 X_0.1U50m
CP9CP9
C201
C201
C10U10Y0805
C10U10Y0805
AK26
AK24
AK23
AK21
AK20
AK18
AK17
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC_SMCLK
VCC_SMCLK
VCC_SMCLK
RESERVED25
RESERVED26
H18
AY42
BB42
BA43
AN21
L7 X_10U100m_0805L7 X_10U100m_0805
V_CKDDR
CP3CP3
R158 X_1R1%R158 X_1R1%CP11CP11
R159 X_1R1%R159 X_1R1%
21
21
C197
C197
C0.1U16Y0402
C0.1U16Y0402
4
AK15
AK3
AK2
AK1
VCC2
VCC2
VCC2
VCC2
RESERVED27
RESERVED28
RESERVED29
RESERVED30
BB2
BB19
AN32
AW42
VCCA_GPLL
C198
C198
C0.1U16Y0402
C0.1U16Y0402
VCCA_EXP
AJ13
AD31
AC31
AA31
Y31
AJ26
VCC2
VCC2
VCC2
VCC2
VCC2
RESERVED31
RESERVED32
RESERVED33
RESERVED34
RESERVED35
AJ32
AL31
AF32
AG32
AM31
AM21
21
C133 X_C10U10Y0805C133 X_C10U10Y0805
C193
C193
C0.01U25X0402
C0.01U25X0402
AJ24
AJ23
AJ21
AJ20
VCC2
VCC2
VCC2
VCC2
VCC2
RESERVED36
RESERVED37
RESERVED38
RESERVED39
RESERVED40
Y12
AA9
AA10
AA11
AJ18
AJ17
AJ15
AJ14
AA30
AA29
Y30
Y29
V30
V29
U29
U27
AL13
AK14
AL29
AL27
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
RESERVED41
RESERVED42
RESERVED43
RESERVED44
RESERVED45
RESERVED46
RESERVED47
RESERVED48
RESERVED49
RESERVED50
RESERVED51
RESERVED52
F13
U30
U31
R29
R30
VCC_DDR
VCCA_HPLL ---- >50mA ; Min Vout -- 1.121V
VCCA_MPLL ---- >130mA ; Min Vout -- 1.128V
VCCA_DPLLA --- >80mA ; Min Vout -- 1.132V
VCCA_DPLLB --- >80mA ; Min Vout -- 1.131V
VCCA_DAC ----- 70mA ; Min Vout -- 3.14V
VCCD_CRT ----- 20mA ; Min Vout -- 1.425V
VCCDQ_CRT ---- 0.5mA ; Min Vout -- 1.425V
VCCA_EXPPLL -- 50mA ; Min Vout -- 1.129V
VCC_SMCLK ---- 250mA
V31
U12
U11
R12
R13
AP21
AA39
BC43
TP20TP20
TP14TP14
0
200 MHZ (800)1
0
133 MHZ (533)
1
TABLE
PSB FREQUENCY
BSEL
2
1
0
0
0
3
VCC2
VCC2
TEST0
TEST1
BC1
TP21TP21
TEST2
A43
TP15TP15
EXP_TXP0
EXP_TXN0
EXP_TXP1
EXP_TXN1
EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9
EXP_TXN9
EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
EXP_COMPO
EXP_COMPI
HSYNC
VSYNC
GREEN
GREEN#
BLUE#
DDC_DATA
DDC_CLK
DREFCLKP
DREFCLKN
REFSET
PWROK2
V_1P25_PLTRST#
VREF2
RESERVED54
RESERVED55
ALLZTEST
XORTEST
RESERVED56
RED
BLUE
RED#
D11
D12
B11
A10
C10
D9
B9
B7
D7
D6
B5
B6
B3
B4
F2
E2
F4
G4
J4
K3
L2
K1
N2
M2
P3
N4
R2
P1
U2
T2
V3
U4
C231 C0.1U16Y0402C231 C0.1U16Y0402
V7
C232 C0.1U16Y0402C232 C0.1U16Y0402
V6
C209 C0.1U16Y0402C209 C0.1U16Y0402
W4
C210 C0.1U16Y0402C210 C0.1U16Y0402
Y4
C214 C0.1U16Y0402C214 C0.1U16Y0402
AC8
C215 C0.1U16Y0402C215 C0.1U16Y0402
AC9
C205 C0.1U16Y0402C205 C0.1U16Y0402
Y2
C204 C0.1U16Y0402C204 C0.1U16Y0402
AA2
GRCOMP
AC11
AC12
HSYNC
C15
VSYNC
D15
VGA_RED
B18
VGA_GREEN
C19
VGA_BLUE
B20
C18
D19
D20
MCH_DDC_DATA
L13
MCH_DDC_CLK
M13
DOTCLK
C14
DOTCLK#
D13
REFSET
A20
MCH_CLPWROK
AM15
CL_RST#
AA12
CL_VREF_MCH
AM5
AD13
TP18TP18
AD12
TP19TP19
K20
F20
A14
TP17TP17
R226
R226
24.9R1%0402
24.9R1%0402
R207 10KR/2R207 10KR/2
R206 0R0402R206 0R0402
R194 0R0402R194 0R0402
PLTRST# 8,12,16
R241
R241
1.65KR1%0402
1.65KR1%0402
R246
R246
1KR0402
1KR0402
EXP_A_TXP_0 22
EXP_A_TXN_0 22
EXP_A_TXP_1 22
EXP_A_TXN_1 22
EXP_A_TXP_2 22
EXP_A_TXN_2 22
EXP_A_TXP_3 22
EXP_A_TXN_3 22
EXP_A_TXP_4 22
EXP_A_TXN_4 22
EXP_A_TXP_5 22
EXP_A_TXN_5 22
EXP_A_TXP_6 22
EXP_A_TXN_6 22
EXP_A_TXP_7 22
EXP_A_TXN_7 22
EXP_A_TXP_8 22
EXP_A_TXN_8 22
EXP_A_TXP_9 22
EXP_A_TXN_9 22
EXP_A_TXP_10 22
EXP_A_TXN_10 22
EXP_A_TXP_11 22
EXP_A_TXN_11 22
EXP_A_TXP_12 22
EXP_A_TXN_12 22
EXP_A_TXP_13 22
EXP_A_TXN_13 22
EXP_A_TXP_14 22
EXP_A_TXN_14 22
EXP_A_TXP_15 22
EXP_A_TXN_15 22
DMI_ICH_MT_IR_0_DP 12
DMI_ICH_MT_IR_0_DN 12
DMI_ICH_MT_IR_1_DP 12
DMI_ICH_MT_IR_1_DN 12
DMI_ICH_MT_IR_2_DP 12
DMI_ICH_MT_IR_2_DN 12
DMI_ICH_MT_IR_3_DP 12
DMI_ICH_MT_IR_3_DN 12
V_1P25_CORE
HSYNC 28
VSYNC 28
VGA_RED 28
VGA_GREEN 28
VGA_BLUE 28
DOTCLK
DOTCLK#
MCH_DDC_DATA 28
MCH_DDC_CLK 28
R247 0R0402R247 0R0402
C248
C248
C10P50N0402
C10P50N0402
MCH CORE DECOUPLING
V_1P25_CORE
CL_RST#
C249
C249
X_C0.01U25X0402
X_C0.01U25X0402
Stuff 0-ohm for P31
HSYNC
R203 0R0402R203 0R0402
VSYNC
R198 0R0402R198 0R0402
DOTCLK 15
DOTCLK# 15
V_1P25_CORE
CHIP_PWGD 8,13,29
R212
R212
1KR0402
1KR0402
CL_VREF_MCHCL_RST#
C206
R211
R211
392R1%0402
392R1%0402
C206
C0.01U25X0402
C0.01U25X0402
CL_VREF_MCH = 0.352V (FOR NOW)
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
2
MS-7392
MS-7392
MS-7392
of
10 35Monday, May 12, 2008
of
10 35Monday, May 12, 2008
of
10 35Monday, May 12, 2008
1
1.2
1.2
1.2
5
4
3
2
1
BC42
NC2
VSS
F18
BC2
NC3
VSSF3VSS
BB43
NC4
E43
TP13TP13
BB1
B43
B42
A42
M11
A41
C43
R21
W20
W22
W24
AA18
AC18
AE18
AE20
AE22
AE24
AF19
AF21
AF23
AY40
BA1
BC3
BC41
M33
M35
M37
M42
L12
NC5
NC6
NC7
NC8B2NC9
VSS
VSSA3VSSA5VSS
VSSC1VSS
VSSE1VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSE9VSSE3VSS
VSS
VSS
VSS
VSSD3VSS
VSS
VSSC6VSSC5VSSC4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E32
E24
E21
E20
E15
E13
E11
D40
D31
D21
D17
B37
B32
B31
B26
B23
B22
B19
C26
C11
B14
2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSA7VSS
B10
A39
A34
A26
A18
A12
N10
VSS
VSS
VSS
VSS
VSSN5VSSN7VSS
N13
VSS
N21
VSS
N27
VSS
N31
VSS
N33
VSS
N36
VSS
P2
VSS
P17
VSS
P18
VSS
P21
VSS
P30
VSS
P43
VSS
R3
VSS
R5
VSS
R8
VSS
R11
VSS
R31
VSS
R33
VSS
R36
VSS
T1
VSS
T42
VSS
U5
VSS
U7
VSS
U8
VSS
U35
VSS
U38
VSS
V2
VSS
V5
VSS
V8
VSS
V11
VSS
V32
VSS
V34
VSS
V37
VSS
V39
VSS
V43
VSS
W3
VSS
Y1
VSS
Y5
VSS
Y7
VSS
Y10
VSS
Y19
VSS
Y21
VSS
Y23
VSS
Y25
VSS
Y33
VSS
Y35
VSS
Y37
VSS
Y42
VSS
AA5
VSS
AA8
VSS
AA20
VSS
AA22
VSS
AA24
VSS
AA35
VSS
AA38
VSS
AB1
VSS
AB2
VSS
AB19
VSS
AB21
VSS
AB23
VSS
AB25
VSS
AB43
VSS
AC5
VSS
AC7
VSS
AC10
VSS
AC20
VSS
AC22
VSS
AC24
VSS
AC35
VSS
AC38
VSS
AD19
VSS
AD21
VSS
AD23
VSS
AD25
VSS
AD33
VSS
AD35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF5
AF3
AF2
AF1
AD42
AD39
AD37
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Place close to GMCH
VCC_DDR
MCH CORE DECOUPLING
V_1P25_CORE
5020 Parts
V_1P25_CORE
V_FSB_VTT
INTEL-NR88BOBVBVA[G31]-A1-RH
INTEL-NR88BOBVBVA[G31]-A1-RH
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
MS-7392
MS-7392
MS-7392
1
C149
C149
C2.2U6.3Y
C2.2U6.3Y
C171
C171
X_C2.2U6.3Y
X_C2.2U6.3Y
C179
C179
X_C2.2U6.3Y
X_C2.2U6.3Y
C157
C157
C2.2U6.3Y
C2.2U6.3Y
C186
C186
C2.2U6.3Y
C2.2U6.3Y
C217
C217
C10U10Y0805
C10U10Y0805
C208
C208
X_C10U10Y0805
X_C10U10Y0805
C246
C246
C0.1U16Y0402
C0.1U16Y0402
C212
C212
X_C10U10Y0805
X_C10U10Y0805
C259
C259
C0.1U16Y0402
C0.1U16Y0402
C261
C261
C0.1U16Y0402
C0.1U16Y0402
C240
C240
X_C10U10Y0805
X_C10U10Y0805
C257
C257
X_C10U10Y0805
X_C10U10Y0805
C234
C234
C0.1U16Y0402
C0.1U16Y0402
C542
C542
X_C10U10Y0805
X_C10U10Y0805
C539
C539
X_C10U10Y0805
X_C10U10Y0805
C537
C537
X_C10U10Y0805
X_C10U10Y0805
C538
C538
X_C10U10Y0805
X_C10U10Y0805
C541
C541
X_C10U10Y0805
X_C10U10Y0805
C536
C536
X_C0.1U16X-1
X_C0.1U16X-1
C540
C540
X_C0.1U16X-1
X_C0.1U16X-1
of
11 35Monday, May 12, 2008
of
11 35Monday, May 12, 2008
of
11 35Monday, May 12, 2008
1.2
1.2
1.2
TP16TP16
V_1P25_CORE
D D
BC37
BC32
BC28
BC24
BC10
BC5
BB7
AY41
AY4
AW43
AW41
AW1
AV37
AV35
AV27
AV23
AV21
AV17
AV11
AV9
AV7
AU42
C C
B B
A A
5
AU38
AU32
AU24
AU20
AT31
AT29
AT15
AT13
AT12
AR38
AR33
AR32
AR27
AR26
AR23
AR21
AR20
AR17
AP43
AP24
AP18
AN38
AN31
AN29
AN24
AN23
AN20
AN15
AN13
AN12
AN11
AM42
AM40
AM36
AM33
AM29
AM24
AM23
AM20
AM11
AL36
AL33
AK43
AU6
AU2
AR9
AR6
AP1
AN4
AM9
AM7
AM4
AM2
AM1
U10D
U10D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA17
VCC
VSS
AJ39
AA15
VCC
VSS
AJ36
AA14
VCC
VSS
AJ33
Y27
VCC
VSS
AH42
Y26
VCC
VSS
AG37
Y18
VCC
VSS
AG34
Y17
AF43
VCC
VSS
Y15
AF37
VCC
VSS
Y14
AF36
VCC
VSS
W27
AF10
VCC
VSS
W26
AF9
VCC
VSS
W25
AF8
VCC
VSS
W23
AF7
VCC
VSS
W21
AF6
VCC
VSS
W19
M27
VCC
VSS
W18
M21
VCC
VSS
W17
M17
VCC
VSS
V27
V26
V25
V24
V23
V22
V21
V20
V19
V18
V17
V15
V14
U26
U25
U24
U23
U22
U21
U20
U19
U18
U17
U15
U14
R20
R18
R17
R15
R14
P15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSSM7VSSM1VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSL7VSSL5VSSL3VSS
VSS
VSS
VSS
VSS
VSS
VSSK2VSS
VSS
VSS
VSS
VSS
VSSJ9VSSJ7VSSJ5VSS
VSS
J38
J35
J32
J27
L33
L32
L31
L29
L21
L20
L11
K43
K26
K21
K18
M15
M10
4
K13
J21
K12
H31
H29
L17
N17
N18
N15
M20
L15
L18
M18
F17
K17
RESERVED63
RESERVED64
RESERVED65
RESERVED66
VSSG9VSSG7VSSG1VSS
VSS
F37
F35
N20
NC1
VSS
VSS
F27
F21
P14
AG24
AG23
AG22
VCC
VCC
VCC
VCC
RESERVED57
RESERVED58
RESERVED59
RESERVED60
RESERVED61
RESERVED62
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H21
H20
H17
H15
H13
G42
G38
G32
G21
G13
G12
G11
3
Loading...