MSI MS-7387 Schematics
A
B
C
D
E
MSI
MS-7387 Ver:0A
4 4
CPU:
Intel Prescott LGA775 -Mainstream CPU
System Chipset:
North Bridge : P4M900
South Bridge : VIA 8237S
On Board Chipset:
LPC Super I/O -- W83627DHG
LAN ---(PHY) Realtek 8201CL/(PCIE)Realtek 8111B
HD AUDIO --Realtek ALC883
BIOS --SPI FLASH ROM
3 3
CLOCK Chip :
CLOCK Generator --
ICS9LPR704AGLFT
Main Memory:
DDRII * 2
Expansion Slots:
PCI SLOT * 2
PCIE 16X SLOT * 1
2 2
PWM:
PS2 mouse
VRM11 ST L6703 3Phase
Rear I/O
PARALLEL Port
LAN
option
CHIPSET P4M900 + VT8237S
TITLE
COVER SHEET
BLOCK DIAGRAM
PWR And CLOCK Map
GPIO/MEMORY/PCI/HW STRPPING
PROCESSOR ( Intel LGA775)
NORTH BRIDGE VIA P4M900
DDR II * 2
DIMM Terminations
Clock Generator ICS9LPR704EGLFT
VGA Connector
SOUTH BRIDGE (VT8237S)
PCI Slot 1 & 2
Realtek 8201CL & Realtek 8111B
Super I/O & FAN 83627DHG & BIOS
HD Realtek ALC883
IDE Connectors , KB/MS
USB Connectors
COM / Parallel Port
MS7 ACPI Controller
VRM11 ST L6703 3Phase
ATX & F_Panel
PCB Components & EMI & Manual Part
PCIE 16X
Modify History
SHEET
1
2
3
4
5,6,7
8,9,10,11
12,13
14
15
16
17,18,19
20
21
22
23
24
25
26
27
28
29
30
31
32
Blue:line in
GREEN:line Out
1 1
Serial PortPS2 Keyboard
A
USB PortVGA Port
USB Port
B
Pink:MIC
MICRO-START INT'L CO.,LTD.
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Title
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Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
C
D
Date: Sheet of
MICRO-START INT'L CO.,LTD.
COVER SHEET
COVER SHEET
COVER SHEET
MS-7387 0A
MS-7387 0A
MS-7387 0A
E
1 32Thursday, May 03, 2007
1 32Thursday, May 03, 2007
1 32Thursday, May 03, 2007
VRM 11
ST L6703
3Phase
Block Diagram
Intel Prescott Processor-LGA775
FSB
mainstream
TDP=95W
Iccmax=78A
Icctdc=68A
1
PCIE GLAN
1X
IDE Primary
PCIE 1X
P4M900
PCIE
PCIE 16X
16X X2
UltraDMA 33/66/100
VCORE= +1.6VNB
VDIMM= +1.8VDIMM
V-Link/S533M
64bit DDR
DDRII
DIMM
Modules
PCI CNTRL
PCI ADDR/DATA
PCI Slot 1
PCI Slot 2
VT8237A/VT8237S
A A
USB Port 0
USB Port 1
USB Port 2
USB
VCC15= +1.6V
VCC33= +3.3V
USB Port 3
USB Port 4
USB Port 5
USB Port 6
USB Port 7
HD AUDIO
HD AUDIO
LPC Bus
PHY
LPC SIO
Winbond
83627DHG
SPI ROM
LAN
Realtek 8201CL
FDD
Parallel
Serial
(option IR)
SATA prot1
X2
KEYBOARD
MOUSE
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
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Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
1
Date: Sheet of
MICRO-START INT'L CO.,LTD.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
MS-7387 0A
MS-7387 0A
MS-7387 0A
2 32Friday, April 27, 2007
2 32Friday, April 27, 2007
2 32Friday, April 27, 2007
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1
P4M890 PLATFORM CLOCK GENERATOR MAP
3.3V 5V 5VSB 12V
P4M900_CE PLATFORM POWER DELIVERY MAP
PROCESSOR VCCP 1.2V~1.425V
D D
VRM
PROCESSOR 1.2V
Intel LGA775 Processor
CPU HOST
CLK
GUICK
DCLKO
DCLKI
NB
P4M900
GCLK_NB 66MHz
CLOCK GENERATOR
MEM CLK
0~5/CLK#0~5
C C
14.318MHZ
33MHz
48MHZ
B B
DDRII
DIMM Modules
SB14MHz
APIC
USB
SPCLK
PCI CLK 1~2
VCLK
VT8237S
PCI Slot 1 & 2
Realtek 8201CL
1.2V VREG
2.5V VREG
2.5V VREG
3VSB VREG
DDR 1.8V
VREG
1.6V VREG
1.5VSB
VREG
VTT 1.25V
VREG
NORTH BRIDGE VCCP
NORTH BRIDGE VCC1.6
NORTH BRIDGE RESUME 1.5V_SB
NORTH BRIDGE SYSEM MEMORY
VCC_DDR
DDRII DIMM1 / DIMM2 1.8V
DDR VTT 1.25V
SOUTH BRIDGE +1.5V
SOUTH BRIDGE VCC3
150mA
SOUTH BRIDGE RESUME 1.5V_SB
SOUTH BRIDGE RESUME VCC3_SB
SOUTH BRIDGE RTC 3.3V
LAN VCC3_SB
LPC 3.3V
SIOPCLK
SIO48MHZ
LPC SIO
Winbond
W83627DHG
AC_BITCLK
LPC SUPER I/O 3.3V
LPC SUPER I/O VCC5
ICS 9LPR704AGLF
HD AUDIO
Realtek ALC883
HD VDD5
VREG
HD audio VDD5
+12V : 0.1U 25V X 5
A A
+12V_MOS: 4.7U 35V X 1
1U 16V X 2
1000U 16V X 4
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Custom
Custom
Date: Sheet of
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5
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3
Date: Sheet of
MICRO-START INT'L CO.,LTD.
PWR And CLOCK Map
PWR And CLOCK Map
PWR And CLOCK Map
MS-7387 0A
MS-7387 0A
MS-7387 0A
2
3 32Friday, April 27, 2007
3 32Friday, April 27, 2007
3 32Friday, April 27, 2007
1
1
VT8237S GPIO Function Define
PIN NAME Function define(PIN)
GPO0 (VDDS)
GPO1(VDDS)
GPO2/SUSA#
(VDDS)
GPO3/SUSST#(VDDS)
GPO4/SUSCLK(VDDS)
GPO5/CPUSTP#
GPO6/PCISTP#
GPO7/GNT5
GPO9/GPI29/VRDSLP
GPO12/GPI12/INTE#
GPO13/GPI13/INTF#
GPO14/GPI14/INTG#
GPO15/GPI15/INTH#
GPO20/GPI20
/ACSDIN2/PCS0#
/PCS1#/SLPBTN#
GPO21/GPI21/ACSDIN3
GPO23/GPI23/DPSLP
/GPIOAGPO24/GPI24
GPO25/GPI25
A A
GPO26/GPI26/SMBDT2
(VDDS)
GPO27/GPI27/SMBCK2
(VDDS)
GPO30/GPI30
GPO31/GPI31
/GPIOB
/GPIOC
/GPIOD
Default
Function
GPO0
GPO1
SUSA#
SUSST#
SUSCLK
CPUSTP#
PCISTP#
GPO7
VRDSLP
GPO12
GPO13
GPO14
GPO15
GPI20/ACSDIN2
GPI21/ACSDIN3
GPI23
GPIOA
GPIOB
SMBDT2
SMBCK2
GPIOC
GPIOD
4.7K ohm Pull up to VCC3_SB
4.7K ohm Pull up to VCC3_SB
4.7K ohm Pull up to VCC3_SB
4.7K ohm Pull up to VCC3_SB
4.7K ohm Pull up to VCC3_SB
4.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
ohm Pull up to VCC3
8.2K
NC
8.2K ohm Pull up to VCC3
8.2K ohm Pull up to VCC3
8.2K ohm Pull up to VCC3
8.2K ohm Pull up to VCC3
4.7K ohm Pull down
4.7K ohm Pull down
4.7K ohm Pull up to VCC3
THE SIGNAL IS SPI_SCE#
2.2K ohm Pull up to VCC3
SEL Vlink Manual mode
2.2K ohm Pull down
SEL IOQ Depth=8 Level
ohm Pull up to VCC3
2.7K
THE SIGNAL IS THRM#
ohm Pull up to VCC3
2.7K
2.2K ohm Pull up to VCC3
SEL Host Clock=Auto mode
2.2K ohm Pull down
SEL GTL pull up=Enable
(AA3)
(AE3)
(AA2)
(Y3)
(AB3)
(AC7)
(AD6)
(R2)
(D25)
(D4)
(E4)
(A3)
(B3)
(U1)
(V3)
(P21)
(AE5)
(AD5)
(AD1)
(AC3)
(AF5)
(AC6)
PIN NAME Function define
GPI0
(VBAT)
GPI1
(VSUS3)
GPI2/EXTSMI#
(VSUS3)
GPI3/RING#
(VSUS3)
GPI4/LID#
(VSUS3)
GPI5/BATLOW# (VDDS)
GPI6/AGPBZ
GPI7/REQ5
GPI9/UDPWREN
GPI16/INTRUDER#
(VBAT)
GPI17/CPUMISS
GPI18/AOLGP1/THRM#
GPI19/SPIDI SPI BIOS DATA IN
DDR2/DDR1 DIMM Config.
DEVICE
DIMM 1
DIMM2
1010000B
1010001B
PCI Config.
DEVICE
PCI Slot 1 PCIREQ#0
PCI Slot 2 PCIREQ#1
Default
Function
GPI0
GPI1
EXTSMI#
RING#
LID#
BATLOW#
AGPBZ
GPI7
GPI9
INTRUDER#
CPUMISS
GPI18
SPIDI
CLOCKADDRESS
DCLKA3/MDCLKA#3
DCLKA4/MDCLKA#4
DCLKA5/MDCLKA#5
DCLKA0/MDCLKA#0
DCLKA1/MDCLKA#1
DCLKA2/MDCLKA#2
PIRQ#B
PIRQ#C
PIRQ#D
PIRQ#A
PIRQ#C
PIRQ#D
PIRQ#A
PIRQ#B
ohm Pull up to VBAT
1M
Detect SB_THERMTRIP#
4.7K ohm Pull up to VCC3_SB
4.7K ohm Pull up to VCC3_SB
RING#
10K ohm Pull up to VCC3_SB
4.7K ohm Pull up to VCC3_SB
4.7K ohm Pull up to VCC3
8.2K ohm Pull up to VCC3
ATADET=>Detect IDE1 ATA100/66
1M ohm Pull up to VBAT
4.7K ohm Pull up to VCC3_SB
4.7K ohm Pull up to
VCC3_SB
PCI RESET DEVICE
IDSEL
PCIGNT#0
PCIGNT#1
AD20
AD21
USB
(AE2)
(AC2)
(AA1)
(Y2)
(AC1)
(V4)
(AD10)
(R3)
(D26)
(AE1)
(Y2)
(Y4)
(U23)
Signals Target
PCIRST#1
PCIRST#2
PCIRST#3 NB
HD_RST#
CLOCKREQ#/GNT# CLK GEN PIN OUTMCP1 INT Pin
PCI_CLK1
PCI_CLK2
Rear
Front
PCI slot 1-3
Super I/O
Primary IDE
Port DATA +/-
USB1
LAN_USB1
JUSB2
JUSB1
USB0USB0+
USB2USB2+
USB4USB4+
USB6USB6+
USB5USB5+
USB7USB7+
USB1+
USB1USB3USB3+
5
6
OC#
OC#1
( OC#0,2,4,6 )
OC#4
( OC#1,3,5,7 )
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
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Custom
Custom
Date: Sheet of
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1
Date: Sheet of
MICRO-START INT'L CO.,LTD.
GPIO/MEMORY/PCI/HW STRPPING
GPIO/MEMORY/PCI/HW STRPPING
GPIO/MEMORY/PCI/HW STRPPING
MS-7387 0A
MS-7387 0A
MS-7387 0A
4 32Thursday, May 03, 2007
4 32Thursday, May 03, 2007
4 32Thursday, May 03, 2007
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HDBI#[0..3]8
HA#[3..31]8
VID[0..7]28
HREQ#[0..4]8
D D
C C
B B
A A
HD#[0..63]8
HRS#[0..2]8
HDBI#[0..3]
HA#[3..31]
VID[0..7]
HREQ#[0..4]
HD#[0..63]
HRS#[0..2]
CPU SIGNAL BLOCK
C11
C11
X_C10U10X1206
X_C10U10X1206
Close to CPU
VID5
VID4
VID7
HA#19
HA#20
HA#21
HA#22
AD6
A23#
D36#
G18
HD#35
AA4
A22#
D35#
E16
HD#34
A21#
D34#
HD#33
HA#17
HA#18
A20#Y4A19#Y6A18#W6A17#
D33#
D32#
D31#
E15
G16
G15
HD#32
HD#30
HD#31
HA#16
HA#14
HA#13
HA#15
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D30#
D29#
D28#
D27#
F15
F14
E13
G14
G13
HD#28
HD#26
HD#27
HD#29
HA#25
HA#30
HA#31
HA#26
HA#29
HA#23
HA#27
HA#24
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
AF5
AB4
AC5
AB5
A30#
D43#
E21
HD#42
A29#
D42#
F20
HD#41 HA#28
A28#
D41#
E19
HD#40
A27#
D40#
E18
HD#39
A26#
D39#
F18
HD#38
A25#
D38#
F17
HD#37
AA5
A24#
D37#
G17
HD#36
U5A
HDBI#0
HDBI#1
HDBI#2
HDBI#3
CPU_GTLREF0
IERR#
IERR#6
FERR#6,19
STPCLK#19
HINIT#19
HDBSY#8
HDRDY#8
HTRDY#8
HADS#8
HLOCK#8
HBNR#8
HIT#8
HITM#8
HBPRI#8
HDEFER#8
CPU_TMPA22
VTIN_GND22
THERMTRIP#6,29
PROCHOT#6
IGNNE#19
SMI#19
A20M#19
SLP#8,19
VTT_OUT_RIGHT
CPU_GTLREF16
R70 0R0402R70 0R0402
R69 51R0402R69 51R0402
CPU_GTLREF1
T2T2
H_BSL06,15
H_BSL16,15
H_BSL26,15
CPU_GD6,27
CPURST#6,8
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
A8
G11
D19
C20
F2
AB2
AB3
R3
M3
AD3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
AD1
AF1
AC1
AG1
AE1
AL1
AK1
M2
AE8
AL2
N2
P2
K3
L2
AH2
N5
AE6
C9
G10
D16
A20
Y1
V2
AA2
G29
H30
G30
N1
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
U5A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
HD#53
D53#
C14
HD#52
D52#
C15
HD#51
D51#
A14
HD#50
D50#
D17
HD#49
D49#
D20
HD#48
A35#
D48#
G22
HD#47
A34#
D47#
D22
HD#46
A33#
D46#
E22
HD#45
A32#
D45#
G21
HD#44
A31#
D44#
F21
HD#43
HA#12
D26#
D13
HD#25
HA#11
D25#
F12
HD#24
HA#8
HA#10
HA#7
HA#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D24#
D23#
D22#
D21#
F11
E10
D10
HD#23
HD#20
HD#21
HD#22
HA#6
HA#4
HA#5
HA#3
L5
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
D11
HD#17
HD#16
HD#18
HD#19
HD#14
HD#15
AC2
C12
DBR#
D14#
B12
HD#13
AN3
AN4
VSS_SENSE
VCC_SENSE
D13#
D12#D8D11#
C11
HD#10
HD#12
HD#11
VID6
AN5
AN6
AJ3
AK3
AM5
AL4
AM7
VID6#
VID_SELECT
ITP_CLK1
ITP_CLK0
RSVD#AM7
GTLREF_SEL
VSS_MB_REGULATION
VCC_MB_REGULATION
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B10
A11
A10
HD#8
HD#9
HD#3
HD#2
HD#4
HD#7
HD#6
HD#5
AK4
VID5#
GTLREF0
GTLREF1
GTLREF2
TESTHI12
TESTHI11
TESTHI10
FORCEPH
RSVD#G6
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
HD#1
VID0
VID3
VID2
VID1
AL6
AM3
AL5
AM2
VID4#
VID3#
VID2#
VID1#
VID0#
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ZIF-SOCKET775-RH
ZIF-SOCKET775-RH
B4
HD#0
VCC_VRM_REG 28
VSS_VRM_REG 28
VTT_OUT_RIGHT
R32
R32
X_1KR0402
AN7
H1
H2
H29
E24
AG3
AF2
AG2
AD2
AJ1
AJ2
G5
J6
K6
M6
J5
K4
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
X_1KR0402
CPU_GTLREF0
GTLVREF_NB
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
HRS#2
HRS#1
HRS#0
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
H_BPM#0 7
R82 51R0402R82 51R0402
R59 X_130R1%0402R59 X_130R1%0402
-HAP0
-HAP0 8
R83 49.9R1%0402R83 49.9R1%0402
R91 49.9R1%0402R91 49.9R1%0402
R85 49.9R1%0402R85 49.9R1%0402
R96 49.9R1%0402R96 49.9R1%0402
R84 49.9R1%0402R84 49.9R1%0402
R114 49.9R1%0402R114 49.9R1%0402
PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE
VID_SEL 28
CPU_GTLREF0 6
T3T3
GTLVREF_NB 8
1
2
3
4
5
6
7
8
RN10 8P4R-51R0402RN10 8P4R-51R0402
H_TESTHI0
R111 51R0402R111 51R0402
R81 51R0402R81 51R0402
R112 51R0402R112 51R0402
CPUCLK# 15
CPUCLK 15
HADSTB#1 8
HADSTB#0 8
HDSTBP#3 8
HDSTBP#2 8
HDSTBP#1 8
HDSTBP#0 8
HDSTBN#3 8
HDSTBN#2 8
HDSTBN#1 8
HDSTBN#0 8
NMI_SB 19
INTR 19
HBR#0 6,8
VTT_OUT_LEFT
C60
C60
X_C0.1U25Y
X_C0.1U25Y
SMI#
HINIT#
IGNNE#
STPCLK#
NMI_SB
A20M#
INTR
SLP#
H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
H_BPM#4
H_BPM#2
H_TDO
H_TMS
H_TDI
H_TRST#
H_TCK
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT
1
3
5
7
1
3
5
7
VTT_OUT_RIGHT
2
4
6
8
R65 51R0402R65 51R0402
R73 51R0402R73 51R0402
2
4
6
8
R71 51R0402R71 51R0402
VTT_OUT_LEFT
2
RN7
RN7
4
8P4R-51R0402
8P4R-51R0402
6
8
2
RN8
RN8
4
8P4R-51R0402
8P4R-51R0402
6
8
1
3
5
7
1
3
5
7
RN5
RN5
8P4R-51R0402
8P4R-51R0402
RN6
RN6
8P4R-51R0402
8P4R-51R0402
100
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
8
7
6
5
4
3
Date: Sheet of
2
MICRO-START INT'L CO.,LTD.
INTEL LGA775 - SIGNALS
INTEL LGA775 - SIGNALS
INTEL LGA775 - SIGNALS
MS-7387 0A
MS-7387 0A
MS-7387 0A
5 32Wednesday, May 02, 2007
5 32Wednesday, May 02, 2007
5 32Wednesday, May 02, 2007
1
8
7
VCCP
6
5
4
3
2
1
CAPS FOR FSB GENERIC
AF21
U5B
AF19
AF18
AF15
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
U5B
VCC#AF19
VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11
AE9
VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11
AD8
VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23
AC8
VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23
AB8
VCC#AB8
AA8
VCC#AA8
VCCP
VCC#AF22
VCC#AF21
VCC#Y30
VCC#Y8
Y8
Y29
Y30
VCC#AF9
VCC#AF8
VCC#AG11
VCC#Y27
VCC#Y28
VCC#Y29
Y27
Y28
VCC#AG14
VCC#AG12
VCC#Y25
VCC#Y26
Y24
Y25
Y26
VCC#AG19
VCC#AG18
VCC#AG15
VCC#W8
VCC#Y23
VCC#Y24
W8
Y23
W30
VCC#AG25
VCC#AG22
VCC#AG21
VCC#W28
VCC#W29
VCC#W30
W27
W28
W29
VCC#AG28
VCC#AG27
VCC#AG26
VCC#W25
VCC#W26
VCC#W27
W24
W25
W26
VCC#AG8
VCC#AG30
VCC#AG29
VCC#V8V8VCC#W23
VCC#W24
U8
W23
VCC#AG9
VCC#AH12
VCC#AH11
VCC#U29
VCC#U30
VCC#U8
U29
U30
VCC#AH15
VCC#AH14
VCC#U27
VCC#U28
U26
U27
U28
D D
VCCP
C C
VCC#AH21
VCC#AH19
VCC#AH18
VCC#U24
VCC#U25
VCC#U26
U23
U24
U25
VCC#AH26
VCC#AH25
VCC#AH22
VCC#T30
VCC#T8T8VCC#U23
T29
T30
AH28
AH29
AH30
VCC#AH27
VCC#AH28
VCC#AH29
VCC#T27
VCC#T28
VCC#T29
T26
T27
T28
AH8
AH9
AJ11
VCC#AH8
VCC#AH9
VCC#AH30
VCC#T24
VCC#T25
VCC#T26
T23
T24
T25
AJ12
AJ14
AJ15
VCC#AJ11
VCC#AJ12
VCC#AJ14
VCC#P8P8VCC#R8
VCC#T23
N8
R8
AJ18
AJ19
AJ21
VCC#AJ15
VCC#AJ18
VCC#AJ19
VCC#N29
VCC#N30
VCC#N8
N28
N29
N30
AJ22
AJ25
AJ26
VCC#AJ21
VCC#AJ22
VCC#AJ25
VCC#N26
VCC#N27
VCC#N28
N25
N26
N27
AJ8
AJ9
AK11
VCC#AJ8
VCC#AJ9
VCC#AJ26
VCC#N23
VCC#N24
VCC#N25
M8
N23
N24
AK12
AK14
AK15
VCC#AK11
VCC#AK12
VCC#AK14
VCC#M29
VCC#M30
VCC#M8
M28
M29
M30
AK18
AK19
AK21
VCC#AK15
VCC#AK18
VCC#AK19
VCC#M26
VCC#M27
VCC#M28
M25
M26
M27
AK22
AK25
AK26
VCC#AK21
VCC#AK22
VCC#AK25
VCC#M24
VCC#M25
M23
M24
AK8
AK9
AL11
VCC#AK8
VCC#AK9
VCC#AK26
VCC#K30
VCC#K8K8VCC#L8L8VCC#M23
K29
K30
AL12
AL14
AL15
VCC#AL11
VCC#AL12
VCC#AL14
VCC#K27
VCC#K28
VCC#K29
K26
K27
K28
AL18
AL19
AL21
VCC#AL15
VCC#AL18
VCC#AL19
VCC#K24
VCC#K25
VCC#K26
K23
K24
K25
AL22
AL25
AL26
VCC#AL21
VCC#AL22
VCC#AL25
VCC#J8J8VCC#J9J9VCC#K23
J30
AL29
AL30
AL8
VCC#AL26
VCC#AL29
VCC#AL30
VCC#J28
VCC#J29
VCC#J30
J27
J28
J29
AL9
AM11
VCC#AL8
VCC#AL9
VCC#AM11
VCC#J25
VCC#J26
VCC#J27
J25
J26
AM12
AM14
AM15
VCC#AM12
VCC#AM14
VCC#AM15
VCC#J22
VCC#J23
VCC#J24
J22
J23
J24
AM18
AM19
AM21
VCC#AM18
VCC#AM19
VCC#J20
VCC#J21
J19
J20
J21
AM22
AM25
AM26
VCC#AM21
VCC#AM22
VCC#AM25
VCC#J15
VCC#J18
VCC#J19
J14
J15
J18
AM29
AM30
AM8
VCC#AM26
VCC#AM29
VCC#AM30
VCC#J12
VCC#J13
VCC#J14
J11
J12
J13
AM9
AN11
VCC#AM8
VCC#AM9
VCC#AN11
VCC#AN9
VCC#J10
VCC#J11
J10
AN9
AN12
AN14
AN15
AN18
AN19
VCC#AN12
VCC#AN14
VCC#AN15
VCC#AN18
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC#AN26
VCC#AN29
VCC#AN30
VCC#AN8
AN8
AN25
AN26
AN29
AN30
AN21
AN22
VCCA
VSSA
VCCPLL
VCC-IOPLL
VCC#AN19
VCC#AN21
VCC#AN22
VTT#A25
VTT#A26
VTT#A27
VTT#A28
VTT#A29
VTT#A30
VTT#B25
VTT#B26
VTT#B27
VTT#B28
VTT#B29
VTT#B30
VTT#C25
VTT#C26
VTT#C27
VTT#C28
VTT#C29
VTT#C30
VTT#D25
VTT#D26
VTT#D27
VTT#D28
VTT#D29
VTT#D30
VTT_SEL
RSVD#F29
VCC#AN25
1122334
A23
B23
D23
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6
AA1
J1
F27
F29
ZIF-SOCKET775-RH
ZIF-SOCKET775-RH
4
H_VCCA
H_VSSA
H_VCCPLL
H_VCCA
V_FSB_VTT
VTT_PWG
VTT_OUT_RIGHT
VTT_OUT_LEFT
FOR CONROE CPU
C127
C127
C10U10Y0805
C10U10Y0805
C0.1U16Y0402
C0.1U16Y0402
VTT_OUT_RIGHT
VTT_OUT_LEFT
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
1.6V
R121
R121
2.2R
2.2R
R119
R119
C121
C121
36R1%
36R1%
P4M900 R121=2.2ohm R119=36ohm
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
CPU_GTLREF0VTT_OUT_LEFT
C66
C66
C220P50N0402
C220P50N0402
CPU_GTLREF1VTT_OUT_RIGHT
C27
C27
C220P50N0402
C220P50N0402
CPU_GTLREF0 5
CPU_GTLREF1 5
C67
C67
C1U16Y
C1U16Y
C38
C38
C1U16Y
C1U16Y
R94 10R0402R94 10R0402
R47 10R0402R47 10R0402
VTT_OUT_LEFT
B B
VTT_OUT_RIGHT
R93 124R1%0402R93 124R1%0402
210R1%0402
210R1%0402
R64 124R1%0402R64 124R1%0402
210R1%0402
210R1%0402
R92
R92
R62
R62
PLACE AT CPU END OF ROUTE
FERR#
CPURST#
PROCHOT#
IERR#
CPU_GD
HBR#0
THERMTRIP#
FERR# 5,19
6
CPURST# 5,8
PROCHOT# 5
IERR# 5
CPU_GD 5,27
HBR#0 5,8
THERMTRIP# 5,29
5
VTT_OUT_RIGHT
VTT_OUT_LEFT
A A
8
VTT_OUT_RIGHT
VTT_OUT_LEFT
V_FSB_VTT
V_FSB_VTT
7
R58 62R0402R58 62R0402
R60 120R0402R60 120R0402
R72 62R0402R72 62R0402
R88 X_100R0402R88 X_100R0402
R98 62R0402R98 62R0402
R89 62R0402R89 62R0402
PLACE AT SB END OF ROUTE
R86 62R0402R86 62R0402
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
V_FSB_VTT
L7 X_10U100m_0805L7 X_10U100m_0805
C119
VCC5_SB
4
C119
C1U16Y
C1U16Y
R28
R28
1KR0402
1KR0402
R33 10KR0402R33 10KR0402
RN19
RN19
1
3
5
7
8P4R-470R0402
8P4R-470R0402
CP3
CP3
X_COPPER
X_COPPER
VID_GD#27,28
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
VTT_OUT_RIGHT
B
2
4
6
8
C124
C124
C10U10Y0805
C10U10Y0805
R46
R46
1.25V VTT_PWRGOOD
680R0402
680R0402
VTT_PWG
CE
Q3
Q3
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
H_BSL1 5,15
H_BSL0 5,15
H_BSL2 5,15
3
H_VCCA
H_VSSA
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
MICRO-START INT'L CO.,LTD.
INTEL LGA775 - POWER
INTEL LGA775 - POWER
INTEL LGA775 - POWER
MS-7387 0A
MS-7387 0A
MS-7387 0A
6 32Wednesday, May 02, 2007
6 32Wednesday, May 02, 2007
6 32Wednesday, May 02, 2007
1
1
2
3
4
5
VTT_OUT_RIGHT
A A
R113
R113
X_1KR0402
X_1KR0402
B B
C C
VTT_OUT_RIGHT
49.9R1%0402
49.9R1%0402
U5C
U5C
A12
VSS#A12
A15
VSS#A15
A18
VSS#A18
A2
VSS#A2
A21
VSS#A21
A24
VSS#A24
A6
VSS#A6
A9
VSS#A9
AA23
VSS#AA23
AA24
VSS#AA24
AA25
VSS#AA25
AA26
VSS#AA26
AA27
VSS#AA27
AA28
VSS#AA28
AA29
VSS#AA29
AA3
VSS#AA3
AA30
VSS#AA30
AA6
VSS#AA6
AA7
VSS#AA7
AB1
VSS#AB1
AB23
VSS#AB23
AB24
VSS#AB24
AB25
VSS#AB25
AB26
VSS#AB26
AB27
VSS#AB27
AB28
VSS#AB28
AB29
VSS#AB29
AB30
VSS#AB30
AB7
VSS#AB7
AC3
VSS#AC3
AC6
VSS#AC6
AC7
VSS#AC7
AD4
VSS#AD4
AD7
VSS#AD7
AE10
VSS#AE10
AE13
VSS#AE13
AE16
VSS#AE16
AE17
VSS#AE17
AE2
VSS#AE2
AE20
VSS#AE20
AE24
VSS#AE24
AE25
VSS#AE25
AE26
VSS#AE26
AE27
VSS#AE27
AE28
VSS#AE28
R75
R75
R68
R68
49.9R1%0402
49.9R1%0402
H_COMP7
H_COMP6
AE3
COMP6Y3COMP7
VSS#AE29
VSS#AE30
AE5
AE29
AE30
AE4
D1
RSVD#D1
RSVD#AE4
VSS#AE5
VSS#AE7
VSS#AF10
AE7
AF10
R97
R97
X_1KR0402
X_1KR0402
D14
E23
RSVD#E23
RSVD#D14
VSS#AF13
VSS#AF16
AF13
AF16
AF17
R45
R45
51R0402
51R0402
E7
RSVD#E5E5RSVD#E6E6RSVD#E7
VSS#AF17
VSS#AF20
VSS#AF23
VSS#AF24
AF20
AF23
AF24
R115
R115
H_COMP8
F23
F6
B13
IMPSEL#
RSVD#F23
VSS#AF25
VSS#AF26
AF25
AF26
AF27
R79
R79
24.9R1%0402
24.9R1%0402
R49
R49
X_1KR0402
X_1KR0402
J3
N4
RSVD#J3
RSVD#B13
VSS#AF27
VSS#AF28
VSS#AF29
VSS#AF3
AF3
AF28
AF29
AF30
51R0402
51R0402
MSID1
P5
RSVD#P5
RSVD#N4
VSS#AF30
VSS#AF6
VSS#AF7
AF6
AF7
AG10
R77
R77
51R0402
51R0402
R76
R76
MSID0
X_51R0402
X_51R0402
W1
AC4
MSID[1]V1MSID[0]
RSVD#AC4
VSS#AG10
VSS#AG13
VSS#AG16
AG13
AG16
AG17
VSS#Y7Y7VSS#Y5Y5VSS#Y2
VSS#AG17
VSS#AG20
VSS#AG23
AG20
AG23
AG24
Y2
W4
VSS#W7W7VSS#W4
VSS#AG24
VSS#AG7
VSS#AH1
AH1
AG7
AH10
V6
V30
VSS#V7V7VSS#V6
VSS#AH10
VSS#AH13
VSS#AH16
AH13
AH16
AH17
V3
V29
V28
VSS#V3
VSS#V30
VSS#V29
VSS#AH17
VSS#AH20
VSS#AH23
AH20
AH23
AH24
05 Per FMB
05 Value FMB
V27
V26
V25
V24
V23
VSS#V28
VSS#V27
VSS#V26
VSS#V25
VSS#V24
VSS#AH24
VSS#AH3
VSS#AH6
VSS#AH7
VSS#AJ10
AH3
AH6
AH7
AJ10
AJ13
R78 X_0R0402R78 X_0R0402
U1
VSS#T7T7VSS#T6T6VSS#T3
VSS#U7U7VSS#U1
VSS#V23
VSS#AJ13
VSS#AJ16
VSS#AJ17
VSS#AJ20
AJ16
AJ17
AJ20
AJ23
T3
VSS#R7R7VSS#R5
VSS#AJ23
VSS#AJ24
VSS#AJ27
AJ24
AJ27
R5
R30
VSS#R30
VSS#AJ28
VSS#AJ29
AJ28
AJ29
R29
R28
R27
VSS#R29
VSS#R28
VSS#AJ30
VSS#AJ4
AJ4
AJ7
AJ30
0
0
VTT_OUT_RIGHT
R26
R25
R24
R23
R2
VSS#R27
VSS#R26
VSS#R25
VSS#R24
VSS#R23
VSS#AJ7
VSS#AK10
VSS#AK13
VSS#AK16
VSS#AK17
AK2
AK10
AK13
AK16
AK17
P4
VSS#P7P7VSS#P4
VSS#R2
VSS#AK2
VSS#AK20
VSS#AK23
AK20
AK23
0
1
P30
P29
P28
VSS#P30
VSS#P29
VSS#AK24
VSS#AK27
AK24
AK27
AK28
P27
P26
P25
VSS#P28
VSS#P27
VSS#P26
VSS#AK28
VSS#AK29
VSS#AK30
AK5
AK29
AK30
P24
P23
VSS#P25
VSS#P24
VSS#P23
VSS#AK5
VSS#AK7
VSS#AL10
AK7
AL10
N3
VSS#N7N7VSS#N6N6VSS#N3
VSS#AL13
VSS#AL16
VSS#AL17
AL13
AL16
AL17
AL20
M1
L6
VSS#L7L7VSS#L6
VSS#M7M7VSS#M1
VSS#AL20
VSS#AL23
VSS#AL24
AL23
AL24
AL27
L30
L3
L29
VSS#L3
VSS#L30
VSS#AL27
VSS#AL28
VSS#AL3
AL3
AL7
AL28
L28
L27
VSS#L29
VSS#L28
VSS#L27
VSS#AL7
VSS#AM1
VSS#AM10
AM1
AM10
L26
L25
L24
VSS#L26
VSS#L25
VSS#AM13
VSS#AM16
AM13
AM16
AM17
L23
K5
VSS#K7K7VSS#K5
VSS#L24
VSS#L23
VSS#AM17
VSS#AM20
VSS#AM23
AM20
AM23
AM24
J7
K2
VSS#K2
VSS#AM24
VSS#AM27
VSS#AM28
AM4
AM27
AM28
H9
VSS#J4J4VSS#J7
VSS#AM4
VSS#AN1
AN1
H6
VSS#H7H7VSS#H8H8VSS#H9
VSS#AN10
VSS#AN13
AN10
AN13
AN16
H27
H28
VSS#H3H3VSS#H6
VSS#H28
VSS#AN16
VSS#AN17
VSS#AN2
AN2
AN17
AN20
H24
H25
H26
VSS#H25
VSS#H26
VSS#H27
VSS#AN20
VSS#AN23
VSS#AN24
AN23
AN24
AN27
H21
H22
H23
VSS#H22
VSS#H23
VSS#H24
VSS#AN27
VSS#AN28
AN28
H18
H19
H20
VSS#H14
VSS#H13
VSS#H12
VSS#H18
VSS#H19
VSS#H20
VSS#H21
VSS#H11
VSS#H10
VSS#G1
VSS#F7
VSS#F4
VSS#F22
VSS#F19
VSS#F16
VSS#F13
VSS#F10
VSS#E8
VSS#E29
VSS#E28
VSS#E27
VSS#E26
VSS#E25
VSS#E20
VSS#E2
VSS#E17
VSS#E14
VSS#E11
VSS#D9
VSS#D6
VSS#D5
VSS#D3
VSS#D24
VSS#D21
VSS#D18
VSS#D15
VSS#D12
VSS#C7
VSS#C4
VSS#C24
VSS#C22
VSS#C19
VSS#C16
VSS#C13
VSS#C10
VSS#B8
VSS#B5
VSS#B24
VSS#B20
VSS#B17
VSS#B1B1VSS#B11
VSS#B14
B11
B14
H17
H14
H13
H12
VSS#H17
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
ZIF-SOCKET775-RH
ZIF-SOCKET775-RH
R95
R95
X_0R0402
X_0R0402
R141 0R0402R141 0R0402
H_BPM#0 5
MSID1 MSID0
R144
R144
X_0R0402
X_0R0402
D D
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
1
2
3
4
Date: Sheet of
MICRO-START INT'L CO.,LTD.
INTEL LGA775 - GND
INTEL LGA775 - GND
INTEL LGA775 - GND
0A
0A
MS-7387
MS-7387
MS-7387
5
7 32Wednesday, May 02, 2007
7 32Wednesday, May 02, 2007
7 32Wednesday, May 02, 2007
0A
A
U10A
AA36
AA34
AA32
AB31
AC29
AC30
M33
W35
W36
W34
W32
W31
W33
M34
M35
M32
M31
N34
R33
R34
P36
P34
N35
R36
U36
U34
U35
U32
V32
V36
V34
V33
Y35
Y33
V31
Y31
R35
K35
K32
K33
R32
N36
C31
E35
G27
D22
U30
G22
H22
T33
T30
L35
J32
J33
L36
L34
J34
T32
T31
J35
J36
F22
J25
U10A
HA03#
HA04#
HA05#
HA06#
HA07#
HA08#
HA09#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HA32#
HA33#
HADSTB0P#
HADSTB1#
ADS#
BNR#
BPRI#
BREQ0#
DBSY#
DEFER#
DRDY#
HIT#
HITM#
HLOCK#
HTRDY#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
RS0#
RS1#
RS2#
HDBI0#
HDBI1#
HDBI2#
HDBI3#
CPURST#
HCLK+
HCLK-
GTLVREF0
GTLVREF1
GTLCOMPP
GTLCOMPN
GNDA1GNDA2GNDA8GND
HIT#5
GTLVREF_NB
GTLCOMPN
V_FSB_VTT
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
HDBI#0
HDBI#1
HDBI#2
HDBI#3
R142
R142
360R1%0402
360R1%0402
HA#[3..31]5
4 4
HADSTB#05
HREQ#[0..4]5
HRS#[0..2]5
HDBI#[0..3]5
C182
C182
C0.1U16Y0402
C0.1U16Y0402
180R1%0402
180R1%0402
HADSTB#15
HDBSY#5
HDEFER#5
HDRDY#5
HLOCK#5
HTRDY#5
CPURST#5,6
NBHCLK15
NBHCLK#15
HADS#5
HBNR#5
HBPRI#5
HBR#05,6
HITM#5
GTLCOMPP
R143
R143
3 3
2 2
GTLVREF_NB5
C420
C0.1U25Y
C0.1U25Y
C420
A17
A18
VTT
VTT
P4M900
P4M900
GND
A3
B
A19
A20
A21
B17
B18
B19
VTT
VTT
VTT
VTT
VTT
GND
GND
GND
A10
A22
A25
A27
A29
VTT
GND
V_FSB_VTT
B20
B21
C17
C18
C19
C20
C21
D17
D18
D19
D20
D21
E17
E18
E19
E20
E21
F17
F18
F19
F20
F21
G17
G18
G19
G20
G21
HD00#
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
Rev1.9
Rev1.9
GND
GND
GND
GNDB2GNDB3GNDB4GND
GNDC2GNDC3GNDC4GND
GND
GND
GND
GNDD4GNDD5GNDD6GNDD8GND
C5
A31
A33
A35
B36
D3
C26
C27
D11
VTT
D23
VTT
GND
D24
VTT
VTT
VTT
HDSTB0P#
HDSTB0N#
HDSTB1P#
HDSTB1N#
HDSTB2P#
HDSTB2N#
HDSTB3P#
HDSTB3N#
HADSTB0N#
CPUSLPIN#
GND
GND
GND
D29
D31
HD01#
VTT
VTT
VTT
VTT
HD02#
HD03#
HD04#
HD05#
HD06#
HD07#
HD08#
HD09#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
DPWR#
GND
GND
GNDE2GNDE4GND
E5
D32
D34
C
HD#0
B35
HD#1
A36
HD#2
C33
HD#3
C32
HD#4
E31
HD#5
B34
HD#6
B33
HD#7
A34
HD#8
D30
HD#9
A30
HD#10
B31
HD#11
B30
HD#12
E30
HD#13
C29
HD#14
B29
HD#15
C30
HD#16
D36
HD#17
F36
HD#18
G36
HD#19
H34
HD#20
H35
HD#21
F35
HD#22
G35
HD#23
C36
HD#24
D35
HD#25
F34
HD#26
F33
HD#27
G34
HD#28
G33
HD#29
E33
HD#30
H32
HD#31
G32
HD#32
E28
HD#33
E29
HD#34
D28
HD#35
D27
HD#36
C28
HD#37
H28
HD#38
G28
HD#39
F28
HD#40
E27
HD#41
D26
HD#42
D25
HD#43
E25
HD#44
F25
HD#45
G25
HD#46
H26
HD#47
H25
HD#48
B23
HD#49
B25
HD#50
E23
HD#51
B27
HD#52
B28
HD#53
A28
HD#54
B24
HD#55
B26
HD#56
A26
HD#57
C23
HD#58
C22
HD#59
A23
HD#60
G23
HD#61
A24
HD#62
B22
HD#63
E22
A32
B32
C35
C34
G26
E26
C24
C25
T35
AB32
L31
T5T5
GND
E6
HD#[0..63] 5
HDSTBP#0 5
HDSTBN#0 5
HDSTBP#1 5
HDSTBN#1 5
HDSTBP#2 5
HDSTBN#2 5
HDSTBP#3 5
HDSTBN#3 5
-HAP0 5
SLP# 5,19
NB Heatsink
2
NB1_X1
NB1_X1
HEATSINK-38X36X25MM
HEATSINK-38X36X25MM
D
V_FSB_VTT
R122
R122
124R1%0402
124R1%0402
GTLVREF_NB
R117
R117
210R1%0402
210R1%0402
1
E
1 1
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet of
MICRO-START INT'L CO.,LTD.
P4M890-1 (HOST)
P4M890-1 (HOST)
P4M890-1 (HOST)
MS-7387 0A
MS-7387 0A
MS-7387 0A
E
8 32Wednesday, May 02, 2007
8 32Wednesday, May 02, 2007
8 32Wednesday, May 02, 2007
A
VCC_DDR
B
C
D
E
4 4
MD[0:63]12,13
3 3
2 2
DQM[0:7]12,13
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD62
MD63
AF35
AG34
AJ36
AK35
AF34
AG35
AJ34
AK34
AG32
AF32
AH30
AJ31
AF31
AH32
AH31
AJ32
AK33
AL36
AP35
AL34
AL35
AM35
AT36
AM34
AK24
AL23
AM24
AJ22
AK23
AN24
AM23
AM22
AK20
AK19
AM19
AR18
AL20
AM20
AL18
AM18
AR17
AT16
AN16
AN15
AM17
AP17
AM16
AM15
AN22
AN21
AP19
AT18
AT21
AR21
AT19
AR19
AR14
AM14
AP13
AR11
AP14
AN14
AT12
AP12
AH36
AF30
AN36
AN23
AN20
AT15
AP21
AT13
U10B
U10B
MD00
MD01
MD02
MD03
MD04
MD05
MD06
MD07
MD08
MD09
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM0#
DQM1#
DQM2#
DQM3#
DQM4#
DQM5#
DQM6#
DQM7#
AA24
AB24
VCCMEM
VCCMEM
AC24
AD16
VCCMEM
VCCMEM
AD17
AD18
VCCMEM
VCCMEM
AD19
AD20
VCCMEM
VCCMEM
AD21
AD22
VCCMEM
VCCMEM
AD23
AD24
VCCMEM
VCCMEM
AJ28
AJ26
VCCMEM
VCCMEM
AK25
AK27
VCCMEM
VCCMEM
AK29
AL26
VCCMEM
VCCMEM
AL28
AL30
VCCMEM
VCCMEM
AM25
AM27
VCCMEM
VCCMEM
AM29
AM31
VCCMEM
VCCMEM
AN26
AN27
VCCMEM
VCCMEM
AN31
AN33
VCCMEM
VCCMEM
AP30
AR26
VCCMEM
VCCMEM
AR33
AT25
AT28
AT31
VCCMEM
VCCMEM
VCCMEM
SRAS#
SCAS#
DQS0+
DQS0-
DQS1+
DQS1-
DQS2+
DQS2-
DQS3+
DQS3-
DQS4+
DQS4-
DQS5+
DQS5-
DQS6+
DQS6-
DQS7+
DQS7-
MCLKI
MCLKO+
MCLKO-
MEMVREF0
MEMVREF1
MEMDET
DMCOMP
AT35
BA0
BA1
BA2
VCCMEM
VCCMEM
MA00
MA01
MA02
MA03
MA04
MA05
MA06
MA07
MA08
MA09
MA10
MA11
MA12
MA13
SWE#
CS0#
CS1#
CS2#
CS3#
CKE0
CKE1
CKE2
CKE3
ODT0
ODT1
ODT2
ODT3
AR28
AP29
AP33
AT29
AR30
AR29
AT30
AN30
AP31
AR31
AT32
AP32
AN32
AN29
AR32
AT33
AR25
AN28
AR27
AP28
AT27
AP27
AT24
AP26
AT34
AP34
AR34
AN34
AT26
AP25
AR24
AN25
AJ35
AH35
AH33
AH34
AR36
AP36
AR22
AP23
AP18
AN18
AP15
AR15
AP20
AR20
AR12
AR13
AB34
AB35
AB36
AG29
AJ18
AF36
AM33
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
CKEA0
CKEA1
CKEA2
CKEA3
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
MCLKIT
M_CLKO+MD61
M_CLKOMVREF_NB
HI : DDR2
DMCOMP
MAA[0:13] 12,13,14
DQS0 12,13
DQS0# 12,13
DQS1 12,13
DQS1# 12,13
DQS2 12,13
DQS2# 12,13
DQS3 12,13
DQS3# 12,13
DQS4 12,13
DQS4# 12,13
DQS5 12,13
DQS5# 12,13
DQS6 12,13
DQS6# 12,13
DQS7 12,13
DQS7# 12,13
R358
R358
R357
R357
R131
1KR0402
R131
1KR0402
R130
R130
BA0 12,13,14
BA1 12,13,14
BA2 12,13,14
SRASA# 12,13,14
SCASA# 12,13,14
SWEA# 12,13,14
CS0# 12,14
CS1# 12,14
CS2# 13,14
CS3# 13,14
CKEA0 12,14
CKEA1 12,14
CKEA2 13,14
CKEA3 13,14
ODT0 12,14
ODT1 12,14
ODT2 13,14
ODT3 13,14
MCLKO+/- as short as passable
MCLKIT = DCLKx + 2 "
22R
22R
22R
22R
VCC_DDR
301R1%0402
301R1%0402
C154
C154
C143
C143
C147
C147
C133
C133
C134
C134
C128
C128
C129
C129
C123
C123
C122
C122
C116
C116
C153
C153
C117
C117
C113
C113
C173
C173
C160
C160
C161
C161
C112
C112
C168
C168
C171
C171
C167
C167
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
X_C5P50N0402
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
BA0 12,13,14
BA1 12,13,14
BA2 12,13,14
SRASA# 12,13,14
SCASA# 12,13,14
SWEA# 12,13,14
PULL DOWN GND OR PULL UP +1.8VDIMM
CLOSE TO DIMM
NOTE: DQS/DQS# => OTHER:W:S:W:OTHER=15:10:5:10:15
MCLKIT 15
MCLKOT 15
MCLKOC 15
C425
C5P50N
C425
C5P50N
C426
C5P50N
C426
C5P50N
C424
C5P50N
C424
C5P50N
Near to NB chip
Test Point
(Place near their respective balls of NB)
VCC_DDR
R128
R128
150R1%0402
150R1%0402
MVREF_NB
R129
R129
150R1%0402
150R1%0402
C165
C165
C0.1U16Y0402
C0.1U16Y0402
C166
C166
X_C0.1U16Y0402
X_C0.1U16Y0402
Close to ball
P4M900
P4M900
GNDE7GND
GND
GNDF1GNDF2GNDF4GNDF5GNDF6GNDF7GND
GND
1 1
A
E9
E34
E36
GND
GND
GND
GND
GND
GND
GND
GNDG1GNDG2GNDG4GNDG7GND
GND
GNDH2GNDH4GNDH7GND
GND
GND
GND
GND
GND
F10
F14
F23
F26
F27
F29
F30
F32
F24
G11
G29
B
GNDJ2GNDJ4GNDJ5GNDJ6GND
GND
H23
H24
H27
H31
J7
H36
H33
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
C
D
Date: Sheet of
MICRO-START INT'L CO.,LTD.
P4M890-2(MEM)
P4M890-2(MEM)
P4M890-2(MEM)
MS-7387 0A
MS-7387 0A
MS-7387 0A
E
9 32Wednesday, May 02, 2007
9 32Wednesday, May 02, 2007
9 32Wednesday, May 02, 2007
4
VCC3
W13
Y13
AA13
AB13
AC13
AJ1
AJ2
AJ3
AJ4
AJ5
VCC33PEX
VCC33PEX
VCC33PEX
GND
GNDM5GNDM7GND
M2
AJ6
AJ7
VCC33PEX
VCC33PEX
VCC33PEX
VCC33PEX
VCC33PEX
VCC33PEX
GNDN2GNDN5GNDN7GNDP2GNDP7GND
M36
AK3
AK4
AK1
AK2
AK5
AK6
AK7
PEXTX00+
PEXTX00-
PEXTX01+
PEXTX01-
VCC33PEX
VCC33PEX
VCC33PEX
VCC33PEX
VCC33PEX
VCC33PEX
VCC33PEX
PEXTX02+
PEXTX02-
PEXTX03+
PEXTX03-
PEXTX04+
PEXTX04-
PEXTX05+
PEXTX05-
PEXTX06+
PEXTX06-
PEXTX07+
PEXTX07-
PEXTX08+
PEXTX08-
PEXTX09+
PEXTX09-
PEXTX10+
PEXTX10-
PEXTX11+
PEXTX11-
PEXTX12+
PEXTX12-
PEXTX13+
PEXTX13-
PEXTX14+
PEXTX14-
PEXTX15+
PEXTX15-
PEXRX00+/DVP0D11
PEXRX00-/DVP0D10
PEXRX01+/DVP0D09
PEXRX01-/DVP0D08
PEXRX02+/DVP0D07
PEXRX02-/DVP0D06
PEXRX03+/DVP0CLK
PEXRX03-/DVPTVCLKR
PEXRX04+/DVP0D05
PEXRX04-/DVP0D04
PEXRX05+/DVP0D03
PEXRX05-/DVP0D02
PEXRX06+/DVP0D01
PEXRX06-/DVP0D00
PEXRX07+/DVP0DE
PEXRX07-/DVP0HS
PEXRX08+/DVP1D11
PEXRX08-/DVP1D10
PEXRX09+/DVP1D09
PEXRX09-/DVP1D08
PEXRX10+/DVP1D07
PEXRX10-/DVP1D06
PEXRX11+/DVP1CLK
PEXRX11-/DVP1D05
PEXRX12+/DVP1D04
PEXRX12-/DVP1D03
PEXRX13+/DVP1D02
PEXRX13-/DVP1D01
PEXRX14+/DVP1D00
PEXRX14-/DVP1DE
PEXRX15+/DVP1HS
PEXRX15-/DVP1VS
PEXTX16+
PEXTX16-
PEXRX16+
PEXRX16-
PEXCLK+
PEXCLK-
PEXWAKE#
PEXHPSCI#
PEXPMESCI#
PEXCOMP0
PEXCOMP1
PEXREXT0
PEXREXT1
PEXCOMP2
PEXREXT2
GND
GND
GND
GNDP5GND
GND
P6
P14
P15
P16
P17
P18
INTR#
PEXDET
TCSEN#
GND
GND
P19
P20
P4M900
P4M900
T13
U13
V13
R13
N13
N14
P13
U10C
U10C
270R1%0402
270R1%0402
340R1%0402
340R1%0402
1.6V
VCCA33HCK
VCCA33MCK
VCCA33PE
VCCA33PE
VCCA33PE
VCCA33PE
VLAD0
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
VBE0
UPSTB
UPSTB#
DNSTB
DNSTB#
UPCMD
DNCMD
LVREF_NB
LCOMPP
LCOMPN
AD13
AD14
AD15
AA12
AB12
AB25
AC12
AC25
AD12
AD31
AD35
AE36
AD36
AD34
AC31
AD30
AC32
AD29
AP1
AN3
AT3
AR4
AN2
AN1
AP5
AN5
AN4
AT2
AR3
AR1
AT1
AR5
AP4
AM5
M12
M13
M14
M15
M16
M20
M21
M22
M23
M24
N12
N25
R12
U12
U25
W12
W25
AE6
AH5
AH3
AF7
AE7
AH6
AH4
AL6
AL5
AL4
P12
P25
T12
T25
V12
Y12
Y25
G6
H6
VD00
VD01
VD02
VD03
VCC33PEX
VD04
VD05
VD06
VD07
VBE#
UPSTB+
UPSTB-
DNSTB+
DNSTB-
UPCMD
DNCMD
VLVREF
VLCOMPP
VLCOMPN
VCLK
VCC15VL
VCC15VL
VCC15VL
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VSUS15
SUSST#
TESTIN#
RESET#
PWROK
VCCA33HCK
VCCA33MCK
VCCA33PEX0
VCCA33PEX1
VCCA33PEXCK
VCCA33PEX2
VSUS15PEX
GNDAHCK
GNDAMCK
GNDAPEX0
GNDAPEX1
GNDAPEXCK
GNDAPEX2
GND
GND
K4
K2
VCC33PEX
VCC33PEX
VCC33PEX
VCC33PEX
GNDK5GNDK7GND
GND
K31
K34
VCC33PEX
VCC33PEX
GND
GNDL2GNDL7GND
K36
VCC33PEX
VCC33PEX
VCC33PEX
GNDL5GND
L32
L33
5 5
1.6V
4 4
3 3
2 2
VLAD019
VLAD119
VLAD219
VLAD319
VLAD419
VLAD519
VLAD619
VLAD719
VBE019
UPSTB19
UPSTB#19
DNSTB19
DNSTB#19
UPCMD19
DNCMD19
R176
R176
R177
R177
GCLK_NB15
VSUS15
C441
C441
C0.1U50Y
C0.1U50Y
-SUSST18
PCIRST#327
PWROK_NB18
VSUS15
B1
C1
D1
E1
H1
J1
K1
L1
L4
M4
M1
N1
N4
P4
P1
R1
T1
U1
U4
V4
V1
W1
W4
Y4
Y1
AA1
AB1
AC1
AC4
AD4
AD1
AE1
E3
D2
F3
G3
H3
J3
K3
L3
K6
L6
M3
N3
M6
N6
P3
R3
T3
U3
T6
U6
V3
W3
W6
V6
Y3
AA3
AA6
AB6
AB3
AC3
AD3
AE3
AG1
AF1
AF4
AE4
AG6
AF6
B6
B5
AC34
AC36
AC33
D7
H5
AD7
G5
AD6
AH1
AH2
3
PE_C_TXP0
PE_C_TXN0
PE_C_TXP1
PE_C_TXN1
PE_C_TXP2
PE_C_TXN2
PE_C_TXP3
PE_C_TXN3
PE_C_TXP4
PE_C_TXN4
PE_C_TXP5
PE_C_TXN5
PE_C_TXP6
PE_C_TXN6
PE_C_TXP7
PE_C_TXN7
PE_C_TXP8
PE_C_TXN8
PE_C_TXP9
PE_C_TXN9
PE_C_TXP10
PE_C_TXN10
PE_C_TXP11
PE_C_TXN11
PE_C_TXP12
PE_C_TXN12
PE_C_TXP13
PE_C_TXN13
PE_C_TXP14
PE_C_TXN14
PE_C_TXP15
PE_C_TXN15
PE_C_RXP0
PE_C_RXN0
PE_C_RXP1
PE_C_RXN1
PE_C_RXP2
PE_C_RXN2
PE_C_RXP3
PE_C_RXN3
PE_C_RXP4
PE_C_RXN4
PE_C_RXP5
PE_C_RXN5
PE_C_RXP6
PE_C_RXN6
PE_C_RXP7
PE_C_RXN7
PE_C_RXP8
PE_C_RXN8
PE_C_RXP9
PE_C_RXN9
PE_C_RXP10
PE_C_RXN10
PE_C_RXP11
PE_C_RXN11
PE_C_RXP12
PE_C_RXN12
PE_C_RXP13
PE_C_RXN13
PE_C_RXP14
PE_C_RXN14
PE_C_RXP15
PE_C_RXN15
PE1_C_TXP0
PE1_C_TXN0
PE1_C_RXP0
PE1_C_RXN0
PEDET
WAKE#
PEHPSCI_SB
PEPMESCI_SB
TCSEN#
PE0RCOMP0
PE0RCOMP1
PE0REXT0
PE0REXT1
PE1RCOMP
PE1REXT
C222 X_C0.1U16Y0402C222 X_C0.1U16Y0402
C221 X_C0.1U16Y0402C221 X_C0.1U16Y0402
PE1_C_RXP0 21
PE1_C_RXN0 21
PECLK1 15
PECLK1# 15
PIRQ#H 17
WAKE# 18,21,31
PEHPSCI_SB 18,19
PEPMESCI_SB 18
R182
R182
R175
R175
R181
R181
R185
R185
R183
R183
R174
R174
PE1_TXP0
PE1_TXN0
249R1%0402
249R1%0402
249R1%0402
249R1%0402
10.7KR1%0402
10.7KR1%0402
10.7KR1%0402
10.7KR1%0402
249R1%0402
249R1%0402
10.7KR1%0402
10.7KR1%0402
PE1_TXP0 21
PE1_TXN0 21
2
VCC3 VCC3
FB10
FB10
X_120L600m_250
X_120L600m_250
R184
R184
1KR1%0402
1KR1%0402
LVREF_NB
VCCA33PE
C223
C223
C0.1U16Y0402
C0.1U16Y0402
C446
C446
X_C0.1U25Y
X_C0.1U25Y
X_C22U6.3X50805-RH
X_C22U6.3X50805-RH
C10U10Y0805
C10U10Y0805
R186
R186
402R1%0402
402R1%0402
C447
C447
CP15 X_COPPERCP15 X_COPPER
1.6V
LVREF_NB = 0.45V
PE_C_TXP[0..15]31
PE_C_TXN[0..15]31
PE_C_RXP[0..15]
PE_C_RXN[0..15]
PE_C_TXP[0..15]
PE_C_TXN[0..15]
PE_C_RXP[0..15] 31
PE_C_RXN[0..15] 31
1
FB2
FB2
X_120L600m_250
X_120L600m_250
C138
C138
FB1
FB1
X_120L600m_250
X_120L600m_250
C149
C149
X_C22U6.3X50805-RH
X_C22U6.3X50805-RH
PEDET
TCSEN#
CP5
CP5
X_COPPER
X_COPPER
C157
C157
C0.1U16Y0402
C0.1U16Y0402
VCC3
CP4 X_COPPERCP4 X_COPPER
C152
C152
R179
R179
R180
R180
VCCA33HCK
VCCA33MCK
C0.1U16Y0402
C0.1U16Y0402
4.7KR0402
4.7KR0402
4.7KR0402
4.7KR0402
C162
C162
C1U16Y
C1U16Y
C158
C158
C1U16Y
C1U16Y
VCC3
1 1
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
MICRO-START INT'L CO.,LTD.
P4M900-3(GFX)
P4M900-3(GFX)
P4M900-3(GFX)
MS-7387 0A
MS-7387 0A
MS-7387 0A
1
10 32Wednesday, May 02, 2007
10 32Wednesday, May 02, 2007
10 32Wednesday, May 02, 2007
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