5
4
3
2
1
MSI
MS-7382 Ver:1.0
D D
C C
B B
CPU:
AMD M2 65W
System Chipset:
ATI RS690V
ATI SB600
On Board Chipset:
FINTEK Super I/O -- F71882
LAN -- RTL8101E
HD Codec --ALC883&888
BIOS -- SPI ROM
Main Memory:
DDRII* 2 (Max 8GB)
PWM:
Controller--Intersil ISL6566CR 2 Phase
Clock Generator:
Controller--RTM 870T-691
Title Page
Cover Sheet 1
Block Diagram
AMD M2 940
System Memory
DDR Terminations
2
3,4,5
6
7
ATI RS690C 8-11
CLOCK GENERATOR RTM 870T-691 12
ATI SB600 13-17
PCI-ExpressX1
I/O FINTEK
LAN RTL8111B/RTL8101E
HD Audio - ALC883&888
USB connectors
PWM - ISL6566CR
MS-6 ACPI Controller &MS-11
IDE / SATA / FAN / LPT
ATX Connector / Front Panel / KB / CON
VGA Connector
History
MANUAL PARTS
POWER OK MAP
POWER MAP
RESET MAP
18
19
20
21
22
23
24
25-26
27
28
29
30
31
32
33
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
<Title>
<Title>
<Title>
MS-7382 0A
MS-7382 0A
MS-7382 0A
12 9 Wednesday, August 01, 2007
12 9 Wednesday, August 01, 2007
12 9 Wednesday, August 01, 2007
1
5
4
3
2
1
BLOCK DIAGRAM
D D
C C
PRIMARY IDE
SATA CONN x4
FLOPPY CONN
PS2/KB CONN
B B
PARALLEL CONN
SERIAL CONN x2
POWER
SUPPLY
CONNECTOR
ATA 66/100/133
INTEGRATED SATA I/II
SIO
LPC SUPER I/O
F71882
SPI ROM 4M
PE X16
PE X1
PE X1
VREG
PCI EXPRESS
PCI EXPRESS
PCI EXPRESS
LPC BUS 33MHZ
SOCKET 940
K9
ATI
RS690
465 BGA
ATI
SB600
564 BGA
HT 16X16 1GHZ
HT 8X8 1GHZ
USB2.0 x10
128-BIT 400/533/667/800MHZ
AZAILIA
VGA CONN
BACK PANEL CONN
USB2 PORTS 0-1
DOUBLE STACK
USB2 PORTS 2-3
X2/GBIT LAN
FRONT PANEL HDR
USB2 PORTS 4-5
USB2 PORTS 6-7
USB2 PORTS 8-9
PCI-E 100MHZ
PCI 33MHZ
Realtek ALC 883/888 (HD, 7.1Channel)
DDRII CONN 0
DDRII CONN 1
LAN-RTL8111B
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
A A
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
22 9 Wednesday, July 18, 2007
22 9 Wednesday, July 18, 2007
22 9 Wednesday, July 18, 2007
1
5
4
3
2
1
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
CPU1A CPU1A
N6
L0_CLKIN_H(1)
P6
L0_CLKIN_L(1)
N3
L0_CLKIN_H(0)
N2
L0_CLKIN_L(0)
V4
L0_CTLIN_H(1)
V5
L0_CTLIN_L(1)
U1
L0_CTLIN_H(0)
V1
L0_CTLIN_L(0)
U6
L0_CADIN_H(15)
V6
L0_CADIN_L(15)
T4
L0_CADIN_H(14)
T5
L0_CADIN_L(14)
R6
L0_CADIN_H(13)
T6
L0_CADIN_L(13)
P4
L0_CADIN_H(12)
P5
L0_CADIN_L(12)
M4
L0_CADIN_H(11)
M5
L0_CADIN_L(11)
L6
L0_CADIN_H(10)
M6
L0_CADIN_L(10)
K4
L0_CADIN_H(9)
K5
L0_CADIN_L(9)
J6
L0_CADIN_H(8)
K6
L0_CADIN_L(8)
U3
L0_CADIN_H(7)
U2
L0_CADIN_L(7)
R1
L0_CADIN_H(6)
T1
L0_CADIN_L(6)
R3
L0_CADIN_H(5)
R2
L0_CADIN_L(5)
N1
L0_CADIN_H(4)
P1
L0_CADIN_L(4)
L1
L0_CADIN_H(3)
M1
L0_CADIN_L(3)
L3
L0_CADIN_H(2)
L2
L0_CADIN_L(2)
J1
L0_CADIN_H(1)
K1
L0_CADIN_L(1)
J3
L0_CADIN_H(0)
J2
L0_CADIN_L(0)
VCCA_1V2
C179
C179
224P/16v/6
224P/16v/6
C199
C199
224P/16v/6
224P/16v/6
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(1)
L0_CTLOUT_L(1)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
HT_CADIN_H[15..0] 8
HT_CADIN_L[15..0] 8
HT_CADOUT_H[15..0] 8
HT_CADOUT_L[15..0] 8
D D
HT_CLKIN_H1 8
HT_CLKIN_L1 8
HT_CLKIN_H0 8
VCCA_1V2
HT_CLKIN_L0 8
R116 51/4 R116 51/4
R117 51/4 R117 51/4
HT_CTLIN_H0 8
HT_CTLIN_L0 8
C C
B B
A A
VID[0..4] 20
C73
C73
180P50N
180P50N
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
VID[0..4]
C75
C75
180P50N
180P50N
TP15TP15
TP14TP14
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
HT_CLKOUT_H1 8
HT_CLKOUT_L1 8
HT_CLKOUT_H0 8
HT_CLKOUT_L0 8
HT_CTLOUT_H0 8
HT_CTLOUT_L0 8
VDDA_25
L4
80S/0805L480S/0805
C56 C3900P25X C56 C3900P25X
CPU_CLK 11
C55 C3900P25X C55 C3900P25X
CPU_CLK# 11
VCC_DDR
R104
R104
300/4
300/4
R280
R280
X_300/4
X_300/4
VCC_DDR
R112
R112
39.2R1%/4
39.2R1%/4
R113
R113
39.2R1%/4
39.2R1%/4
LDT_PWRGD 12
LDT_STOP# 9,12
The sideband signals on AMD platforms require a strong
Pull Down to GND to overcome the CPU drive during
power up and therefore allow the signals to maintain the
logic 0 state.
R73
R73
169R1%
169R1%
TP24TP24
TP27TP27
TP16TP16
TP22TP22
TP6TP6
COREFB+ 20
COREFB- 20
TP1TP1
CPU_M_VREF
TP10TP10
TP11TP11
TP13TP13
TP8TP8
TP18TP18
THERMDC_CPU 16
THERMDA_CPU 16
LDT_RST#
LDT_RST# 12
LDT_PWRGD
LDT_STOP#
C4.7U6.3X5
C4.7U6.3X5
C45
C45
X_C1000P50X
X_C1000P50X
R43 300/4 R43 300/4
R42 300/4 R42 300/4
C50
C50
C64
224P/16v/6
C64
224P/16v/6
CPUCLKIN
CPUCLKIN#
LDT_PWRGD
LDT_STOP#
CPU_PRESENT_L
THERM_SIC
CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS
CPU_DBREQ_L
COREFB+
COREFBCPU_VTT_SENSE
CPU_STRAP_HI_E11
CPU_STRAP_LO_F11
CPU_TEST25_H
CPU_TEST25_L
RN58
RN58
8P4R-680ohm
8P4R-680ohm
1
3
5
7
For SB600
VDDA25
C58
3300P/50V/4
C58
3300P/50V/4
CPU1D CPU1D
C10
VDDA1
D10
VDDA2
A8
CLKIN_H
B8
CLKIN_L
C9
PWROK
D8
LDTSTOP_L
C7
RESET_L
AL3
CPU_PRESENT_L
AL6
THERMTRIP_L
SIC
AK6
AL10
AJ10
AH10
AL9
A5
G2
G1
E12
F12
AH11
AJ11
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
AH9
E5
AJ5
AG9
AG8
AH7
AJ6
VCC_DDR
2
4
6
8
R54
R54
15/6/1
15/6/1
R57
R57
15/6/1
15/6/1
SID
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST5
TEST4
TEST3
TEST2
PROCHOT_L
VDDIO_FB_H
VDDIO_FB_L
C65
C65
0.1u/10X/4
0.1u/10X/4
VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
DBRDY
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
TP9TP9
VCC_DDR
D2
VID4
R18
R18
VID3 LDT_RST#
300/4
300/4
VID2
VID1
VID0
R105 300/4 R105 300/4
TP26TP26
VDDIO_FB_H should be used for systems which do not
support differential voltage feedback. In this case,
VDDIO_FB_L is not used and VDDIO_FB_H should be
routed as a 10-mil trace with 10-mil spacing (10/10).
VCC_DDR
TP12TP12
R52
80.6R1%/4
R52
80.6R1%/4
TP21TP21
TP17TP17
TP20TP20
TP19TP19
VCC_DDR
R108
R108
300/4
300/4
Test26 is pulled up to VDDIO according to CPU revision guide errata 133.
TEST18, TEST19, and TEST21 are pulled down to VSS according to CPU
revision guide errata 133.
CPU_PRESENT_L
CPU_TEST25_H
CPU_TEST25_L
TDO
CPU_M_VREF
D1
C1
E3
E2
E1
AK7
AL7
AK10
B6
AK11
AL11
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
C59
C59
C1000P50X0402
C1000P50X0402
VCC_DDR VCC_DDR
R510
R510
300/4
300/4
B
VCC_DDR
C160
C1000P50X0402
C160
C1000P50X0402
R106
R106
300/4
300/4
R118 1KR1%0402 R118 1KR1%0402
R67 510R/4 R67 510R/4
R72 510R/4 R72 510R/4
R511
R511
4.7K/4
4.7K/4
Q45
Q45
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
C E
CPU_THRIP# 13
R111 44.2RST R111 44.2RST
R114 44.2RST R114 44.2RST
C161
C1000P50X0402
C161
C1000P50X0402
VCC_DDR
VCCA_1V2
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
32 9 Wednesday, July 18, 2007
of
32 9 Wednesday, July 18, 2007
of
32 9 Wednesday, July 18, 2007
5
4
3
2
1
MEM_MA_DATA[63..0] 6
MEM_MA_ADD[15..0] 6,7
MEM_MA_DQS_H[7..0] 6
D D
C C
B B
A A
MEM_MA_DQS_L[7..0] 6 MEM_MB_DQS_L[7..0] 6
MEM_MA_DM[7..0] 6
MEM_MA0_CLK_H2 6,7
MEM_MA0_CLK_L2 6,7
MEM_MA0_CLK_H1 6,7
MEM_MA0_CLK_L1 6,7
MEM_MA0_CLK_H0 6,7
MEM_MA0_CLK_L0 6,7
MEM_MA0_CS_L1 6,7
MEM_MA0_CS_L0 6,7
MEM_MA0_ODT0 6,7
MEM_MA_CAS_L 6,7
MEM_MA_WE_L 6,7
MEM_MA_RAS_L 6,7
MEM_MA_BANK2 6,7
MEM_MA_BANK1 6,7
MEM_MA_BANK0 6,7
MEM_MA_CKE1 7
MEM_MA_CKE0 6,7
MEM_MA_DATA[63..0]
MEM_MA_ADD[15..0]
MEM_MA_DQS_H[7..0]
MEM_MA_DQS_L[7..0]
MEM_MA_DM[7..0]
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CS_L1
MEM_MA0_CS_L0
MEM_MA0_ODT0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
AG21
AG20
AC25
AA24
AC28
AE20
AE19
AD27
AA25
AC27
AB25
AB27
AA26
AA27
AC26
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
AF15
AF19
AH29
AJ25
G19
H19
U27
U26
G20
G21
V27
W27
N25
Y27
L27
M25
M27
N24
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27
W24
D29
C29
C25
D25
E19
F19
F15
G15
B29
E24
E18
H15
CPU1B CPU1B
MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)
MA0_CS_L(1)
MA0_CS_L(0)
MA0_ODT(0)
MA1_CLK_H(2)
MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)
MA1_CS_L(1)
MA1_CS_L(0)
MA1_ODT(0)
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK(2)
MA_BANK(1)
MA_BANK(0)
MA_CKE(1)
MA_CKE(0)
MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)
MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)
MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)
MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)
MA_DQS_H(8)
MA_DQS_L(8)
MA_DM(8)
MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)
AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
MEM_MB_DATA[63..0] 6
MEM_MB_ADD[15..0] 6,7
MEM_MB_DQS_H[7..0] 6
MEM_MB_DM[7..0] 6
MEM_MB0_CLK_H2 6,7
MEM_MB0_CLK_L2 6,7
MEM_MB0_CLK_H1 6,7
MEM_MB0_CLK_L1 6,7
MEM_MB0_CLK_H0 6,7
MEM_MB0_CLK_L0 6,7
MEM_MB0_CS_L1 6,7
MEM_MB0_CS_L0 6,7
MEM_MB0_ODT0 6,7
MEM_MB_CAS_L 6,7
MEM_MB_WE_L 6,7
MEM_MB_RAS_L 6,7
MEM_MB_BANK2 6,7
MEM_MB_BANK1 6,7
MEM_MB_BANK0 6,7
MEM_MB_CKE1 7
MEM_MB_CKE0 6,7
MEM_MB_DATA[63..0]
MEM_MB_ADD[15..0]
MEM_MB_DQS_H[7..0]
MEM_MB_DQS_L[7..0]
MEM_MB_DM[7..0]
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CS_L1
MEM_MB0_CS_L0
MEM_MB0_ODT0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AJ19
AK19
A18
A19
U31
U30
AE30
AC31
AD29
AL19
AL18
C19
D19
W29
W28
AE29
AB31
AD31
AC29
AC30
AB29
N31
AA31
AA28
M31
M29
N28
N29
AE31
N30
P29
AA29
P31
R29
R28
R31
R30
T31
T29
U29
U28
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
D31
C31
C24
C23
D17
C17
C14
C13
AJ14
AH17
AJ23
AK29
C30
A23
B17
B13
CPU1C CPU1C
MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)
MB0_CS_L(1)
MB0_CS_L(0)
MB0_ODT(0)
MB1_CLK_H(2)
MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)
MB1_CS_L(1)
MB1_CS_L(0)
MB1_ODT(0)
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK(2)
MB_BANK(1)
MB_BANK(0)
MB_CKE(1)
MB_CKE(0)
MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)
MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)
MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)
MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)
MB_DQS_H(8)
MB_DQS_L(8)
MB_DM(8)
MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
42 9 Wednesday, July 18, 2007
of
42 9 Wednesday, July 18, 2007
of
42 9 Wednesday, July 18, 2007
5
VCCP
CPU1F CPU1F
A4
VDD
A6
VDD
AA8
VDD
AA10
VDD
AA12
VDD
AA14
VDD
AA16
VDD
AA18
VDD
AB7
VDD
D D
C C
B B
VTT_DDR VCCP
C157
224P/16v/6
C157
224P/16v/6
AB9
VDD
AB11
VDD
AC4
VDD
AC5
VDD
AC8
VDD
AC10
VDD
AD2
VDD
AD3
VDD
AD7
VDD
AD9
VDD
AE10
VDD
AF7
VDD
AF9
VDD
AG4
VDD
AG5
VDD
AG7
VDD
AH2
VDD
AH3
VDD
B3
VDD
B5
VDD
B7
VDD
C2
VDD
C4
VDD
C6
VDD
C8
VDD
D3
VDD
D5
VDD
D7
VDD
D9
VDD
E4
VDD
E6
VDD
E8
VDD
E10
VDD
F5
VDD
F7
VDD
F9
VDD
F11
VDD
G6
VDD
G8
VDD
G10
VDD
G12
VDD
H7
VDD
H11
VDD
H23
VDD
J8
VDD
J12
VDD
J14
VDD
J16
VDD
J18
VDD
J20
VDD
J22
VDD
J24
VDD
K7
VDD
K9
VDD
K11
VDD
K13
VDD
K15
VDD
K17
VDD
K19
VDD
K21
VDD
K23
VDD
L4
VDD
L5
VDD
L8
VDD
L10
VDD
L12
VDD
Y17
VDD
Y19
VDD
C274
224P/16v/6
C274
224P/16v/6
C207
C4.7U10Y0805
C207
C4.7U10Y0805
X_180P50N
X_180P50N
A3
VSS
A7
VSS
A9
VSS
A11
VSS
AA4
VSS
AA5
VSS
AA7
VSS
AA9
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
AA19
VSS
AA21
VSS
AA23
VSS
AB2
VSS
AB3
VSS
AB8
VSS
AB10
VSS
AB12
VSS
AB14
VSS
AB16
VSS
AB18
VSS
AB20
VSS
AB22
VSS
AC7
VSS
AC9
VSS
AC11
VSS
AC13
VSS
AC15
VSS
AC17
VSS
AC19
VSS
AC21
VSS
AC23
VSS
AD8
VSS
AD10
VSS
AD12
VSS
AD14
VSS
AD16
VSS
AD20
VSS
AD22
VSS
AD24
VSS
AE4
VSS
AE5
VSS
AE9
VSS
AE11
VSS
AF2
VSS
AF3
VSS
AF8
VSS
AF10
VSS
AF12
VSS
AF14
VSS
AF16
VSS
AF18
VSS
AF20
VSS
AF22
VSS
AF24
VSS
AF26
VSS
AF28
VSS
AG10
VSS
AG11
VSS
AH14
VSS
AH16
VSS
AH18
VSS
AH20
VSS
AH22
VSS
AH24
VSS
AH26
VSS
AH28
VSS
AH30
VSS
AK2
VSS
AK14
VSS
AK16
VSS
AK18
VSS
Y14
VSS
Y16
VSS
C194
C194
C62
C1000P50X
C62
C1000P50X
C229
C1000P50X
C229
C1000P50X
C184
C184
C100p50N0402
C100p50N0402
4
VCCP VCCP
C633
X_C10U6.3X50805
C633
X_C10U6.3X50805
CPU1G CPU1G
L14
VDD
L16
VDD
L18
VDD
M2
VDD
M3
VDD
M7
VDD
M9
VDD
M11
VDD
M13
VDD
M15
VDD
M17
VDD
M19
VDD
N8
VDD
N10
VDD
N12
VDD
N14
VDD
N16
VDD
N18
VDD
P7
VDD
P9
VDD
P11
VDD
P13
VDD
P15
VDD
P17
VDD
P19
VDD
R4
VDD
R5
VDD
R8
VDD
R10
VDD
R12
VDD
R14
VDD
R16
VDD
R18
VDD
R20
VDD
T2
VDD
T3
VDD
T7
VDD
T9
VDD
T11
VDD
T13
VDD
T15
VDD
T17
VDD
T19
VDD
T21
VDD
U8
VDD
U10
VDD
U12
VDD
U14
VDD
U16
VDD
U18
VDD
U20
VDD
V9
VDD
V11
VDD
V13
VDD
V15
VDD
V17
VDD
V19
VDD
V21
VDD
W4
VDD
W5
VDD
W8
VDD
W10
VDD
W12
VDD
W14
VDD
W16
VDD
W18
VDD
W20
VDD
Y2
VDD
Y3
VDD
Y7
VDD
Y9
VDD
Y11
VDD
Y13
VDD
Y15
VDD
Y21
VDD
C640
X_C10U6.3X50805
C640
X_C10U6.3X50805
C635
C10U6.3X50805
C635
C10U6.3X50805
C642
C10U6.3X50805
C642
C10U6.3X50805
AK20
VSS
AK22
VSS
AK24
VSS
AK26
VSS
AK28
VSS
AK30
VSS
AL5
VSS
B4
VSS
B9
VSS
B11
VSS
B14
VSS
B16
VSS
B18
VSS
B20
VSS
B22
VSS
B24
VSS
B26
VSS
B28
VSS
B30
VSS
C3
VSS
D14
VSS
D16
VSS
D18
VSS
D20
VSS
D22
VSS
D24
VSS
D26
VSS
D28
VSS
D30
VSS
E11
VSS
F4
VSS
F14
VSS
F16
VSS
F18
VSS
F20
VSS
F22
VSS
F24
VSS
F26
VSS
F28
VSS
F30
VSS
G9
VSS
G11
VSS
H8
VSS
H10
VSS
H12
VSS
H14
VSS
H16
VSS
H18
VSS
H22
VSS
H24
VSS
H26
VSS
H28
VSS
H30
VSS
J4
VSS
J5
VSS
J7
VSS
J9
VSS
J11
VSS
J13
VSS
J15
VSS
J17
VSS
J19
VSS
J21
VSS
J23
VSS
K2
VSS
K3
VSS
K8
VSS
K10
VSS
K12
VSS
K14
VSS
K16
VSS
K18
VSS
K20
VSS
K22
VSS
Y18
VSS
C627
C10U6.3X50805
C627
C10U6.3X50805
VTT_DDR VCC_DDR
C636
C10U6.3X50805
C636
C10U6.3X50805
C646
X_C10U6.3X50805
C646
X_C10U6.3X50805
C632
X_C10U6.3X50805
C632
X_C10U6.3X50805
3
AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11
L20
L22
M21
M23
N20
N22
P21
P23
R22
T23
U22
V23
W22
Y23
C628
X_C10U6.3X50805
C628
X_C10U6.3X50805
2
VCCA_1V2
CPU1H CPU1H
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
5
5
6
6
7
7
8
8
C187
C187
X_180P50N
X_180P50N
C639
X_C10U6.3X50805
C639
X_C10U6.3X50805
C70
X_C10U6.3X50805
C70
X_C10U6.3X50805
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C630
C10U6.3X50805
C630
C10U6.3X50805
N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22
C10U6.3X50805
C10U6.3X50805
VTT_DDR
VCC_DDR
VCCP
C645
X_224P/16v/6
C645
C95
X_C10U6.3X50805
C95
X_C10U6.3X50805
X_224P/16v/6
C629
C10U6.3X50805
C629
C10U6.3X50805
C643
C643
CPU1ICPU1I
AJ4
VLDT_A1
AJ3
VLDT_A2
AJ2
VLDT_A3
AJ1
VLDT_A4
D12
VTT
C12
VTT
B12
VTT
A12
VTT
AB24
VDDIO
AB26
VDDIO
AB28
VDDIO
AB30
VDDIO
AC24
VDDIO
AD26
VDDIO
AD28
VDDIO
AD30
VDDIO
AF30
VDDIO
M24
VDDIO
M26
VDDIO
M28
VDDIO
M30
VDDIO
P24
VDDIO
P26
VDDIO
P28
VDDIO
P30
VDDIO
T24
VDDIO
T26
VDDIO
T28
VDDIO
T30
VDDIO
V25
VDDIO
V26
VDDIO
V28
VDDIO
V30
VDDIO
Y24
VDDIO
Y26
VDDIO
Y28
VDDIO
Y29
VDDIO
CPU1E
CPU1E
L25
RSVD1
L26
RSVD2
L31
RSVD3
L30
RSVD4
W26
RSVD5
W25
RSVD6
AE27
RSVD7
U24
RSVD8
V24
RSVD9
AE28
RSVD10
Y31
RSVD11
Y30
RSVD12
AG31
RSVD13
V31
RSVD14
W31
RSVD15
AF31
RSVD16
1
1
2
2
3
3
4
4
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
C648
X_224P/16v/6
C648
X_224P/16v/6
0.01u/50V/6/X7R
0.01u/50V/6/X7R
C647
224P/16v/6
C647
224P/16v/6
H6
VLDT_B1
H5
VLDT_B2
H2
VLDT_B3
H1
VLDT_B4
AK12
VTT
AJ12
VTT
AH12
VTT
AG12
VTT
AL12
VTT
K24
VSS
K26
VSS
K28
VSS
K30
VSS
L7
VSS
L9
VSS
L11
VSS
L13
VSS
L15
VSS
L17
VSS
L19
VSS
L21
VSS
L23
VSS
M8
VSS
M10
VSS
M12
VSS
M14
VSS
M16
VSS
M18
VSS
M20
VSS
M22
VSS
N4
VSS
N5
VSS
N7
VSS
N9
VSS
N11
VSS
N13
VSS
N15
VSS
E20
RSVD17
B19
RSVD18
AL4
RSVD19
AK4
RSVD20
AK3
RSVD21
F2
RSVD22
F3
RSVD23
G4
RSVD24
G3
RSVD25
G5
RSVD26
AD25
RSVD27
AE24
RSVD28
AE25
RSVD29
AJ18
RSVD30
AJ20
RSVD31
C18
RSVD32
C20
RSVD33
G24
RSVD34
G25
RSVD35
H25
RSVD36
V29
RSVD37
W30
RSVD38
C649
C649
C670
22P50N0402
C670
22P50N0402
VLDT_RUN_B
VTT_DDR
VCC_DDR
1
C84
C84
C4.7U6.3X5
C4.7U6.3X5
C678
C1000P50X0402
C678
C1000P50X0402
C681
C1000P50X0402
C681
C1000P50X0402
C682
C1000P50X0402
C682
C1000P50X0402
C683
C1000P50X0402
C683
C1000P50X0402
VTT_DDR
A A
C226
180P50N
C226
C291
C4.7U10Y0805
C291
C4.7U10Y0805
180P50N
C237
C1000P50X
C237
C1000P50X
C51
C1000P50X
C51
C1000P50X
4
C634
C634
C1000p50X
C1000p50X
C1000p50X
C1000p50X
C34
224P/16v/6
C34
224P/16v/6
C238
224P/16v/6
C238
224P/16v/6
C213
X_C4.7U10Y0805
C213
X_C4.7U10Y0805
5
C263
C4.7U10Y0805
C263
C4.7U10Y0805
C204
C204
C638
C638
C1000p50X
C1000p50X
VCC_DDR VCC_DDR
EC22
CD1000U16EL20-2+EC22
CD1000U16EL20-2
+
1 2
C641
X_C10U6.3X50805
C641
X_C10U6.3X50805
C195
C4.7U10Y0805
C195
C4.7U10Y0805
C220
C220
C631
C631
C197
C197
C1000p50X
C1000p50X
C1000p50X
C1000p50X
C1000p50X
C1000p50X
3
C644
C10U6.3X50805
C644
C10U6.3X50805
C669
180P50N
C669
180P50N
VCC3
C671
C671
103P/16V/4
103P/16V/4
2
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
of
52 9 Friday, July 27, 2007
of
52 9 Friday, July 27, 2007
of
52 9 Friday, July 27, 2007
5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
5
VCC_DDR
170
55
102
75
19
68
NC
RC118RC0
VDD051VDD156VDD262VDD372VDD478VDD5
VDD3
NC#19
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
VSS
109
112
115
118
121
124
127
130
133
197
191
194
181
175
VDD6
VDD7
VDD8
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
136
VSS
139
142
145
148
151
154
157
160
163
MEM_MA_DATA[63..0] 4
MEM_MA_ADD[15..0] 4,7 MEM_MA_DQS_L[7..0] 4
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
D D
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
C C
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
B B
MEM_MA_DATA63
A A
MEM_MA_DATA[63..0]
MEM_MA_ADD[15..0] MEM_MA_DQS_L[7..0]
DIMM1
DIMM1
3
4
9
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
172
187
184
189
178
VDDQ5
VDDQ6
VDDQ7
VDDQ469VDDQ7
VSS
VSS
VSS
VSS
VSS
166
169
198
201
204
67
VDDQ8
VSS
207
VCC3
VDDQ9
VSS
210
238
VSS
213
4
VDDSPD
VSS
VSS
216
219
4
161
CB042CB143CB248CB349CB4
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(CK0#)
VSS
VSS
VSS
VSS
222
225
228
231
162
167
CB5
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A16/BA2
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
VREF
VSS
VSS
234
237
CB6
WE#
CS0#
CS1#
VSS
MEM_MA_DQS_H[7..0] 4
MEM_MA_DM[7..0] 4
168
CB7
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
X3
X3
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
57
A11
176
A12
196
A13
174
A14
173
A15
54
190
BA1
71
BA0
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
SCL
119
SDA
X1
X1
1
X2
X2
239
SA0
240
SA1
101
SA2
Address A0
P240_DDR2_DIMM
P240_DDR2_DIMM
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
SCL
SDA
VDDR_VREF
C44
C44
0.1u/25Y/4
0.1u/25Y/4
MEM_MA_DQS_H[7..0]
MEM_MA_DM[7..0]
MEM_MA_BANK2 4,7
MEM_MA_BANK1 4,7
MEM_MA_BANK0 4,7
MEM_MA_WE_L 4,7
MEM_MA_CAS_L 4,7
MEM_MA_RAS_L 4,7
MEM_MA0_ODT0 4,7
MEM_MA_CKE0 4,7
MEM_MA0_CS_L0 4,7
MEM_MA0_CS_L1 4,7
MEM_MA0_CLK_H0 4,7
MEM_MA0_CLK_L0 4,7
MEM_MA0_CLK_H1 4,7
MEM_MA0_CLK_L1 4,7
MEM_MA0_CLK_H2 4,7
MEM_MA0_CLK_L2 4,7
SCL 11,13,21
SDA 11,13,21
VCC_DDR
R24
R24
56.2R1%
56.2R1%
R22
R22
56.2R1%
56.2R1%
3
MEM_MB_DATA[63..0] 4
C19
C19
X_0.1u/25Y/4
X_0.1u/25Y/4
C26
C26
0.1u/25Y/4
0.1u/25Y/4
3
MEM_MB_ADD[15..0] 4,7
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
VDDR_VREF
MEM_MB_DATA[63..0]
MEM_MB_ADD[15..0]
55
DIMM2
DIMM2
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
21
DQ10
22
DQ11
131
DQ12
132
DQ13
140
DQ14
141
DQ15
24
DQ16
25
DQ17
30
DQ18
31
DQ19
143
DQ20
144
DQ21
149
DQ22
150
DQ23
33
DQ24
34
DQ25
39
DQ26
40
DQ27
152
DQ28
153
DQ29
158
DQ30
159
DQ31
80
DQ32
81
DQ33
86
DQ34
87
DQ35
199
DQ36
200
DQ37
205
DQ38
206
DQ39
89
DQ40
90
DQ41
95
DQ42
96
DQ43
208
DQ44
209
DQ45
214
DQ46
215
DQ47
98
DQ48
99
DQ49
107
DQ50
108
DQ51
217
DQ52
218
DQ53
226
DQ54
227
DQ55
110
DQ56
111
DQ57
116
DQ58
117
DQ59
229
DQ60
230
DQ61
235
DQ62
236
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
50
VSS
65
VSS
66
VSS
79
VSS
82
VSS
85
VSS
88
VSS
91
VSS
94
VSS
97
VSS
100
VSS
RC118RC0
VSS
103
19
106
102
NC#19
VSS
109
VCC_DDR
NC/TEST
VSS
68
NC
VDD051VDD156VDD262VDD372VDD478VDD5
VSS
VSS
VSS
VSS
112
115
118
121
2
VCC3
170
197
191
194
181
175
75
VDD6
VDD7
VDD8
VDD3
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
127
130
VSS
133
136
139
142
145
148
151
154
157
160
2
238
172
187
184
189
67
VDDQ5
VDDQ6
VDDQ469VDDQ7
VSS
VSS
VSS
VSS
163
166
169
198
178
VDDQ7
VSS
201
VSS
204
161
162
167
168
CB042CB143CB248CB349CB4
CB5
CB6
CB7
VDDQ8
VDDQ9
VSS
VSS
VSS
207
210
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
DQS0
VDDSPD
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
X3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
SCL
SDA
X1
VREF
X2
SA0
SA1
VSS
213
Custom
Custom
Custom
SA2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
216
219
222
225
228
231
234
237
<Title>
<Title>
<Title>
MS-7382 0A
MS-7382 0A
MS-7382 0A
MEM_MB_DQS_H[7..0] 4
MEM_MB_DQS_L[7..0] 4
MEM_MB_DM[7..0] 4
MEM_MB_DQS_H0
7
MEM_MB_DQS_L0
6
MEM_MB_DQS_H1
16
MEM_MB_DQS_L1
15
MEM_MB_DQS_H2
28
MEM_MB_DQS_L2
27
MEM_MB_DQS_H3
37
MEM_MB_DQS_L3
36
MEM_MB_DQS_H4
84
MEM_MB_DQS_L4
83
MEM_MB_DQS_H5
93
MEM_MB_DQS_L5
92
MEM_MB_DQS_H6
105
MEM_MB_DQS_L6
104
MEM_MB_DQS_H7
114
MEM_MB_DQS_L7
113
46
45
X3
MEM_MB_ADD0
188
MEM_MB_ADD1
183
MEM_MB_ADD2
63
MEM_MB_ADD3
182
MEM_MB_ADD4
61
MEM_MB_ADD5
60
MEM_MB_ADD6
180
MEM_MB_ADD7
58
MEM_MB_ADD8
179
MEM_MB_ADD9
177
MEM_MB_ADD10
70
MEM_MB_ADD11
57
MEM_MB_ADD12
176
MEM_MB_ADD13
196
MEM_MB_ADD14
174
MEM_MB_ADD15
173
54
190
71
73
74
192
MEM_MB_DM0
125
126
MEM_MB_DM1
134
135
MEM_MB_DM2
146
147
MEM_MB_DM3
155
156
MEM_MB_DM4
202
203
MEM_MB_DM5
211
212
MEM_MB_DM6
223
224
MEM_MB_DM7
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
119
X1
1
X2
239
VCC3
240
101
Address A2
P240_DDR2_DIMM
P240_DDR2_DIMM
1
SCL
SDA
C40
C40
0.1u/25Y/4
0.1u/25Y/4
1
MEM_MB_DQS_H[7..0]
MEM_MB_DQS_L[7..0]
MEM_MB_DM[7..0]
MEM_MB_BANK2 4,7
MEM_MB_BANK1 4,7
MEM_MB_BANK0 4,7
MEM_MB_WE_L 4,7
MEM_MB_CAS_L 4,7
MEM_MB_RAS_L 4,7
MEM_MB0_ODT0 4,7
MEM_MB_CKE0 4,7
MEM_MB0_CS_L0 4,7
MEM_MB0_CS_L1 4,7
MEM_MB0_CLK_H0 4,7
MEM_MB0_CLK_L0 4,7
MEM_MB0_CLK_H1 4,7
MEM_MB0_CLK_L1 4,7
MEM_MB0_CLK_H2 4,7
MEM_MB0_CLK_L2 4,7
VDDR_VREF
of
62 9 Wednesday, July 18, 2007
of
62 9 Wednesday, July 18, 2007
of
62 9 Wednesday, July 18, 2007
5
MEM_MB_BANK2 4,6
MEM_MA_ADD12 4,6
MEM_MB_ADD12 4,6
MEM_MA_ADD9 4,6
MEM_MB_ADD14 4,6
MEM_MA_ADD11 4,6
MEM_MB_ADD9 4,6
D D
C C
B B
MEM_MA_ADD7 4,6
MEM_MB_ADD8 4,6
MEM_MA_ADD6 4,6
MEM_MB_ADD4 4,6
MEM_MA_ADD5 4,6
MEM_MB_ADD2 4,6
MEM_MA_ADD1 4,6
MEM_MB_ADD1 4,6
MEM_MA_ADD2 4,6
MEM_MB_RAS_L 4,6
MEM_MA_RAS_L 4,6
MEM_MB0_CS_L0 4,6
MEM_MA0_CS_L0 4,6
MEM_MB_ADD10 4,6
MEM_MA_ADD10 4,6
MEM_MB_BANK0 4,6
MEM_MA_BANK0 4,6
MEM_MB0_CS_L1 4,6
MEM_MA0_CS_L1 4,6
MEM_MB_BANK2
MEM_MA_ADD12
MEM_MB_ADD12
MEM_MA_ADD9
MEM_MB_ADD14
MEM_MA_ADD11
MEM_MB_ADD9
MEM_MA_ADD7
MEM_MB_ADD8
MEM_MA_ADD6
MEM_MB_ADD4
MEM_MA_ADD5
MEM_MB_ADD2
MEM_MA_ADD1
MEM_MB_ADD1
MEM_MA_ADD2
MEM_MB_RAS_L
MEM_MA_RAS_L
MEM_MB0_CS_L0
MEM_MA0_CS_L0
MEM_MB_ADD10
MEM_MA_ADD10
MEM_MB_BANK0
MEM_MA_BANK0
MEM_MB0_CS_L1
MEM_MA0_CS_L1
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
C93 22P50N0402 C93 22P50N0402
C185 22P50N0402 C185 22P50N0402
C99 22P50N0402 C99 22P50N0402
C100 22P50N0402 C100 22P50N0402
C141 22P50N0402 C141 22P50N0402
C106 22P50N0402 C106 22P50N0402
C110 22P50N0402 C110 22P50N0402
C105 22P50N0402 C105 22P50N0402
C115 22P50N0402 C115 22P50N0402
C108 22P50N0402 C108 22P50N0402 C121 22P50N0402 C121 22P50N0402
C114 22P50N0402 C114 22P50N0402
C120 22P50N0402 C120 22P50N0402
C126 22P50N0402 C126 22P50N0402
C131 22P50N0402 C131 22P50N0402
C143 22P50N0402 C143 22P50N0402
C154 22P50N0402 C154 22P50N0402
C162 22P50N0402 C162 22P50N0402
C145 22P50N0402 C145 22P50N0402
C96 22P50N0402 C96 22P50N0402
C146 22P50N0402 C146 22P50N0402
C151 22P50N0402 C151 22P50N0402
Decoupling Between Processor and DIMMs
4
VTT_DDR VTT_DDR
2
RN15
RN15
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN16
RN16
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN18
RN18
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN20
RN20
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN23
RN23
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN22
RN22
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN26
RN26
4
8P4R-47R0402
8P4R-47R0402
6
8
VCC_DDR VCC_DDR
MEM_MA_CKE1 4
MEM_MA_CKE0 4,6
MEM_MB_CKE1 4
MEM_MA_ADD15 4,6
MEM_MB_ADD11 4,6
MEM_MA_ADD8 4,6
MEM_MB_ADD7 4,6
MEM_MB_ADD5 4,6
MEM_MB_ADD6 4,6
MEM_MA_ADD4 4,6
MEM_MB_ADD3 4,6
MEM_MA_ADD3 4,6
MEM_MB_ADD0 4,6
MEM_MA_ADD0 4,6
MEM_MB_BANK1 4,6
MEM_MA_BANK1 4,6
MEM_MB_WE_L 4,6
MEM_MA_WE_L 4,6
MEM_MB_CAS_L 4,6
MEM_MA_CAS_L 4,6
MEM_MB_CKE0 4,6
MEM_MA_ADD14 4,6
MEM_MB_ADD15 4,6
MEM_MA_BANK2 4,6
MEM_MB0_ODT0 4,6
MEM_MA0_ODT0 4,6
MEM_MB_ADD13 4,6
MEM_MA_ADD13 4,6
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MB_CKE1
MEM_MA_ADD15
MEM_MB_ADD11
MEM_MA_ADD8
MEM_MB_ADD7
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MA_ADD4
MEM_MB_ADD3
MEM_MA_ADD3
MEM_MB_ADD0
MEM_MA_ADD0
MEM_MB_BANK1
MEM_MA_BANK1
MEM_MB_WE_L
MEM_MA_WE_L
MEM_MB_CAS_L
MEM_MA_CAS_L
MEM_MB_CKE0
MEM_MA_ADD14
MEM_MB_ADD15
MEM_MA_BANK2
MEM_MB0_ODT0
MEM_MA0_ODT0
MEM_MB_ADD13
MEM_MA_ADD13
C101 22P50N0402 C101 22P50N0402
C98 22P50N0402 C98 22P50N0402 C90 22P50N0402 C90 22P50N0402
C190 22P50N0402 C190 22P50N0402
C109 22P50N0402 C109 22P50N0402
C111 22P50N0402 C111 22P50N0402
C163 22P50N0402 C163 22P50N0402
C117 22P50N0402 C117 22P50N0402
C124 22P50N0402 C124 22P50N0402
C116 22P50N0402 C116 22P50N0402
C129 22P50N0402 C129 22P50N0402
C128 22P50N0402 C128 22P50N0402
C132 22P50N0402 C132 22P50N0402
C135 22P50N0402 C135 22P50N0402
C138 22P50N0402 C138 22P50N0402
C150 22P50N0402 C150 22P50N0402
C170 22P50N0402 C170 22P50N0402
C176 22P50N0402 C176 22P50N0402
C168 22P50N0402 C168 22P50N0402
C104 22P50N0402 C104 22P50N0402
C153 22P50N0402 C153 22P50N0402
C159 22P50N0402 C159 22P50N0402
3
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
RN14
RN14
8P4R-47R0402
8P4R-47R0402
RN17
RN17
8P4R-47R0402
8P4R-47R0402
RN19
RN19
8P4R-47R0402
8P4R-47R0402
RN21
RN21
8P4R-47R0402
8P4R-47R0402
RN24
RN24
8P4R-47R0402
8P4R-47R0402
RN13
RN13
8P4R-47R0402
8P4R-47R0402
RN25
RN25
8P4R-47R0402
8P4R-47R0402
2
MEM_MA0_CLK_H2 4,6
MEM_MA0_CLK_L2 4,6
MEM_MA0_CLK_H1 4,6
MEM_MA0_CLK_L1 4,6
MEM_MA0_CLK_H0 4,6
MEM_MA0_CLK_L0 4,6
MEM_MB0_CLK_H2 4,6
MEM_MB0_CLK_L2 4,6
MEM_MB0_CLK_H1 4,6
MEM_MB0_CLK_L1 4,6
MEM_MB0_CLK_H0 4,6
MEM_MB0_CLK_L0 4,6
MEM_MA0_CLK_H2
C182
C182
C1.5P/4
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
VTT_DDR VCC_DDR
C94
0.1u/10X/4
C94
0.1u/10X/4
C92
0.1u/10X/4
C92
0.1u/10X/4
C67
0.1u/10X/4
C67
0.1u/10X/4
C1.5P/4
C63
C63
C1.5P/4
C1.5P/4
C107
C107
C1.5P/4
C1.5P/4
C173
C173
C1.5P/4
C1.5P/4
C47
C47
C1.5P/4
C1.5P/4
C113
C113
C1.5P/4
C1.5P/4
C97
0.1u/10X/4
C97
0.1u/10X/4
C66
0.1u/10X/4
C66
0.1u/10X/4
C273
0.1u/10X/4
C273
0.1u/10X/4
1
C140
0.1u/10X/4
C140
0.1u/10X/4
C155
0.1u/10X/4
C155
0.1u/10X/4
VCC_DDR
A A
VTT_DDR
5
Layout: Spread out on VCC_DDR pour EMI
C215
C1000P50X0402
C215
C178
X_0.1u/25Y/4
C178
C175
180P50N
C175
180P50N
C177
180P50N
C177
180P50N
X_0.1u/25Y/4
C180
0.1u/25Y/4
C180
0.1u/25Y/4
C136
180P50N
C136
180P50N
Layout: Spread out on VTT pour
C188
0.1u/25Y/4
C188
0.1u/25Y/4
C221
0.1u/25Y/4
C221
0.1u/25Y/4
C224
C224
C223
C223
C100p50N0402
C100p50N0402
C100p50N0402
C100p50N0402
C100p50N0402
C100p50N0402
C85
C85
C1000P50X0402
C1000P50X0402
C183
C1000P50X0402
C183
C1000P50X0402
C123
C123
C100p50N0402
C100p50N0402
C100p50N0402
C100p50N0402
C186
C186
C144
C144
C191
C1000P50X0402
C191
C1000P50X0402
C698
C100p50N0402
C698
C100p50N0402
4
C196
C1000P50X0402
C196
C1000P50X0402
C697
C697
C100p50N0402
C100p50N0402
C1000P50X0402
C1000P50X0402
C201
X_22P50N0402
C201
X_22P50N0402
C695
X_0.1u/25Y/4
C695
X_0.1u/25Y/4
C100p50N0402
C100p50N0402
C693
C693
C100p50N0402
C100p50N0402
C205
C205
C700
C700
C1000P50X0402
C222
C1000P50X0402
C222
C1000P50X0402
C200 X_22P50N0402 C200 X_22P50N0402
C685 X_0.1u/25Y/4 C685 X_0.1u/25Y/4
C209
C1000P50X0402
C209
C1000P50X0402
VCC_DDR
3
C181
C1000P50X0402
C181
C1000P50X0402
C208
0.1u/25Y/4
C208
0.1u/25Y/4
2
VTT_DDR
C689
X_0.1u/25Y/4
C689
X_0.1u/25Y/4
C688
C688
C687
C687
C686
C686
C100p50N0402
C100p50N0402
C100p50N0402
C100p50N0402
C100p50N0402
C100p50N0402
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
C691
X_0.1u/25Y/4
C691
X_0.1u/25Y/4
C690
C690
C100p50N0402
C100p50N0402
of
72 9 Friday, July 20, 2007
of
72 9 Friday, July 20, 2007
of
72 9 Friday, July 20, 2007
C100p50N0402
C100p50N0402
C692
C692
5
4
3
2
1
HT_RXCALP
HT_RXCALN
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
U12A
U12A
R19
HT_RXCAD15P
R18
HT_RXCAD15N
R21
HT_RXCAD14P
R22
HT_RXCAD14N
U22
HT_RXCAD13P
U21
HT_RXCAD13N
U18
HT_RXCAD12P
U19
HT_RXCAD12N
W19
HT_RXCAD11P
W20
HT_RXCAD11N
AC21
HT_RXCAD10P
AB22
HT_RXCAD10N
AB20
HT_RXCAD9P
AA20
HT_RXCAD9N
AA19
HT_RXCAD8P
Y19
HT_RXCAD8N
T24
HT_RXCAD7P
R25
HT_RXCAD7N
U25
HT_RXCAD6P
U24
HT_RXCAD6N
V23
HT_RXCAD5P
U23
HT_RXCAD5N
V24
HT_RXCAD4P
V25
HT_RXCAD4N
AA25
HT_RXCAD3P
AA24
HT_RXCAD3N
AB23
HT_RXCAD2P
AA23
HT_RXCAD2N
AB24
HT_RXCAD1P
AB25
HT_RXCAD1N
AC24
HT_RXCAD0P
AC25
HT_RXCAD0N
W21
HT_RXCLK1P
W22
HT_RXCLK1N
Y24
HT_RXCLK0P
W25
HT_RXCLK0N
P24
HT_RXCTLP
P25
HT_RXCTLN
A24
HT_RXCALP
C24
HT_RXCALN
RS690
RS690
PART 1 OF 5
PART 1 OF 5
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCLK0P
HT_TXCLK0N
HYPER TRANSPORT I/F
HYPER TRANSPORT I/F
HT_TXCTLP
HT_TXCTLN
HT_TXCALP
HT_TXCALN
P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22
N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25
L21
L22
J24
J25
N23
P23
C25
D24
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
HT_TXCALP
HT_TXCALN
U12B
U12B
G5
G4
J8
J7
J4
J5
L8
L7
L4
L5
M8
M7
M4
M5
P8
P7
P4
P5
R4
R5
R7
R8
U4
U5
W4
W5
Y4
Y5
V9
W9
AB7
AB6
A_RX2P 12
HT_CLKIN_H1 3
HT_CLKIN_L1 3
HT_CLKIN_H0 3
HT_CLKIN_L0 3
HT_CTLIN_H0 3
HT_CTLIN_L0 3
R138 100/4/1 R138 100/4/1 R152 49.9/4 R152 49.9/4
A_RX2N 12
A_RX3P 12
A_RX3N 12
RX_LANP0 17
RX_LANN0 17
A_RX0P 12
A_RX0N 12
A_RX1N 12
A_RX1P 12
W11
W12
AA11
AB11
Y7
AA7
AB9
AA9
W14
W15
AA12
AB12
AA14
AB14
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
SB_RX0P
SB_RX0N
SB_RX1N
SB_RX1P
NC1
NC2
RS690
RS690
PART 2 OF 5
PART 2 OF 5
PCIE GFX I/F
PCIE GFX I/F
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
PCE_CALRP
PCE_CALRN
J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4
A_TX2P0
A_TX2N0
A_TX3P0
A_TX3N0
TX_LANP0
TX_LANN0
A_TX0P_C
A_TX0N_C
A_TX1P_C
A_TX1N_C
PCEH_PCAL
PCEH_NCAL
C347 0.1u/10X/4 C347 0.1u/10X/4
C345 0.1u/10X/4 C345 0.1u/10X/4
C354 0.1u/10X/4 C354 0.1u/10X/4
C350 0.1u/10X/4 C350 0.1u/10X/4
C355 0.1u/16Y/4 C355 0.1u/16Y/4
C362 0.1u/16Y/4 C362 0.1u/16Y/4
C322 0.1u/10X/4 C322 0.1u/10X/4
C316 0.1u/10X/4 C316 0.1u/10X/4
C341 0.1u/10X/4 C341 0.1u/10X/4
C338 0.1u/10X/4 C338 0.1u/10X/4
R191 562R/1/4 R191 562R/1/4
R195 2KR1%0402 R195 2KR1%0402
A_TX2P 12
A_TX2N 12
A_TX3P 12
A_TX3N 12
TXLANP 17
TXLANN 17
A_TX0P 12
A_TX0N 12
A_TX1P 12
A_TX1N 12
VDDA12_PKG2
AD8
AE8
AD7
AE7
AD4
AE5
AD5
AD6
AE9
AD10
AC8
AD9
AD11
AE11
HT_CADOUT_H[15..0] 3
HT_CADOUT_L[15..0] 3
HT_CADIN_H[15..0] 3
D D
C C
VDDHT_PKG
B B
HT_CADIN_L[15..0] 3
HT_CADOUT_H15 HT_CADIN_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
HT_CLKOUT_H1 3
HT_CLKOUT_L1 3
HT_CLKOUT_H0 3
HT_CLKOUT_L0 3
HT_CTLOUT_H0 3
HT_CTLOUT_L0 3
R137 49.9/4 R137 49.9/4
A A
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
82 9 Wednesday, July 18, 2007
of
82 9 Wednesday, July 18, 2007
of
82 9 Wednesday, July 18, 2007
5
PLLVDD12 VCCA_1V2
AVDD VCC3
AVDDDI
PLLVDD
HTPVDD
C260
C260
0.1u/16Y/4
0.1u/16Y/4
C296
C296
0.1u/16Y/4
0.1u/16Y/4
C312
C312
C4.7U10Y0805
C4.7U10Y0805
C344
C344
2.2u/6.3V/6
2.2u/6.3V/6
C246
C246
2.2u/6.3V/6
2.2u/6.3V/6
C252
C252
2.2u/6.3V/6
2.2u/6.3V/6
C340
C340
0.1u/16Y/4
0.1u/16Y/4
C243
C243
0.1u/16Y/4
0.1u/16Y/4
C254
C254
0.1u/16Y/4
0.1u/16Y/4
L19 X_500mALL19 X_500mAL
CP13CP13
D D
+1.8V_S0
R181 X_500mALR181 X_500mAL
CP20CP20
L30 500mALL30 500mAL
C C
+1.8V_S0
L32 X_500mALL32 X_500mAL
CP25CP25
+1.8V_S0
L15 X_500mALL15 X_500mAL
CP7CP7
B B
+1.8V_S0 AVDDQ
L21 X_500mALL21 X_500mAL
CP15CP15
4
LDT_STOP# 3,12
VCC3
R239 10K/4 R239 10K/4
R234 39K/4 R234 39K/4
R256 4.7K/4 R256 4.7K/4
R245 4.7K/4 R245 4.7K/4
R233 4.7K/4 R233 4.7K/4
R170 150R/1/4 R170 150R/1/4
R168 150R/1/4 R168 150R/1/4
R163 150R/1/4 R163 150R/1/4
+1.8V_S0 VCC3
R249
R249
4.7K/4
4.7K/4
B
C E
Q34
Q34
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
STRP_DATA
DAC_SCL
DCC_DATA
I2C_CLK
I2C_DATA
R 24
G 24
B 24
ALLOW_LDTSTOP 12
R
G
B
VSYNC# 24
HSYNC# 24
DAC_SCL 24
DAC_SDAT 24
PCI_RST1# 16,21
NB_PWRGD 13,21
HTREFCLK 11
NB_OSC_14M 11
NBSRCCLK 11
NBSRCCLK# 11
SBLINKCLK 11
SBLINKCLK# 11
R257
R257
1KR1%0402
1KR1%0402
3
R176 715R R176 715R
PLLVDD
HTPVDD
LDT_STOP_NB#
VCC3
PLLVDD12
TP23TP23
R237
R237
4.7K/4
4.7K/4
AVDDDI
AVDDQ
R153 10K/4 R153 10K/4
R246 10K/4 R246 10K/4
I2C_CLK
I2C_DATA
DCC_DATA
STRP_DATA
RSET
AVDD
U12C
U12C
B22
C22
G17
H17
A20
B20
A21
A22
C21
C20
D19
E19
F19
G19
C6
A5
B21
B6
A6
A10
B10
B24
B25
C10
C11
C5
B5
C23
B23
C2
B11
A11
F2
E1
G1
G2
D6
D7
C8
C7
B8
A8
B2
A2
B4
AA15
AB15
C14
B3
C3
A3
RS690
RS690
AVDD
AVDD
AVSSN
AVSSN
AVDDDI
AVSSDI
AVDDQ
AVSSQ
C
Y
COMP
RED
GREEN
BLUE
DACVSYNC
DACHSYNC
RSET
DACSCL
DACSDA
PLLVDD18
PLLVSS
HTPVDD
HTPVSS
SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP
HTTSTCLK
HTREFCLK
TVCLKIN
OSCIN
PLLVDD12
GFX_CLKP
GFX_CLKN
SB_CLKP
SB_CLKN
DFT_GPIO0
DFT_GPIO1
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
BMREQ#
I2C_CLK
I2C_DATA
THERMALDIODE_P
THERMALDIODE_N
TMDS_HPD
DDC_DATA
TESTMODE
STRP_DATA
PART 3 OF 5
PART 3 OF 5
CRT/TVOUT
CRT/TVOUT
PLL PWR
PLL PWR
PM
PM
CLOCKs
CLOCKs
MIS.
MIS.
2
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
LVTM DVO
LVTM DVO
LVDDR18D
LVDDR18D
LVDDR33
LVDDR33
GPP_TX0P
GPP_TX0N
GPP_RX0P
GPP_RX0N
DEBUG10
GPP_TX1N
GPP_TX1P
GPP_RX1N
GPP_RX1P
DEBUG15
DEBUG14
DEBUG13
LPVDD
LPVSS
LVSSR
LVSSR
LVSSR
LVSSR
LVSSR
LVSSR
LVSSR
LVSSR
GPIO3
GPIO2
GPIO4
DEBUG6
DEBUG9
DEBUG0
DEBUG2
DEBUG1
B14
B15
B13
A13
H14
G14
D17
E17
A15
B16
C17
C18
B17
A17
A18
B18
E15
D15
H15
G15
D14
+1.8V_S0
E14
A12
+1.8V_S0
B12
C12
VCC3
C13
A16
A14
D12
1. Each LVSSR ball should connect to GND
C19
through seperated via.
C15
C16
2. LPVSS connect to GND through dedicated via.
F14
F15
E12
G12
F12
AD14
AD15
AE15
AD16
AE16
AC17
AD18
AE19
AD19
AE20
AD20
AE21
AD13
AC13
AE13
AE17
AD17
1
A A
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
92 9 Friday, July 27, 2007
of
92 9 Friday, July 27, 2007
of
92 9 Friday, July 27, 2007
5
4
3
2
1
0.5A
L41 X_30L3A-15_0805L41 X_30L3A-15_0805
VCCA_1V2
CP9CP9
D D
L24 X_30L500mAL24 X_30L500mA
+1.8V_S0
CP21CP21
1.5A
L40 30L3A-15_0805L40 30L3A-15_0805
VCCA_1V2
L45 30L3A-15_0805L45 30L3A-15_0805
L25 X_30L500mAL25 X_30L500mA
VCC3
CP26CP26
C C
B B
+1.8V_S0
VCCA_1V2
L22 X_30L500mAL22 X_30L500mA
CP16CP16
L26 X_30L500mAL26 X_30L500mA
CP28CP28
VDDR3
C358
2.2u/6.3X50603
C358
2.2u/6.3X50603
C279
X_1u/6.3Y/4
C279
X_1u/6.3Y/4
C365
C365
X_2.2u/6.3X50603
X_2.2u/6.3X50603
10u/10Y/8
10u/10Y/8
X_1u/6.3Y/4
X_1u/6.3Y/4
10u/10Y/8
10u/10Y/8
X_1u/6.3Y/4
X_1u/6.3Y/4
1u/10Y/6
1u/10Y/6
CURRENT MEASUREMENT
C256
X_1u/6.3Y/4
C256
X_1u/6.3Y/4
C265
C265
C284
C284
C369
C369
C280
C280
C363
C363
X_1u/6.3Y/4
X_1u/6.3Y/4
C266
X_10u/10Y/8
C266
X_10u/10Y/8
C283
1u/6.3Y/4
C283
1u/6.3Y/4
C368
X_1u/10Y/6
C368
X_1u/10Y/6
C359
1u/10Y/6
C359
1u/10Y/6
C278
1u/6.3Y/4
C278
1u/6.3Y/4
U12E
U12E
AC16
H12
B7
VSS
VSS
VSS
U12D
VDD_HT
C261
C261
C262
X_1u/6.3Y/4
C262
X_1u/6.3Y/4
C650
0.1u/16V/6
C650
0.1u/16V/6
VDD18
VDDA_12
C655
0.1u/16V/6
C655
0.1u/16V/6
C656
0.1u/16V/6
C656
0.1u/16V/6
VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2
AE22
T23
T25
AE14
H23
A23
F17
M13
AC15
M17
R17
VSS
VSS
VSS
VSS
VSS
VSS
VSSD4VSS
VSS
VSS
VSS
U12D
AE24
PART 4 OF 5
PART 4 OF 5
VDD_HT
AD24
VDD_HT
AD22
VDD_HT
AB17
VDD_HT
AE23
VDD_HT
Y17
VDD_HT
W17
VDD_HT
AC18
VDD_HT
AD21
VDD_HT
AC19
VDD_HT
AC20
VDD_HT
AB19
VDD_HT
AD23
VDD_HT
AA17
VDD_HT
AE25
VDD_HT
J14
VDD_18
J15
VDD_18
AE2
VDDA_12
AB3
VDDA_12
U7
VDDA_12
W7
VDDA_12
AB4
VDDA_12
AC3
VDDA_12
AD2
VDDA_12
AE1
VDDA_12
E11
VDDR3
D11
VDDR3
AC12
VDDR
AD12
VDDR
AE12
VDDR
E7
VDD_PLL
F7
VDD_PLL
F9
VSS_PLL
G9
VSS_PLL
D22
VDD_HT_PKG
M1
VDDA_12_PKG
AC11
VDDA_12_PKG
C374
C374
0.1u/16V/6
0.1u/16V/6
AD25
U20
H25
W24
Y22
AC23
D25
G24
AC14
AC22
R23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSC4VSS
GROUND
GROUND
W23
Y25
VSS
VSS
POWER
POWER
P15
R12
R14
R20
VSS
VSS
VSS
VSS
P13
P20
VSS
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDDA_12
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
N14
L24
VSS
VSS
VDDA_12
D1
G7
E2
C1
E3
D2
M9
F4
B1
D3
L9
E6
L11
L13
L15
M12
R15
M14
N11
N13
N15
J11
H11
P12
P14
R11
R13
A19
B19
U11
U14
P17
L17
J19
D20
G20
A9
B9
C9
D9
A7
A4
U12
U15
L23
M11
M20
M23
M25
N12
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C657
C657
C360
C360
0.1u/16V/6
0.1u/16V/6
1u/10Y/6
1u/10Y/6
C259
0.1u/25Y/4
C259
0.1u/25Y/4
C251
0.1u/25Y/4
C251
0.1u/25Y/4
G11
Y23
P11
R24
AE18
M15
J22
G23
J12
L12
L14
L20
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C652
0.1u/16V/6
C652
0.1u/16V/6
C653
0.1u/16V/6
C653
0.1u/16V/6
A25
F11
D23
VSS
VSS
VSS
VSSE9VSS
PAR 5 OF 5
PAR 5 OF 5
CURRENT MEASUREMENT
C651
0.1u/16V/6
C651
0.1u/16V/6
C654
0.1u/16V/6
C654
0.1u/16V/6
10A
VCCA_1V2
C247
10u/10Y/8
C247
10u/10Y/8
C244
X_10u/10Y/8
C244
X_10u/10Y/8
VSSA
VSSA
VSSA
VSSAF3VSSA
VSSA
M3
Y15
AE6
AC9
AC4
AE10
AC10
A A
5
4
VSSA
VSSA
VSSA
Y11
Y12
Y14
AA3
AC2
AD1
AC5
AC6
AC7
AD3
3
VSSAY3VSSAY9VSSA
VSSAR9VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSA
VSSAG6VSSA
VSSA
VSSAP9VSSA
VSSA
VSSAA1VSSAH1VSSAG3VSSAJ2VSSAH3VSSAJ6VSSAF1VSSAL6VSSAM2VSSAM6VSSAJ3VSSAP6VSSAT1VSSAN3VSSAR6VSSAU2VSSAT3VSSAU3VSSAU6VSSAY1VSSAW6VSSA
V12
V11
V14
V15
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
1
of
10 29 Wednesday, July 18, 2007
of
10 29 Wednesday, July 18, 2007
of
10 29 Wednesday, July 18, 2007
5
4
3
2
1
CPU FS1
Hi-Z
X
180.00
220.00
100.00
133.33
200.00
CLK_VDD
C281
10u/10Y/8
C281
10u/10Y/8
SRCCLK
HTT FS0 PCI
[2:1]
Hi-Z Hi-Z 100.00 Reserved
100.00
100.00
100.00
36.56 73.12
66.66 33.33
100.00
66.66 33.33
100.00
100.00
66.66 33.33 Normal HAMMER operation
C272
0.1u/25Y/4
C272
0.1u/25Y/4
C268
0.1u/25Y/4
C268
0.1u/25Y/4
C270
0.1u/25Y/4
C270
0.1u/25Y/4
C334
0.1u/25Y/4
C334
0.1u/25Y/4
L23 X_30L500mAL23 X_30L500mA
CLK_VDD
CP24CP24
CP8CP8
CLK_VDD
Parallel Resonance Crystal
C311
C311
C22P50N
C22P50N
C289
C289
C22P50N
C22P50N
USB
COMMENT
48.00
48.00
48.00
48.00
48.00
48.00
48.00
Reserved
Reserved
Reserved
Reserved
Reserved
X/6 X/3
30.00 60.00
C333
0.1u/25Y/4
C333
0.1u/25Y/4
Y1
Y1
_14.318MHZ16P_D
_14.318MHZ16P_D
1 2
C269
0.1u/25Y/4
C269
0.1u/25Y/4
0.1u/25Y/4
0.1u/25Y/4
C267
0.1u/25Y/4
C267
0.1u/25Y/4
C335
C335
0.1u/25Y/4
0.1u/25Y/4
CLK_VDDA
C271
C271
0.1u/25Y/4
0.1u/25Y/4
R187
R187
X_1M/4
X_1M/4
SCL 6,13,21
SDA 6,13,21
1- PLACE ALL THE SERIES TERMINATION
C297
C297
C295
C4.7U10Y0805
C295
C4.7U10Y0805
RESISTORS AS CLOSE AS U9 AS POSSIBLE
2- ROUTE ALL CPUCLK/#, NBSRCCLK/#, GPPCLK/# AS DIFFERENT PAIR RULE
3- PUT DECOUPLING CAPS CLOSE TO U9
POWER PIN
CLK_VDD
U9
U9
14
VDDSRC
5
CLK_VDD
R253
R253
4.7K/4
4.7K/4
OVERLAP COMMON PADS FOR DUAL-OP
RESISTORS
VDD48
36
VDDSRC
26
VDDSRC
46
VDDCPU
42
VDDA
2
VDDREF
52
VDDHTT
33
VDDATIG
23
VDDSRC
15
GNDSRC
32
GNDATIG
1
GNDREF
50
GNDHTT
8
GND48
37
GNDSRC
27
GNDSRC
22
GNDSRC
41
GNDA
45
GNDCPU
29
CLKREQC#
28
CLKREQB#
49
CLKREQA#
4
X2
3
X1
53
NC
11
RESET_IN#
9
SMBCLK
10
SMBDATA
40
IREF
RTM870T-691-LF
RTM870T-691-LF
CPUCLK8T1
CPUCLK8C1
CPUCLK8T0
CPUCLK8C0
SRCCLKT7
SRCCLKC7
SRCCLKT6
SRCCLKC6
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT2
SRCCLKC2
SCRCLKT0
SRCCLKC0
HTTCLK0
ATIGCLKT1
ATIGCLKC1
ATIGCLKT0
ATIGCLKC0
48MHZ_0
48MHZ_1
FS0/REF0
FS1/REF1
FS2/REF2
44
43
48
47
12
13
16
17
18
19
20
21
24
25
39
38
51
31
30
35
34
6
7
56
55
54
CPUCLK_EXT_R
CPUCLK#_EXT_R
LANCLK0_R
LANCLK0#_R
NBSRCCLK_R
NBSRCCLK#_R
HTREFCLK_R
SBLINKCLK_R
SBLINKCLK#_R
SBSRCCLK_R
SBSRCCLK#_R
SIO_CLK_R
USBCLK_EXT_R
R167 47.5/4 R167 47.5/4
R166 47.5/4 R166 47.5/4
R161 33R/4 R161 33R/4
R159 33R/4 R159 33R/4
R231 33R/4 R231 33R/4
AC97_CLK_R
OSC14M_REFOUT
R148
R148
261/4
261/4
LANCLK0_R
LANCLK0#_R
SBSRCCLK_R
SBSRCCLK#_R
SBLINKCLK_R
SBLINKCLK#_R
NBSRCCLK_R
NBSRCCLK#_R
R151
X_51.1/4
R151
X_51.1/4
R165
10K/4
R165
10K/4
X_C10P50N
X_C10P50N
C257
C257
R149
51.1/4
R149
51.1/4
C249
X_33P/50V/4
C249
X_33P/50V/4
CLK_VDD
R164
10K/4
R164
10K/4
X_C10P50N
X_C10P50N
R197 0/4 R197 0/4
R196 0/4 R196 0/4
R202 0/4 R202 0/4
R201 0/4 R201 0/4
R204 0/4 R204 0/4
R203 0/4 R203 0/4
R190 0/4 R190 0/4
R189 0/4 R189 0/4
C464
10P50N
C464
10P50N
C337
X_33P/50V/4
C337
X_33P/50V/4
R207
10K/4
R207
10K/4
C258
C258
HTREFCLK 9
SIO_CLK 16
USBCLK_EXT 13
R158 33R/4 R158 33R/4
R160 33R/4 R160 33R/4
LANCLK0
LANCLK0#
LANCLK0
LANCLK0#
SIO_CLK_R
CPU_CLK 3
CPU_CLK# 3
LANCLK0 17
LANCLK0# 17
SBSRCCLK 12
SBSRCCLK# 12
SBLINKCLK 9
SBLINKCLK# 9
NBSRCCLK 9
NBSRCCLK# 9
C294 X_C10P50N C294 X_C10P50N
C327 X_C10P50N C327 X_C10P50N
R331 X_10K/4 R331 X_10K/4
CLK FREQ
C248
C248
X_33P/50V/4
X_33P/50V/4
CLK_VDD
C250
C250
X_33P/50V/4
X_33P/50V/4
SB_OSC_14M 13
NB_OSC_14M 9
VCC3
D D
C C
B B
L20
L20
X_30L3A-15_0805
X_30L3A-15_0805
C431
C4.7U10Y0805
C431
C4.7U10Y0805
C348
1u/6.3Y/4
C348
1u/6.3Y/4
CP22CP22
CP14CP14
EXT CLK FREQUENCY SELECT TABLE(MHZ)
FS2
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 1
A A
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
11 29 Wednesday, July 18, 2007
11 29 Wednesday, July 18, 2007
11 29 Wednesday, July 18, 2007
1
5
LPC_AD[3..0] 16
A_RST#
A_RST# 21
R371 X_8.2K/4R371 X_8.2K/4
SBSRCCLK 11
SBSRCCLK# 11
PLACE PCIE CAPS
D D
C C
B B
A A
CLOSE TO U22
VCCA_1V2
L42 28L900m_100_0805L42 28L900m_100_0805
VCCA_1V2
L43 500mALL43 500mAL
PCIE_VDDR
C393
10u/10Y/8
C393
10u/10Y/8
R408
R408
X_20M/6
X_20M/6
PLACE THESE COMPONENTS CLOSE TO U22, AND
USE GROUND GUARD FOR 32K_X1 AND 32K_X2
C437 0.1u/10X/4 C437 0.1u/10X/4
A_RX0P 8
C438 0.1u/10X/4 C438 0.1u/10X/4 R420 22R/4 R420 22R/4
A_RX0N 8
C452 0.1u/10X/4 C452 0.1u/10X/4
A_RX1P 8
C449 0.1u/10X/4 C449 0.1u/10X/4
A_RX1N 8
C450 0.1u/10X/4 C450 0.1u/10X/4
A_RX2P 8
C451 0.1u/10X/4 C451 0.1u/10X/4
A_RX2N 8
C440 0.1u/10X/4 C440 0.1u/10X/4
A_RX3P 8
C439 0.1u/10X/4 C439 0.1u/10X/4
A_RX3N 8
A_TX0P 8
A_TX0N 8
A_TX1P 8
A_TX1N 8
A_TX2P 8
A_TX2N 8
A_TX3P 8
A_TX3N 8
PCIE_VDDR
C442
C442
C453
C453
X_10u/10Y/8
X_10u/10Y/8
1u/6.3Y/4
1u/6.3Y/4
C446
1u/6.3Y/4
C446
1u/6.3Y/4
C448
0.1u/25Y/4
C448
0.1u/25Y/4
X_1u/6.3Y/4
X_1u/6.3Y/4
R406 20M/6 R406 20M/6
Y5
Y5
1 2
32.768KHZ12.5P_D
32.768KHZ12.5P_D
4
3
C541
C541
C527
C527
C18P50N
C18P50N
C18P50N
C18P50N
LDT_PWRGD 3
LDT_STOP# 3,9
CPU_PWR_SB
ALLOW_LDTSTOP 9
LDT_RST# 3
R370 33R/4 R370 33R/4
A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C
R276 562R/1/4 R276 562R/1/4
R293 2.05K/1/4 R293 2.05K/1/4
R322 0/4 R322 0/4
0.1u/25Y/4
0.1u/25Y/4
C433
C433
TP2TP2
LDT_RST#
4
U22A
U22A
SB600 SB 23x23mm
AG10
J24
J25
P29
P28
M29
M28
K29
K28
H29
H28
T25
T26
T22
T23
M25
M26
M22
M23
E29
E28
E27
U29
U28
F27
F28
F29
G26
G27
G28
G29
J27
J29
L25
L26
L29
N29
C441
X_1u/6.3Y/4
C441
X_1u/6.3Y/4
C447
C447
32K_X1
D2
32K_X2
C1
AC26
W26
W24
W25
AA24
AA23
AA22
R326
R326
AA26
Y27
AA25
10K/4
10K/4
AH9
B24
W23
AC25
SB600 SB 23x23mm
A_RST#
PCIE_RCLKP
PCIE_RCLKN
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_CALRP
PCIE_CALRN
PCIE_CALI
PCIE_PVDD
PCIE_PVSS
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
X1
X2
CPU_PG/LDT_PG
INTR/LINT0
NMI/LINT1
INIT#
SMI#
SLP#/LDT_STP#
IGNNE#/SIC
A20M#/SID
FERR#
STPCLK#/ALLOW_LDTSTP
CPU_STP#/DPSLP_3V#
DPSLP_OD#/GPIO37
DPRSLPVR
LDT_RST#/DPRSTP#/PROCHOT#
ATI-SB600-218S6ECLA13FG-A13-RH
ATI-SB600-218S6ECLA13FG-A13-RH
XTAL
XTAL
Part 1 of 4
Part 1 of 4
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
SPDIF_OUT/PCICLK7/GPIO41
PCI INTERFACE
PCI INTERFACE
LPC
LPC
LDRQ1#/GNT5#/GPIO68
CPU
CPU
BMREQ#/REQ5#/GPIO65
RTC
RTC
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCI CLKS
PCI CLKS
PCICLK6
PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
LFRAME#
LDRQ0#
SERIRQ
RTCCLK
RTC_IRQ#/GPIO69
VBAT
RTC_GND
3
U2
T2
U1
V2
W3
U3
V1
T1
R504 X_8.2K/4R504 X_8.2K/4
AJ9
W7
Y1
W8
W5
AA5
Y3
AA6
AC5
AA7
AC3
AC7
AJ7
AD4
AB11
AE6
AC9
AA3
AJ4
AB1
AH4
AB2
AJ3
AB3
AH3
AC1
AD24
AH2
AD25
AC2
AD26
AH1
AD27
AD2
AD28
AG2
AD29
AD1
AD30
AG1
AD31
AB9
AF9
AJ5
AG3
AA2
AH6
AG5
AA1
AF7
Y2
AG8
AC11
AJ8
AE2
AG9
AH8
AH5
AD11
AF2
AH7
AB12
AG4
AG7
AF6
AD3
AF1
AF4
AF3
AG24
LAD0
AG25
LAD1
AH24
LAD2
AH25
LAD3
AF24
AJ24
AH26
W22
AF23
D3
F5
E1
D1
VBAT_IN
TP25TP25
C458
C458
1u/6.3Y/4
1u/6.3Y/4
PCI_CLK0 15
PCI_CLK1 15
PCI_CLK4 15
PCI_CLK6 15,16
C478
C478
X_10P50N
X_10P50N
LPC_AD0 16
LPC_AD1 16
LPC_AD2 16
LPC_AD3 16
LPC_FRAME# 16
LPC_DRQ#0 16
SERIRQ 16
RTC_CLK 15
AUTO_ON# 15
R335 510R/4 R335 510R/4
C581
C581
0.1u/16Y/4
0.1u/16Y/4
2
VBAT
D19
D19
S-BAT54C_SOT23
S-BAT54C_SOT23
3
JBAT1
JBAT1
N31-1030151-H06+N33-1020271-H06
N31-1030151-H06+N33-1020271-H06
1
2
G
G
3
20mil
1
1
3VDUAL
2
R336
R336
1KR1%0402
1KR1%0402
1 2
VBAT1
VBAT1
BAT-2P_SO41
BAT-2P_SO41
Normal --> 1-2
Clear CMOS -->2-3
5
4
3
2
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
of
12 29 Wednesday, July 18, 2007
of
12 29 Wednesday, July 18, 2007
of
12 29 Wednesday, July 18, 2007
5
SLP_S3# 16,21
SLP_S5# 21
PWRBTIN 16
R393
R393
X_10K/4
X_10K/4
NB_PWRGD 9,21
LPC_PME# 16
FP_RST# 21,23
PCIE_WAKE_UP# 17
CPU_THRIP# 3
RSMRST# 21
SB_OSC_14M 11
USB_OCP#2 19
USB_OCP#1 19
D D
C C
B B
R354 10K/4 R354 10K/4
R362 10K/4 R362 10K/4
R353 10K/4 R353 10K/4
3VDUAL
R244 4.7K/4 R244 4.7K/4
VCC3
R314 2.2K/4 R314 2.2K/4
R288 2.2K/4 R288 2.2K/4
3VDUAL
R392 2.2K/4 R392 2.2K/4
R404 2.2K/4 R404 2.2K/4
Note: The SMBUS1 was implemented for connecting to the
ASF devices only and has not been qualified with any other
devices. Therefore only ASF devices should be connected
to this interface. All other devices that require SMBUS
support should be connected to the SMBUS0 interface as
shown in the AMD Reference schematics and Schematic
check lists
SB_TEST0
SB_TEST1
SB_TEST2
SCL
SDA
SB600_SCL1
SB600_SDA1
AZ_BIT_CLK 18
AZ_SDATA_OUT 18
ACZ_SDATA_IN3 18
AZ_SYNC 18
AZ_RST# 18
A20GATE 16
KBRST# 16
SPKR 23
SCL 6,11,21
SDA 6,11,21
PD_DET 22
R425 33R/4 R425 33R/4
R432 33R/4 R432 33R/4
R439 33R/4 R439 33R/4
R456 33R/4 R456 33R/4
R405 33R/4 R405 33R/4
C570
C570
33P/50V/4
33P/50V/4
4
SB_TEST2
SB_TEST1
SB_TEST0
A20GATE
KBRST#
LPC_PME#
CPU_THRIP# CPU_THRIP#
RSMRST#
SB600_SCL1
SB600_SDA1
AZ_BIT_CLK_R
AZ_SDATA_OUT_R
AZ_SDATA_IN3_R
SB600_AZ_RST#
U22D
U22D
A3
PCI_PME#/GEVENT4#
B2
RI#/EXTEVNT0#
F7
SLP_S3#
A5
SLP_S5#
E3
PWR_BTN#
B5
PWR_GOOD
B3
SUS_STAT#
F9
TEST2
E9
TEST1
G9
TEST0
AF26
GA20IN
AG26
KBRST#
D7
LPC_PME#/GEVENT3#
C25
LPC_SMI#/EXTEVNT1#
D9
S3_STATE/GEVENT5#
F4
SYS_RESET#/GPM7#
E7
WAKE#/GEVENT8#
C2
BLINK/GPM6#
G7
SMBALERT#/THRMTRIP#/GEVENT2#
E2
RSMRST#
B23
14M_OSC
C28
SATA_IS0#/GPIO10
A26
ROM_CS#/GPIO1
B29
GHI#/SATA_IS1#/GPIO6
A23
WD_PWRGD/GPIO7
B27
SMARTVOLT/SATA_IS2#/GPIO4
D23
SHUTDOWN#/GPIO5
B26
SPKR/GPIO2
C27
SCL0/GPOC0#
B28
SDA0/GPOC1#
C3
SCL1/GPOC2#
F3
SDA1/GPOC3#
D26
DDC1_SCL/GPIO9
C26
DDC1_SDA/GPIO8
A27
SSMUXSEL/SATA_IS3#/GPIO0
A4
LLB#/GPIO66
C6
USB_OC9#/SLP_S2/GPM9#
C5
USB_OC8#/AZ_DOCK_RST#/GPM8#
C4
USB_OC7#/GEVENT7#
B4
USB_OC6#/GEVENT6#
B6
USB_OC5#/DDR3_RST#/GPM5#
A6
USB_OC4#/GPM4#
C8
USB_OC3#/GPM3#
C7
USB_OC2#/GPM2#
B8
USB_OC1#/GPM1#
A8
USB_OC0#/GPM0#
N2
AZ_BITCLK
M2
AZ_SDOUT
K2
AZ_SDIN3/GPIO46
L3
AZ_SYNC
K3
AZ_RST#
L1
AC_BITCLK/GPIO38
L2
AC_SDOUT/GPIO39
L4
ACZ_SDIN0/GPIO42
J2
ACZ_SDIN1/GPIO43
J4
ACZ_SDIN2/GPIO44
M3
AC_SYNC/GPIO40
L5
AC_RST#/GPIO45
E23
NC1
AC21
NC2
AD7
NC3
AE7
NC4
AA4
NC5
T4
NC6
D4
NC7
AB19
NC8
ATI-SB600-218S6ECLA13FG-A13-RH
ATI-SB600-218S6ECLA13FG-A13-RH
3
SB600 SB 23x23mm
SB600 SB 23x23mm
ACPI / WAKE UP EVENTS
ACPI / WAKE UP EVENTS
OSC / RST
OSC / RST
GPIO
GPIO
USB OC
USB OC
AC97 AZALIA
AC97 AZALIA
USB INTERFACE
USB INTERFACE
USB PWR
USB PWR
Part 4 of 4
Part 4 of 4
USBCLK
USB_RCOMP
USB_ATEST1
USB_ATEST0
USB_HSDP9+
USB_HSDM9-
USB_HSDP8+
USB_HSDM8-
USB_HSDP7+
USB_HSDM7-
USB_HSDP6+
USB_HSDM6-
USB_HSDP5+
USB_HSDM5-
USB_HSDP4+
USB_HSDM4-
USB_HSDP3+
USB_HSDM3-
USB_HSDP2+
USB_HSDM2-
USB_HSDP1+
USB_HSDM1-
USB_HSDP0+
USB_HSDM0-
AVDDTX
AVDDTX
AVDDTX
AVDDTX
AVDDTX
AVDDRX
AVDDRX
AVDDRX
AVDDRX
AVDDRX
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVSS_USB
AVDDC
AVSSC
2
A17
USB_RCOMP
A14
A11
A10
H12
G12
E12
D12
E14
D14
G14
H14
D16
E16
D18
E18
G16
H16
G18
H18
D19
E19
G19
H19
B9
B11
B13
B16
B18
A9
B10
B12
B14
B17
A12
A13
A16
C9
C10
C11
C12
C13
C14
C16
C17
C18
C19
C20
D11
D21
E11
E21
F11
F12
F14
F16
F18
F19
F21
G11
G21
H11
H21
J11
J12
J14
J16
J18
J19
R350 11.8K/4 R350 11.8K/4
C486
X_0.1u/16Y/4
C486
X_0.1u/16Y/4
C497
C497
0.1u/16Y/4
0.1u/16Y/4
USBCLK_EXT 11
USBP8 19
USBN8 19
USBP7 19
USBN7 19
USBP3 19
USBN3 19
USBP2 19
USBN2 19
USBP1 19
USBN1 19
USBP0 19
USBN0 19
C505
1u/6.3Y/4
C505
1u/6.3Y/4
C477
1u/6.3Y/4
C477
1u/6.3Y/4
+3.3V_AVDDC 3VDUAL
L28 0R/6L28 0R/6
C491
C491
X_1u/6.3Y/4
X_1u/6.3Y/4
AVDD_USB 3VDUAL
C476
1u/6.3Y/4
C476
1u/6.3Y/4
C483
10u/10Y/8
C483
10u/10Y/8
C480
10u/10Y/8
C480
10u/10Y/8
L48
L48
28L900m_100_0805
28L900m_100_0805
R289 0/6 R289 0/6
1
A A
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
13 29 Wednesday, July 18, 2007
of
13 29 Wednesday, July 18, 2007
of
13 29 Wednesday, July 18, 2007
5
PDD[15..0] 22
PLACE SATA AC COUPLING
CAPS CLOSE TO SB600
SATA_TX0+_C
SATA_TX0+_C 22
R334 10M/6 R334 10M/6
Y3
1 2
25MHZY325MHZ
C462
C462
10P50N
10P50N
SATA_TX0-_C 22
SATA_RX0-_C 22
SATA_RX0+_C 22
SATA_TX1+_C 22
SATA_TX1-_C 22
SATA_RX1-_C 22
SATA_RX1+_C 22
SATA_ACT# 23
SATA_X1
SATA_X2
C457
C457
10P50N
10P50N
D D
C C
SATA_TX0-_C
SATA_RX0-_C
SATA_RX0+_C
SATA_TX1+_C
SATA_TX1-_C
SATA_RX1-_C
SATA_RX1+_C
Place R364 Close To U22 Ball
R364 is 1K 1% For Crystal
R364 is 4.99K 1% FOR Internal Clock.
R364 1KR1%0402 R364 1KR1%0402
R516 2.2K/4 R516 2.2K/4
VCC3
C500 103P/16V/4 C500 103P/16V/4
C501 103P/16V/4 C501 103P/16V/4
C481 103P/16V/4 C481 103P/16V/4
C482 103P/16V/4 C482 103P/16V/4
C506 103P/16V/4 C506 103P/16V/4
C503 103P/16V/4 C503 103P/16V/4
C493 103P/16V/4 C493 103P/16V/4
C489 103P/16V/4 C489 103P/16V/4
Fo = 25.0 MHz +/- 30 PPM, CL = 20pf Max.
VCCA_1V2
B B
VCC3 XTLVDD_SATA
VCCA_1V2
L53
L53
500mAL
500mAL
L50
L50
500mAL
500mAL
L44
L44
28L900m_100_0805
28L900m_100_0805
PLLVDD_SATA
C504
C504
1u/6.3Y/4
1u/6.3Y/4
C490
C490
1u/6.3Y/4
1u/6.3Y/4
C454
10U/0805
C454
10U/0805
C468
X_0.1u/16Y/4
C468
X_0.1u/16Y/4
C465
0.1u/16Y/4
C465
0.1u/16Y/4
PLLVDD_SATA
XTLVDD_SATA
AVDD_SATA
AVDD_SATA
C660
1u/10Y/6
C660
1u/10Y/6
SATA_CAL
SATA_X1
SATA_X2
C663
1u/10Y/6
C663
1u/10Y/6
4
SATA_TX0+
SATA_TX0-
SATA_RX0SATA_RX0+
SATA_TX1+
SATA_TX1-
SATA_RX1SATA_RX1+
U22B
U22B
AH21
SATA_TX0+
AJ21
SATA_TX0-
AH20
SATA_RX0-
AJ20
SATA_RX0+
AH18
SATA_TX1+
AJ18
SATA_TX1-
AH17
SATA_RX1-
AJ17
SATA_RX1+
AH13
SATA_TX2+
AH14
SATA_TX2-
AH16
SATA_RX2-
AJ16
SATA_RX2+
AJ11
SATA_TX3+
AH11
SATA_TX3-
AH12
SATA_RX3-
AJ13
SATA_RX3+
AF12
SATA_CAL
AD16
SATA_X1
AD18
SATA_X2
AC12
SATA_ACT#/GPIO67
AD14
PLLVDD_SATA
AJ10
PLLVDD_SATA
AC16
XTLVDD_SATA
AE14
AVDD_SATA
AE16
AVDD_SATA
AE18
AVDD_SATA
AE19
AVDD_SATA
AF19
AVDD_SATA
AF21
AVDD_SATA
AG22
AVDD_SATA
AG23
AVDD_SATA
AH22
AVDD_SATA
AH23
AVDD_SATA
AJ12
AVDD_SATA
AJ14
AVDD_SATA
AJ19
AVDD_SATA
AJ22
AVDD_SATA
AJ23
AVDD_SATA
AB14
AVSS_SATA
AB16
AVSS_SATA
AB18
AVSS_SATA
AC14
AVSS_SATA
AC18
AVSS_SATA
AC19
AVSS_SATA
AD12
AVSS_SATA
AD19
AVSS_SATA
AD21
AVSS_SATA
AE12
AVSS_SATA
AE21
AVSS_SATA
AF11
AVSS_SATA
AF14
AVSS_SATA
AF16
AVSS_SATA
AF18
AVSS_SATA
AG11
AVSS_SATA
AG12
AVSS_SATA
AG13
AVSS_SATA
AG14
AVSS_SATA
AG16
AVSS_SATA
AG17
AVSS_SATA
AG18
AVSS_SATA
AG19
AVSS_SATA
AG20
AVSS_SATA
AG21
AVSS_SATA
AH10
AVSS_SATA
AH19
AVSS_SATA
ATI-SB600-218S6ECLA13FG-A13-RH
ATI-SB600-218S6ECLA13FG-A13-RH
3
SB600 SB 23x23mm
SB600 SB 23x23mm
Part 2 of 4
Part 2 of 4
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
ATA 66/100
ATA 66/100
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32
LAN_RST#/GPIO13
SPI ROM HW MONITOR
SPI ROM HW MONITOR
ROM_RST#/GPIO14
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
SERIAL ATA POWER SERIAL ATA
SERIAL ATA POWER SERIAL ATA
IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#
TEMP_COMM
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
AVDD
AVSS
AB29
AA28
AA29
AB27
Y28
AB28
AC27
AC29
AC28
W28
W27
AD28
AD26
AE29
AF27
AG29
AH28
AJ28
AJ27
AH27
AG27
AG28
AF28
AF29
AE28
AD25
AD29
J3
J6
G3
G2
G6
C23
G5
M4
T3
V4
N3
P2
W4
P5
P7
P8
T8
T7
V5
L7
M8
V6
M6
P4
M7
V7
N1
M1
PDA_R0
PDA_R1
PDA_R2
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SPI_DATAIN
SPI_DATAOUT
SPI_CLK
SPI_CS#
AVDD_HWM
C469
C469
X_0.1u/16Y/4
X_0.1u/16Y/4
R538 X_0/4 R538 X_0/4
500mAL
500mAL
C529
C529
1u/10Y/6
1u/10Y/6
PD_IORDY 22
PD_SIRQ 22
PDA_R0 22
PDA_R1 22
PDA_R2 22
PD_DACK# 22
PD_DREQ 22
PD_IOR# 22
PD_IOW# 22
PD_CS#1 22
PD_CS#3 22
SPI_HOLD#
VCC3
L54
L54
2
For SB600 SPI Flash memory
R444
R444
1KR1%0402
1KR1%0402
SPI_CS#
SPI Debug Port
SPI_DATAIN SPI_DATAOUT
SPI_CS#
SPI_HOLD#
1
3VDUAL
R278
R278
10K/4
10K/4
U17
U17
1
CE#
2
SO
3
W#
4
GND
S25FL004A0LMFI001-RH
S25FL004A0LMFI001-RH
SST SPI ROM
3VDUAL
1 2
3 4
5
7 8
9
VCC
HOLD#
SCK
JSPI1
JSPI1
H2X5(10)_black-RH
H2X5(10)_black-RH
R318
R318
10K/4
10K/4
8
SPI_HOLD# SPI_DATAIN
7
SPI_CLK
6
SPI_DATAOUT
5
SI
C546
C546
0.1u/25Y/4
0.1u/25Y/4
SPI_CLK
6
Place close to SPI ROM
A A
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
14 29 Wednesday, July 18, 2007
of
14 29 Wednesday, July 18, 2007
of
14 29 Wednesday, July 18, 2007
5
VCC3
EC37
1000U/6.3V+EC37
1000U/6.3V
C658
1u/10Y/6
C658
1u/10Y/6
C666
1u/10Y/6
C666
VCCA_1V2
C392
10u/10Y/8
C392
10u/10Y/8
C554
10u/10Y/8
C554
10u/10Y/8
C561
0.1u/16Y/4
C561
0.1u/16Y/4
C471
0.1u/16Y/4
C471
0.1u/16Y/4
+1.8V_S0 CPU_PWR_SB
1u/10Y/6
C661
1u/10Y/6
C661
1u/10Y/6
C555
0.1u/16Y/4
C555
0.1u/16Y/4
C562
X_0.1u/16Y/4
C562
X_0.1u/16Y/4
C659
0.1u/16V/6
C659
0.1u/16V/6
VCC3
VCCA_1V2
CP40CP40
1 2
+
D D
C C
3VDUAL
USB_PHY
USB_PHY
B B
R384 1KR0402 R384 1KR0402
VCC5
D20
D20
BAT54A-S-SOT23
BAT54A-S-SOT23
3
VCC3
A A
C470
X_0.1u/16Y/4
C470
X_0.1u/16Y/4
C474
10u/10Y/8
C474
10u/10Y/8
1
V5_VREF
2
C515
C515
X_1u/6.3Y/4
X_1u/6.3Y/4
C556
0.1u/16Y/4
C556
0.1u/16Y/4
C388
1u/6.3Y/4
C388
1u/6.3Y/4
C665
0.1u/16V/6
C665
0.1u/16V/6
C548
X_0.1u/16Y/4
C548
X_0.1u/16Y/4
L46 500mALL46 500mAL
L47 500mALL47 500mAL
C557
0.1u/16Y/4
C557
0.1u/16Y/4
C662
1u/10Y/6
C662
1u/10Y/6
C667
0.1u/16V/6
C667
0.1u/16V/6
CPU_PWR_SB
C445
0.1u/16Y/4
C445
0.1u/16Y/4
4
U22C
U22C
SB600 SB 23x23mm
SB600 SB 23x23mm
A25
VDDQ
V5_VREF
C461
1u/6.3Y/4
C461
1u/6.3Y/4
A28
VDDQ
C29
VDDQ
D24
VDDQ
L9
VDDQ
L21
VDDQ
M5
VDDQ
P3
VDDQ
P9
VDDQ
T5
VDDQ
V9
VDDQ
W2
VDDQ
W6
VDDQ
W21
VDDQ
W29
VDDQ
AA12
VDDQ
AA16
VDDQ
AA19
VDDQ
AC4
VDDQ
AC23
VDDQ
AD27
VDDQ
AE1
VDDQ
AE9
VDDQ
AE23
VDDQ
AH29
VDDQ
AJ2
VDDQ
AJ6
VDDQ
AJ26
VDDQ
M13
VDD
M17
VDD
N12
VDD
N15
VDD
N18
VDD
R13
VDD
R17
VDD
U12
VDD
U15
VDD
U18
VDD
V13
VDD
V17
VDD
A2
S5_3.3V
A7
S5_3.3V
F1
S5_3.3V
J5
S5_3.3V
J7
S5_3.3V
K1
S5_3.3V
G4
S5_1.2V
H1
S5_1.2V
H2
S5_1.2V
H3
S5_1.2V
A18
USB_PHY_1.2V
A19
USB_PHY_1.2V
B19
USB_PHY_1.2V
B20
USB_PHY_1.2V
B21
USB_PHY_1.2V
AA27
CPU_PWR
AE11
V5_VREF
A24
AVDDCK_3.3V
A22
AVDDCK_1.2V
B22
AVSSCK
V29
PCIE_VSS
V28
PCIE_VSS
V27
PCIE_VSS
V26
PCIE_VSS
V25
PCIE_VSS
V24
PCIE_VSS
V23
PCIE_VSS
V22
PCIE_VSS
U27
PCIE_VSS
T29
PCIE_VSS
T28
PCIE_VSS
T27
PCIE_VSS
T24
PCIE_VSS
T21
PCIE_VSS
P27
PCIE_VSS
ATI-SB600-218S6ECLA13FG-A13-RH
ATI-SB600-218S6ECLA13FG-A13-RH
Part 3 of 4
Part 3 of 4
C572
0.1u/16Y/4
C572
0.1u/16Y/4
C664
1u/10Y/6
C664
1u/10Y/6
C466
1u/6.3Y/4
C466
1u/6.3Y/4
POWER
POWER
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
3
A1
Note
A20
VSS
A21
VSS
A29
VSS
B1
VSS
B7
VSS
B25
VSS
C21
VSS
C22
VSS
C24
VSS
D6
VSS
E24
VSS
F2
VSS
F23
VSS
G1
VSS
J1
VSS
J8
VSS
L6
VSS
L8
VSS
M9
VSS
M12
VSS
M15
VSS
M18
VSS
N13
VSS
N17
VSS
P1
VSS
P6
VSS
P21
VSS
R12
VSS
R15
VSS
R18
VSS
T6
VSS
T9
VSS
U13
VSS
U17
VSS
V3
VSS
V8
VSS
V12
VSS
V15
VSS
V18
VSS
V21
VSS
W1
VSS
W9
VSS
Y29
VSS
AA11
VSS
AA14
VSS
AA18
VSS
AC6
VSS
AC24
VSS
AD9
VSS
AD23
VSS
AE3
VSS
AE27
VSS
AG6
VSS
AJ1
VSS
AJ25
VSS
AJ29
VSS
D27
D28
D29
F26
G23
G24
G25
H27
J23
J26
J28
K27
L22
L23
L24
L27
L28
M21
M24
M27
N27
N28
P22
P23
P24
P25
P26
REQUIRED STRAPS
PULL
HIGH
PULL
LOW
PCI_CLK4 12
PCI_CLK6 12,16
PCI_CLK0 12
PCI_CLK1 12
AUTO_ON# 12
2
1
SB600
ROM TYPE:
H, H = PCI ROM
H, L = SPI ROM
L, H = LPC ROM
L, L = FWH ROM
ROM Type
FWH
LPC ROM
SPI ROM
PCI ROM
PCI_CLK1 PCI_CLK0
DEFAULT
AC_SDOUT
RTC_CLK
PCI_CLK4 PCI_CLK6
CPU IF=K8
INTERNAL
RTC
DEFAULT
EXTERNAL
RTC
USE INT.
PLL48
DEFAULT
CPU IF=P4
USE EXT.
48MHZ
DEFAULT
3VDUAL
SB600 15K PU For RTC_CLK, External PU/PD
Is Not Required.
48Mhz Strap
H = USE Internal PLL 48Mhz
L= USE External 48Mhz Clock
VCC3
CPU Vender
H=AMD
L=Intel
VCC3
PCI_CLK0 PCI_CLK1
LL
H
L
H
L
HH
3VDUAL
NOTE: R386 PU Resister For RTC_IRQ# is Required
For SB600 TO Keep The Input From Floating.
USE
DEBUG
STRAPS
IGNORE
DEBUG
STRAPS
DEFAULT
RTC_CLK 12
R388 X_10K/4 R388 X_10K/4
R433 10K/4 R433 10K/4
R428 10K/4 R428 10K/4
R472 10K/4 R472 10K/4
R436 10K/4 R436 10K/4
R386 10K/4 R386 10K/4
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
15 29 Wednesday, July 18, 2007
of
15 29 Wednesday, July 18, 2007
of
15 29 Wednesday, July 18, 2007
5
LPC_AD[3..0] 12
PCI_RST1# 9,21
LPC_DRQ#0 12
SERIRQ 12
LPC_FRAME# 12
PCI_CLK6 12,15
SIO_CLK 11
D D
R28 4.7K/4 R28 4.7K/4
C C
B B
VCC3
CPU-FAN 22
CPU-FANPWM 22
SYS-FAN 22
THERMDA_CPU CPU_TMP
LPC_PME# 13
ATX_PWROK 21,23
VCC5_SB
R58 100/4/1R58 100/4/1
PWRBTIN 13
SLP_S3# 13,21
PS_ON# 21
R32 4.7K/4 R32 4.7K/4
R34 4.7K/4 R34 4.7K/4
R36 4.7K/4 R36 4.7K/4
PSIN 23
3VDUAL
R527 0/4 R527 0/4
PCI_RST1#
LPC_DRQ#0
SERIRQ
LPC_FRAME#
PCI_CLK6
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
5VIN
+12_VIN
CPUVCORE
CPU-FANPWM
SYS_TMP
CPU_TMP_2
TMP_VREF
BEEP
RSMTST_IO
CHASSIS
LPC SUPER I/O F71882 SERIAL PORT 1
U4
29
LRESET#
30
LDRQ#
31
SERIRQ
32
LFRAM#
38
PCICLK
39
CLKIN
33
LAD0
34
LAD1
35
LAD2
36
LAD3
47
VIDIN5/OUT5/SID
46
VIDIN4/OUT4
45
VIDIN3/OUT3
44
VIDIN2/OUT2
43
VIDIN1/OUT1
42
VIDIN0/OUT0
54
VIDOUT5/GPIO5/SIC
53
VIDOUT0/GPIO4
52
VIDOUT0/GPIO3
51
VIDOUT0/GPIO2
50
VIDOUT0/GPIO1
49
VIDOUT0/GPIO0
55
SLOTOCC#/GPIO06
56
GPIO07/Turbo1#/WDTRST#
57
VSI/SST
58
VSO
93
VIN6
94
VIN5
95
VIN4
96
VIN3
97
VIN2
98
Vcore(VIN1)
21
FANIN1
22
FAN_CTL1
23
FANIN2
24
FAN_CTL2
25
FANIN3/GPIO40
26
FAN_CTL3*/GPIO41
89
D3+ (System)
90
D2+
91
D1+(CPU)
92
VREF
79
PME#/GPIO25
59
GPIO10/SPI_SLK/ FANIN4
60
GPIO11/SPI_CS0#/FANCTL4
61
GPIO12/SPI_MISO/FANCTL1_1
62
PIO13/SPI_MOSI/BEEP
63
GPIO14/FWH_DIS/WDTRST#/SPI_CS1#
67
OVT#
64
GPIO15/LED_VSB/ALERT#
65
GPIO16/LED_VCC/Turbo2#
74
PCIRST1#/GPIO20
75
PCIRST2#/GPIO21
76
PCIRST3#/GPIO22
77
GPIO23/RSTCON#
78
ATXPG_IN/GPIO24
84
PWROK/GPIO32
80
PWSIN#/GPIO26
81
PWSOUT#/GPIO27
82
S3#/GPIO30
83
PSON# /GPIO31
85
RSMRST# /GPIO33
87
COPEN#
LPC I/O STRAPPING RESISTOR
R61
R61
RTSA#
1KR1%0402
1KR1%0402
RTSB#
PWM FAN LINEAR FAN
RTSA#
PIN49-54=VID_OUT
SOUTA
PIN42-47=VIDIN
4E 2E
A A
DTRA# FAN START DUTY 60%
5
STUFF Don't STUFF
PIN49-54=GPIO
PIN42-47=VIDIN/OUT
FAN START DUTY 100%
4
DENSEL#
INDEX#
MOA#
DRVA#
STEP#
WDATA#
WGATE#
TRK0#
WPT#
RDATA#
HDSEL#
DSKCHG#
SLCT
BUSY
ACK#
SLIN#
ERR#
AFD#
IRTX/GPIO42
IRRX/GPIO43
DCD1#
CTS1#
DTR1#/FAN60_100
RTS1#/VIDOUT_TRAP
DSR1#
SOUT1/Config4E_2E
DCD2
CTS2#
DTR2#/FWH_TRAP
RTS2#/HPWM_DC
DSR2#
SOUT2/SPI_TRAP
GPIO17
KBRST#
GA20
KDATA
KCLK
MDAT
MCLK
VBAT
AGND(D-)
F71882U4F71882
CP19CP19
R64 47K/4/1% R64 47K/4/1%
R77 20K/4/1 R77 20K/4/1
BEEP
VCC3
4
DIR#
PE
INIT#
STB#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RI1#
SIN1
RI2#
SIN2
VSB
VCC
VCC
VCC
GND
GND
GND
GND
CPUVCORE
5VIN
+12_VIN
R27 4.7K/4 R27 4.7K/4
BEEP
7
17
8
9
11
12
10
14
16
18
15
13
19
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
27
28
118
119
120
121
122
123
124
125
126
127
128
1
2
3
5
6
66
40
41
69
70
71
72
68
86
4
37
99
20
48
73
117
88
DCDA#
RIA#
CTSA#
DTRA#
RTSA#
DSRA#
SOUTA
SINA
0.1u/25Y/4
0.1u/25Y/4
C46
C46
X__2200P50X4
X__2200P50X4
THERMDA_CPU
R65 10K/4 R65 10K/4
R70 200K/4/1% R70 200K/4/1%
R74 200K/4/1% R74 200K/4/1%
B
KBRST# 13
A20GATE 13
KBDATA 23
KBCLK 23
MSDATA 23
MSCLK 23
C315
C315
C52
0.1u/25Y/4
C52
0.1u/25Y/4
THERMDC_CPU 3
ALARM 23
C E
Q4
Q4
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
3VDUAL
VBAT
VCC3
THERMDA_CPU 3
VCCP
VCC5
+12V
3
C320 X_0.1u/16Y/4 C320 X_0.1u/16Y/4
VCC5
NDCDA#
NRIA
NCTSA#
NDSRA#
NSINA
DTRA#
RTSA#
SOUTA
Thermal Resistor
TMP_VREF
R51
R51
10K/4
10K/4
SYS_TMP
RT3
RT3
YT103S-1N
YT103S-1N
THERMDC_CPU
3
U10
U10
20
VCC
2
RA1
3
RA2
4
RA3
7
RA4
9
RA5
16
DA1
15
DA2
13
DA3
11
GND
75232S-SSOP20
75232S-SSOP20
TMP_VREF
R50
R50
10K/4
10K/4
CPU_TMP_2
RTC
RTC
YT103S-1N
YT103S-1N
THERMDC_CPU
2
CN6
CN6
220p/8P4C/6/N
C324 0.1u/25Y/4 C324 0.1u/25Y/4
U5_1
1
VDD
DCDA#
19
RY1
RIA#
18
RY2
CTSA#
17
RY3
DSRA#
14
RY4
SINA
12
RY5
NDTRA
5
DY1
NRTSA
6
DY2
NSOUTA
8
DY3
U5_10
10
VSS
C300 0.1u/25Y/4 C300 0.1u/25Y/4
D18
D18
1N4148W
1N4148W
D30
D30
1N4148W
1N4148W
+12V
-12V
NSINA
NSOUTA
NDSRA#
NRTSA
NDTRA
NCTSA#
NRIA
NDCDA#
220p/8P4C/6/N
7
5
3
1
CN5
CN5
220p/8P4C/6/N
220p/8P4C/6/N
7
5
3
1
8
6
4
2
8
6
4
2
Chasiss Intrusion VOLTAGE SENSING
VBAT
R752MR75
2M
JCI1
JCI1
CHASSIS
1
2
D1x2-BK
D1x2-BK
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
NDCDA#
NSOUTA
NRTSA
NRIA
1
JCOM1
JCOM1
NSINA
1 2
NDTRA
3 4
NDSRA#
6
5
NCTSA#
7 8
9 10
CON5x2-white
CON5x2-white
VBAT VCC3 VCC3 VCC3
C33
0.1u/25Y/4
C33
0.1u/25Y/4
C54
X_100P/NPO
C54
X_100P/NPO
16 29 Wednesday, July 18, 2007
16 29 Wednesday, July 18, 2007
16 29 Wednesday, July 18, 2007
1
C21
0.1u/25Y/4
C21
0.1u/25Y/4
C20
0.1u/25Y/4
C20
0.1u/25Y/4
of
of
of
5
Y2
25MHZY225MHZ
D D
C C
B B
1 2
C459
C459
C455
C455
27p
27p
27p
27p
AVDD33 VL1_8
AVDD18
C610
C610
0.1u/25Y/4
0.1u/25Y/4
AVDD18
PCIE_WAKE_UP# 13
PCI_E_RST# 21
R131 2KR1%0402 R131 2KR1%0402
MDI_0+
MDI_0-
MDI_1+
MDI_1-
EVDD18
XTAL1
XTAL2
RSET_LAN
U20
U20
1
VCTRL18
2
AVDD33
3
MDIP0
4
MDIN0
5
AVDD18
6
MDIP1
7
MDIN1
8
AVDD18
9
NC4
10
NC5
11
NC6
12
NC7
13
NC8
14
NC9
15
VDD15
16
VDD33
65
GND
62
59
63
64
60
NC18
RSET
CKTAL261CKTAL1
VCTRL15
NC117NC218LANWAKEB19PERSTB20VDD1521EVDD1822HSIP23HSIN24EGND25REFCLK_P26REFCLK_N27EVDD1828HSOP29HSON30EGND31NC3
NC19
58
VDD15
54
LED057LED156LED255LED3
53
VDD33
4
50
NC2052NC2151NC22
EEDI/AUX
ISOLATEB
49
32
VDD15
VDD33
EEDO
EECS
VDD15
VDD33
LAN_LINK_UP
LINK_100_C
VDD33
DVDD15
EESK
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
EGND
HSON
HSOP
LANCLK0#
LANCLK0
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
RTL8101E
RTL8101E
CP4CP4
R357 X_0/6 R357 X_0/6
C394 0.1u/16Y/4 C394 0.1u/16Y/4
C391 0.1u/16Y/4 C391 0.1u/16Y/4
VDD33
DVDD15
EESK
EEDI
EEDO
EECS
ISOLATEB
VCC3
R298
R298
1KR1%0402
1KR1%0402
R299
R299
15K/4
15K/4
RX_LANN0 8
RX_LANP0 8
LANCLK0# 11
LANCLK0 11
TXLANN 8
TXLANP 8
3
VDD33
AVDD18
R133
0/4
R133
0/4
C217
C4.7U10Y0805
C217
C4.7U10Y0805
R127
0/4
R127
0/4
C619
C1000P50X0402
C619
C1000P50X0402
C214
C1000P50X0402
C214
C1000P50X0402
VDD33
R366
R366
X_10K/4
X_10K/4
R307 49.9/4 R307 49.9/4
R303 49.9/4 R303 49.9/4
R304 49.9/4 R304 49.9/4
R305 49.9/4 R305 49.9/4
R356
R356
3.6KST
3.6KST
U26
U26
1
2
3
4
ATL-128x8-0.5us-SOIC8
ATL-128x8-0.5us-SOIC8
CS
SK
DI
DO
C371 103P/16V/4 C371 103P/16V/4
C389 103P/16V/4 C389 103P/16V/4
EECS
EESK
EEDI
EEDO
LAN_USB1B
LAN_USB1B
RJ45(10/100)+USB*2
RJ45(10/100)+USB*2
MDI_1MDI_0-
MDI_1+
MDI_0+
VDD33
VCC
DC
ORG
GND
R123 330R R123 330R
R125 330R R125 330R
MDI_1MDI_1+
MDI_0MDI_0+
8
7
6
5
2
LAN_ACTLED
10
11
12
13
14
15
16
17
18
9
C502
C502
0.1u/25Y/4
0.1u/25Y/4
LAN_LINK_UP
LINK_100_C
LINK_1G_C
R355
R355
10K/4
10K/4
19
16 9
16 9
21
22 20
C203
C1000P50X0402
C203
C1000P50X0402
C211
C1000P50X0402
C211
C1000P50X0402
C206
C1000P50X0402
C206
C1000P50X0402
C219
C1000P50X0402
C219
C1000P50X0402
1
10/100-Lan
N58-22F0201-F02
N58-22F0201-S42
Link
Yellow
Active
Blinking
Green
100
10
None
19
20
Yellow
21
22
Green
VDD33 AVDD33 3VDUAL EVDD18 VL1_8 AVDD18 VL1_8 DVDD15
CP32CP32
CP33CP33
R358 X_0/6 R358 X_0/6
+
+
1 2
EC54
EC54
100UF/16V/6.3X5/2.5mm
100UF/16V/6.3X5/2.5mm
A A
CP34CP34
R360 X_0/6 R360 X_0/6
5
CP38CP38
R361 X_0/6 R361 X_0/6 C463 0.1u/25Y/4 C463 0.1u/25Y/4
C375
X_0.1u/25Y/4
C375
X_0.1u/25Y/4
C364
0.1u/25Y/4
C364
0.1u/25Y/4
4
X_0.1u/25Y/4
X_0.1u/25Y/4
C608
C608
CP39CP39
R363 X_0/6 R363 X_0/6
C475
10u/10Y/8
C475
10u/10Y/8
3
2
C427 0.1u/25Y/4 C427 0.1u/25Y/4
C492 C1000P50X0402 C492 C1000P50X0402
C495 0.1u/25Y/4 C495 0.1u/25Y/4
C456 0.1u/25Y/4 C456 0.1u/25Y/4
C428 103P/16V/4 C428 103P/16V/4
C372 10u/10Y/8 C372 10u/10Y/8
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
Date: Sheet
VDD33
C496 22U/0805 C496 22U/0805
C467 0.1u/25Y/4 C467 0.1u/25Y/4
C429 0.1u/25Y/4 C429 0.1u/25Y/4
C472 0.1u/25Y/4 C472 0.1u/25Y/4
C473 0.1u/25Y/4 C473 0.1u/25Y/4
AVDD18
C373 X_0.1u/25Y/4 C373 X_0.1u/25Y/4
C357 0.1u/25Y/4 C357 0.1u/25Y/4
1
of
17 29 Wednesday, July 18, 2007
of
17 29 Wednesday, July 18, 2007
of
17 29 Wednesday, July 18, 2007
ALC883 CODEC
5
+
R450 0/4 R450 0/4
R453 0/4 R453 0/4
SURRBACKL
SURRBACKR
R438 33R/4 R438 33R/4
R427 22R/4 R427 22R/4
R435
R435
X_10K/4
X_10K/4
R379 5.1K/4/1 R379 5.1K/4/1
R374 10K/4/1 R374 10K/4/1
R372 20K/4/1 R372 20K/4/1
R373 39.2K/4/1 R373 39.2K/4/1
Trace Width 20mils.
SURRBACK_L
SURRBACK_R
D D
AZ_SDATA_OUT 13
AZ_BIT_CLK 13
ACZ_SDATA_IN3 13
AZ_SYNC 13
AZ_RST# 13
C C
FRONT_JD
LINE1_JD
MIC1_JD
SURR_JD
Closer to Codec.
+
EC53 CD10U16EL5
EC53 CD10U16EL5
1 2
+
+
EC58 CD10U16EL5
EC58 CD10U16EL5
1 2
VCC3
C553
0.1u/25Y/4
C553
0.1u/25Y/4
C560
0.1u/25Y/4
C560
0.1u/25Y/4
BIT_CLK
SDATA_IN3
C537
33P/50V/4
C537
33P/50V/4
C540
0.1u/25Y/4
C540
0.1u/25Y/4
SENSE_A
LINE2_L
LINE2_R
MIC2_L
MIC2_R
JD0
SURR_BR
48
1
DVDD1
2
XTL_IN
3
XTL_OUT
4
DVSS1
5
SDATA_OUT
6
BIT_CLK
7
DVSS2
8
SDATA_IN
9
DVDD2
10
SYNC
11
RESET#
12
PC_BEEP
SENSEA13LINE2L/AUXL14LINE2R/AUXR15MIC2L/JD216MIC2R/JD117CD-L18CD-GND19CD-R20MIC1L21MIC2R22LIN1L23LIN1R
ALC888
ALC888
Speaker Out Decoupling
MIC2_L
C857 C4.7U6.3X5 C857 C4.7U6.3X5
MIC2_R
C856 C4.7U6.3X5 C856 C4.7U6.3X5
MIC2_VREFO
C609 X_0.1u/25Y/4 C609 X_0.1u/25Y/4
B B
LINE2_VREFO
C575 X_0.1u/25Y/4 C575 X_0.1u/25Y/4
+
+
LINE2_R
EC60
EC60
1 2
+
+
EC59
EC59
1 2
Place those component close to
audio connector.
FRONTMIC
MICVREF
BAT54A-S-SOT23 D29 BAT54A-S-SOT23 D29
1
3
2
D28
D28
BAT54A-S-SOT23
BAT54A-S-SOT23
1
3
2
LINEOUT_R
100UF/16V/6.3X5/2.5mm
100UF/16V/6.3X5/2.5mm
LINEOUT_L
100UF/16V/6.3X5/2.5mm
100UF/16V/6.3X5/2.5mm
R559 100/4/1 R559 100/4/1
R557 100/4/1 R557 100/4/1
R519 4.7K/4 R519 4.7K/4
R499 4.7K/4 R499 4.7K/4
R520 4.7K/4 R520 4.7K/4
R521 4.7K/4 R521 4.7K/4
R560 75/4 R560 75/4
R561 75/4 R561 75/4
C601
C470P50X0402
C601
C470P50X0402
45
47
46
SPDIFI
SPDIFO
SURR_BR
C616
X_C1000P50X0402
C616
X_C1000P50X0402
4
LFEO
CENO
SUR_O_R
SUR_O_L
R479 20K/4/1 R479 20K/4/1
41
39
42
40
43
44
38
AVSS2
LFE-OUT
CEN-OUT
SURR_BL
JDREF/JD3
SENSEB/FMIC1
SURR-OUTL
SURR-OUT-R
MIC1_REFR/FMIC2
MIC2_REF/AFILT2
L1_REFL/AFILT1
Azalia Front Audio Connector
FRONT_MIC
MIC_VREF
LINE_OUT_R
AZ_FRONT_JD
LINE_OUT_L
C470P50X0402
C470P50X0402
C618
X_C1000P50X0402
C618
X_C1000P50X0402
EC43 CD10U16EL5
EC43 CD10U16EL5
EC48 CD10U16EL5
EC48 CD10U16EL5
EC49 CD10U16EL5
EC49 CD10U16EL5
EC50 CD10U16EL5
EC50 CD10U16EL5
37
U28
U28
FR-OUTR
FR-OUTL
AVDD2
L1_REFR
VREFOUT2
L2_REF/JD4
MIC1_REFL
VREF
AVSS1
AVDD1
24
LIN1R
LIN1L
MIC1_IN_R
MIC1_IN_L
JAUD1
JAUD1
YJ205-IA
YJ205-IA
1
MIC
MICPWR3PRESENCE#
5
FLINE OUTR
7
HPON
FLINE OUTL9LINE NEXT L
C602
C602
1 2
+
+
1 2
+
+
1 2
+
+
1 2
+
+
36
35
34
33
32
31
30
29
28
27
26
25
C858 C4.7U6.3X5 C858 C4.7U6.3X5
C859 C4.7U6.3X5 C859 C4.7U6.3X5
C860 C4.7U6.3X5 C860 C4.7U6.3X5
C861 C4.7U6.3X5 C861 C4.7U6.3X5 R564 100/4/1 R564 100/4/1
LINE NEXT R
LFEOUT
CENTEROUT
SURROUTR
SURROUTL
+5VR
C579
C579
0.1u/25Y/4
0.1u/25Y/4
EC51 100UF/16V/6.3X5/2.5mm
EC51 100UF/16V/6.3X5/2.5mm
FR_OUTR
FR_OUTL
EC52 100UF/16V/6.3X5/2.5mm
EC52 100UF/16V/6.3X5/2.5mm
SENSE_B
AUX_JD
MIC1_VREFO_R
LINE2_VREFO
MIC2_VREFO
MIC1_VREFO_L
+5VR
CB3
0.1u/25Y/4
CB3
0.1u/25Y/4
C566
X_10u/10Y/8
C566
X_10u/10Y/8
MIC1_VREFO_L
MIC1_VREFO_R
2
GND
4
MIC2_JD
6
8
8
LINE2_JD LINE2_L
10
1 2
+
+
1 2
+
+
R474 5.1K/4/1 R474 5.1K/4/1
R467 10K/4/1 R467 10K/4/1
R475 0/6 R475 0/6
Closer to Codec.
R452 X_10K/4/1 R452 X_10K/4/1
0.1u/25Y/4
0.1u/25Y/4
R558 100/4/1 R558 100/4/1
R562 100/4/1 R562 100/4/1
R563 100/4/1 R563 100/4/1
R445 4.7K/4 R445 4.7K/4
R468 4.7K/4 R468 4.7K/4
R454 0/4 R454 0/4
R457 0/4 R457 0/4
R458 0/4 R458 0/4
R459 0/4 R459 0/4
C558
C558
R496 4.7K/4 R496 4.7K/4
R497 20K/4/1 R497 20K/4/1
R498 39.2K/4/1 R498 39.2K/4/1
3
LFE_OUT
CENTER_OUT
SURR_OUTR
SURR_OUTL
LINE_FOUTR
LINE_FOUTL LINE_FOUTL
SURRBACK_JD
CEN_JD
AZ_FRONT_JD
+5VR
LINE1_1R
LINE1_1L
MIC1_R
MIC1_L
VCC3
2
Rear audio jack
LINE1_1R
LINE1_1L
LINE_FOUTR
LINE_FOUTL
MIC1_R
MIC1_L
C332
C332
C680p50X0402-RH
C680p50X0402-RH
SURR_OUTR
SURR_OUTL
LFE_OUT
CENTER_OUT
SURRBACK_R
SURRBACK_L
C576
C576
C680p50X0402-RH
C680p50X0402-RH
1
(Upper)
(Upper)
AUDIO1A
AUDIO1A
FRONT_JD
U27
U27
LT1087S_SOT89
LT1087S_SOT89
VIN3VOUT
ADJ
1
10
11
12
13
18
JACK-AUDIOX6-26P_L-pbg_R-obl
JACK-AUDIOX6-26P_L-pbg_R-obl
(Middle)
(Middle)
AUDIO1B
AUDIO1B
6
7
8
9
17
JACK-AUDIOX6-26P_L-pbg_R-obl
JACK-AUDIOX6-26P_L-pbg_R-obl
(Down)
(Down)
AUDIO1C
AUDIO1C
1
2
4
5
3
JACK-AUDIOX6-26P_L-pbg_R-obl
JACK-AUDIOX6-26P_L-pbg_R-obl
(Upper)
(Upper)
AUDIO2A
AUDIO2A
10
11
12
13
18
JACK-AUDIOX6-26P_L-pbg_R-obl
JACK-AUDIOX6-26P_L-pbg_R-obl
(Middle)
(Middle)
AUDIO2B
AUDIO2B
6
7
8
9
17
JACK-AUDIOX6-26P_L-pbg_R-obl
JACK-AUDIOX6-26P_L-pbg_R-obl
JACK-AUDIOX6-26P_L-pbg_R-obl
JACK-AUDIOX6-26P_L-pbg_R-obl
VCC5_SB
1
2
4
5
3
AUDIO2C
AUDIO2C
2
(Down)
(Down)
D23
D23
1N4148_SOD123
1N4148_SOD123
D22
D22
1N5817S
1N5817S
R485
R485
100/4/1
100/4/1
R488
R488
324/4
324/4
14
15
16
14
15
16
+5VR
C600
X_C4.7U10Y0805
C600
X_C4.7U10Y0805
CB4
0.1u/25Y/4
CB4
0.1u/25Y/4
LINE1_JD
MIC1_JD
C336
C336
C329
C329
C331
C328
C328
C680p50X0402-RH
C680p50X0402-RH
C680p50X0402-RH
C680p50X0402-RH
C680p50X0402-RH
C680p50X0402-RH
C525
C525
C577
C577
C680p50X0402-RH
C680p50X0402-RH
C680p50X0402-RH
C680p50X0402-RH
C680p50X0402-RH
C680p50X0402-RH
C331
C330
C330
C680p50X0402-RH
C680p50X0402-RH
C680p50X0402-RH
C680p50X0402-RH
SURR_JD
CEN_JD
SURRBACK_JD
C550
C550
C524
C524
C552
C552
C680p50X0402-RH
C680p50X0402-RH
C680p50X0402-RH
C680p50X0402-RH
AUDIO CODE REGULATORS
Trace Width 30mils.
+12V
C582
C582
10u/10Y/8
10u/10Y/8
EMI Solution
A A
5
4
3
2
C710 0/4 C710 0/4
C711 0/4 C711 0/4
CP37CP37
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
Date: Sheet
C696 X_0.1u/16Y/4 C696 X_0.1u/16Y/4
VCC3 VCC5
of
18 29 Friday, July 27, 2007
of
18 29 Friday, July 27, 2007
of
18 29 Friday, July 27, 2007
1
POWER CIRCUIT FOR USB PORT 0,1
5
+5VUSB_REAR SVCC1 +5VUSB_FRONT SVCC3
FS3
FS3
2.6A_miniSMDM260
2.6A_miniSMDM260
1 2
R121
R121
5.1K/6
USB_OCP#1 13 USB_OCP#2 13
D D
5.1K/6
R124
R124
10K/4
10K/4
C87
0.1u/25Y/4
C87
0.1u/25Y/4
C193
X_0.1u/25Y/4
C193
X_0.1u/25Y/4
NEAR USB CONNECTOR
C103
X_0.1u/25Y/4
C103
X_0.1u/25Y/4
C218
X_0.1u/25Y/4
C218
X_0.1u/25Y/4
1 2
+
1000U/6.3V+EC18
1000U/6.3V
4
3
2
1
POWER CIRCUIT FOR USB PORT 2,3
FS5
FS5
1.1A_microSMD110
1.1A_microSMD110
EC18
1 2
60 mils
R491
R491
5.1K/6
5.1K/6
R359
R359
10K/4
10K/4
FRONT USB CONNECTOR
C585
0.1u/25Y/4
C585
0.1u/25Y/4
EC46
1000U/6.3V+EC46
1000U/6.3V
C595
X_0.1u/25Y/4
C595
X_0.1u/25Y/4
1 2
+
REAR PANEL USB CONNECTOR FOR USB PORT 0,1
USBP1
USBN1
SVCC1
D15
D15
5 2
614
3
X_ESD-IP4220
X_ESD-IP4220
USBP0
USBN0
SVCC1
L17
USBP1
USBP1 13
USBN1
USBN1 13
USBP0
USBP0 13
USBN0
USBN0 13
C C
L17
5
6
7
8
X_Common Chock
X_Common Chock
1
2
3
4
USB1
USB1
9
1
2
3
4
10
5
5
UP
UP
1
1
DOWN
DOWN
11
5
6
7
8
12
REAR PANEL USB CONNECTOR FOR USB PORT 2,3
USBP3
USBN3
SVCC1 SVCC3 SVCC1
D13
D13
5 2
614
3
X_ESD-IP4220
X_ESD-IP4220
USBP2
USBN2
LAN_USB1A
L13
L13
USBP3
USBP3 13
USBN3
USBN3 13
USBP2
USBP2 13
USBN2
USBN2 13
B B
A A
5
5
6
7
8
X_Common Chock
X_Common Chock
1
2
3
4
LAN_USB1A
RJ45(10/100)+USB*2
RJ45(10/100)+USB*2
5
PWR
PWR
6
USB-
USB-
5
5
7
USB+
USB+
UP
UP
8
GND
GND
1
PWR
PWR
2
USB-
USB-
1
1
3
USB+
USB+
4
GND
GND
DOWN
DOWN
23
GND
GND
24
GND
GND
25
GND
GND
26
GND
GND
27
GND
GND
28
GND
GND
29
GND
GND
30
GND
GND
4
FRONT PANEL USB CONNECTOR FOR USB PORT 7,8
L56
L56
USBN8
USBN8 13
USBP8
USBP8 13
USBN7
USBN7 13
USBP7
USBP7 13
3
5
6
7
8
X_Common Chock
X_Common Chock
1
2
3
4
2
SVCC3
JUSB3
JUSB3
CON2X5-1_W
CON2X5-1_W
2
VCC1VCC
4
USB0-3USB1USB0+5USB1+
GND7GND
USBOC
EMI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
USBP7
6
8
USBN7 USBN8
10
CP11CP11
<Title>
<Title>
<Title>
MS-7382 0A
MS-7382 0A
MS-7382 0A
D25
D25
614
CP10CP10
CP6CP6
1
5 2
X_ESD-IP4220
X_ESD-IP4220
USBP8
3
of
19 29 Wednesday, July 18, 2007
of
19 29 Wednesday, July 18, 2007
of
19 29 Wednesday, July 18, 2007
Voltage Regular Module
5
CD1800u6.3EL20-RH-2 ESR<12mOhm,Rippercur<2220mA,105C/3000hrs
CD1000u16EL20-RH-2 ESR<2mOhm,Rippercur<2350mA,105C/3000hrs
D D
CH-1.2u18A3.5m-RH-1
TO252/50A/25V/9.5mohm(10V/25A) 1800pF,50nC NIKO/P0903BDG
1.2uH/20%,DIP/8.0mm,18A,3.0mOhm,5.5T,1.2mmx1,UEW,IRON
0.25uH/20%,DIP/6.0mm,40A,0.65mOhm,2.75T,1.4mmx1,FERRITE CH-0.25U40A-RH-1
4
3
2
1
+12VIN
5
JPW1
JPW1
1
2
PWR-2X2M_white-4.2pitch-RH
PWR-2X2M_white-4.2pitch-RH
3
GND GND
GND GND
12V
12V
4
12V
12V
+12VIN
C212
X_103P25X4
C212
X_103P25X4
COIL4
COIL4
CH-1.2U18A
CH-1.2U18A
1 2
C210
X_C4.7U35Y1206
C210
X_C4.7U35Y1206
EC14
CD1000U16EL20-2+EC14
CD1000U16EL20-2
EC8
CD1000U16EL20-2+EC8
CD1000U16EL20-2
EC15
CD1000U16EL20-2+EC15
+
1 2
CD1000U16EL20-2
+
+
1 2
1 2
+12VP_FET
C17
0.1u/25Y/4
C17
0.1u/25Y/4
C22
0.1u/25Y/4
C22
0.1u/25Y/4
C16
X_0.1u/25Y/4
C16
X_0.1u/25Y/4
C9
X_0.1u/25Y/4C9X_0.1u/25Y/4
Intersil ISL6566CRZ
DZ1 S-1N5817_DO214AC DZ1 S-1N5817_DO214AC
VCC5
VID[0..4]
VCC5 VCC5
R8
4.7K/4R84.7K/4
1KR0402R91KR0402
VRM_GD 21
C C
PWM_EN 21
0.1u/16Y/4C60.1u/16Y/4
C7
0.1u/16Y/4C70.1u/16Y/4
VID[0..4] 3
R9
C6
R7
5.1KR1%R75.1KR1%
COP COMPP
C11 C220P50N0402 C11 C220P50N0402
R17 1KR0402 R17 1KR0402
C5
X_C560P50XC5X_C560P50X
C12
C12
C1000P50X0402
C1000P50X0402
R6 X_100KR1% R6 X_100KR1%
C29
C29
103P25X4
103P25X4
R10 X_750R R10 X_750R
R19 18KR1%0402R19 18KR1%0402
R20 150KR R20 150KR
R11 51R R11 51R
VCCP
COREFB+ 3
COREFB- 3
B B
CHECK THIS! CONNECT TO BULK CAPACITOR
R12 51R R12 51R
VCC5
R31 280R1% R31 280R1%
Close Low Side MOSFET
A A
C30 C0.047U16X C30 C0.047U16X
C8
C5600P50XC8C5600P50X
C18
C18
103P25X4
103P25X4
VCCP
VID4
VID3
VID2
VID1
VID0
C14
C14
103P25X4
103P25X4
REF
FB
VDIFF
FS
U3
U3
38
VID4
39
VID3
40
VID2
1
VID1
2
VID0
3
VID12.5
35
PGOOD
37
ENLL
8
COMP
9
FB
10
VDIFF
12
VSEN
11
RGND
OFS
6
OFS
36
FS
5
REF
4
VRM10
13
OCSET
14
ICOMP
15
ISUM
16
IREF
C32
C32
103P25X4
103P25X4
R30 9.1KR1% R30 9.1KR1%
5
4
C15
C15
C4.7U10Y0805
C4.7U10Y0805
7
PVCC1
BOOT1
VCC
UGATE1
PHASE1
ISEN1
LGATE1
PVCC2
BOOT2
UGATE2
PHASE2
ISEN2
LGATE2
PVCC3
BOOT3
UGATE3
PHASE3
ISEN3
LGATE3
GND
ISL6566CRZ_QFN40
ISL6566CRZ_QFN40
41
BOTTOM PAD CONNECT TO GND
THROUGH 10 vias
R59 21.5KR1% R59 21.5KR1%
R68 21.5KR1% R68 21.5KR1%
33
30
31
29
32
34
24
26
27
28
25
23
18
21
20
22
19
17
C41 C1U16Y0805 C41 C1U16Y0805
12VP1
R46 2.2R0805 R46 2.2R0805
BOOT1
R49 2.2R0805 R49 2.2R0805
U_G1
PHASE1
R47 3.0KR1% R47 3.0KR1%
L_G1
C42 C1U16Y0805 C42 C1U16Y0805
12VP2
R115 2.2R0805 R115 2.2R0805
BOOT2
R119 2.2R0805 R119 2.2R0805
U_G2
PHASE2
R53 2.2KR1%0402R53 2.2KR1%0402
L_G2
R94
R94
X_10K/4
X_10K/4
PHASE1
PHASE2
C86
C86
C0.1U25X
C0.1U25X
C53
C53
C0.1U25X
C0.1U25X
3
+12VIN
+12VIN
Phase 1
Phase 2
U_G1
PHASE1
L_G1
U_G2
PHASE2
L_G2
R33 1R0805 R33 1R0805
R35 10K/4 R35 10K/4
R69 X_10K/4 R69 X_10K/4
R99 1R0805 R99 1R0805
R76 10K/4 R76 10K/4
R93 X_10K/4 R93 X_10K/4
+12VP_FET
N-IPD09N03LA_TO252Q2N-IPD09N03LA_TO252
Q2
D S
UG1
G
Q5
Q5
D
D
G
G
S
S
N-P75N02LDG_TO252
N-P75N02LDG_TO252
+12VP_FET
Q11
N-IPD09N03LA_TO252
Q11
N-IPD09N03LA_TO252
D S
UG2
G
Q7
Q7
D
D
G
G
S
S
N-P75N02LDG_TO252
N-P75N02LDG_TO252
2
N-IPD09N03LA_TO252Q3N-IPD09N03LA_TO252
C36
C4.7U35Y1206
C36
C4.7U35Y1206
G
C91
C4.7U35Y1206
C91
C4.7U35Y1206
G
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
C198
C1U16Y0805
C198
C1U16Y0805
Q3
D S
COIL1
COIL1
_L04-25B7021
_L04-25B7021
1 2
Q9
Q9
D
D
R71
R71
G
G
2.2R0805
2.2R0805
S
S
N-P75N02LDG_TO252
N-P75N02LDG_TO252
C78
C78
C1000P50X0402
C1000P50X0402
N-IPD09N03LA_TO252Q6N-IPD09N03LA_TO252
Q6
C127
C1U16Y0805
C127
C1U16Y0805
D S
COIL2
COIL2
_L04-25B7021
_L04-25B7021
1 2
R92
R92
Q12
Q12
D
D
2.2R0805
2.2R0805
G
G
S
S
N-P75N02LDG_TO252
N-P75N02LDG_TO252
C118
C118
C1000P50X0402
C1000P50X0402
<Title>
<Title>
<Title>
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
VCCP
EC9
CD1800U6.3EL20-2+EC9
CD1800U6.3EL20-2
EC29
CD1800U6.3EL20-2+EC29
CD1800U6.3EL20-2
+
1 2
+
1 2
VCCP
EC5
CD1800U6.3EL20-2+EC5
CD1800U6.3EL20-2
EC4
CD1800U6.3EL20-2+EC4
CD1800U6.3EL20-2
+
1 2
+
1 2
20 29 Friday, July 20, 2007
20 29 Friday, July 20, 2007
20 29 Friday, July 20, 2007
1
C706
22P50N0402
C706
22P50N0402
C624
22P50N0402
C624
22P50N0402
of
of
of
5
MS-6
VCC5
HD_RST#
PLED1 23
3VDLDEC#
PULL LOW
PULL HIGH
EXTRAM
PULL LOW
PULL HIGH
A_RST# 12
HD_RST# 22
PCI_RST1# 9,16
VRM_GD 20
PWM_EN 20
1.25VREF
VCC5
PCI_E_RST# 17
VCC3
VDDA_25
R243
R243
330R
330R
C361
C361
X_22P50N0402
X_22P50N0402
PLED2 23
FP_RST# 13,23
HD_RST#
R235 22R/4 R235 22R/4
1.25VREF
R505 22R/4 R505 22R/4
EC26
_CD100U16EL11+EC26
_CD100U16EL11
1 2
+
PS_ON# 16
ATX_PSON# 23
3VSB MODE SELECT
3VSB MODE
DUAL MOSFET
SINGLE MOSFET
D D
VDIMM LINEAR OR PWM SELECT
VDIMM MODE
LINEAR REGULATOR
PWM REGULATOR
C C
B B
VCC5_SB
R250 330R R250 330R
Q28
Q28
C E
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
R232 4.7K/4 R232 4.7K/4
B
R251 330R R251 330R
C E
B
Q33
Q33
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
VCC3
C349
C4.7U10Y0805
C349
C4.7U10Y0805
VCC5_SB
VCC5_SB VCC5_SB
R240 4.7K/4 R240 4.7K/4
3VDUAL
R242
R242
R252
R252
330R
330R
4.7K/4
4.7K/4
10
11
12
C356
X_0.1u/25Y/4
C356
X_0.1u/25Y/4
C352
0.1u/25Y/4
C352
0.1u/25Y/4
PS_ON#
ATX_PSON#
C342
X_0.1u/25Y/4
C342
X_0.1u/25Y/4
VCC5_SB
R255 4.7K/4 R255 4.7K/4
DDR AND DDR II VOLT SELECT
DDRTYPE
PULL LOW
PULL HIGH
1
2
3
4
5
6
7
8
9
3VDUAL
R210
1KR0402
R210
1KR0402
R238
1KR1%0402
R238
1KR1%0402
U14
U14
47
48
FP_RST#
PCIRST#
PLED1/EXTRAM
HDD_RST#
DEV_RST#
VDD_GD
VDD_EN
1.25VREF
VCC5
SLOT_RST#
VCC3
2.5VDDA
AGND0
PSIN#13PSOUT#14MEMBT15SS165VSB17DDRTYPE18VDIMM_LSEN19VDIMM_LDRV20VDIMM_HSEN21VDIMM_HDRV223VSB_SEN233VSB_DRV
C343 224P/16v/6 C343 224P/16v/6
C339
0.1u/25Y/4
C339
0.1u/25Y/4
+
1 2
NEED CLOSE TO MS6
DDRTYPE
VDIMM
2.5V
1.8V
4
45
46
43
41
44
I2C_CLK
RSMRST#42I2C_DATA
CPU_PWGD
CHIP_PWGD
PLED0/3VDLDEC#
EC32
CD470U10EL11-2+EC32
CD470U10EL11-2
10K/4
10K/4
R186
R186
39
S3#40S5#
PWR_OK
RAM_REF
38
5VSB
1.2VLDT_DRV
1.2VLDT_SEN
R192
1KR1%0402
R192
1KR1%0402
SLP_S5#
SLP_S3#
C317
C317
X_C1000P50X0402
X_C1000P50X0402
37
GND
C1
C2
CHRPMP
AGND1
5VUSB_DRV
5V_DRV
VAGP_DRV
VAGP_SEN
WD_DET
TMP_FAULT#
24
MS-6G-RBF-RH
MS-6G-RBF-RH
ATX_PWROK
36
35
34
33
32
31
30
29
28
27
26
25
NB_PWRGD 9,13
SCL 6,11,13
SDA 6,11,13
RSMRST# 13
SLP_S5# 13
SLP_S3# 13,16
ATX_PWROK 16,23
VCC5_SB
C292
C292
0.1u/25Y/4
0.1u/25Y/4
C285 0.1u/10X/4 C285 0.1u/10X/4
5VSB_DRV
5V_DRV
VCC18_G1
VCC18_FB1
WD_DET
5V_DRV
3VSB_DRV
C304
C304
X_103P/16V/4
X_103P/16V/4
R211 1KR1%0402 R211 1KR1%0402
D S
G
C307
C307
X_C1000P50X0402
X_C1000P50X0402
9VSB
CHARGE PUMP
VOLTAGE OUTPUT
C282 1u/10V/6 C282 1u/10V/6
R188 10K/4 R188 10K/4
R200 10K/4 R200 10K/4
VCC3 VCC5_SB
Q35
Q35
1
2
3
4 5
NN-P07D03LV_SO8
NN-P07D03LV_SO8
C299
C299
X_C1000P50X0402
X_C1000P50X0402
2 3
Q8
Q8
N-APM2054NDC-TRL_SOT89-LF
N-APM2054NDC-TRL_SOT89-LF
Q27
Q27
N-2N7002_SOT23
N-2N7002_SOT23
R194 33R/4 R194 33R/4
3
R193 4.7K/4 R193 4.7K/4
VCC3
8
7
6
5VDIMM
1
4
3VDUAL
RAM_VREF
C313
C313
C1000P50X0402
C1000P50X0402
5VSB_DRV
5V_DRV
G
3VDUAL
+
+
1 2
EC33
EC33
CD470U10EL11-2
CD470U10EL11-2
5V_DRV
G
D S
Q10
Q10
N-P45N02LD_TO252
N-P45N02LD_TO252
C286
X__2200P50X4
C286
X__2200P50X4
X__2200P50X4
X__2200P50X4
D S
Q23
Q23
N-P45N02LD_TO252
N-P45N02LD_TO252
VCCA_1V2_DRV
VCC5 VCC5_SB
VCC5
4 5
3
2
1
NN-P07D03LV_SO8
NN-P07D03LV_SO8
4 5
3
2
1
C287
C287
NN-P07D03LV_SO8
NN-P07D03LV_SO8
2
VCC5_SB
Q22
Q22
6
7
8
+5VUSB_REAR
1 2
+
+
EC27
EC27
X_1000U/6.3V
X_.CD1800U6.3EL20+EC23
X_.CD1800U6.3EL20
6
7
8
G
EC23
VCC_DDR VCC_DDR
D S
Q25
Q25
N-P45N02LD_TO252
N-P45N02LD_TO252
EC21
.CD1800U6.3EL20+EC21
.CD1800U6.3EL20
1 2
+
X_1000U/6.3V
+5VUSB_FRONT
VCCA_1V2
Q44
Q44
1 2
+
SB600=1.2V
1.25VREF
R179
R179
49.9R 1%
49.9R 1%
R180
R180
1.2KR 1%
1.2KR 1%
VCC5_SB
VRM_GD 20
C380
X_C1000P50X0402
C380
X_C1000P50X0402
5V_DRV
SLP_S3#
9VSB
8 4
3
+
+
2
-
-
R208 1KR1%0402 R208 1KR1%0402
R218 X_1KR0402 R218 X_1KR0402
R209 1KR1%0402 R209 1KR1%0402
R217 1KR0402 R217 1KR0402
U15A
U15A
LM358MX_SOIC8
LM358MX_SOIC8
VCC12SB_G
1
C346
C346
0.1u/16Y/4
0.1u/16Y/4
1
G
CB1
0.1u/25Y/4
CB1
0.1u/25Y/4
VCCA_1V2_DRV
G
G
3VDUAL
C386 X_0.1u/25Y/4 C386 X_0.1u/25Y/4
D S
Q36
Q36
_N-NDS351AN_SOT23
_N-NDS351AN_SOT23
470/16V+EC42
470/16V
1 2
+
D S
G
D S
Q29
Q29
N-2N7002_SOT23
N-2N7002_SOT23
D S
Q30
Q30
N-2N7002_SOT23
N-2N7002_SOT23
USB_PHY
EC42
Q38
Q38
N-2N7002_SOT23
N-2N7002_SOT23
Turn off VCCA_1V2 when enter S3.
VCC3
C385 X_0.1u/25Y/4 C385 X_0.1u/25Y/4
VCC18_G1
VCC18_FB1
C288
X_C1000P50X0402
C288
X_C1000P50X0402
R175 200R 1% R175 200R 1%
R177
1KR1%0402
R177
1KR1%0402
12 34
Q37
Q37
N-APM2054NDC-TRL_SOT89-LF
N-APM2054NDC-TRL_SOT89-LF
+1.8V_S0
+
+
1 2
1.5A
EC28
EC28
1000U/6.3V
1000U/6.3V
+12V
RAM_VREF
C82
1u/16V/8
C82
1u/16V/8
C83
223P/16v/6
C83
223P/16v/6
Iripple=20*0.6*0.8/1=9.6A
2.22*3*1.7=11.322A>9.6A
R79 200KR0402 R79 200KR0402
X_BAT54A-S-SOT23 D33 X_BAT54A-S-SOT23 D33
1
3
2
U5
U5
4
RR
BOOT
16
VCC12
1
5VSB
PHASE
9
PI
11
GND
GND
PVCC
10
SS
2
RT
3
R82
X_68KR0402
R82
X_68KR0402
I_IND
17
COMP
GND
MS-11
MS-11
C76 222P/50V/X7R/4 C76 222P/50V/X7R/4
R87
R87
R81
R81
22K/4
22K/4
X_0/4
X_0/4
C74 33P/50V/4 C74 33P/50V/4
5VDIMM_IN
+
+
EC30 CD1000U16EL20-2
EC30 CD1000U16EL20-2
1 2
+
+
EC31 CD1000U16EL20-2
EC31 CD1000U16EL20-2
1 2
+
+
EC36 X_CD1000U16EL20-2
EC36 X_CD1000U16EL20-2
1 2
D S
R102
C79
C79
R86
R86
1u/16V/8
1u/16V/8
0R0805
0R0805
15
14
UG
13
12
LG
CSP
CSN
FB
R85 2KR1%0402 R85 2KR1%0402
C72 1u/16V/8 C72 1u/16V/8
6
R80 2KR1%0402 R80 2KR1%0402
5
8
7
R84 X_56KR1%0402 R84 X_56KR1%0402
R88 1KR1%0402 R88 1KR1%0402
R89 1KR1%0402 R89 1KR1%0402
C80 X_103P25X4 C80 X_103P25X4
CLOSE TO DEVICE FB
4
R102
0R0805
0R0805
G
Q20
Q20
N-IPD06N03LA_TO252
N-IPD06N03LA_TO252
D S
G
Q19
Q19
N-IPD06N03LA_TO252
N-IPD06N03LA_TO252
C89 10u/10Y/8 C89 10u/10Y/8
R107
R107
2.2R0805
2.2R0805
C171
C171
103P/16V/4
103P/16V/4
CONNECT TO CHOKE
OUTPUT
3
CHOKE2
CHOKE2
CH-1.2U18A
CH-1.2U18A
1 2
VCC_DDR
DDR II 1.8V POWER
R78 2.2/6 R78 2.2/6
5VDIMM
C71 1u/16V/8 C71 1u/16V/8
RAM_VREF
A A
C69 1u/16V/8 C69 1u/16V/8
C81
103P25X4
C81
103P25X4
5
5VDIMM
CHOKE1
CHOKE1
CH-1.2U18A
CH-1.2U18A
1 2
C684
C684
X_0.1u/25Y/4
X_0.1u/25Y/4
EC19 .CD1800U6.3EL20
EC19 .CD1800U6.3EL20
EC17 .CD1800U6.3EL20
EC17 .CD1800U6.3EL20
+
+
1 2
+
+
1 2
C241 C1000P50X0402 C241 C1000P50X0402
C68
C68
103P/16V/4
103P/16V/4
Irms(MAX) of VCC_DDR=20A
2
DDR VTT Power
VTT_DDR
+
+
1 2
EC20
EC20
1000U/6.3V
1000U/6.3V
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
VCC_DDR
R142
R142
1KR1%0402
1KR1%0402
R146
R146
1KR1%0402
1KR1%0402
<Title>
<Title>
<Title>
MS-7382 0A
MS-7382 0A
MS-7382 0A
1 2
+
+
EC11
EC11
X_470u/6.3V/6.3*11
X_470u/6.3V/6.3*11
U8
U8
VIN1VREF2
2
GND
3
VREF1
4
VOUT
9
GND
W83310DG_SOP8-RH
W83310DG_SOP8-RH
1
ENABLE
VCNTL
BOOT_SEL
21 29 Friday, July 20, 2007
21 29 Friday, July 20, 2007
21 29 Friday, July 20, 2007
3VDUAL
8
7
6
5
of
of
of
IDE Connector
5
PDD[15..0]
PDD[15..0] 14
R248 33R/4 R248 33R/4
HD_RST# 21
D D
PD_DREQ 14
PD_IOW# 14
PD_IOR# 14
PD_IORDY 14
PD_DACK# 14
PD_SIRQ 14
PDA_R0 14
PD_CS#1 14 PD_CS#3 14
PD_LED
PD_LED 23
R126 4.7K/4 R126 4.7K/4
VCC5
IDE1
IDE1
YJ220-CB-1
YJ220-CB-1
HDRST#P
1
2
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
PDD8
PDD9
PDD10
PDD11
PDD12
12
PDD13
16 15
PDD15 PDD0
22
24
26
28
30
32
34
36
38
40 39
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1 PDD14
R132 470R/4 R132 470R/4
X_47n/50V/6
X_47n/50V/6
4
3
2
1
SATA Connector
SATA2
SATA1
SATA1
CONN-SATA10P_PURPLE
CONN-SATA10P_PURPLE
9
GND
GND
1
GND
GND
2
TX+
TX+
TX-
TX-
RX-
RX-
RX+
RX+
GND
GND
PD_DET 13 PDA_R1 14
PDA_R2 14
R128
100K
R128
100K
C225
C225
SATA_TX0+_C 14
3
SATA_TX0-_C 14
4
GND GND
GND GND
5
SATA_RX0-_C 14
6
SATA_RX0+_C 14
7
8
SATA2
CONN-SATA10P_PURPLE
CONN-SATA10P_PURPLE
9
GND
GND
1
GND
GND
2
TX+
TX+
3
TX-
TX-
4
GND GND
GND GND
5
RX-
RX-
6
RX+
RX+
7
8
GND
GND
SATA_TX1+_C 14
SATA_TX1-_C 14
SATA_RX1-_C 14
SATA_RX1+_C 14
CPU FAN Connector
C C
CPUFAN1
CPUFAN1
FAN1*4/WHITE
FAN1*4/WHITE
MEC1
B B
A A
R523 200R 1% R523 200R 1%
4
3
2
1
C432
C432
X_10u/10Y/8
X_10u/10Y/8
5
VCC5
D32
1N4148_SOD123
D32
1N4148_SOD123
R522
4.7K/4
R522
4.7K/4
+12V
R3
4.7K/4R34.7K/4
D3
1N4148_SOD123D31N4148_SOD123
R1 27KR R1 27KR
CPU-FANPWM 16
CPU-FAN 16
R2
10K/4R210K/4
4
SYS FAN Connector
+12V
SYSFAN1
SYSFAN1
BH1X3BP_white-RH
BH1X3BP_white-RH
3
2
1
R13
4.7K/4
R13
4.7K/4
+12V
C436
C436
X_10u/10Y/8
X_10u/10Y/8
3
D34
1N4148_SOD123
D34
1N4148_SOD123
R5 27KR R5 27KR
R4
10K/4R410K/4
SYS-FAN 16
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
1
of
22 29 Wednesday, July 18, 2007
of
22 29 Wednesday, July 18, 2007
of
22 29 Wednesday, July 18, 2007
5
4
3
2
1
ATX connector / Front Panel (Intel Front Panel) PS2 KEYBOARD & MOUSE CONNECTOR
C597
C597
X_0.1u/25Y/4
X_0.1u/25Y/4
1
3
5
7
C E
B
Q67
Q67
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
3VDUAL
R526
R526
4.7K/4
4.7K/4
C591
C591
X_0.1u/25Y/4
X_0.1u/25Y/4
R455 2.2K/4 R455 2.2K/4
PLED1 21
PLED2 21
PSIN 16
ALARM 16
SPKR 13
SVCC1
C10
RN4
RN4
246
8
4.7K/4/8P4R
4.7K/4/8P4R
135
7
MSDATA 16
MSCLK 16
KBDATA 16
KBCLK 16
FB1 0/6FB1 0/6
FB2 0/6FB2 0/6
FB3 0/6FB3 0/6
FB4 0/6FB4 0/6
C10
X_0.1u/25Y/4
X_0.1u/25Y/4
180P50N
180P50N
R14
R14
X_1KR1%0402
X_1KR1%0402
16
17
PS1
PS1
7
10
8
11
9
12
MS
MS
1
4
2
5
3
6
KB
KB
CONN-KB_MS-RH
CONN-KB_MS-RH
131415
C23
180P50N
C23
180P50N
C28
C28
C27
180P50N
C27
180P50N
C13
180P50N
C13
180P50N
R492 330R R492 330R
VCC5
D21
D21
BAT54A-S-SOT23
BAT54A-S-SOT23
SATA_ACT# 14
D D
PD_LED 22
C C
2
1
R494 33R/4 R494 33R/4
FP_RST# 13,21
C594
C594
0.1u/25Y/4
0.1u/25Y/4
HDD+
C589
C589
X_0.1u/25Y/4
X_0.1u/25Y/4
HDD-
3
C593
C593
X_181P
X_181P
RESET+
PLED2
PLED1
JFP1
JFP1
1
PLED
HDD+
3
SLED
HDDRESET-5PWSW+
7
RESET+
PWSW-
9
NC
JFP1
JFP1
JFP2
JFP2
GND1SPEAKER
3
BUZ+
SLED
5
PLED
VCCSPK
H2X4(7)_color-N31-2041101
H2X4(7)_color-N31-2041101
PLED1
2
PLED2
4
6
8
C613
C613
X_0.1u/25Y/4
X_0.1u/25Y/4
VCC5
D10
D10
1N4148W
1N4148W
RN8
RN8
2
2
4
4
6
8
6
BUZ-
8P4R-100R-LF
8P4R-100R-LF
R90
R90
0/4
0/4
8
ATX Connector
VCC3
-12V VCC3
ATX1
ATX1
25
1
13
3.3V
3.3V
25
2
14
3.3V
-12V
C228
C1000P50X0402
C228
C1000P50X0402
C230
X_0.1u/25Y/4
C230
X_0.1u/25Y/4
VCC5_SB VCC5
R178
R178
10K/4
ATX_PSON# 21
B B
A A
10K/4
VCC5
C239
C239
C1000P50X0402
C1000P50X0402
5
C298
X_0.1u/25Y/4
C298
X_0.1u/25Y/4
15
GND
16
P_ON
17
GND
18
GND
19
GND
20
-5V
21
5V
22
5V
23
5V
GND243.3V
PWRCONN2*12
PWRCONN2*12
5VSB
3
GND
4
5V
5
GND
6
5V
7
GND
8
POK
9
10
+12V
11
+12V
12
C240
C240
0.1u/25Y/4
0.1u/25Y/4
VCC5
C308
C308
0.1u/25Y/4
0.1u/25Y/4
VCC5_SB
+12V
C318
C318
0.1u/25Y/4
0.1u/25Y/4
4
C309
C309
0.1u/25Y/4
0.1u/25Y/4
R174
R174
10K/4
10K/4
ATX_PWROK 16,21
C290
C290
0.1u/25Y/4
0.1u/25Y/4
3
EMI solution
VCC5
C542
0.1u/16Y/4
C542
0.1u/16Y/4
C534
0.1u/16Y/4
C534
VCCP
0.1u/16Y/4
+12V
X_0.1u/25Y/4
X_0.1u/25Y/4
C232
0.1u/25Y/4
C232
0.1u/25Y/4
C57
22P50N0402
C57
22P50N0402
X_0.1u/16Y/4
X_0.1u/16Y/4
C384
0.1u/16Y/4
C384
0.1u/16Y/4
C614
X_0.1u/16Y/4
C614
X_0.1u/16Y/4
C242
0.1u/25Y/4
C242
0.1u/25Y/4
C4
X_0.1u/25Y/4C4X_0.1u/25Y/4
C277
C277
C314
X_0.1u/16Y/4
C314
X_0.1u/16Y/4
C323
C323
2
C306
X_0.1u/16Y/4
C306
X_0.1u/16Y/4
C231
0.1u/16Y/4
C231
0.1u/16Y/4
X_0.1u/16Y/4
X_0.1u/16Y/4
-12V
X_0.1u/16Y/4
X_0.1u/16Y/4
3VDUAL +1.8V_S0 +1.8V_S0 +1.8V_S0 VCC3 3VDUAL
X_0.1u/16Y/4
X_0.1u/16Y/4
VCC5_SB VCC5_SB
C102
X_0.1u/25Y/4
C102
VCC3
X_0.1u/25Y/4
C275
X_0.1u/16Y/4
C275
X_0.1u/16Y/4
C578
0.1u/16Y/4
C578
0.1u/16Y/4
X_0.1u/25Y/4
X_0.1u/25Y/4
C617
0.1u/16Y/4
C617
0.1u/16Y/4
C383
X_0.1u/16Y/4
C383
X_0.1u/16Y/4
C165
C165
CP2CP2
CP5CP5
CP12CP12
CP17CP17
1
C567
X_0.1u/25Y/4
C567
X_0.1u/25Y/4
C227
C227
C60
C60
C301
C301
X_0.1u/25Y/4
X_0.1u/25Y/4
C606
X_0.1u/25Y/4
C606
X_0.1u/25Y/4
C603
X_0.1u/25Y/4
C603
X_0.1u/25Y/4
C88
C88
C216
X_0.1u/25Y/4
C216
X_0.1u/25Y/4
C119
X_0.1u/25Y/4
C119
X_0.1u/25Y/4
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
Date: Sheet
C31
X_0.1u/16Y/4
C31
X_0.1u/16Y/4
of
23 29 Wednesday, July 18, 2007
of
23 29 Wednesday, July 18, 2007
of
23 29 Wednesday, July 18, 2007
5
VGA CONNECTOR
4
3
2
1
D D
HSYNC# 9
VSYNC# 9
C C
5VDDCCL
R96 33R/4 R96 33R/4
5V_VSYNC
R100 27R0402 R100 27R0402
5V_HSYNC
R101 27R0402 R101 27R0402
5VDDCDA
R103 33R/4 R103 33R/4
B B
VCC5
C134 X_0.1u/25Y/4 C134 X_0.1u/25Y/4
5 3
VCC
VCC
1
A
A
2
B
B
GND
GND
VCC5
5 3
VCC
VCC
1
A
A
2
B
B
GND
GND
5V_HSYNC
4
Y
Y
U7
U7
NC7WZ08
NC7WZ08
DAC_SCL 9
C139 X_0.1u/25Y/4 C139 X_0.1u/25Y/4
5V_VSYNC 5VDDCDA
4
Y
Y
U6
U6
NC7WZ08
NC7WZ08
DAC_SDAT 9
VCC3
VCC3 VCC3
R212
R212
39K/4
39K/4
G
D S
Q26
Q26
N-2N7002_SOT23
N-2N7002_SOT23
G
D S
Q21
Q21
N-2N7002_SOT23
N-2N7002_SOT23
5VDDCCL
close VGA connector
FS2
FS2
1.1A_microSMD110
1.1A_microSMD110
1 2
2
D5
3
BAV99D5BAV99
1
2
D7
3
BAV99D7BAV99
R97
R97
15K/4
1
15K/4
C100P50N0402
C100P50N0402
C112
C100P50N0402
C112
C100P50N0402
VCC5 VCC5 VCC5
VCC5
C130
C130
X_1u/16V/8
X_1u/16V/8
R110
R110
15K/4
15K/4
VGA
VGA
VGA_15
15
VGA_14
14
VGA_13
13
VGA_12
C137
C137
C142
C100P50N0402
C142
C100P50N0402
12
C169
C100P50N0402
C169
C100P50N0402
11
C125
C125
0.1u/25Y/4
0.1u/25Y/4
5
10
4
VGA_9
9
VGA_B
3
8
VGA_G
2
7
VGA_R
1
6
CONN1
CONN1
16 17
VCC3
VCC3
VCC3
D9
BAV99D9BAV99
231
D6
BAV99D6BAV99
231
D8
BAV99D8BAV99
231
L7 120nH/300mAL7 120nH/300mA
C149
C149
C10P50N
C10P50N
L8 120nH/300mAL8 120nH/300mA
C156
C156
C10P50N
C10P50N
L9 120nH/300mAL9 120nH/300mA
C164
C164
C10P50N
C10P50N
C148
C148
C10P50N
C10P50N
C152
C152
C10P50N
C10P50N
C158
C158
C10P50N
C10P50N
R162
R162
150R/1/4
150R/1/4
R169
R169
150R/1/4
150R/1/4
R171
R171
150R/1/4
150R/1/4
B9
G9
R9
A A
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
24 29 Friday, July 27, 2007
of
24 29 Friday, July 27, 2007
of
24 29 Friday, July 27, 2007
5
1.R561,R560 change to 75ohm, C601, C602,C616,C618 change to size 0402,C601,C602 mount 470pf.
2.EC33 change to 470uf in smaller size.
3.delete two capacitors from AVDD_USB power to ground.
4.Remove pull up resistor of LPC_FRAME#.
5.Remove pull up resistor from MS-6's pin47.
6.Remove pull up resistor from PCI_CLK4.
7.R7,C8 change PN and Value。
8.MH4 connect to GNDF.
9.Test point change footprint .
10.remove SID pullup resistor.
11.put C46 between Thermda_cpu and Thermdc_cpu.
12.remove resistor of PCI-EX1 pin B9 .
13.leave BMREQ# not connect.
14.remove R182 ---the series resistor of the DAC_SCL.
D D
15.R239 change to 10Kohm.
16.CP40 instead of the original resistor in the same position.
17.CN5,CN6 swap lines.------0410
18.change footprint of Heatsink of NB.-----0410
19.R335 change to 510ohm.------0410
20.reserved R393.------0410
21.add a net USB_OCP#2-----0411
22.remove the reserved resistors in IDE connector part.---0411
23.update U8 footprint.-----0412
24.remove LDT_RST#\PWRGD\STOP# 's pullup resistor array.------0412
25.add two hole for audio.------0413
update All
26.remove pci-Ex1 and USB4,5.-------0511
27.VGA protect diode change position.------0511
28.KB MS VGA change to normal.------0511
29.C50 change footprint.------0521
30.C1206 size change to C0805 except VRM part-----0606
31.EMI----0608
32.6port change to 2 X 3port------0608
C C
4
3
2
1
B B
A A
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet of
5
4
3
2
Date: Sheet of
1
of
25 29 Wednesday, July 18, 2007
25 29 Wednesday, July 18, 2007
25 29 Wednesday, July 18, 2007
5
U32_X1
U32_X1
D D
1
Heatsink
Heatsink
RS690
RS690
X_NB_HEATSINK
X_NB_HEATSINK
4
4
PCB1
PCB1
P80-0738210-D05
P80-0738210-D05
PCB
PCB
3
VBAT1-S1
VBAT1-S1
BAT-BCR2032P-RH
BAT-BCR2032P-RH
2
CPU5
CPU5
_E91-0000076
_E91-0000076
1
P80-0738210-D05
C C
B B
A A
Optics Orientation Holes
FM1
FM1
FM2
FM2
X_FM120
X_FM120
X_FM120
X_FM120
X_FM120
X_FM120
FM3
FM3
FM4
FM4
X_FM100
X_FM100
X_FM100
X_FM100
X_FM100
X_FM100
FM11
FM11
FM12
FM12
FM13
X_FM120
X_FM120
FM13
X_FM120
X_FM120
4
FM8
FM8
FM9
FM9
FM10
FM10
X_FM120
X_FM120
X_FM120
FM7
FM7
X_FM100
X_FM100
X_FM120
X_FM120
X_FM120
FM5
FM5
FM6
FM6
X_FM100
X_FM100
5
Mounting Holes
R206 0/4 R206 0/4
R205 0/4 R205 0/4
Simulation
981
MH1MH1
7
2
6
3
5
4
981
MH4MH4
7
2
6
3
5
4
3
981
MH2MH2
7
2
L57
6
5
MH5MH5
7
6
5
L57
3
60L800mA-100-RH
60L800mA-100-RH
L58
L58
4
60L800mA-100-RH
60L800mA-100-RH
981
2
3
4
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet of
2
Date: Sheet of
VCC5
X_JS1X_JS1
1
SIM1
2
X_JS2X_JS2
1
SIM2
2
of
26 29 Friday, July 27, 2007
26 29 Friday, July 27, 2007
26 29 Friday, July 27, 2007
1
5
4
AMD K9 940
3
2
VRM 10.1
ISL6566CR
3-Phases PWM
1
PWROK MAP
D D
HT_CPU_PWRGD
RS485/690
PWM_EN
VRM_GD
HT_PWRGD
C C
HT_VLD
HTVDD_EN
CPU_VLD
HT_MCP_PWRGD
MEM_VLD
SB460/600
CPUVDD_EN
B B
RSMRST#
SLP_S5#
SLP_S3#
PWRBTN#
ATX_PWR_OK
Front Panel
MS6
PSIN#
PS_ON#
ATX_PWR_OK
POWER CONN
A A
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
of
27 29 Wednesday, July 18, 2007
of
27 29 Wednesday, July 18, 2007
of
27 29 Wednesday, July 18, 2007
1
5
4
3
2
1
M2
0.8V - 1.55V Core
D D
VLDT 1.2V
- 95A
- 0.5A
RS690C
+1.2V REGULATOR
+1.8V_S0
C C
- 10A
-850mA
SB460/600
+1.2V REGULATOR - TBD A
ISL6566
VCCP
0.8375V-1.6000V
2-Phase Switch
VRM 10.1
W83310DS
VTT_DDR
Linear
0.9V 1.5A
MS6 Regulator
VCC3_SB
Linear 3.3V
1.5A
HD AUDIO
+12V - 1.0A
5VDUAL1,2
Linear 5V
22mA
+3.3V DUAL
RTC
5V
B B
- TBD A
- 5uA (G3)
- TBD A
- 200 mA 1.2V DUAL
CLOCKGEN - 1.0A
MS11 Regulator
VCC_DDR
1.8V
(S3) Linear
20A Switch
425mA
USB
(S0,S1) -1.0A +5V
front
rear
-2.0A
- 20mA (S3) +5V
PS2
(S0,S1) +5V - 345mA
3V
+5VSB +12V +5V +3.3V
Battery
A A
5
4
ATX POWER
3
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
- 2.0mA (S3) +5V
of
28 29 Wednesday, July 18, 2007
of
28 29 Wednesday, July 18, 2007
of
28 29 Wednesday, July 18, 2007
1
5
4
3
2
1
K9 SKT 940
CPU RST*
D D
CPU PWRGD
RS485/690
AC97 Audio
RESET*
CPU_PWRGD
CPU_RST#
HT_MCP_PWRGD
HT_MCP_RST*
HT_MCP_RST*
HT_MCP_PWRGD
PCIRST_SLOT0*
PCIRST_SLOT1*
MS6_RST*
1394_RST*
SLP S3*
SIO_RST*
LPC_RST*
SIO FLASH
PRI IDE
SEC IDE
RESET MAP
MS6
HD_RST#
PCI SLOT 2
1394
PCI SLOT 1
PE_RST*
PEX X1
C C
PEX X16
PE_RESET*
HT CPU PWRGD
HT CPU RST*
HT MCP PWRGD
HT MCP RST*
RESET SWITCH
SB460/600
PWR CONN
PS ON
PWR GOOD
B B
FPRST#
POWER_GOOD
RSMRST#
RSTBTN
PWRGD
PWRGD_SB
GPIO_AUX*
HT MCP RST*
HT MCP PWRGD
PCI RST0*
PCI RST1*
PCI RST2*
PCI RST3*
SLP S3*
LPC_RST*
AC_RESET*
A A
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7382 0A
Custom
MS-7382 0A
Custom
MS-7382 0A
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
of
29 29 Wednesday, July 18, 2007
of
29 29 Wednesday, July 18, 2007
of
29 29 Wednesday, July 18, 2007
1