MSI MS-7379 Schematics
1
MS-7379
uATX
PCB Size 244*215mm(OSP)
Version :2.1
CPU:
Intel Pentium 4, Pentium D, Core2 Duo,
1Cover Sheet
Block Diagram/Clock Map/Power Map
Intel LGA775 CPU
Intel Bearlake G31 - MCH
Intel ICH7 - PCI & DMI & CPU & IRQ
Intel ICH7 - LPC & ATA & USB & GPIO 13
Intel ICH7 - POWER
Clock Gen- RTM876-660
LPC I/O - F71882FG
Azalia - ALC883/888/861D/660
LAN REALTEK RTL8101E/8111B
DDR II System Memory 1 & 2
DDR II VTT Decoupling
A A
PCI EXPRESS X16 &X1 Slot
PCI Slot 1 & 2
ATA33/66/100 IDE & SATA Connectors
VGA connector
USB Connectors
ATX Connetcor & Front Panel & Fan
UPI & SYSTEM POWER
VRM 11 -ST L6703
HISTORY
AutoBOM parts
2-4
5-7
8-11
12
14
15
16
17
18
19-20
21
22
23
24
25
26
27
28-29
30
31
32-35
System Chipset:
On Board Chipset:
Main Memory:
Expansion Slots:
RICH PWM:
Wolfdale, Kentsfield processors in
LGA775 Package.
Intel Bearlake G31 - MCH (North Bridge)
Intel ICH7/ICH7R (South Bridge)
BIOS -- SPI 4M EEPROM
Aliza Codec -- ALC883/888/861D/660
LPC Super I/O -- F71882FG
LAN-- REALTEK RTL8101E/8111B
Clock Gen- RTM876-660
Dual Channel DDR II * 2 (Max 2GB)
PCI2.2 SLOT * 2
PCI EXPRESS X16 SLOT
PCI EXPRESS X1 SLOT
Controller: ST L6703
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
1
Date: Sheet
COVER SHEET
COVER SHEET
COVER SHEET
MS-7379
MS-7379
MS-7379
2.1
2.1
2.1
of
135Monday, October 15, 2007
of
135Monday, October 15, 2007
of
135Monday, October 15, 2007
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MSI
Title
Title
Block Diagram
1
VRM 11
ST L6703
3-Phase PWM
PCI EXPRESS
X16
Connector
PCI EXPRESS X16
Intel LGA775 Processor
FSB 800/1066
133/200/266
MHz
FSB
DDR2 667/800
DDRII
2 DDR II
DIMM
Modules
Bearlake G31
Analog
RGB(GZ only)
GMCH
Video Out
DMI
UltraDMA
33/66/100
IDE Primary
A A
SATAII 0~3
SATA
USB
ICH7/ICH7R
USB Port 0~7
HD Audio
ALC883/888/
LPC Bus
861D/660
333/400
MHz
PCI
PCI EXPRESS X1
PCI Slot 1
PCI Slot 2
PCI EXPRESS X1
REALTEK
RTL8101E
RTL8111B
PCIE
SPI 4M
FLASH ROM
SPI
LPC SIO
Fintek
71882FG
Keyboard
Mouse
1
Floopy Parallel Serial
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
MS-7379
MS-7379
MS-7379
of
235Monday, October 15, 2007
of
235Monday, October 15, 2007
of
235Monday, October 15, 2007
2.1
2.1
2.1
5
4
3
2
1
CLOCK MAP
D D
CPUCLK
MCHCLK
LGA775
Bearlake G31
CHANNEL A
CHANNEL A #
DDR II DIMMx2
MCH
PCIE_MCH_100MHz
CHANNEL B
CHANNEL B#
DOTCLK 96MHz
C C
Clock
PCI_E1_100MHz
PCI_E1
PCI-Express X 16
Generator
PCI_E2_100MHz
PCI_E2
PCI-Express X 1
RTM876-660
ICHPCICLK
SATACLK
USB48MHz
B B
ICH14.318MHz
ICH7
PCIE_ICH_100MHz
SIO48MHz
Fintek
SIOPCI33MHz
PCIE_LAN 100MHz
LPC IO
REALTEK
8101E/8111B
A A
PCI1
PCICLK[0..1] 33MHz
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
PCI2
Title
Title
Title
Size Document Number Rev
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Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
CLOCK MAP
CLOCK MAP
CLOCK MAP
MS-7379
MS-7379
MS-7379
1
of
335Wednesday, October 17, 2007
of
335Wednesday, October 17, 2007
of
335Wednesday, October 17, 2007
2.1
2.1
2.1
5
4
3
2
1
CedarMill / Smithfield
0.8375V - 1.6000V Core
D D
1.2V FSB Vtt
- 125A
- 5.3A
Bearlake G31
- 1.0 A1.2V FSB_VTT
- 18.1A1.25V Core
- 2.47 A1.25V DMI/PCI Exp.
1.8V VCC_SMCLK - 250mA
3.3V VCCA_DAC
3.3V VCC33
(S0,S1)
- 3.2A1.8V VCC_DDR
- 65.8mA
- 15.8mA
1.25V Vcc CL - 4.3 A
ICH7
C C
B B
1.05V Core -1.31A
V5REF - 6 mA
1.2V FSB_VTT
- 14 mA
- 0.97A1.5V_A USB/SATA
- 0.74A1.5V_B PCI Exp.
VCCRTC (G3) - 6 uA
V5REF _SUS - 10 mA
- 0.7AVCCSUS3_3
- 0.33AVCC3_3
HD Audio ALC888
3.3V AUDIO
5V AUDIO
CLK GEN RTM876-660
3.3V VDD_48/PCI/REF
- 40mA
- 50mA
- 250mA
- 80mA0.3V - 1V CPU/SRC/DOT/PLL
RTL8101E/8111B
3.3V_SB I/O & LED
1.8V ANALOG - 660mA
- 620mA
5VAUD
5V
500mA
ST L6703
VCCP
0.8375V-1.6000V
3-Phase Switch
W83310DS
VTT_DDR
0.9V
VRM 10.1
Linear
125A
0.6
uP6103 Regulator
V_1P25_CORE
1.25V
PWM
6.3A +18.1A +2.47A
+4.3A + 1.31A
V_1P25_CORE
1.25V
V_FSB_VTT
V_1P5_ICH
V_1P05_ICH
VCC3_SB
5VDUAL
5V
5VSB
5VDIMM
5V
5VSB
Linear1.5V
Switch
Switch
21.34ALinear
6.2A1.2V Linear
4.2A +
21.34A
+ 2A
2 A1.05V Linear
1.5ALinear3.3V
500mA
500mASwitch
5A
15ASwitch
DDRII x2 & TERMINATOR
0.9V VTT_DDR
1.8V VCC_DDR
1.8V VCC_DDR
(S0,S1)
(S3)
PCI Express x16 slot
+12V
+3.3Vaux
+3.3Vaux
(wake)
(no wake)
+3.3V
PCI slot x2
+3.3Vaux
+3.3Vaux
+3.3V
+5V
+12V
(wake)
(no wake)
PCI Express x 1 slot
+12V
+3.3Vaux
+3.3Vaux
(wake)
(no wake)
+3.3V
USB x8
(S0,S1)+5V
(S3)+5V
PS2
+5V
(S0,S1)
(S3)+5V
- 1.2A
-4.7A
-400mA
- 5.5 A
- 375mA
- 20mA
- 3.0A
- 375mA
- 20mA
- 7.6A
- 5A
- 0.4A
- 0.5A
- 375mA
- 20mA
- 3.0A
- 4.0A
- 20mA
- 345mA
- 2.0mA
+12V
+5VSB +12V+5V +3.3V
3V
Battery
A A
5
4
ATX
2x2
ATX POWER
3
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
POWER MAP
POWER MAP
POWER MAP
MS-7379
MS-7379
MS-7379
1
2.1
2.1
2.1
of
435Wednesday, October 17, 2007
of
435Wednesday, October 17, 2007
of
435Wednesday, October 17, 2007
5
CPU SIGNAL BLOCK
H_A#[3..35]8
H_D#[0..63]8
H_DBI#[0..3]8
H_REQ#[0..4]8
D D
CPU_GTLREF26
H_IERR#6
H_FERR#6,12
H_STPCLK#12
H_DBSY#8
H_DRDY#8
H_TRDY#8
H_ADS#8
H_LOCK#8
H_BNR#8
H_HITM#8
H_DEFER#8
THERMDA16
THERMDC16
TRMTRIP#6,12
C C
B B
H_PROCHOT#6
CPU_GTLREF36
R68 X_51R0402R68 X_51R0402
H_BPM#2
R66 X_0R0402R66 X_0R0402
BSEL Table
H_IGNNE#12
ICH_H_SMI#12
H_A20M#12
CPU_BSEL015
CPU_BSEL115
CPU_BSEL215
H_PWRGD6,12
H_CPURST#6,8
H_A#[3..35]
H_D#[0..63]
H_DBI#[0..3]
H_REQ#[0..4]
VID[0..7]
VID[0..7]30
H_RS#[0..2]
H_RS#[0..2]8
U5A
A8
G11
D19
C20
F2
AB2
AB3
R3
M3
AD3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
AD1
AF1
AC1
AG1
AE1
AL1
AK1
M2
AE8
AL2
N2
P2
K3
L2
AH2
N5
AE6
C9
G10
D16
A20
Y1
V2
AA2
G29
H30
G30
N1
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
U5A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
H_D#53
D53#
B15
C14
H_D#52
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
CPU_GTLREF2
H_IERR#
H_FERR#
H_STPCLK#
H_INIT#
H_INIT#12
H_DBSY#
H_DRDY#
H_TRDY#
H_ADS#
H_LOCK#
H_BNR#
H_HIT#
H_HIT#8
H_HITM#
H_BPRI#
H_BPRI#8
H_DEFER#
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
THERMDA
THERMDC
TRMTRIP#
H_PROCHOT#
H_IGNNE#
ICH_H_SMI#
H_A20M#
H_TESTHI13
H_TEST
CPU_GTLREF3
CPU_BOOTSLT
CPU_AA2 H_COMP1
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
H_PWRGD
H_CPURST#
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
FSB Frequence
012
200Mhz (800)
0
1
133Mhz (533)
0001
D52#
H_A#31
H_A#30
H_A#28
H_A#29
H_A#26
H_A#24
H_A#25
H_A#27
H_A#23
H_A#22
H_A#21
A28#
D41#
H_A#20
AF5
AB4
AC5
AB5
AA5
AD6
AA4
A27#
A26#
A25#
A24#
A23#
A22#
A21#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
F18
F17
E19
E18
E16
E15
G17
G18
H_D#40
H_D#39
H_D#38
H_D#37
H_D#33
H_D#34
H_D#35
H_D#36
H_A#35
H_A#34
H_A#33
H_A#32
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
A35#
A34#
A33#
A32#
A31#
A30#
A29#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
F21
A14
C15
D17
H_D#51
H_D#50
H_D#49
F20
E22
E21
D20
D22
G22
G21
H_D#45
H_D#44
H_D#43
H_D#42
H_D#41
H_D#48
H_D#47
H_D#46
H_A#19
H_A#17
H_A#18
A20#Y4A19#Y6A18#W6A17#
D33#
D32#
D31#
G16
G15
H_D#30
H_D#31
H_D#32
H_A#15
H_A#16
H_A#14
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D30#
D29#
D28#
D27#
F15
F14
G14
G13
H_D#27
H_D#28
H_D#29
H_A#13
H_D#26
4
H_A#8
H_A#10
H_A#7
H_A#6
H_A#5
H_A#4
H_A#9
U6
D24#
D23#
F12
F11
D10
H_D#22
H_D#23
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
E10
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_A#3
AM7
AN4
L5
AC2
AN3
AJ3
AK3
AM5
AL4
AK4
AL6
AM3
AL5
RSVD#AM7
H_D#4
VID6#
VID5#
H_D#2
H_D#3
VID_SELECT
GTLREF_SEL
H_D#1
AM2
VID4#
VID3#
VID2#
VID1#
VID0#
GTLREF0
GTLREF1
GTLREF2
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD#G6
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
B4
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
H_D#0
AN7
H1
H2
H29
E24
AG3
AF2
AG2
AD2
AJ1
AJ2
G5
J6
K6
M6
J5
K4
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
AN6
AN5
DBR#
ITP_CLK1
ITP_CLK0
VSS_SENSE
VCC_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D14#
D13#
D12#D8D11#
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B12
B10
A11
A10
D11
C12
C11
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_A#11
H_A#12
D26#
D25#
E13
D13
H_D#24
H_D#25
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
PECI
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI_M
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
CPUCLK#
CPUCLK
H_RS#2
H_RS#1
H_RS#0
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP0
H_ADSTB#1
H_ADSTB#0
H_DSTBP#3
H_DSTBP#2
H_DSTBP#1
H_DSTBP#0
H_DSTBN#3
H_DSTBN#2
H_DSTBN#1
H_DSTBN#0
H_NMI
H_INTR
3
VCC_VRM_SENSE
VSS_VRM_SENSE
VID_SELECT
CPU_GTLREF0
CPU_GTLREF1
R101 51R0402R101 51R0402
R142 51R0402R142 51R0402
R77 51R0402R77 51R0402
R144 51R0402R144 51R0402
R63 X_130R0402R63 X_130R0402
R94 X_51R0402R94 X_51R0402
CPUCLK# 15
CPUCLK 15
T5T5
T4T4
R80 X_49.9R1%0402R80 X_49.9R1%0402
R97 X_49.9R1%0402R97 X_49.9R1%0402
R87 49.9R1%0402R87 49.9R1%0402
R105 49.9R1%0402R105 49.9R1%0402
R85 49.9R1%0402R85 49.9R1%0402
R135 49.9R1%0402R135 49.9R1%0402
T8T8
T6T6
T9T9
T7T7
H_NMI 12
H_INTR 12
T10T10
T14T14
H_BPM#0 7
PECI 16
RN8
RN8
8P4R-51R0402
8P4R-51R0402
1
2
3
4
5
6
7
8
H_ADSTB#1 8
H_ADSTB#0 8
H_DSTBP#3 8
H_DSTBP#2 8
H_DSTBP#1 8
H_DSTBP#0 8
H_DSTBN#3 8
H_DSTBN#2 8
H_DSTBN#1 8
H_DSTBN#0 8
VCC_VRM_SENSE 30
VSS_VRM_SENSE 30
VID_SELECT 30
CPU_GTLREF0 6
CPU_GTLREF1 6
H_TESTHI_M 7
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT
H_BR#0 6,8
VTT_OUT_LEFT
C64
C64
C0.1U25Y0402
C0.1U25Y0402
2
VTT_OUT_RIGHT
RN3
RN3
8P4R-680R
8P4R-680R
VID1
1
3
5
7
1
3
5
7
VID_SELECT
H_TMS
H_TDI
H_BPM#2
H_TCK
H_TDO
H_BPM#4
H_TRST#
H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
2
4
6
8
2
4
6
8
RN2
RN2
8P4R-680R
8P4R-680R
V_FSB_VTT
R93 51R0402R93 51R0402
R92 X_0R0402R92 X_0R0402
R475 0R0402R475 0R0402
R476 0R0402R476 0R0402
R71 X_0R0402R71 X_0R0402
R59 0R0402R59 0R0402
R61 X_51R0402R61 X_51R0402
RN6
RN6
2
4
6
8
8P4R-51R0402
8P4R-51R0402
RN5
RN5
2
4
6
8
8P4R-51R0402
8P4R-51R0402
RN4
RN4
2
4
6
8
8P4R-51R0402
8P4R-51R0402
C49
C49
C0.1U25Y0402
C0.1U25Y0402
R27
R27
680R0402
680R0402
R26
R26
X_62R0402
X_62R0402
VTT_OUT_RIGHT
1
3
5
7
VTT_OUT_RIGHT
1
3
5
7
VTT_OUT_RIGHT
1
3
5
7
H_TESTHI13
H_TESTHI8H_BPM#3
H_TESTHI9H_BPM#2
H_TESTHI9
H_TEST
H_TEST
C54
C54
C0.1U25Y0402
C0.1U25Y0402
C52
C52
C0.1U25Y0402
C0.1U25Y0402
VID0
VID5
VID6
VID7
VID3
VID4
VID2
VTT_OUT_LEFT
H_CPUSLP#12
H_BPM#3
H_BPM#1
VTT_OUT_LEFT
PLACE BPM/TCK/TDI/TMS TERMINATION NEAR CPU
PLACE TDO TERMINATION NEAR CONNECTOR
1
A A
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Signals
MS-7379
MS-7379
MS-7379
1
of
535Monday, October 29, 2007
535Monday, October 29, 2007
535Monday, October 29, 2007
2.1
2.1
2.1
5
VCCP
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
U5B
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
U5B
VCCP
VCC#AF19
VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11
VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11
VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23
VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23
VCC#AB8
VCC#AA8
VCC#AF9
VCC#AF8
VCC#AF22
VCC#AF21
VCC#AG12
VCC#AG11
VCC#Y26
VCC#Y27
VCC#Y28
VCC#Y29
VCC#Y30
VCC#Y8
Y8
Y25
Y26
Y27
Y28
Y29
Y30
VCC#AG25
VCC#AG22
VCC#AG21
VCC#AG19
VCC#AG18
VCC#AG15
VCC#AG14
VCC#W28
VCC#W29
VCC#W30
VCC#W8W8VCC#Y23
VCC#Y24
VCC#Y25
Y23
Y24
W28
W29
W30
VCCP
D D
C C
W27
AG9
AG8
VCC#AG9
VCC#AG8
VCC#AH18
VCC#AH15
VCC#AH14
VCC#AH12
VCC#AH11
VCC#AG30
VCC#AG29
VCC#AG28
VCC#AG27
VCC#AG26
VCC#U26
VCC#U27
VCC#U28
VCC#U29
VCC#U30
VCC#U8U8VCC#V8V8VCC#W23
VCC#W24
VCC#W25
VCC#W26
VCC#W27
U26
U27
U28
U29
U30
W23
W24
W25
W26
VCC#AH27
VCC#AH26
VCC#AH25
VCC#AH22
VCC#AH21
VCC#AH19
VCC#T29
VCC#T30
VCC#T8T8VCC#U23
VCC#U24
VCC#U25
T29
T30
U23
U24
U25
AH28
VCC#AH28
VCC#T28
T28
AH29
VCC#AH29
VCC#T27
T27
AH30
VCC#AH30
VCC#T26
T26
AH8
T25
VCC#AH8
VCC#T25
AH9
T24
VCC#AH9
VCC#T24
4
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
VCC#AJ8
VCC#AJ11
VCC#AJ12
VCC#AJ14
VCC#AJ15
VCC#AJ18
VCC#N30
VCC#N8N8VCC#P8P8VCC#R8R8VCC#T23
T23
N29
N30
VCC#AJ9
VCC#AJ19
VCC#AJ21
VCC#AJ22
VCC#AJ25
VCC#AJ26
VCC#AK11
VCC#AK12
VCC#AK14
VCC#AK15
VCC#AK18
VCC#AK19
VCC#M26
VCC#M27
VCC#M28
VCC#M29
VCC#M30
VCC#M8M8VCC#N23
VCC#N24
VCC#N25
VCC#N26
VCC#N27
VCC#N28
VCC#N29
N23
N24
N25
N26
N27
N28
M26
M27
M28
M29
M30
AK21
AK22
AK25
VCC#AK21
VCC#AK22
VCC#AK25
VCC#M24
VCC#M25
M23
M24
M25
AK8
AK9
AK26
VCC#AK8
VCC#AK9
VCC#AK26
VCC#K30
VCC#K8K8VCC#L8L8VCC#M23
K30
AL11
VCC#AL11
VCC#K29
K29
AL12
VCC#AL12
VCC#K28
K28
AL14
VCC#AL14
VCC#K27
K27
AL15
VCC#AL15
VCC#K26
K26
AL18
K25
3
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN8
VCC#AN12
VCC#AN8
VCC#AN14
VCC#AN30
AN30
VCC#AN15
VCC#AN29
AN29
AN22
VCCA
VSSA
VCC#AN18
VCC#AN19
VCC#AN21
VCC#AN22
VCCPLL
VCC-IOPLL
VTT#A25
VTT#A26
VTT#A27
VTT#A28
VTT#A29
VTT#A30
VTT#B25
VTT#B26
VTT#B27
VTT#B28
VTT#B29
VTT#B30
VTT#C25
VTT#C26
VTT#C27
VTT#C28
VTT#C29
VTT#C30
VTT#D25
VTT#D26
VTT#D27
VTT#D28
VTT#D29
VTT#D30
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD#F29
VCC#AN25
VCC#AN26
1122334
AN25
AN26
AM8
AM11
AM12
AM14
AM15
AM18
AM19
AL8
AL22
VCC#AL22
AL25
VCC#AL25
VCC#J8J8VCC#J9J9VCC#K23
AL26
VCC#AL26
VCC#J30
J30
AL29
VCC#AL29
VCC#J29
J29
AL30
VCC#AL30
VCC#J28
J28
AL9
VCC#AL8
VCC#AL9
VCC#J26
VCC#J27
J26
J27
AL19
AL21
VCC#AL18
VCC#AL19
VCC#AL21
VCC#K24
VCC#K25
K23
K24
AM21
VCC#AM11
VCC#AM12
VCC#AM14
VCC#AM15
VCC#AM18
VCC#AM19
VCC#AM21
VCC#J19
VCC#J20
VCC#J21
VCC#J22
VCC#J23
VCC#J24
VCC#J25
J19
J20
J21
J22
J23
J24
J25
AM9
AM22
AM25
AM26
AM29
AM30
VCC#AM8
VCC#AM9
VCC#AM22
VCC#J18
J15
J18
VCC#AN11
VCC#AM25
VCC#AM26
VCC#AM29
VCC#AM30
VCC#AN9
VCC#J10
VCC#J11
VCC#J12
VCC#J13
VCC#J14
VCC#J15
J10
J11
J12
J13
J14
AN9
A23
B23
D23
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6
AA1
J1
F27
F29
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
4
2
H_VCCA
H_VSSA
H_VCCPLL
H_VCCA
VTT_PWG
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
VCCA ------ 120mA
VCCIOPLL -- 100mA
V_FSB_VTT
VTT_OUT_RIGHT VTT_OUT_LEFT
VTT_SEL 29
1
V_FSB_VTT
C152
C152
C10U10Y0805
C10U10Y0805
C147
C147
X_C10U10Y0805
X_C10U10Y0805
C156
C156
X_C22U6.3X1206
X_C22U6.3X1206
CAPS FOR FSB GENERIC
VTT_OUT_RIGHT
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
VTT_OUT_RIGHT
B B
VTT_OUT_LEFT
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
V_FSB_VTT
DESIGN NOTE:
Reserve for Future CPU use;
Product may tie GTLREFS together
VTT_OUT_RIGHT
VTT_OUT_RIGHT CPU_GTLREF1_R
VTT_OUT_LEFT
V_FSB_VTT
R82 115R1%0402R82 115R1%0402
R83 115R1%0402R83 115R1%0402
R81 115R1%0402R81 115R1%0402
R58 115R1%0402R58 115R1%0402
PLACE AT CPU END OF ROUTE
A A
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_OUT_RIGHT
VTT_OUT_LEFT
R60 130R1%0402R60 130R1%0402
R72 62R0402R72 62R0402
R75 62R0402R75 62R0402
R88 X_100R0402R88 X_100R0402
R103 62R0402R103 62R0402
PLACE AT ICH END OF ROUTE
V_FSB_VTT
V_FSB_VTT TRMTRIP#
5
R320 62R0402R320 62R0402
R326 62R0402R326 62R0402
CPU_GTLREF0_R
R86
R86
200R1%0402
200R1%0402
R90
R90
200R1%0402
200R1%0402
CPU_GTLREF2_R
R78
R78
200R1%0402
200R1%0402
CPU_GTLREF3_R
R62
R62
200R1%0402
200R1%0402
R99 10R0402R99 10R0402
R96 10R0402R96 10R0402
R70 10R0402R70 10R0402
R65 10R0402R65 10R0402
H_PROCHOT#
H_IERR#
H_CPURST#
H_PWRGD
H_BR#0
H_FERR#
C73
C73
C1U16Y
C1U16Y
C66
C66
C1U16Y
C1U16Y
C58
C58
C1U16Y
C1U16Y
C48
C48
C1U16Y
C1U16Y
TRMTRIP# 5,12
H_FERR# 5,12
C76
C76
X_C220P16X0402
X_C220P16X0402
C75
C75
X_C220P16X0402
X_C220P16X0402
C57
C57
X_C220P16X0402
X_C220P16X0402
C53
C53
X_C220P16X0402
X_C220P16X0402
H_PROCHOT# 5
H_IERR# 5
H_CPURST# 5,8
H_PWRGD 5,12
H_BR#0 5,8
4
R67
R67
X_0R0402
X_0R0402
CPU_GTLREF3 5
CPU_GTLREF0 5
CPU_GTLREF1 5
R89
R89
X_0R0402
X_0R0402
CPU_GTLREF2 5
3
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
V_FSB_VTT
V_1P5_CORE
L7
L7
X_10U100m_0805
X_10U100m_0805
21
CP3 X_COPPERCP3 X_COPPER
CP4
CP4
X_COPPER
X_COPPER
VID_GD#29,30
C133
C133
C1U16Y
C1U16Y
C134
C134
X_C10U10Y0805
X_C10U10Y0805
VCC5_SB VTT_OUT_LEFT
R47
R47
1KR0402
1KR0402
R55 10KR0402R55 10KR0402
C122
C122
X_C10U10Y0805
X_C10U10Y0805
C125
C125
X_C0.1U16Y0402
X_C0.1U16Y0402
R57
R57
680R0402
680R0402
CE
Q4
Q4
B
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
H_VCCPLL
2
H_VCCA
C127
C127
C10U10Y0805
C10U10Y0805
H_VSSA
1.25V VTT_PWRGOOD
VTT_PWG
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MSI
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
MS-7379
MS-7379
MS-7379
2.1
2.1
2.1
of
635Monday, October 29, 2007
of
635Monday, October 29, 2007
of
635Monday, October 29, 2007
1
5
4
3
2
1
2005 Performance
FMB platform 1
2005 Mainstream/Value
FMB platform 2
2006 65W FMB
platform 3
MSID1 0 0 0
MSID0 0 NC NC
D D
C C
B B
VTT_OUT_RIGHT
TP_CPU_A24
R132
R132
X_1KR0402
X_1KR0402
VTT_OUT_RIGHT
R73
R73
X_49.9R1%0402
X_49.9R1%0402
U5C
U5C
A12
VSS#A12
A15
VSS#A15
A18
VSS#A18
A2
VSS#A2
A21
VSS#A21
A24
VSS#A24
A6
VSS#A6
A9
VSS#A9
AA23
VSS#AA23
AA24
VSS#AA24
AA25
VSS#AA25
AA26
VSS#AA26
AA27
VSS#AA27
AA28
VSS#AA28
AA29
VSS#AA29
AA3
VSS#AA3
AA30
VSS#AA30
AA6
VSS#AA6
AA7
VSS#AA7
AB1
VSS#AB1
AB23
VSS#AB23
AB24
VSS#AB24
AB25
VSS#AB25
AB26
VSS#AB26
AB27
VSS#AB27
AB28
VSS#AB28
AB29
VSS#AB29
AB30
VSS#AB30
AB7
VSS#AB7
AC3
VSS#AC3
AC6
VSS#AC6
AC7
VSS#AC7
AD4
VSS#AD4
AD7
VSS#AD7
AE10
VSS#AE10
AE13
VSS#AE13
AE16
VSS#AE16
AE17
VSS#AE17
AE2
VSS#AE2
AE20
VSS#AE20
AE24
VSS#AE24
AE25
VSS#AE25
AE26
VSS#AE26
AE27
VSS#AE27
AE28
VSS#AE28
H_COMP7
H_COMP6
AE3
COMP6Y3COMP7
VSS#AE29
VSS#AE30
VSS#AE5
AE5
AE29
AE30
R95
R95
51R0402
51R0402
R69
R69
X_49.9R1%0402
X_49.9R1%0402
T12T12
D14
AE4
D1
E23
RSVD#D1
RSVD#E23
RSVD#D14
RSVD#AE4
VSS#AE7
VSS#AF10
VSS#AF13
VSS#AF16
VSS#AF17
AE7
AF10
AF13
AF16
AF17
AF20
T13T13
T11T11
IMPSEL
H_COMP8
F6
E7
F23
IMPSEL#
RSVD#E5E5RSVD#E6E6RSVD#E7
RSVD#F23
VSS#AF20
VSS#AF23
VSS#AF24
VSS#AF25
VSS#AF26
AF23
AF24
AF25
AF26
R134
R134
24.9R1%0402
24.9R1%0402
R79
R79
51R0402
51R0402
J3
B13
RSVD#B13
VSS#AF27
VSS#AF28
VSS#AF29
AF3
AF27
AF28
AF29
P5
N4
RSVD#J3
RSVD#P5
RSVD#N4
VSS#AF3
VSS#AF30
VSS#AF6
AF6
AF7
AF30
MSID1
MSID0
W1
MSID[1]V1MSID[0]
VSS#AF7
VSS#AG10
VSS#AG13
AG10
AG13
R76
R76
51R0402
51R0402
AC4
RSVD#AC4
VSS#AG16
VSS#AG17
VSS#AG20
AG16
AG17
AG20
Y2
VSS#Y7Y7VSS#Y5Y5VSS#Y2
VSS#W7W7VSS#W4
VSS#AG23
VSS#AG24
VSS#AG7
VSS#AH1
AH1
AG7
AG23
AG24
V6
W4
VSS#V7V7VSS#V6
VSS#AH10
VSS#AH13
VSS#AH16
AH10
AH13
AH16
V3
V30
V29
VSS#V3
VSS#V30
VSS#AH17
VSS#AH20
AH17
AH20
AH23
V28
V27
V26
VSS#V29
VSS#V28
VSS#V27
VSS#V26
VSS#AH23
VSS#AH24
VSS#AH3
VSS#AH6
AH3
AH6
AH24
V25
V24
V23
VSS#V25
VSS#V24
VSS#AH7
VSS#AJ10
AH7
AJ10
AJ13
U1
VSS#U7U7VSS#U1
VSS#V23
VSS#AJ13
VSS#AJ16
VSS#AJ17
AJ16
AJ17
CPU_U1
T3
VSS#T7T7VSS#T6T6VSS#T3
VSS#R7R7VSS#R5
VSS#AJ20
VSS#AJ23
VSS#AJ24
VSS#AJ27
AJ20
AJ23
AJ24
AJ27
R74 0R0402R74 0R0402
R5
R30
R29
R28
R27
VSS#R30
VSS#R29
VSS#R28
VSS#R27
VSS#AJ28
VSS#AJ29
VSS#AJ30
VSS#AJ4
VSS#AJ7
AJ4
AJ7
AJ28
AJ29
AJ30
R26
R25
R24
VSS#R26
VSS#R25
VSS#R24
VSS#AK10
VSS#AK13
VSS#AK16
AK10
AK13
AK16
R2
R23
VSS#P7P7VSS#P4
VSS#R2
VSS#R23
VSS#AK17
VSS#AK2
VSS#AK20
AK2
AK17
AK20
H_TESTHI_M
P4
P30
P29
P28
VSS#P30
VSS#P29
VSS#P28
VSS#AK23
VSS#AK24
VSS#AK27
VSS#AK28
AK23
AK24
AK27
AK28
P27
P26
P25
VSS#P27
VSS#P26
VSS#P25
VSS#AK29
VSS#AK30
VSS#AK5
AK5
AK29
AK30
H_TESTHI_M 5
N3
P24
P23
VSS#N7N7VSS#N6N6VSS#N3
VSS#M7M7VSS#M1
VSS#P24
VSS#P23
VSS#AK7
VSS#AL10
VSS#AL13
VSS#AL16
VSS#AL17
VSS#AL20
AK7
AL10
AL13
AL16
AL17
AL20
L6
M1
VSS#L7L7VSS#L6
VSS#AL23
VSS#AL24
VSS#AL27
AL23
AL24
AL27
L3
L30
L29
VSS#L3
VSS#L30
VSS#AL28
VSS#AL3
AL3
AL7
AL28
L28
L27
VSS#L29
VSS#L28
VSS#L27
VSS#AL7
VSS#AM1
VSS#AM10
AM1
AM10
L26
L25
VSS#L26
VSS#L25
VSS#AM13
VSS#AM16
AM13
AM16
L24
L23
VSS#L24
VSS#L23
VSS#AM17
VSS#AM20
AM17
AM20
K2
K5
VSS#K7K7VSS#K5
VSS#AM23
VSS#AM24
AM23
AM24
AM27
J7
VSS#K2
VSS#AM27
VSS#AM28
AM4
AM28
H9
VSS#J4J4VSS#J7
VSS#AM4
H7
H8
VSS#H7
VSS#H8
VSS#H9
VSS#AN1
VSS#AN10
AN1
AN10
H3
H6
VSS#H3
VSS#H6
VSS#AN13
VSS#AN16
AN13
AN16
AN17
H26
H27
H28
VSS#H27
VSS#H28
VSS#AN17
VSS#AN2
VSS#AN20
AN2
AN20
AN23
H23
H24
H25
VSS#H24
VSS#H25
VSS#H26
VSS#AN23
VSS#AN24
VSS#AN27
AN24
AN27
AN28
H20
H21
H22
VSS#H21
VSS#H22
VSS#H23
VSS#AN28
VSS#B1B1VSS#B11
B11
H17
H18
H19
VSS#H14
VSS#H13
VSS#H17
VSS#H18
VSS#H19
VSS#H20
VSS#H12
VSS#H11
VSS#H10
VSS#G1
VSS#F7
VSS#F4
VSS#F22
VSS#F19
VSS#F16
VSS#F13
VSS#F10
VSS#E8
VSS#E29
VSS#E28
VSS#E27
VSS#E26
VSS#E25
VSS#E20
VSS#E2
VSS#E17
VSS#E14
VSS#E11
VSS#D9
VSS#D6
VSS#D5
VSS#D3
VSS#D24
VSS#D21
VSS#D18
VSS#D15
VSS#D12
VSS#C7
VSS#C4
VSS#C24
VSS#C22
VSS#C19
VSS#C16
VSS#C13
VSS#C10
VSS#B8
VSS#B5
VSS#B24
VSS#B20
VSS#B17
VSS#B14
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B14
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
CPU_G1
TP_CPU_E29
R106 X_51R0402R106 X_51R0402
R104 0R0402R104 0R0402
R131 X_0R0402R131 X_0R0402
VTT_OUT_LEFT
H_BPM#0 5
TP_MPG_NOBOOT_N
T3T3
A A
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
MS-7379
MS-7379
MS-7379
735Monday, October 29, 2007
735Monday, October 29, 2007
735Monday, October 29, 2007
1
2.1
2.1
2.1
of
of
of
5
H_A#[3..35]5
H_REQ#[0..4]5
D D
C C
B B
A A
H_RS#[0..2]5
H_D#[0..63]5
H_DBI#[0..3]5
Place the Pull-up R close to ICH7
ICH_SYNC#13
V_FSB_VTT
HXSWING_R HXSWING
H_A#[3..35]
H_REQ#[0..4]
H_RS#[0..2]
H_D#[0..63]
H_DBI#[0..3]
VCC3VCC3
R373
X_1KR0402
R373
X_1KR0402
R306 0R0402R306 0R0402
X_1KR0402
X_1KR0402
R319
R319
X_C22P50N0402
X_C22P50N0402
HXSWING S/B 1/4*VTT +/- 2%
R178
R178
301R1%0402
301R1%0402
R183 49.9R1%0402R183 49.9R1%0402
R185
R185
C201
C201
100R1%0402
100R1%0402
C0.01U25X0402
C0.01U25X0402
5
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#05
H_ADSTB#15
H_ADS#5
H_TRDY#5
H_DRDY#5
H_DEFER#5
H_HITM#5
H_HIT#5
H_LOCK#5
H_BR#05,6
H_BNR#5
H_BPRI#5
H_DBSY#5
MCHCLK15
MCHCLK#15
PWRGD10,13,28
H_CPURST#5,6
PLTRST#10,12,16
C347
C347
R195
16.5R1%0402
R195
16.5R1%0402
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
PLTRST#
ICH_SYNC#_R
HXRCOMP
HXSCOMP
HXSCOMPB
HXSWING
MCH_GTLREF
V_FSB_VTT
V_FSB_VTT
U7A
U7A
J42
L39
J40
L37
L36
K42
N32
N34
M38
N37
M36
R34
N35
N38
U37
N39
R37
P42
R39
V36
R38
U36
U33
R35
V33
V35
Y34
V42
V38
Y36
Y38
Y39
AA37
M34
U34
F40
L35
L38
G43
J37
W40
Y40
W41
T43
Y43
U42
V41
AA42
W42
G39
U40
U41
AA41
U39
R32
U32
AM17
C31
AM18
J13
D23
C25
D25
B25
D24
B24
V_1P25_CORE
R187 49.9R1%0402R187 49.9R1%0402
R179 49.9R1%0402R179 49.9R1%0402
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HA32#
HA33#
HA34#
HA35#
HADSTB0#
HADSTB1#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HADS#
HTRDY#
HDRDY#
HDEFER#
HITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HRS0#
HRS1#
HRS2#
HCLKP
HCLKN
PWROK
HCPURST#
RSTIN#
ICH_SYNC#
HRCOMP
HSCOMP
HSCOMP#
HSWING
HDVREF
HAVREF
P29
VTT_1
P27
P26
VTT_2
VCC_1
AJ12
AJ11
P24
VTT_3
VCC_2
AJ10
4
P23
VTT_4
VTT_5
VCC_3
VCC_4
AJ9
4
N29
N26
N24
VTT_6
VTT_7
VTT_8
VCC_5
VCC_6
VCC_7
AJ8
AJ7
AJ6
C211
C211
X_C2.7P25N0402
X_C2.7P25N0402
C205
C205
X_C2.7P25N0402
X_C2.7P25N0402
N23
M29
M24
M23
VTT_9
VTT_10
VTT_11
VTT_12
VCC_8
VCC_9
VCC_10
VCC_11
AJ5
AJ4
AJ3
AJ2
HXSCOMP
HXSCOMPB
L24
L23
VTT_13
VCC_12
AH4
AH2
K24
K23
VTT_14
VTT_15
VCC_13
VCC_14
AH1
AG13
J24
J23
VTT_16
VTT_17
VCC_15
VCC_16
AG12
AG11
V_FSB_VTT
3
H24
H23
G26
G24
G23
F26
F24
F23
E29
E27
E26
E23
D29
D28
D27
C30
C29
C27
B30
B29
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_80
VCC_34
VCC_35
VCC_36
VCC_37
AG9
AG8
AG7
AG6
AG5
AG4
AG3
AG2
AF13
AF12
AF11
AD24
AD22
AD20
AC25
AC23
AC21
AC19
AG10
AC13
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
R190 100R1%0402R190 100R1%0402
MCH_GTLREF_R MCH_GTLREF
R196
R196
200R1%0402
200R1%0402
3
B28
B27
A30
A28
R27
VTT_39
VTT_40
VTT_41
VTT_42
VCC_38
VCC_39
VCC_40
VCC_41
AC6
AB24
AB22
AB20
AA25
R194 51R0402R194 51R0402
C0.1U25Y0402
C0.1U25Y0402
R26
R24
VTT_43
VTT_44
VCC_42
VCC_43
AA23
AA21
C218
C218
R23
VTT_45
VTT_46
VCC_44
VCC_45
AA19
VCC_46
AA13
AG19
AA3
VCC_84
VCC_47
AG18
VCC_85
VCC_48
Y24
AG17
VCC_86
VCC_49
Y22
AG15
AG14
AF26
AF25
AF24
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_50
VCC_51
VCC_52Y6VCC_53
VCC_54
Y20
Y13
V13
V12
C222
C222
X_C220P16X0402
X_C220P16X0402
AF22
VCC_93
VCC_55
V10
AF20
VCC_94
VCC_56V9VCC_57
AF18
VCC_95
U13
AF17
AF15
VCC_96
VCC_97
VCC_58
VCC_59U9VCC_60U6VCC_61U3VCC_62
U10
AF14
AE27
AE26
AE25
AE23
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_63
VCC_64N9VCC_65N8VCC_66N6VCC_67N3VCC_68L6VCC_69J6VCC_70J3VCC_71J2VCC_72G2VCC_73
N12
N11
C149
C149
C0.1U25Y0402
C0.1U25Y0402
AE21
AE19
AE17
AD27
VCC_103
VCC_104
VCC_105
V_FSB_VTT
2
AD26
AD18
AD17
AD15
VCC_106
VCC_107
VCC_108
VCC_109
C184
C184
C0.1U25Y0402
C0.1U25Y0402
2
VCC_110
AD14
VCC_111
F11
AC27
AC26
VCC_112
VCC_113
VCC_74F9VCC_75D4VCC_76
AC17
AC15
AC14
AB27
VCC_114
VCC_115
VCC_116
VCC_77C9VCC_78
P20
Y11
C13
C123
C123
C0.1U25Y0402
C0.1U25Y0402
1
V_1P25_COREV_FSB_VTT
AB26
AB18
AB17
AA27
AA26
VCC_117
VCC_118
VCC_119
VCC_120
VCC_121
VCC_122
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDSTBP0#
HDSTBN0#
HDSTBP1#
HDSTBN1#
HDSTBP2#
HDSTBN2#
HDSTBP3#
HDSTBN3#
VCC_79
VCC_81
VCC_82
VCC_83
INTEL-G31
INTEL-G31
AG25
AG21
AG20
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
H_D#0
R40
H_D#1
P41
H_D#2
R41
H_D#3
N40
H_D#4
R42
H_D#5
M39
H_D#6
N41
H_D#7
N42
H_D#8
L41
H_D#9
J39
H_D#10
L42
H_D#11
J41
H_D#12
K41
H_D#13
G40
H_D#14
F41
H_D#15
F42
H_D#16
C42
H_D#17
D41
H_D#18
F38
H_D#19
G37
H_D#20
E42
H_D#21
E39
H_D#22
E37
H_D#23
C39
H_D#24
B39
H_D#25
G33
H_D#26
A37
H_D#27
F33
H_D#28
E35
H_D#29
K32
H_D#30
H32
H_D#31
B34
H_D#32
J31
H_D#33
F32
H_D#34
M31
H_D#35
E31
H_D#36
K31
H_D#37
G31
H_D#38
K29
H_D#39
F31
H_D#40
J29
H_D#41
F29
H_D#42
L27
H_D#43
K27
H_D#44
H26
H_D#45
L26
H_D#46
J26
H_D#47
M26
H_D#48
C33
H_D#49
C35
H_D#50
E41
H_D#51
B41
H_D#52
D42
H_D#53
C40
H_D#54
D35
H_D#55
B40
H_D#56
C38
H_D#57
D37
H_D#58
B33
H_D#59
D33
H_D#60
C34
H_D#61
B35
H_D#62
A32
H_D#63
D32
H_DBI#0
M40
H_DBI#1
J33
H_DBI#2
G29
H_DBI#3
E33
MSI
L40
M43
G35
H33
G27
H27
B38
D38
H_DSTBP#0 5
H_DSTBN#0 5
H_DSTBP#1 5
H_DSTBN#1 5
H_DSTBP#2 5
H_DSTBN#2 5
H_DSTBP#3 5
H_DSTBN#3 5
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
MS-7379
MS-7379
MS-7379
1
2.1
2.1
2.1
of
835Monday, October 29, 2007
of
835Monday, October 29, 2007
of
835Monday, October 29, 2007
5
4
3
2
1
DATA_B[0..63]20
DATA_A[0..63]19 DQM_A[0..7]19
MAA_A[0..14]19,21
D D
C C
B B
VCC_DDR
DATA_B[0..63] DQM_B[0..7]
DATA_A[0..63] DQM_A[0..7]
MAA_A[0..14] MAA_B[0..14]
SCS_A#019,21
SCS_A#119,21
RAS_A#19,21
CAS_A#19,21
WE_A#19,21
ODT_A019,21
ODT_A119,21
SBS_A019,21
SBS_A119,21
SBS_A219,21
DQS_A019
DQS_A#019
DQS_A119
DQS_A#119
DQS_A219
DQS_A#219
DQS_A319
DQS_A#319
DQS_A419
DQS_A#419
DQS_A519
DQS_A#519
DQS_A619
DQS_A#619
DQS_A719
DQS_A#719
P_DDR0_A19
N_DDR0_A19
P_DDR1_A19
N_DDR1_A19
P_DDR2_A19
N_DDR2_A19
R223 20R1%0402R223 20R1%0402
R224 20R1%0402R224 20R1%0402
R158 20R1%0402R158 20R1%0402
R159 20R1%0402R159 20R1%0402
C265
C265
C0.1U25Y0402
C0.1U25Y0402
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
DQM_B[0..7]20
MAA_B[0..14]20,21
AW35
SCS_A0#
BA35
SCS_A1#
BA34
SCS_A2#
BB38
SCS_A3#
BB33
SRAS_A#
AY35
SCAS_A#
BB34
SWE_A#
BA31
SMA_A0
BB25
SMA_A1
BA26
SMA_A2
BA25
SMA_A3
AY25
SMA_A4
BA23
SMA_A5
AY24
SMA_A6
AY23
SMA_A7
BB23
SMA_A8
BA22
SMA_A9
AY33
SMA_A10
BB22
SMA_A11
AW21
SMA_A12
AY38
SMA_A13
BA21
SMA_A14
AY37
SODT_A0
BA38
SODT_A1
BB35
SODT_A2
BA39
SODT_A3
BA33
SBS_A0
AW32
SBS_A1
BB21
SBS_A2
AU4
SDQS_A0
AR3
SDQS_A0#
BB3
SDQS_A1
BA4
SDQS_A1#
BB9
SDQS_A2
BA9
SDQS_A2#
AT20
SDQS_A3
AU18
SDQS_A3#
AR41
SDQS_A4
AR40
SDQS_A4#
AL41
SDQS_A5
AL40
SDQS_A5#
AG42
SDQS_A6
AG41
SDQS_A6#
AC42
SDQS_A7
AC41
SDQS_A7#
AU31
SCLK_A0
AR31
SCLK_A0#
AP27
SCLK_A1
AN27
SCLK_A1#
AV33
SCLK_A2
AW33
SCLK_A2#
AP29
SCLK_A3
AP31
SCLK_A3#
AM26
SCLK_A4
AM27
SCLK_A4#
AT33
SCLK_A5
AU33
SCLK_A5#
AN2
SRCOMP0
AN3
SRCOMP1
BB40
SRCOMP2
BA40
SRCOMP3
U7B
U7B
DATA_B1
DATA_B0
AN7
AN8
SDQ_B0
SDQ_A0
AR5
AR4
DATA_B3
DATA_B2
AW5
AW7
SDQ_B1
SDQ_B2
SDQ_B3
SDQ_A1
SDQ_A2
SDQ_A3
AV3
AV2
DATA_B4
DATA_B5
AN5
AN6
SDQ_B4
SDQ_A4
AP3
AP2
DATA_B7
DATA_B6
AN9
AU7
SDQ_B5
SDQ_B6
SDQ_A5
SDQ_A6
AV4
AU1
DATA_B9
DATA_B8
AT11
AU11
SDQ_B7
SDQ_B8
SDQ_A7
SDQ_A8
AY2
AY3
DATA_B10
DATA_B11
AP13
AR13
SDQ_B9
SDQ_B10
SDQ_B11
SDQ_A9
SDQ_A10
SDQ_A11
BB5
AY6
DATA_B13
DATA_B12
DATA_B14
AR11
AU9
SDQ_B12
SDQ_B13
SDQ_A12
SDQ_A13
AW2
AW3
DATA_B16
DATA_B15
AV12
AU12
SDQ_B14
SDQ_B15
SDQ_A14
SDQ_A15
BA5
BB4
DATA_B18
DATA_B17
AU15
AV13
AU17
SDQ_B16
SDQ_B17
SDQ_A16
SDQ_A17
AY7
BC7
AW11
DATA_B19
DATA_B21
DATA_B20
AT17
AU13
SDQ_B18
SDQ_B19
SDQ_B20
SDQ_A18
SDQ_A19
SDQ_A20
BB6
AY11
DATA_B23
DATA_B22
AM13
AV15
AW17
SDQ_B21
SDQ_B22
SDQ_A21
SDQ_A22
BA6
BA10
BB10
DATA_B25
DATA_B26
DATA_B24
AV24
AT23
SDQ_B23
SDQ_B24
SDQ_B25
SDQ_A23
SDQ_A24
SDQ_A25
AT18
AR18
DATA_B27
DATA_B28
AT26
AP26
SDQ_B26
SDQ_B27
SDQ_A26
SDQ_A27
AT21
AU21
DATA_B29
DATA_B30
AU23
AW23
AR24
SDQ_B28
SDQ_B29
SDQ_A28
SDQ_A29
AP17
AP20
AN17
DATA_B32
DATA_B31
DATA_B33
AN26
AW37
SDQ_B30
SDQ_B31
SDQ_B32
SDQ_A30
SDQ_A31
SDQ_A32
AV20
AV42
DATA_B34
DATA_B35
AV38
AN36
AN37
SDQ_B33
SDQ_B34
SDQ_A33
SDQ_A34
AP42
AU40
AN39
DATA_B37
DATA_B38
DATA_B36
AU35
AR35
SDQ_B35
SDQ_B36
SDQ_B37
SDQ_A35
SDQ_A36
SDQ_A37
AV40
AV41
DATA_B40
DATA_B39
AN35
AR37
AM35
SDQ_B38
SDQ_B39
SDQ_A38
SDQ_A39
AP41
AR42
AN41
DATA_B41
DATA_B43
DATA_B42
AM38
AJ34
SDQ_B40
SDQ_B41
SDQ_B42
SDQ_A40
SDQ_A41
SDQ_A42
AK42
AM39
DATA_B45
DATA_B44
AL38
AR39
AM34
SDQ_B43
SDQ_B44
SDQ_A43
SDQ_A44
AK41
AN40
AN42
DATA_B46
DATA_B47
DATA_B48
AL37
AL32
SDQ_B45
SDQ_B46
SDQ_B47
SDQ_A45
SDQ_A46
SDQ_A47
AL42
AL39
DATA_B50
DATA_B49
AG38
AJ38
AF35
SDQ_B48
SDQ_B49
SDQ_A48
SDQ_A49
AJ40
AF39
AH43
DATA_B52
DATA_B51
DATA_B53
AF33
AJ37
AJ35
SDQ_B50
SDQ_B51
SDQ_B52
SDQ_A50
SDQ_A51
SDQ_A52
AJ42
AJ41
AE40
DATA_B55
DATA_B54
DATA_B56
AG33
AF34
SDQ_B53
SDQ_B54
SDQ_B55
SDQ_A53
SDQ_A54
SDQ_A55
AF41
AF42
DATA_B57
DATA_B58
AD36
AC33
SDQ_B56
SDQ_B57
SDQ_A56
SDQ_A57
AD40
AD43
DATA_B60
DATA_B59
AA34
AA36
AD34
SDQ_B58
SDQ_B59
SDQ_A58
SDQ_A59
AB41
AA40
AE42
DATA_B62
DATA_B63
DATA_B61
AF38
AC34
AA33
SDQ_B60
SDQ_B61
SDQ_B62
SDQ_A60
SDQ_A61
SDQ_A62
AE41
AB42
AC39
AY12
SDQ_B63
SCKE_B0
SDQ_A63
SCKE_A0
BC20
AW12
BB11
BA11
SCKE_B1
SCKE_B2
SCKE_A1
SCKE_A2
AY20
AY21
BA19
SCKE_B0
SCKE_B1
DQM_B0
DQM_B1
AR7
SDM_B0
SCKE_B3
SDM_A0
SCKE_A3
AR2
AW9
BA2
DQM_B2
SDM_B1
SDM_A1
DQM_B3
AW13
SDM_B2
SDM_A2
AY9
AP23
SDM_B3
SDM_A3
AN18
DQM_B4
AU37
SDM_B4
SDM_A4
AU43
DQM_B6
DQM_B5
DQM_B7
AM37
AG39
SDM_B5
SDM_B6
SDM_A5
SDM_A6
AG40
AM43
SCKE_B0 20,21
SCKE_B1 20,21
AD38
SCS_B0#
SCS_B1#
SCS_B2#
SDM_B7
SCS_B3#
SRAS_B#
SCAS_B#
SWE_B#
SMA_B0
SMA_B1
SMA_B2
SMA_B3
SMA_B4
SMA_B5
SMA_B6
SMA_B7
SMA_B8
SMA_B9
SMA_B10
SMA_B11
SMA_B12
SMA_B13
SMA_B14
SODT_B0
SODT_B1
SODT_B2
SODT_B3
SBS_B0
SBS_B1
SBS_B2
SDQS_B0
SDQS_B0#
SDQS_B1
SDQS_B1#
SDQS_B2
SDQS_B2#
SDQS_B3
SDQS_B3#
SDQS_B4
SDQS_B4#
SDQS_B5
SDQS_B5#
SDQS_B6
SDQS_B6#
SDQS_B7
SDQS_B7#
SCLK_B0
SCLK_B0#
SCLK_B1
SCLK_B1#
SCLK_B2
SCLK_B2#
SCLK_B3
SCLK_B3#
SCLK_B4
SCLK_B4#
SCLK_B5
SCLK_B5#
SMRCOMPVOL
SMRCOMPVOH
SDM_A7
INTEL-G31
INTEL-G31
AC40
SVREF
BB27
BB30
AY27
AY31
AW26
AW29
BA27
BB17
AY17
BA17
BC16
AW15
BA15
BB15
BA14
AY15
BB14
AW18
BB13
BA13
AY29
AY13
BA29
BA30
BB29
BB31
AY19
BA18
BC12
AV6
AU5
AR12
AP12
AP15
AR15
AT24
AU26
AW39
AU39
AL35
AL34
AG35
AG36
AC36
AC37
AV31
AW31
AU27
AT27
AV32
AT32
AU29
AR29
AV29
AW27
AN33
AP32
AM6
AM8
AM10
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
MCH_VREF_A
DDR_RCOMPVOL
DDR_RCOMPVOH
SCS_B#0 20,21
SCS_B#1 20,21
RAS_B# 20,21
CAS_B# 20,21
WE_B# 20,21
ODT_B0 20,21
ODT_B1 20,21
SBS_B0 20,21
SBS_B1 20,21
SBS_B2 20,21
DQS_B0 20
DQS_B#0 20
DQS_B1 20
DQS_B#1 20
DQS_B2 20
DQS_B#2 20
DQS_B3 20
DQS_B#3 20
DQS_B4 20
DQS_B#4 20
DQS_B5 20
DQS_B#5 20
DQS_B6 20
DQS_B#6 20
DQS_B7 20
DQS_B#7 20
P_DDR0_B 20
N_DDR0_B 20
P_DDR1_B 20
N_DDR1_B 20
P_DDR2_B 20
N_DDR2_B 20
C299 C0.01U25X0402C299 C0.01U25X0402
R228 1KR1%0402R228 1KR1%0402
R227
R227
3.01KR1%0402
3.01KR1%0402
R232 1KR1%0402R232 1KR1%0402
C294
C0.01U25X0402
C294
C0.01U25X0402
VCC_DDR
C315
C0.1U25Y0402
C315
C0.1U25Y0402
C303
C0.1U25Y0402
C303
C0.1U25Y0402
R234
R234
1KR1%0402
1KR1%0402
R233
1KR1%0402
R233
1KR1%0402
VCC_DDR
C302
X_C0.1U16Y0402
C302
X_C0.1U16Y0402
DQM_A1
DQM_A2
DQM_A0
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DATA_A0
DATA_A3
DATA_A4
DATA_A2
DATA_A1
A A
5
DATA_A8
DATA_A9
DATA_A6
DATA_A7
DATA_A5
DATA_A11
DATA_A10
DATA_A12
DATA_A13
4
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A19
DATA_A18
DATA_A21
DATA_A20
DATA_A22
DATA_A23
DATA_A25
DATA_A24
DATA_A27
DATA_A26
DATA_A28
DATA_A29
DATA_A31
DATA_A30
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A47
DATA_A46
3
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A61
DATA_A56
DATA_A59
DATA_A58
DATA_A60
DATA_A57
PLACE 0.1UF CAP CLOSE TO MCH
DATA_A63
DATA_A62
SCKE_A1
SCKE_A0
DQM_A7
SCKE_A1 19,21
SCKE_A0 19,21
2
DDR_RCOMPVOH = 0.8 * VCC_DDR
DDR_RCOMPVOL = 0.2 * VCC_DDR
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
MS-7379
MS-7379
MS-7379
1
of
935Monday, October 29, 2007
of
935Monday, October 29, 2007
of
935Monday, October 29, 2007
2.1
2.1
2.1
V_1P25_CORE
Close to MCH A.S.A.P
R229 5.1KR1%0402R229 5.1KR1%0402
R230 5.1KR1%0402R230 5.1KR1%0402
R231 5.1KR1%0402R231 5.1KR1%0402
R226 5.1KR1%0402R226 5.1KR1%0402
D D
C C
B B
DMI_MCH_IT_MR_0_DP12
DMI_MCH_IT_MR_0_DN12
DMI_MCH_IT_MR_1_DP12
DMI_MCH_IT_MR_1_DN12
DMI_MCH_IT_MR_2_DP12
DMI_MCH_IT_MR_2_DN12
DMI_MCH_IT_MR_3_DP12
DMI_MCH_IT_MR_3_DN12
V_1P25_CORE
EXP_PRSNT_N22
V_1P25_CORE
Route solder side
4mils width
V15SFR
R212 0RR212 0R
R209 0RR209 0R
I = 225mA
V_1P25_CORE
A A
I = 90.6mA
V_1P25_CORE
5
DMI_MCH_IT_MR_0_DP
DMI_MCH_IT_MR_1_DP
DMI_MCH_IT_MR_2_DP
DMI_MCH_IT_MR_3_DP
EXP_A_RXP_022
EXP_A_RXN_022
EXP_A_RXP_122
EXP_A_RXN_122
EXP_A_RXP_222
EXP_A_RXN_222
EXP_A_RXP_322
EXP_A_RXN_322
EXP_A_RXP_422
EXP_A_RXN_422
EXP_A_RXP_522
EXP_A_RXN_522
EXP_A_RXP_622
EXP_A_RXN_622
EXP_A_RXP_722
EXP_A_RXN_722
EXP_A_RXP_822
EXP_A_RXN_822
EXP_A_RXP_922
EXP_A_RXN_922
EXP_A_RXP_1022
EXP_A_RXN_1022
EXP_A_RXP_1122
EXP_A_RXN_1122
EXP_A_RXP_1222
EXP_A_RXN_1222
EXP_A_RXP_1322
EXP_A_RXN_1322
EXP_A_RXP_1422
EXP_A_RXN_1422
EXP_A_RXP_1522
EXP_A_RXN_1522
CK_PE_100M_MCH15
CK_PE_100M_MCH#15
SDVO_CTRL_DATA22
SDVO_CTRL_CLK22
H_BSL015
H_BSL115
H_BSL215
R216 1KR0402R216 1KR0402
R214 0R0402R214 0R0402
R467 X_0RR467 X_0R
CP28
CP28
X_COPPER
X_COPPER
C237
C0.1U25Y0402
C237
C0.1U25Y0402
C253
C0.1U25Y0402
C253
C0.1U25Y0402
C241
C0.01U25X0402
C241
C0.01U25X0402
L12 X_0.1U50mL12 X_0.1U50m
21
CP8CP8
C210
C210
X_C0.22U16X
X_C0.22U16X
L15 X_0.1U50mL15 X_0.1U50m
21
CP11CP11
C246
C246
X_C10U10Y0805
X_C10U10Y0805
5
DMI_MCH_IT_MR_0_DP
DMI_MCH_IT_MR_0_DN
DMI_MCH_IT_MR_1_DP
DMI_MCH_IT_MR_1_DN
DMI_MCH_IT_MR_2_DP
DMI_MCH_IT_MR_2_DN
DMI_MCH_IT_MR_3_DP
DMI_MCH_IT_MR_3_DN
SDVO_CTRL_DATA
SDVO_CTRL_CLK
H_BSL0
H_BSL1
H_BSL2
EXP_SER=1 :ATX
EXP_SLR
EXP_EN
VCC_CL_PLL
VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
V_3P3_DAC_FILTERED
VCCD_CRT
VCCDQ_CRT
C260
C4.7U10Y0805
C260
C4.7U10Y0805
VCC3
V_1P25_CORE
L25 X_80L4_30_1206L25 X_80L4_30_1206
CP17 X_COPPERCP17 X_COPPER
CP18 X_COPPERCP18 X_COPPER
VCCA_MPLL
C212
C212
X_C10U10Y0805
X_C10U10Y0805
VCCA_DPLLB
C236
C236
C0.1U25Y0402
C0.1U25Y0402
V_1P25_CORE
U7C
U7C
F15
G15
K15
J15
F12
E12
J12
H12
J11
H11
F7
E7
E5
F6
C2
D2
G6
G5
L9
L8
M8
M9
M4
L4
M5
M6
R9
R10
T4
R4
R6
R7
W2
V1
Y8
Y9
AA7
AA6
AB3
AA4
B12
B13
G17
E17
G20
J20
J18
G18
E18
J17
Y32
C23
A24
A22
C22
B15
C17
B16
A16
C21
B21
D16
B17
INTEL-G31
INTEL-G31
21
C213
C0.1U25Y0402
C213
C0.1U25Y0402
EXP_RXP0
EXP_RXN0
EXP_RXP1
EXP_RXN1
EXP_RXP2
EXP_RXN2
EXP_RXP3
EXP_RXN3
EXP_RXP4
EXP_RXN4
EXP_RXP5
EXP_RXN5
EXP_RXP6
EXP_RXN6
EXP_RXP7
EXP_RXN7
EXP_RXP8
EXP_RXN8
EXP_RXP9
EXP_RXN9
EXP_RXP10
EXP_RXN10
EXP_RXP11
EXP_RXN11
EXP_RXP12
EXP_RXN12
EXP_RXP13
EXP_RXN13
EXP_RXP14
EXP_RXN14
EXP_RXP15
EXP_RXN15
DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3
GCLKP
GCLKN
SDV0_CTRLDATA
SDVO_CTRLCLK
BSEL0
BSEL1
BSEL2
MTYPE
EXP_SLR
EXP_EN
VCC_CL_PLL
VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_EXPPLL
VCCA_DAC_17
VCCA_DAC_18
VCCA_EXP_19
VCCD_CRT_20
VCCDQ_CRT_21
VSS_1
VCC33
VCC_EXP_1
AD11
C286
C10U10Y0805
C286
C10U10Y0805
AL26
AL24
VCC_CL_1
VCC_CL_2
VCC_EXP_2
VCC_EXP_3
AD9
AD10
C279
C0.1U25Y0402
C279
C0.1U25Y0402
4
AL23
AL21
AL20
AL18
AL17
AL15
AK30
VCC_CL_3
VCC_CL_4
VCC_CL_5
VCC_CL_6
VCC_CL_7
VCC_CL_8
VCC_EXP_4
VCC_EXP_5
VCC_EXP_6
VCC_EXP_7
VCC_EXP_8
VCC_EXP_9
AD8
AD7
AD6
AD5
AD4
AD2
AD1
I = 90.6mA
V_1P25_CORE
I = 67.9mA
V_1P25_CORE
4
AK29
AK27
AJ31
AG31
AF31
AD32
AC32
VCC_CL_9
VCC_CL_10
VCC_CL_11
VCC_CL_12
VCC_CL_13
VCC_CL_14
VCC_CL_15
VCC_EXP_10
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
VCC_EXP_14
VCC_EXP_15
VCC_EXP_16
AE4
AE3
AE2
AC4
AC3
AC2
VCC_DDR
L14 X_0.1U50mL14 X_0.1U50m
CP10CP10
C233
C233
X_C10U10Y0805
X_C10U10Y0805
L13 X_0.1U50mL13 X_0.1U50m
CP9CP9
C226
C226
X_C10U10Y0805
X_C10U10Y0805
VCC_CL_16
AA32
VCC_CL_17
VCCSM_1
BC39
AJ30
VCC_CL_18
VCCSM_2
BC34
21
21
AJ29
VCC_CL_19
VCCSM_3
BC30
AJ27
VCC_CL_20
VCCSM_4
BC26
AG30
VCC_CL_21
VCCSM_5
BC22
AG29
AG27
AG26
AF30
VCC_CL_22
VCC_CL_23
VCC_CL_24
VCC_CL_25
VCCSM_6
VCCSM_7
VCCSM_8
VCCSM_9
BB39
BB37
BC18
BC14
VCCA_DPLLA
C229
C229
C0.1U25Y0402
C0.1U25Y0402
VCCA_HPLL
C225
C225
C0.1U25Y0402
C0.1U25Y0402
AF29
VCC_CL_26
VCCSM_10
BB32
AF27
BB28
VCC_CL_27
VCCSM_11
AD30
VCC_CL_28
VCCSM_12
BB26
AD29
VCC_CL_29
VCCSM_13
BB24
AC30
AC29
AL12
AL11
AL10
AL9
VCC_CL_30
VCC_CL_31
VCC_CL_32
VCC_CL_33
VCC_CL_34
VCCSM_14
VCCSM_15
VCCSM_16
VCCSM_17
VCCSM_18
BB20
BB18
BB16
BB12
AY32
AW24
I = 71.6mA
V_1P25_CORE
I = 0.36mA
VCC3
3
AL8
AL7
AL6
AL5
AL4
AL3
AL2
VCC_CL_35
VCC_CL_36
VCC_CL_37
VCC_CL_38
VCC_CL_39
VCC_CL_40
VCC_CL_41
VCC_CL_42
VCCSM_19
VCCSM_20
VCCSM_21
VCCSM_22
VCC_SMCLK_2
VCC_SMCLK_1
AV26
AV18
BA42
BB41
AW20
C171 C1U16YC171 C1U16Y
L24 X_0.1U50mL24 X_0.1U50m
CP16CP16
C272
C272
X_C10U10Y0805
X_C10U10Y0805
L23 X_0.1U50mL23 X_0.1U50m
CP15CP15
C269
C269
C10U10Y0805
C10U10Y0805
3
AK26
AK24
AK23
AK21
AK20
AK18
AK17
VCC_CL_43
VCC_CL_44
VCC_CL_45
VCC_CL_46
VCC_CL_47
VCC_CL_48
VCC_CL_49
VCC_SMCLK_5
VCC_SMCLK_4
VCC_SMCLK_3
AY42
RESERVED_2
RESERVED_1
H18
BA43
BB42
AN21
L10 X_10U100m_0805L10 X_10U100m_0805
V_CKDDR
R157 X_1R1%R157 X_1R1%
R156 X_1R1%R156 X_1R1%
21
21
C270
C270
C0.1U25Y0402
C0.1U25Y0402
AK15
AK3
AK2
AK1
AJ13
AD31
AC31
AA31
Y31
VCC_CL_50
VCC_CL_51
VCC_CL_52
VCC_CL_53
VCC_CL_54
VCC_CL_55
VCC_CL_56
VCC_CL_57
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_7
RESERVED_8
RESERVED_9
AN32
AG32
AM31
AW42
21
CP6CP6
VCCA_GPLL
C273
C273
C0.1U25Y0402
C0.1U25Y0402
C266
C266
C0.01U25X0402
C0.01U25X0402
RESERVED_10
AL31
AF32
AM21
C163 X_C10U10Y0805C163 X_C10U10Y0805
RESERVED_3
BB2
BB19
V_3P3_DAC_FILTERED
AJ26
AJ24
AJ23
AJ21
AJ20
VCC_CL_58
VCC_CL_59
VCC_CL_60
VCC_CL_61
VCC_CL_62
RESERVED_11
RESERVED_12
RESERVED_13
RESERVED_14
RESERVED_15
Y12
AA9
AJ32
AA10
AA11
2
AJ18
AJ17
AJ15
AJ14
AA30
AA29
Y30
Y29
V30
V29
U29
U27
AL13
AK14
AL29
AL27
EXP_TXP0
EXP_TXN0
EXP_TXP1
VCC_CL_63
VCC_CL_64
VCC_CL_65
VCC_CL_66
VCC_CL_67
VCC_CL_68
VCC_CL_69
VCC_CL_70
VCC_CL_71
VCC_CL_72
VCC_CL_73
VCC_CL_74
RESERVED_25
RESERVED_22
RESERVED_23
RESERVED_24
RESERVED_26
F13
U11
R12
R13
AP21
T19T19
RESERVED_27
V31
RESERVED_16
RESERVED_17
RESERVED_18
RESERVED_19
RESERVED_20
RESERVED_21
U30
U31
R29
R30
U12
VCC_DDR
VCCA_HPLL ---- >50mA ; Min Vout -- 1.121V
VCCA_MPLL ---- >130mA ; Min Vout -- 1.128V
VCCA_DPLLA --- >80mA ; Min Vout -- 1.132V
VCCA_DPLLB --- >80mA ; Min Vout -- 1.131V
VCCA_DAC ----- 70mA ; Min Vout -- 3.14V
VCCD_CRT ----- 20mA ; Min Vout -- 1.425V
VCCDQ_CRT ---- 0.5mA ; Min Vout -- 1.425V
VCCA_EXPPLL -- 50mA ; Min Vout -- 1.129V
VCC_SMCLK ---- 250mA
BSEL
2
0
1
0
0
0
0
1
EXP_TXN1
VCC_CL_75
VCC_CL_76
VCC_CL_77
VCC_CL_78
VCC_CL_79
EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9
EXP_TXN9
EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
EXP_COMPO
EXP_COMPI
GREEN#
DDC_DATA
DDC_CLK
DREFCLKP
DREFCLKN
CL_PWROK
CL_RST#
CL_VERF
CL_DATA
ALLZTEST
XORTEST
TESTIN#
TEST2
TEST1
TEST0
RESERVED_28
A43
BC1
AA39
BC43
T15T15
T16T16
T21T21
TABLE
PSB FREQUENCY
200 MHZ (800)1
133 MHZ (533)
2
HSYNC
VSYNC
RED
GREEN
BLUE
RED#
BLUE#
REFSET
CL_CLK
1
D11
D12
B11
A10
C10
D9
B9
B7
D7
D6
B5
B6
B3
B4
F2
E2
F4
G4
J4
K3
L2
K1
N2
M2
P3
N4
R2
P1
U2
T2
V3
U4
C293 C0.1U25Y0402C293 C0.1U25Y0402
V7
C295 C0.1U25Y0402C295 C0.1U25Y0402
V6
C281 C0.1U25Y0402C281 C0.1U25Y0402
W4
C282 C0.1U25Y0402C282 C0.1U25Y0402
Y4
C283 C0.1U25Y0402C283 C0.1U25Y0402
AC8
C284 C0.1U25Y0402C284 C0.1U25Y0402
AC9
C296 C0.1U25Y0402C296 C0.1U25Y0402
Y2
C297 C0.1U25Y0402C297 C0.1U25Y0402
AA2
AC11
AC12
C15
D15
B18
C19
B20
C18
D19
D20
L13
M13
C14
D13
A20
AM15
AA12
AM5
AD13
AD12
K20
F20
A14
EXP_A_TXP_0 22
EXP_A_TXN_0 22
EXP_A_TXP_1 22
EXP_A_TXN_1 22
EXP_A_TXP_2 22
EXP_A_TXN_2 22
EXP_A_TXP_3 22
EXP_A_TXN_3 22
EXP_A_TXP_4 22
EXP_A_TXN_4 22
EXP_A_TXP_5 22
EXP_A_TXN_5 22
EXP_A_TXP_6 22
EXP_A_TXN_6 22
EXP_A_TXP_7 22
EXP_A_TXN_7 22
EXP_A_TXP_8 22
EXP_A_TXN_8 22
EXP_A_TXP_9 22
EXP_A_TXN_9 22
EXP_A_TXP_10 22
EXP_A_TXN_10 22
EXP_A_TXP_11 22
EXP_A_TXN_11 22
EXP_A_TXP_12 22
EXP_A_TXN_12 22
EXP_A_TXP_13 22
EXP_A_TXN_13 22
EXP_A_TXP_14 22
EXP_A_TXN_14 22
EXP_A_TXP_15 22
EXP_A_TXN_15 22
GRCOMP
R235 24.9R1%0402R235 24.9R1%0402
HSYNC
VSYNC
VGA_RED
VGA_GREEN
VGA_BLUE
MCH_DDC_DATA
MCH_DDC_CLK
DOTCLK
DOTCLK#
REFSET
R202 1.3KR1%0402R202 1.3KR1%0402
MCH_CLPWROK
CL_RST#
CL_VREF_MCH
T17T17
T18T18
T2T2
DMI_ICH_MT_IR_0_DP 12
DMI_ICH_MT_IR_0_DN 12
DMI_ICH_MT_IR_1_DP 12
DMI_ICH_MT_IR_1_DN 12
DMI_ICH_MT_IR_2_DP 12
DMI_ICH_MT_IR_2_DN 12
DMI_ICH_MT_IR_3_DP 12
DMI_ICH_MT_IR_3_DN 12
V_1P25_CORE
HSYNC 25
VSYNC 25
VGA_RED 25
VGA_GREEN 25
VGA_BLUE 25
MCH_DDC_DATA 25
MCH_DDC_CLK 25
DOTCLK 15
DOTCLK# 15
R417 0R0402R417 0R0402
C553
C553
C10P25N0402
C10P25N0402
MCH CORE DECOUPLING
PLTRST# 8,12,16
R237
R237
1.65KR1%0402
1.65KR1%0402
CL_RST# CL_VREF_MCH
C313
C313
R236
R236
X_C0.01U25X0402
X_C0.01U25X0402
1KR0402
1KR0402
PWRGD 8,13,28
V_1P25_CORE
R222
R222
1KR0402
1KR0402
R221
R221
392R1%0402
392R1%0402
C0.01U25X0402
C0.01U25X0402
CL_VREF_MCH = 0.352V (FOR NOW)
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MS-7379
MS-7379
MS-7379
of
10 35Monday, October 29, 2007
of
10 35Monday, October 29, 2007
of
10 35Monday, October 29, 2007
1
C276
C276
2.1
2.1
2.1
5
4
3
2
1
T20T20
V_1P25_CORE
AA17
AA15
AA14
Y27
Y26
Y18
Y17
Y15
Y14
W27
W26
W25
W23
W21
W19
W18
W17
V27
V26
V25
V24
V23
V22
V21
V20
V19
V18
V17
V15
V14
U26
U25
U24
U23
U22
U21
U20
U19
U18
U17
U15
U14
R20
R18
R17
R15
R14
P15
P14
AG24
AG23
VCC_168
VCC_169
H31
VCC_170
VCC_171
VSS_124
VSS_125
H29
H21
VCC_172
VCC_173
VSS_126
VSS_127
H20
H17
AG22
VCC_174
VSS_128
H15
H13
U7D
U7D
D D
C C
B B
A A
BC37
BC32
BC28
BC24
BC10
BC5
BB7
AY41
AY4
AW43
AW41
AW1
AV37
AV35
AV27
AV23
AV21
AV17
AV11
AV9
AV7
AU42
AU38
AU32
AU24
AU20
AU6
AU2
AT31
AT29
AT15
AT13
AT12
AR38
AR33
AR32
AR27
AR26
AR23
AR21
AR20
AR17
AR9
AR6
AP43
AP24
AP18
AP1
AN38
AN31
AN29
AN24
AN23
AN20
AN15
AN13
AN12
AN11
AN4
AM42
AM40
AM36
AM33
AM29
AM24
AM23
AM20
AM11
AM9
AM7
AM4
AM2
AM1
AL36
AL33
AK43
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VCC_123
VSS_77
AJ39
AJ36
VCC_124
VCC_125
VSS_78
VSS_79
AJ33
AH42
VCC_126
VCC_127
VSS_80
VSS_81
AG37
AG34
VCC_128
VCC_129
VSS_82
VSS_83
AF43
AF37
VCC_130
VCC_131
VSS_84
VSS_85
AF36
AF10
VCC_132
VCC_133
VSS_86
VSS_87
AF9
AF8
VCC_134
VCC_135
VSS_88
VSS_89
AF7
AF6
VCC_136
VCC_137
VSS_90
VSS_91
M27
M21
VCC_138
VCC_139
VSS_92
VSS_93
M17
M15
VCC_140
VCC_141
VCC_142
VSS_94
VSS_95
VSS_96M7VSS_97M1VSS_98
M10
VCC_143
L33
VCC_144
L32
VCC_145
VCC_146
VSS_99
VSS_100
L31
L29
VCC_147
VCC_148
VCC_149
VSS_101
VSS_102
VSS_103
L21
L20
VCC_150
VCC_151
VCC_152
VCC_153
VSS_104
VSS_105L7VSS_106L5VSS_107L3VSS_108
L11
K43
VCC_154
K26
VCC_155
VCC_156
VCC_157
VSS_109
VSS_110
VSS_111
K21
K18
VCC_158
VCC_159
VSS_112
VSS_113
K13
K12
VCC_160
VCC_161
VCC_162
VCC_163
VSS_114K2VSS_115
VSS_116
VSS_117
J38
J35
J32
VCC_164
VCC_165
VCC_166
VSS_118
VSS_119
VSS_120J9VSS_121J7VSS_122J5VSS_123
J27
J21
VCC_167
L17
N17
RESERVED_29
VSS_129
VSS_130
VSS_131
G42
G38
G32
M20
L15
N18
N15
RESERVED_33
RESERVED_34
RESERVED_30
RESERVED_31
RESERVED_32
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
G21
G13
G12
G11
L18
M18
F17
K17
RESERVED_35
RESERVED_36
RESERVED_37
RESERVED_38
VSS_137G9VSS_138G7VSS_139G1VSS_140
VSS_141
F37
F35
N20
NC_1
VSS_142
VSS_143
F27
F21
BC42
BC2
BB43
NC_2
NC_3
VSS_144
VSS_145F3VSS_146
F18
E43
BB1
NC_4
NC_5
VSS_147
E32
T1T1
B43
B42
NC_6
NC_7
VSS_148
VSS_149
E24
E21
E20
A42
NC_8B2NC_9
VSS_150
VSS_151
VSS_152
E15
E13
L12
M11
VSS
VCC
VSS_153
VSS_154E9VSS_155E3VSS_156
E11
D40
VSS_157
D31
A41
VSS_293A3VSS_292A5VSS_291
VSS_290C1VSS_289
VSS_158
VSS_159
VSS_160D3VSS_161
D21
D17
C26
C43
R21
W20
VSS_288E1VSS_287
VSS_286
VSS_162
VSS_163C6VSS_164C5VSS_165C4VSS_166
C11
W22
W24
VSS_285
VSS_284
VSS_167
B37
B32
AA18
AC18
VSS_283
VSS_282
VSS_168
VSS_169
B31
B26
AE18
AE20
VSS_281
VSS_280
VSS_170
VSS_171
B23
B22
AE22
AE24
VSS_279
VSS_278
VSS_172
VSS_173
B19
B14
AF19
AF21
VSS_277
VSS_276
VSS_174
VSS_175
B10
A39
AF23
AY40
VSS_275
VSS_274
VSS_176
VSS_177
A34
A26
BA1
BC3
VSS_273
VSS_272
VSS_178
VSS_179
A18
A12
BC41
M33
M35
VSS_271
VSS_270
VSS_269
VSS_180A7VSS_181
VSS_182
AF5
AF3
M42
M37
VSS_267
VSS_268
VSS_183
VSS_184
AF2
AF1
AD42
N10
VSS_266N5VSS_265N7VSS_264
VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_198
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_188
VSS_185
VSS_186
VSS_187
INTEL-G31
INTEL-G31
AD39
AD37
N13
N21
N27
N31
N33
N36
P2
P17
P18
P21
P30
P43
R3
R5
R8
R11
R31
R33
R36
T1
T42
U5
U7
U8
U35
U38
V2
V5
V8
V11
V32
V34
V37
V39
V43
W3
Y1
Y5
Y7
Y10
Y19
Y21
Y23
Y25
Y33
Y35
Y37
Y42
AA5
AA8
AA20
AA22
AA24
AA35
AA38
AB1
AB2
AB19
AB21
AB23
AB25
AB43
AC5
AC7
AC10
AC20
AC22
AC24
AC35
AC38
AD19
AD21
AD23
AD25
AD33
AD35
Place close to GMCH
VCC_DDR
MCH MEMORY DECOUPLING
MCH CORE DECOUPLING
V_1P25_CORE
5020 Parts
V_1P25_CORE
V_FSB_VTT
VCC_DDR
+
+
12
EC26
EC26
X_CD1000U6.3EL11.5
X_CD1000U6.3EL11.5
C227
C227
X_C2.2U6.3Y
X_C2.2U6.3Y
C198
C198
C2.2U6.3Y
C2.2U6.3Y
C202
C202
X_C2.2U6.3Y
X_C2.2U6.3Y
C261
C261
X_C2.2U6.3Y
X_C2.2U6.3Y
C217
C217
C2.2U6.3Y
C2.2U6.3Y
C242
C242
C2.2U6.3Y
C2.2U6.3Y
C285
C285
C10U10Y0805
C10U10Y0805
C298
C298
X_C10U10Y0805
X_C10U10Y0805
C300
C300
C0.1U25Y0402
C0.1U25Y0402
C301
C301
X_C10U10Y0805
X_C10U10Y0805
C318
C318
C0.1U25Y0402
C0.1U25Y0402
C332
C332
C0.1U25Y0402
C0.1U25Y0402
C342
C342
X_C10U10Y0805
X_C10U10Y0805
C312
C312
X_C10U10Y0805
X_C10U10Y0805
C366
C366
C0.1U25Y0402
C0.1U25Y0402
C586
C586
X_C10U10Y0805
X_C10U10Y0805
C587
C587
X_C10U10Y0805
X_C10U10Y0805
C590
C590
X_C10U10Y0805
X_C10U10Y0805
C591
C591
X_C10U10Y0805
X_C10U10Y0805
C592
C592
X_C10U10Y0805
X_C10U10Y0805
C588
C588
X_C0.1U16X
X_C0.1U16X
C589
C589
X_C0.1U16X
X_C0.1U16X
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
Intel Bearlake G31 - CPU Signals
MS-7379
MS-7379
MS-7379
1
of
11 35Tuesday, October 16, 2007
of
11 35Tuesday, October 16, 2007
of
11 35Tuesday, October 16, 2007
2.1
2.1
2.1
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