
5
4
3
2
1
CONTENT SHEET
Cover Sheet, Block diagram
Intel LGA775 CPU - Signals
Intel Bearlake - FSB, PCIE, DMI, VGA, MSIC
D D
Intel Bearlake - Memory DDR2
Intel Bearlake - Power / GND
ICH9 - PCI, USB, DMI, PCIE
ICH9 - Host, DMI, SATA, Audio, SPI, RTC, MSIC
ICH9 - Power, GND
DDR2 Channel-A / Channel-B
CY505YC56DT CLK Gen.
LPC I/O IT8718F & FWH/KB/MS
SATA & COM1 & LPT & TPM
PCI-Express X16 & X4
C C
PCI Slot 1 & 2
USB CONNECTORS 21
VGA Conn
VRD11 Intersil 6312 3Phase
MS7 ACPI Controller
V_1P25_CORE & AMT
ATX & F-Panel & FAN
LAN-NINEVEH 82566MM
HD Audio ALC888
FWH & HOOD Sense
MANUAL PARTS
B B
GPIO & Jumper setting
POWER Distribution
PWROK MAP
RESET MAP
History
1-2
3-5
6
7
8-9
10
11
12
13-15
16
17
18
19
20
22
23
24
25
26
27
28
29
30
31
32
33
34
35
MS-7377(BELEM)
CPU:
System Chipset:
On Board Device:
Main Memory:
Expansion Slots:
LGA 775 Yorkfiled Qual core --95W
Wolfdale 1333 , 1066 , 800 -- 45W
Core 2 duo 1333 E6*50 -- 65W
Core 2 duo 1066 E6*00 -- 65W
Core 2 duo 800 E4XXX -- 65W
Daul Core E2XX --65W
Celeron 4XX -- 35W
Intel Bearlake - Q35 (North Bridge)
Intel ICH9 DO(South Bridge)
CLOCK Gen -- ICS9LP505-2HLFT 54PIN or Silego 84516BT
LPC Super I/O -- ITE8718
LAN-- Intel 82566MM
HD Audio Codec -- ALC888
Dual-channel DDR-II * 4
uBTX
Version: 0A
PCI EXPRESS X16 SLOT *1
PCI EXPRESS X1 SLOT * 2
PCI SLOT * 1
A A
PWM:
5
4
VRD11 Intersil 6312 3Phase
3
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Cover Sheet
Cover Sheet
Cover Sheet
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
1
of
of
of
135Monday, March 05, 2007
135Monday, March 05, 2007
135Monday, March 05, 2007

5
4
3
2
1
Block Diagram
D D
VRD 11
Intersil 6312
3-Phase PWM
PCI_E X16
Connector
Analog
C C
Video Out
PCI_E x4
PCI EXPRESS X16
RGB
PCI_E x4
Intel LGA775 Processor
FSB 800/1066/1333
FSB
Bearlake
Q35
GMCH
DMI
DDRII
HD Audio Link
DDR2 667/800
4 DDR II
DIMM
Modules
HD Audio Codec
ALC888
Board Stack-up
(1080 Prepreg Considerations)
Solder Mask
PREPREG 2.7mils
CORE 50mils
Solder Mask
PREPREG 2.7mils
Single End 50ohm Top/Bottom : 4mils
USB2.0 - 90ohm : 15/7.5/4.5/7.5/15
SATA - 95ohm : 15/8/4/8/15
LAN - 100ohm : 15/10/4/10/15
PCIE - 95ohm : 15/8/4/8/15
1.9mils Cu plus plating
1.9mils Cu plus plating
1 oz. (1.2mils)
Cu Power
Plane
1 oz. (1.2mils)
Cu GND
Plane
ICH9 DO
SATA-II 0~4
B B
USB Port 0~9
SATA2
USB2.0
LPC Bus
PCI
PCI Slot 1
PCI Slot 2
PCI_E to LAN
Intel 82566MM
AMT & ASF
A A
5
PCI_E x1
SPI
Flash ROM
SPI
LPC
Debug Port
4
LPC SIO
ITE IT8718
Keyboard
Mouse
Floopy
Serial
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
1
of
of
of
235Friday, March 02, 2007
235Friday, March 02, 2007
235Friday, March 02, 2007

8
7
6
5
4
3
2
1
VCC_VRM_SENSE
EC1
EC1
C10U10X1206
CPU SIGNAL BLOCK
U1A
U1A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
H_A#[3..35]
D53#
D52#
D51#
C14
C15
H_D#52
H_D#51
D50#
A14
D17
H_D#49
H_D#50
H_A#35
AJ6
A35#
D49#
D48#
D20
H_D#48
H_A#34
H_A#33
AJ5
AH5
A34#
D47#
D22
G22
H_D#46
H_D#47
H_A#32
AH4
A33#
A32#
D46#
D45#
E22
H_D#45
H_A#31
H_A#30
AG5
AG4
A31#
D44#
F21
G21
H_D#44
H_D#43
H_A#29
AG6
A30#
A29#
D43#
D42#
E21
H_D#42
H_A#28
H_A#27
AF4
AF5
A28#
D41#
F20
E19
H_D#40
H_D#41
H_A#26
AB4
A27#
A26#
D40#
D39#
E18
H_D#39
H_A#25
H_A#24
AC5
AB5
A25#
D38#
F18
F17
H_D#38
H_D#37
H_A#23
AA5
A24#
A23#
D37#
D36#
G17
H_D#36
H_A#22
H_A#21
AD6
AA4
A22#
D35#
E16
G18
H_D#34
H_D#35
H_A#19
H_A#20
A21#
A20#Y4A19#Y6A18#W6A17#
D34#
D33#
D32#
E15
G16
H_D#33
H_D#32
H_A#17
H_A#18
H_A#16
H_A#15
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D31#
D30#
D29#
D28#
F15
F14
G15
G14
H_D#30
H_D#31
H_D#29
H_D#28
H_A#14
H_A#13
D27#
E13
G13
H_D#26
H_D#27
H_A#12
D26#
D25#
D13
H_D#25
H_A#11
F12
H_D#24
H_A#8
H_A#10
H_A#7
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D24#
D23#
D22#
D21#
F11
E10
D10
H_D#22
H_D#23
H_D#21
H_D#20
H_A#6
H_A#5
H_A#4
H_A#3
L5
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
D11
H_D#19
H_D#15
H_D#18
H_D#16
H_D#14
H_D#17
AC2
DBR#
D14#
C12
B12
H_D#13
AN4
AN3
VSS_SENSE
VCC_SENSE
D13#
D12#D8D11#
C11
H_D#12
H_D#11
H_D#10
VID6
VID7
VID5
AM5
AM7
AJ3
AK3
AN6
AN5
VID6#
RSVD
ITP_CLK1
ITP_CLK0
VSS_MB_REGULATION
VCC_MB_REGULATION
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B10
A11
A10
H_D#7
H_D#8
H_D#9
H_D#4
H_D#5
H_D#6
H_D#3
H_D#2
VID4
VID2
VID3
AL4
AK4
AL6
AM3
VID5#
VID4#
VID3#
VID2#
VID_SELECT
GTLREF0
GTLREF1
GTLREF_SEL
CS_GTLREF
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
BCLK1#
BCLK0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B4
H_D#0
H_D#1
VID1
AL5
RSVD
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
DP3#
DP2#
DP1#
DP0#
VID0
AM2
VID1#
D D
H_DBI#0[6]
H_DBI#1[6]
H_DBI#2[6]
H_DBI#3[6]
CPU_GTLREF1[4]
H_FERR#[11]
H_STPCLK#[11]
H_INIT#[11]
H_DBSY#[6]
H_DRDY#[6]
H_TRDY#[6]
C C
THERMDA_CPU[17]
VTIN_GND[17]
H_A20M#[11]
H_BPM#1
B B
H_D#[0..63][6]
A A
H_ADS#[6]
H_LOCK#[6]
H_BNR#[6]
H_HIT#[6]
H_HITM#[6]
H_BPRI#[6]
H_DEFER#[6]
H_TRMTRIP#[11]
H_PROCHOT#[4]
H_IGNNE#[11]
ICH_H_SMI#[11]
VTT_OUT_LEFT H_TESTHI13
CPU_GTLREF0[4]
H_FSBSEL0[16]
H_FSBSEL1[16]
H_FSBSEL2[16]
H_PWRGD[4,11]
H_CPURST#[4,6]
H_D#[0..63]
H_TRMTRIP#
H_PROCHOT#
H_IGNNE#
ICH_H_SMI#
H_A20M#
51R0402
51R0402
R16
R16
Kentsfield
R17 X_0R0402R17 X_0R0402
CPU_GTLREF0
R19 51R0402R19 51R0402
H_FSBSEL0
H_FSBSEL1
H_FSBSEL2
H_PWRGD
H_CPURST#
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_IERR#
H_FERR#
H_STPCLK#
H_INIT#
H_DBSY#
H_DRDY#
H_TRDY#
H_ADS#
H_LOCK#
H_BNR#
H_HIT#
H_HITM#
H_BPRI#
H_DEFER#
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_A#[3..35][6]
AD3
AD1
AC1
AG1
AH2
A8
G11
D19
C20
F2
AB2
AB3
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
AF1
AE1
AL1
AK1
M2
AE8
AL2
N2
P2
K3
L2
N5
AE6
C9
G10
D16
A20
Y1
V2
AA2
G29
H30
G30
N1
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
C10U10X1206
VID[0..7] [23]
VTT_OUT_RIGHT
R2
VID0#
X_680RR2X_680R
AN7
CPU_GTLREF0
H1
CPU_GTLREF1
H2
GTLREF_SELCPU_GTLREF1
H29
CPU_MCH_GTLREF
E24
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0 H_BPM#0
AJ2
G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
H_TESTHI2_7
F25
H_TESTHI1
W3
H_TESTHI0
F26
FORCEPH
AK6
G6
G28
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
U3
U2
F3
H_COMP5
T2
H_COMP4
J2
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
J17
H16
H15
J16
H_ADSTB#1
AD5
H_ADSTB#0
R6
H_DSTBP#3
C17
H_DSTBP#2
G19
H_DSTBP#1
E12
H_DSTBP#0
B9
H_DSTBN#3
A16
H_DSTBN#2
G20
H_DSTBN#1
G12
H_DSTBN#0
C8
H_NMI
L1
H_INTR
K1
VSS_VRM_SENSE
VID2
VID5
VID4
VID0
VID7
VID3
VID6
VID1
VRD_VIDSEL [23]
CPU_GTLREF0 [4]
CPU_GTLREF1 [4]
CPU_MCH_GTLREF [6]
R3 0R0402R3 0R0402
H_REQ#[0..4]
R6 51R0402R6 51R0402
R8 51R0402R8 51R0402
R7 51R0402R7 51R0402
TP2TP2
TP3TP3
R10 51R0402R10 51R0402
CK_H_CPU# [16]
CK_H_CPU [16]
H_RS#[0..2] [6]
H_BR#0
R9 51R0402R9 51R0402
R11 51R0402R11 51R0402
R12 51R0402R12 51R0402
R14 51R0402R14 51R0402
R13 X_62R0402R13 X_62R0402
H_RS#[0..2]
R18 X_49.9R1%0402R18 X_49.9R1%0402
R21 X_49.9R1%0402R21 X_49.9R1%0402
R20 49.9R1%0402R20 49.9R1%0402
R22 49.9R1%0402R22 49.9R1%0402
R23 49.9R1%0402R23 49.9R1%0402
R24 49.9R1%0402R24 49.9R1%0402
TP4TP4
TP5TP5
TP7TP7
TP6TP6
H_ADSTB#1 [6]
H_ADSTB#0 [6]
H_DSTBP#3 [6]
H_DSTBP#2 [6]
H_DSTBP#1 [6]
H_DSTBP#0 [6]
H_DSTBN#3 [6]
H_DSTBN#2 [6]
H_DSTBN#1 [6]
H_DSTBN#0 [6]
H_NMI [11]
H_INTR [11]
VCC_VRM_SENSE [23]
VSS_VRM_SENSE [23]
RN1
RN1
8P4R-680R
8P4R-680R
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
RN2 8P4R-680RRN2 8P4R-680R
TP1TP1
H_BPM#0 [5]
PECI [11,17]
H_REQ#[0..4] [6]
H_TESTHI12 [5]
V_FSB_VTT
VTT_OUT_RIGHT [4,5]
H_BR#0 [4,6]
C3
C3
X_C0.1U16Y0402
X_C0.1U16Y0402
VTT_OUT_RIGHT
C0.1U16Y0402
C0.1U16Y0402
VTT_OUT_LEFT
VTT_OUT_LEFT [4]
FORCEPH
C1
C1
H_TESTHI8 H_BPM#3H_TESTHI12
VTT_OUT_RIGHT
H_PROCHOT#
R30 X_0R0402R30 X_0R0402
VTT_OUT_RIGHT [4,5]
C2
C2
C0.1U16Y0402
C0.1U16Y0402
Prescott / Cedar Mill
LL_ID[1:0] = 00
GTLREF_SEL = 0
VTT_SEL = 1
0
0 0 133 MHZ (533)
VTT_OUT_RIGHT
C4 C0.1U16Y0402C4 C0.1U16Y0402
C5 C0.1U16Y0402C5 C0.1U16Y0402
B
Kentsfield
H_BPM#2H_TESTHI9
TABLE
FSB FREQUENCY
BSEL
1
R5 X_0R0402R5 X_0R0402
R4 X_0R0402R4 X_0R0402
02
267 MHZ (1067)000
01 200 MHZ (800)
1
RN3
RN3
8P4R-51R0402
8P4R-51R0402
1 2
3 4
5 6
7 8
RN4
RN4
8P4R-51R0402
8P4R-51R0402
1 2
3 4
5 6
7 8
RN51
RN51
8P4R-51R0402
8P4R-51R0402
1 2
3 4
5 6
7 8
PLACE BPM TERMINATION NEAR CPU
VCC3
R28
R28
R29
R29
X_10KR0402
X_10KR0402
10KR0402
10KR0402
Q1
Q1
X_N-MMBT3904_NL_SOT23
X_N-MMBT3904_NL_SOT23
CE
ICH_THERM# [11]
H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
H_TMS
H_TDI
H_BPM#2
H_BPM#4
H_TCK
H_TRST#
H_IERR#
H_TDO
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Intel LGA775 - Signals
Intel LGA775 - Signals
Intel LGA775 - Signals
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
of
of
of
335Saturday, March 24, 2007
335Saturday, March 24, 2007
335Saturday, March 24, 2007
1

8
VCCP
7
6
5
4
3
2
1
AF21
U1B
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCCP
U1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
W29
W28
W27
W26
W25
W24
W23
U26
U27
U28
U29
U30
VCCP
D D
C C
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN8VCCP8VCCR8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
T30
U23
U24
U25
N30
N23
N24
N25
N26
N27
N28
N29
M24
M25
M26
M27
M28
M29
M30
K27
K28
K29
K30
M23
T23
T24
T25
T26
T27
T28
T29
J30
K23
K24
K25
K26
AN9
AN8
AN30
AN29
AN26
HS11HS22HS33HS4
AN25
A23
B23
D23
C23
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
AM6
AA1
J1
F27
F29
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
4
H_VCCA
H_VSSA
H_VCCPLL
H_VCCA
VTT_PWG
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
VCCA ------ 120mA
VCCIOPLL -- 100mA
H_VCCPLL [8]
V_FSB_VTT
C6 C10U10Y0805C6 C10U10Y0805
C7 C10U10Y0805C7 C10U10Y0805
C8 C10U10Y0805C8 C10U10Y0805
CAPS FOR FSB GENERIC
VTT_SEL [25]
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
R31
R31
100R1%
100R1%
B B
VTT_OUT_RIGHT CPU_GTLREF1
R38
R38
100R1%
100R1%
R34
R34
200R1%
200R1%
R44
R44
200R1%
200R1%
R33
R33
10R0402
10R0402
C9
C9
C0.1U16Y0402
C0.1U16Y0402
10R0402
10R0402
C16
C16
C0.1U16Y0402
C0.1U16Y0402
CPU_GTLREF0VTT_OUT_RIGHT
R41
R41
CPU_GTLREF0 [3]
C10
C10
C220P50N0402
C220P50N0402
CPU_GTLREF1 [3]
C17
C17
C220P50N0402
C220P50N0402
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
V_FSB_VTT
CP35
CP35
X_COPPER
X_COPPER
C13
C13
C1U16Y
C1U16Y
C14
C14
C10U10Y0805
C10U10Y0805
C15
C15
C10U10Y0805
C10U10Y0805
H_VCCA
H_VSSA
The VCCA, VSSA, and VCCIOPLL processor lands can be no connects
V_1P5_CORE
CP38
CP38
X_COPPER
X_COPPER
C22
C22
C10U10Y0805
C10U10Y0805
C23
C23
C1U16Y
C1U16Y
H_VCCPLL
C24
C24
C0.1U16Y0402
C0.1U16Y0402
For board supporting only Intel Core2 Duo and Wolfale Family process
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
Reserved for Kentsfield (Q-core)
C21
C21
VCC3 VCC5
VID_GD#
VTT_OUT_RIGHT
VCC5_SB
4
R40
R40
1KR0402
1KR0402
PLACE AT CPU END OF ROUTE
A A
VTT_OUT_RIGHT[3,5]
VTT_OUT_LEFT[3]
8
VTT_OUT_RIGHT H_PROCHOT#
VTT_OUT_LEFT
R46 130R1%0402R46 130R1%0402
R48 62R0402R48 62R0402
R47 X_100R0402R47 X_100R0402
R49 62R0402R49 62R0402
7
H_CPURST#
H_PWRGD
H_BR#0
H_PROCHOT# [3]
H_CPURST# [3,6]
H_PWRGD [3,11]
H_BR#0 [3,6]
6
VID_GD#[23,24]
5
R37 680RR37 680R
R43 1KR0402R43 1KR0402
Q2
Q2
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
1.25V VTT_PWRGOOD
VTT_PWG
C20
C20
X_C1U16Y
X_C1U16Y
3
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
C0.1U16Y0402
C0.1U16Y0402
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
Custom
Custom
Custom
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
2
of
of
of
435Saturday, March 24, 2007
435Saturday, March 24, 2007
435Saturday, March 24, 2007
1

8
D D
VTT_OUT_RIGHT[3,4]
R52
R52
X_49.9R1%0402
X_49.9R1%0402
7
TP8TP8
TP10TP10
R51
R51
51R0402
51R0402
R53
R53
X_49.9R1%0402
X_49.9R1%0402
TP9TP9
X_51R0402
X_51R0402
R54
R54
24.9R1%0402
24.9R1%0402
6
R55
R55
R56
R56
X_51R0402
X_51R0402
5
R57 0R0402R57 0R0402
H_TESTHI12
4
H_TESTHI12 [3]
3
2
1
RSVD
VSS
AF17
VSS
F23
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
VSS
AF20
AF23
AF24
AF25
F6
IMPSEL#
VSS
VSS
AF26
H_COMP8
B13
AF27
H_COMP7
H_COMP6
AE3
AE4
D14
VSS
AE29
COMP6Y3COMP7
VSS
VSS
AE5
AE30
AE7
RSVD
VSS
AF10
E23
RSVDD1RSVD
VSS
VSS
AF13
AF16
U1C
U1C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
VSS
A24
VSS
A6
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R59X_1K/4 R59X_1K/4
C C
B B
RSVD
VSS
AF28
VSS
AF29
RSVDJ3RSVDN4RSVD
VSS
VSS
AF3
AF30
VSS
MSID1
MSID0
W1
P5
AC4
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
RSVD
MSID[1]V1MSID[0]
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF6
AF7
AG10
AG13
AG16
AG17
AG20
AG23
VSS
AG24
AG7
VSS
AH1
VSS
VSS
AH10
VSS
AH13
VSS
AH16
V30
VSS
AH17
VSSV3VSS
VSS
AH20
V29
VSS
AH23
V28
VSS
VSS
AH24
V27
AH3
VSS
VSS
V26
VSS
VSS
AH6
V25
V24
V23
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
AH7
AJ10
AJ13
AJ16
AJ17
VSS
AJ20
VSS
AJ23
VSS
AJ24
VSS
AJ27
VSS
AJ28
VSS
R30
AJ29
VSS
R29
AJ30
VSS
VSS
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
VSS
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
AL27
VSS
L30
AL28
VSS
VSSL3VSS
VSS
AL3
L29
L28
L27
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
L26
VSS
VSS
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23
VSS
VSS
AM20
VSSK7VSS
VSS
AM23
K5
VSS
AM24
K2
VSS
AM27
VSS
AM28
AM4
VSS
AN1
VSS
VSS
AN10
VSS
AN13
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
AN16
VSS
AN17
H28
AN2
VSS
VSS
H27
VSS
VSS
AN20
H26
VSS
VSS
AN23
H25
VSS
VSS
AN24
H24
VSS
VSS
AN27
H23
VSS
VSS
AN28
H21
H22
VSS
VSS
VSSB1VSS
H17
H18
H19
H20
VSS
VSS
VSS
VSS
VSS
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B11
B14
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
R60 0R0402R60 0R0402
R61 0R0402R61 0R0402
H_BPM#0 [3]
TP11TP11
A A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
of
of
of
535Saturday, March 24, 2007
535Saturday, March 24, 2007
535Saturday, March 24, 2007
1

5
U1MCH
U1MCH
U2B
U2B
J42
FSB_AB_3
L39
FSB_AB_4
J40
FSB_AB_5
L37
FSB_AB_6
L36
FSB_AB_7
K42
FSB_AB_8
N32
FSB_AB_9
N34
FSB_AB_10
M38
FSB_AB_11
N37
FSB_AB_12
M36
FSB_AB_13
R34
FSB_AB_14
N35
FSB_AB_15
N38
FSB_AB_16
U37
FSB_AB_17
N39
FSB_AB_18
R37
FSB_AB_19
P42
FSB_AB_20
R39
FSB_AB_21
V36
FSB_AB_22
R38
FSB_AB_23
U36
FSB_AB_24
U33
FSB_AB_25
R35
FSB_AB_26
V33
FSB_AB_27
V35
FSB_AB_28
Y34
FSB_AB_29
V42
FSB_AB_30
V38
FSB_AB_31
Y36
FSB_AB_32
Y38
FSB_AB_33
Y39
FSB_AB_34
AA37
FSB_AB_35
F40
FSB_REQB_0
L35
FSB_REQB_1
L38
FSB_REQB_2
G43
FSB_REQB_3
J37
FSB_REQB_4
M34
FSB_ADSTBB_0
U34
FSB_ADSTBB_1
M42
FSB_DSTBPB_0
M43
FSB_DSTBNB_0
G35
FSB_DSTBPB_1
H33
FSB_DSTBNB_1
G27
FSB_DSTBPB_2
H27
FSB_DSTBNB_2
B38
FSB_DSTBPB_3
C38
FSB_DSTBNB_3
M40
FSB_DINVB_0
J33
FSB_DINVB_1
G29
FSB_DINVB_2
E33
FSB_DINVB_3
W40
FSB_ADSB
Y40
FSB_TRDYB
W41
FSB_DRDYB
T43
FSB_DEFERB
Y43
FSB_HITMB
U42
FSB_HITB
V41
FSB_LOCKB
AA42
FSB_BREQ0B
W42
FSB_BNRB
G39
FSB_BPRIB
U40
FSB_DBSYB
U41
FSB_RSB_0
AA41
FSB_RSB_1
U39
FSB_RSB_2
C31
FSB_CPURSTB
1 OF 7
1 OF 7
BRLK_B_CRB
BRLK_B_CRB
*GTLREF VOLTAGE SHOULD BE
0.67*VTT=0.8V (At VTT=1.2V)
V_FSB_VTT
R80
R80
100R1%
100R1%
R82
R82
200R1%
200R1%
FSB_DB_0
FSB_DB_1
FSB_DB_2
FSB_DB_3
FSB_DB_4
FSB_DB_5
FSB_DB_6
FSB_DB_7
FSB_DB_8
FSB_DB_9
FSB_DB_10
FSB_DB_11
FSB_DB_12
FSB_DB_13
FSB
FSB
FSB_DB_14
FSB_DB_15
FSB_DB_16
FSB_DB_17
FSB_DB_18
FSB_DB_19
FSB_DB_20
FSB_DB_21
FSB_DB_22
FSB_DB_23
FSB_DB_24
FSB_DB_25
FSB_DB_26
FSB_DB_27
FSB_DB_28
FSB_DB_29
FSB_DB_30
FSB_DB_31
FSB_DB_32
FSB_DB_33
FSB_DB_34
FSB_DB_35
FSB_DB_36
FSB_DB_37
FSB_DB_38
FSB_DB_39
FSB_DB_40
FSB_DB_41
FSB_DB_42
FSB_DB_43
FSB_DB_44
FSB_DB_45
FSB_DB_46
FSB_DB_47
FSB_DB_48
FSB_DB_49
FSB_DB_50
FSB_DB_51
FSB_DB_52
FSB_DB_53
FSB_DB_54
FSB_DB_55
FSB_DB_56
FSB_DB_57
FSB_DB_58
FSB_DB_59
FSB_DB_60
FSB_DB_61
FSB_DB_62
FSB_DB_63
FSB_SWING
FSB_RCOMP
FSB_SCOMP
FSB_SCOMPB
FSB_DVREF
FSB_ACCVREF
HPL_CLKINP
HPL_CLKINN
R83
R83
51R1%0402
51R1%0402
C28
C28
C10U10Y0805
C10U10Y0805
R40
P41
R41
N40
R42
M39
N41
N42
L41
J39
L42
J41
K41
G40
F41
F42
C42
D41
F38
G37
E42
E39
E37
C39
B39
G33
A37
F33
E35
K32
H32
B34
J31
F32
M31
E31
K31
G31
K29
F31
J29
F29
L27
K27
H26
L26
J26
M26
C33
D35
E41
B41
D42
C40
C35
B40
D38
D37
B33
D33
C34
B35
A32
D32
B25
D23
C25
D25
D24
B24
R32
U32
CPU_MCH_GTLREF
MCH_GTLREF
C29
C29
C220P50N0402
C220P50N0402
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
CK_H_MCH
CK_H_MCH#
H_ADS#[3]
H_HITM#[3]
H_HIT#[3]
H_BR#0[3,4]
H_BNR#[3]
H_BPRI#[3]
C26
C26
X_C2.7P25N0402
X_C2.7P25N0402
HXSCOMPB
C27
C27
X_C2.7P25N0402
X_C2.7P25N0402
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
HXRCOMP
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_A#[3..35][3] H_D#[0..63] [3]
D D
H_REQ#[0..4][3]
H_DBI#[0..3][3]
H_RS#[0..2][3]
H_ADSTB#0[3]
H_ADSTB#1[3]
H_DSTBP#0[3]
H_DSTBN#0[3]
H_DSTBP#1[3]
H_DSTBN#1[3]
H_DSTBP#2[3]
H_DSTBN#2[3]
H_DSTBP#3[3]
H_DSTBN#3[3]
H_TRDY#[3]
H_DRDY#[3]
H_DEFER#[3]
H_LOCK#[3]
H_DBSY#[3]
H_CPURST#[3,4]
R78
R78
49.9R1%0402
49.9R1%0402
R79
R79
49.9R1%0402
49.9R1%0402
R81
R81
16.5R1%0402-RH
16.5R1%0402-RH
C C
B B
V_FSB_VTT HXSCOMP
V_FSB_VTT
HXSWING SHOULD BE 1/4*VTT
V_FSB_VTT
A A
R85
R85
301R1%0402
301R1%0402
R87
R87
100R1%0402
100R1%0402
V_FSB_VTT
R88
R88
49.9R1%0402
49.9R1%0402
C30
C30
C0.01U25X0402
C0.01U25X0402
HXSWING
5
HXSWING
HXRCOMP
HXSCOMP
HXSCOMPB
MCH_GTLREF
4
CK_H_MCH [16]
CK_H_MCH# [16]
CPU_MCH_GTLREF [3]
4
3
U1MCH
U2A
EXP_A_RXP_0[19]
EXP_A_RXN_0[19]
EXP_A_RXP_1[19]
EXP_A_RXN_1[19]
EXP_A_RXP_2[19]
EXP_A_RXN_2[19]
EXP_A_RXP_3[19]
EXP_A_RXN_3[19]
EXP_A_RXP_4[19]
EXP_A_RXN_4[19]
EXP_A_RXP_5[19]
EXP_A_RXN_5[19]
EXP_A_RXP_6[19]
EXP_A_RXN_6[19]
EXP_A_RXP_7[19]
EXP_A_RXN_7[19]
EXP_A_RXP_8[19]
EXP_A_RXN_8[19]
EXP_A_RXP_9[19]
EXP_A_RXN_9[19]
EXP_A_RXP_10[19]
EXP_A_RXN_10[19]
EXP_A_RXP_11[19]
EXP_A_RXN_11[19]
EXP_A_RXP_12[19]
EXP_A_RXN_12[19]
EXP_A_RXP_13[19]
EXP_A_RXN_13[19]
EXP_A_RXP_14[19]
EXP_A_RXN_14[19]
EXP_A_RXP_15[19]
EXP_A_RXN_15[19]
DMI_ITP_MRP_0[10]
DMI_ITN_MRN_0[10]
DMI_ITP_MRP_1[10]
DMI_ITN_MRN_1[10]
DMI_ITP_MRP_2[10]
DMI_ITN_MRN_2[10]
DMI_ITP_MRP_3[10]
DMI_ITN_MRN_3[10]
CK_PE_100M_MCH[16]
CK_PE_100M_MCH#[16]
SDVO_CTRL_DATA[19]
SDVO_CTRL_CLK[19]
MTYPE
EXP_SLR
EXP_EN
MCH_TCEN
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
SDVO_CTRL_DATA
SDVO_CTRL_CLK
EXP16_PRSNT#[19]
PIN H L Description
DDR2
Normal
Concurrent
Enable
U2A
F13
PEG_RXP_0
E13
PEG_RXN_0
K15
PEG_RXP_1
J15
PEG_RXN_1
F12
PEG_RXP_2
E12
PEG_RXN_2
J12
PEG_RXP_3
H12
PEG_RXN_3
J11
PEG_RXP_4
H11
PEG_RXN_4
F7
PEG_RXP_5
E7
PEG_RXN_5
E5
PEG_RXP_6
F6
PEG_RXN_6
C2
PEG_RXP_7
D2
PEG_RXN_7
G6
PEG_RXP_8
G5
PEG_RXN_8
L9
PEG_RXP_9
L8
PEG_RXN_9
M8
PEG_RXP_10
M9
PEG_RXN_10
M4
PEG_RXP_11
L4
PEG_RXN_11
M5
PEG_RXP_12
M6
PEG_RXN_12
R9
PEG_RXP_13
R10
PEG_RXN_13
T4
PEG_RXP_14
R4
PEG_RXN_14
R6
PEG_RXP_15
R7
PEG_RXN_15
W2
DMI_RXP_0
V1
DMI_RXN_0
Y8
DMI_RXP_1
Y9
DMI_RXN_1
AA7
DMI_RXP_2
AA6
DMI_RXN_2
AB3
DMI_RXP_3
AA4
DMI_RXN_3
B12
EXP_CLKINP
B13
EXP_CLKINN
G17
SDVO_CTRLDATA
E17
SDVO_CTRLCLK
BRLK_B_CRB
BRLK_B_CRB
EXP16_PRSNT#
DDR3
Reverse
Non-concurrent
Disable
3
U1MCH
PEG_TXP_0
PEG_TXN_0
PEG_TXP_1
PEG_TXN_1
PEG_TXP_2
PEG_TXN_2
PEG_TXP_3
PEG_TXN_3
PEG_TXP_4
PEG_TXN_4
PEG_TXP_5
PEG_TXN_5
PEG_TXP_6
PEG_TXN_6
PEG_TXP_7
PEG_TXN_7
PEG_TXP_8
PEG_TXN_8
PEG_TXP_9
PEG_TXN_9
PEG_TXP_10
PCIE
PCIE
PEG_TXN_10
PEG_TXP_11
PEG_TXN_11
PEG_TXP_12
PEG_TXN_12
PEG_TXP_13
PEG_TXN_13
PEG_TXP_14
PEG_TXN_14
PEG_TXP_15
PEG_TXN_15
DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3
DMI
DMI
EXP_COMPO
EXP_COMPI
2 OF 7
2 OF 7
R73 X_1KR0402R73 X_1KR0402
R74 1KR0402R74 1KR0402
R75 0R0402R75 0R0402
R76 X_1KR0402R76 X_1KR0402
R77 X_1KR0402R77 X_1KR0402
MEMORY TYPE
PCI_E Lane Reversal
PCI_E/SDVO co-existence
TLS confidentiality
CLINK_DATA[11]
CLINK_CLK[11]
CLINK_RST[11]
CLINK_PWOK[11,25]
CHIP_PWGD
CL_VREF_MCH = 0.349V
Close to GMCH
V_1P25_CL_MCH
R86
R86
1KR1%0402
1KR1%0402
CL_VREF_MCH
C31
C31
R89
R89
C0.1U16Y0402
392R1%0402
392R1%0402
C0.1U16Y0402
D11
D12
B11
A10
C10
D9
B9
B7
D7
D6
B5
B6
B3
B4
F2
E2
F4
G4
J4
K3
L2
K1
N2
M2
P3
N4
R2
P1
U2
T2
V3
U4
V7
V6
W4
Y4
AC8
AC9
Y2
AA2
AC11
AC12
H_BSL0[16]
H_BSL1[16]
H_BSL2[16]
EXP_SLR
EXP_EN
MCH_RFU_G15
MCH_TCEN
T9T9
CLINK_DATA
CLINK_CLK
CL_VREF_MCH
CLINK_RST
CLINK_PWOK
R84 0R0402R84 0R0402
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
T1T1
T2T2
T3T3
T4T4
T5T5
T7T7
T6T6
T8T8
T10T10
AD12
AD13
AA12
AM15
AA10
AA11
2
EXP_A_TXP_0 [19]
EXP_A_TXN_0 [19]
EXP_A_TXP_1 [19]
EXP_A_TXN_1 [19]
EXP_A_TXP_2 [19]
EXP_A_TXN_2 [19]
EXP_A_TXP_3 [19]
EXP_A_TXN_3 [19]
EXP_A_TXP_4 [19]
EXP_A_TXN_4 [19]
EXP_A_TXP_5 [19]
EXP_A_TXN_5 [19]
EXP_A_TXP_6 [19]
EXP_A_TXN_6 [19]
EXP_A_TXP_7 [19]
EXP_A_TXN_7 [19]
EXP_A_TXP_8 [19]
EXP_A_TXN_8 [19]
EXP_A_TXP_9 [19]
EXP_A_TXN_9 [19]
EXP_A_TXP_10 [19]
EXP_A_TXN_10 [19]
EXP_A_TXP_11 [19]
EXP_A_TXN_11 [19]
EXP_A_TXP_12 [19]
EXP_A_TXN_12 [19]
EXP_A_TXP_13 [19]
EXP_A_TXN_13 [19]
EXP_A_TXP_14 [19]
EXP_A_TXN_14 [19]
EXP_A_TXP_15 [19]
EXP_A_TXN_15 [19]
DMI_MTP_IRP_0 [10]
DMI_MTN_IRN_0 [10]
DMI_MTP_IRP_1 [10]
DMI_MTN_IRN_1 [10]
DMI_MTP_IRP_2 [10]
DMI_MTN_IRN_2 [10]
DMI_MTP_IRP_3 [10]
DMI_MTN_IRN_3 [10]
R67 24.9R1%0402R67 24.9R1%0402
G20
BSEL0
J20
BSEL1
J18
BSEL2
K20
ALLZTEST
F20
XORTEST
G18
MTYPE
E18
EXP_SLR
K17
RESERVED_12
J17
EXP_EN
G15
RFU_G15
L17
RESERVED_14
E20
TCEN
N18
RESERVED_16
N15
RESERVED_17
N17
RESERVED_18
L15
RESERVED_19
L18
RESERVED_20
M18
RESERVED_21
CL_DATA
CL_CLK
AM5
CL_VREF
CL_RSTB
CL_PWROK
RESERVED_22
AA9
RESERVED_23
RESERVED_24
Y12
RESERVED_25
U30
RESERVED_26
U31
RESERVED_27
R29
RESERVED_28
R30
RESERVED_29
2
V_1P25_CORE
U2E
U2E
MISC VGA
MISC VGA
BRLK_B_CRB
BRLK_B_CRB
CRT_HSYNC
CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_REDB
CRT_GREENB
CRT_BLUEB
CRT_DDC_DATA
CRT_DDC_CLK
CRT_IREF
DPL_REFCLKINP
DPL_REFCLKINN
VCC
RESERVED_34
RESERVED_35
RESERVED_36
RSTINB
PWROK
ICH_SYNCB
RESERVED_37
RESERVED_33
RESERVED_32
RESERVED_31
RESERVED_30
5 OF 7
5 OF 7
1
CK_96M_DREF#
CK_96M_DREF
Close to GMCH.
Change to 0-ohm for
non-Graphic sku
HSYNC
C15
VSYNC
E15
VGA_RED
B18
VGA_GREEN
C19
VGA_BLUEMTYPE
B20
C18
D19
D20
MCH_DDC_DATA
L13
MCH_DDC_CLK
M13
DACREFSET
A20
CK_96M_DREF
C14
CK_96M_DREF#
D13
L12
V_1P25_CORE
M11
VSS
H18
F17
T11T11
A14
AM18
CHIP_PWGD
AM17
J13
A42
NC
R20
R13
R12
U11
U12
Title
Title
Title
Bearlake - FSB, PCIE, DMI, VGA, MSIC
Bearlake - FSB, PCIE, DMI, VGA, MSIC
Bearlake - FSB, PCIE, DMI, VGA, MSIC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
Date: Sheet
Date: Sheet
Date: Sheet
MS-7377 (BELEM) uBTX 0A
R70 X_0R0402R70 X_0R0402
R71 X_10KR0402R71 X_10KR0402
HSYNC [22]
VSYNC [22]
VGA_RED [22]
VGA_GREEN [22]
VGA_BLUE [22]
MCH_DDC_DATA [22]
MCH_DDC_CLK [22]
R72 1.3KR1%0402R72 1.3KR1%0402
CK_96M_DREF [16]
CK_96M_DREF# [16]
PLTRST# [11,24]
CHIP_PWGD [10,11,24]
ICH_SYNC# [11]
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
1
V_1P25_CORE
635Saturday, March 24, 2007
635Saturday, March 24, 2007
635Saturday, March 24, 2007
of
of
of

5
U1MCH
U2C
U2C
BB30
DDR_A_MA_0
AY25
DDR_A_MA_1
BA23
DDR_A_MA_2
BB23
DDR_A_MA_3
AY23
DDR_A_MA_4
BB22
DDR_A_MA_5
BA22
DDR_A_MA_6
BB21
DDR_A_MA_7
AW21
DDR_A_MA_8
BA21
DDR_A_MA_9
BB31
DDR_A_MA_10
AY21
DDR_A_MA_11
BC20
DDR_A_MA_12
AY38
DDR_A_MA_13
BA19
DDR_A_MA_14
BA33
DDR_A_WEB
AW35
DDR_A_CASB
AY33
DDR_A_RASB
BA31
DDR_A_BS_0
AY31
DDR_A_BS_1
AY20
DDR_A_BS_2
BA34
DDR_A_CSB_0
AY35
DDR_A_CSB_1
BB33
DDR_A_CSB_2
BB38
DDR_A_CSB_3
AY19
DDR_A_CKE_0
AW18
DDR_A_CKE_1
BB19
DDR_A_CKE_2
BA18
DDR_A_CKE_3
BB35
DDR_A_ODT_0
BA38
DDR_A_ODT_1
BA35
DDR_A_ODT_2
BA39
DDR_A_ODT_3
AR31
DDR_A_CK_0
AU31
DDR_A_CKB_0
AP27
DDR_A_CK_1
AN27
DDR_A_CKB_1
AV33
DDR_A_CK_2
AW33
DDR_A_CKB_2
AP29
DDR_A_CK_3
AP31
DDR_A_CKB_3
AM26
DDR_A_CK_4
AM27
DDR_A_CKB_4
AT33
DDR_A_CK_5
AU33
DDR_A_CKB_5
BC16
DDR3_DRAMRSTB
AN15
DDR3_DRAM_PWROK
AY37
DDR3_A_CSB1
BB29
DDR3_A_MA0
BB34
DDR3_A_WEB
AW32
DDR3_B_ODT3
BC43
TEST3
BC1
TEST1
A43
TEST0
AN21
RESERVED_1
N20
NC_1
B2
NC_2
B42
NC_3
B43
NC_4
BB1
NC_5
BB2
NC_6
BB43
NC_7
BC2
NC_8
BC42
NC_9
DDR_A
DDR_A
T16T16
T17T17
T19T19
T18T18
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
WE_A#
CAS_A#
RAS_A#
SBS_A0
SBS_A1
SBS_A2
SCS_A#0
SCS_A#1
SCS_A#2
SCS_A#3
SCKE_A0
SCKE_A1
SCKE_A2
SCKE_A3
ODT_A0
ODT_A1
ODT_A2
ODT_A3
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
P_DDR3_A
N_DDR3_A
P_DDR4_A
N_DDR4_A
P_DDR5_A
N_DDR5_A
R91 0R0402R91 0R0402
MAA_A[0..14][13,15]
D D
WE_A#[13,15]
CAS_A#[13,15]
RAS_A#[13,15]
SBS_A[0..2][13,15]
SCS_A#0[13,15]
SCS_A#1[13,15]
SCS_A#2[13,15]
SCS_A#3[13,15]
SCKE_A0[13,15]
SCKE_A1[13,15]
SCKE_A2[13,15]
SCKE_A3[13,15]
ODT_A0[13,15]
ODT_A1[13,15]
ODT_A2[13,15]
C C
B B
ODT_A3[13,15]
P_DDR0_A[13]
N_DDR0_A[13]
P_DDR1_A[13]
N_DDR1_A[13]
P_DDR2_A[13]
N_DDR2_A[13]
P_DDR3_A[13]
N_DDR3_A[13]
P_DDR4_A[13]
N_DDR4_A[13]
P_DDR5_A[13]
N_DDR5_A[13]
U1MCH
NC
NC
3 OF 7
3 OF 7
BRLK_B_CRB
BRLK_B_CRB
DDR_A_DQS_0
DDR_A_DQSB_0
DDR_A_DQS_1
DDR_A_DQSB_1
DDR_A_DQS_2
DDR_A_DQSB_2
DDR_A_DQS_3
DDR_A_DQSB_3
DDR_A_DQS_4
DDR_A_DQSB_4
DDR_A_DQS_5
DDR_A_DQSB_5
DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DQS_7
DDR_A_DQSB_7
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15
DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23
DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39
DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR3
DDR3
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63
4
DDR_A_DM_0
DDR_A_DM_1
DDR_A_DM_2
DDR_A_DM_3
DDR_A_DM_4
DDR_A_DM_5
DDR_A_DM_6
DDR_A_DM_7
DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7
DDR_A_DQ_8
DDR_A_DQ_9
AP2
AP3
AW2
AW1
AY7
BA6
AT20
AU18
AR41
AR40
AL41
AL40
AG42
AG41
AC42
AC41
AN2
AW3
BB6
AN18
AU43
AM43
AG40
AC40
AM1
AN3
AR2
AR3
AL3
AM2
AR5
AR4
AV4
AV3
BA4
BB3
AU2
AU1
AY2
AY3
BB5
AY6
BA9
BB9
BA5
BB4
BC7
AY9
AT18
AR18
AU21
AT21
AP17
AN17
AP20
AV20
AV42
AU40
AP42
AN39
AV40
AV41
AR42
AP41
AN41
AM39
AK42
AK41
AN40
AN42
AL42
AL39
AJ40
AH43
AF39
AE40
AJ42
AJ41
AF41
AF42
AD40
AD43
AB41
AA40
AE42
AE41
AC39
AB42
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
DQS_A0 [13]
DQS_A#0 [13]
DQS_A1 [13]
DQS_A#1 [13]
DQS_A2 [13]
DQS_A#2 [13]
DQS_A3 [13]
DQS_A#3 [13]
DQS_A4 [13]
DQS_A#4 [13]
DQS_A5 [13]
DQS_A#5 [13]
DQS_A6 [13]
DQS_A#6 [13]
DQS_A7 [13]
DQS_A#7 [13]
DQM_A[0..7] [13]
DATA_A[0..63] [13]
VCC_DDR
R90 1KR1%0402R90 1KR1%0402
3
MAA_B[0..14][14,15]
WE_B#[14,15]
CAS_B#[14,15]
RAS_B#[14,15]
SBS_B[0..2][14,15]
SCS_B#0[14,15]
SCS_B#1[14,15]
SCS_B#2[14,15]
SCS_B#3[14,15]
SCKE_B0[14,15]
SCKE_B1[14,15]
SCKE_B2[14,15]
SCKE_B3[14,15]
ODT_B0[14,15]
ODT_B1[14,15]
ODT_B2[14,15]
ODT_B3[14,15]
P_DDR0_B[14]
N_DDR0_B[14]
P_DDR1_B[14]
N_DDR1_B[14]
P_DDR2_B[14]
N_DDR2_B[14]
P_DDR3_B[14]
N_DDR3_B[14]
P_DDR4_B[14]
N_DDR4_B[14]
P_DDR5_B[14]
N_DDR5_B[14]
At least 10 mil
PLACE 0.1UF CAP
CLOSE TO MCH
R92
R92
1KR1%0402
1KR1%0402
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14
WE_B#
CAS_B#
RAS_B#
SBS_B0
SBS_B1
SBS_B2
SCS_B#0
SCS_B#1
SCS_B#2
SCS_B#3
SCKE_B0
SCKE_B1
SCKE_B2
SCKE_B3
ODT_B0
ODT_B1
ODT_B2
ODT_B3
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
P_DDR3_B
N_DDR3_B
P_DDR4_B
N_DDR4_B
P_DDR5_B
N_DDR5_B
MCH_VREF_A
C32
C32
C0.1U16Y0402
C0.1U16Y0402
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
DDR_RCOMPVOL
DDR_RCOMPVOH
AW15
BB15
BA15
AY15
BA14
BB14
AW12
BA13
BB13
AY13
BA17
AY12
BA11
AY27
BB11
BB25
AW26
AY24
BB17
AY17
AY11
BA25
BA29
BA26
BA30
AW11
BC12
BA10
BB10
BB27
AW29
BA27
AY29
AW31
AV31
AU27
AT27
AV32
AT32
AR29
AU29
AV29
AW27
AN33
AP32
AM6
BB40
BA40
AM8
AM10
BA2
AW42
AN32
AM31
AG32
AF32
AP21
AA39
AM21
AL4
AL2
U2D
U2D
DDR_B_MA_0
DDR_B_MA_1
DDR_B_MA_2
DDR_B_MA_3
DDR_B_MA_4
DDR_B_MA_5
DDR_B_MA_6
DDR_B_MA_7
DDR_B_MA_8
DDR_B_MA_9
DDR_B_MA_10
DDR_B_MA_11
DDR_B_MA_12
DDR_B_MA_13
DDR_B_MA_14
DDR_B_WEB
DDR_B_CASB
DDR_B_RASB
DDR_B_BS_0
DDR_B_BS_1
DDR_B_BS_2
DDR_B_CSB_0
DDR_B_CSB_1
DDR_B_CSB_2
DDR_B_CSB_3
DDR_B_CKE_0
DDR_B_CKE_1
DDR_B_CKE_2
DDR_B_CKE_3
DDR_B_ODT_0
DDR_B_ODT_1
DDR_B_ODT_2
DDR_B_ODT_3
DDR_B_CK_0
DDR_B_CKB_0
DDR_B_CK_1
DDR_B_CKB_1
DDR_B_CK_2
DDR_B_CKB_2
DDR_B_CK_3
DDR_B_CKB_3
DDR_B_CK_4
DDR_B_CKB_4
DDR_B_CK_5
DDR_B_CKB_5
DDR_B
DDR_B
DDR_VREF
DDR_RCOMPXPD
DDR_RCOMPXPU
DDR_RCOMPYPD
DDR_RCOMPYPU
DDR_RCOMPVOL
DDR_RCOMPVOH
RESERVED_2
RESERVED_3
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_7
RESERVED_8
RESERVED_9
RESERVED_10
4 OF 7
4 OF 7
U1MCH
U1MCH
BRLK_B_CRB
BRLK_B_CRB
2
DDR_B_DQSB_0
DDR_B_DQSB_1
DDR_B_DQSB_2
DDR_B_DQSB_3
DDR_B_DQSB_4
DDR_B_DQSB_5
DDR_B_DQSB_6
DDR_B_DQSB_7
DDR_B_DQS_0
DDR_B_DQS_1
DDR_B_DQS_2
DDR_B_DQS_3
DDR_B_DQS_4
DDR_B_DQS_5
DDR_B_DQS_6
DDR_B_DQS_7
DDR_B_DM_0
DDR_B_DM_1
DDR_B_DM_2
DDR_B_DM_3
DDR_B_DM_4
DDR_B_DM_5
DDR_B_DM_6
DDR_B_DM_7
DDR_B_DQ_0
DDR_B_DQ_1
DDR_B_DQ_2
DDR_B_DQ_3
DDR_B_DQ_4
DDR_B_DQ_5
DDR_B_DQ_6
DDR_B_DQ_7
DDR_B_DQ_8
DDR_B_DQ_9
DDR_B_DQ_10
DDR_B_DQ_11
DDR_B_DQ_12
DDR_B_DQ_13
DDR_B_DQ_14
DDR_B_DQ_15
DDR_B_DQ_16
DDR_B_DQ_17
DDR_B_DQ_18
DDR_B_DQ_19
DDR_B_DQ_20
DDR_B_DQ_21
DDR_B_DQ_22
DDR_B_DQ_23
DDR_B_DQ_24
DDR_B_DQ_25
DDR_B_DQ_26
DDR_B_DQ_27
DDR_B_DQ_28
DDR_B_DQ_29
DDR_B_DQ_30
DDR_B_DQ_31
DDR_B_DQ_32
DDR_B_DQ_33
DDR_B_DQ_34
DDR_B_DQ_35
DDR_B_DQ_36
DDR_B_DQ_37
DDR_B_DQ_38
DDR_B_DQ_39
DDR_B_DQ_40
DDR_B_DQ_41
DDR_B_DQ_42
DDR_B_DQ_43
DDR_B_DQ_44
DDR_B_DQ_45
DDR_B_DQ_46
DDR_B_DQ_47
DDR_B_DQ_48
DDR_B_DQ_49
DDR_B_DQ_50
DDR_B_DQ_51
DDR_B_DQ_52
DDR_B_DQ_53
DDR_B_DQ_54
DDR_B_DQ_55
DDR_B_DQ_56
DDR_B_DQ_57
DDR_B_DQ_58
DDR_B_DQ_59
DDR_B_DQ_60
DDR_B_DQ_61
DDR_B_DQ_62
DDR_B_DQ_63
AV6
AU5
AR12
AP12
AP15
AR15
AT24
AU26
AW39
AU39
AL35
AL34
AG35
AG36
AC36
AC37
AR7
AW9
AW13
AP23
AU37
AM37
AG39
AD38
AN7
AN8
AW5
AW7
AN5
AN6
AN9
AU7
AT11
AU11
AP13
AR13
AR11
AU9
AV12
AU12
AU15
AV13
AU17
AT17
AU13
AM13
AV15
AW17
AV24
AT23
AT26
AP26
AU23
AW23
AR24
AN26
AW37
AV38
AN36
AN37
AU35
AR35
AN35
AR37
AM35
AM38
AJ34
AL38
AR39
AM34
AL37
AL32
AG38
AJ38
AF35
AF33
AJ37
AJ35
AG33
AF34
AD36
AC33
AA34
AA36
AD34
AF38
AC34
AA33
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
DQM_B0DQM_B0
DQM_B1DQM_B1
DQM_B2DQM_B2
DQM_B3DQM_B3
DQM_B4DQM_B4
DQM_B5DQM_B5
DQM_B6DQM_B6
DQM_B7DQM_B7
DATA_B0DATA_B0
DATA_B1DATA_B1
DATA_B2DATA_B2
DATA_B3DATA_B3
DATA_B4DATA_B4
DATA_B5DATA_B5
DATA_B6DATA_B6
DATA_B7DATA_B7
DATA_B8DATA_B8
DATA_B9DATA_B9
DATA_B10DATA_B10
DATA_B11DATA_B11
DATA_B12DATA_B12
DATA_B13DATA_B13
DATA_B14DATA_B14
DATA_B15DATA_B15
DATA_B16DATA_B16
DATA_B17DATA_B17
DATA_B18DATA_B18
DATA_B19DATA_B19
DATA_B20DATA_B20
DATA_B21DATA_B21
DATA_B22DATA_B22
DATA_B23DATA_B23
DATA_B24DATA_B24
DATA_B25DATA_B25
DATA_B26DATA_B26
DATA_B27DATA_B27
DATA_B28DATA_B28
DATA_B29DATA_B29
DATA_B30DATA_B30
DATA_B31DATA_B31
DATA_B32DATA_B32
DATA_B33DATA_B33
DATA_B34DATA_B34
DATA_B35DATA_B35
DATA_B36DATA_B36
DATA_B37DATA_B37
DATA_B38DATA_B38
DATA_B39DATA_B39
DATA_B40DATA_B40
DATA_B41DATA_B41
DATA_B42DATA_B42
DATA_B43DATA_B43
DATA_B44DATA_B44
DATA_B45DATA_B45
DATA_B46DATA_B46
DATA_B47DATA_B47
DATA_B48DATA_B48
DATA_B49DATA_B49
DATA_B50DATA_B50
DATA_B51DATA_B51
DATA_B52DATA_B52
DATA_B53DATA_B53
DATA_B54DATA_B54
DATA_B55DATA_B55
DATA_B56DATA_B56
DATA_B57DATA_B57
DATA_B58DATA_B58
DATA_B59DATA_B59
DATA_B60DATA_B60
DATA_B61DATA_B61
DATA_B62DATA_B62
DATA_B63DATA_B63
DQS_B0 [14]
DQS_B#0 [14]
DQS_B1 [14]
DQS_B#1 [14]
DQS_B2 [14]
DQS_B#2 [14]
DQS_B3 [14]
DQS_B#3 [14]
DQS_B4 [14]
DQS_B#4 [14]
DQS_B5 [14]
DQS_B#5 [14]
DQS_B6 [14]
DQS_B#6 [14]
DQS_B7 [14]
DQS_B#7 [14]
DQM_B[0..7] [14]
DATA_B[0..63] [14]
1
Place close to GMCH
VCC_DDR
C33 C1U16YC33 C1U16Y
C1U16YC34 C1U16YC34
C35 C1U16YC35 C1U16Y
C36 C1U16YC36 C1U16Y
C37 C1U16YC37 C1U16Y
C38 C1U16YC38 C1U16Y
R93 1KR1%0402R93 1KR1%0402
A A
VCC_DDR
R94
R94
3.01KR1%0402
3.01KR1%0402
R96 1KR1%0402R96 1KR1%0402
At least 10 mil~20 mil
5
4
DDR_RCOMPVOL
DDR_RCOMPVOL = 0.2 * VCC_DDR
C39
C39
C0.01U25X0402
C0.01U25X0402
DDR_RCOMPVOH
DDR_RCOMPVOH = 0.8 * VCC_DDR
C40
C40
C0.01U25X0402
C0.01U25X0402
At least 10 mil~20 mil
VCC_DDR
C41
C41
C0.1U16Y0402
C0.1U16Y0402
3
R95 19.1R1%R95 19.1R1%
R98 19.1R1%R98 19.1R1%
R97 19.1R1%R97 19.1R1%
C42
C42
R99 19.1R1%R99 19.1R1%
C0.1U16Y0402
C0.1U16Y0402
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
2
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Bearlake - Memory
Bearlake - Memory
Bearlake - Memory
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
1
of
of
of
735Saturday, March 24, 2007
735Saturday, March 24, 2007
735Saturday, March 24, 2007

5
V_1P25_CORE
AA13
U2F
M23
M24
M29
BB42
BB41
BA43
BA42
AY42
AL31
A28
A30
B27
B28
B29
B30
C27
C29
C30
D27
D28
D29
E23
E26
E27
E29
F23
F24
F26
G23
G24
G26
H23
H24
J23
J24
K23
K24
L23
L24
N23
N24
N26
N29
P23
P24
P26
P27
P29
R23
R24
R26
R27
B21
C21
B15
A24
C23
A22
C22
B16
C17
B17
A16
U2F
VTT_FSB_1
VTT_FSB_2
VTT_FSB_3
VTT_FSB_4
VTT_FSB_5
VTT_FSB_6
VTT_FSB_7
VTT_FSB_8
VTT_FSB_9
VTT_FSB_10
VTT_FSB_11
VTT_FSB_12
VTT_FSB_13
VTT_FSB_14
VTT_FSB_15
VTT_FSB_16
VTT_FSB_17
VTT_FSB_18
VTT_FSB_19
VTT_FSB_20
VTT_FSB_21
VTT_FSB_22
VTT_FSB_23
VTT_FSB_24
VTT_FSB_25
VTT_FSB_26
VTT_FSB_27
VTT_FSB_28
VTT_FSB_29
VTT_FSB_30
VTT_FSB_31
VTT_FSB_32
VTT_FSB_33
VTT_FSB_34
VTT_FSB_35
VTT_FSB_36
VTT_FSB_37
VTT_FSB_38
VTT_FSB_39
VTT_FSB_40
VTT_FSB_41
VTT_FSB_42
VTT_FSB_43
VTT_FSB_44
VTT_FSB_45
VTT_FSB_46
VCCDQ_CRT
VCCD_CRT
VCCA_EXPPLL
VCCA_MPLL
VCCA_HPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_DAC_1
VCCA_DAC_2
VCC3_3
VCCA_EXP
VCC_CKDDR_5
VCC_CKDDR_4
VCC_CKDDR_3
VCC_CKDDR_2
VCC_CKDDR_1
RESERVED_38
VCC_DDR
VCC_1
V_FSB_VTT
VCCDQ_CRT
For non-Graphic sku
D D
V_1P25_CORE
V_1P25_CL_MCH
C C
V_1P25_CL_MCH
H_VCCPLL[4]
B B
A A
change to 0-ohm (0603)
X_10U100m_0805
X_10U100m_0805
H_VCCPLL
VCC_DDR
CP4
CP4
X_COPPER
X_COPPER
V_1P25_CORE
V_1P25_CORE
VCC3
0.1U50m
0.1U50m
L4
L4
CP1
CP1
X_COPPER
X_COPPER
L5
L5
X_10U100m_0805
X_10U100m_0805
CP2
CP2
X_COPPER
X_COPPER
L6
L6
X_10U100m_0805
X_10U100m_0805
CP3
CP3
X_COPPER
X_COPPER
CP39
CP39
X_COPPER
X_COPPER
C0.1U16Y0402
C0.1U16Y0402
L7
L7
X_10U100m_0805
X_10U100m_0805
C0.1U16Y0402
C0.1U16Y0402
X_10U100m_0805
X_10U100m_0805
X_COPPER
X_COPPER
X_10U100m_0805
X_10U100m_0805
X_COPPER
X_COPPER
L11
L11
C87
C87
C10U10Y0805
C10U10Y0805
R101
R101
1R1%0402
1R1%0402
C92
C92
L9
L9
CP6
CP6
L10
L10
CP8
CP8
C0.1U16Y0402
C0.1U16Y0402
5
C1U16Y
C1U16Y
VCCA_HPLL
C1U16Y
C1U16Y
C52
C52
C44
C44
C1U16Y
C1U16Y
VCCA_GPLL
C47
C47
X_C10U10Y0805
X_C10U10Y0805
VCCA_MPLL
C249
C249
C252
C252
C0.1U16Y0402
C0.1U16Y0402
C46
C46
C49
C49
C0.1U16Y0402
C0.1U16Y0402
If non-Graphic sku
Remove these resisters
C230
C230
C1U16Y
C1U16Y
V_3P3_DAC_FILTERED
C50 C1U16YC50 C1U16Y
VCC3
V_3P3_DAC_FILTERED
C256
C256
C0.1U16Y0402
C0.1U16Y0402
VCCA_DPLLA
VCCA_DPLLA
C55
C55
X_C1U16Y
X_C1U16Y
VCCA_DPLLB
C57
C57
X_C1U16Y
X_C1U16Y
C88
C88
C89
C89
C0.01U25X0402
C0.01U25X0402
C48
C48
C0.1U16Y0402
C0.1U16Y0402
VCCDQ_CRT
VCCA_GPLL
VCCA_MPLL
VCCA_HPLL
VCCA_DPLLA
VCCA_DPLLB
C51
C51
C1U16Y
C1U16Y
C56
C56
C0.1U16Y0402
C0.1U16Y0402
C58
C58
C0.1U16Y0402
C0.1U16Y0402
V_3P3_DAC_FILTERED
For non-Graphic sku
Cxx change to 0-ohm
Rxx unstuff
4
AA27
AA3
AB17
AB18
AB20
AB22
AB24
AB26
AB27
VCC_13
VCC_14
VCC_15
VCC_16
VCC_DDR_11
VCC_DDR_12
VCC_DDR_13
VCC_DDR_14
BB26
BB28
BB32
BB37
AC13
VCC_17
VCC_18
VCC_19
VCC_DDR_15
VCC_DDR_16
VCC_DDR_17
BB39
BC14
BC18
AA14
AA15
AA17
AA19
AA21
AA23
AA25
AA26
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_DDR_1
VCC_DDR_2
VCC_DDR_3
VCC_DDR_4
VCC_DDR_5
VCC_DDR_6
VCC_DDR_7
VCC_DDR_8
VCC_DDR_9
VCC_DDR_10
AV18
AV26
AY32
BB12
BB16
BB18
BB20
AW24
C59 C1U16YC59 C1U16Y
C68 C1U16YC68 C1U16Y
C73 C1U16YC73 C1U16Y
C77 C1U16YC77 C1U16Y
4
BB24
AW20
V_FSB_VTT V_FSB_VTT
AC14
AC15
AC17
AC19
AC21
AC23
AC25
AC26
AC27
AC6
AD14
AD15
AD17
AD18
AD20
AD22
AD24
AD26
AD27
AE17
AE19
AE21
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
POWER
POWER
VCC_CL
VCC_CL_73
VSS
VCC_CL_75
VCC_CL_76
VCC_DDR_18
VCC_DDR_19
VCC_DDR_20
VCC_DDR_21
BC22
BC26
BC30
BC34
VCC_CL_77
VCC_DDR_22
Y32
AL9
V30
Y29
Y30
Y31
BC39
C60 C10U10Y0805C60 C10U10Y0805
C64 C1U16YC64 C1U16Y C65 C10U10Y0805C65 C10U10Y0805
C69 C1U16YC69 C1U16Y
C78 C0.1U16Y0402C78 C0.1U16Y0402
C83 C0.1U16Y0402C83 C0.1U16Y0402
VCC_CL_70
VCC_CL_71
VCC_CL_72
AL6
AL7
AL8
VCC_CL_67
VCC_CL_68
VCC_CL_69
AL5
AL27
AL29
VCC_CL_66
AL24
AL26
3
AE23
AE25
AE26
AE27
AF1
AF11
AF12
AF13
AF14
AF15
AF17
AF18
AF2
AF20
AF22
AF24
AF25
AF26
AF3
AG10
AG11
AG12
AG13
AG14
AG15
AG17
AG18
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_CL_39
VCC_CL_40
VCC_CL_41
VCC_CL_42
VCC_CL_43
VCC_CL_44
VCC_CL_45
VCC_CL_46
VCC_CL_47
VCC_CL_48
VCC_CL_49
VCC_CL_50
VCC_CL_51
VCC_CL_52
VCC_CL_53
VCC_CL_54
VCC_CL_55
VCC_CL_56
VCC_CL_57
VCC_CL_58
VCC_CL_59
VCC_CL_60
VCC_CL_61
VCC_CL_62
VCC_CL_63
VCC_CL_64
VCC_CL_65
AJ4
AK1
AL23
C74 C10U10Y0805C74 C10U10Y0805
C79 C10U10Y0805C79 C10U10Y0805
C61 C10U10Y0805C61 C10U10Y0805
C75 C10U10Y0805C75 C10U10Y0805
C80 C1U16YC80 C1U16Y
C85 C1U16YC85 C1U16YC82 C1U16YC82 C1U16Y
C93 C10U10Y0805C93 C10U10Y0805
5020 5020
3
AK29
AK30
V_1P25_COREV_1P25_CORE V_1P25_CL_MCH
AK3
AL10
AL11
AL12
AL13
AL15
AL17
AL18
AL20
AL21
AK2
AK20
AK21
AK23
AK24
AK26
AK27
C62 C0.1U16Y0402C62 C0.1U16Y0402
C66 C0.1U16Y0402C66 C0.1U16Y0402
C71 C0.1U16Y0402C71 C0.1U16Y0402
C91 C0.1U16Y0402C91 C0.1U16Y0402
C94 C0.1U16Y0402C94 C0.1U16Y0402
C70 C10U10Y0805C70 C10U10Y0805
C90 C10U10Y0805C90 C10U10Y0805
C84 C10U10Y0805C84 C10U10Y0805
AK18
AK17
AK15
AK14
AJ31
AG19
AG2
AG20
VCC_68
VCC_69
VCC_70
VCC_71
VCC_CL_35
VCC_CL_36
VCC_CL_37
VCC_CL_38
AJ3
AJ29
AJ30
C72 C0.1U16YC72 C0.1U16Y
C81 C0.1U16YC81 C0.1U16Y
C86 C0.1U16YC86 C0.1U16Y
C95 C0.1U16YC95 C0.1U16Y
C63 C1U16YC63 C1U16Y
C67 C1U16YC67 C1U16Y
C76 C1U16YC76 C1U16Y
AG21
AG22
AG23
VCC_72
VCC_73
VCC_74
VCC_CL_32
VCC_CL_33
VCC_CL_34
AJ24
AJ26
AJ27
AG24
AG3
AG4
VCC_75
VCC_76
VCC_77
VCC_CL_29
VCC_CL_30
VCC_CL_31
AJ20
AJ21
AJ23
2
AG5
AG6
AG7
VCC_78
VCC_79
VCC_80
VCC_CL_26
VCC_CL_27
VCC_CL_28
AJ2
AJ17
AJ18
2
AH1
AG9
AG8
VCC_83
VCC_82
VCC_81
VCC_CL_23
VCC_CL_24
VCC_CL_25
AJ13
AJ14
AJ15
AJ10
AH4
AH2
VCC_86
VCC_85
VCC_84
VCC_CL_20
VCC_CL_21
VCC_CL_22
AG29
AG30
AG31
1
3
5
7
1
3
5
7
AJ12
AJ11
AJ5
VCC_88
VCC_87
VCC_89
VCC_CL_17
VCC_CL_18
VCC_CL_19
AG25
AG26
AG27
RN53
RN53
X_8P4R-0R
X_8P4R-0R
RN54
RN54
X_8P4R-0R
X_8P4R-0R
AJ8
AJ7
AJ6
VCC_92
VCC_91
VCC_90
VCC_CL_14
VCC_CL_15
VCC_CL_16
AF29
AF30
AF31
V_1P25_CL_MCHV_1P25_CORE
2
4
6
8
2
4
6
8
1
F11
D4
C9
C13
AJ9
G2
F9
J2
L6
L12
J6
VCC_97
VCC_96
VCC_95
VCC_94
VCC_93
VCC_99
VCC_98
VCC_100
VCC_102
VCC_101J3VCC_109
VCC_CL_4
VCC_CL_5
VCC_CL_6
VCC_CL_7
VCC_CL_8
VCC_CL_9
VCC_CL_10
VCC_CL_11
VCC_CL_12
VCC_CL_13
AF27
AD32
AD31
AA32
AC29
AC30
AC31
AC32
AD29
AD30
Title
Title
Title
Bearlake - Power
Bearlake - Power
Bearlake - Power
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
N8
N6
N3
N12
N11
N9
VCC_110
P14
P15
P20
R14
R15
R17
R18
U10
U13
U14
U15
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
U3
U6
U9
V10
V12
V13
V14
V15
V17
V18
V19
V20
V21
V22
V23
V24
V25
V26
V27
V9
W17
W18
W19
W21
W23
W25
W26
W27
Y11
Y13
Y14
Y15
Y17
Y18
Y20
Y22
Y24
Y26
Y27
Y6
AC2
AC3
AC4
AD1
AD10
AD11
AD2
AD4
AD5
AD6
AD7
AD8
AD9
6 OF 7
6 OF 7
BRLK_B_CRB
BRLK_B_CRB
V_1P25_CORE
V_1P25_PCIE
C53
C53
C1U16Y
C1U16Y
1
VCC_104
VCC_103
VCC_108
VCC_107
VCC_106
VCC_105
VCC_111
VCC_112
VCC_113
VCC_114
VCC_115
VCC_116
VCC_117
VCC_118
VCC_119
VCC_120
VCC_121
VCC_122
VCC_123
VCC_124
VCC_125
VCC_126
VCC_127
VCC_128
VCC_129
VCC_130
VCC_131
VCC_132
VCC_133
VCC_134
VCC_135
VCC_136
VCC_137
VCC_138
VCC_139
VCC_140
VCC_141
VCC_142
VCC_143
VCC_144
VCC_145
VCC_146
VCC_147
VCC_148
VCC_149
VCC_150
VCC_151
VCC_152
VCC_153
VCC_154
VCC_155
VCC_156
VCC_157
VCC_158
VCC_159
VCC_160
VCC_161
VCC_162
VCC_163
VCC_164
VCC_165
VCC_166
VCC_167
VCC_168
VCC_169
VCC_170
VCC_171
VCC_EXP_1
VCC_EXP_2
VCC_EXP_3
VCC_EXP_4
VCC_EXP_5
VCC_EXP_6
VCC_EXP_7
VCC_EXP_8
VCC_EXP_9
VCC_EXP_10
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
VCC_CL_1
VCC_CL_2
VCC_CL_3
AA29
AA30
AA31
V_1P25_CL_MCH
Separate when AMT is
supported
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
L8
L8
X_80L3_70_0805
X_80L3_70_0805
CP5
CP5
X_COPPER
X_COPPER
C1U16Y
C1U16Y
C54
C54
of
of
of
835Saturday, March 24, 2007
835Saturday, March 24, 2007
835Saturday, March 24, 2007
V_1P25_CORE

5
4
3
2
1
D D
C C
B B
AA18
AA20
AA22
AA24
AA35
AA38
AA5
AA8
AB1
AB19
AB2
AB21
AB23
AB25
AB43
AC10
AC18
AC20
AC22
AC24
AC35
AC38
AC5
AC7
AD19
AD21
AD23
AD25
AD33
AD35
AD37
AD39
AD42
AE18
AE2
AE20
AE22
AE24
AE3
AE4
AF10
AF19
AF21
AF23
AF36
AF37
AF43
AG34
AG37
AH42
AJ32
AJ33
AJ36
AJ39
AK43
AL31
AL33
AL36
AM11
AM20
AM23
AM24
U2G
U2G
A12
VSS_1
A18
VSS_2
A26
VSS_3
A3
VSS_4
A34
VSS_5
A39
VSS_6
A41
VSS_7
A5
VSS_8
A7
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
AF5
VSS_57
AF6
VSS_58
AF7
VSS_59
AF8
VSS_60
AF9
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
Y5
Y7
VSS_296
VSS_297
Y37
Y42
VSS_294
VSS_295
Y33
Y35
VSS_292
VSS_293
Y23
Y25
VSS_290
VSS_291
Y19
Y21
VSS_288
VSS_289
Y10
VSS_287
W3
Y1
VSS_285
VSS_286
W22
W24
VSS_283
VSS_284
V8
W20
VSS_281
VSS_282
V5
VSS_280
V39
V43
VSS_278
VSS_279
V34
V37
VSS_276
VSS_277
V29
V32
VSS_274
VSS_275
V2
VSS_273
U8
V11
VSS_271
VSS_272
U5
U7
VSS_269
VSS_270
U35
U38
VSS_267
VSS_268
U29
VSS_266
T42
U27
VSS_264
VSS_265
R5
R8
T1
VSS_262
VSS_263
GND
GND
R33
R36
VSS_259
VSS_260
VSS_261
R3
R31
VSS_257
VSS_258
R11
R21
VSS_255
VSS_256
P30
P43
VSS_253
VSS_254
P21
VSS_252
P18
P2
VSS_250
VSS_251
N7
P17
VSS_248
VSS_249
N36
N5
VSS_246
VSS_247
N33
VSS_245
N27
N31
VSS_243
VSS_244
N13
N21
VSS_241
VSS_242
M7
N10
VSS_239
VSS_240
M37
VSS_238
M33
M35
VSS_236
VSS_237
M21
M27
VSS_234
VSS_235
M17
M20
VSS_232
VSS_233
M15
VSS_231
M10
M11
VSS_229
VSS_230
L7
M1
VSS_227
VSS_228
L40
L5
VSS_225
VSS_226
L33
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_198
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_188
VSS_187
VSS_186
VSS_185
VSS_184
VSS_183
VSS_182
VSS_181
VSS_180
VSS_179
VSS_178
VSS_177
VSS_176
VSS_175
VSS_174
VSS_173
VSS_172
VSS_171
VSS_170
VSS_169
VSS_168
VSS_167
VSS_166
VSS_165
VSS_164
VSS_163
VSS_162
VSS_161
VSS_160
VSS_159
VSS_158
VSS_157
VSS_156
VSS_155
VSS_154
VSS_153
VSS_152
VSS_151
VSS_150
VSS_149
VSS_148
L32
L31
L3
L29
L21
L20
L11
K43
K26
K21
K2
K18
K13
K12
J9
J7
J5
J38
J35
J32
J27
J21
H31
H29
H21
H20
H17
H15
H13
G9
G7
G42
G38
G32
G21
G13
G12
G11
G1
F37
F35
F3
F27
F21
F18
F15
E9
E43
E32
E3
E24
E21
E11
E1
D40
D31
D3
D21
D17
D16
D15
C6
C5
C43
C4
C26
C11
C1
BC5
BC41
BC37
BC32
BC3
BC28
BC24
BC10
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
7 OF 7
7 OF 7
BRLK_B_CRB
B10
B14
B19
B22
B23
AM4
AM7
AM9
AN11
AN12
AM40
AM42
AN13
AM29
AM33
A A
5
AM36
AN20
4
AN23
AN24
AN29
AN31
AN38
AN4
AP18
AP24
AP43
AR17
AR20
AR21
AR23
AR26
AR27
AR32
AR33
AR38
AR6
AR9
AT12
AT13
AT15
AT29
AT31
AU20
AU24
AU32
AP1
AU38
AU4
AU42
AU6
AV11
AV17
AV2
AV7
AV9
AV35
AV37
AY4
AY40
AW41
AW43
AV21
AV23
AV27
3
AY41
B26
BRLK_B_CRB
B31
B32
B37
BA1
BB7
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Bearlake - GND
Bearlake - GND
Bearlake - GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
1
of
of
of
935Friday, March 16, 2007
935Friday, March 16, 2007
935Friday, March 16, 2007

5
U3
U3A
U3
U3A
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#D
PIRQ#E
PIRQ#F
PIRQ#G
PIRQ#H
E3
C6
B3
R2
J8
R3
K5
F10
H8
E6
F5
G12
H5
A7
C7
F7
K7
G13
F13
G8
J5
E1
F1
A3
K6
L7
F2
G2
PAR
DEVSELB
PCICLK
PCIRSTB
IRDYB
PMEB
SERRB
STOPB
PLOCKB
TRDYB
PERRB
FRAMEB
GNTB0
GNTB1_GP51
GNTB2_GP53
GNTB3_GP55
REQB_0
REQB1_GP50
REQB2_GP52
REQB3_GP54
PIRQAB
PIRQBB
PIRQCB
PIRQDB
GP2_PIRQEB
GP3_PIRQFB
GP4_PIRQGB
GP5_PIRQHB
PCI
PCI
1 OF 6
1 OF 6
AD_10
AD_11
AD_12
AD_13
AD_14
AD_15
AD_16
AD_17
AD_18
AD_19
AD_20
AD_21
AD_22
AD_23
AD_24
AD_25
AD_26
AD_27
AD_28
AD_29
AD_30
AD_31
CXBEB_0
CXBEB_1
CXBEB_2
CXBEB_3
PAR[20]
DEVSEL#[20]
ICH_PCLK[16]
D D
C C
PCI_PME#[20]
ICH_PCLK
IRDY#[20]
SERR#[20]
STOP#[20]
LOCK#[20]
TRDY#[20]
PERR#[20]
FRAME#[20]
PGNT#0[20]
PGNT#1[20]
PREQ#0[20]
PREQ#1[20]
PREQ#2[20]
PREQ#3[20]
PIRQ#A[20]
PIRQ#B[20]
PIRQ#C[20]
PIRQ#D[20]
PIRQ#E[20]
PIRQ#F[20]
PIRQ#G[20]
PIRQ#H[20]
4
AD0
C10
AD_0
AD_1
AD_2
AD_3
AD_4
AD_5
AD_6
AD_7
AD_8
AD_9
[INTEL-NH82801IU-A0-RH]
[INTEL-NH82801IU-A0-RH]
AD1
C8
AD2
E9
AD3
C9
AD4
A5
AD5
E12
AD6
E10
AD7
B7
AD8
B6
AD9
B4
AD10
E7
AD11
A4
AD12
H12
AD13
F8
AD14
C5
AD15
D2
AD16
E5
AD17
G7
AD18
E11
AD19
G10
AD20
G6
AD21
D3
AD22
H6
AD23
G5
AD24
C1
AD25
C2
AD26
C3
AD27
D1
AD28
J7
AD29
F3
AD30
G1
AD31
H3
C_BE#0
F11
C_BE#1
G9
C_BE#2
C4
C_BE#3
E8
AD[31..0] [20]
C_BE#[3..0] [20]
3
GLAN_RXN[27]
GLAN_RXP[27]
GLAN_TXN[27]
GLAN_TXP[27]
PE_RN1[19]
PE_RP1[19]
HSO_N1[19]
HSO_P1[19]
PE_RN2[19]
PE_RP2[19]
HSO_N2[19]
HSO_P2[19]
PE_RN3[19]
PE_RP3[19]
HSO_N3[19]
HSO_P3[19]
PE_RN4[19]
PE_RP4[19]
HSO_N4[19]
HSO_P4[19]
V_1P5_CORE
CK_PE_100M_ICH#[16]
CK_PE_100M_ICH[16]
DMI_MTN_IRN_0[6]
DMI_MTP_IRP_0[6]
DMI_ITN_MRN_0[6]
DMI_ITP_MRP_0[6]
DMI_MTN_IRN_1[6]
DMI_MTP_IRP_1[6]
DMI_ITN_MRN_1[6]
DMI_ITP_MRP_1[6]
DMI_MTN_IRN_2[6]
DMI_MTP_IRP_2[6]
DMI_ITN_MRN_2[6]
DMI_ITP_MRP_2[6]
DMI_MTN_IRN_3[6]
DMI_MTP_IRP_3[6]
DMI_ITN_MRN_3[6]
DMI_ITP_MRP_3[6]
GLAN_RXN
GLAN_RXP
GLAN_TXN
GLAN_TXP
HSO_P1 PE_TP1
HSO_N2 PE_TN2
HSO_P2 PE_TP2
HSO_N3
HSO_P3
HSO_P4 PE_TP4
DMI_MTN_IRN_0
DMI_MTP_IRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_0
DMI_MTN_IRN_1
DMI_MTP_IRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_1
DMI_MTN_IRN_2
DMI_MTP_IRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_2
DMI_MTN_IRN_3
DMI_MTP_IRP_3
DMI_ITN_MRN_3
DMI_ITP_MRP_3
C654 C0.1U16Y0402C654 C0.1U16Y0402
C653 C0.1U16Y0402C653 C0.1U16Y0402
C96 C0.1U16Y0402C96 C0.1U16Y0402
C97 C0.1U16Y0402C97 C0.1U16Y0402
C99 C0.1U16Y0402C99 C0.1U16Y0402
C98 C0.1U16Y0402C98 C0.1U16Y0402
C102 C0.1U16Y0402C102 C0.1U16Y0402
C101 C0.1U16Y0402C101 C0.1U16Y0402
C652 C0.1U16Y0402C652 C0.1U16Y0402
C651 C0.1U16Y0402C651 C0.1U16Y0402
R112 24.9R1%0402R112 24.9R1%0402
12 mils width
CK_PE_100M_ICH#
CK_PE_100M_ICH
PE_TN6
PE_TP6
PE_RN1
PE_RP1
PE_TN1HSO_N1
PE_RN2
PE_RP2
PE_RN3
PE_RP3
PE_TN3
PE_TP3
PE_RN4
PE_RP4
PE_TN4HSO_N4
W28
W26
AA26
AA28
AC26
AC28
AB30
AB29
AF26
AE26
AD29
AD30
M30
M29
AF28
AF30
U3
U3B
U3
U3B
V30
V29
Y30
Y29
D29
D30
E26
E28
P30
P29
R26
R28
N26
N28
K30
K29
L26
L28
H30
H29
J26
J28
F30
F29
G26
G28
U26
U25
DMIORXN
DMIORXP
DMIOTXN
DMIOTXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
PER6N_GLAN_RXN
PER6N_GLAN_RXP
PER6N_GLAN_TXN
PER6N_GLAN_TXP
PER1N
PER1P
PET1N
PET1P
PER2N
PER2P
PET2N
PET2P
PER3N
PER3P
PET3N
PET3P
PER4N
PER4P
PET4N
PET4P
PER5N
PER5P
PET5N
PET5P
DMIRCOMPO
DMICOMPI
DMICLK100N
DMICLK100P
2
DMI
DMI
OC0B_GB59
OC1B_GP40
OC2B_GP41
OC3B_GP42
OC4B_GP43
OC5B_GP29
OC6B_GP30
OC7B_GP31
OC8B_GP44
OC9B_GB45
OC10B_GB46
OC11B_GB47
PCI-E
PCI-E
USBRBIASN
USBRBIASP
2 OF 6
2 OF 6
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USB
USB
CLK48
[INTEL-NH82801IU-A0-RH]
[INTEL-NH82801IU-A0-RH]
AD6
AD5
AE3
AE2
AD1
AD2
AB6
AB5
AC3
AC2
AB1
AB2
Y6
Y5
AA3
AA2
Y1
Y2
V6
V5
W2
W3
V1
V2
P5
N3
P7
R7
N2
N1
N5
M1
P3
R6
T7
P1
AG1
AG2
AG3
USB0-
USB0- [21]
USB0+
USB0+ [21]
USB1-
USB1- [21]
USB1+
USB1+ [21]
USB2-
USB2- [21]
USB2+
USB2+ [21]
USB3-
USB3- [21]
USB3+
USB3+ [21]
USB4-
USB4- [21]
USB4+
USB4+ [21]
USB5-
USB5- [21]
USB5+
USB5+ [21]
USB6-
USB6- [21]
USB6+
USB6+ [21]
USB7-
USB7- [21]
USB7+
USB7+ [21]
Place near SB
C100 C0.1U16Y0402C100 C0.1U16Y0402
C103 C0.1U16Y0402C103 C0.1U16Y0402
C104 C0.1U16Y0402C104 C0.1U16Y0402
USBRBIAS_ICH
USB_48
OC#1 [21]
OC#2 [21]
OC#3 [21]
R110 10KR0402R110 10KR0402
R113
R113
12
22.6R1%0402
22.6R1%0402
USB_48 [16]
1
VCC3_SB
R117 1KR0402R117 1KR0402
R116 X_1KR0402R116 X_1KR0402
B B
BOOT SELECT STRAPS
BOOT DEVICE GNT#0 SPI_CS1#
FWH 1 1
SPI 0 X
PCI 01
PGNT#2
PGNT#3
SIGNAL H
GNT3 EN
GNT2
A A
5
PGNT#0
SPI_CS1#
R118 X_1KR0402R118 X_1KR0402
R119 X_1KR0402R119 X_1KR0402
L
DIS
SET
N/A
BIT
SPI_CS1# [11]
VCC3_SB
DES.
A16 OVERIDE
PCIE PORT CONFIG 2
BIT 0 (5-6)
SM_BUS ISOKATION CIRCUIT
VCC3_SB +12V
X_N-2N7002LT1G_SOT23
X_N-2N7002LT1G_SOT23
DS
Q67
Q67
R226
R226
R229
R229
G
X_N-2N7002LT1G_SOT23
X_N-2N7002LT1G_SOT23
DS
Q68
Q68
G
2.7KR0402
2.7KR0402
2.7KR0402
2.7KR0402
R145
R144
R144
X_8.2KR0402
X_8.2KR0402
R230
SMBCLK
SMBDATA
R230
X_4.7KR0402
X_4.7KR0402
R155 X_8.2KR0402R155 X_8.2KR0402
R158 X_8.2KR0402R158 X_8.2KR0402
CHIP_PWGD[6,11,24]
4
CE
Q66
Q66
B
X_N-MMBT3904_NL_SOT23
X_N-MMBT3904_NL_SOT23
3
R145
X_8.2KR0402
X_8.2KR0402
CE
Q69
Q69
B
X_N-MMBT3904_NL_SOT23
X_N-MMBT3904_NL_SOT23
VCC3 VCC3_SB
SMBCLK_SB
SMBDATA_SB
R197
R197
0R0402
0R0402
R218
R218
0R0402
0R0402
SMBCLK [24]
SMBCLK_SB [11,13,16,19,20]
SMBDATA [24]
SMBDATA_SB [11,13,16,19,20]
2
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
ICH9 - PCI, DMI, USB, PCIE & Slots
ICH9 - PCI, DMI, USB, PCIE & Slots
ICH9 - PCI, DMI, USB, PCIE & Slots
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
1
of
of
of
10 35Saturday, March 24, 2007
10 35Saturday, March 24, 2007
10 35Saturday, March 24, 2007

5
4
3
2
1
Close to SB
V_1P5_CORE
ELAN_CLK[27]
ELAN_SYNC[27]
ELAN_RXD0[27]
VCC3
RN6 8P4R-10KR0402RN6 8P4R-10KR0402
1 2
3 4
5 6
7 8
PECI[3,17]
H_TRMTRIP#[3]
H_FERR#[3]
ELAN_RXD1[27]
ELAN_RXD2[27]
ELAN_TXD0[27]
ELAN_TXD1[27]
ELAN_TXD2[27]
CLINK_CLK[6]
CLINK_DATA[6]
CLINK_PWOK[6,25]
CLINK_RST[6]
H_TRMTRIP#[3]
H_STPCLK#[3]
ICH_H_SMI#[3]
ICH_SGP48_PU
ICH_SATALED#
GP17
GP1
GP6
GP7
R123 0R0402R123 0R0402
H_FERR#[3]
H_IGNNE#[3]
H_TRMTRIP#
H_FERR#
A20GATE
SERIRQ
KBRST#
SATA4GP_PU
SATA3GP_PU
SATA2GP_PU
SATA1GP_PU
SATA0GP_PU
ICH_SGP22_PU
ICH_SGP38_PU
SATA5GP_PU
D D
C C
B B
GLAN_BIAS
R120 24.9R1%0402R120 24.9R1%0402
ELAN_CLK
ELAN_SYNC
ELAN_RST
ELAN_RXD0
ELAN_RXD1
ELAN_RXD2
ELAN_TXD0
ELAN_TXD1
ELAN_TXD2
CLINK_CLK
CLINK_DATA
CL_VREF_ICH
CLINK_PWOK
CLINK_RST
H_TRMTRIP#
H_STPCLK#
ICH_H_SMI#
SERIRQ
SERIRQ[17,18]
KBRST#
KBRST#[17]
H_NMI
H_NMI[3]
H_FERR#
H_INTR
H_INTR[3]
H_INIT#
H_INIT#[3]
TP21TP21
H_IGNNE#
H_A20M#
H_A20M#[3]
A20GATE
A20GATE[17]
R143 62R0402R143 62R0402
R142 62R0402R142 62R0402
RN11 8P4R-10KR0402RN11 8P4R-10KR0402
RN12 8P4R-10KR0402RN12 8P4R-10KR0402
R150 10KR0402R150 10KR0402
R149 10KR0402R149 10KR0402
PECI_ICH
RN9
RN9
8P4R-10KR0402
8P4R-10KR0402
1
3
5
7
1
3
5
7
1
3
5
7
SPEC. TBD
ICH_SGP39_PD
DMI_STRAP
R154 10KR0402R154 10KR0402
R159 2.2KR0402R159 2.2KR0402
VCC3
A29
B29
F25
E14
C21
G15
H14
E13
F15
F14
G14
AJ21
AJ22
AK22
AH21
AK21
AH22
AK23
C19
AC23
G22
C18
H21
E19
C27
A16
T6
B16
G20
AD24
AJ29
AH26
N6
L3
AF24
AJ27
AH27
AE23
M3
AC22
AJ28
P8
V_FSB_VTT
VCC3
2
4
6
8
2
4
6
8
2
4
6
8
U3C
U3C
GLAN_COMPO
GLAN_COMPI
GLAN_CLK
LAN_RSTSYNC
LAN_RSTB
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
PWM0
PWM1
PWM2
GP17_TACH0
GP1_TACH1
GP6_TACH2
GP7_TACH3
SST
PECI
CL_CLK0
TP5
CL_DATA0
TP4
CL_VREF0
TP6
CLPWROK
TP7
CL_RST0b
THRMTRIPB
STPCLKb
SMIb
SERIRQ
RCINb
NMI
FERRb
INTR
INTb
INT3_3VB
IGNNEb
A20Mb
A20GATE
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA
SATA
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATACLKN
SATACLKP
SATALEDB
SATARBIASN
SATABIASP
GP21_SATA0GP
GP19_SATA1GP
GP36_SATA2GP
GP37_SATA3GP
SATA4GP
SATA5GP
GP22_SCLOCK
GP38_SLOAD
GP39_SDATAOUT0
GP48_SDATAOUT1
HOST CL_LINK IQST LAN
HOST CL_LINK IQST LAN
3 OF 6
3 OF 6
[INTEL-NH82801IU-A0-RH]
[INTEL-NH82801IU-A0-RH]
V_3P3_CL
RTC Block
C108 C18P50NC108 C18P50N
12
34
Y1
Y1
32.768KHZ12.5P_D-LF
32.768KHZ12.5P_D-LF
C111 C18P50NC111 C18P50N
GPIO49
R156
R156
10MR
10MR
AK17
AJ17
AK19
AJ19
AJ15
AK15
AH16
AF16
AJ13
AK13
AH14
AF14
AJ11
AK11
AF12
AH12
AJ9
AK9
AF10
AH9
AJ7
AK7
AF8
AH7
AF18
AF19
AE7
AK6
AJ6
AK25
AE20
AE21
AE22
AF22
AD21
AJ24
AK24
AH23
AD20
AJ25
R52715KR0402 R52715KR0402
RTCX1
RTCX2
SATA_RX#0
SATA_RX0
SATA_TX#0
SATA_TX0
SATA_RX#1
SATA_RX1
SATA_TX#1
SATA_TX1
SATA_RX#2
SATA_RX2
SATA_TX#2
SATA_TX2
SATA_RX#3
SATA_RX3
SATA_TX#3
SATA_TX3
CK_ICHSATA#
CK_ICHSATA
ICH_SATALED#
R128 24.9R1%0402R128 24.9R1%0402
Close to SB
SATA0GP_PU
SATA1GP_PU
SATA2GP_PU
SATA3GP_PU
SATA5GP_PU
SATA4GP_PU
ICH_SGP22_PU
ICH_SGP38_PU
ICH_SGP39_PD
ICH_SGP48_PU
DMI_STRAP
ELAN_RST
C655
C655
C0.1U10X0402
C0.1U10X0402
VBAT
R152 180KR1%0402-LFR152 180KR1%0402-LF
SATA_RX#0 [18]
SATA_RX0 [18]
SATA_TX#0 [18]
SATA_TX0 [18]
SATA_RX#1 [18]
SATA_RX1 [18]
SATA_TX#1 [18]
SATA_TX1 [18]
SATA_RX#2 [18]
SATA_RX2 [18]
SATA_TX#2 [18]
SATA_TX2 [18]
SATA_RX#3 [18]
SATA_RX3 [18]
SATA_TX#3 [18]
SATA_TX3 [18]
CK_ICHSATA# [16]
CK_ICHSATA [16]
ICH_SATALED# [26]
Close to ICH9Close to ICH9
C112
C112
C0.1U10X0402
C0.1U10X0402
SRTCRST#
LPC_AD0[17,18]
LPC_AD1[17,18]
LPC_AD2[17,18]
LPC_AD3[17,18]
LPC_DRQ#0[17]
LPC_FRAME#[17,18]
AC_SDIN0[28]
ICH_14M[16]
SMBCLK_SB[10,13,16,19,20]
SMBDATA_SB[10,13,16,19,20]
SPI_MOSI_F
SPI_CS0_F# SPI_CS0#
AC_BITCLK[28]
AC_SDOUT[28]
AC_RST#[28]
AC_SYNC[28]
RTCRST#
LDRQ_1#
LPC_DRQ#0
AC_BITCLK_ICH
ACRST#
ACSDOUT
ACSYNC
RTCX1
RTCX2
RTCRST#
SRTCRST#
ICH_14M
SMB_ALERT#
SMBCLK_SB
SMBDATA_SB
LINK_ALERT#
SM_LINK0
SM_LINK1
R134 15R0402R134 15R0402
R137 15R0402R137 15R0402
R139 15R0402R139 15R0402
SPI_CS1#[10]
AC_RST#
AC_SYNC
X_C20P50N0402
X_C20P50N0402
JCOMS1
JCOMS1
1
2
3
N31-1030151+N33-1020271-RH
N31-1030151+N33-1020271-RH
N41-1030141-H06
N41-1030141-H06
R157
R157
CLEAR_CMOS
100R0402
100R0402
1 - 2 Normal
2 - 3
SPI_MOSI
SPI_MISO
SPI_CLKSPI_CLK_F
SPI_CS1#
C106
C106
C109
C109
C1U10X
C1U10X
20KR1%0402
20KR1%0402
C1U16Y
C1U16Y
Clear CMOS
H1
M7
AH3
AJ1
AK3
AH4
AH1
AJ3
AJ2
AK1
A21
B21
A25
H20
M5
C16
H16
E16
F18
A15
B15
C26
B26
E25
G23
F23
C107
C107
X_C20P50N0402
X_C20P50N0402
R148
R148
*
U3D
U3D
J3
LDRQ1B_GP23
K3
FWH0/LAD_0
FWH1/LAD_1
FWH2/LAD_2
J1
FWH3/LAD_3
L6
LDRQ0B
L5
FWH4/LFRAMEB
HDA_BIT_CLK
HDA_RSTB
HDA_SDI0
HDA_SDI1
HDA_SDI2
HDA_SDI3
HDA_SD0UT
HDA_SYNC
RTCX1
RTCX2
RTCRSTB
SRTCRSTB
CLK14
SMBALERTB_GP11
SMBCLK
SMBDATA
LINKALERTB/GP60/CLGPIO4
SMLINK0
SMLINK1
SPI_MOSI
SPI_MISO
SPI_CS0B
SPI_CLK
SPI_CS1B/GPIO58/CLGP6
RN10
RN10
8P4R-33R0402
8P4R-33R0402
1
2
3
4
5
6
7
8
VCC3_SB
VBAT
2
3
C110
C110
1
JBAT1JBAT1
RTC
RTC
SP1 SMB AUDIO LPC
SP1 SMB AUDIO LPC
4 of 6
4 of 6
AC_BITCLK_ICHAC_BITCLK
ACSDOUTAC_SDOUT
ACRST#
ACSYNC
D1
D1
S-BAT54C_SOT23
S-BAT54C_SOT23
R153
R153
1KR0402
1KR0402
GP9_WOL_EN
GP10_ALERTB
GP12
GP13
GP14_CLGPIO2
GP15
GP16
GP18
GP20
GP24_CLGPIO0
GP25
GP26_S4_STATEB
GP27_QRT_STATE0
GP28_QRT_STATE1
GP32
GP33
SATACLKREQB_GP35
GP34
GP56
CLGPIO5_GP57
CPUPWRGD
LAN100_SLP
THRMB
VRMPWRGD
MCH_SYNCB
PWRBTNB
MISC
MISC
SUS_STATB/LPCPD
SUSCLK
SYS_RESETB
PLTRSTB
WAKEB
INTRUDERB
PWROK
RSMRSTB
INTVRMEN
SPKR
SLP_S3B
SLP_S4B
SLP_S5B
SL0_MB
CK_PWRGD
[INTEL-NH82801IU-A0-RH]
[INTEL-NH82801IU-A0-RH]
GP0
GP8
ATADET0
N7
ICH_GP8_PU
A20
WOL_ONLY
A18
ICH_GP10_PU
C17
A8
SIO_PME#
A19
ICH_GP14_PU
A9
C15
M2
K1
AF5
A14
B18
C11
A11
G18
SPI_WP#
K2
SPI_HOLD_GPO#
AF6
LAN_Disable#
AH5
L1
ICH_GP56_PU
F16
ICH_GP57_PU
C12
H_PWRGD
AD23
LAN100_SLP
E21
ICH_THERM#
AK26
VRM_GD
C22
ICH_SYNC#
AH25
SB_PWRBTIN#
T3
RI#
G19
RIB
R1
R5
FP_RST#
F19
PLTRST#
C14
WAKE#
E20
INTRUDER#
G21
CHIP_PWGD
C25
RSMRST#
F22
INTVRMEN
E23
SPKR
N8
SLP_S3#
A13
SLP_S4#
B13
G17
ICH_SLP_M#
F17
CK_PWRGD
T8
ICH_C13_PU
C13
TP0
AK28
TP1
AE24
TP2
F20
TP3
PLTRST#
T22T22
T21T21
T23T23
WOL_ONLY [25]
SIO_PME# [17]
PCI_STOP# [16]
TP12TP12
CPU_STOP# [16]
LAN_Disable# [27]
H_PWRGD [3,4]
ICH_THERM# [3]
VRM_GD [23,24]
ICH_SYNC# [6]
SB_PWRBTIN# [17]
RI#
FP_RST# [26]
PLTRST# [6,24]
WAKE# [19]
CHIP_PWGD [6,10,24]
RSMRST# [24]
SPKR [28]
SLP_S3# [17,24,26]
SLP_S4# [24,25]
ICH_SLP_M# [25]
CK_PWRGD [16]
PLTRST# [6,24]
C105
C105
C20P50N0402
C20P50N0402
ICH_GP57_PU
RI#
SPI_MISO
SPI_CS0#
SPI_MOSI
SM_LINK0
SM_LINK1
SMB_ALERT#
ICH_GP10_PU
FP_RST#
ICH_C13_PU
SIO_PME#
WAKE#
ICH_GP14_PU
ICH_GP56_PU
LINK_ALERT#
ICH_GP8_PU
SPI_HOLD_GPO#
INTRUDER#
INTVRMEN
LAN100_SLP
R121 10KR0402R121 10KR0402
R122 10KR0402R122 10KR0402
RN5 X_8P4R-10KR0402RN5 X_8P4R-10KR0402
1 2
3 4
5 6
7 8
RN7 8P4R-10KR0402RN7 8P4R-10KR0402
1 2
3 4
5 6
7 8
R124 10KR0402R124 10KR0402
R125 10KR0402R125 10KR0402
R127 10KR0402R127 10KR0402
R126 1KR0402R126 1KR0402
1 2
3 4
5 6
7 8
RN8 8P4R-10KR0402RN8 8P4R-10KR0402
ATADET0
LDRQ_1#
LPC_DRQ#0
ICH_SYNC#
SPKR
SPKR
1
0
RSMRST#
CHIP_PWGD
FP_RST#
INTVRMEN
1
0 DISABLE INTERNAL VRM
LAN100_SLP
1
0 DISABLE INTERNAL LAN VRM
R129 10KR0402R129 10KR0402
R131 10KR0402R131 10KR0402
R130 X_10KR0402R130 X_10KR0402
R133 10KR0402R133 10KR0402
R136 X_1K/4R136 X_1K/4
R138 X_1K/4R138 X_1K/4
DIS REBOOT
EN REBOOT
R140 10KR0402R140 10KR0402
R141 10KR0402R141 10KR0402
Near ICH
R146 1MR0402R146 1MR0402
R151 330KR0402R151 330KR0402
R147 330KR0402R147 330KR0402
ENABLE INTERNAL VRM
ENABLE INTERNAL LAN VRM
VCC3_SB
VCC3
X_C10P50N0402C268 X_C10P50N0402C268
VBAT
390k
HOLD#
3
VDD
SCK
V_3P3_CL
C113
C113
C0.1U16Y0402
C0.1U16Y0402
8
SPI_HOLD#
7
SPI_CLK_F
6
SPI_MOSI_F
5
SI
V_3P3_CL
C114
C114
R163
R163
C10U10Y0805
C10U10Y0805
2.2KR0402
2.2KR0402
R164 X_0R0402R164 X_0R0402
Reserved for BIOS control used
SPI_HOLD_GPO#
From South-Bridge GPIO33
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
ICH9 - Host, SATA, Audio, SPI, RTC, MSIC
ICH9 - Host, SATA, Audio, SPI, RTC, MSIC
ICH9 - Host, SATA, Audio, SPI, RTC, MSIC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
MS-7377 (BELEM) uBTX 0A
1
of
of
of
11 35Saturday, March 24, 2007
11 35Saturday, March 24, 2007
11 35Saturday, March 24, 2007
CL_VREF_ICH = 0.405V
A A
Close to ICH
V_3P3_CL
R160
R160
3.24KR1%0402
3.24KR1%0402
R161
R161
453R1%
453R1%
CL_VREF_ICH
C115
C115
C0.1U16Y0402
C0.1U16Y0402
5
SPI DEBUG PROT
Close to SPI ROM
V_3P3_CL
SPI_MISO_F SPI_MOSI_F
SPI_CS0_F#
SPI_HOLD#
Part Number:N31-2051451-H06
V_3P3_CL
JSPI1
JSPI1
1 2
3 4
6
5
7 8
9
H2X5[10]_black-RH-1
H2X5[10]_black-RH-1
SPI_CLK_F
4
SPI FLASH ROM
Place close to SB.
SPI_MISO
R162 15R0402R162 15R0402
From South-Bridge GPIO32
VCC3
R165 2.2KR0402R165 2.2KR0402
SPI_CS0_F#
SPI_MISO_F
SPI_WP#
U4
U4
1
CE#
2
SO
3
WP#
4
VSS
AT26DF321-SU-RH
AT26DF321-SU-RH
AVL: M31-25L0813-M24