MSI ms-7377 Service Manual

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Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Cover Sheet
Custom
135Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Cover Sheet
Custom
135Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Cover Sheet
Custom
135Wednesday, September 19, 2007
RESET MAP
CPU:
DDR2 Channel-A / Channel-B
POWER Distribution
32
PCI Slot 1 & 2
FWH & HOOD Sense
LAN-NINEVEH 82566MM
MS-7377(BELEM)
ATX & F-Panel & FAN
V_1P25_CORE & AMT
Version: 11
VGA Conn
23
1-2
Intel Bearlake - Memory DDR2
29
PCI-Express X16 & X4
13-15
24
Cover Sheet, Block diagram
3-5
Intel Bearlake - Power / GND
6 7
ICH9 - PCI, USB, DMI, PCIE
PWROK MAP
22
Intel Bearlake - FSB, PCIE, DMI, VGA, MSIC
20
16
Intel LGA775 CPU - Signals
27 28
26
USB CONNECTORS 21
8-9
LPC I/O IT8718F & FWH/KB/MS
25
19
10
VRD11 Intersil 6312 3Phase
CY505YC56DT CLK Gen.
MS7 ACPI Controller
31
18
30
uBTX
SATA & COM1 & LPT & TPM
CONTENT SHEET
ICH9 - Host, DMI, SATA, Audio, SPI, RTC, MSIC ICH9 - Power, GND
11 12
17
HD Audio ALC888
History
33 34 35
GPIO & Jumper setting
MANUAL PARTS
PCI EXPRESS X1 SLOT * 2
Dual-channel DDR-II * 4
PCI EXPRESS X16 SLOT *1
Intel Bearlake - Q35 (North Bridge)
LAN-- Intel 82566MM
LPC Super I/O -- ITE8718
PCI SLOT * 1
VRD11 Intersil 6312 3Phase
On Board Device:
PWM:
HD Audio Codec -- ALC888
Expansion Slots:
System Chipset:
Main Memory:
Intel ICH9 DO(South Bridge)
CLOCK Gen -- ICS9LP505-2HLFT 54PIN or Silego 84516BT
Wolfdale 1333 , 1066 , 800 -- 45W Core 2 duo 1333 E6*50 -- 65W Core 2 duo 1066 E6*00 -- 65W Core 2 duo 800 E4XXX -- 65W Daul Core E2XX --65W Celeron 4XX -- 35W
LGA 775 Yorkfiled Qual core --95W
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Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
BLOCK DIAGRAM
Custom
235Friday, August 17, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
BLOCK DIAGRAM
Custom
235Friday, August 17, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
BLOCK DIAGRAM
Custom
235Friday, August 17, 2007
FSB
Connector
PCI_E X16
Modules
Bearlake Q35 GMCH
Block Diagram
4 DDR II
FSB 800/1066/1333
Intel LGA775 Processor
VRD 11
DDRII
3-Phase PWM
DDR2 667/800
DIMM
Intersil 6312
PCI EXPRESS X16
Analog
Video Out
RGB
ITE IT8718
PCI_E x1
Floopy
ICH9 DO
LPC SIO
DMI
USB2.0
LPC Bus
Debug Port
LPC
Keyboard
Mouse
Serial
HD Audio Link
SPI
PCI_E to LAN
Intel 82566MM
SPI
Flash ROM
PCI
PCI Slot 1
ALC888
HD Audio Codec
USB Port 0~9
SATA2
SATA-II 0~3
PCI_E x4
PCI_E x4
Single End 50ohm Top/Bottom : 4mils USB2.0 - 90ohm : 15/7.5/4.5/7.5/15 SATA - 95ohm : 15/8/4/8/15 LAN - 100ohm : 15/10/4/10/15 PCIE - 95ohm : 15/8/4/8/15
Solder Mask
Solder Mask
PREPREG 2.7mils
(1080 Prepreg Considerations)
1 oz. (1.2mils) Cu Power Plane
1.9mils Cu plus plating
1.9mils Cu plus plating
1 oz. (1.2mils) Cu GND Plane
Board Stack-up
PREPREG 2.7mils
CORE 50mils
AMT & ASF
PCI Slot 2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_NMI
H_TRMTRIP#
H_TDI
H_IERR# H_FERR#
H_STPCLK#
H_TMS
H_BNR#
H_TESTHI0
H_INTR
H_PWRGD
H_DRDY#
H_TDO
H_DBSY#
H_LOCK#
H_BPRI#
H_HITM#
ICH_H_SMI#
H_INIT#
H_HIT#
H_DEFER#
H_TRST#
H_IGNNE#
H_TRDY# H_ADS#
H_TCK
H_PROCHOT#
H_A20M#
H_FSBSEL0
H_CPURST#
H_TESTHI12 H_TESTHI11
H_TESTHI1
H_TESTHI10
FORCEPH
H_FSBSEL2
H_FSBSEL1
H_DSTBN#1
H_DSTBN#2
H_DSTBP#1 H_DSTBN#3
H_DSTBN#0
H_ADSTB#1
H_DSTBP#2
H_ADSTB#0 H_DSTBP#3
H_DSTBP#0
H_COMP3 H_COMP2 H_COMP1 H_COMP0
H_COMP4
H_COMP5
H_REQ#1
H_D#36
H_D#30
H_A#26
H_A#19
H_A#31
H_DBI#1
H_D#61 H_D#59
H_D#44
H_D#25
H_D#19
H_D#7
H_D#53
H_A#30
H_A#6
H_RS#2
H_D#49
H_D#31
H_A#22
H_A#8
H_D#24
H_D#22
H_D#12
H_A#14
H_A#13
H_A#9
H_D#42
H_D#33
H_A#23
H_REQ#4
H_D#62
H_D#56
H_D#48
H_A#29
H_A#10
H_D#34
H_D#29
H_D#26
H_D#15
H_D#8
H_A#12
H_REQ#3
H_D#52
H_D#13
H_D#9
H_A#28
H_A#5
H_RS#0
H_D#54
H_D#40
H_D#38
H_D#28
H_D#4
H_D#0
H_DBI#0
H_D#41
H_D#11
H_A#25
H_D#55
H_D#46
H_D#37
H_D#10
H_A#4
H_REQ#[0..4]
H_D#5
H_A#17
H_A#11
H_A#7
H_D#[0..63]
H_RS#[0..2]
H_D#51
H_D#32
H_D#23
H_D#18
H_D#16
H_A#27
H_A#20
H_A#18
H_A#3
H_TESTHI2_7
H_D#1
H_D#57
H_D#50
H_D#45
H_D#27
H_D#63
H_D#47
H_D#6
H_D#3
H_D#43
H_D#35
H_A#21
H_D#14
H_RS#1
H_D#21
H_REQ#2
H_D#17
H_D#20
H_A#16
H_D#58
H_DBI#2
H_D#2
H_A#24
H_A#15
H_D#60
H_REQ#0
H_D#39
H_DBI#3
H_BPM#1
H_BPM#5 H_BPM#3
H_BPM#2
H_BPM#4
H_BPM#0 H_BPM#0
CPU_GTLREF1
CPU_GTLREF0
H_TESTHI8
H_TESTHI9
VSS_VRM_SENSE
VCC_VRM_SENSE
H_BR#0
VTT_OUT_LEFT H_TESTHI13
VID6
VID7
H_A#35
H_A#34
H_A#33
H_A#32
H_BPM#1 H_BPM#0
H_BPM#4
H_TMS
VTT_OUT_RIGHT
H_BPM#3 H_BPM#5
H_TDI H_BPM#2
VID4
VID2
VID5
VID3
VID1
VID0
VTT_OUT_RIGHT
GTLREF_SELCPU_GTLREF1
CPU_GTLREF0
CPU_MCH_GTLREF
VTT_OUT_RIGHT
FORCEPH
H_PROCHOT#
H_BPM#1
H_BPM#2H_TESTHI9
H_TESTHI8 H_BPM#3H_TESTHI12
H_A#[3..35]
VTT_OUT_LEFT
H_TCK H_TRST# H_IERR# H_TDO
VID1
VID7 VID6
VID0
VID4
VID5
VID2
VID3
VTT_OUT_RIGHT
V_FSB_VTT
VCC3
H_DBI#0[6] H_DBI#1[6] H_DBI#2[6] H_DBI#3[6]
H_FERR#[11]
H_STPCLK#[11]
H_INIT#[11]
H_DBSY#[6] H_DRDY#[6] H_TRDY#[6]
H_ADS#[6] H_LOCK#[6] H_BNR#[6] H_HIT#[6] H_HITM#[6] H_BPRI#[6] H_DEFER#[6]
H_TRMTRIP#[11] H_PROCHOT#[4]
H_IGNNE#[11]
ICH_H_SMI#[11]
H_A20M#[11]
H_FSBSEL0[16] H_FSBSEL1[16] H_FSBSEL2[16]
H_PWRGD[4,11] H_CPURST#[4,6]
H_D#[0..63][6]
H_A#[3..35][6]
H_BR#0 [4,6]
VTT_OUT_LEFT [4]
H_RS#[0..2] [6]
CK_H_CPU# [16] CK_H_CPU [16]
VTT_OUT_RIGHT [4,5]
H_REQ#[0..4] [6]
CPU_GTLREF1 [4]
CPU_GTLREF0 [4]
H_ADSTB#1 [6] H_ADSTB#0 [6] H_DSTBP#3 [6] H_DSTBP#2 [6]
H_DSTBN#2 [6] H_DSTBN#0 [6]
H_NMI [11] H_INTR [11]
H_DSTBP#1 [6] H_DSTBP#0 [6]
H_DSTBN#1 [6]
H_DSTBN#3 [6]
VCC_VRM_SENSE [23]
VSS_VRM_SENSE [23]
VID[0..7] [23]
VTT_OUT_RIGHT [4,5]
PECI [11,17]
CPU_GTLREF1[4]
CPU_GTLREF0[4]
CPU_MCH_GTLREF [6]
THERMDA_CPU[17]
VTIN_GND[17]
ICH_THERM# [11]
H_TESTHI12 [5]
H_BPM#0 [5]
VRD_VIDSEL [23]
VRD_VIDSEL [23]
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Intel LGA775 - Signals
Custom
335Monday, August 27, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Intel LGA775 - Signals
Custom
335Monday, August 27, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Intel LGA775 - Signals
Custom
335Monday, August 27, 2007
CPU SIGNAL BLOCK
Prescott / Cedar Mill LL_ID[1:0] = 00 GTLREF_SEL = 0 VTT_SEL = 1
BSEL
1
02
TABLE
10FSB FREQUENCY
01 200 MHZ (800)
0 0 133 MHZ (533)
267 MHZ (1067)000
PLACE BPM TERMINATION NEAR CPU
Kentsfield
Kentsfield
VRD_VIDSEL Pull high
R28 X_10KR0402
R28 X_10KR0402
C5 C0.1U16Y0402C5 C0.1U16Y0402
R29 10KR0402
R29 10KR0402
R9 51R0402R9 51R0402
EC1 X_C10U10X1206
EC1 X_C10U10X1206
R18 X_51R0402R18 X_51R0402
R13 X_62R0402R13 X_62R0402
R20 51R0402R20 51R0402
C4 C0.1U16Y0402C4 C0.1U16Y0402
TP6TP6
1 3 5 7
2 4 6 8
RN1
8P4R-680R
RN1
8P4R-680R
R16
51R0402
R16
51R0402
TP1TP1
1 2 3 4 5 6 7 8
RN3 8P4R-51R0402
RN3 8P4R-51R0402
R22 51R0402R22 51R0402
R11 51R0402R11 51R0402
R2 680RR2 680R
R23 51R0402R23 51R0402
R4 X_0R0402R4 X_0R0402
TP5TP5
R17 X_0R0402R17 X_0R0402
R12 51R0402R12 51R0402
R3 0R0402R3 0R0402
TP7TP7
R30 X_0R0402R30 X_0R0402
C3 X_C0.1U16Y0402
C3 X_C0.1U16Y0402
R21 X_51R0402R21 X_51R0402
R7 51R0402R7 51R0402
TP3TP3
R19 X_51R0402R19 X_51R0402
C2 C0.1U16Y0402
C2 C0.1U16Y0402
R5 X_0R0402R5 X_0R0402
A35#
AJ6
A34#
AJ5
A33#
AH5
A32#
AH4
A31#
AG5
A30#
AG4
A29#
AG6
A28#
AF4
A27#
AF5
A26#
AB4
A25#
AC5
A24#
AB5
A23#
AA5
A22#
AD6
A21#
AA4
A20#Y4A19#Y6A18#W6A17#
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
L5
DBR#
AC2
VCC_SENSE
AN3
VSS_SENSE
AN4
VCC_MB_REGULATION
AN5
VSS_MB_REGULATION
AN6
ITP_CLK1
AJ3
ITP_CLK0
AK3
VID6#
AM5
VID5#
AL4
VID4#
AK4
VID3#
AL6
VID2#
AM3
VID1#
AL5
VID0#
AM2
D53#
B15
D52#
C14
D51#
C15
D50#
A14
D49#
D17
D48#
D20
D47#
G22
D46#
D22
D45#
E22
D44#
G21
D43#
F21
D42#
E21
D41#
F20
D40#
E19
D39#
E18
D38#
F18
D37#
F17
D36#
G17
D35#
G18
D34#
E16
D33#
E15
D32#
G16
D31#
G15
D30#
F15
D29#
G14
D28#
F14
D27#
G13
D26#
E13
D25#
D13
D24#
F12
D23#
F11
D22#
D10
D21#
E10
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
D11
D14#
C12
D13#
B12
D12#D8D11#
C11
D10#
B10
D9#
A11
D8#
A10
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B4
GTLREF0
H1
BPM5#
AG3
BPM4#
AF2
BPM3#
AG2
BPM2#
AD2
BPM1#
AJ1
BPM0#
AJ2
PCREQ#
G5
REQ4#
J6
REQ3#
K6
REQ2#
M6
REQ1#
J5
REQ0#
K4
TESTHI12
W2
TESTHI11
P1
TESTHI10
H5
TESTHI9
G4
TESTHI8
G3
TESTHI7
F24
TESTHI6
G24
TESTHI5
G26
TESTHI4
G27
TESTHI3
G25
TESTHI2
F25
TESTHI1
W3
TESTHI0
F26
FORCEPH
AK6
RSVD
G6
BCLK1#
G28
BCLK0#
F28
RS2#
A3
RS1#
F5
RS0#
B3
AP1#
U3
AP0#
U2
BR0#
F3
COMP3
R1
COMP2
G2
COMP1
T1
COMP0
A13
DP3#
J17
DP2#
H16
DP1#
H15
DP0#
J16
ADSTB1#
AD5
ADSTB0#
R6
DSTBP3#
C17
DSTBP2#
G19
DSTBP1#
E12
DSTBP0#
B9
DSTBN3#
A16
DSTBN2#
G20
DSTBN1#
G12
DSTBN0#
C8
LINT1/NMI
L1
LINT0/INTR
K1
DBI0#
A8
DBI1#
G11
DBI2#
D19
DBI3#
C20
EDRDY#
F2
IERR#
AB2
MCERR#
AB3
FERR#/PBE#
R3
STPCLK#
M3
BINIT#
AD3
INIT#
P3
RSP#
H4
DBSY#
B2
DRDY#
C1
TRDY#
E3
ADS#
D2
LOCK#
C3
BNR#
C2
HIT#
D4
HITM#
E4
BPRI#
G8
DEFER#
G7
TDI
AD1
TDO
AF1
TMS
AC1
TRST#
AG1
TCK
AE1
THERMDA
AL1
THERMDC
AK1
THERMTRIP#
M2
GND/SKTOCC#
AE8
PROCHOT#
AL2
IGNNE#
N2
SMI#
P2
A20M#
K3
TESTI_13
L2
RSVD
AH2
RESERVED0
N5
RESERVED1
AE6
RESERVED2
C9
RESERVED3
G10
RESERVED4
D16
RESERVED5
A20
BOOTSELECT
Y1
LL_ID0
V2
LL_ID1
AA2
BSEL0
G29
BSEL1
H30
BSEL2
G30
PWRGOOD
N1
RESET#
G23
D63#
B22
D62#
A22
D61#
A19
D60#
B19
D59#
B21
D58#
C21
D57#
B18
D56#
A17
D55#
B16
D54#
C18
RSVD
AM7
GTLREF1
H2
VID_SELECT
AN7
GTLREF_SEL
H29
COMP4
J2
COMP5
T2
CS_GTLREF
E24
U1A
ZIF-SOCK775-15u-in
U1A
ZIF-SOCK775-15u-in
R10 51R0402R10 51R0402
TP2TP2
R24 51R0402R24 51R0402
R6 51R0402R6 51R0402
B
CE
Q1 X_N-MMBT3904_NL_SOT23
Q1 X_N-MMBT3904_NL_SOT23
1 3 5 7
2 4 6 8
RN2 8P4R-680RRN2 8P4R-680R
1 2 3 4 5 6 7 8
RN51 8P4R-51R0402
RN51 8P4R-51R0402
TP4TP4
C1
C0.1U16Y0402
C1
C0.1U16Y0402
R8 51R0402R8 51R0402
R14 51R0402R14 51R0402
1 2 3 4 5 6 7 8
RN4 8P4R-51R0402
RN4 8P4R-51R0402
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VTT_OUT_RIGHT
H_VSSA
VTT_OUT_LEFT
VTT_PWG
H_VCCA
H_VCCA
VTT_SEL
H_VCCPLL
VID_GD#
VTT_OUT_RIGHT
VTT_PWG
H_VCCPLL
H_VSSA
H_VCCA
CPU_GTLREF0VTT_OUT_RIGHT
VTT_OUT_RIGHT CPU_GTLREF1
VTT_OUT_RIGHT H_PROCHOT#
H_CPURST#
VTT_OUT_LEFT
H_BR#0
H_PWRGD
VCCP
VCCP
VCCP
V_FSB_VTT
VCC3 VCC5
VCC5_SB
V_1P5_CORE
V_FSB_VTT
H_VCCPLL [8]
VTT_SEL [25]
VID_GD#[23,24]
CPU_GTLREF0 [3]
CPU_GTLREF1 [3]
H_PROCHOT# [3] H_CPURST# [3,6]
VTT_OUT_RIGHT[3,5]
H_PWRGD [3,11] H_BR#0 [3,6]
VTT_OUT_LEFT[3]
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Intel LGA775 CPU - Power
Custom
435Friday, August 17, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Intel LGA775 CPU - Power
Custom
435Friday, August 17, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Intel LGA775 CPU - Power
Custom
435Friday, August 17, 2007
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
VCCA ------ 120mA VCCIOPLL -- 100mA
CAPS FOR FSB GENERIC
VTT_PWG SPEC : High > 0.9V Low < 0.3V Trise < 150ns
1.25V VTT_PWRGOOD
The VCCA, VSSA, and VCCIOPLL processor lands can be no connects For board supporting only Intel Core2 Duo and Wolfale Family process
Reserved for Kentsfield (Q-core)
PLACE AT CPU END OF ROUTE
BY Inetel MOW WW14 For Q35/G33 GTLREF voltage should be
0.635*VTT
R41
10R0402
R41
10R0402
Q2
N-MMBT3904_NL_SOT23
Q2
N-MMBT3904_NL_SOT23
C13 C1U16Y
C13 C1U16Y
CP38 X_COPPER
CP38 X_COPPER
C6 C10U10Y0805C6 C10U10Y0805
C9 C0.1U16Y0402
C9 C0.1U16Y0402
C14
C10U10Y0805
C14
C10U10Y0805
R46 130R1%0402R46 130R1%0402
R47 X_100R0402R47 X_100R0402
R38
115R1%
R38
115R1%
C7 C10U10Y0805C7 C10U10Y0805
C0.1U16Y0402
C24 C0.1U16Y0402
C24
R34 200R1%
R34 200R1%
R49 62R0402R49 62R0402
C16 C0.1U16Y0402
C16 C0.1U16Y0402
C21
C0.1U16Y0402
C21
C0.1U16Y0402
C23
C1U16Y
C23
C1U16Y
R33
10R0402
R33
10R0402
CP35 X_COPPER
CP35 X_COPPER
C10U10Y0805
C22 C10U10Y0805
C22
C10 C220P50N0402
C10 C220P50N0402
C20 X_C1U16Y
C20 X_C1U16Y
R31
115R1%
R31
115R1%
R48 62R0402R48 62R0402
R43 1KR0402R43 1KR0402
R44 200R1%
R44 200R1%
R40 1KR0402
R40 1KR0402
C8 C10U10Y0805C8 C10U10Y0805
C17 C220P50N0402
C17 C220P50N0402
R37 680RR37 680R
RSVD
F29
VCC
AH27
VCC
AH26
VCC
AH25
VCC
AH22
VCC
AH21
VCC
AH19
VCC
AH18
VCC
AH15
VCC
AH14
VCC
AH12
VCC
AH11
VCC
AG9
VCC
AG8
VCC
AG30
VCC
AG29
VCC
AG28
VCC
AG27
VCC
AG26
VCC
AG25
VCC
AG22
VCC
AG21
VCC
AG19
VCC
AG18
VCC
AG15
VCC
AG14
VCC
AG12
VCC
AG11
VCC
AF9
VCC
AF8
VCC
AF22
VCC
AF21
VCC
AF19
VCC
AF18
VCC
AF15
VCC
AF14
VCC
AF12
VCC
AF11
VCC
AE9
VCC
AE23
VCC
AE22
VCC
AE21
VCC
AE19
VCC
AE18
VCC
AE15
VCC
AE14
VCC
AE12
VCC
AE11
VCC
AD8
VCC
AD30
VCC
AD29
VCC
AD28
VCC
AD27
VCC
AD26
VCC
AD25
VCC
AD24
VCC
AD23
VCC
AC8
VCC
AC30
VCC
AC29
VCC
AC28
VCC
AC27
VCC
AC26
VCC
AC25
VCC
AC24
VCC
AC23
VCC
AB8
VCC
AA8
VCC
AH28
VCC
AH29
VCC
AH30
VCC
AH8
VCC
AH9
VCC
AJ11
VCC
AJ12
VCC
AJ14
VCC
AJ15
VCC
AJ18
VCC
AJ19
VCC
AJ21
VCC
AJ22
VCC
AJ25
VCC
AJ26
VCC
AJ8
VCC
AJ9
VCC
AK11
VCC
AK12
VCC
AK14
VCC
AK15
VCC
AK18
VCC
AK19
VCC
AK21
VCC
AK22
VCC
AK25
VCC
AK26
VCC
AK8
VCC
AK9
VCC
AL11
VCC
AL12
VCC
AL14
VCC
AL15
VCC
AL18
VCC
AL19
VCC
AL21
VCC
AL22
VCC
AL25
VCC
AL26
VCC
AL29
VCC
AL30
VCC
AL8
VCC
AL9
VCC
AM11
VCC
AM12
VCC
AM14
VCC
AM15
VCC
AM18
VCC
AM19
VCC
AM21
VCC
AM22
VCC
AM25
VCC
AM26
VCC
AM29
VCC
AM30
VCC
AM8
VCC
AM9
VCC
AN11
VCC
AN12
VCC
AN14
VCC
AN15
VCC
AN18
VCC
AN19
VCC
AN21
VCC
AN22
VCC
AN25
VCC
AN26
VCC
AN29
VCC
AN30
VCC
AN8
VCC
AN9
VCC
J10
VCC
J11
VCC
J12
VCC
J13
VCC
J14
VCC
J15
VCC
J18
VCC
J19
VCC
J20
VCC
J21
VCC
J22
VCC
J23
VCC
J24
VCC
J25
VCC
J26
VCC
J27
VCC
J28
VCC
J29
VCC
J30
VCCJ8VCCJ9VCC
K23
VCC
K24
VCC
K25
VCC
K26
VCC
K27
VCC
K28
VCC
K29
VCC
K30
VCCK8VCCL8VCC
M23
VCC
M24
VCC
M25
VCC
M26
VCC
M27
VCC
M28
VCC
M29
VCC
M30
VCCM8VCC
N23
VCC
N24
VCC
N25
VCC
N26
VCC
N27
VCC
N28
VCC
N29
VCC
N30
VCCN8VCCP8VCCR8VCC
T23
VCC
T24
VCC
T25
VCC
T26
VCC
T27
VCC
T28
VCC
T29
VCC
T30
VCCT8VCC
U23
VCC
U24
VCC
U25
VCC
U26
VCC
U27
VCC
U28
VCC
U29
VCC
U30
VCCU8VCCV8VCC
W23
VCC
W24
VCC
W25
VCC
W26
VCC
W27
VCC
W28
VCC
W29
VCC
W30
VCCW8VCC
Y23
VCC
Y24
VCC
Y25
VCC
Y26
VCC
Y27
VCC
Y28
VCC
Y29
VCC
Y30
VCC
Y8
VCCPLL
D23
VTT
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTTPWRGD
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
VTT_SEL
F27
VCCA
A23
VSSA
B23
VCC-IOPLL
C23
HS11HS22HS33HS4
4
U1B
ZIF-SOCK775-15u-in
U1B
ZIF-SOCK775-15u-in
C15 C10U10Y0805
C15 C10U10Y0805
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MSID1
H_COMP7
H_COMP6
H_COMP8
MSID0
H_TESTHI12
VTT_OUT_RIGHT[3,4]
H_TESTHI12 [3]
H_BPM#0 [3]
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Intel LGA775 CPU - GND
Custom
535Friday, August 17, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Intel LGA775 CPU - GND
Custom
535Friday, August 17, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Intel LGA775 CPU - GND
Custom
535Friday, August 17, 2007
R59X_1K/4 R59X_1K/4
TP9TP9
VSS
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
AA23
VSS
AA24
VSS
AA25
VSS
AA26
VSS
AA27
VSS
AA28
VSS
AA29
VSS
AA3
VSS
AA30
VSS
AA6
VSS
AA7
VSS
AB1
VSS
AB23
VSS
AB24
VSS
AB25
VSS
AB26
VSS
AB27
VSS
AB28
VSS
AB29
VSS
AB30
VSS
AB7
VSS
AC3
VSS
AC6
VSS
AC7
VSS
AD4
VSS
AD7
VSS
AE10
VSS
AE13
VSS
AE16
VSS
AE17
VSS
AE2
VSS
AE20
VSS
AE24
VSS
AE25
VSS
AE26
VSS
AE27
VSS
AE28
VSS
AE29
VSS
AE30
VSS
AE5
VSS
AE7
VSS
AF10
VSS
AF13
VSS
AF16
VSS
AF17
VSS
AF20
VSS
AF23
VSS
AF24
VSS
AF25
VSS
AF26
VSS
AF27
VSS
AF28
VSS
AF29
VSS
AF3
VSS
AF30
VSS
AF6
VSS
AF7
VSS
AG10
VSS
AG13
VSS
AG16
VSS
AG17
VSS
AG20
VSS
AG23
VSS
AG24
VSS
AG7
VSS
AH1
VSS
AH10
VSS
AH13
VSS
AH16
VSS
AH17
VSS
AH20
VSS
AH23
VSS
AH24
VSS
AH3
VSS
AH6
VSS
AH7
VSS
AJ10
VSS
AJ13
VSS
AJ16
VSS
AJ17
VSS
AJ20
VSS
AJ23
VSS
AJ24
VSS
AJ27
VSS
AJ28
VSS
AJ29
VSS
AJ30
VSS
AJ4
VSS
AJ7
VSS
AK10
VSS
AK13
VSS
AK16
VSS
AK17
VSS
AK2
VSS
AK20
VSS
AK23
VSS
AK24
VSS
AK27
VSS
AK28
VSS
AK29
VSS
AK30
VSS
AK5
VSS
AK7
VSS
AL10
VSS
AL13
VSS
AL16
VSS
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
AL27
VSS
AL28
VSS
AL3
VSS
AL7
VSS
AM1
VSS
AM10
VSS
AM13
VSS
AM16
VSS
AM17
VSS
AM20
VSS
AM23
VSS
AM24
VSS
AM27
VSS
AM28
VSS
AM4
VSS
AN1
VSS
AN10
VSS
AN13
VSS
AN16
VSS
AN17
VSS
AN2
VSS
AN20
VSS
AN23
VSS
AN24
VSS
AN27
VSS
AN28
VSSB1VSS
B11
VSS
B14
VSS
B17
VSS
B20
VSS
B24
VSS
B5
VSS
B8
VSS
C10
VSS
C13
VSS
C16
VSS
C19
VSS
C22
VSS
C24
VSS
C4
VSS
C7
VSS
D12
VSS
D15
VSS
D18
VSS
D21
VSS
D24
VSS
D3
VSS
D5
VSS
D6
VSS
D9
VSS
E11
VSS
E14
VSS
E17
VSS
E2
VSS
E20
VSS
E25
VSS
E26
VSS
E27
VSS
E28
VSS
E29
VSS
E8
VSS
F10
VSS
F13
VSS
F16
VSS
F19
VSS
F22
VSS
F4
VSS
F7
VSS
G1
VSS
H10
VSS
H11
VSS
H12
VSS
H13
VSS
H14
VSS
H17
VSS
H18
VSS
H19
VSS
H20
VSS
H21
VSS
H22
VSS
H23
VSS
H24
VSS
H25
VSS
H26
VSS
H27
VSS
H28
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
K2
COMP6Y3COMP7
AE3
RSVD
AE4
RSVDD1RSVD
D14
RSVD
E23
RSVDE5RSVDE6RSVDE7RSVD
F23
IMPSEL#
F6
RSVD
B13
RSVDJ3RSVDN4RSVD
P5
MSID[1]V1MSID[0]
W1
RSVD
AC4
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
V30
VSSV3VSS
V29
VSS
V28
VSS
V27
VSS
V26
VSS
V25
VSS
V24
VSS
V23
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
R30
VSS
R29
VSS
R28
VSS
R27
VSS
R26
VSS
R25
VSS
R24
VSS
R23
VSSR2VSSP7VSSP4VSS
P30
VSS
P29
VSS
P28
VSS
P27
VSS
P26
VSS
P25
VSS
P24
VSS
P23
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
L30
VSSL3VSS
L29
VSS
L28
VSS
L27
VSS
L26
VSS
L25
VSS
L24
VSS
L23
VSSK7VSS
K5
U1C
ZIF-SOCK775-15u-in
U1C
ZIF-SOCK775-15u-in
TP11TP11
R55
X_51R0402
R55
X_51R0402
TP10TP10
R61 0R0402R61 0R0402
R56 X_51R0402
R56 X_51R0402
R51 51R0402
R51 51R0402
R54
24.9R1%0402
R54
24.9R1%0402
R57 0R0402R57 0R0402
R53 X_49.9R1%0402
R53 X_49.9R1%0402
R52
X_49.9R1%0402
R52
X_49.9R1%0402
TP8TP8
R60 0R0402R60 0R0402
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HXSWING
V_FSB_VTT
V_FSB_VTT HXSCOMP
HXSCOMPB
CK_PE_100M_MCH CK_PE_100M_MCH#
EXP_A_RXP_0
EXP_A_RXP_2 EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXN_1
EXP_A_RXP_1
EXP_A_RXN_0
EXP_A_RXN_2
EXP_A_RXN_7
EXP_A_RXN_4
EXP_A_RXP_4
EXP_A_RXP_7
EXP_A_RXP_6
EXP_A_RXP_5
EXP_A_RXN_6
EXP_A_RXN_5
EXP_A_RXP_8
EXP_A_RXN_11
EXP_A_RXN_10 EXP_A_RXP_11
EXP_A_RXP_10
EXP_A_RXN_8 EXP_A_RXP_9 EXP_A_RXN_9
EXP_A_RXP_15
EXP_A_RXP_12 EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXP_13
EXP_A_RXN_15
EXP_A_RXN_14
EXP_A_RXP_14
DMI_ITP_MRP_0
DMI_ITN_MRN_1 DMI_ITP_MRP_2
DMI_ITP_MRP_1
DMI_ITN_MRN_2
DMI_ITN_MRN_0
DMI_ITN_MRN_3
DMI_ITP_MRP_3
SDVO_CTRL_DATA
CK_H_MCH CK_H_MCH#
EXP16_PRSNT#
CL_VREF_MCH
H_RS#0 H_RS#1 H_RS#2
VSYNC
EXP_EN
DACREFSET
VGA_GREEN
CLINK_DATA
CLINK_RST
VGA_RED VGA_BLUEMTYPE
EXP_SLR
CHIP_PWGD
CK_96M_DREF CK_96M_DREF#
CLINK_CLK
MCH_DDC_CLK
MCH_DDC_DATA
CLINK_PWOK
MCH_TCEN
CL_VREF_MCH
HSYNC
MCH_RFU_G15
HXRCOMP
GRCOMP
HXRCOMP
MCH_GTLREF
HXSCOMPB MCH_GTLREF
H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
H_A#6
H_A#3 H_A#5
H_A#4
H_A#10
H_A#8
H_A#7
H_A#12
H_A#11
H_A#9
H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26
HXSCOMP
H_REQ#2 H_REQ#3 H_REQ#4
H_REQ#1
H_REQ#0
HXSWING
CHIP_PWGD
H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
SDVO_CTRL_CLK
DMI_MTP_IRP_0
DMI_MTN_IRN_2
DMI_MTN_IRN_1
DMI_MTP_IRP_3
DMI_MTP_IRP_1
DMI_MTN_IRN_0
DMI_MTN_IRN_3
DMI_MTP_IRP_2
EXP_A_TXN_1
EXP_A_TXP_0 EXP_A_TXP_1
EXP_A_TXN_0
EXP_A_TXP_2 EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXP_3 EXP_A_TXP_4 EXP_A_TXP_5
EXP_A_TXN_4 EXP_A_TXN_5
EXP_A_TXN_7
EXP_A_TXP_9
EXP_A_TXN_8
EXP_A_TXP_8
EXP_A_TXP_7
EXP_A_TXN_6
EXP_A_TXP_12
EXP_A_TXN_9
EXP_A_TXN_11
EXP_A_TXP_6
EXP_A_TXN_10
EXP_A_TXN_12
EXP_A_TXP_10
EXP_A_TXP_13 EXP_A_TXN_13
EXP_A_TXP_11
EXP_A_TXP_14
EXP_A_TXN_15
EXP_A_TXP_15
EXP_A_TXN_14
V_FSB_VTT
CPU_MCH_GTLREF
V_1P25_CORE
V_1P25_CL_MCH
V_1P25_CORE
V_FSB_VTT
V_FSB_VTT
H_A#[3..35][3] H_D#[0..63] [3]
CK_H_MCH [16] CK_H_MCH# [16]
DMI_MTP_IRP_0 [10] DMI_MTP_IRP_1 [10] DMI_MTP_IRP_2 [10] DMI_MTP_IRP_3 [10]
DMI_MTN_IRN_1 [10] DMI_MTN_IRN_2 [10]
DMI_MTN_IRN_0 [10]
DMI_MTN_IRN_3 [10]
EXP_A_TXP_1 [19]
EXP_A_TXP_0 [19]
EXP_A_TXP_5 [19]
EXP_A_TXP_2 [19] EXP_A_TXP_3 [19] EXP_A_TXP_4 [19]
EXP_A_TXP_11 [19]
EXP_A_TXP_6 [19]
EXP_A_TXP_10 [19]
EXP_A_TXP_12 [19] EXP_A_TXP_13 [19]
EXP_A_TXP_9 [19]
EXP_A_TXP_14 [19]
EXP_A_TXP_8 [19]
EXP_A_TXP_7 [19]
EXP_A_TXN_3 [19]
EXP_A_TXP_15 [19]
EXP_A_TXN_7 [19]
EXP_A_TXN_11 [19]
EXP_A_TXN_4 [19] EXP_A_TXN_5 [19]
EXP_A_TXN_14 [19] EXP_A_TXN_15 [19]
EXP_A_TXN_2 [19]
EXP_A_TXN_9 [19]
EXP_A_TXN_6 [19]
EXP_A_TXN_0 [19]
EXP_A_TXN_10 [19]
EXP_A_TXN_13 [19]
EXP_A_TXN_8 [19]
EXP_A_TXN_12 [19]
EXP_A_TXN_1 [19]
SDVO_CTRL_DATA[19]
EXP_A_RXP_0[19]
EXP_A_RXP_4[19] EXP_A_RXP_5[19]
EXP_A_RXP_1[19]
EXP_A_RXP_3[19]
EXP_A_RXP_2[19]
EXP_A_RXP_9[19]
EXP_A_RXP_10[19]
EXP_A_RXP_8[19]
EXP_A_RXP_7[19]
EXP_A_RXP_6[19]
EXP_A_RXP_11[19] EXP_A_RXP_12[19] EXP_A_RXP_13[19]
EXP_A_RXP_15[19]
EXP_A_RXP_14[19]
EXP_A_RXN_2[19]
EXP_A_RXN_1[19]
EXP_A_RXN_0[19]
EXP_A_RXN_4[19] EXP_A_RXN_5[19] EXP_A_RXN_6[19] EXP_A_RXN_7[19] EXP_A_RXN_8[19]
EXP_A_RXN_3[19]
EXP_A_RXN_9[19]
EXP_A_RXN_11[19]
EXP_A_RXN_10[19]
EXP_A_RXN_12[19] EXP_A_RXN_13[19] EXP_A_RXN_14[19] EXP_A_RXN_15[19]
CK_PE_100M_MCH#[16]
SDVO_CTRL_CLK[19]
DMI_ITN_MRN_0[10]
DMI_ITP_MRP_0[10] DMI_ITP_MRP_1[10]
DMI_ITN_MRN_2[10]
DMI_ITN_MRN_1[10] DMI_ITP_MRP_2[10]
DMI_ITN_MRN_3[10]
DMI_ITP_MRP_3[10]
CK_PE_100M_MCH[16]
H_ADSTB#0[3] H_ADSTB#1[3]
H_REQ#[0..4][3]
H_CPURST#[3,4]
H_RS#[0..2][3]
H_ADS#[3]
H_LOCK#[3]
H_BR#0[3,4]
H_BPRI#[3]
H_BNR#[3]
H_HITM#[3]
H_HIT#[3]
H_DEFER#[3]
H_TRDY#[3]
H_DBSY#[3]
H_DRDY#[3]
H_DSTBP#0[3] H_DSTBN#0[3]
H_DSTBN#1[3]
H_DSTBP#1[3] H_DSTBP#2[3]
H_DSTBN#2[3] H_DSTBN#3[3]
H_DSTBP#3[3]
H_DBI#[0..3][3]
VSYNC [22]
VGA_GREEN [22]
VGA_RED [22] VGA_BLUE [22]
CLINK_PWOK[11,25]
ICH_SYNC# [11]
CK_96M_DREF [16]
CK_96M_DREF# [16]
MCH_DDC_CLK [22]
MCH_DDC_DATA [22]
PLTRST# [11,24]
CLINK_DATA[11] CLINK_CLK[11]
HSYNC [22]
CLINK_RST[11]
EXP16_PRSNT#[19]
CHIP_PWGD [10,11,24]
CPU_MCH_GTLREF [3]
H_BSL1[16] H_BSL2[16]
H_BSL0[16]
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Bearlake - FSB, PCIE, DMI, VGA, MSIC
Custom
635Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Bearlake - FSB, PCIE, DMI, VGA, MSIC
Custom
635Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Bearlake - FSB, PCIE, DMI, VGA, MSIC
Custom
635Wednesday, September 19, 2007
CL_VREF_MCH = 0.349V Close to GMCH
*GTLREF VOLTAGE SHOULD BE
0.67*VTT=0.8V (At VTT=1.2V)
PIN H L Description
EXP_SLR
MCH_TCEN
EXP_EN
Normal
Enable
Concurrent
DDR2
MTYPE
Reverse
Disable
Non-concurrent
DDR3
PCI_E Lane Reversal
TLS confidentiality
PCI_E/SDVO co-existence
MEMORY TYPE
HXSWING SHOULD BE 1/4*VTT
T9T9
T10T10
R78
49.9R1%0402
R78
49.9R1%0402
R87 100R1%0402
R87 100R1%0402
R451 X_0RR451 X_0R
RESERVED_14
L17
TCEN
E20
RESERVED_16
N18
RESERVED_17
N15
RESERVED_18
N17
RESERVED_19
L15
RESERVED_20
L18
RESERVED_21
M18
RESERVED_22
AA10
RESERVED_23
AA9
RESERVED_24
AA11
RESERVED_25
Y12
RESERVED_26
U30
RESERVED_27
U31
RESERVED_28
R29
RESERVED_29
R30
RESERVED_30
U12
RESERVED_31
U11
RESERVED_32
R12
RESERVED_33
R13
BSEL0
G20
BSEL1
J20
BSEL2
J18
ALLZTEST
K20
XORTEST
F20
MTYPE
G18
EXP_SLR
E18
RESERVED_12
K17
EXP_EN
J17
RFU_G15
G15
CL_DATA
AD12
CL_CLK
AD13
CL_VREF
AM5
CL_RSTB
AA12
CL_PWROK
AM15
CRT_HSYNC
C15
CRT_VSYNC
E15
CRT_RED
B18
CRT_GREEN
C19
CRT_BLUE
B20
CRT_REDB
C18
CRT_GREENB
D19
CRT_BLUEB
D20
CRT_DDC_DATA
L13
CRT_DDC_CLK
M13
CRT_IREF
A20
DPL_REFCLKINP
C14
DPL_REFCLKINN
D13
VCC
L12
VSS
M11
RESERVED_34
H18
RESERVED_35
F17
RESERVED_36
A14
RSTINB
AM18
PWROK
AM17
ICH_SYNCB
J13
NC
A42
RESERVED_37
R20
MISC VGA
5 OF 7
U2E
BRLK_B_CRB
MISC VGA
5 OF 7
U2E
BRLK_B_CRB
C26 X_C2.7P25N0402
C26 X_C2.7P25N0402
R83 51R1%0402
R83 51R1%0402
R80 100R1%
R80 100R1%
R67 24.9R1%0402R67 24.9R1%0402
C31 C0.1U16Y0402
C31 C0.1U16Y0402
R82 200R1%
R82 200R1%
R77 X_1KR0402R77 X_1KR0402
T8T8
T4T4
C29
C220P50N0402
C29
C220P50N0402
C28 C10U10Y0805
C28 C10U10Y0805
R81
16.5R1%0402-RH
R81
16.5R1%0402-RH
R84 X_0R0402R84 X_0R0402
R72 1.3KR1%0402R72 1.3KR1%0402
R75 0R0402R75 0R0402
R89
392R1%0402
R89
392R1%0402
T1T1
R85 301R1%0402
R85 301R1%0402
R88
49.9R1%0402
R88
49.9R1%0402
T6T6
T5T5
PEG_RXP_0
F13
PEG_RXN_0
E13
PEG_RXP_1
K15
PEG_RXN_1
J15
PEG_RXP_2
F12
PEG_RXN_2
E12
PEG_RXP_3
J12
PEG_RXN_3
H12
PEG_RXP_4
J11
PEG_RXN_4
H11
PEG_RXP_5
F7
PEG_RXN_5
E7
PEG_RXP_6
E5
PEG_RXN_6
F6
PEG_RXP_7
C2
PEG_RXN_7
D2
PEG_RXP_8
G6
PEG_RXN_8
G5
PEG_RXP_9
L9
PEG_RXN_9
L8
PEG_RXP_10
M8
PEG_RXN_10
M9
PEG_RXP_11
M4
PEG_RXN_11
L4
PEG_RXP_12
M5
PEG_RXN_12
M6
PEG_RXP_13
R9
PEG_RXN_13
R10
PEG_RXP_14
T4
PEG_RXN_14
R4
PEG_RXP_15
R6
PEG_RXN_15
R7
DMI_RXP_0
W2
DMI_RXN_0
V1
DMI_RXP_1
Y8
DMI_RXN_1
Y9
DMI_RXP_2
AA7
DMI_RXN_2
AA6
DMI_RXP_3
AB3
DMI_RXN_3
AA4
EXP_CLKINP
B12
EXP_CLKINN
B13
SDVO_CTRLDATA
G17
SDVO_CTRLCLK
E17
PEG_TXP_0
D11
PEG_TXN_0
D12
PEG_TXP_1
B11
PEG_TXN_1
A10
PEG_TXP_2
C10
PEG_TXN_2
D9
PEG_TXP_3
B9
PEG_TXN_3
B7
PEG_TXP_4
D7
PEG_TXN_4
D6
PEG_TXP_5
B5
PEG_TXN_5
B6
PEG_TXP_6
B3
PEG_TXN_6
B4
PEG_TXP_7
F2
PEG_TXN_7
E2
PEG_TXP_8
F4
PEG_TXN_8
G4
PEG_TXP_9
J4
PEG_TXN_9
K3
PEG_TXP_10
L2
PEG_TXN_10
K1
PEG_TXP_11
N2
PEG_TXN_11
M2
PEG_TXP_12
P3
PEG_TXN_12
N4
PEG_TXP_13
R2
PEG_TXN_13
P1
PEG_TXP_14
U2
PEG_TXN_14
T2
PEG_TXP_15
V3
PEG_TXN_15
U4
DMI_TXP_0
V7
DMI_TXN_0
V6
DMI_TXP_1
W4
DMI_TXN_1
Y4
DMI_TXP_2
AC8
DMI_TXN_2
AC9
DMI_TXP_3
Y2
DMI_TXN_3
AA2
EXP_COMPO
AC11
EXP_COMPI
AC12
PCIE
DMI
2 OF 7
U1MCH
U2A
BRLK_B_CRB
PCIE
DMI
2 OF 7
U1MCH
U2A
BRLK_B_CRB
T3T3
FSB_AB_3
J42
FSB_AB_4
L39
FSB_AB_5
J40
FSB_AB_6
L37
FSB_AB_7
L36
FSB_AB_8
K42
FSB_AB_9
N32
FSB_AB_10
N34
FSB_AB_11
M38
FSB_AB_12
N37
FSB_AB_13
M36
FSB_AB_14
R34
FSB_AB_15
N35
FSB_AB_16
N38
FSB_AB_17
U37
FSB_AB_18
N39
FSB_AB_19
R37
FSB_AB_20
P42
FSB_AB_21
R39
FSB_AB_22
V36
FSB_AB_23
R38
FSB_AB_24
U36
FSB_AB_25
U33
FSB_AB_26
R35
FSB_AB_27
V33
FSB_AB_28
V35
FSB_AB_29
Y34
FSB_AB_30
V42
FSB_AB_31
V38
FSB_AB_32
Y36
FSB_AB_33
Y38
FSB_AB_34
Y39
FSB_AB_35
AA37
FSB_REQB_0
F40
FSB_REQB_1
L35
FSB_REQB_2
L38
FSB_REQB_3
G43
FSB_REQB_4
J37
FSB_ADSTBB_0
M34
FSB_ADSTBB_1
U34
FSB_DSTBPB_0
M42
FSB_DSTBNB_0
M43
FSB_DSTBPB_1
G35
FSB_DSTBNB_1
H33
FSB_DSTBPB_2
G27
FSB_DSTBNB_2
H27
FSB_DSTBPB_3
B38
FSB_DSTBNB_3
C38
FSB_DINVB_0
M40
FSB_ADSB
W40
FSB_TRDYB
Y40
FSB_DRDYB
W41
FSB_DEFERB
T43
FSB_HITMB
Y43
FSB_HITB
U42
FSB_LOCKB
V41
FSB_BREQ0B
AA42
FSB_DINVB_1
J33
FSB_DINVB_2
G29
FSB_DINVB_3
E33
FSB_BNRB
W42
FSB_BPRIB
G39
FSB_DBSYB
U40
FSB_RSB_0
U41
FSB_RSB_1
AA41
FSB_RSB_2
U39
FSB_CPURSTB
C31
FSB_DB_0
R40
FSB_DB_1
P41
FSB_DB_2
R41
FSB_DB_3
N40
FSB_DB_4
R42
FSB_DB_5
M39
FSB_DB_6
N41
FSB_DB_7
N42
FSB_DB_8
L41
FSB_DB_9
J39
FSB_DB_10
L42
FSB_DB_11
J41
FSB_DB_12
K41
FSB_DB_13
G40
FSB_DB_14
F41
FSB_DB_15
F42
FSB_DB_16
C42
FSB_DB_17
D41
FSB_DB_18
F38
FSB_DB_19
G37
FSB_DB_20
E42
FSB_DB_21
E39
FSB_DB_22
E37
FSB_DB_23
C39
FSB_DB_24
B39
FSB_DB_25
G33
FSB_DB_26
A37
FSB_DB_27
F33
FSB_DB_28
E35
FSB_DB_29
K32
FSB_DB_30
H32
FSB_DB_31
B34
FSB_DB_32
J31
FSB_DB_33
F32
FSB_DB_34
M31
FSB_DB_35
E31
FSB_DB_36
K31
FSB_DB_37
G31
FSB_DB_38
K29
FSB_DB_39
F31
FSB_DB_40
J29
FSB_DB_41
F29
FSB_DB_42
L27
FSB_DB_43
K27
FSB_DB_44
H26
FSB_DB_45
L26
FSB_DB_46
J26
FSB_DB_47
M26
FSB_DB_48
C33
FSB_DB_49
D35
FSB_DB_50
E41
FSB_DB_51
B41
FSB_DB_52
D42
FSB_DB_53
C40
FSB_DB_54
C35
FSB_DB_55
B40
FSB_DB_56
D38
FSB_DB_57
D37
FSB_DB_58
B33
FSB_DB_59
D33
FSB_DB_60
C34
FSB_DB_61
B35
FSB_DB_62
A32
FSB_DB_63
D32
FSB_SWING
B25
FSB_RCOMP
D23
FSB_SCOMP
C25
FSB_SCOMPB
D25
FSB_DVREF
D24
FSB_ACCVREF
B24
HPL_CLKINP
R32
HPL_CLKINN
U32
FSB
1 OF 7
U1MCH
U2B
BRLK_B_CRB
FSB
1 OF 7
U1MCH
U2B
BRLK_B_CRB
C30 C0.01U25X0402
C30 C0.01U25X0402
T2T2
T7T7
R73 X_1KR0402R73 X_1KR0402
R79
49.9R1%0402
R79
49.9R1%0402
R76 X_1KR0402R76 X_1KR0402
R74 1KR0402R74 1KR0402
C27 X_C2.7P25N0402
C27 X_C2.7P25N0402
R86 1KR1%0402
R86 1KR1%0402
T11T11
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_RCOMPVOH
DDR_RCOMPVOL
SRCOMP0 SRCOMP1 SRCOMP2 SRCOMP3
DQM_A1
DQM_A4
DQM_A2
DQM_A6
DQM_A0
DQM_A3 DQM_A5 DQM_A7
SRCOMP0 SRCOMP1 SRCOMP2 SRCOMP3
DATA_B46DATA_B46
DQS_B#5
DATA_B28DATA_B28
DATA_B23DATA_B23
DATA_B20DATA_B20
DATA_B15DATA_B15
DATA_B13DATA_B13
DATA_B6DATA_B6
DATA_B60DATA_B60
DATA_B58DATA_B58
DQS_B#7
DATA_B52DATA_B52
DATA_B50DATA_B50
DATA_B45DATA_B45
DQS_B5
DQS_B#4
DATA_B12DATA_B12
DATA_B8DATA_B8
DQS_B0
DATA_B18DATA_B18
DATA_B59DATA_B59
DATA_B44DATA_B44
DATA_B41DATA_B41
DATA_B29DATA_B29
DATA_B27DATA_B27
DATA_B57DATA_B57
DATA_B49DATA_B49
DATA_B42DATA_B42
DATA_B37DATA_B37
DQM_B4DQM_B4
DQS_B4
DATA_B22DATA_B22
DQM_B1DQM_B1
DQM_B7DQM_B7
DQM_B5DQM_B5
DQS_B1
DATA_B61DATA_B61
DATA_B38DATA_B38
DATA_B32DATA_B32
DATA_B19DATA_B19
DATA_B5DATA_B5
DATA_B4DATA_B4
DATA_B1DATA_B1
DATA_B39DATA_B39
DATA_B31DATA_B31
DQM_B3DQM_B3
DQM_B2DQM_B2
DATA_B7DATA_B7
DQM_B0DQM_B0
DATA_B62DATA_B62
DATA_B53DATA_B53
DQS_B6
DATA_B43DATA_B43
DATA_B36DATA_B36
DATA_B35DATA_B35
DATA_B33DATA_B33
DATA_B25DATA_B25
DATA_B11DATA_B11
DQS_B#1
DATA_B63DATA_B63
DATA_B48DATA_B48
DATA_B26DATA_B26
DATA_B24DATA_B24
DATA_B17DATA_B17
DATA_B54DATA_B54
DATA_B30DATA_B30
DATA_B14DATA_B14
DATA_B3DATA_B3
DQS_B7
DQS_B#2
DATA_B9DATA_B9
DQS_B#0
DATA_B47DATA_B47
DQS_B2
DATA_B2DATA_B2
DATA_B21DATA_B21
DATA_B16DATA_B16
DATA_B55DATA_B55
DATA_B51DATA_B51
DQS_B#3
DQS_B3
DATA_B0DATA_B0
DATA_B56DATA_B56
DQM_B6DQM_B6
DQS_B#6
DATA_B40DATA_B40
DATA_B34DATA_B34
DATA_B10DATA_B10
MCH_VREF_A
SBS_B0 SBS_B1 SBS_B2
P_DDR3_B
N_DDR4_B
P_DDR4_B
N_DDR3_B
P_DDR0_B
P_DDR2_B N_DDR2_B
DQS_A0
DQS_A#1
DQS_A3
DQS_A1
N_DDR0_B
SCS_B#2 SCS_B#3
SCS_B#0 SCS_B#1
DQS_A2
DQS_A#0
DQS_A#2
DQS_A4
DQS_A#3
DQS_A7
DQS_A#6
DQS_A5 DQS_A6
DQS_A#4
DQS_A#7
CAS_B# RAS_B#
WE_B#
DQS_A#5
ODT_B0 ODT_B1 ODT_B2 ODT_B3
MAA_B4
MAA_B3
MAA_B0
MAA_B5
MAA_B2
MAA_B1
MAA_B13
MAA_B11
MAA_B10
MAA_B8
MAA_B12
MAA_B7
MAA_B6
MAA_B9
MAA_B14
P_DDR1_B N_DDR1_B
SCKE_B1 SCKE_B2
SCKE_B0
SCKE_B3
P_DDR5_B N_DDR5_B
DDR_RCOMPVOL
DDR_RCOMPVOH
DATA_A1 DATA_A2
DATA_A0
DATA_A9
DATA_A3
DATA_A8
DATA_A4
DATA_A10
DATA_A7
DATA_A6
DATA_A15
DATA_A5
DATA_A14
DATA_A12 DATA_A13
DATA_A11
DATA_A20
DATA_A17 DATA_A18 DATA_A19
DATA_A16
DATA_A29
DATA_A22
DATA_A27
DATA_A21 DATA_A23 DATA_A25
DATA_A26
DATA_A24
DATA_A28
DATA_A34 DATA_A35
DATA_A31 DATA_A33
DATA_A37
DATA_A32
DATA_A30
DATA_A45
DATA_A36 DATA_A38 DATA_A40
DATA_A41
DATA_A47
DATA_A44
DATA_A52
DATA_A43
DATA_A42
DATA_A51
DATA_A49
DATA_A55
DATA_A50
DATA_A54
DATA_A53
DATA_A48
DATA_A63
DATA_A56
DATA_A62
DATA_A61
DATA_A58 DATA_A59
DATA_A39
DATA_A57
DATA_A60
MAA_A14
MAA_A0 MAA_A1
MAA_A5
MAA_A2 MAA_A3 MAA_A4
MAA_A9
MAA_A12
MAA_A6 MAA_A7
MAA_A13
MAA_A10 MAA_A11
MAA_A8
SBS_A0 SBS_A2
SBS_A1
ODT_A0 ODT_A1 ODT_A2 ODT_A3
SCKE_A1
SCKE_A0
SCKE_A3
SCKE_A2
SCS_A#2 SCS_A#3
SCS_A#0 SCS_A#1
CAS_A# RAS_A#
WE_A#
P_DDR1_A P_DDR2_A
N_DDR2_A
P_DDR0_A N_DDR0_A
P_DDR5_A N_DDR5_A
P_DDR3_A N_DDR3_A
N_DDR1_A
P_DDR4_A N_DDR4_A
DATA_A46
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
DQS_A0 [13]
DQS_A3 [13]
DQS_A1 [13] DQS_A2 [13]
DQS_A7 [13]
DQS_A5 [13]
DQS_A4 [13]
DQS_A6 [13]
DQS_A#2 [13]
DQS_A#0 [13] DQS_A#1 [13]
DQS_A#4 [13] DQS_A#5 [13]
DQS_A#3 [13]
DQS_A#7 [13]
DQS_A#6 [13]
DQM_A[0..7] [13]
DATA_A[0..63] [13]
DQS_B0 [14]
DQS_B2 [14]
DQS_B1 [14]
DQS_B4 [14]
DQS_B3 [14]
DQS_B5 [14] DQS_B6 [14]
DQS_B#0 [14]
DQS_B7 [14]
DQS_B#3 [14] DQS_B#4 [14]
DQS_B#2 [14]
DQS_B#1 [14]
DQS_B#7 [14]
DQS_B#5 [14] DQS_B#6 [14]
DQM_B[0..7] [14]
DATA_B[0..63] [14]
N_DDR1_A[13]
N_DDR4_A[13]
ODT_A2[13,15] ODT_A3[13,15]
MAA_A[0..14][13,15]
SBS_A[0..2][13,15]
SCKE_A1[13,15]
WE_A#[13,15]
SCKE_A2[13,15]
CAS_A#[13,15] RAS_A#[13,15]
SCKE_A3[13,15]
SCS_A#0[13,15] SCS_A#2[13,15]
SCS_A#3[13,15] SCKE_A0[13,15]
N_DDR0_A[13]
N_DDR2_A[13]
P_DDR0_A[13]
P_DDR2_A[13] P_DDR3_A[13]
N_DDR3_A[13]
P_DDR5_A[13] N_DDR5_A[13]
SCS_A#1[13,15]
ODT_A1[13,15]
P_DDR1_A[13]
ODT_A0[13,15]
P_DDR4_A[13]
ODT_B3[14,15]
SCS_B#0[14,15] SCS_B#1[14,15] SCS_B#2[14,15] SCS_B#3[14,15]
SBS_B[0..2][14,15]
P_DDR0_B[14]
P_DDR2_B[14]
P_DDR4_B[14]
P_DDR3_B[14]
N_DDR2_B[14]
N_DDR0_B[14]
N_DDR3_B[14] N_DDR4_B[14]
P_DDR5_B[14]
SCKE_B1[14,15] SCKE_B2[14,15] SCKE_B3[14,15]
SCKE_B0[14,15]
N_DDR5_B[14]
CAS_B#[14,15] RAS_B#[14,15]
WE_B#[14,15]
P_DDR1_B[14]
ODT_B1[14,15] ODT_B2[14,15]
N_DDR1_B[14]
ODT_B0[14,15]
MAA_B[0..14][14,15]
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Bearlake - Memory
Custom
735Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Bearlake - Memory
Custom
735Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Bearlake - Memory
Custom
735Wednesday, September 19, 2007
DDR_RCOMPVOL = 0.2 * VCC_DDR
Place close to GMCH
PLACE 0.1UF CAP CLOSE TO MCH
DDR_RCOMPVOH = 0.8 * VCC_DDR
At least 10 mil~20 mil
At least 10 mil~20 mil
At least 10 mil
C35 C1U16YC35 C1U16Y
R97 19.1R1%R97 19.1R1% R99 19.1R1%R99 19.1R1%
R96 1KR1%0402R96 1KR1%0402
C42
C0.1U16Y0402
C42
C0.1U16Y0402
C32 C0.1U16Y0402
C32 C0.1U16Y0402
C36 C1U16YC36 C1U16Y
R95 19.1R1%R95 19.1R1%
C33 C1U16YC33 C1U16Y
C41
C0.1U16Y0402
C41
C0.1U16Y0402
T18T18
R90 1KR1%0402R90 1KR1%0402
T17T17
DDR_A_MA_0
BB30
DDR_A_MA_1
AY25
DDR_A_MA_2
BA23
DDR_A_MA_3
BB23
DDR_A_MA_4
AY23
DDR_A_MA_5
BB22
DDR_A_MA_6
BA22
DDR_A_MA_7
BB21
DDR_A_MA_8
AW21
DDR_A_MA_9
BA21
DDR_A_MA_10
BB31
DDR_A_MA_11
AY21
DDR_A_MA_12
BC20
DDR_A_MA_13
AY38
DDR_A_MA_14
BA19
DDR_A_DQS_0
AP2
DDR_A_DQSB_0
AP3
DDR_A_DM_0
AN2
DDR_A_DQ_0
AM1
DDR_A_DQ_1
AN3
DDR_A_DQ_2
AR2
DDR_A_DQ_3
AR3
DDR_A_DQ_4
AL3
DDR_A_DQ_5
AM2
DDR_A_DQ_6
AR5
DDR_A_DQ_7
AR4
DDR_A_DQS_1
AW2
DDR_A_DQSB_1
AW1
DDR_A_DM_1
AW3
DDR_A_DQ_8
AV4
DDR_A_DQ_9
AV3
DDR_A_DQ_10
BA4
DDR_A_DQ_11
BB3
DDR_A_DQ_12
AU2
DDR_A_DQ_13
AU1
DDR_A_DQ_14
AY2
DDR_A_DQ_15
AY3
DDR_A_DQS_2
AY7
DDR_A_DQSB_2
BA6
DDR_A_DM_2
BB6
DDR_A_DQ_16
BB5
DDR_A_DQ_17
AY6
DDR_A_DQ_18
BA9
DDR_A_DQ_19
BB9
DDR_A_DQ_20
BA5
DDR_A_DQ_21
BB4
DDR_A_DQ_22
BC7
DDR_A_DQ_23
AY9
DDR_A_DQS_3
AT20
DDR_A_DQSB_3
AU18
DDR_A_DM_3
AN18
DDR_A_DQ_24
AT18
DDR_A_DQ_25
AR18
DDR_A_DQ_26
AU21
DDR_A_DQ_27
AT21
DDR_A_DQ_28
AP17
DDR_A_DQ_29
AN17
DDR_A_DQ_30
AP20
DDR_A_DQ_31
AV20
DDR_A_DQS_4
AR41
DDR_A_DQSB_4
AR40
DDR_A_DM_4
AU43
DDR_A_DQ_32
AV42
DDR_A_DQ_33
AU40
DDR_A_DQ_34
AP42
DDR_A_DQ_35
AN39
DDR_A_DQ_36
AV40
DDR_A_DQ_37
AV41
DDR_A_DQ_38
AR42
DDR_A_DQ_39
AP41
DDR_A_DQS_5
AL41
DDR_A_DQSB_5
AL40
DDR_A_DM_5
AM43
DDR_A_DQ_40
AN41
DDR_A_DQ_41
AM39
DDR_A_DQ_42
AK42
DDR_A_DQ_43
AK41
DDR_A_DQ_44
AN40
DDR_A_DQ_45
AN42
DDR_A_DQ_46
AL42
DDR_A_DQ_47
AL39
DDR_A_DQS_6
AG42
DDR_A_DQSB_6
AG41
DDR_A_DM_6
AG40
DDR_A_DQ_48
AJ40
DDR_A_DQ_49
AH43
DDR_A_DQ_50
AF39
DDR_A_DQ_51
AE40
DDR_A_DQ_52
AJ42
DDR_A_DQ_53
AJ41
DDR_A_DQ_54
AF41
DDR_A_DQ_55
AF42
DDR_A_DQS_7
AC42
DDR_A_DQSB_7
AC41
DDR_A_DM_7
AC40
DDR_A_DQ_56
AD40
DDR_A_DQ_57
AD43
DDR_A_DQ_58
AB41
DDR_A_DQ_59
AA40
DDR_A_DQ_60
AE42
DDR_A_DQ_61
AE41
DDR_A_DQ_62
AC39
DDR_A_DQ_63
AB42
DDR_A_WEB
BA33
DDR_A_CASB
AW35
DDR_A_RASB
AY33
DDR_A_BS_0
BA31
DDR_A_BS_1
AY31
DDR_A_BS_2
AY20
DDR_A_CSB_0
BA34
DDR_A_CSB_1
AY35
DDR_A_CSB_2
BB33
DDR_A_CSB_3
BB38
DDR_A_CKE_0
AY19
DDR_A_CKE_1
AW18
DDR_A_CKE_2
BB19
DDR_A_CKE_3
BA18
DDR_A_ODT_0
BB35
DDR_A_ODT_1
BA38
DDR_A_ODT_2
BA35
DDR_A_ODT_3
BA39
DDR_A_CK_0
AR31
DDR_A_CK_1
AP27
DDR_A_CK_2
AV33
DDR_A_CK_3
AP29
DDR_A_CK_4
AM26
DDR_A_CK_5
AT33
DDR_A_CKB_0
AU31
DDR_A_CKB_1
AN27
DDR_A_CKB_2
AW33
DDR_A_CKB_3
AP31
DDR_A_CKB_4
AM27
DDR_A_CKB_5
AU33
RESERVED_1
AN21
DDR3_DRAMRSTB
BC16
DDR3_DRAM_PWROK
AN15
DDR3_A_CSB1
AY37
DDR3_A_MA0
BB29
DDR3_A_WEB
BB34
DDR3_B_ODT3
AW32
TEST3
BC43
TEST1
BC1
TEST0
A43
NC_1
N20
NC_2
B2
NC_3
B42
NC_4
B43
NC_5
BB1
NC_6
BB2
NC_7
BB43
NC_8
BC2
NC_9
BC42
DDR_A
3 OF 7
U1MCH
NC
DDR3
U2C
BRLK_B_CRB
DDR_A
3 OF 7
U1MCH
NC
DDR3
U2C
BRLK_B_CRB
C37 C1U16YC37 C1U16Y
DDR_B_MA_0
AW15
DDR_B_MA_1
BB15
DDR_B_MA_2
BA15
DDR_B_MA_3
AY15
DDR_B_MA_4
BA14
DDR_B_MA_5
BB14
DDR_B_MA_6
AW12
DDR_B_MA_7
BA13
DDR_B_MA_8
BB13
DDR_B_MA_9
AY13
DDR_B_MA_10
BA17
DDR_B_MA_11
AY12
DDR_B_MA_12
BA11
DDR_B_MA_13
AY27
DDR_B_MA_14
BB11
DDR_B_WEB
BB25
DDR_B_CASB
AW26
DDR_B_RASB
AY24
DDR_B_BS_0
BB17
DDR_B_BS_1
AY17
DDR_B_BS_2
AY11
DDR_B_CSB_0
BA25
DDR_B_CSB_1
BA29
DDR_B_CSB_2
BA26
DDR_B_CSB_3
BA30
DDR_B_CKE_0
AW11
DDR_B_CKE_1
BC12
DDR_B_CKE_2
BA10
DDR_B_CKE_3
BB10
DDR_B_ODT_0
BB27
DDR_B_ODT_1
AW29
DDR_B_ODT_2
BA27
DDR_B_ODT_3
AY29
DDR_B_CK_0
AW31
DDR_B_CKB_0
AV31
DDR_B_CK_1
AU27
DDR_B_CKB_1
AT27
DDR_B_CK_2
AV32
DDR_B_CKB_2
AT32
DDR_B_CK_3
AR29
DDR_B_CKB_3
AU29
DDR_B_CK_4
AV29
DDR_B_CKB_4
AW27
DDR_B_CK_5
AN33
DDR_B_CKB_5
AP32
RESERVED_10
AM21
DDR_B_DQS_0
AV6
DDR_B_DQSB_0
AU5
DDR_B_DM_0
AR7
DDR_B_DQ_0
AN7
DDR_B_DQ_1
AN8
DDR_B_DQ_2
AW5
DDR_B_DQ_3
AW7
DDR_B_DQ_4
AN5
DDR_B_DQ_5
AN6
DDR_B_DQ_6
AN9
DDR_B_DQ_7
AU7
DDR_B_DQS_1
AR12
DDR_B_DQSB_1
AP12
DDR_B_DM_1
AW9
DDR_B_DQ_8
AT11
DDR_B_DQ_9
AU11
DDR_B_DQ_10
AP13
DDR_B_DQ_11
AR13
DDR_B_DQ_12
AR11
DDR_B_DQ_13
AU9
DDR_B_DQ_14
AV12
DDR_B_DQ_15
AU12
DDR_B_DQS_2
AP15
DDR_B_DQSB_2
AR15
DDR_B_DM_2
AW13
DDR_B_DQ_16
AU15
DDR_B_DQ_17
AV13
DDR_B_DQ_18
AU17
DDR_B_DQ_19
AT17
DDR_B_DQ_20
AU13
DDR_B_DQ_21
AM13
DDR_B_DQ_22
AV15
DDR_B_DQ_23
AW17
DDR_B_DQS_3
AT24
DDR_B_DQSB_3
AU26
DDR_B_DM_3
AP23
DDR_B_DQ_24
AV24
DDR_B_DQ_25
AT23
DDR_B_DQ_26
AT26
DDR_B_DQ_27
AP26
DDR_B_DQ_28
AU23
DDR_B_DQ_29
AW23
DDR_B_DQ_30
AR24
DDR_B_DQ_31
AN26
DDR_B_DQS_4
AW39
DDR_B_DQSB_4
AU39
DDR_B_DM_4
AU37
DDR_B_DQ_32
AW37
DDR_B_DQ_33
AV38
DDR_B_DQ_34
AN36
DDR_B_DQ_35
AN37
DDR_B_DQ_36
AU35
DDR_B_DQ_37
AR35
DDR_B_DQ_38
AN35
DDR_B_DQ_39
AR37
DDR_B_DQS_5
AL35
DDR_B_DQSB_5
AL34
DDR_B_DM_5
AM37
DDR_B_DQ_40
AM35
DDR_B_DQ_41
AM38
DDR_B_DQ_42
AJ34
DDR_B_DQ_43
AL38
DDR_B_DQ_44
AR39
DDR_B_DQ_45
AM34
DDR_B_DQ_46
AL37
DDR_B_DQ_47
AL32
DDR_B_DQS_6
AG35
DDR_B_DQSB_6
AG36
DDR_B_DM_6
AG39
DDR_B_DQ_48
AG38
DDR_B_DQ_49
AJ38
DDR_B_DQ_50
AF35
DDR_B_DQ_51
AF33
DDR_B_DQ_52
AJ37
DDR_B_DQ_53
AJ35
DDR_B_DQ_54
AG33
DDR_B_DQ_55
AF34
DDR_B_DQS_7
AC36
DDR_B_DQSB_7
AC37
DDR_B_DM_7
AD38
DDR_B_DQ_56
AD36
DDR_B_DQ_57
AC33
DDR_B_DQ_58
AA34
DDR_B_DQ_59
AA36
DDR_B_DQ_60
AD34
DDR_B_DQ_61
AF38
DDR_B_DQ_62
AC34
DDR_B_DQ_63
AA33
RESERVED_2
BA2
RESERVED_3
AW42
RESERVED_4
AN32
RESERVED_5
AM31
RESERVED_6
AG32
RESERVED_7
AF32
RESERVED_8
AP21
RESERVED_9
AA39
DDR_RCOMPXPD
AL4
DDR_RCOMPYPU
BA40
DDR_RCOMPYPD
BB40
DDR_RCOMPVOL
AM8
DDR_RCOMPVOH
AM10
DDR_VREF
AM6
DDR_RCOMPXPU
AL2
DDR_B
4 OF 7
U1MCH
U2D
BRLK_B_CRB
DDR_B
4 OF 7
U1MCH
U2D
BRLK_B_CRB
C1U16YC34 C1U16YC34
R94
3.01KR1%0402
R94
3.01KR1%0402
C38 C1U16YC38 C1U16Y
R91 0R0402R91 0R0402
C39 C0.01U25X0402
C39 C0.01U25X0402
R92 1KR1%0402
R92 1KR1%0402
R98 19.1R1%R98 19.1R1%
T16T16
C40 C0.01U25X0402
C40 C0.01U25X0402
T19T19
R93 1KR1%0402R93 1KR1%0402
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
V_3P3_DAC_FILTERED
VCCA_HPLL VCCA_DPLLA VCCA_DPLLB
VCCA_DPLLA
VCCA_GPLL
VCCDQ_CRT
H_VCCPLL
VCCA_DPLLB
VCCA_GPLL VCCA_MPLL
V_3P3_DAC_FILTERED
V_1P25_PCIE
V_3P3_DAC_FILTERED
VCCA_DPLLA
VCCA_MPLL
VCCA_HPLL
VCCDQ_CRT
VCC3
VCC_DDR
V_1P25_CORE
V_1P25_CORE
V_1P25_CORE
V_FSB_VTT
VCC_DDR
V_1P25_CORE
VCC3
V_1P25_CORE
V_1P25_CL_MCH
V_1P25_CORE
V_FSB_VTT V_FSB_VTT
V_1P25_CL_MCHV_1P25_CORE
V_1P25_COREV_1P25_CORE V_1P25_CL_MCH
V_1P25_CL_MCH
V_1P25_CL_MCH
H_VCCPLL[4]
Title
Size Document Number Rev
Date: Sheet of
MICRO-START INT'L CO.,LTD.
Bearlake - Power
Custom
835Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Bearlake - Power
Custom
835Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Bearlake - Power
Custom
835Wednesday, September 19, 2007
For non-Graphic sku Cxx change to 0-ohm Rxx unstuff
For non-Graphic sku change to 0-ohm (0603)
If non-Graphic sku Remove these resisters
Separate when AMT is supported
5020 5020
CP2
X_COPPER
CP2
X_COPPER
C60 C10U10Y0805C60 C10U10Y0805
C67 C1U16YC67 C1U16YC85 C1U16YC85 C1U16Y
C252 C0.1U16Y0402
C252 C0.1U16Y0402
C68 C1U16YC68 C1U16Y
C79 C10U10Y0805C79 C10U10Y0805
CP5 X_COPPER
CP5 X_COPPER
C92
C0.1U16Y0402
C92
C0.1U16Y0402
CP3
X_COPPER
CP3
X_COPPER
C80 C1U16YC80 C1U16Y
C88
C0.1U16Y0402
C88
C0.1U16Y0402
L7
X_10U100m_0805
L7
X_10U100m_0805
1 3 5 7
2 4 6 8
RN54
X_8P4R-0R
RN54
X_8P4R-0R
C93 C10U10Y0805C93 C10U10Y0805
C83 C0.1U16Y0402C83 C0.1U16Y0402
C256
C0.1U16Y0402
C256
C0.1U16Y0402
L10
X_10U100m_0805
L10
X_10U100m_0805
CP4 X_COPPER
CP4 X_COPPER
C56 C0.1U16Y0402
C56 C0.1U16Y0402
C64 C1U16YC64 C1U16Y
C71 C0.1U16Y0402C71 C0.1U16Y0402
CP1 X_COPPER
CP1 X_COPPER
C59 C1U16YC59 C1U16Y
C53
C1U16Y
C53
C1U16Y
C81 C0.1U16YC81 C0.1U16Y
C47
X_C10U10Y0805
C47
X_C10U10Y0805
C70 C10U10Y0805C70 C10U10Y0805C77 C1U16YC77 C1U16Y
1 3 5 7
2 4 6 8
RN53
X_8P4R-0R
RN53
X_8P4R-0R
C84 C10U10Y0805C84 C10U10Y0805
C58 C0.1U16Y0402
C58 C0.1U16Y0402
C230 C1U16Y
C230 C1U16Y
L6
X_10U100m_0805
L6
X_10U100m_0805
L8 X_80L3_70_0805
L8 X_80L3_70_0805
C94 C0.1U16Y0402C94 C0.1U16Y0402
C63 C1U16YC63 C1U16Y
C44 C1U16Y
C44 C1U16Y
L5
X_10U100m_0805
L5
X_10U100m_0805
L9
X_10U100m_0805
L9
X_10U100m_0805
C69 C1U16YC69 C1U16Y
C76 C1U16YC76 C1U16Y
C46 C0.1U16Y0402
C46 C0.1U16Y0402
C57 X_C1U16Y
C57 X_C1U16Y
C75 C10U10Y0805C75 C10U10Y0805
C87
C10U10Y0805
C87
C10U10Y0805
L4
X_10U100m_0805
L4
X_10U100m_0805
C74 C10U10Y0805C74 C10U10Y0805
CP6
X_COPPER
CP6
X_COPPER
C249
C1U16Y
C249
C1U16Y
C55 X_C1U16Y
C55 X_C1U16Y
C65 C10U10Y0805C65 C10U10Y0805
C0.01U25X0402
C89
C0.01U25X0402
C89
C51
C1U16Y
C51
C1U16Y
C95 C0.1U16YC95 C0.1U16Y
C78 C0.1U16Y0402C78 C0.1U16Y0402
C66 C0.1U16Y0402C66 C0.1U16Y0402
CP8
X_COPPER
CP8
X_COPPER
C86 C0.1U16YC86 C0.1U16Y
C54
C1U16Y C54
C1U16Y
C48
C0.1U16Y0402
C48
C0.1U16Y0402
C62 C0.1U16Y0402C62 C0.1U16Y0402
C50 C1U16YC50 C1U16Y
C73 C1U16YC73 C1U16Y
L11
0.1U50m
L11
0.1U50m
CP39 X_COPPER
CP39 X_COPPER
C90 C10U10Y0805C90 C10U10Y0805
VCC_88
AJ12
VCC_87
AJ11
VCC_86
AJ10
VCC_85
AH4
VCC_84
AH2
VCC_83
AH1
VCC_82
AG9
VCC_81
AG8
VCC_97
F11
VCC_96D4VCC_95C9VCC_94
C13
VCC_89
AJ5
VCC_93
AJ9
VCC_92
AJ8
VCC_91
AJ7
VCC_90
AJ6
VCC_100
J2
VCC_99G2VCC_98
F9
VCC_104L6VCC_103
L12
VCC_102J6VCC_101J3VCC_109N8VCC_108N6VCC_107N3VCC_106
N12
VCC_105
N11
VCC_78
AG5
VCC_CL
Y32
VCCDQ_CRT
B21
VCCD_CRT
C21
VCCA_EXPPLL
B15
VCCA_MPLL
A24
VCCA_HPLL
C23
VCCA_EXP
A16
VCC3_3
B17
VCC_1
AA13
VCC_2
AA14
VCC_3
AA15
VCC_4
AA17
VCC_5
AA19
VCC_6
AA21
VCC_7
AA23
VCC_8
AA25
VCC_9
AA26
VCC_10
AA27
VCC_11
AA3
VCC_12
AB17
VCC_13
AB18
VCC_14
AB20
VCC_15
AB22
VCC_16
AB24
VCC_17
AB26
VCC_18
AB27
VCC_19
AC13
VCC_20
AC14
VCC_21
AC15
VCC_22
AC17
VCC_23
AC19
VCC_24
AC21
VCC_25
AC23
VCC_26
AC25
VCC_27
AC26
VCC_28
AC27
VCC_29
AC6
VCC_30
AD14
VCC_31
AD15
VCC_32
AD17
VCC_33
AD18
VCC_34
AD20
VCC_35
AD22
VCC_36
AD24
VCC_37
AD26
VCC_38
AD27
VCC_39
AE17
VCC_40
AE19
VCC_41
AE21
VCC_42
AE23
VCC_43
AE25
VCC_44
AE26
VCC_45
AE27
VCC_46
AF1
VCC_47
AF11
VCC_48
AF12
VCC_49
AF13
VCC_50
AF14
VCC_51
AF15
VCC_52
AF17
VCC_53
AF18
VCC_54
AF2
VCC_55
AF20
VCC_56
AF22
VCC_57
AF24
VCC_58
AF25
VCC_59
AF26
VCC_60
AF3
VCC_61
AG10
VCC_62
AG11
VCC_63
AG12
VCC_64
AG13
VCC_65
AG14
VCC_66
AG15
VCC_67
AG17
VCC_68
AG18
VCC_69
AG19
VCC_70
AG2
VCC_71
AG20
VCC_72
AG21
VCC_73
AG22
VCC_74
AG23
VCC_75
AG24
VCC_76
AG3
VCC_77
AG4
VCC_79
AG6
VCC_CL_1
AA29
VCC_CL_2
AA30
VCC_CL_3
AA31
VCC_CL_4
AA32
VCC_CL_5
AC29
VCC_CL_6
AC30
VCC_CL_7
AC31
VCC_CL_8
AC32
VCC_CL_9
AD29
VCC_CL_10
AD30
VCC_CL_11
AD31
VCC_CL_12
AD32
VCC_CL_13
AF27
VCC_CL_14
AF29
VCC_CL_15
AF30
VCC_CL_16
AF31
VCC_CL_17
AG25
VCC_CL_18
AG26
VCC_CL_19
AG27
VCC_CL_20
AG29
VCC_CL_21
AG30
VCC_CL_22
AG31
VCC_CL_23
AJ13
VCC_CL_24
AJ14
VCC_CL_25
AJ15
VCC_CL_26
AJ17
VCC_CL_27
AJ18
VCC_CL_28
AJ2
VCC_CL_29
AJ20
VCC_CL_30
AJ21
VCC_CL_31
AJ23
VCC_CL_32
AJ24
VCC_CL_33
AJ26
VCC_CL_34
AJ27
VCC_CL_35
AJ29
VCC_CL_36
AJ3
VCC_CL_37
AJ30
VCC_CL_38
AJ31
VCC_CL_39
AJ4
VCC_CL_40
AK1
VCC_CL_41
AK14
VCC_CL_42
AK15
VCC_CL_43
AK17
VCC_CL_44
AK18
VCC_CL_45
AK2
VCC_CL_46
AK20
VCC_CL_47
AK21
VCC_CL_48
AK23
VCC_CL_49
AK24
VCC_CL_50
AK26
VCC_CL_51
AK27
VCC_CL_52
AK29
VCC_CL_53
AK3
VCC_CL_54
AK30
VCC_CL_55
AL10
VCC_CL_56
AL11
VCC_CL_57
AL12
VCC_CL_58
AL13
VCC_CL_59
AL15
VCC_CL_60
AL17
VCC_CL_61
AL18
VCC_CL_62
AL20
VCC_CL_63
AL21
VCC_CL_64
AL23
VCC_CL_65
AL24
VCC_CL_66
AL26
VCC_CL_67
AL27
VCC_CL_68
AL29
VCC_CL_69
AL5
VCC_CL_70
AL6
VCC_CL_71
AL7
VCC_CL_72
AL8
VCC_CL_73
AL9
VSS
V30
VCC_CL_75
Y29
VCC_CL_76
Y30
VCC_CL_77
Y31
VCC_CKDDR_1
AY42
VCC_CKDDR_2
BA42
VCC_CKDDR_3
BA43
VCC_CKDDR_4
BB41
VCC_CKDDR_5
BB42
RESERVED_38
AL31
VCC_EXP_1
AC2
VCC_EXP_2
AC3
VCC_EXP_3
AC4
VCC_EXP_4
AD1
VCC_EXP_5
AD10
VCC_EXP_6
AD11
VCC_EXP_7
AD2
VCC_EXP_8
AD4
VCC_EXP_9
AD5
VCC_EXP_10
AD6
VCC_EXP_11
AD7
VCC_EXP_12
AD8
VCC_EXP_13
AD9
VCCA_DPLLB
C22
VCCA_DPLLA
A22
VCCA_DAC_1
B16
VCCA_DAC_2
C17
VCC_80
AG7
VCC_110
N9
VCC_111
P14
VCC_112
P15
VCC_113
P20
VCC_114
R14
VCC_115
R15
VCC_116
R17
VCC_117
R18
VCC_118
U10
VCC_119
U13
VCC_120
U14
VCC_121
U15
VCC_122
U17
VCC_123
U18
VCC_124
U19
VCC_125
U20
VCC_126
U21
VCC_127
U22
VCC_128
U23
VCC_129
U24
VCC_130
U25
VCC_131
U26
VCC_132
U3
VCC_133
U6
VCC_134
U9
VCC_135
V10
VCC_136
V12
VCC_137
V13
VCC_138
V14
VCC_139
V15
VCC_140
V17
VCC_141
V18
VCC_142
V19
VCC_143
V20
VCC_144
V21
VCC_145
V22
VCC_146
V23
VCC_147
V24
VCC_148
V25
VCC_149
V26
VCC_150
V27
VCC_151
V9
VCC_152
W17
VCC_153
W18
VCC_154
W19
VCC_155
W21
VCC_156
W23
VCC_157
W25
VCC_158
W26
VCC_159
W27
VCC_160
Y11
VCC_161
Y13
VCC_162
Y14
VCC_163
Y15
VCC_164
Y17
VCC_165
Y18
VCC_166
Y20
VCC_167
Y22
VCC_168
Y24
VCC_169
Y26
VCC_170
Y27
VCC_171
Y6
VCC_DDR_1
AV18
VCC_DDR_2
AV26
VCC_DDR_3
AW20
VCC_DDR_4
AW24
VCC_DDR_5
AY32
VCC_DDR_6
BB12
VCC_DDR_7
BB16
VCC_DDR_8
BB18
VCC_DDR_9
BB20
VCC_DDR_10
BB24
VCC_DDR_11
BB26
VCC_DDR_12
BB28
VCC_DDR_13
BB32
VCC_DDR_14
BB37
VCC_DDR_15
BB39
VCC_DDR_16
BC14
VCC_DDR_17
BC18
VCC_DDR_18
BC22
VCC_DDR_19
BC26
VCC_DDR_20
BC30
VCC_DDR_21
BC34
VCC_DDR_22
BC39
VTT_FSB_1
A28
VTT_FSB_2
A30
VTT_FSB_3
B27
VTT_FSB_4
B28
VTT_FSB_5
B29
VTT_FSB_6
B30
VTT_FSB_7
C27
VTT_FSB_8
C29
VTT_FSB_9
C30
VTT_FSB_10
D27
VTT_FSB_11
D28
VTT_FSB_12
D29
VTT_FSB_13
E23
VTT_FSB_14
E26
VTT_FSB_15
E27
VTT_FSB_16
E29
VTT_FSB_17
F23
VTT_FSB_18
F24
VTT_FSB_19
F26
VTT_FSB_20
G23
VTT_FSB_21
G24
VTT_FSB_22
G26
VTT_FSB_23
H23
VTT_FSB_24
H24
VTT_FSB_25
J23
VTT_FSB_26
J24
VTT_FSB_27
K23
VTT_FSB_28
K24
VTT_FSB_29
L23
VTT_FSB_30
L24
VTT_FSB_31
M23
VTT_FSB_32
M24
VTT_FSB_33
M29
VTT_FSB_34
N23
VTT_FSB_35
N24
VTT_FSB_36
N26
VTT_FSB_37
N29
VTT_FSB_38
P23
VTT_FSB_39
P24
VTT_FSB_40
P26
VTT_FSB_41
P27
VTT_FSB_42
P29
VTT_FSB_43
R23
VTT_FSB_44
R24
VTT_FSB_45
R26
VTT_FSB_46
R27
6 OF 7
POWER
U2F
BRLK_B_CRB
6 OF 7
POWER
U2F
BRLK_B_CRB
C82 C1U16YC82 C1U16Y
R101 1R1%0402
R101 1R1%0402
C49
C1U16Y
C49
C1U16Y
C72 C0.1U16YC72 C0.1U16Y
C61 C10U10Y0805C61 C10U10Y0805
C52
C0.1U16Y0402
C52
C0.1U16Y0402
C91 C0.1U16Y0402C91 C0.1U16Y0402
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Bearlake - GND
Custom
935Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Bearlake - GND
Custom
935Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
Bearlake - GND
Custom
935Wednesday, September 19, 2007
VSS_1
A12
VSS_2
A18
VSS_3
A26
VSS_4
A3
VSS_5
A34
VSS_6
A39
VSS_7
A41
VSS_8
A5
VSS_9
A7
VSS_10
AA18
VSS_11
AA20
VSS_12
AA22
VSS_13
AA24
VSS_14
AA35
VSS_15
AA38
VSS_16
AA5
VSS_17
AA8
VSS_18
AB1
VSS_19
AB19
VSS_20
AB2
VSS_21
AB21
VSS_22
AB23
VSS_23
AB25
VSS_24
AB43
VSS_25
AC10
VSS_26
AC18
VSS_27
AC20
VSS_28
AC22
VSS_29
AC24
VSS_30
AC35
VSS_31
AC38
VSS_32
AC5
VSS_33
AC7
VSS_34
AD19
VSS_35
AD21
VSS_36
AD23
VSS_37
AD25
VSS_38
AD33
VSS_39
AD35
VSS_40
AD37
VSS_41
AD39
VSS_42
AD42
VSS_43
AE18
VSS_44
AE2
VSS_45
AE20
VSS_46
AE22
VSS_47
AE24
VSS_48
AE3
VSS_49
AE4
VSS_50
AF10
VSS_51
AF19
VSS_52
AF21
VSS_53
AF23
VSS_54
AF36
VSS_55
AF37
VSS_56
AF43
VSS_57
AF5
VSS_58
AF6
VSS_59
AF7
VSS_60
AF8
VSS_61
AF9
VSS_62
AG34
VSS_63
AG37
VSS_64
AH42
VSS_65
AJ32
VSS_66
AJ33
VSS_67
AJ36
VSS_68
AJ39
VSS_69
AK43
VSS_70
AL31
VSS_71
AL33
VSS_72
AL36
VSS_73
AM11
VSS_74
AM20
VSS_75
AM23
VSS_76
AM24
VSS_77
AM29
VSS_78
AM33
VSS_79
AM36
VSS_80
AM4
VSS_81
AM40
VSS_82
AM42
VSS_83
AM7
VSS_84
AM9
VSS_85
AN11
VSS_86
AN12
VSS_87
AN13
VSS_88
AN20
VSS_89
AN23
VSS_90
AN24
VSS_181
F27
VSS_182
F3
VSS_183
F35
VSS_184
F37
VSS_185
G1
VSS_186
G11
VSS_187
G12
VSS_188
G13
VSS_189
G21
VSS_190
G32
VSS_191
G38
VSS_192
G42
VSS_193
G7
VSS_194
G9
VSS_195
H13
VSS_196
H15
VSS_197
H17
VSS_198
H20
VSS_199
H21
VSS_200
H29
VSS_201
H31
VSS_202
J21
VSS_203
J27
VSS_204
J32
VSS_205
J35
VSS_206
J38
VSS_207
J5
VSS_208
J7
VSS_209
J9
VSS_210
K12
VSS_211
K13
VSS_212
K18
VSS_213
K2
VSS_214
K21
VSS_215
K26
VSS_216
K43
VSS_217
L11
VSS_218
L20
VSS_219
L21
VSS_220
L29
VSS_221
L3
VSS_222
L31
VSS_223
L32
VSS_224
L33
VSS_225
L40
VSS_226L5VSS_227L7VSS_228M1VSS_229
M10
VSS_230
M11
VSS_231
M15
VSS_232
M17
VSS_233
M20
VSS_234
M21
VSS_235
M27
VSS_236
M33
VSS_237
M35
VSS_238
M37
VSS_239M7VSS_240
N10
VSS_241
N13
VSS_242
N21
VSS_243
N27
VSS_244
N31
VSS_245
N33
VSS_246
N36
VSS_247N5VSS_248N7VSS_249
P17
VSS_250
P18
VSS_251P2VSS_252
P21
VSS_253
P30
VSS_254
P43
VSS_255
R11
VSS_256
R21
VSS_257R3VSS_258
R31
VSS_259
R33
VSS_260
R36
VSS_261R5VSS_262R8VSS_263T1VSS_264
T42
VSS_265
U27
VSS_266
U29
VSS_267
U35
VSS_268
U38
VSS_269U5VSS_270
U7
VSS_91
AN29
VSS_92
AN31
VSS_93
AN38
VSS_94
AN4
VSS_95
AP1
VSS_96
AP18
VSS_97
AP24
VSS_98
AP43
VSS_99
AR17
VSS_100
AR20
VSS_101
AR21
VSS_102
AR23
VSS_103
AR26
VSS_104
AR27
VSS_105
AR32
VSS_106
AR33
VSS_107
AR38
VSS_108
AR6
VSS_109
AR9
VSS_110
AT12
VSS_111
AT13
VSS_112
AT15
VSS_113
AT29
VSS_114
AT31
VSS_115
AU20
VSS_116
AU24
VSS_117
AU32
VSS_118
AU38
VSS_119
AU4
VSS_120
AU42
VSS_121
AU6
VSS_122
AV11
VSS_123
AV17
VSS_124
AV2
VSS_125
AV21
VSS_126
AV23
VSS_127
AV27
VSS_128
AV35
VSS_129
AV37
VSS_130
AV7
VSS_131
AV9
VSS_132
AW41
VSS_133
AW43
VSS_134
AY4
VSS_135
AY40
VSS_136
AY41
VSS_137
B10
VSS_138
B14
VSS_139
B19
VSS_140
B22
VSS_141
B23
VSS_142
B26
VSS_143
B31
VSS_144
B32
VSS_145
B37
VSS_146
BA1
VSS_147
BB7
VSS_148
BC10
VSS_149
BC24
VSS_150
BC28
VSS_151
BC3
VSS_152
BC32
VSS_153
BC37
VSS_154
BC41
VSS_155
BC5
VSS_156
C1
VSS_157
C11
VSS_158
C26
VSS_159
C4
VSS_160
C43
VSS_161
C5
VSS_162
C6
VSS_163
D15
VSS_164
D16
VSS_165
D17
VSS_166
D21
VSS_167
D3
VSS_168
D31
VSS_169
D40
VSS_170
E1
VSS_171
E11
VSS_172
E21
VSS_173
E24
VSS_174
E3
VSS_175
E32
VSS_176
E43
VSS_177
E9
VSS_178
F15
VSS_179
F18
VSS_180
F21
VSS_271U8VSS_272
V11
VSS_273V2VSS_274
V29
VSS_275
V32
VSS_276
V34
VSS_277
V37
VSS_278
V39
VSS_279
V43
VSS_280V5VSS_281V8VSS_282
W20
VSS_283
W22
VSS_284
W24
VSS_285W3VSS_286Y1VSS_287
Y10
VSS_288
Y19
VSS_289
Y21
VSS_290
Y23
VSS_291
Y25
VSS_292
Y33
VSS_293
Y35
VSS_294
Y37
VSS_295
Y42
VSS_296Y5VSS_297
Y7
GND
7 OF 7
U2G
BRLK_B_CRB
GND
7 OF 7
U2G
BRLK_B_CRB
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PGNT#3
PGNT#0 PGNT#2
PREQ#0 PREQ#2
PREQ#1 PREQ#3
PE_RP1
PE_RN1
PE_RP2
PE_RN2
ICH_PCLK
PE_TP3
PE_TN3
PE_RP3
PE_RN3
AD0 AD1
AD3
AD6
AD5 AD7
AD4
AD2
AD10
AD8
AD16
AD11
AD14 AD15
AD9
AD12 AD13
AD22 AD23
AD18 AD20
AD24
AD17 AD19
AD29
AD21
AD25
AD30 AD31
AD27 AD28
AD26
PIRQ#A PIRQ#C
PIRQ#B
PIRQ#H
PIRQ#D PIRQ#E
PIRQ#G
PIRQ#F
HSO_N2 PE_TN2
HSO_P1 PE_TP1
DMI_MTP_IRP_0
USB2­USB2+ USB3­USB3+
HSO_P2 PE_TP2
USBRBIAS_ICH
USB6­USB6+ USB7­USB7+
USB4­USB4+ USB5­USB5+
DMI_MTP_IRP_1 DMI_ITN_MRN_1 DMI_ITP_MRP_1
DMI_MTN_IRN_1
C_BE#0 C_BE#2
C_BE#3
C_BE#1
USB0­USB0+
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_MTN_IRN_0
CK_PE_100M_ICH
CK_PE_100M_ICH#
USB1­USB1+
USB_48
DMI_MTP_IRP_3
DMI_MTN_IRN_3 DMI_ITN_MRN_3
DMI_ITP_MRP_3
PE_TN1HSO_N1
HSO_N3 HSO_P3
PGNT#2 PGNT#3
SPI_CS1#
PGNT#0
PGNT#1
PE_RP4
PE_RN4
HSO_P4 PE_TP4
PE_TN4HSO_N4
PE_TP6
PE_TN6
SMBCLK SMBDATA
SMBCLK_SB SMBDATA_SB
GLAN_TXP
GLAN_TXN
GLAN_RXN GLAN_RXP
USB8­USB8+ USB9­USB9+
V_1P5_CORE
VCC3_SB
VCC3_SB
VCC3_SB +12V
VCC3 VCC3_SB
AD[31..0] [20]
LOCK#[20]
DEVSEL#[20]
IRDY#[20]
TRDY#[20]
FRAME#[20]
STOP#[20]
PAR[20]
C_BE#[3..0] [20]
SERR#[20]
PERR#[20]
PCI_PME#[20]
PGNT#0[20]
PREQ#0[20] PREQ#1[20] PREQ#2[20] PREQ#3[20]
PIRQ#B[20] PIRQ#C[20] PIRQ#D[20]
PIRQ#A[20]
PIRQ#E[20]
PIRQ#H[20]
PIRQ#F[20] PIRQ#G[20]
ICH_PCLK[16]
HSO_N2[19]
OC#1 [21]
USB0+ [21]
HSO_P2[19]
USB1+ [21] USB2+ [21] USB3+ [21] USB4+ [21] USB5+ [21] USB6+ [21] USB7+ [21]
USB_48 [16]
DMI_MTP_IRP_1[6]
DMI_MTN_IRN_1[6] DMI_ITN_MRN_1[6]
DMI_ITP_MRP_1[6]
USB0- [21] USB1- [21] USB2- [21] USB3- [21] USB4- [21] USB5- [21] USB6- [21] USB7- [21]
HSO_P1[19]
DMI_MTP_IRP_2[6]
DMI_ITN_MRN_2[6]
DMI_MTN_IRN_2[6]
DMI_ITP_MRP_2[6]
DMI_MTN_IRN_0[6]
DMI_MTP_IRP_0[6]
DMI_ITN_MRN_0[6]
DMI_ITP_MRP_0[6]
CK_PE_100M_ICH#[16] CK_PE_100M_ICH[16]
DMI_MTP_IRP_3[6]
DMI_ITN_MRN_3[6]
DMI_ITP_MRP_3[6]
DMI_MTN_IRN_3[6]
HSO_N1[19]
PE_RP2[19]
PE_RN2[19]
PE_RP1[19]
PE_RN1[19]
HSO_N3[19]
HSO_P3[19]
PE_RP3[19]
PE_RN3[19]
SPI_CS1# [11]
HSO_P4[19]
HSO_N4[19]
PE_RP4[19]
PE_RN4[19]
PGNT#1[20]
OC#2 [21] OC#3 [21]
CHIP_PWGD[6,11,24]
SMBCLK [24]
SMBCLK_SB [11,13,16,19,20]
SMBDATA [24]
SMBDATA_SB [11,13,16,19,20]
GLAN_TXP[27]
GLAN_TXN[27]
GLAN_RXN[27] GLAN_RXP[27]
USB8+ [21]
USB8- [21]
USB9+ [21]
USB9- [21]
OC#4 [21]
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
ICH9 - PCI, DMI, USB, PCIE & Slots
Custom
10 35Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
ICH9 - PCI, DMI, USB, PCIE & Slots
Custom
10 35Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
ICH9 - PCI, DMI, USB, PCIE & Slots
Custom
10 35Wednesday, September 19, 2007
Place near SB
12 mils width
BOOT SELECT STRAPS
BOOT DEVICE GNT#0 SPI_CS1#
FWH 1 1 SPI 0 X
GNT2
L
GNT3 EN
N/A
PCIE PORT CONFIG 2 BIT 0 (5-6)
A16 OVERIDE
SIGNAL H
DES.
DIS
SET BIT
PCI 01
SM_BUS ISOKATION CIRCUIT
R229
2.7KR0402
R229
2.7KR0402
R158 X_8.2KR0402R158 X_8.2KR0402
R145 X_8.2KR0402
R145 X_8.2KR0402
C101 C0.1U16Y0402C101 C0.1U16Y0402 C104 C0.1U16Y0402C104 C0.1U16Y0402
R155 X_8.2KR0402R155 X_8.2KR0402
G
DS
Q68
X_N-2N7002LT1G_SOT23
Q68
X_N-2N7002LT1G_SOT23
R119 X_1KR0402R119 X_1KR0402
R218 0R0402
R218 0R0402
R197 0R0402
R197 0R0402
R118 X_1KR0402R118 X_1KR0402
R144 X_8.2KR0402
R144 X_8.2KR0402
C103 C0.1U16Y0402C103 C0.1U16Y0402
C99 C0.1U16Y0402C99 C0.1U16Y0402
R112 24.9R1%0402R112 24.9R1%0402
C653 C0.1U16Y0402C653 C0.1U16Y0402
C100 C0.1U16Y0402C100 C0.1U16Y0402
R110 10KR0402R110 10KR0402
C651 C0.1U16Y0402C651 C0.1U16Y0402
PAR
E3
DEVSELB
C6
PCICLK
B3
PCIRSTB
R2
IRDYB
J8
PMEB
R3
SERRB
K5
STOPB
F10
PLOCKB
H8
TRDYB
E6
PERRB
F5
FRAMEB
G12
GNTB0
H5
GNTB1_GP51
A7
GNTB2_GP53
C7
GNTB3_GP55
F7
REQB_0
K7
REQB1_GP50
G13
REQB2_GP52
F13
REQB3_GP54
G8
PIRQAB
J5
PIRQBB
E1
PIRQCB
F1
PIRQDB
A3
GP2_PIRQEB
K6
GP3_PIRQFB
L7
GP4_PIRQGB
F2
GP5_PIRQHB
G2
AD_0
C10
AD_1
C8
AD_2
E9
AD_3
C9
AD_4
A5
AD_5
E12
AD_6
E10
AD_7
B7
AD_8
B6
AD_9
B4
AD_10
E7
AD_11
A4
AD_12
H12
AD_13
F8
AD_14
C5
AD_15
D2
AD_16
E5
AD_17
G7
AD_18
E11
AD_19
G10
AD_20
G6
AD_21
D3
AD_22
H6
AD_23
G5
AD_24
C1
AD_25
C2
AD_26
C3
AD_27
D1
AD_28
J7
AD_29
F3
AD_30
G1
AD_31
H3
CXBEB_0
F11
CXBEB_1
G9
CXBEB_2
C4
CXBEB_3
E8
PCI
1 OF 6
U3
[INTEL-NH82801IU-A0-RH]
U3A
PCI
1 OF 6
U3
[INTEL-NH82801IU-A0-RH]
U3A
G
DS
Q67
X_N-2N7002LT1G_SOT23
Q67
X_N-2N7002LT1G_SOT23
C102 C0.1U16Y0402C102 C0.1U16Y0402
B
CE
Q69 X_N-MMBT3904_NL_SOT23
Q69 X_N-MMBT3904_NL_SOT23
C96 C0.1U16Y0402C96 C0.1U16Y0402
R226
2.7KR0402
R226
2.7KR0402
C97 C0.1U16Y0402C97 C0.1U16Y0402
R117 1KR0402R117 1KR0402 R116 X_1KR0402R116 X_1KR0402
R230
X_4.7KR0402
R230
X_4.7KR0402
12
R113
22.6R1%0402
R113
22.6R1%0402
C654 C0.1U16Y0402C654 C0.1U16Y0402
C226 C0.1U16Y0402C226 C0.1U16Y0402
DMIORXN
W28
DMIORXP
W26
DMIOTXN
V30
DMIOTXP
V29
DMI1RXN
AA26
DMI1RXP
AA28
DMI1TXN
Y30
DMI1TXP
Y29
DMI2RXN
AC26
DMI2RXP
AC28
DMI2TXN
AB30
DMI2TXP
AB29
DMI3RXN
AF26
DMI3RXP
AE26
DMI3TXN
AD29
DMI3TXP
AD30
PER6N_GLAN_RXN
D29
PER6N_GLAN_RXP
D30
PER6N_GLAN_TXN
E26
PER6N_GLAN_TXP
E28
PER1N
P30
PER1P
P29
PET1N
R26
PET1P
R28
PER2N
M30
PER2P
M29
PET2N
N26
PET2P
N28
PER3N
K30
PER3P
K29
PET3N
L26
PET3P
L28
PER4N
H30
PER4P
H29
PET4N
J26
PET4P
J28
PER5N
F30
PER5P
F29
PET5N
G26
PET5P
G28
DMIRCOMPO
AF28
DMICOMPI
AF30
DMICLK100N
U26
DMICLK100P
U25
USBP0N
AD6
USBP0P
AD5
USBP1N
AE3
USBP1P
AE2
USBP2N
AD1
USBP2P
AD2
USBP3N
AB6
USBP3P
AB5
USBP4N
AC3
USBP4P
AC2
USBP5N
AB1
USBP5P
AB2
USBP6N
Y6
USBP6P
Y5
USBP7N
AA3
USBP7P
AA2
USBP8N
Y1
USBP8P
Y2
USBP9N
V6
USBP9P
V5
OC0B_GB59
P5
OC1B_GP40
N3
OC2B_GP41
P7
OC3B_GP42
R7
OC4B_GP43
N2
OC5B_GP29
N1
OC6B_GP30
N5
OC7B_GP31
M1
OC8B_GP44
P3
OC9B_GB45
R6
USBRBIASN
AG1
USBRBIASP
AG2
CLK48
AG3
USBP10N
W2
USBP10P
W3
USBP11N
V1
USBP11P
V2
OC10B_GB46
T7
OC11B_GB47
P1
DMI
PCI-E
2 OF 6
USB
U3
[INTEL-NH82801IU-A0-RH]
U3B
DMI
PCI-E
2 OF 6
USB
U3
[INTEL-NH82801IU-A0-RH]
U3B
B
CE
Q66 X_N-MMBT3904_NL_SOT23
Q66 X_N-MMBT3904_NL_SOT23
C652 C0.1U16Y0402C652 C0.1U16Y0402
C98 C0.1U16Y0402C98 C0.1U16Y0402
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SPI_HOLD#
SPI_CS1#
SRTCRST#
RTCX2
RTCX1
RTCRST#
CL_VREF_ICH
H_TRMTRIP# H_FERR#
SPI_CS0_F#
SPI_MISO_F SPI_MOSI_F
SPI_CLK_F
SPI_HOLD#
ICH_H_SMI#
A20GATE
H_FERR# H_INTR
H_A20M#
H_IGNNE#
H_INIT#
H_NMI
CK_ICHSATA#
CLINK_RST
ICH_SGP38_PU
SERIRQ
CK_ICHSATA
DMI_STRAP
CLINK_DATA
SPI_CLKSPI_CLK_F
SPI_MOSI_F SPI_CS0_F# SPI_CS0#
SPI_MOSI SPI_MISO
ICH_SGP22_PU
KBRST#
ICH_SATALED#
H_STPCLK#
SATA3GP_PU
SATA1GP_PU
SATA4GP_PU
SATA5GP_PU
SATA2GP_PU
SATA0GP_PU
GLAN_BIAS
CLINK_PWOK
CLINK_CLK
H_TRMTRIP#
ICH_SGP48_PU
ICH_SGP39_PD
SPI_WP#
SPI_MOSI_F
SPI_MISO
SPI_CS0_F# SPI_MISO_F
SPI_CLK_F
SPI_HOLD_GPO#
CL_VREF_ICH
ICH_SYNC#
INTVRMEN
ATADET0
SPKR
CHIP_PWGD
SPI_HOLD_GPO#
LDRQ_1#
RI#
LPC_DRQ#0
SPI_MOSI
LAN100_SLP
PECI_ICH
GP7
GP17 GP6
GP1
SATA2GP_PU
ICH_SATALED#
A20GATE
ICH_SGP48_PU
SERIRQ
ICH_SGP38_PU
SATA3GP_PU
SATA0GP_PU
KBRST#
SATA4GP_PU
SATA5GP_PU
ICH_SGP22_PU
SATA1GP_PU
SRTCRST#
ACSYNC
ACSDOUT
AC_BITCLK_ICH
ACRST#
LINK_ALERT#
LPC_DRQ#0
ICH_14M
RTCX1 RTCX2
LDRQ_1#
RTCRST#
SMBDATA_SB
SMBCLK_SB
SMB_ALERT#
SM_LINK0 SM_LINK1
ICH_GP56_PU
CK_PWRGD
LAN_Disable#
ICH_C13_PU
SPKR
INTRUDER#
WAKE#
SB_PWRBTIN#
ICH_GP57_PU
SLP_S3#
SIO_PME#
INTVRMEN
RSMRST#
LAN100_SLP
ATADET0
VRM_GD
SLP_S4#
ICH_THERM#
PLTRST#
SPI_WP#
CHIP_PWGD
RI#
SPI_HOLD_GPO#
ICH_SYNC#
FP_RST#
ICH_GP8_PU ICH_GP10_PU
ICH_GP14_PU
H_PWRGD
RSMRST#
ICH_GP56_PU
WAKE#
SM_LINK0 SM_LINK1
SIO_PME#
FP_RST#
SMB_ALERT#
ICH_C13_PU
ICH_GP10_PU
ICH_GP8_PU
LINK_ALERT#
ICH_GP14_PU
SPI_MISO SPI_CS0#
ICH_GP57_PU
ELAN_TXD2
ELAN_TXD1
ELAN_TXD0
ELAN_RXD2
ELAN_RXD1
ELAN_RXD0
ELAN_CLK ELAN_SYNC ELAN_RST
ACSYNC
AC_BITCLK_ICHAC_BITCLK
AC_SYNC
ELAN_RST
SATA_TX#0
SATA_RX#0
SATA_TX#1
SATA_TX0 SATA_RX#1 SATA_RX1
SATA_TX1
SATA_RX0
SATA_RX#2 SATA_RX2 SATA_TX#2
SATA_TX#3
SATA_RX#3 SATA_RX3
SATA_TX3
SATA_TX2
PLTRST#
WOL_ONLY
INTRUDER#
ICH_SLP_M#
ICH_SGP39_PD
DMI_STRAP
FP_RST#
ACRST#
ACSDOUTAC_SDOUT
AC_RST#
ACSDOUT ACSYNC
V_3P3_CL
V_FSB_VTT
VCC3
V_3P3_CL
V_3P3_CL
V_3P3_CL
VCC3
V_1P5_CORE
V_3P3_CL
VCC3_SB
VBAT
VBAT
VBAT
VCC3_SB
VCC3
VCC3
V_3P3_CL
VCC3
H_TRMTRIP#[3]
H_FERR#[3]
H_A20M#[3]
H_IGNNE#[3]
H_INIT#[3]
H_INTR[3]
H_NMI[3]
ICH_H_SMI#[3]
H_FERR#[3]
A20GATE[17]
CK_ICHSATA# [16]
CLINK_RST[6]
SERIRQ[17,18]
H_TRMTRIP#[3]
CK_ICHSATA [16]
CLINK_DATA[6]
KBRST#[17]
ICH_SATALED# [26]
H_STPCLK#[3]
CLINK_PWOK[6,25]
CLINK_CLK[6]
PECI[3,17]
SPI_CS1#[10]
LPC_DRQ#0[17]
LPC_FRAME#[17,18]
LPC_AD3[17,18]
LPC_AD0[17,18] LPC_AD2[17,18]
LPC_AD1[17,18]
ICH_14M[16]
AC_SDIN0[28]
SMBCLK_SB[10,13,16,19,20]
SMBDATA_SB[10,13,16,19,20]
SLP_S4# [24,25]
RI#
CHIP_PWGD [6,10,24]
ICH_SYNC# [6]
FP_RST# [26]
SLP_S3# [17,24,26]
PLTRST# [6,24]
CK_PWRGD [16]
SIO_PME# [17]
ICH_THERM# [3]
SB_PWRBTIN# [17]
RSMRST# [24]
WAKE# [19]
SPKR [28]
H_PWRGD [3,4]
LAN_Disable# [27]
VRM_GD [23,24]
ELAN_TXD2[27]
ELAN_TXD1[27]
ELAN_TXD0[27]
ELAN_RXD2[27]
ELAN_RXD1[27]
ELAN_RXD0[27]
ELAN_CLK[27] ELAN_SYNC[27]
AC_BITCLK[28]
AC_SYNC[28]
SATA_TX#0 [18] SATA_TX0 [18]
SATA_TX#1 [18] SATA_TX1 [18]
SATA_TX3 [18]
SATA_TX#2 [18]
SATA_TX#3 [18]
SATA_TX2 [18]
SATA_RX#0 [18] SATA_RX0 [18]
SATA_RX#3 [18] SATA_RX3 [18]
SATA_RX#2 [18] SATA_RX2 [18]
SATA_RX#1 [18] SATA_RX1 [18]
PLTRST# [6,24]
WOL_ONLY [25]
ICH_SLP_M# [25]
PCI_STOP# [16]
CPU_STOP# [16]
AC_SDOUT[28]
AC_RST#[28]
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
ICH9 - Host, SATA, Audio, SPI, RTC, MSIC
Custom
11 35Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
ICH9 - Host, SATA, Audio, SPI, RTC, MSIC
Custom
11 35Wednesday, September 19, 2007
Title
Size Document Number Rev
Date: Sheet
of
MICRO-START INT'L CO.,LTD.
ICH9 - Host, SATA, Audio, SPI, RTC, MSIC
Custom
11 35Wednesday, September 19, 2007
Place close to SB.
RTC Block
Close to ICH9Close to ICH9
Clear CMOS
CLEAR_CMOS
*
2 - 3
1 - 2 Normal
CL_VREF_ICH = 0.405V Close to ICH
Close to SPI ROM
Part Number:N31-2051451-H06
SPI DEBUG PROT
Close to SB
Reserved for BIOS control used
Close to SB
AVL: M31-25L0813-M24
From South-Bridge GPIO33
From South-Bridge GPIO32
SPI FLASH ROM
1
1 0 DISABLE INTERNAL VRM
ENABLE INTERNAL VRM
INTVRMEN
0
1 0 DISABLE INTERNAL LAN VRM
ENABLE INTERNAL LAN VRM
LAN100_SLP
390k
EN REBOOT
DIS REBOOT
SPKR
SPEC. TBD
Near ICH
Chasiss Intrusion
* If case open, system enters S4
PCIE-4X pull up
R134 15R0402R134 15R0402
R128 24.9R1%0402R128 24.9R1%0402
R146 1MR0402R146 1MR0402
R131 10KR0402R131 10KR0402
R157 100R0402
R157 100R0402
R163
2.2KR0402
R163
2.2KR0402
TP12TP12
X_C10P50N0402C268 X_C10P50N0402C268
C114 C10U10Y0805
C114 C10U10Y0805
C115 C0.1U16Y0402
C115 C0.1U16Y0402
R123 0R0402R123 0R0402
R138 X_1K/4R138 X_1K/4
T22T22
C113
C0.1U16Y0402
C113
C0.1U16Y0402
R129 10KR0402R129 10KR0402
1 3 5 7
2 4 6 8
RN12 8P4R-10KR0402RN12 8P4R-10KR0402
T21T21
C655 C0.1U10X0402
C655 C0.1U10X0402
R153 1KR0402
R153 1KR0402
1 2 3 4 5 6 7 8
RN8 8P4R-10KR0402RN8 8P4R-10KR0402
R142 62R0402R142 62R0402
C112 C0.1U10X0402
C112 C0.1U10X0402
1 2
JCI2
N31-1020151+N33-1020271
JCI2
N31-1020151+N33-1020271
1 3 5 7
2 4 6 8
RN11 8P4R-10KR0402RN11 8P4R-10KR0402
R154 10KR0402R154 10KR0402
R127 10KR0402R127 10KR0402
R152 180KR1%0402-LFR152 180KR1%0402-LF
R162 15R0402R162 15R0402
R165 2.2KR0402R165 2.2KR0402
R148
20KR1%0402
R148
20KR1%0402
R140 10KR0402R140 10KR0402
1 2 3 4
6
7 8
5 9
JSPI1
H2X5[10]_black-RH-1
JSPI1
H2X5[10]_black-RH-1
CE#
1
SO
2
WP#
3
VSS
4
VDD
8
HOLD#
7
SCK
6
SI
5
U4
AT26DF321-SU-RH
U4
AT26DF321-SU-RH
R156 10MR
R156 10MR
R164 X_0R0402R164 X_0R0402
C106
X_C20P50N0402
C106
X_C20P50N0402
1 3 5 7
2 4 6 8
RN10 8P4R-33R0402
RN10 8P4R-33R0402
R139 15R0402R139 15R0402
TP21TP21
R120 24.9R1%0402R120 24.9R1%0402
C110
C1U16Y
C110
C1U16Y
FWH0/LAD_0
K3
FWH1/LAD_1
H1
FWH2/LAD_2
M7
FWH3/LAD_3
J1
LDRQ1B_GP23
J3
LDRQ0B
L6
FWH4/LFRAMEB
L5
HDA_BIT_CLK
AH3
HDA_RSTB
AJ1
HDA_SDI0
AK3
HDA_SDI1
AH4
HDA_SDI2
AH1
HDA_SDI3
AJ3
HDA_SD0UT
AJ2
HDA_SYNC
AK1
CLK14
M5
RTCX1
A21
RTCX2
B21
RTCRSTB
A25
SMBALERTB_GP11
C16
SMBCLK
H16
SMBDATA
E16
LINKALERTB/GP60/CLGPIO4
F18
SMLINK0
A15
SMLINK1
B15
SPI_MOSI
C26
SPI_MISO
B26
SPI_CS0B
E25
SPI_CLK
G23
SPI_CS1B/GPIO58/CLGP6
F23
GP0
N7
GP8
A20
GP9_WOL_EN
A18
GP10_ALERTB
C17
GP12
A8
GP13
A19
GP14_CLGPIO2
A9
GP15
C15
GP16
M2
GP18
K1
GP20
AF5
GP24_CLGPIO0
A14
GP25
B18
GP26_S4_STATEB
C11
GP27_QRT_STATE0
A11
GP28_QRT_STATE1
G18
GP32
K2
GP33
AF6
GP34
AH5
SATACLKREQB_GP35
L1
CPUPWRGD
AD23
LAN100_SLP
E21
THRMB
AK26
VRMPWRGD
C22
MCH_SYNCB
AH25
PWRBTNB
T3
RIB
G19
SUS_STATB/LPCPD
R1
SUSCLK
R5
SYS_RESETB
F19
PLTRSTB
C14
WAKEB
E20
INTRUDERB
G21
PWROK
C25
RSMRSTB
F22
INTVRMEN
E23
SPKR
N8
SLP_S3B
A13
SLP_S4B
B13
SLP_S5B
G17
SL0_MB
F17
CK_PWRGD
T8
TP0
C13
TP1
AK28
TP2
AE24
TP3
F20
SRTCRSTB
H20
GP56
F16
CLGPIO5_GP57
C12
4 of 6
SP1 SMB AUDIO LPC
RTC
MISC
[INTEL-NH82801IU-A0-RH]
U3D
4 of 6
SP1 SMB AUDIO LPC
RTC
MISC
[INTEL-NH82801IU-A0-RH]
U3D
2
3
1
D1
S-BAT54C_SOT23
D1
S-BAT54C_SOT23
R151 330KR0402R151 330KR0402
R130 X_10KR0402R130 X_10KR0402
R159 2.2KR0402R159 2.2KR0402
R122 10KR0402R122 10KR0402
1 2 3 4 5 6 7 8
RN5 X_8P4R-10KR0402RN5 X_8P4R-10KR0402
R137 15R0402R137 15R0402
R132 10KR0402R132 10KR0402
R125 10KR0402R125 10KR0402
R141 10KR0402R141 10KR0402
R149 10KR0402R149 10KR0402
R135 10KR0402R135 10KR0402
R136 X_1K/4R136 X_1K/4
R147 330KR0402R147 330KR0402
1 2 3 4 5 6 7 8
RN7 8P4R-10KR0402RN7 8P4R-10KR0402
R124 10KR0402R124 10KR0402
R160
3.24KR1%0402
R160
3.24KR1%0402
R52715KR0402 R52715KR0402
T23T23
R161 453R1%
R161 453R1%
1 3 5 7
2 4 6 8
RN9 8P4R-10KR0402
RN9 8P4R-10KR0402
1 2 3 4 5 6 7 8
RN6 8P4R-10KR0402RN6 8P4R-10KR0402
C105
C20P50N0402
C105
C20P50N0402
R133 10KR0402R133 10KR0402
C108 C18P50NC108 C18P50N
C111 C18P50NC111 C18P50N
C107 X_C20P50N0402
C107 X_C20P50N0402
R143 62R0402R143 62R0402
1 2
JCI1
_BH1X2_white-3.5mm-RH
JCI1
_BH1X2_white-3.5mm-RH
R126 1KR0402R126 1KR0402
R121 10KR0402R121 10KR0402
GLAN_COMPO
A29
GLAN_COMPI
B29
CL_CLK0
G22
TP5
C18
CL_DATA0
H21
TP4
E19
CL_VREF0
C27
TP6
A16
CLPWROK
T6
TP7
B16
PWM0
AJ21
PWM1
AJ22
PWM2
AK22
GP17_TACH0
AH21
GP1_TACH1
AK21
GP6_TACH2
AH22
GP7_TACH3
AK23
SST
C19
GP22_SCLOCK
AJ24
GP38_SLOAD
AK24
GP39_SDATAOUT0
AH23
GP48_SDATAOUT1
AD20
SATA0RXN
AK17
SATA0RXP
AJ17
SATA0TXN
AK19
SATA0TXP
AJ19
SATA1RXN
AJ15
SATA1RXP
AK15
SATA1TXN
AH16
SATA1TXP
AF16
SATA2RXN
AJ13
SATA2RXP
AK13
SATA2TXN
AH14
SATA2TXP
AF14
SATA3RXN
AJ11
SATA3RXP
AK11
SATA3TXN
AF12
SATA3TXP
AH12
SATA4RXN
AJ9
SATA4RXP
AK9
SATA4TXN
AF10
SATA4TXP
AH9
SATA5RXN
AJ7
SATA5RXP
AK7
SATA5TXN
AF8
SATA5TXP
AH7
SATACLKN
AF18
SATACLKP
AF19
SATALEDB
AE7
SATARBIASN
AK6
SATABIASP
AJ6
GP21_SATA0GP
AK25
GP19_SATA1GP
AE20
GP36_SATA2GP
AE21
GP37_SATA3GP
AE22
SATA4GP
AF22
SATA5GP
AD21
A20GATE
P8
A20Mb
AJ28
IGNNEb
AC22
INT3_3VB
M3
INTb
AE23
INTR
AH27
FERRb
AJ27
NMI
AF24
RCINb
L3
SERIRQ
N6
SMIb
AH26
STPCLKb
AJ29
THRMTRIPB
AD24
PECI
AC23
GPIO49
AJ25
CL_RST0b
G20
GLAN_CLK
F25
LAN_RSTSYNC
E14
LAN_RSTB
C21
LAN_RXD0
G15
LAN_RXD1
H14
LAN_RXD2
E13
LAN_TXD0
F15
LAN_TXD1
F14
LAN_TXD2
G14
3 OF 6
SATA
HOST CL_LINK IQST LAN
[INTEL-NH82801IU-A0-RH]
U3C
3 OF 6
SATA
HOST CL_LINK IQST LAN
[INTEL-NH82801IU-A0-RH]
U3C
JBAT1JBAT1
1 2 3
JCOMS1
N31-1030151+N33-1020271-RH
N41-1030141-H06
JCOMS1
N31-1030151+N33-1020271-RH
N41-1030141-H06
C109
C1U10X
C109
C1U10X
R150 10KR0402R150 10KR0402
12
34
32.768KHZ12.5P_D-LF
Y1
32.768KHZ12.5P_D-LF
Y1
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