How it Works
MSI
Loading...
MS-7372
Schematics
29 pgs1.35 Mb0

MSI MS-7372 Schematics

5
CONTENT SHEET
4
3
2
1
Cover Sheet, Block diagram Intel LGA775 CPU - Signals
D D
Intel Bearlake - FSB, PCIE, DMI, VGA, MSIC
1-2 3-5
6
MS-7372L1 uATX Version: 0A
CPU:
Intel Socket 775 533/800/1066/1333 MHz ( Core 2 Duo, Pentium D, Pentium 4, Celeron D )
Intel Bearlake - Memory DDR2 Intel Bearlake - Power / GND ICH9 - PCI, USB, DMI, PCIE ICH9 - Host, DMI, SATA, Audio, SPI, RTC, MSIC ICH9 - Power, GND DDR2 Channel-A / Channel-B CY505YC56DT CLK Gen.
C C
W83627DHG, COM1,2, LPT, PS2
7 8-9 10 11 12
13-14
15 16
FMB06-65 watts or FMB-05A-95 watts
System Chipset:
Intel Bearlake - P35 or G33 (North Bridge) Intel ICH9 (South Bridge)
Main Memory:
Dual-channel DDR-II * 4 533/667/800
On Board Device:
CLOCK Gen -- ICS9LP505-2HLFT84516BT LPC Super I/O -- W83627DHG
FWH & HOOD Sense PCI-Express x16 & x1 PCI Slot USB CONNECTOR 20 ATX ,Front Panel & VGA Connector VRD11 Intersil 6312 3Phase MS7 ACPI Controller
B B
Regulators Part1 and Part2 HD Audio Codec ALC888 1394 VT6308P LAN RTL8111B MANUAL PARTS POWER Distribution POWER Distribution
A A
RESET MAP
17 18 19
21 22 23 24-25 26 27 28 29 30 31 32
LAN -- Realtek RTL8111B GIGA or RTL8101E 10/100 HD Audio Codec -- ALC888 PHY WIRE 1394 -- VIA VT6308P
Expansion Slots:
PCI EXPRESS X16 SLOT *1 PCI EXPRESS X1 SLOT * 2 PCI SLOT * 1
PWM:
VRD11 Intersil 6312 3Phase
ROM:
SPI 8M FLASH ROM
OTHER:
SATA 4-port USB Front 4-port and Rear 4-port PCIE1X 1-slot PCIE 2-slot
GPIO & Jumper setting History
5
33PWROK MAP
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
34 35
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
Friday, March 02, 2007
Friday, March 02, 2007
Friday, March 02, 2007
MICRO-START INT'L CO.,LTD.
COVER SHEET
COVER SHEET
COVER SHEET
MS-7372L1-0A-070302
MS-7372L1-0A-070302
MS-7372L1-0A-070302
1
of
135
of
135
of
135
5
4
3
2
1
Block Diagram
D D
VRD 11 Intersil 6312 3-Phase PWM
Intel LGA775 Processor
FSB 533/800/1066/1333
FSB
DDR2 800/1066
Board Stack-up
(1080 Prepreg Considerations)
PCI_E X16 Connector
Analog
Video Out
C C
PCI_E x1
PCI_E to LAN
RLC8111B
SATA-II 0~4
B B
USB Port 0~8
PCI EXPRESS X16
RGB
PCI_E x1
PCI_E x1
SATA2
USB2.0
Bearlake Q GMCH
DMI
ICH9
DDRII
HD Audio Link
PCI
LPC Bus
4 DDR II DIMM Modules
HD Audio Codec
ALC888
PCI Slot 1
1394
VT6308P
PCI Slot 2
Solder Mask
PREPREG 2.7mils
CORE 50mils
Solder Mask
PREPREG 2.7mils
Single End 50ohm Top/Bottom : 4mils USB2.0 - 90ohm : 15/7.5/4.5/7.5/15 SATA - 95ohm : 15/8/4/8/15 LAN - 100ohm : 15/10/4/10/15 PCIE - 95ohm : 15/8/4/8/15
1.9mils Cu plus plating
1 oz. (1.2mils) Cu Power Plane
1 oz. (1.2mils) Cu GND Plane
1.9mils Cu plus plating
SPI 8M Flash ROM
SPI
LPC
Debug Port
LPC SIO
W83627DHG
A A
Keyboard
Floopy
Mouse
5
Serial
COM1
LPT
Serial
COM2
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
Friday, March 02, 2007
Friday, March 02, 2007
4
3
2
Friday, March 02, 2007
MICRO-START INT'L CO.,LTD.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
MS-7372L1-0A-070302
MS-7372L1-0A-070302
MS-7372L1-0A-070302
1
of
235
of
235
of
235
8
7
6
5
4
3
2
1
AJ3
AN4
AN3
AN6
AN5
ITP_CLK1
VSS_SENSE
VCC_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D12#D8D11#
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B10
A11
A10
C11
H_D#7
H_D#12
H_D#8
H_D#9
H_D#11
H_D#10
VCC_VRM_SENSE
VSS_VRM_SENSE
VID6
VID7
VID4
VID5
AM5
AL4
AK4
AM7
AK3
VID6#
VID5#
VID4#
RSVD
VID_SELECT
ITP_CLK0
GTLREF_SEL
CS_GTLREF
LINT0/INTR
H_D#4
H_D#5
H_D#1
H_D#6
H_D#3
H_D#2
VID2
VID3
VID1
VID0
AL6
AM3
AL5
AM2
VID3#
VID2#
VID1#
VID0#
GTLREF0 GTLREF1
BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
PCREQ#
REQ4# REQ3# REQ2# REQ1# REQ0#
TESTHI12 TESTHI11 TESTHI10
TESTHI9 TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0
FORCEPH
RSVD
BCLK1# BCLK0#
RS2# RS1# RS0#
AP1# AP0#
BR0# COMP5 COMP4 COMP3 COMP2 COMP1 COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
LINT1/NMI
ZIF-SOCK775-15u
ZIF-SOCK775-15u
B4
H_D#0
C6
C6 X_C10U10X1206
X_C10U10X1206
VID[0..7] [22]
R141 0R0402R141 0R0402
AN7
CPU_GTLREF0
H1
CPU_GTLREF1
H2
GTLREF_SEL
H29
CS_GTLREF
E24
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0 H_BPM#0
AJ2 G5
H_REQ#4
J6
H_REQ#3
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
H_TESTHI12
W2
H_TESTHI11
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3 F24 G24 G26 G27 G25
H_TESTHI2_7
F25
H_TESTHI1
W3
H_TESTHI0
F26
FORCEPH VTT_OUT_RIGHT
AK6
RSVD_G6
G6
CK_H_CPU#
G28
CK_H_CPU
F28
H_RS#2
H_RS#1
F5
H_RS#0
U2
H_BR#0
F3
H_COMP5
T2
H_COMP4
J2
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13 J17
H16 H15 J16
H_ADSTB#1
AD5
H_ADSTB#0
R6
H_DSTBP#3
C17
H_DSTBP#2
G19
H_DSTBP#1
E12
H_DSTBP#0
H_DSTBN#3
A16
H_DSTBN#2
G20
H_DSTBN#1
G12
H_DSTBN#0
C8
H_NMI
L1
H_INTR
VID2 VID0 VID5 VID4 VID1 VID3 VID6 VID7
R110 0R0402R110 0R0402
R140 49.9R1%0402R140 49.9R1%0402 R153 49.9R1%0402R153 49.9R1%0402 R145 49.9R1%0402R145 49.9R1%0402 R162 49.9R1%0402R162 49.9R1%0402 R142 49.9R1%0402R142 49.9R1%0402 R187 49.9R1%0402R187 49.9R1%0402
TP6TP6 TP10TP10 TP7TP7 TP5TP5
H_ADSTB#1 [6] H_ADSTB#0 [6] H_DSTBP#3 [6] H_DSTBP#2 [6] H_DSTBP#1 [6] H_DSTBP#0 [6] H_DSTBN#3 [6] H_DSTBN#2 [6] H_DSTBN#1 [6] H_DSTBN#0 [6] H_NMI [11] H_INTR [11]
TP18TP18
TP19TP19
CPU SIGNAL BLOCK
H_A#30
AG4
A31#
A30#
D44#
D43#
F21
H_D#43
H_A#29
H_A#28
AG6
AF4
A29#
D42#
F20
E21
H_D#42
H_D#41
H_A#27
AF5
A28#
A27#
D41#
D40#
E19
H_D#40
H_A#26
H_A#25
AB4
AC5
A26#
D39#
F18
E18
H_D#38
H_D#39
FP_RST#[11,21]
H_A#24
AB5
A25#
A24#
D38#
D37#
F17
H_D#37
H_A#22
H_A#23
AA5
AD6
A23#
D36#
G17
G18
H_D#36
H_D#35
A22#
D35#
U7A
U7A
DBI0# DBI1# DBI2# DBI3#
EDRDY# IERR# MCERR# FERR#/PBE# STPCLK# BINIT# INIT# RSP#
DBSY# DRDY# TRDY#
ADS# LOCK# BNR# HIT# HITM# BPRI# DEFER#
TDI TDO TMS TRST# TCK THERMDA THERMDC THERMTRIP# GND/SKTOCC# PROCHOT# IGNNE# SMI# A20M# TESTI_13
RSVD RESERVED0 RESERVED1 RESERVED2 RESERVED3 RESERVED4 RESERVED5
BOOTSELECT LL_ID0 LL_ID1
BSEL0 BSEL1 BSEL2
PWRGOOD RESET# D63#
D62# D61# D60# D59# D58# D57# D56# D55# D54#
B15
H_D#53
H_A#[3..35]
D53#
D52#
D51#
C14
C15
H_D#52
H_D#51
D50#
A14
D17
H_D#49
H_D#50
H_A#35
AJ6
A35#
D49#
D48#
D20
H_D#48
H_A#34
H_A#33
AJ5
AH5
A34#
D47#
D22
G22
H_D#46
H_D#47
H_A#32
AH4
A33#
A32#
D46#
D45#
E22
H_D#45
H_A#31
AG5
G21
H_D#44
D D
H_DBI#0[6] H_DBI#1[6] H_DBI#2[6] H_DBI#3[6]
CPU_GTLREF2[4]
H_IERR#[4] H_FERR#[11]
H_STPCLK#[11] H_INIT#[11]
H_DBSY#[6] H_DRDY#[6] H_TRDY#[6]
C C
H_A20M#[11]
H_ADS#[6] H_LOCK#[6] H_BNR#[6] H_HIT#[6] H_HITM#[6] H_BPRI#[6] H_DEFER#[6]
THERMDA_CPU[16] THERMDC_CPU[16]
H_TRMTRIP#[11] H_PROCHOT#[4]
H_IGNNE#[11]
ICH_H_SMI#[11]
VTT_OUT_LEFT H_TESTHI13
THERMDA_CPU THERMDC_CPU H_TRMTRIP#
H_PROCHOT# H_IGNNE# ICH_H_SMI# H_A20M#
R150
R150 51R0402
51R0402
Kentsfield
H_BPM#1
R77 X_0R0402R77 X_0R0402
CPU_GTLREF3[4]
B B
H_FSBSEL0[15] H_FSBSEL1[15] H_FSBSEL2[15]
H_PWRGD[4,11] H_CPURST#[4,6]
H_D#[0..63][6]
A A
H_D#[0..63]
CPU_GTLREF3
R108 51R0402R108 51R0402
H_FSBSEL0 H_FSBSEL1 H_FSBSEL2
H_PWRGD H_CPURST#
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
CPU_GTLREF2 H_IERR#
H_FERR# H_STPCLK#
H_INIT#
H_DBSY# H_DRDY# H_TRDY#
H_ADS# H_LOCK# H_BNR# H_HIT# H_HITM# H_BPRI# H_DEFER#
H_TDI H_TDO H_TMS H_TRST# H_TCK
H_D#63 H_D#62 H_D#61 H_D#60 H_D#59 H_D#58 H_D#57 H_D#56 H_D#55 H_D#54
H_A#[3..35][6]
AD3
AD1 AC1
AG1
AH2
F2 AB2 AB3
R3 M3
H4
C1
D2 C3 C2 D4
G8 G7
AF1
AE1 AL1 AK1
M2 AE8 AL2
N2
N5 AE6
C9 G10 D16 A20
AA2 G29
H30 G30
N1 G23 B22
A22 A19 B19 B21 C21 B18 A17 B16 C18
H_A#20
H_A#21
AA4
A21#
A20#Y4A19#Y6A18#W6A17#
D34#
D33#
E16
E15
H_D#33
H_D#34
H_A#19
H_A#18
D32#
G16
G15
H_D#31
H_D#32
H_A#17
AB6
D31#
D30#
F15
H_D#30
R101 X_0R0402R101 X_0R0402
H_A#14
H_A#13
H_A#12
H_A#11
H_A#16
H_A#15
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D29#
D28#
D27#
D26#
D25#
D24#
F14
F12
E13
D13
G14
G13
H_D#25
H_D#24
H_D#29
H_D#26
H_D#28
H_D#27
H_A#6
H_A#8
H_A#10
H_A#7
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
F11
E10
D10
H_D#19
H_D#22
H_D#23
H_D#21
H_D#20
H_A#5
H_A#4
H_D#18
H_D#17
H_A#3
L5
D11
H_D#15
H_D#16
AC2
DBR#
D14#
B12
C12
H_D#13
H_D#14
D13#
VCC_VRM_SENSE [22]
VSS_VRM_SENSE [22]
RN3
RN3
8P4R-680R
8P4R-680R
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
RN2
RN2
8P4R-680R
8P4R-680R
R57 680RR57 680R
VRD_VIDSEL [22] CPU_GTLREF0 [4] CPU_GTLREF1 [4]
TP8TP8 TP20TP20
H_REQ#[0..4]
H_TESTHI12
R516 51R0402R516 51R0402 R515 51R0402R515 51R0402 R514 51R0402R514 51R0402 R310 51R0402R310 51R0402 R146 51R0402R146 51R0402
R188 51R0402R188 51R0402 R128 51R0402R128 51R0402 R186 51R0402R186 51R0402 R73 X_62R0402R73 X_62R0402 R154 X_62R0402R154 X_62R0402
H_RS#[0..2]
TP4TP4 TP3TP3
VTT_OUT_RIGHT
C0.1U16Y0402
C0.1U16Y0402
VTT_OUT_RIGHT
H_BPM#0 [5]
PECI [11,16]
H_REQ#[0..4] [6]
H_TESTHI12 [5]
VTT_OUT_LEFT
CK_H_CPU# [15] CK_H_CPU [15]
H_RS#[0..2] [6]
H_BR#0 [4,6]
VTT_OUT_LEFT
C87
C87 X_C0.1U16Y0402
X_C0.1U16Y0402
C58
C58
V_FSB_VTT
C56
C56 C0.1U16Y0402
C0.1U16Y0402
VTT_OUT_RIGHT
C68 C0.1U16Y0402C68 C0.1U16Y0402 C61 C0.1U16Y0402C61 C0.1U16Y0402
VTT_OUT_RIGHT
FORCEPH
H_PROCHOT#
VTT_OUT_RIGHT VTT_OUT_LEFT
VTT_OUT_RIGHT [4,5] VTT_OUT_LEFT [4,5]
Prescott / Cedar Mill LL_ID[1:0] = 00 GTLREF_SEL = 0 VTT_SEL = 1
Kentsfield
H_TESTHI8 H_BPM#3
R158 X_0R0402R158 X_0R0402 R84 X_0R0402R84 X_0R0402
BSEL
02
1
TABLE
FSB FREQUENCY
267 MHZ (1067)000
0
01 200 MHZ (800)
1
0 0 133 MHZ (533)
RN5
RN5
1 3 5 7
8P4R-51R0402
8P4R-51R0402
RN6
RN6
1 3 5 7
8P4R-51R0402
8P4R-51R0402
R89 X_51R0402R89 X_51R0402
R88 51R0402R88 51R0402
R98 51R0402R98 51R0402
PLACE BPM TERMINATION NEAR CPU
VCC3
R74
R74 X_10KR0402
R71 X_0R0402R71 X_0R0402
X_10KR0402
B
CE
Q11
Q11
X_N-MMBT3904_NL_SOT23
X_N-MMBT3904_NL_SOT23
H_BPM#2H_TESTHI9
2 4 6 8
2 4 6 8
R90
R90 X_10KR0402
X_10KR0402
H_BPM#3 H_BPM#5 H_BPM#1 H_BPM#0
H_TMS H_TDI H_BPM#2 H_BPM#4
H_TDO
H_TRST#
H_TCK
ICH_THERM# [11,16]
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
Friday, March 02, 2007
Friday, March 02, 2007
8
7
6
5
4
3
Friday, March 02, 2007
2
MICRO-START INT'L CO.,LTD.
Intel LGA775 - Signals
Intel LGA775 - Signals
Intel LGA775 - Signals
MS-7372L1-0A-070302
MS-7372L1-0A-070302
MS-7372L1-0A-070302
of
335
of
335
of
335
1
8
VCCP
7
6
5
4
3
2
1
AF21
U7B
VCCP
D D
C C
B B
U7B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCP
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCC
VCC
Y8
VCC
VCC
Y29
Y30
VCC
VCC
VCC
VCC
Y25
Y26
Y27
Y28
VTT_OUT_RIGHT
VTT_OUT_RIGHT
VCC
Y23
Y24
AF19 AF18 AF15 AF14 AF12 AF11
AE9 AE23 AE22 AE21 AE19 AE18 AE15 AE14 AE12 AE11
AD8 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23
AC8 AC30 AC29 AC28 AC27 AC26 AC25 AC24 AC23
AB8
AA8
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
VCC
VCCW8VCC
W30
VCC
VCC
W29
VCC
VCC
W28
VCC
VCC
VCC
VCC
W27
VCC
VCC
VCC
VCC
W25
W26
R122
R122 100R1%
100R1%
R121
R121 100R1%
100R1%
W24
VCC
VCC
W23
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
U30
R136
R136 200R1%
200R1%
R126
R126 200R1%
200R1%
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U26
U27
U28
U29
Reserved for Kentsfield (Q-core)
VTT_OUT_RIGHT
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
A A
R80
R80
X_100R1%
X_100R1%
R95
R95 X_200R1%
X_200R1%
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
VCC
T30
U23
U24
U25
R144 10R0402R144 10R0402
C80
C80 C1U6.3Y0402-RH
C1U6.3Y0402-RH
R138 10R0402R138 10R0402
C75
C75 C1U6.3Y0402-RH
C1U6.3Y0402-RH
R105 X_10R0402R105 X_10R0402
C64
C64 X_C1U6.3Y0402-RH
X_C1U6.3Y0402-RH
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN8VCCP8VCCR8VCC
VCC
VCC
VCC
VCC
VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
T23
T24
T25
T26
T27
T28
T29
N30
CPU_GTLREF0 [3]
C82
C82 X_C220P50N0402
X_C220P50N0402
CPU_GTLREF1 [3]
C79
C79 X_C220P50N0402
X_C220P50N0402
CPU_GTLREF2 [3]
C66
C66 X_C220P50N0402
X_C220P50N0402
N23
N24
N25
N26
N27
N28
N29
M24
M25
M26
M27
M28
M29
M30
K27
K28
K29
K30
M23
J30
K23
K24
K25
K26
AN9
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
L5
L5
10U125M_0805-1
10U125M_0805-1
V_FSB_VTT
V_FSB_VTT
V_1P5_CORE
21
L6
L6
10U125M_0805-1
10U125M_0805-1
21
10U125M_0805-1
10U125M_0805-1
C122
C122
C1U16Y
C1U16Y
L7
L7
21
C151
C151
C10U10Y0805
C10U10Y0805
AN8
AN25
AN26
AN29
AN30
C135
C135
C10U10Y0805
C10U10Y0805
C146
C146 C1U10X
C1U10X
HS11HS22HS33HS4
C10U10Y0805
C10U10Y0805
A23 B23 D23 C23
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
AM6 AA1
J1 F27
F29
ZIF-SOCK775-15u
ZIF-SOCK775-15u
4
H_VCCA
C134
C134
H_VSSA
H_VCCPLL
C143
C143 C0.01U25X0402
C0.01U25X0402
H_VCCA H_VSSA H_VCCPLL H_VCCA
VTT_PWG VTT_OUT_RIGHT
VTT_OUT_LEFT
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
VCCA ------ 120mA VCCIOPLL -- 100mA
H_VCCPLL [8]
V_FSB_VTT
C138 C10U10Y0805C138 C10U10Y0805 C130 C10U10Y0805C130 C10U10Y0805 C125 C10U10Y0805C125 C10U10Y0805
CAPS FOR FSB GENERIC
VTT_SEL [23]
VID_GD#[22,23]
VTT_OUT_RIGHT
VID_GD#
VCC3
VCC5_SB
R83
R83 1KR0402
1KR0402
C562
C562
C0.1U16Y0402
C0.1U16Y0402
R53 680RR53 680R
R82 1KR0402R82 1KR0402
VCC5
1.25V VTT_PWRGOOD
CE
B
C78
C78 X_C0.1U16Y0402
X_C0.1U16Y0402
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
VTT_PWG SPEC : High > 0.9V Low < 0.3V Trise < 150ns
VTT_PWG
Q9
Q9
C43
C43
X_C1U16Y
X_C1U16Y
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT
8
R81
X_100R1%
X_100R1%
7
R96
R96 X_200R1%
X_200R1%
R102 X_10R0402R102 X_10R0402
C60
C60 X_C1U6.3Y0402-RH
X_C1U6.3Y0402-RH
CPU_GTLREF3 [3]
C65
C65 X_C220P50N0402
X_C220P50N0402
6
VTT_OUT_RIGHT[3,5]
VTT_OUT_LEFT[3,5]
5
VTT_OUT_RIGHT
VTT_OUT_LEFT
R107 62R0402R107 62R0402 R68 X_130R1%0402R68 X_130R1%0402R81 R129 62R0402R129 62R0402
R147 X_100R0402R147 X_100R0402 R152 62R0402R152 62R0402
4
H_IERR# H_PROCHOT# H_CPURST#
H_PWRGD H_BR#0
H_IERR# [3] H_PROCHOT# [3] H_CPURST# [3,6]
H_PWRGD [3,11] H_BR#0 [3,6]
3
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet of
Friday, March 02, 2007
Friday, March 02, 2007
Friday, March 02, 2007
2
MICRO-START INT'L CO.,LTD.
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
MS-7372L1-0A-070302
MS-7372L1-0A-070302
MS-7372L1-0A-070302
435
of
435
of
435
1
8
7
6
5
4
3
2
1
Intel Core 2 Due or Wolfadale processor
Intel Core 2 Quad or Yorkfield Processer
MSID1 0 NC MSID0 0 NC
R124
R124
VTT_OUT_RIGHT[3,4]
R190
49.9R1%0402
49.9R1%0402
A12 A15 A18
AA23 AA24 AA25 AA26 AA27 AA28 AA29
AA3
AA30
AA6 AA7
AB1 AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30
AB7
AC3
AC6
AC7
AD4
AD7 AE10 AE13 AE16 AE17
AE2 AE20 AE24 AE25 AE26 AE27 AE28
U7C
U7C
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
R114
R114
H_COMP6
VSS
AE29
H_COMP7
AE3
COMP6Y3COMP7
VSS
VSS
AE5
AE30
R93
R93
49.9R1%0402
49.9R1%0402
TP11TP11
AE4
D14
E23
RSVD
RSVDD1RSVD
RSVD
VSS
VSS
VSS
VSS
AE7
AF10
AF13
AF16
VSS
AF17
R163
R163
51R0402
51R0402
TP9TP9
TP12TP12
F23
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
VSS
AF20
AF23
AF24
AF25
24.9R1%0402
24.9R1%0402
H_COMP8
B13
F6
RSVD
IMPSEL#
VSS
VSS
VSS
AF26
AF27
R190
AF28
VSS
AF29
R127
R127
51R0402
51R0402
RSVDJ3RSVDN4RSVD
VSS
VSS
AF3
AF30
VSS
R112
R112 X_51R0402
X_51R0402
H_MSID1
H_MSID0
W1
P5
AC4
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
RSVD
MSID[1]V1MSID[0]
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF6
AF7
AG10
AG13
AG16
AG17
AG20
AG23
VSS
AG24
AG7
VSS
AH1
VSS
VSS
AH10
VSS
AH13
VSS
AH16
V30
VSS
AH17
VSSV3VSS
VSS
AH20
V29
VSS
AH23
V28
VSS
VSS
AH24
V27
AH3
VSS
VSS
V26
VSS
VSS
AH6
V25
V24
V23
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
AH7
AJ10
AJ13
AJ16
AJ17
VSS
AJ20
VSS
AJ23
VSS
AJ24
VSS
AJ27
R137 0R0402R137 0R0402
Kentsfield
R30
R29
R28
VSS
VSS
VSS
VSS
VSS
AJ4
AJ28
AJ29
AJ30
VSS
VSS
H_TESTHI12
公板有上
R27
R26
R25
R24
R23
P30
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ7
AK2
AK10
AK13
AK16
AK17
AK20
AK23
AK24
P29
VSS
VSS
AK27
P28
VSS
VSS
AK28
P27
VSS
VSS
AK29
P26
VSS
VSS
AK30
H_TESTHI12 [3]
P25
P24
P23
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
AK5
AK7
AL10
AL13
AL16
VSS
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
AL27
VSS
L30
AL28
VSS
AL3
L29
VSSL3VSS
VSS
VSS
AL7
L28
AM1
VSS
VSS
L27
VSS
VSS
AM10
L26
VSS
VSS
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23
VSS
VSS
AM20
VSSK7VSS
VSS
AM23
K5
VSS
AM24
K2
VSS
AM27
VSS
AM28
AM4
VSS
AN1
VSS
VSS
AN10
VSS
AN13
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
AN16
VSS
AN17
H28
AN2
VSS
VSS
H27
VSS
VSS
AN20
H26
VSS
VSS
AN23
H25
VSS
VSS
AN24
H24
VSS
VSS
AN27
H23
VSS
VSS
AN28
H22
VSS
H21
VSS
VSSB1VSS
H20
VSS
B11
H17
H18
H19
VSS
VSS
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
ZIF-SOCK775-15u
ZIF-SOCK775-15u
B14
H14 H13 H12 H11 H10 G1 F7 F4 F22 F19 F16 F13 F10 E8 E29 E28 E27 E26 E25 E20 E2 E17 E14 E11 D9 D6 D5 D3 D24 D21 D18 D15 D12 C7 C4 C24 C22 C19 C16 C13 C10 B8 B5 B24 B20 B17
R519 X_51R0402R519 X_51R0402
R149 X_0R0402R149 X_0R0402
Kentsfield
R222 0R0402R222 0R0402
VTT_OUT_LEFT [3,4]
H_BPM#0 [3]
D D
X_1KR0402
X_1KR0402
C C
B B
VTT_OUT_RIGHT
R123
R123
R522
R522
X_680R
X_680R
X_1KR0402
X_1KR0402
MSID0
A A
8
7
6
MSID1
R520 X_0R0402R520 X_0R0402 R521 X_0R0402R521 X_0R0402
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
B
Q50
Q50
5
CE
R523 X_0R0402R523 X_0R0402
C630
C630 X_C1U6.3Y0402-RH
X_C1U6.3Y0402-RH
VID_PG [22]
4
TP2TP2
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
Friday, March 02, 2007
Friday, March 02, 2007
3
Friday, March 02, 2007
2
MICRO-START INT'L CO.,LTD.
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
MS-7372L1-0A-070302
MS-7372L1-0A-070302
MS-7372L1-0A-070302
of
535
of
535
of
535
1
5
U1MCH
U1MCH
U10B
M38 M36
AA37
M34
M42 M43
M40
W40 W41
AA42
W42
AA41
J42 L39 J40 L37
L36 K42 N32 N34
N37 R34
N35 N38 U37 N39 R37 P42 R39 V36 R38 U36 U33 R35 V33 V35 Y34 V42 V38 Y36 Y38 Y39
F40 L35 L38 G43
J37
U34
G35 H33 G27 H27 B38 C38
J33 G29 E33
Y40 T43
Y43 U42 V41
G39 U40 U41
U39 C31
U10B
FSB_AB_3 FSB_AB_4 FSB_AB_5 FSB_AB_6 FSB_AB_7 FSB_AB_8 FSB_AB_9 FSB_AB_10 FSB_AB_11 FSB_AB_12 FSB_AB_13 FSB_AB_14 FSB_AB_15 FSB_AB_16 FSB_AB_17 FSB_AB_18 FSB_AB_19 FSB_AB_20 FSB_AB_21 FSB_AB_22 FSB_AB_23 FSB_AB_24 FSB_AB_25 FSB_AB_26 FSB_AB_27 FSB_AB_28 FSB_AB_29 FSB_AB_30 FSB_AB_31 FSB_AB_32 FSB_AB_33 FSB_AB_34 FSB_AB_35
FSB_REQB_0 FSB_REQB_1 FSB_REQB_2 FSB_REQB_3 FSB_REQB_4
FSB_ADSTBB_0 FSB_ADSTBB_1
FSB_DSTBPB_0 FSB_DSTBNB_0 FSB_DSTBPB_1 FSB_DSTBNB_1 FSB_DSTBPB_2 FSB_DSTBNB_2 FSB_DSTBPB_3 FSB_DSTBNB_3
FSB_DINVB_0 FSB_DINVB_1 FSB_DINVB_2 FSB_DINVB_3
FSB_ADSB FSB_TRDYB FSB_DRDYB FSB_DEFERB FSB_HITMB FSB_HITB FSB_LOCKB FSB_BREQ0B FSB_BNRB FSB_BPRIB FSB_DBSYB FSB_RSB_0 FSB_RSB_1 FSB_RSB_2 FSB_CPURSTB
BRLK_B_CRB
BRLK_B_CRB
V_FSB_VTT
FSB_DB_0 FSB_DB_1 FSB_DB_2 FSB_DB_3 FSB_DB_4 FSB_DB_5 FSB_DB_6 FSB_DB_7 FSB_DB_8
FSB_DB_9 FSB_DB_10 FSB_DB_11 FSB_DB_12 FSB_DB_13
FSB
FSB
FSB_DB_14 FSB_DB_15 FSB_DB_16 FSB_DB_17 FSB_DB_18 FSB_DB_19 FSB_DB_20 FSB_DB_21 FSB_DB_22 FSB_DB_23 FSB_DB_24 FSB_DB_25 FSB_DB_26 FSB_DB_27 FSB_DB_28 FSB_DB_29 FSB_DB_30 FSB_DB_31 FSB_DB_32 FSB_DB_33 FSB_DB_34 FSB_DB_35 FSB_DB_36 FSB_DB_37 FSB_DB_38 FSB_DB_39 FSB_DB_40 FSB_DB_41 FSB_DB_42 FSB_DB_43 FSB_DB_44 FSB_DB_45 FSB_DB_46 FSB_DB_47 FSB_DB_48 FSB_DB_49 FSB_DB_50 FSB_DB_51 FSB_DB_52 FSB_DB_53 FSB_DB_54 FSB_DB_55 FSB_DB_56 FSB_DB_57 FSB_DB_58 FSB_DB_59 FSB_DB_60 FSB_DB_61 FSB_DB_62 FSB_DB_63
FSB_SWING FSB_RCOMP FSB_SCOMP
FSB_SCOMPB
FSB_DVREF
FSB_ACCVREF
HPL_CLKINP HPL_CLKINN
1 OF 7
1 OF 7
*GTLREF VOLTAGE SHOULD BE
0.67*VTT=0.8V (At VTT=1.2V)
R212
R212 100R1%
100R1%
R211
R211 200R1%
200R1%
R218
R218
51R0402
51R0402
C186
C186 C1U16Y
C1U16Y
CL_VREF_MCH = 0.349V, Close to GMCH
V_1P25_CORE
R269
R269 1KR1%0402
1KR1%0402
R268
R268 392R1%0402
392R1%0402
H_D#0
R40
H_D#1
P41
H_D#2
R41
H_D#3
N40
H_D#4
R42
H_D#5
M39
H_D#6
N41
H_D#7
N42
H_D#8
L41
H_D#9
J39
H_D#10
L42
H_D#11
J41
H_D#12
K41
H_D#13
G40
H_D#14
F41
H_D#15
F42
H_D#16
C42
H_D#17
D41
H_D#18
F38
H_D#19
G37
H_D#20
E42
H_D#21
E39
H_D#22
E37
H_D#23
C39
H_D#24
B39
H_D#25
G33
H_D#26
A37
H_D#27
F33
H_D#28
E35
H_D#29
K32
H_D#30
H32
H_D#31
B34
H_D#32
J31
H_D#33
F32
H_D#34
M31
H_D#35
E31
H_D#36
K31
H_D#37
G31
H_D#38
K29
H_D#39
F31
H_D#40
J29
H_D#41
F29
H_D#42
L27
H_D#43
K27
H_D#44
H26
H_D#45
L26
H_D#46
J26
H_D#47
M26
H_D#48
C33
H_D#49
D35
H_D#50
E41
H_D#51
B41
H_D#52
D42
H_D#53
C40
H_D#54
C35
H_D#55
B40
H_D#56
D38
H_D#57
D37
H_D#58
B33
H_D#59
D33
H_D#60
C34
H_D#61
B35
H_D#62
A32
H_D#63
D32 B25
D23 C25 D25 D24 B24 R32 U32
C195
C195 C220P50N0402
C220P50N0402
CK_H_MCH CK_H_MCH#
MCH_GTLREF
H_ADS#[3]
H_HITM#[3]
H_HIT#[3]
H_BR#0[3,4] H_BNR#[3]
H_BPRI#[3]
C189
C189 X_C2.7P25N0402
X_C2.7P25N0402
HXSCOMPB
C190
C190 X_C2.7P25N0402
X_C2.7P25N0402
HXRCOMP
R217
R217
C188
C188 C0.1U16Y0402
C0.1U16Y0402
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
H_RS#0 H_RS#1 H_RS#2
HXSWING
5
H_A#[3..35][3] H_D#[0..63] [3]
D D
H_REQ#[0..4][3]
H_DBI#[0..3][3]
H_RS#[0..2][3]
49.9R1%0402
49.9R1%0402
49.9R1%0402
49.9R1%0402
R213
R213 301R1%0402
301R1%0402
R214
R214 100R1%0402
100R1%0402
H_ADSTB#0[3] H_ADSTB#1[3]
H_DSTBP#0[3] H_DSTBN#0[3] H_DSTBP#1[3] H_DSTBN#1[3] H_DSTBP#2[3] H_DSTBN#2[3] H_DSTBP#3[3] H_DSTBN#3[3]
H_TRDY#[3]
H_DRDY#[3]
H_DEFER#[3]
H_LOCK#[3]
H_DBSY#[3]
H_CPURST#[3,4]
R215
R215
R216
R216
R219
R219
16.5R1%0402-RH
16.5R1%0402-RH
49.9R1%0402
49.9R1%0402
C C
B B
V_FSB_VTT HXSCOMP
V_FSB_VTT
HXSWING SHOULD BE 1/4*VTT
V_FSB_VTT
A A
HXSWING HXRCOMP HXSCOMP HXSCOMPB MCH_GTLREF
CL_VREF_MCH
C263
C263 C0.1U16Y0402
C0.1U16Y0402
4
CK_H_MCH [15] CK_H_MCH# [15]
4
3
U1MCH
U10A
U10A
F13
PEG_RXP_0
E13
PEG_RXN_0
K15
PEG_RXP_1
J15
PEG_RXN_1
F12
PEG_RXP_2
E12
PEG_RXN_2
J12
PEG_RXP_3
H12
PEG_RXN_3
J11
PEG_RXP_4
H11
PEG_RXN_4
F7
PEG_RXP_5
PEG_RXN_5
PEG_RXP_6
F6
PEG_RXN_6
C2
PEG_RXP_7
D2
PEG_RXN_7
G6
PEG_RXP_8
G5
PEG_RXN_8
L9
PEG_RXP_9
L8
PEG_RXN_9
M8
PEG_RXP_10
M9
PEG_RXN_10
M4
PEG_RXP_11
L4
PEG_RXN_11
M5
PEG_RXP_12
M6
PEG_RXN_12
R9
PEG_RXP_13
R10
PEG_RXN_13
T4
PEG_RXP_14
R4
PEG_RXN_14
R6
PEG_RXP_15
R7
PEG_RXN_15
W2
DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1
AA7
DMI_RXP_2
AA6
DMI_RXN_2
AB3
DMI_RXP_3
AA4
DMI_RXN_3
B12
EXP_CLKINP
B13
EXP_CLKINN
G17
SDVO_CTRLDATA
E17
SDVO_CTRLCLK
BRLK_B_CRB
BRLK_B_CRB
Description
MEMORY TYPE PCI_E Lane Reversal PCI_E/SDVO co-existence TLS confidentiality
G20
BSEL0
J20
BSEL1
J18
BSEL2
K20
ALLZTEST
F20
XORTEST
G18
MTYPE
E18
EXP_SLR
K17
RESERVED_12
J17
EXP_EN
G15
RFU_G15
L17
RESERVED_14
E20
TCEN
N18
RESERVED_16
N15
RESERVED_17
N17
RESERVED_18
L15
RESERVED_19
L18
RESERVED_20
M18
RESERVED_21
AD12
CL_DATA
AD13
CL_CLK
AM5
CL_VREF
AA12
CL_RSTB
AM15
CL_PWROK
AA10
RESERVED_22
AA9
RESERVED_23
AA11
RESERVED_24
Y12
RESERVED_25
U30
RESERVED_26
U31
RESERVED_27
R29
RESERVED_28
R30
RESERVED_29
3
EXP_A_RXP_0 EXP_A_RXN_0 EXP_A_RXP_1 EXP_A_RXN_1 EXP_A_RXP_2 EXP_A_RXN_2 EXP_A_RXP_3 EXP_A_RXN_3 EXP_A_RXP_4 EXP_A_RXN_4 EXP_A_RXP_5 EXP_A_RXN_5 EXP_A_RXP_6 EXP_A_RXN_6 EXP_A_RXP_7 EXP_A_RXN_7 EXP_A_RXP_8 EXP_A_RXN_8 EXP_A_RXP_9 EXP_A_RXN_9 EXP_A_RXP_10 EXP_A_RXN_10 EXP_A_RXP_11 EXP_A_RXN_11 EXP_A_RXP_12 EXP_A_RXN_12 EXP_A_RXP_13 EXP_A_RXN_13 EXP_A_RXP_14 EXP_A_RXN_14 EXP_A_RXP_15 EXP_A_RXN_15
DMI_ITP_MRP_0 DMI_ITN_MRN_0 DMI_ITP_MRP_1 DMI_ITN_MRN_1 DMI_ITP_MRP_2 DMI_ITN_MRN_2 DMI_ITP_MRP_3 DMI_ITN_MRN_3
CK_PE_100M_MCH CK_PE_100M_MCH#
SDVO_CTRL_DATA SDVO_CTRL_CLK
DDR3 Reverse Non-concurrent Disable
H_BSL0[15] H_BSL1[15] H_BSL2[15]
T14T14 T10T10
EXP_SLR
T17T17
EXP_EN MCH_RFU_G15
T16T16
MCH_TCEN
T13T13 T19T19 T15T15 T18T18 T11T11
T12T12
CLINK_DATA CLINK_CLK CL_VREF_MCH CLINK_RST CLINK_PWOK
R264 0R0402R264 0R0402
T24T24 T25T25 T26T26 T27T27
EXP_A_RXP_0[18] EXP_A_RXN_0[18] EXP_A_RXP_1[18] EXP_A_RXN_1[18] EXP_A_RXP_2[18] EXP_A_RXN_2[18] EXP_A_RXP_3[18] EXP_A_RXN_3[18] EXP_A_RXP_4[18] EXP_A_RXN_4[18] EXP_A_RXP_5[18] EXP_A_RXN_5[18] EXP_A_RXP_6[18] EXP_A_RXN_6[18] EXP_A_RXP_7[18] EXP_A_RXN_7[18] EXP_A_RXP_8[18] EXP_A_RXN_8[18] EXP_A_RXP_9[18] EXP_A_RXN_9[18]
EXP_A_RXP_10[18]
EXP_A_RXN_10[18]
EXP_A_RXP_11[18]
EXP_A_RXN_11[18]
EXP_A_RXP_12[18]
EXP_A_RXN_12[18]
EXP_A_RXP_13[18]
EXP_A_RXN_13[18]
EXP_A_RXP_14[18]
EXP_A_RXN_14[18]
EXP_A_RXP_15[18]
EXP_A_RXN_15[18]
DMI_ITP_MRP_0[10] DMI_ITN_MRN_0[10] DMI_ITP_MRP_1[10] DMI_ITN_MRN_1[10] DMI_ITP_MRP_2[10] DMI_ITN_MRN_2[10] DMI_ITP_MRP_3[10] DMI_ITN_MRN_3[10]
CK_PE_100M_MCH[15] CK_PE_100M_MCH#[15]
SDVO_CTRL_DATA[18] SDVO_CTRL_CLK[18]
PIN H L
DDR2MTYPE
EXP_SLR
Normal Concurrent
EXP_EN MCH_TCEN
Enable
R256 X_1KR0402R256 X_1KR0402 R257 X_1KR0402R257 X_1KR0402
EXP16_PRSNT#[18]
R258 0R0402R258 0R0402 R255 X_1KR0402R255 X_1KR0402
R250 X_1KR0402R250 X_1KR0402
CLINK_DATA[11] CLINK_CLK[11]
CLINK_RST[11] CLINK_PWOK[11]
CHIP_PWGD
U1MCH
PCIE
PCIE
DMI
DMI
U10E
U10E
MISC VGA
MISC VGA
BRLK_B_CRB
BRLK_B_CRB
PEG_TXP_10 PEG_TXN_10 PEG_TXP_11 PEG_TXN_11 PEG_TXP_12 PEG_TXN_12 PEG_TXP_13 PEG_TXN_13 PEG_TXP_14 PEG_TXN_14 PEG_TXP_15 PEG_TXN_15
EXP_COMPO
CRT_HSYNC CRT_VSYNC
CRT_GREEN
CRT_GREENB
CRT_BLUEB
CRT_DDC_DATA
CRT_DDC_CLK
DPL_REFCLKINP DPL_REFCLKINN
RESERVED_34 RESERVED_35 RESERVED_36
RESERVED_37
RESERVED_33 RESERVED_32 RESERVED_31 RESERVED_30
PEG_TXP_0 PEG_TXN_0 PEG_TXP_1 PEG_TXN_1 PEG_TXP_2 PEG_TXN_2 PEG_TXP_3 PEG_TXN_3 PEG_TXP_4 PEG_TXN_4 PEG_TXP_5 PEG_TXN_5 PEG_TXP_6 PEG_TXN_6 PEG_TXP_7 PEG_TXN_7 PEG_TXP_8 PEG_TXN_8 PEG_TXP_9 PEG_TXN_9
DMI_TXP_0 DMI_TXN_0 DMI_TXP_1 DMI_TXN_1 DMI_TXP_2 DMI_TXN_2 DMI_TXP_3 DMI_TXN_3
EXP_COMPI
2 OF 7
2 OF 7
CRT_RED
CRT_BLUE
CRT_REDB
CRT_IREF
VCC
VSS
RSTINB PWROK
ICH_SYNCB
5 OF 7
5 OF 7
2
EXP_A_TXP_0
D11
EXP_A_TXN_0
D12
EXP_A_TXP_1
B11
EXP_A_TXN_1
A10
EXP_A_TXP_2
C10
EXP_A_TXN_2
D9
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
D7
EXP_A_TXN_4
D6
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
F2
EXP_A_TXN_7
EXP_A_TXP_8
F4
EXP_A_TXN_8
G4
EXP_A_TXP_9
J4
EXP_A_TXN_9
EXP_A_TXP_10
L2
EXP_A_TXN_10
EXP_A_TXP_11
N2
EXP_A_TXN_11
M2
EXP_A_TXP_12
EXP_A_TXN_12
N4
EXP_A_TXP_13
R2
EXP_A_TXN_13
EXP_A_TXP_14
U2
EXP_A_TXN_14
T2
EXP_A_TXP_15
EXP_A_TXN_15
U4
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
W4
DMI_MTN_IRN_1
DMI_MTP_IRP_2
AC8
DMI_MTN_IRN_2
AC9
DMI_MTP_IRP_3
DMI_MTN_IRN_3
AA2
GRCOMP
AC11 AC12
HSYNC
C15
VSYNC
E15
VGA_RED
B18
VGA_GREEN
C19
VGA_BLUEMTYPE
B20 C18 D19 D20
MCH_DDC_DATA
L13
MCH_DDC_CLK
M13
DACREFSET
A20
CK_96M_DREF
C14
CK_96M_DREF#
D13 L12 M11
H18 F17 A14 AM18
CHIP_PWGD
AM17 J13
A42
NC
R20
R13 R12 U11 U12
2
R262 24.9R1%0402R262 24.9R1%0402
V_1P25_CORE
T28T28
EXP_A_TXP_0 [18] EXP_A_TXN_0 [18] EXP_A_TXP_1 [18] EXP_A_TXN_1 [18] EXP_A_TXP_2 [18] EXP_A_TXN_2 [18] EXP_A_TXP_3 [18] EXP_A_TXN_3 [18] EXP_A_TXP_4 [18] EXP_A_TXN_4 [18] EXP_A_TXP_5 [18] EXP_A_TXN_5 [18] EXP_A_TXP_6 [18] EXP_A_TXN_6 [18] EXP_A_TXP_7 [18] EXP_A_TXN_7 [18] EXP_A_TXP_8 [18] EXP_A_TXN_8 [18] EXP_A_TXP_9 [18] EXP_A_TXN_9 [18] EXP_A_TXP_10 [18] EXP_A_TXN_10 [18] EXP_A_TXP_11 [18] EXP_A_TXN_11 [18] EXP_A_TXP_12 [18] EXP_A_TXN_12 [18] EXP_A_TXP_13 [18] EXP_A_TXN_13 [18] EXP_A_TXP_14 [18] EXP_A_TXN_14 [18] EXP_A_TXP_15 [18] EXP_A_TXN_15 [18]
DMI_MTP_IRP_0 [10] DMI_MTN_IRN_0 [10] DMI_MTP_IRP_1 [10] DMI_MTN_IRN_1 [10] DMI_MTP_IRP_2 [10] DMI_MTN_IRN_2 [10] DMI_MTP_IRP_3 [10] DMI_MTN_IRN_3 [10]
V_1P25_CORE
Reserved for non-Graphic sku
HSYNC [17] VSYNC [17]
VGA_RED [17] VGA_GREEN [17] VGA_BLUE [17]
MCH_DDC_DATA [17] MCH_DDC_CLK [17]
CK_96M_DREF [15] CK_96M_DREF# [15]
PLTRST# [11,23] CHIP_PWGD [11,23] ICH_SYNC# [11]
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
HSYNC VSYNC
Close to GMCH. Change to 0-ohm for non-Graphic sku
DACREFSET
Reserved for non-Graphic sku
CK_96M_DREF
CK_96M_DREF#
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Bearlake - FSB, PCIE, DMI, VGA, MSIC
Bearlake - FSB, PCIE, DMI, VGA, MSIC
Bearlake - FSB, PCIE, DMI, VGA, MSIC
MS-7372L1-0A-070302
MS-7372L1-0A-070302
Friday, March 02, 2007
Friday, March 02, 2007
Friday, March 02, 2007
MS-7372L1-0A-070302
1
R241 X_0R0402R241 X_0R0402 R238 X_0R0402R238 X_0R0402
R224 1.3KR1%0402R224 1.3KR1%0402
R518 X_10KR0402R518 X_10KR0402 R517 X_0R0402R517 X_0R0402
635
635
1
635
V_1P25_CORE
of
of
of
5
U1MCH
U10C
U10C
BB30
DDR_A_MA_0
AY25
DDR_A_MA_1
BA23
DDR_A_MA_2
BB23
DDR_A_MA_3
AY23
DDR_A_MA_4
BB22
DDR_A_MA_5
BA22
DDR_A_MA_6
BB21
DDR_A_MA_7
AW21
DDR_A_MA_8
BA21
DDR_A_MA_9
BB31
DDR_A_MA_10
AY21
DDR_A_MA_11
BC20
DDR_A_MA_12
AY38
DDR_A_MA_13
BA19
DDR_A_MA_14
BA33
DDR_A_WEB
AW35
DDR_A_CASB
AY33
DDR_A_RASB
BA31
DDR_A_BS_0
AY31
DDR_A_BS_1
AY20
DDR_A_BS_2
BA34
DDR_A_CSB_0
AY35
DDR_A_CSB_1
BB33
DDR_A_CSB_2
BB38
DDR_A_CSB_3
AY19
DDR_A_CKE_0
AW18
DDR_A_CKE_1
BB19
DDR_A_CKE_2
BA18
DDR_A_CKE_3
BB35
DDR_A_ODT_0
BA38
DDR_A_ODT_1
BA35
DDR_A_ODT_2
BA39
DDR_A_ODT_3
AR31
DDR_A_CK_0
AU31
DDR_A_CKB_0
AP27
DDR_A_CK_1
AN27
DDR_A_CKB_1
AV33
DDR_A_CK_2
AW33
DDR_A_CKB_2
AP29
DDR_A_CK_3
AP31
DDR_A_CKB_3
AM26
DDR_A_CK_4
AM27
DDR_A_CKB_4
AT33
DDR_A_CK_5
AU33
DDR_A_CKB_5
BC16
DDR3_DRAMRSTB
AN15
DDR3_DRAM_PWROK
AY37
DDR3_A_CSB1
BB29
DDR3_A_MA0
BB34
DDR3_A_WEB
AW32
DDR3_B_ODT3
BC43
TEST3
BC1
TEST1
A43
TEST0
AN21
RESERVED_1
N20
NC_1
NC_2
B42
NC_3
B43
NC_4
BB1
NC_5
BB2
NC_6
BB43
NC_7
BC2
NC_8
BC42
NC_9
DDR_A
DDR_A
T3T3
T1T1 T4T4 T2T2
MAA_A0 MAA_A1 MAA_A2 MAA_A3 MAA_A4 MAA_A5 MAA_A6 MAA_A7 MAA_A8 MAA_A9 MAA_A10 MAA_A11 MAA_A12 MAA_A13 MAA_A14
WE_A# CAS_A# RAS_A#
SBS_A0 SBS_A1 SBS_A2
SCS_A#0 SCS_A#1 SCS_A#2 SCS_A#3
SCKE_A0 SCKE_A1 SCKE_A2 SCKE_A3
ODT_A0 ODT_A1 ODT_A2 ODT_A3
P_DDR0_A N_DDR0_A P_DDR1_A N_DDR1_A P_DDR2_A N_DDR2_A P_DDR3_A N_DDR3_A P_DDR4_A N_DDR4_A P_DDR5_A N_DDR5_A
R263 0R0402R263 0R0402
MAA_A[0..14][13,14]
D D
WE_A#[13,14] CAS_A#[13,14] RAS_A#[13,14]
SBS_A[0..2][13,14]
SCS_A#0[13,14] SCS_A#1[13,14] SCS_A#2[13,14] SCS_A#3[13,14]
SCKE_A0[13,14] SCKE_A1[13,14] SCKE_A2[13,14] SCKE_A3[13,14]
ODT_A0[13,14] ODT_A1[13,14] ODT_A2[13,14]
C C
B B
A A
ODT_A3[13,14]
P_DDR0_A[13] N_DDR0_A[13] P_DDR1_A[13] N_DDR1_A[13] P_DDR2_A[13] N_DDR2_A[13] P_DDR3_A[13] N_DDR3_A[13] P_DDR4_A[13] N_DDR4_A[13] P_DDR5_A[13] N_DDR5_A[13]
5
U1MCH
NC
NC
3 OF 7
3 OF 7
BRLK_B_CRB
BRLK_B_CRB
DDR_A_DQS_0
DDR_A_DQSB_0
DDR_A_DQS_1
DDR_A_DQSB_1
DDR_A_DQS_2
DDR_A_DQSB_2
DDR_A_DQS_3
DDR_A_DQSB_3
DDR_A_DQS_4
DDR_A_DQSB_4
DDR_A_DQS_5
DDR_A_DQSB_5
DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DQS_7
DDR_A_DQSB_7
DDR_A_DQ_10 DDR_A_DQ_11 DDR_A_DQ_12 DDR_A_DQ_13 DDR_A_DQ_14 DDR_A_DQ_15 DDR_A_DQ_16 DDR_A_DQ_17 DDR_A_DQ_18 DDR_A_DQ_19 DDR_A_DQ_20 DDR_A_DQ_21 DDR_A_DQ_22 DDR_A_DQ_23 DDR_A_DQ_24 DDR_A_DQ_25 DDR_A_DQ_26 DDR_A_DQ_27 DDR_A_DQ_28 DDR_A_DQ_29 DDR_A_DQ_30 DDR_A_DQ_31 DDR_A_DQ_32 DDR_A_DQ_33 DDR_A_DQ_34 DDR_A_DQ_35 DDR_A_DQ_36 DDR_A_DQ_37 DDR_A_DQ_38 DDR_A_DQ_39 DDR_A_DQ_40 DDR_A_DQ_41 DDR_A_DQ_42
DDR3
DDR3
DDR_A_DQ_43 DDR_A_DQ_44 DDR_A_DQ_45 DDR_A_DQ_46 DDR_A_DQ_47 DDR_A_DQ_48 DDR_A_DQ_49 DDR_A_DQ_50 DDR_A_DQ_51 DDR_A_DQ_52 DDR_A_DQ_53 DDR_A_DQ_54 DDR_A_DQ_55 DDR_A_DQ_56 DDR_A_DQ_57 DDR_A_DQ_58 DDR_A_DQ_59 DDR_A_DQ_60 DDR_A_DQ_61 DDR_A_DQ_62 DDR_A_DQ_63
4
AP2 AP3 AW2 AW1 AY7 BA6 AT20 AU18 AR41 AR40 AL41 AL40 AG42 AG41 AC42 AC41
DDR_A_DM_0 DDR_A_DM_1 DDR_A_DM_2 DDR_A_DM_3 DDR_A_DM_4 DDR_A_DM_5 DDR_A_DM_6 DDR_A_DM_7
DDR_A_DQ_0 DDR_A_DQ_1 DDR_A_DQ_2 DDR_A_DQ_3 DDR_A_DQ_4 DDR_A_DQ_5 DDR_A_DQ_6 DDR_A_DQ_7 DDR_A_DQ_8 DDR_A_DQ_9
AN2 AW3 BB6 AN18 AU43 AM43 AG40 AC40
AM1 AN3 AR2 AR3 AL3 AM2 AR5 AR4 AV4 AV3 BA4 BB3 AU2 AU1 AY2 AY3 BB5 AY6 BA9 BB9 BA5 BB4 BC7 AY9 AT18 AR18 AU21 AT21 AP17 AN17 AP20 AV20 AV42 AU40 AP42 AN39 AV40 AV41 AR42 AP41 AN41 AM39 AK42 AK41 AN40 AN42 AL42 AL39 AJ40 AH43 AF39 AE40 AJ42 AJ41 AF41 AF42 AD40 AD43 AB41 AA40 AE42 AE41 AC39 AB42
Place close to GMCH
VCC_DDR
4
DQS_A0 DQS_A#0 DQS_A1 DQS_A#1 DQS_A2 DQS_A#2 DQS_A3 DQS_A#3 DQS_A4 DQS_A#4 DQS_A5 DQS_A#5 DQS_A6 DQS_A#6 DQS_A7 DQS_A#7
DQM_A0 DQM_A1 DQM_A2 DQM_A3 DQM_A4 DQM_A5 DQM_A6 DQM_A7
DATA_A0 DATA_A1 DATA_A2 DATA_A3 DATA_A4 DATA_A5 DATA_A6 DATA_A7 DATA_A8 DATA_A9 DATA_A10 DATA_A11 DATA_A12 DATA_A13 DATA_A14 DATA_A15 DATA_A16 DATA_A17 DATA_A18 DATA_A19 DATA_A20 DATA_A21 DATA_A22 DATA_A23 DATA_A24 DATA_A25 DATA_A26 DATA_A27 DATA_A28 DATA_A29 DATA_A30 DATA_A31 DATA_A32 DATA_A33 DATA_A34 DATA_A35 DATA_A36 DATA_A37 DATA_A38 DATA_A39 DATA_A40 DATA_A41 DATA_A42 DATA_A43 DATA_A44 DATA_A45 DATA_A46 DATA_A47 DATA_A48 DATA_A49 DATA_A50 DATA_A51 DATA_A52 DATA_A53 DATA_A54 DATA_A55 DATA_A56 DATA_A57 DATA_A58 DATA_A59 DATA_A60 DATA_A61 DATA_A62 DATA_A63
C220 C2.2U6.3YC220 C2.2U6.3Y C226 C0.1U25YC226 C0.1U25Y C235 C2.2U6.3YC235 C2.2U6.3Y C200 C2.2U6.3YC200 C2.2U6.3Y C185 C2.2U6.3YC185 C2.2U6.3Y C196 C2.2U6.3YC196 C2.2U6.3Y
DQS_A0 [13] DQS_A#0 [13] DQS_A1 [13] DQS_A#1 [13] DQS_A2 [13] DQS_A#2 [13] DQS_A3 [13] DQS_A#3 [13] DQS_A4 [13] DQS_A#4 [13] DQS_A5 [13] DQS_A#5 [13] DQS_A6 [13] DQS_A#6 [13] DQS_A7 [13] DQS_A#7 [13]
DQM_A[0..7] [13]
DATA_A[0..63] [13]
3
At least 10 mil
R273 1KR1%0402R273 1KR1%0402
VCC_DDR
At least 10 mil~20 mil
VCC_DDR
C635
C635
C276
C276
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
R270 1KR1%0402R270 1KR1%0402
R278 1KR1%0402R278 1KR1%0402
VCC_DDR
At least 10 mil~20 mil
3
MAA_B[0..14][14]
WE_B#[14] CAS_B#[14] RAS_B#[14]
SBS_B[0..2][14]
SCS_B#0[14] SCS_B#1[14] SCS_B#2[14] SCS_B#3[14]
SCKE_B0[14] SCKE_B1[14] SCKE_B2[14] SCKE_B3[14]
ODT_B0[14] ODT_B1[14] ODT_B2[14] ODT_B3[14]
P_DDR0_B[14]
N_DDR0_B[14]
P_DDR1_B[14] N_DDR1_B[14] P_DDR2_B[14]
N_DDR2_B[14]
P_DDR3_B[14]
N_DDR3_B[14]
P_DDR4_B[14]
N_DDR4_B[14]
P_DDR5_B[14]
N_DDR5_B[14]
PLACE 0.1UF CAP CLOSE TO MCH
R274
R274 1KR1%0402
1KR1%0402
R275 19.1R1%0402-RHR275 19.1R1%0402-RH R276 19.1R1%0402-RHR276 19.1R1%0402-RH R203 19.1R1%0402-RHR203 19.1R1%0402-RH R199 19.1R1%0402-RHR199 19.1R1%0402-RH
R272
R272
3.01KR1%0402
3.01KR1%0402
U10D
AW15
BB15 BA15 AY15 BA14 BB14
AW12
BA13 BB13 AY13 BA17 AY12 BA11 AY27 BB11
BB25
AW26
AY24 BB17
AY17 AY11
BA25 BA29 BA26 BA30
AW11
BC12 BA10 BB10
BB27
AW29
BA27 AY29
AW31
AV31 AU27 AT27 AV32 AT32 AR29 AU29 AV29
AW27
AN33 AP32
AM6
BB40 BA40
AM8
AM10
AW42
AN32 AM31 AG32
AF32
AP21
AA39 AM21
AL4 AL2
BA2
U10D
DDR_B_MA_0 DDR_B_MA_1 DDR_B_MA_2 DDR_B_MA_3 DDR_B_MA_4 DDR_B_MA_5 DDR_B_MA_6 DDR_B_MA_7 DDR_B_MA_8 DDR_B_MA_9 DDR_B_MA_10 DDR_B_MA_11 DDR_B_MA_12 DDR_B_MA_13 DDR_B_MA_14
DDR_B_WEB DDR_B_CASB DDR_B_RASB
DDR_B_BS_0 DDR_B_BS_1 DDR_B_BS_2
DDR_B_CSB_0 DDR_B_CSB_1 DDR_B_CSB_2 DDR_B_CSB_3
DDR_B_CKE_0 DDR_B_CKE_1 DDR_B_CKE_2 DDR_B_CKE_3
DDR_B_ODT_0 DDR_B_ODT_1 DDR_B_ODT_2 DDR_B_ODT_3
DDR_B_CK_0 DDR_B_CKB_0 DDR_B_CK_1 DDR_B_CKB_1 DDR_B_CK_2 DDR_B_CKB_2 DDR_B_CK_3 DDR_B_CKB_3 DDR_B_CK_4 DDR_B_CKB_4 DDR_B_CK_5 DDR_B_CKB_5
DDR_B
DDR_B
DDR_VREF
DDR_RCOMPXPD DDR_RCOMPXPU DDR_RCOMPYPD DDR_RCOMPYPU DDR_RCOMPVOL DDR_RCOMPVOH
RESERVED_2 RESERVED_3 RESERVED_4 RESERVED_5 RESERVED_6 RESERVED_7 RESERVED_8 RESERVED_9 RESERVED_10
4 OF 7
4 OF 7
MAA_B0 MAA_B1 MAA_B2 MAA_B3 MAA_B4 MAA_B5 MAA_B6 MAA_B7 MAA_B8 MAA_B9 MAA_B10 MAA_B11 MAA_B12 MAA_B13 MAA_B14
WE_B# CAS_B# RAS_B#
SBS_B0 SBS_B1 SBS_B2
SCS_B#0 SCS_B#1 SCS_B#2 SCS_B#3
SCKE_B0 SCKE_B1 SCKE_B2 SCKE_B3
ODT_B0 ODT_B1 ODT_B2 ODT_B3
P_DDR0_B N_DDR0_B P_DDR1_B N_DDR1_B P_DDR2_B N_DDR2_B P_DDR3_B N_DDR3_B P_DDR4_B N_DDR4_B P_DDR5_B N_DDR5_B
MCH_VREF_A
C265
C265 C0.1U16Y0402
C0.1U16Y0402
SRCOMP0 SRCOMP1 SRCOMP2
SRCOMP3 DDR_RCOMPVOL DDR_RCOMPVOH
SRCOMP0 SRCOMP1 SRCOMP2 SRCOMP3
DDR_RCOMPVOL
DDR_RCOMPVOL = 0.2 * VCC_DDR
C264
C264 C0.01U25X0402
C0.01U25X0402
DDR_RCOMPVOH
DDR_RCOMPVOH = 0.8 * VCC_DDR
C266
C266 C0.01U25X0402
C0.01U25X0402
U1MCH
U1MCH
BRLK_B_CRB
BRLK_B_CRB
2
DDR_B_DQSB_0 DDR_B_DQSB_1 DDR_B_DQSB_2 DDR_B_DQSB_3 DDR_B_DQSB_4 DDR_B_DQSB_5 DDR_B_DQSB_6 DDR_B_DQSB_7
2
DDR_B_DQS_0 DDR_B_DQS_1 DDR_B_DQS_2 DDR_B_DQS_3 DDR_B_DQS_4 DDR_B_DQS_5 DDR_B_DQS_6 DDR_B_DQS_7
DDR_B_DM_0 DDR_B_DM_1 DDR_B_DM_2 DDR_B_DM_3 DDR_B_DM_4 DDR_B_DM_5 DDR_B_DM_6 DDR_B_DM_7
DDR_B_DQ_0 DDR_B_DQ_1 DDR_B_DQ_2 DDR_B_DQ_3 DDR_B_DQ_4 DDR_B_DQ_5 DDR_B_DQ_6 DDR_B_DQ_7 DDR_B_DQ_8
DDR_B_DQ_9 DDR_B_DQ_10 DDR_B_DQ_11 DDR_B_DQ_12 DDR_B_DQ_13 DDR_B_DQ_14 DDR_B_DQ_15 DDR_B_DQ_16 DDR_B_DQ_17 DDR_B_DQ_18 DDR_B_DQ_19 DDR_B_DQ_20 DDR_B_DQ_21 DDR_B_DQ_22 DDR_B_DQ_23 DDR_B_DQ_24 DDR_B_DQ_25 DDR_B_DQ_26 DDR_B_DQ_27 DDR_B_DQ_28 DDR_B_DQ_29 DDR_B_DQ_30 DDR_B_DQ_31 DDR_B_DQ_32 DDR_B_DQ_33 DDR_B_DQ_34 DDR_B_DQ_35 DDR_B_DQ_36 DDR_B_DQ_37 DDR_B_DQ_38 DDR_B_DQ_39 DDR_B_DQ_40 DDR_B_DQ_41 DDR_B_DQ_42 DDR_B_DQ_43 DDR_B_DQ_44 DDR_B_DQ_45 DDR_B_DQ_46 DDR_B_DQ_47 DDR_B_DQ_48 DDR_B_DQ_49 DDR_B_DQ_50 DDR_B_DQ_51 DDR_B_DQ_52 DDR_B_DQ_53 DDR_B_DQ_54 DDR_B_DQ_55 DDR_B_DQ_56 DDR_B_DQ_57 DDR_B_DQ_58 DDR_B_DQ_59 DDR_B_DQ_60 DDR_B_DQ_61 DDR_B_DQ_62 DDR_B_DQ_63
1
DQS_B0
AV6 AU5 AR12 AP12 AP15 AR15 AT24 AU26 AW39 AU39 AL35 AL34 AG35 AG36 AC36 AC37
AR7 AW9 AW13 AP23 AU37 AM37 AG39 AD38
AN7 AN8 AW5 AW7 AN5 AN6 AN9 AU7 AT11 AU11 AP13 AR13 AR11 AU9 AV12 AU12 AU15 AV13 AU17 AT17 AU13 AM13 AV15 AW17 AV24 AT23 AT26 AP26 AU23 AW23 AR24 AN26 AW37 AV38 AN36 AN37 AU35 AR35 AN35 AR37 AM35 AM38 AJ34 AL38 AR39 AM34 AL37 AL32 AG38 AJ38 AF35 AF33 AJ37 AJ35 AG33 AF34 AD36 AC33 AA34 AA36 AD34 AF38 AC34 AA33
DQS_B#0 DQS_B1 DQS_B#1 DQS_B2 DQS_B#2 DQS_B3 DQS_B#3 DQS_B4 DQS_B#4 DQS_B5 DQS_B#5 DQS_B6 DQS_B#6 DQS_B7 DQS_B#7
DQM_B0DQM_B0 DQM_B1DQM_B1 DQM_B2DQM_B2 DQM_B3DQM_B3 DQM_B4DQM_B4 DQM_B5DQM_B5 DQM_B6DQM_B6 DQM_B7DQM_B7
DATA_B0DATA_B0 DATA_B1DATA_B1 DATA_B2DATA_B2 DATA_B3DATA_B3 DATA_B4DATA_B4 DATA_B5DATA_B5 DATA_B6DATA_B6 DATA_B7DATA_B7 DATA_B8DATA_B8 DATA_B9DATA_B9 DATA_B10DATA_B10 DATA_B11DATA_B11 DATA_B12DATA_B12 DATA_B13DATA_B13 DATA_B14DATA_B14 DATA_B15DATA_B15 DATA_B16DATA_B16 DATA_B17DATA_B17 DATA_B18DATA_B18 DATA_B19DATA_B19 DATA_B20DATA_B20 DATA_B21DATA_B21 DATA_B22DATA_B22 DATA_B23DATA_B23 DATA_B24DATA_B24 DATA_B25DATA_B25 DATA_B26DATA_B26 DATA_B27DATA_B27 DATA_B28DATA_B28 DATA_B29DATA_B29 DATA_B30DATA_B30 DATA_B31DATA_B31 DATA_B32DATA_B32 DATA_B33DATA_B33 DATA_B34DATA_B34 DATA_B35DATA_B35 DATA_B36DATA_B36 DATA_B37DATA_B37 DATA_B38DATA_B38 DATA_B39DATA_B39 DATA_B40DATA_B40 DATA_B41DATA_B41 DATA_B42DATA_B42 DATA_B43DATA_B43 DATA_B44DATA_B44 DATA_B45DATA_B45 DATA_B46DATA_B46 DATA_B47DATA_B47 DATA_B48DATA_B48 DATA_B49DATA_B49 DATA_B50DATA_B50 DATA_B51DATA_B51 DATA_B52DATA_B52 DATA_B53DATA_B53 DATA_B54DATA_B54 DATA_B55DATA_B55 DATA_B56DATA_B56 DATA_B57DATA_B57 DATA_B58DATA_B58 DATA_B59DATA_B59 DATA_B60DATA_B60 DATA_B61DATA_B61 DATA_B62DATA_B62 DATA_B63DATA_B63
DQS_B0 [14] DQS_B#0 [14] DQS_B1 [14] DQS_B#1 [14] DQS_B2 [14] DQS_B#2 [14] DQS_B3 [14] DQS_B#3 [14] DQS_B4 [14] DQS_B#4 [14] DQS_B5 [14] DQS_B#5 [14] DQS_B6 [14] DQS_B#6 [14] DQS_B7 [14] DQS_B#7 [14]
DQM_B[0..7] [14]
DATA_B[0..63] [14]
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
Friday, March 02, 2007
Friday, March 02, 2007
Friday, March 02, 2007
MICRO-START INT'L CO.,LTD.
Bearlake - Memory
Bearlake - Memory
Bearlake - Memory
MS-7372L1-0A-070302
MS-7372L1-0A-070302
MS-7372L1-0A-070302
1
of
735
of
735
of
735
5
V_1P25_CORE
AA13
U10F
M23 M24 M29
BB42 BB41 BA43 BA42 AY42
A28 A30 B27 B28 B29 B30 C27 C29 C30 D27 D28 D29 E23 E26 E27 E29 F23 F24 F26 G23 G24 G26 H23 H24
J23
J24 K23 K24
L23
L24
N23 N24 N26 N29 P23 P24 P26 P27 P29 R23 R24 R26 R27
B21 C21 B15 A24 C23 A22 C22
B16 C17
B17 A16
U10F
VTT_FSB_1 VTT_FSB_2 VTT_FSB_3 VTT_FSB_4 VTT_FSB_5 VTT_FSB_6 VTT_FSB_7 VTT_FSB_8 VTT_FSB_9 VTT_FSB_10 VTT_FSB_11 VTT_FSB_12 VTT_FSB_13 VTT_FSB_14 VTT_FSB_15 VTT_FSB_16 VTT_FSB_17 VTT_FSB_18 VTT_FSB_19 VTT_FSB_20 VTT_FSB_21 VTT_FSB_22 VTT_FSB_23 VTT_FSB_24 VTT_FSB_25 VTT_FSB_26 VTT_FSB_27 VTT_FSB_28 VTT_FSB_29 VTT_FSB_30 VTT_FSB_31 VTT_FSB_32 VTT_FSB_33 VTT_FSB_34 VTT_FSB_35 VTT_FSB_36 VTT_FSB_37 VTT_FSB_38 VTT_FSB_39 VTT_FSB_40 VTT_FSB_41 VTT_FSB_42 VTT_FSB_43 VTT_FSB_44 VTT_FSB_45 VTT_FSB_46
VCCDQ_CRT VCCD_CRT VCCA_EXPPLL VCCA_MPLL VCCA_HPLL VCCA_DPLLA VCCA_DPLLB
VCCA_DAC_1 VCCA_DAC_2
VCC3_3 VCCA_EXP
VCC_CKDDR_5 VCC_CKDDR_4 VCC_CKDDR_3 VCC_CKDDR_2 VCC_CKDDR_1
VCC_DDR
VCC_1
V_FSB_VTT
VCCD_CRT
For non-Graphic sku
D D
V_1P25_CORE
V_1P25_CORE
C C
V_1P25_CORE
B B
VCC_DDR
A A
change to 0-ohm (0402)
For non-Graphic sku change to 0-ohm (0603)
X_10U100m_0805
X_10U100m_0805
H_VCCPLL[4]
VCC3
V_1P25_CORE
V_1P25_CORE
VCC3
X_C10U10Y0805
X_C10U10Y0805
VCCDQ_CRT
L14
L14
21
CP15
CP15 X_COPPER
X_COPPER
L9
L9
X_10U100m_0805
X_10U100m_0805
21
CP7
CP7
X_COPPER
X_COPPER
L10
L10
X_10U100m_0805
X_10U100m_0805
21
CP8
CP8
X_COPPER
X_COPPER
H_VCCPLL
L8
L8
X_10U100m_0805
X_10U100m_0805
21
CP6
CP6 X_COPPER
X_COPPER
X_10U100m_0805
X_10U100m_0805
X_COPPER
X_COPPER
X_10U100m_0805
X_10U100m_0805
X_COPPER
X_COPPER
L13
L13
0.1U50m
0.1U50m
21
C229
C229
C207
C207 C0.1U16Y0402
C0.1U16Y0402
C209
C209 C0.1U16Y0402
C0.1U16Y0402
R244
R244
1R1%0402
1R1%0402
VCCA_GPLL
R245
R245
1R1%0402
1R1%0402
X_C10U10Y0805
X_C10U10Y0805
VCCA_MPLL
R220 1R1%0402R220 1R1%0402 R221
R221 1R1%0402
1R1%0402
VCCA_HPLL
C199
C199 C2.2U6.3Y
C2.2U6.3Y
R228 0R0402R228 0R0402 R229 0R0402R229 0R0402
C249 C1U16YC249 C1U16Y
R200 1R1%0402R200 1R1%0402 R201 1R1%0402R201 1R1%0402
C168
C168 C10U10Y0805
C10U10Y0805
L11
L11
21
CP9
CP9
L12
L12
21
CP13
CP13
VCCA_EXP V_3P3_DAC_FILTERED
C228
C228
C0.1U16Y0402
C0.1U16Y0402
5
C237
C237 C0.1U16Y0402
C0.1U16Y0402
C236
C236
C197
C197 C10U10Y0805
C10U10Y0805
C242
C242 C0.1U16Y0402
C0.1U16Y0402
If non-Graphic sku Remove these resisters
VCC_CKDDR
VCCA_DPLLA
VCCA_DPLLA
C203
C203
X_C10U10Y0805
X_C10U10Y0805
VCCA_DPLLB
C210
C210
X_C10U10Y0805
X_C10U10Y0805
R235 1R1%0402R235 1R1%0402
C0.01U25X0402
C0.01U25X0402
VCCDQ_CRT VCCD_CRT VCCA_GPLL VCCA_MPLL VCCA_HPLL VCCA_DPLLA VCCA_DPLLB
V_3P3_DAC_FILTERED
VCCA_EXP
C173
C173
C1U16Y
C1U16Y
C202
C202 C0.1U16Y0402
C0.1U16Y0402
C204
C204 C0.1U16Y0402
C0.1U16Y0402
For non-Graphic sku Cxx change to 0-ohm
C849
C849
Rxx unstuff
AA14
AA15
AA17
AA19
AA21
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_DDR_1
VCC_DDR_2
VCC_DDR_3
VCC_DDR_4
AV18
AV26
AW20
AW24
V_FSB_VTT
C183 C1U6.3Y0402-RHC183 C1U6.3Y0402-RH C149 C1U6.3Y0402-RHC149 C1U6.3Y0402-RH C155 C1U6.3Y0402-RHC155 C1U6.3Y0402-RH C154 C1U6.3Y0402-RHC154 C1U6.3Y0402-RH C121 C1U6.3Y0402-RHC121 C1U6.3Y0402-RH
4
AA27
AA23
AA25
AA26
VCC_7
VCC_8
VCC_9
VCC_DDR_5
VCC_DDR_6
VCC_DDR_7
AY32
BB12
BB16
BB18
4
AA3
AB17
AB18
AB20
VCC_10
VCC_11
VCC_12
VCC_13
VCC_DDR_8
VCC_DDR_9
VCC_DDR_10
VCC_DDR_11
BB20
BB24
BB26
BB28
AB22
AB24
AB26
AB27
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_DDR_12
VCC_DDR_13
VCC_DDR_14
VCC_DDR_15
VCC_DDR_16
BB32
BB37
BB39
BC14
V_FSB_VTT
AC13
AC14
AC15
AC17
AC19
AC21
AC23
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_DDR_17
VCC_DDR_18
VCC_DDR_19
VCC_DDR_20
VCC_DDR_21
VCC_DDR_22
BC18
BC22
BC26
BC30
BC34
BC39
CP30
CP30
X_COPPER
X_COPPER
C182 C10U10Y0805C182 C10U10Y0805 C157 C1U6.3Y0402-RHC157 C1U6.3Y0402-RH C184 C1U6.3Y0402-RHC184 C1U6.3Y0402-RH C165 C0.1U16Y0402C165 C0.1U16Y0402 C192 C0.1U16Y0402C192 C0.1U16Y0402
AC25
AC26
VCC_26
V30
AC27
AC6
VCC_27
VCC_28
VSS
Y32
AD14
AD15
VCC_29
VCC_30
VCC_31
VCC_CL
VCC_CL_76
VCC_CL_77
Y30
Y31
AD17
AD18
AD20
VCC_32
VCC_33
VCC_34
VCC_CL_72
VCC_CL_73
VCC_CL_75
AL8
AL9
Y29
AD22
AD24
AD26
VCC_35
VCC_36
VCC_37
VCC_CL_69
VCC_CL_70
VCC_CL_71
AL5
AL6
AL7
AD27
AE17
AE19
AE21
AE23
VCC_38
VCC_39
VCC_40
VCC_41
POWER
POWER
VCC_CL_65
VCC_CL_66
VCC_CL_67
VCC_CL_68
AL23
AL24
AL26
AL27
AL29
C269 C10U10Y0805C269 C10U10Y0805 C262 C10U10Y0805C262 C10U10Y0805
C268 C10U10Y0805C268 C10U10Y0805 C271 C10U10Y0805C271 C10U10Y0805 C211 C0.1U16Y0402C211 C0.1U16Y0402 C213 C0.1U16Y0402C213 C0.1U16Y0402 C234 C0.1U16Y0402C234 C0.1U16Y0402
3
AE25
AE26
AE27
VCC_42
VCC_43
VCC_44
VCC_45
VCC_CL_61
VCC_CL_62
VCC_CL_63
VCC_CL_64
AL18
AL20
AL21
3
AF1
AF11
AF12
AF13
AF14
AF15
AF17
AF18
AF2
AF20
AF22
AF24
AF25
AF26
AF3
AG10
AG11
AG12
AG13
AG14
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_CL_41
VCC_CL_42
VCC_CL_43
VCC_CL_44
VCC_CL_45
VCC_CL_46
VCC_CL_47
VCC_CL_48
VCC_CL_49
VCC_CL_50
VCC_CL_51
VCC_CL_52
VCC_CL_53
VCC_CL_54
VCC_CL_55
VCC_CL_56
VCC_CL_57
VCC_CL_58
VCC_CL_59
VCC_CL_60
AK27
AK26
AK24
AK23
AK21
AK20
AK2
AK14
AK15
AK17
AK18
AL17
AK29
AK30
V_1P25_COREV_1P25_CORE V_1P25_CORE
C251 C0.1U16Y0402C251 C0.1U16Y0402 C252 C0.1U16Y0402C252 C0.1U16Y0402 C256 C0.1U16Y0402C256 C0.1U16Y0402 C259 C0.1U16Y0402C259 C0.1U16Y0402 C260 C0.1U16Y0402C260 C0.1U16Y0402 C267 C0.1U16Y0402C267 C0.1U16Y0402 C274 C0.1U16Y0402C274 C0.1U16Y0402
AK3
AL10
AL11
AL12
AL13
AL15
AG15
AG17
AG18
VCC_66
VCC_67
VCC_68
VCC_CL_38
VCC_CL_39
VCC_CL_40
AJ4
AK1
AJ31
AG19
AG2
AG20
AG21
AG22
VCC_69
VCC_70
VCC_71
VCC_72
VCC_CL_34
VCC_CL_35
VCC_CL_36
VCC_CL_37
AJ3
AJ26
AJ27
AJ29
AJ30
C598 X_C0.1U25YC598 X_C0.1U25Y C600 X_C0.1U25YC600 X_C0.1U25Y C601 X_C0.1U25YC601 X_C0.1U25YC273 C10U10Y0805C273 C10U10Y0805 C602 X_C0.1U25YC602 X_C0.1U25Y C603 X_C0.1U25YC603 X_C0.1U25Y C605 X_C0.1U25YC605 X_C0.1U25Y C597 X_C10U10Y0805C597 X_C10U10Y0805 C599 X_C10U10Y0805C599 X_C10U10Y0805 C604 X_C10U10Y0805C604 X_C10U10Y0805
AG5
AG23
AG24
AG3
AG4
AG6
VCC_78
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_CL_28
VCC_CL_29
VCC_CL_30
VCC_CL_31
VCC_CL_32
VCC_CL_33
AJ2
AJ18
AJ20
AJ21
AJ23
AJ24
BOTTOM (5020)
2
AG9
AG8
AG7
VCC_82
VCC_81
VCC_79
VCC_80
VCC_CL_24
VCC_CL_25
VCC_CL_26
VCC_CL_27
AJ14
AJ15
AJ17
2
AH4
AH2
AH1
VCC_85
VCC_84
VCC_83
VCC_CL_21
VCC_CL_22
VCC_CL_23
AJ13
AG30
AG31
AJ12
AJ11
AJ10
VCC_88
VCC_87
VCC_86
VCC_CL_18
VCC_CL_19
VCC_CL_20
AG26
AG27
AG29
AJ5
AJ7
AJ6
VCC_89
VCC_91
VCC_90
VCC_CL_15
VCC_CL_16
VCC_CL_17
AF30
AF31
AG25
1
F11
D4
C9
C13
AJ9
AJ8
AF29
G2
F9
J2
L6
L12
J6
VCC_97
VCC_96
VCC_95
VCC_94
VCC_93
VCC_92
VCC_CL_14
VCC_99
VCC_98
VCC_100
VCC_102
VCC_101J3VCC_109
VCC_CL_4
VCC_CL_5
VCC_CL_6
VCC_CL_7
VCC_CL_8
VCC_CL_9
VCC_CL_10
VCC_CL_11
VCC_CL_12
VCC_CL_13
AF27
AD32
AD31
AA32
AC29
AC30
AC31
AC32
AD29
AD30
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
Friday, March 02, 2007
Friday, March 02, 2007
Friday, March 02, 2007
N8
N6
N3
N12
N11
N9
VCC_110
P14 P15 P20 R14 R15 R17 R18 U10 U13 U14 U15 U17 U18 U19 U20 U21 U22 U23 U24 U25 U26 U3 U6 U9 V10 V12 V13 V14 V15 V17 V18 V19 V20 V21 V22 V23 V24 V25 V26 V27 V9 W17 W18 W19 W21 W23 W25 W26 W27 Y11 Y13 Y14 Y15 Y17 Y18 Y20 Y22 Y24 Y26 Y27 Y6
AC2 AC3 AC4 AD1 AD10 AD11 AD2 AD4 AD5 AD6 AD7 AD8 AD9
6 OF 7
6 OF 7
BRLK_B_CRB
BRLK_B_CRB
V_1P25_CORE
V_1P25_PCIE
C255
C255
C1U16Y
C1U16Y
1
VCC_104
VCC_103
VCC_108
VCC_107
VCC_106
VCC_105
VCC_111 VCC_112 VCC_113 VCC_114 VCC_115 VCC_116 VCC_117 VCC_118 VCC_119 VCC_120 VCC_121 VCC_122 VCC_123 VCC_124 VCC_125 VCC_126 VCC_127 VCC_128 VCC_129 VCC_130 VCC_131 VCC_132 VCC_133 VCC_134 VCC_135 VCC_136 VCC_137 VCC_138 VCC_139 VCC_140 VCC_141 VCC_142 VCC_143 VCC_144 VCC_145 VCC_146 VCC_147 VCC_148 VCC_149 VCC_150 VCC_151 VCC_152 VCC_153 VCC_154 VCC_155 VCC_156 VCC_157 VCC_158 VCC_159 VCC_160 VCC_161 VCC_162 VCC_163 VCC_164 VCC_165 VCC_166 VCC_167 VCC_168 VCC_169 VCC_170 VCC_171
VCC_EXP_1 VCC_EXP_2 VCC_EXP_3 VCC_EXP_4 VCC_EXP_5 VCC_EXP_6 VCC_EXP_7 VCC_EXP_8
VCC_EXP_9 VCC_EXP_10 VCC_EXP_11 VCC_EXP_12 VCC_EXP_13
VCC_CL_1
VCC_CL_2
VCC_CL_3
AA29
AA30
AA31
V_1P25_CORE
Separate when AMT is supported
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Bearlake - Power
Bearlake - Power
Bearlake - Power
MS-7372L1-0A-070302
MS-7372L1-0A-070302
MS-7372L1-0A-070302
V_1P25_CORE
L15
L15
X_80L3_70_0805
X_80L3_70_0805
21
CP17
CP17 X_COPPER
X_COPPER
C261
C261
C1U16Y
C1U16Y
of
835
of
835
of
835
5
4
3
2
1
D D
C C
B B
AA18 AA20 AA22 AA24 AA35 AA38
AA5 AA8 AB1
AB19
AB2 AB21 AB23 AB25 AB43 AC10 AC18 AC20 AC22 AC24 AC35 AC38
AC5
AC7 AD19 AD21 AD23 AD25 AD33 AD35 AD37 AD39 AD42 AE18
AE2 AE20 AE22 AE24
AE3
AE4 AF10 AF19 AF21 AF23 AF36 AF37 AF43
AG34 AG37 AH42
AJ32 AJ33 AJ36 AJ39
AK43
AL31 AL33
AL36 AM11 AM20 AM23 AM24
U10G
U10G
A12
VSS_1
A18
VSS_2
A26
VSS_3
VSS_4
A34
VSS_5
A39
VSS_6
A41
VSS_7
VSS_8
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56
AF5
VSS_57
AF6
VSS_58
AF7
VSS_59
AF8
VSS_60
AF9
VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76
Y5
Y7
VSS_296
VSS_297
Y37
Y42
VSS_294
VSS_295
Y33
Y35
VSS_292
VSS_293
Y23
Y25
VSS_290
VSS_291
Y19
Y21
VSS_288
VSS_289
Y10
VSS_287
W3
Y1
VSS_285
VSS_286
W22
W24
VSS_283
VSS_284
V8
W20
VSS_281
VSS_282
V5
VSS_280
V39
V43
VSS_278
VSS_279
V34
V37
VSS_276
VSS_277
V29
V32
VSS_274
VSS_275
V2
VSS_273
U8
V11
VSS_271
VSS_272
U5
U7
VSS_269
VSS_270
U35
U38
VSS_267
VSS_268
U29
VSS_266
T42
U27
VSS_264
VSS_265
R5
R8
T1
VSS_262
VSS_263
GND
GND
R33
R36
VSS_259
VSS_260
VSS_261
R3
R31
VSS_257
VSS_258
R11
R21
VSS_255
VSS_256
P30
P43
VSS_253
VSS_254
P21
VSS_252
P18
P2
VSS_250
VSS_251
N7
P17
VSS_248
VSS_249
N36
N5
VSS_246
VSS_247
N33
VSS_245
N27
N31
VSS_243
VSS_244
N13
N21
VSS_241
VSS_242
M7
N10
VSS_239
VSS_240
M37
VSS_238
M33
M35
VSS_236
VSS_237
M21
M27
VSS_234
VSS_235
M17
M20
VSS_232
VSS_233
M15
VSS_231
M10
M11
VSS_229
VSS_230
L7
M1
VSS_227
VSS_228
L40
L5
VSS_225
VSS_226
L33
VSS_224
VSS_223 VSS_222 VSS_221 VSS_220 VSS_219 VSS_218 VSS_217 VSS_216 VSS_215 VSS_214 VSS_213 VSS_212 VSS_211 VSS_210 VSS_209 VSS_208 VSS_207 VSS_206 VSS_205 VSS_204 VSS_203 VSS_202 VSS_201 VSS_200 VSS_199 VSS_198 VSS_197 VSS_196 VSS_195 VSS_194 VSS_193 VSS_192 VSS_191 VSS_190 VSS_189 VSS_188 VSS_187 VSS_186 VSS_185 VSS_184 VSS_183 VSS_182 VSS_181 VSS_180 VSS_179 VSS_178 VSS_177 VSS_176 VSS_175 VSS_174 VSS_173 VSS_172 VSS_171 VSS_170 VSS_169 VSS_168 VSS_167 VSS_166 VSS_165 VSS_164 VSS_163 VSS_162 VSS_161 VSS_160 VSS_159 VSS_158 VSS_157 VSS_156 VSS_155 VSS_154 VSS_153 VSS_152 VSS_151 VSS_150 VSS_149 VSS_148
L32 L31 L3 L29 L21 L20 L11 K43 K26 K21 K2 K18 K13 K12 J9 J7 J5 J38 J35 J32 J27 J21 H31 H29 H21 H20 H17 H15 H13 G9 G7 G42 G38 G32 G21 G13 G12 G11 G1 F37 F35 F3 F27 F21 F18 F15 E9 E43 E32 E3 E24 E21 E11 E1 D40 D31 D3 D21 D17 D16 D15 C6 C5 C43 C4 C26 C11 C1 BC5 BC41 BC37 BC32 BC3 BC28 BC24 BC10
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
7 OF 7
7 OF 7
BRLK_B_CRB
B10
B14
B19
B22
B23
AM4
AM7
AM9
AN11
AN12
AM40
AM42
AN13
AM29
AM33
A A
5
AM36
AN20
4
AN23
AN24
AN29
AN31
AN38
AN4
AP18
AP24
AP43
AR17
AR20
AR21
AR23
AR26
AR27
AR32
AR33
AR38
AR6
AR9
AT12
AT13
AT15
AT29
AT31
AU20
AU24
AU32
AP1
AU38
AU4
AU42
AU6
AV11
AV17
AV2
AV7
AV9
AV35
AV37
AY4
AY40
AW41
AW43
AV21
AV23
AV27
3
AY41
B26
BRLK_B_CRB
B31
B32
B37
BA1
BB7
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet
Date: Sheet
Date: Sheet
Friday, March 02, 2007
Friday, March 02, 2007
2
Friday, March 02, 2007
MICRO-START INT'L CO.,LTD.
Bearlake - GND
Bearlake - GND
Bearlake - GND
MS-7372L1-0A-070302
MS-7372L1-0A-070302
MS-7372L1-0A-070302
1
of
935
of
935
of
935
Loading...
+ 20 hidden pages
Buy Points How it Works FAQ Contact Us Questions and Suggestions Privacy Policy Cookie Policy Terms of Use